; --------------------------------------------------------------------------------
; @Title: LS20XX On-Chip Peripherals
; @Props: Released
; @Author: ADP, BCA, JAS, MRD, DAM, RAJ, KOF, PID, DAS, TRJ
; @Changelog: 2016-04-25 ADP
;             2018-09-25 BCA
;             2019-02-13 JAS
;             2020-04-07 RAJ
;             2021-05-11 TRJ
; @Manufacturer: NXP - NXP Semiconductors
; @Doc: LS2088A_LS2084A_LS2048A_LS2044ARM.pdf (Rev. 1, 2020-09)
;       DPAA2UM.pdf (Rev. 39, 2020-12)
;       LS2088ADPAA2RM.pdf (Rev. 0, 2020-09)
;       LS2088A_LS2084A_LS2048A_LS2044A_SEC_Reference_Manual_Rev0.pdf (Rev. 0, 2018-04)
; @Core: Cortex-A57, Cortex-A72
; @Chip: LS2044A, LS2048A, LS2084A, LS2088A
; @Copyright: (C) 1989-2021 Lauterbach GmbH, licensed for use with TRACE32(R) only
; --------------------------------------------------------------------------------
; $Id: perls20xx.per 13271 2021-05-13 12:09:43Z kwitkowski $

; Known Problems:
; MODULE         REGISTER               DESCRIPTION
; -----                                 CGU-DP, ISC, Pin Control, TrustZone Watchdog Timer, Global Generic Reference Timer,
;                                       LDPAA, GICD and GITS registers appear on memory map, but are not described in docs
; PMU                                   No base address provided for COP_PMU_DCSR registers
; PMU            CLTBENR/PCTBENR        Registers have the same offsets
; PMU                                   Assignments of IP blocks to the bits of PMU registers is unknown
; DDR            DDR_WRLVL_CNTL         In bit WRLVL_START state 10110 is probably incorrectly described in data sheet
;                                       Value is set to '11/4 clk'
; IFC            IFC_COL$2              Impossible to make 'if' statement on IFC_CSOR$2[PGS], since there are
;                                       4 IFC_COL registers and 8 CSOR registers
; QSPI           AHB bus registers      Base address not defined
; AIOP_CTLU      IOP_CKRHCNT_<k>        No k attribute found anywhere in the manual
; AIOP_CTLU      IOP_CKCERR_<k>         No k attribute found anywhere in the manual
; WRIOP          IOP_DDVAL1             No offset despite having all bits described
; CTLU_QOS       All                    Missing base address to whole module
; WRIOP          IFP registers          Missing base address for IFP registers
; MACSec         MACSEC_MEEC            Access RR? (assumed read-only). CAP bit is eventfld despite register being read-only.
; SEC            DnOPSTA_MS             Documentation refers to ERRTYP, but there is no such field anywhere
config 16. 8.
sif (CORENAME()=="CORTEXA72")
tree "Core Registers (Cortex-A72)"
AUTOINDENT.ON center tree
tree.open "AArch64"
tree "ID Registers"
rgroup.quad spr:0x30000++0x0
line.quad 0x00 "MIDR_EL1,Main ID Register"
hexmask.quad.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.quad 0x00 20.--23.  "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 16.--19.  "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8"
newline
hexmask.quad.word 0x00 4.--15. 1. "PART,Primary Part Number"
bitfld.quad 0x00 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad spr:0x33001++0x0
line.quad 0x00 "CTR_EL0,Cache Type Register"
bitfld.quad 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.quad 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.quad 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.quad 0x00 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.quad 0x00 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
rgroup.quad spr:0x30005++0x00
line.quad 0x00 "MPIDR_EL1,Multiprocessor Affinity Register"
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
newline
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4"
rgroup.quad spr:0x30006++0x0
line.quad 0x00 "REVIDR_EL1,Revision ID Register"
rgroup.quad spr:0x30014++0x00
line.quad 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.quad 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Reserved,ACTLR/AIFSR/ADFSR,?..."
newline
bitfld.quad 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.quad 0x00 12.--15. "SL,Shareability levels" "Reserved,2 levels,?..."
bitfld.quad 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30015++0x00
line.quad 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1"
bitfld.quad 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Not required,?..."
bitfld.quad 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.quad 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.quad 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.quad spr:0x30016++0x00
line.quad 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2"
bitfld.quad 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.quad 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.quad spr:0x30017++0x00
line.quad 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3"
bitfld.quad 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.quad 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.quad 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30026++0x00
line.quad 0x00 "ID_MMFR4_EL1,ID_MMFR4_EL1"
bitfld.quad 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
newline
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..."
rgroup.quad spr:0x30020++0x00
line.quad 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0"
bitfld.quad 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.quad spr:0x30021++0x00
line.quad 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1"
bitfld.quad 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30022++0x00
line.quad 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2"
bitfld.quad 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30023++0x00
line.quad 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3"
bitfld.quad 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30024++0x00
line.quad 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4"
bitfld.quad 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.quad 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.quad 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.quad 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30025++0x00
line.quad 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5"
bitfld.quad 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.quad 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.quad 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30060++0x00
line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0"
bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..."
bitfld.quad 0x00 12.--15. "SHA2, SHA2 instructions are implemented" "Not implemented,Implemented,?..."
bitfld.quad 0x00 8.--11. "SHA1, SHA1 instructions are implemented" "Not implemented,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..."
rgroup.quad spr:0x30010++0x00
line.quad 0x00 "ID_PFR0_EL1,Processor Feature Register 0"
bitfld.quad 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30011++0x00
line.quad 0x00 "ID_PFR1_EL1,Processor Feature Register 1"
bitfld.quad 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
newline
bitfld.quad 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.quad 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
newline
bitfld.quad 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.quad 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 24.--27. "GIC,Support for the GIC System register interface" "Not supported,GICv3 supported,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
newline
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,Implemented,?..."
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,Implemented,?..."
newline
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,Implemented,?..."
rgroup.quad spr:0x30012++0x00
line.quad 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
bitfld.quad 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,PMUv3,?..."
bitfld.quad 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.quad 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.quad 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.quad 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.quad 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.quad spr:0x30050++0x00
line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..."
bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..."
bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
newline
bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,PMUv3,?..."
bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..."
bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Debug v8-A,?..."
rgroup.quad spr:0x339C6++0x0
line.quad 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.quad 0x00 30. "CH,Chain" "Not implemented,Implemented"
bitfld.quad 0x00 29. "BC,Bus cycle" "Not implemented,Implemented"
bitfld.quad 0x00 28. "TW,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
newline
bitfld.quad 0x00 27. "IS,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.quad 0x00 26. "ME,Local memory error" "Not implemented,Implemented"
bitfld.quad 0x00 25. "DA,Bus access" "Not implemented,Implemented"
newline
bitfld.quad 0x00 24. "DC2W,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.quad 0x00 23. "DC2R,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.quad 0x00 22. "DC2A,Level 2 data cache access" "Not implemented,Implemented"
newline
bitfld.quad 0x00 21. "DC1W,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.quad 0x00 20. "IC1A,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.quad 0x00 19. "MA,Data memory access" "Not implemented,Implemented"
newline
bitfld.quad 0x00 18. "BP,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.quad 0x00 17. "CC,Cycle" "Not implemented,Implemented"
bitfld.quad 0x00 16. "BM,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.quad 0x00 15. "UL,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.quad 0x00 14. "BR,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.quad 0x00 13. "BI,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
newline
bitfld.quad 0x00 12. "PW,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.quad 0x00 11. "CW,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.quad 0x00 10. "ER,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
newline
bitfld.quad 0x00 9. "ET,Exception taken" "Not implemented,Implemented"
bitfld.quad 0x00 8. "IA,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.quad 0x00 7. "ST,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
newline
bitfld.quad 0x00 6. "LD,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
bitfld.quad 0x00 5. "DT1R,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.quad 0x00 4. "DC1A,Level 1 data cache access" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "DC1R,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.quad 0x00 2. "IT1R,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.quad 0x00 1. "IC1R,Level 1 instruction cache refill" "Not implemented,Implemented"
newline
bitfld.quad 0x00 0. "SI,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
rgroup.quad spr:0x33007++0x00
line.quad 0x00 "DCZID_EL0,Data Cache Zero ID"
bitfld.quad 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited"
bitfld.quad 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
group.quad spr:0x33D02++0x00
line.quad 0x00 "TPIDR_EL0,Thread Pointer/ID Register"
group.quad spr:0x30D04++0x00
line.quad 0x00 "TPIDR_EL1,Thread Pointer/ID Register"
group.quad spr:0x34D02++0x00
line.quad 0x00 "TPIDR_EL2,Thread Pointer/ID Register"
group.quad spr:0x36D02++0x00
line.quad 0x00 "TPIDR_EL3,Thread Pointer/ID Register"
group.quad spr:0x33D03++0x00
line.quad 0x00 "TPIDRRO_EL0,Thread Pointer/ID Register"
tree.end
tree "System Control and Configuration"
group.quad spr:0x36111++0x00
line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register"
bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled"
bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled"
group.quad spr:0x30100++0x0
line.quad 0x00 "SCTLR_EL1,Control Register (EL1)"
bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.quad 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x36100++0x0
line.quad 0x00 "SCTLR_EL3,Control Register (EL3)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x31F20++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPMRCGEA,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 62. "FPNMRCGEA,Force processor non-memory-system RCG enables active" "Not forced,Forced"
newline
bitfld.quad 0x00 61. "FPDIERCGEA,Force processor Decode and Integer Execute idle RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 60. "FPDRCGEA,Force processor Dispatch idle RCG enables active" "Not forced,Forced"
newline
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
newline
bitfld.quad 0x00 57. "TA,Treat DMB st/st and DMB ld/allas DMB all/all" "Disabled,Enabled"
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
newline
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
newline
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
newline
bitfld.quad 0x00 51. "ECDAFEMP,Enable contention detection and fast exclusive monitor path" "Disabled,Enabled"
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
newline
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
newline
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
bitfld.quad 0x00 46. "DML1DTLBM,Disable multiple outstanding L1 Data TLB misses and L2 TLB hit under miss" "No,Yes"
newline
bitfld.quad 0x00 45. "Dl1DCWT,Disable L1-DCache way tracker" "No,Yes"
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
newline
bitfld.quad 0x00 43. "DVABHWPREF,Disable the Load/Store hardware prefetcher from using VA to cross page boundaries" "No,Yes"
bitfld.quad 0x00 42. "DPREFREQRUT,Disable prefetch requests from ReadUnique transactions" "No,Yes"
newline
bitfld.quad 0x00 41. "ESHWSHAEP,Enables snoop hazard while waiting for second half of atomic exclusive pair" "Disabled,Enabled"
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
newline
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
newline
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
newline
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
newline
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
newline
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
newline
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
newline
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
newline
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad spr:0x31F21++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 requests,1 request,2 requests,3 requests"
newline
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "16 requests,18 requests,20 requests,22 requests"
bitfld.quad 0x00 6. "SMPEN,Enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster" "Disabled,Enabled"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad spr:0x31F22++0x00
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,Indicates the index address of the first memory error"
group.quad spr:0x34101++0x0
line.quad 0x00 "ACTLR_EL2,Auxiliary Control Register"
bitfld.quad 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.quad 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.quad 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad spr:0x36101++0x0
line.quad 0x00 "ACTLR_EL3,Auxiliary Control Register"
bitfld.quad 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.quad 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.quad 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad spr:0x30102++0x00
line.quad 0x00 "CPACR_EL1,Architectural Feature Access Control Register"
bitfld.quad 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap EL0/EL1,Trap EL0,Trap EL0/EL1,No trap"
group.quad spr:0x36110++0x0
line.quad 0x00 "SCR_EL3,Secure Configuration Register"
bitfld.quad 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.quad 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.quad 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled"
bitfld.quad 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64"
newline
bitfld.quad 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.quad 0x00 8. "HCE,Hypervisor Call enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes"
bitfld.quad 0x00 3. "EA,External Abort and SError Interrupt Routing" "Not to EL3,To EL3"
newline
bitfld.quad 0x00 2. "FIQ,Physical FIQ Routing" "Not to EL3,To EL3"
bitfld.quad 0x00 1. "IRQ,Physical IRQ Routing" "Not to EL3,To EL3"
newline
bitfld.quad 0x00 0. "NS,Secure mode " "Secure,Non-secure"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,Asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
group.quad spr:0x30510++0x00
line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Registers 0 (EL1)"
group.quad spr:0x30511++0x00
line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Registers 1 (EL1)"
group.quad spr:0x34510++0x00
line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Registers 0 (EL2)"
group.quad spr:0x34511++0x00
line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Registers 1 (EL2)"
group.quad spr:0x36510++0x00
line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Registers 0 (EL3)"
group.quad spr:0x36511++0x00
line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Registers 1 (EL3)"
tree.open "Exception Syndrome Registers"
if (((per.q(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x30520))&0xFC000000)==0x04000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((per.q(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x30520))&0xFC000000)==0x18000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x30520))&0xFC000000)==0x1C000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((per.q(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x30520))&0xFC000000)==0x60000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3"
newline
bitfld.quad 0x00 17.--19. "OP2,Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OP1,Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((per.q(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 15. "UNASE,Unattributable System Error" "Attributable,Unattributable"
newline
bitfld.quad 0x00 14. "UNCSE,Uncontainable System Error" "Containable,Uncontainable"
bitfld.quad 0x00 0.--1. "SES,System Error Source" "Decode,ECC,Slave,"
elif (((per.q(spr:0x30520))&0xFD000000)==0xBC000000)
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((per.q(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x30520++0x00
line.quad 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.quad 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((per.q(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x34520))&0xFC000000)==0x04000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x34520))&0xFC000000)==0x18000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x34520))&0xFC000000)==0x1C000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x34520))&0xFC000000)==0x5C000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((per.q(spr:0x34520))&0xFC000000)==0x60000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3"
newline
bitfld.quad 0x00 17.--19. "OP2,Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OP1,Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((per.q(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.quad.tbyte 0x00 0.--23. 1. "IS,Additional information about the SError interrupt"
elif (((per.q(spr:0x34520))&0xFD000000)==0xBC000000)
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((per.q(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.quad 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.q(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x34520++0x00
line.quad 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((per.q(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.q(spr:0x36520))&0xFC000000)==0x04000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.quad 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x36520))&0xFC000000)==0x18000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.quad.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.quad 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.quad 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x36520))&0xFC000000)==0x1C000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.q(spr:0x36520))&0xFC000000)==0x5C000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((per.q(spr:0x36520))&0xFC000000)==0x60000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.quad 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3"
newline
bitfld.quad 0x00 17.--19. "OP2,Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 14.--16. "OP1,Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.q(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.long 0x00 0.--24. 1. "IMPL_DEF,Implementation defined"
elif (((per.q(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((per.q(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.quad 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.quad 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.quad 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.quad 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.quad 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.quad 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.quad 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.quad 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.quad 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.quad 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.q(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.quad 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.quad 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.q(spr:0x36520))&0xFC800000)==0xB0000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.quad 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.q(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.quad.tbyte 0x00 0.--23. 1. "IS,Additional information about the SError interrupt"
elif (((per.q(spr:0x36520))&0xFD000000)==0xBC000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.quad 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((per.q(spr:0x36520))&0xFC000000)==0xF0000000)
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.quad 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.quad.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.quad spr:0x36520++0x00
line.quad 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.quad 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
tree.end
newline
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External abort type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Large physical address extension" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status bits" "Address size/0th level,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External abort type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Large physical address extension" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS[3:0],Fault Status bits" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity/on memory access,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
group.quad spr:0x30600++0x00
line.quad 0x00 "FAR_EL1,Fault Address Register (EL1)"
group.quad spr:0x34600++0x00
line.quad 0x00 "FAR_EL2,Fault Address Register (EL2)"
group.quad spr:0x36600++0x00
line.quad 0x00 "FAR_EL3,Fault Address Register (EL3)"
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting intermediate physical address"
group.quad spr:0x30C00++0x00
line.quad 0x00 "VBAR_EL1,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level"
group.quad spr:0x34C00++0x00
line.quad 0x00 "VBAR_EL2,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level"
group.quad spr:0x36C00++0x00
line.quad 0x00 "VBAR_EL3,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x8 "VBA,Base address of the exception vectors for exceptions taken in this exception level"
rgroup.quad spr:0x30C10++0x00
line.quad 0x00 "ISR_EL1,Interrupt Status Register"
bitfld.quad 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.quad 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
bitfld.quad 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.quad spr:0x36C02++0x00
line.quad 0x00 "RMR_EL3,Reset Management Register"
bitfld.quad 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.quad 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64"
rgroup.quad spr:0x36C01++0x00
line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"
hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address"
rgroup.quad spr:0x31F30++0x00
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]"
group.quad spr:0x30D01++0x00
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
group.quad spr:0x33D02++0x00
line.quad 0x00 "TPIDR_EL0,Software Thread ID registers"
group.quad spr:0x33D03++0x00
line.quad 0x00 "TPIDRRO_EL0,Software Thread ID registers"
group.quad spr:0x30D04++0x00
line.quad 0x00 "TPIDR_EL1,Software Thread ID registers"
group.quad spr:0x34D02++0x00
line.quad 0x00 "TPIDR_EL2,Software Thread ID registers"
group.quad spr:0x36D02++0x00
line.quad 0x00 "TPIDR_EL3,Software Thread ID registers"
tree.end
tree "Memory Management Unit"
group.quad spr:0x30100++0x0
line.quad 0x00 "SCTLR_EL1,Control Register (EL1)"
bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.quad 0x00 25. "EE,Exception endianess" "Little,Big"
newline
bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.quad 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianess" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x36100++0x0
line.quad 0x00 "SCTLR_EL3,Control Register (EL3)"
bitfld.quad 0x00 25. "EE,Exception endianess" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade - determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,Asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
group.quad spr:0x30200++0x00
line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x30201++0x00
line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,Reserved,Reserved"
newline
bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KB,64 KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB"
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.quad spr:0x34200++0x00
line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,Reserved,Reserved,Reserved,Reserved,Reserved"
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,16 KB,Reserved"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associatedwith translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memoryregion addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.quad spr:0x36200++0x00
line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,Reserved,Reserved,Reserved,Reserved,Reserved"
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,16 KB,Reserved"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associatedwith translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memoryregion addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.quad spr:0x34300++0x00
line.quad 0x00 "DACR32_EL2,Domain Access Control Register"
bitfld.quad 0x00 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.quad 0x00 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.quad 0x00 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device,?..."
newline
hexmask.quad 0x00 12.--43. 0x1000 "PA[43:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif ((((per.q(spr:0x30740))&0x01)==0x00)&&(((per.q(spr:0x30740))&0xF000000000000000)==(0x1000000000000000||0x2000000000000000||0x3000000000000000||0x5000000000000000||0x6000000000000000||0x7000000000000000)))
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
newline
hexmask.quad 0x00 12.--43. 0x1000 "PA[43:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif (((per.q(spr:0x30740))&0x01)==0x00)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
newline
hexmask.quad 0x00 12.--47. 0x1000 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
newline
bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
newline
bitfld.quad 0x00 1.--6. "FST,Fault Status Field" "TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation fault/1st level,Translation fault/2nd level,Translation fault/3rd level,Reserved,Access flag fault/1st level,Access flag fault/2nd level,Access flag fault/3rd level,Reserved,Permission fault/1st level,Permission fault/2nd level,Permission fault/3rd level,Synchronous external abort,Reserved,Reserved,Reserved,Reserved,Synchronous external abort on translation table walk/1st level,Synchronous external abort on translation table walk/2nd level,Synchronous external abort on translation table walk/3rd level,Synchronous parity error on memory access,Reserved,Reserved,Reserved,Reserved,Synchronous parity error on memory access on translation table walk/1st level,Synchronous parity error on memory access on translation table walk/2nd level,Synchronous parity error on memory access on translation table walk/3rd level,Reserved,Alignment fault,Debug event,?..."
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
tree.open "Memory Attribute Indirection Registers"
group.quad spr:0x30A20++0x00
line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x34A20++0x00
line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.quad spr:0x36A20++0x00
line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
tree.end
newline
group.quad spr:0x30D01++0x00
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
tree.end
tree "Virtualization Extensions"
group.quad spr:0x34000++0x0
line.quad 0x00 "VPIDR_EL2,Virtualization Processor ID Register"
group.quad spr:0x34005++0x00
line.quad 0x00 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1"
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.quad 0x00 12. "I,Instruction cache enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 data cache disable" "No,Yes"
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,AArch64"
newline
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.quad 0x00 28. "TDZ,Traps DC ZVA instruction" "Disabled,Enabled"
bitfld.quad 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
newline
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
bitfld.quad 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
newline
bitfld.quad 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
newline
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
bitfld.quad 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort" "Not aborted,Aborted"
newline
bitfld.quad 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed"
newline
bitfld.quad 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed"
bitfld.quad 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed"
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
bitfld.quad 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
group.quad spr:0x34111++0x00
line.quad 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
bitfld.quad 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.quad 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
bitfld.quad 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
newline
bitfld.quad 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
bitfld.quad 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.quad 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.quad 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.quad 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.quad spr:0x36131++0x00
line.quad 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)"
bitfld.quad 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.quad 0x00 20. "EDAD,External debugger access to breakpoint and watchpointregisters disabled" "No,Yes"
bitfld.quad 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes"
bitfld.quad 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
bitfld.quad 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.quad 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.quad 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
group.quad spr:0x34112++0x00
line.quad 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)"
bitfld.quad 0x00 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad spr:0x36112++0x00
line.quad 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)"
bitfld.quad 0x00 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad spr:0x34113++0x00
line.quad 0x00 "HSTR_EL2,Hypervisor System Trap Register"
bitfld.quad 0x00 16. "TTEE,Trap T32EE" "Disabled,Enabled"
bitfld.quad 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "No effect,Trap"
bitfld.quad 0x00 13. "T13,Trap to Hypervisor mode Non-secure priv 13" "No effect,Trap"
newline
bitfld.quad 0x00 12. "T12,Trap to Hypervisor mode Non-secure priv 12" "No effect,Trap"
bitfld.quad 0x00 11. "T11,Trap to Hypervisor mode Non-secure priv 11" "No effect,Trap"
bitfld.quad 0x00 10. "T10,Trap to Hypervisor mode Non-secure priv 10" "No effect,Trap"
newline
bitfld.quad 0x00 9. "T9,Trap to Hypervisor mode Non-secure priv 9" "No effect,Trap"
bitfld.quad 0x00 8. "T8,Trap to Hypervisor mode Non-secure priv 8" "No effect,Trap"
bitfld.quad 0x00 7. "T7,Trap to Hypervisor mode Non-secure priv 7" "No effect,Trap"
newline
bitfld.quad 0x00 6. "T6,Trap to Hypervisor mode Non-secure priv 6" "No effect,Trap"
bitfld.quad 0x00 5. "T5,Trap to Hypervisor mode Non-secure priv 5" "No effect,Trap"
bitfld.quad 0x00 4. "T4,Trap to Hypervisor mode Non-secure priv 4" "No effect,Trap"
newline
bitfld.quad 0x00 3. "T3,Trap to Hypervisor mode Non-secure priv 3" "No effect,Trap"
bitfld.quad 0x00 2. "T2,Trap to Hypervisor mode Non-secure priv 2" "No effect,Trap"
bitfld.quad 0x00 1. "T1,Trap to Hypervisor mode Non-secure priv 1" "No effect,Trap"
newline
bitfld.quad 0x00 0. "T0,Trap to Hypervisor mode Non-secure priv 0" "No effect,Trap"
group.quad spr:0x34210++0x00
line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (((per.q(spr:0x34212))&0xC000)==0x0000)
group.quad spr:0x34212++0x00
line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.quad 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..."
bitfld.quad 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,16 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Outer Shareable,Inner Shareable,?..."
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Normal/Non-cacheable,Normal/Write-Back Write-Allocate,Normal/Write-Through,Normal/Write-Back no Write-Allocate"
bitfld.quad 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Normal/Non-cacheable,Normal/Write-Back Write-Allocate,Normal/Write-Through,Normal/Write-Back no Write-Allocate"
bitfld.quad 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "Level 2,Level 1,Level 0,?..."
newline
bitfld.quad 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
group.quad spr:0x34212++0x00
line.quad 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.quad 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..."
bitfld.quad 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,16 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Outer Shareable,Inner Shareable,?..."
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Normal/Non-cacheable,Normal/Write-Back Write-Allocate,Normal/Write-Through,Normal/Write-Back no Write-Allocate"
bitfld.quad 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Normal/Non-cacheable,Normal/Write-Back Write-Allocate,Normal/Write-Through,Normal/Write-Back no Write-Allocate"
bitfld.quad 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "Level 3,Level 2,Level 1,?..."
newline
bitfld.quad 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x30600++0x00
line.quad 0x00 "FAR_EL1,Fault Address Register (EL1)"
group.quad spr:0x34600++0x00
line.quad 0x00 "FAR_EL2,Fault Address Register (EL2)"
group.quad spr:0x36600++0x00
line.quad 0x00 "FAR_EL3,Fault Address Register (EL3)"
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting intermediate physical address"
tree.end
tree "Cache Control and Configuration"
rgroup.quad spr:0x33001++0x00
line.quad 0x00 "CTR_EL0,CTR_EL0"
bitfld.quad 0x0 29.--31. "FORMAT,Format" "Reserved,Reserved,Reserved,Reserved,ARMv7,?..."
bitfld.quad 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.quad 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.quad 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.quad 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,Physical"
bitfld.quad 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,8 words,16 words,?..."
group.quad spr:0x32000++0x0
line.quad 0x00 "CSSELR_EL1,Cache Size Selection Register"
bitfld.quad 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.quad 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
rgroup.quad spr:0x31001++0x0
line.quad 0x00 "CLIDR_EL1,Cache Level ID Register"
bitfld.quad 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.quad 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
bitfld.quad 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
newline
bitfld.quad 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
bitfld.quad 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.quad 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.quad 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.quad 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.quad 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.quad 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate,?..."
rgroup.quad spr:0x31000++0x0
line.quad 0x00 "CCSIDR_EL1,Current Cache Size ID Register"
bitfld.quad 0x00 31. "WT,Write-Through" "Not Supported,Supported"
bitfld.quad 0x00 30. "WB,Write-Back" "Not Supported,Supported"
bitfld.quad 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
newline
bitfld.quad 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
hexmask.quad.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
hexmask.quad.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.quad 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32bytes,64 bytes,128 bytes,?..."
tree "Level 1 memory system"
group.quad spr:0x30F10++0x00
line.quad 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register"
group.quad spr:0x30F11++0x00
line.quad 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register"
group.quad spr:0x30F12++0x00
line.quad 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register"
group.quad spr:0x30F13++0x00
line.quad 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register"
group.quad spr:0x30F14++0x00
line.quad 0x00 "DL1DATA4_EL1,Data L1 Data 3 Register"
group.quad spr:0x30F00++0x00
line.quad 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register"
group.quad spr:0x30F01++0x00
line.quad 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register"
group.quad spr:0x30F02++0x00
line.quad 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register"
group.quad spr:0x30F03++0x00
line.quad 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register"
tree.end
tree "Level 2 memory system"
group.quad spr:0x31B02++0x0
line.quad 0x00 "L2CTLR_EL1,L2 Control Register"
bitfld.quad 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "Reset,No reset"
bitfld.quad 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
rbitfld.quad 0x00 23. "L2CP,L2 cache ECC protection" "Not supported,Supported"
newline
rbitfld.quad 0x00 22. "L1CECCPP,L1 Cache ECC and Parity protection" "Not supported,Supported"
bitfld.quad 0x00 21. "ECCPPEN,ECC and parity enable" "Disabled,Enabled"
bitfld.quad 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled"
newline
rbitfld.quad 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present"
rbitfld.quad 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present"
rbitfld.quad 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1 present,2 present,?..."
newline
bitfld.quad 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
bitfld.quad 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
rbitfld.quad 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle"
newline
bitfld.quad 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,6 cycles,6 cycles"
group.quad spr:0x31B03++0x0
line.quad 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
bitfld.quad 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.quad 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.quad 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad spr:0x31F00++0x00
line.quad 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
bitfld.quad 0x00 30.--31. "L2PLRUIP,Select the L2 PLRU insertion point" "MRU/LRU,MRU,3/4 LRU,LRU"
bitfld.quad 0x00 29. "L2RPLCPOL,Select the L2 cache replacement policy" "PLRU,Pseudo random"
bitfld.quad 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 26. "FL2GICRCGEA,Force L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
bitfld.quad 0x00 25. "ESIAA,Enable single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
newline
bitfld.quad 0x00 24. "L2PLRUMD,Disable PLRU dynamic insertion and update policy" "No,Yes"
bitfld.quad 0x00 23. "DACPMUWLUT,Disable ACP MakeUnique and WriteLineUnique transactions" "No,Yes"
bitfld.quad 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.quad 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
bitfld.quad 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
bitfld.quad 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.quad 0x00 14. "EUCE,Enable UniqueClean evictions with data" "Disabled,Enabled"
bitfld.quad 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
newline
bitfld.quad 0x00 12. "DPSHO,Disable set hazard optimization against prefetch entries" "No,Yes"
bitfld.quad 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
bitfld.quad 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
newline
bitfld.quad 0x00 9. "DWHOBBRRQ,Disable set/way hazard optimization on back to back reads from the same CPU targeting the same set" "No,Yes"
bitfld.quad 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
bitfld.quad 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
bitfld.quad 0x00 5. "DSWHOWWM,Disables set/way hazard optimization for WBNA/WT memory" "No,Yes"
bitfld.quad 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "DCEPTE,Disable clean/evict push to external" "No,Yes"
bitfld.quad 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
bitfld.quad 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad spr:0x31F23++0x00
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
tree.end
tree.end
tree "System Performance Monitor"
group.quad spr:0x339C0++0x00
line.quad 0x00 "PMCR_EL0,Performance Monitor Control Register"
hexmask.quad.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.quad.byte 0x00 16.--23. 1. "IDCODE,Identification code"
rbitfld.quad 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
bitfld.quad 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.quad 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.quad 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.quad 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.quad 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
group.quad spr:0x339C1++0x00
line.quad 0x00 "PMCNTENSET_EL0,Count Enable Set Register "
bitfld.quad 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.quad 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
bitfld.quad 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
bitfld.quad 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.quad 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.quad spr:0x339C2++0x00
line.quad 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register"
bitfld.quad 0x00 31. "C,PMCCNTR enable" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x339C3++0x00
line.quad 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register"
bitfld.quad 0x00 31. "C,PMCCNTR overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 5. "P5,Event Counter 5 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 4. "P4,Event Counter 4 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 3. "P3,Event Counter 3 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 2. "P2,Event Counter 2 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 1. "P1,Event Counter 1 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 0. "P0,Event Counter 0 overflow clear bit [Read/Write]" "No overflow/No effect,Overflow/Clear"
wgroup.quad spr:0x339C4++0x00
line.quad 0x00 "PMSWINC_EL0,Performance Monitors Software Increment Register"
bitfld.quad 0x00 5. "P5,Increment  PMN5" "No action,Increment"
bitfld.quad 0x00 4. "P4,Increment  PMN4" "No action,Increment"
bitfld.quad 0x00 3. "P3,Increment  PMN3" "No action,Increment"
newline
bitfld.quad 0x00 2. "P2,Increment  PMN2" "No action,Increment"
bitfld.quad 0x00 1. "P1,Increment  PMN1" "No action,Increment"
bitfld.quad 0x00 0. "P0,Increment  PMN0" "No action,Increment"
group.quad spr:0x339C5++0x00
line.quad 0x00 "PMSELR_EL0,Performance Monitor Select Register"
bitfld.quad 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,%d..."
tree.open "Common Event Identification Registers"
group.quad spr:0x339c6++0x00
line.quad 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.quad 0x00 30. "CH,Chain" "Not implemented,Implemented"
newline
bitfld.quad 0x00 29. "BC,Bus cycle" "Not implemented,Implemented"
bitfld.quad 0x00 28. "TW,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.quad 0x00 27. "IS,Instruction speculatively executed" "Not implemented,Implemented"
newline
bitfld.quad 0x00 26. "ME,Local memory error" "Not implemented,Implemented"
bitfld.quad 0x00 25. "BA,Bus access" "Not implemented,Implemented"
bitfld.quad 0x00 24. "DC2W,Level 2 data cache write-back" "Not implemented,Implemented"
newline
bitfld.quad 0x00 23. "DC2R,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.quad 0x00 22. "DC2A,Level 2 data cache access" "Not implemented,Implemented"
bitfld.quad 0x00 21. "DC1W,Level 1 data cache write-back" "Not implemented,Implemented"
newline
bitfld.quad 0x00 20. "IC1A,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.quad 0x00 19. "MA,Data memory access" "Not implemented,Implemented"
bitfld.quad 0x00 18. "BP,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.quad 0x00 17. "CC,Cycle" "Not implemented,Implemented"
bitfld.quad 0x00 16. "BM,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.quad 0x00 15. "UL,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
newline
bitfld.quad 0x00 14. "BR,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.quad 0x00 13. "BI,Instruction architecturally executed immediate branch" "Not implemented,Implemented"
bitfld.quad 0x00 12. "PW,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
newline
bitfld.quad 0x00 11. "CW,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.quad 0x00 10. "ER,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.quad 0x00 9. "ET,Exception taken" "Not implemented,Implemented"
newline
bitfld.quad 0x00 8. "IA,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.quad 0x00 7. "ST,Instruction architecturally executed condition check pass store" "Not implemented,Implemented"
bitfld.quad 0x00 6. "LD,Instruction architecturally executed condition check pass load" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "DT1R,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.quad 0x00 4. "DC1A,Level 1 data cache access" "Not implemented,Implemented"
bitfld.quad 0x00 3. "DC1R,Level 1 data cache refill" "Not implemented,Implemented"
newline
bitfld.quad 0x00 2. "IT1R,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.quad 0x00 1. "IC1R,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.quad 0x00 0. "SI,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
tree.end
newline
group.quad spr:0x339D0++0x00
line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register"
group.quad spr:0x339D1++0x00
line.quad 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register"
group.quad spr:0x339D2++0x00
line.quad 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register"
group.quad spr:0x339E0++0x00
line.quad 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register"
bitfld.quad 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.quad spr:0x309E1++0x00
line.quad 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set"
bitfld.quad 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.quad spr:0x309E2++0x00
line.quad 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear"
eventfld.long 0x00 31. "C,PMCCNTR enable [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00  5. "P5,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00  4. "P4,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00  3. "P3,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00  2. "P2,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00  1. "P1,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00  0. "P0,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.quad spr:0x339E3++0x00
line.quad 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register"
group.quad spr:(0x33E80+0x0)++0x00
line.quad 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0"
group.quad spr:(0x33EC0+0x0)++0x00
line.quad 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:(0x33E80+0x1)++0x00
line.quad 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1"
group.quad spr:(0x33EC0+0x1)++0x00
line.quad 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:(0x33E80+0x2)++0x00
line.quad 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2"
group.quad spr:(0x33EC0+0x2)++0x00
line.quad 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:(0x33E80+0x3)++0x00
line.quad 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3"
group.quad spr:(0x33EC0+0x3)++0x00
line.quad 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:(0x33E80+0x4)++0x00
line.quad 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4"
group.quad spr:(0x33EC0+0x4)++0x00
line.quad 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:(0x33E80+0x5)++0x00
line.quad 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5"
group.quad spr:(0x33EC0+0x5)++0x00
line.quad 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
newline
hexmask.quad.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad spr:0x33EF7++0x00
line.quad 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register"
bitfld.quad 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.quad 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.quad 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.quad 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.quad spr:0x33E00++0x00
line.quad 0x00 "CNTFRQ_EL0,Counter Frequency Register"
rgroup.quad spr:0x33E01++0x00
line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register"
group.quad spr:0x30E10++0x00
line.quad 0x00 "CNTKCTL_EL1,Timer PL1 Control Register"
bitfld.quad 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.quad 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.quad 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.quad 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad spr:0x33E20++0x00
line.quad 0x00 "CNTP_TVAL_EL0,Counter PL1 Physical Compare Value Register"
group.quad spr:0x33E21++0x00
line.quad 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register"
bitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E30++0x00
line.quad 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register"
group.quad spr:0x33E31++0x00
line.quad 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register"
bitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E02++0x00
line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register"
group.quad spr:0x33E22++0x00
line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register"
group.quad spr:0x33E32++0x00
line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register"
group.quad spr:0x34E03++0x00
line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register"
group.quad spr:0x34E10++0x00
line.quad 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register"
bitfld.quad 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.quad 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.quad 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad spr:0x34E20++0x00
line.quad 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register"
group.quad spr:0x34E21++0x00
line.quad 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register"
bitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x34E22++0x00
line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register"
group.quad spr:0x37E20++0x00
line.quad 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register"
group.quad spr:0x37E21++0x00
line.quad 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register"
bitfld.quad 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.quad 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x37E22++0x00
line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch64 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.quad spr:0x30C84++0x00
line.quad 0x00 "ICC_AP0R0_EL1,Active Priorities 0 Register 0"
bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x30C90++0x00
line.quad 0x00 "ICC_AP1R0_EL1,Active Priorities 1 Register 0"
bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Alternate SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.quad spr:0x30C83++0x00
line.quad 0x00 "ICC_BPR0_EL1,Binary Point Register 0"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.quad spr:0x30CC3++0x00
line.quad 0x00 "ICC_BPR1_EL1,Binary Point Register 1"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.quad spr:0x30CC4++0x00
line.quad 0x00 "ICC_CTLR_EL1,Interrupt Control Registers for EL1"
rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Not supported,Supported"
rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.quad 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
bitfld.quad 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
bitfld.quad 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
newline
bitfld.quad 0x00 0. "CBPR,Common Binary Point Register" "0,1"
group.quad spr:0x36CC4++0x00
line.quad 0x00 "ICC_CTLR_EL3,Interrupt Control Registers for EL3"
rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Not supported,Supported"
rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
newline
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.quad 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
bitfld.quad 0x00 11.--13. "IDBITS,Number of physical interruptidentifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "RM,Routing Modifier" "Normal,Special values"
newline
bitfld.quad 0x00 4. "EOIMODE_EL1NS,EOI mode for interrupts handledat non-secure EL1 and EL2" "0,1"
bitfld.quad 0x00 3. "EOIMODE_EL1S,EOI mode for interrupts handled at secure EL1" "0,1"
bitfld.quad 0x00 2. "EOIMODE_EL3,EOI mode for interrupts handled at EL3" "0,1"
newline
bitfld.quad 0x00 1. "CBPR_EL1NS,Non-secure accesses to GICC_BPR allowed." "Not allowed,Allowed"
bitfld.quad 0x00 0. "CBPR_EL1S,Secure EL1 accesses to ICC_BPR1 allowed" "Not allowed,Allowed"
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Deactivate Interrupt Register"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,End Of Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0_EL1 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,End Of Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1_EL1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Highest Priority Pending Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Highest Priority Pending Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt"
hgroup.quad spr:0x30C80++0x00
hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
in
hgroup.quad spr:0x30CC0++0x00
hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
in
newline
group.quad spr:0x30CC6++0x00
line.quad 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0"
bitfld.quad 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad spr:0x30CC7++0x00
line.quad 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)"
bitfld.quad 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad spr:0x36CC7++0x00
line.quad 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)"
bitfld.quad 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.quad 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
group.quad spr:0x30460++0x00
line.quad 0x00 "ICC_PMR_EL1,Priority Mask Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.quad spr:0x30CB3++0x00
line.quad 0x00 "ICC_RPR_EL1,Running Priority Register"
hexmask.quad.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,SGI Generation Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.quad spr:0x30CC5++0x00
line.quad 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad spr:0x34C95++0x00
line.quad 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2"
bitfld.quad 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad spr:0x36CC5++0x00
line.quad 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3"
bitfld.quad 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.quad 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.quad 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.quad 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
tree.end
tree "AArch64 Virtual Interface Control System Registers"
group.quad spr:0x34C80++0x00
line.quad 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Register 0-0"
rgroup.quad spr:0x34CB3++0x00
line.quad 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register"
bitfld.quad 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.quad 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.quad spr:0x34CB5++0x00
line.quad 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register"
bitfld.quad 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.quad 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.quad 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.quad 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.quad spr:0x34CB0++0x00
line.quad 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register"
bitfld.quad 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.quad 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.quad 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.quad 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.quad 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
if (((per.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((per.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
rgroup.quad spr:0x34CB2++0x00
line.quad 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register"
bitfld.quad 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.quad 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.quad 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.quad 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.quad 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.quad 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.quad 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.quad 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.quad spr:0x34CB7++0x00
line.quad 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register"
hexmask.quad.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.quad 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.quad 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.quad 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.quad 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.quad 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.quad 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.quad 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.quad 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.quad spr:0x34C94++0x00
line.quad 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register"
rgroup.quad spr:0x34CB1++0x00
line.quad 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register"
bitfld.quad 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.quad 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.quad 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.quad 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.quad 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.quad 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
rgroup.quad spr:0x23010++0x00
line.quad 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register"
bitfld.quad 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.quad 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
group.quad spr:0x20020++0x00
line.quad 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable Register"
bitfld.quad 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled"
bitfld.quad 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled"
group.quad spr:0x23040++0x00
line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
hexmask.quad.long 0x00 32.--63. 1. "HW,HighWord - Write/read DTRRX/DTRTX value without changing RXfull/TXfull"
hexmask.quad.long 0x00 0.--31. 1. "LW,LowWord - Write/read DTRTX/DTRRX value without changing TXfull/RXfull"
hgroup.quad spr:0x23050++0x00
hide.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"
in
wgroup.quad spr:0x23050++0x00
line.quad 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"
group.quad spr:0x24070++0x00
line.quad 0x00 "DBGVCR32_EL2,Vector Catch Register"
bitfld.quad 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Disabled,Enabled"
bitfld.quad 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Disabled,Enabled"
bitfld.quad 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Disabled,Enabled"
bitfld.quad 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Disabled,Enabled"
bitfld.quad 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "SF,FIQ vector catch enable in Secure state" "Disabled,Enabled"
bitfld.quad 0x00 6. "SI,IRQ vector catch enable in Secure state" "Disabled,Enabled"
bitfld.quad 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Disabled,Enabled"
bitfld.quad 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Disabled,Enabled"
bitfld.quad 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Disabled,Enabled"
group.quad spr:0x20002++0x00
line.quad 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
if (((per.q(spr:0x20114)&0x02)==0x00))
group.quad spr:0x20022++0x00
line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
rbitfld.quad 0x00 30. "RXFULL,Save/restore of EDSCR.RXfull" "Empty,Full"
rbitfld.quad 0x00 29. "TXFULL,Save/restore of EDSCR.TXfull" "Empty,Full"
newline
rbitfld.quad 0x00 27. "RXO,Save/restore of EDSCR.RXO" "Low,High"
rbitfld.quad 0x00 26. "TXU,Save/restore of EDSCR.TXU" "Low,High"
newline
rbitfld.quad 0x00 22.--23. "INTDIS,Save/restore of EDSCR.INTdis" "0,1,2,3"
rbitfld.quad 0x00 21. "TDA,Save/restore of EDSCR.TDA" "Low,High"
newline
bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
rbitfld.quad 0x00 14. "HDE,Save/restore of EDSCR.HDE" "Low,High"
newline
bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.quad 0x00 12. "TDCC,Traps EL0 accesses to the DCC registers to EL1" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "ERR,Save/restore of EDSCR.ERR" "Low,High"
bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled"
else
group.quad spr:0x20022++0x00
line.quad 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
bitfld.quad 0x00 30. "RXFULL,Save/restore of EDSCR.RXfull" "Empty,Full"
bitfld.quad 0x00 29. "TXFULL,Save/restore of EDSCR.TXfull" "Empty,Full"
newline
bitfld.quad 0x00 27. "RXO,Save/restore of EDSCR.RXO" "Low,High"
bitfld.quad 0x00 26. "TXU,Save/restore of EDSCR.TXU" "Low,High"
newline
bitfld.quad 0x00 22.--23. "INTDIS,Save/restore of EDSCR.INTdis" "0,1,2,3"
bitfld.quad 0x00 21. "TDA,Save/restore of EDSCR.TDA" "Low,High"
newline
bitfld.quad 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
bitfld.quad 0x00 14. "HDE,Save/restore of EDSCR.HDE" "Low,High"
newline
bitfld.quad 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.quad 0x00 12. "TDCC,Traps EL0 accesses to the DCC registers to EL1" "Disabled,Enabled"
newline
bitfld.quad 0x00 6. "ERR,Save/restore of EDSCR.ERR" "Low,High"
bitfld.quad 0x00 0. "SS,Software step control" "Disabled,Enabled"
endif
group.quad spr:0x20032++0x00
line.quad 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
group.quad spr:0x20062++0x00
line.quad 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
rgroup.quad spr:0x20100++0x00
line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
hexmask.quad 0x00 12.--43. 0x10 "ROMADDR,ROM base physical address"
bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid"
wgroup.quad spr:0x20104++0x00
line.quad 0x00 "OSLAR_EL1,OS Lock Access Register"
bitfld.quad 0x00 0. "OSLK,OS lock" "Unlock,Lock"
rgroup.quad spr:0x20114++0x00
line.quad 0x00 "OSLSR_EL1,OS Lock Status Register"
bitfld.quad 0x00 2. "NTT,Not 32-bit access" "Low,High"
bitfld.quad 0x00 1. "OSLK,OS lock status" "Not locked,Locked"
bitfld.quad 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Implemented,?..."
group.quad spr:0x20134++0x00
line.quad 0x00 "OSDLR_EL1,OS Double-lock Register"
bitfld.quad 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
group.quad spr:0x20144++0x00
line.quad 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
bitfld.quad 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes"
group.quad spr:0x20786++0x00
line.quad 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set"
bitfld.quad 0x00 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.quad 0x00 6. "CT6,Claim Tag 6 Set" "Not set,Set"
newline
bitfld.quad 0x00 5. "CT5,Claim Tag 5 Set" "Not set,Set"
bitfld.quad 0x00 4. "CT4,Claim Tag 4 Set" "Not set,Set"
newline
bitfld.quad 0x00 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.quad 0x00 2. "CT2,Claim Tag 2 Set" "Not set,Set"
newline
bitfld.quad 0x00 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.quad 0x00 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.quad spr:0x20796++0x00
line.quad 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear"
bitfld.quad 0x00 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
newline
bitfld.quad 0x00 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
newline
bitfld.quad 0x00 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
newline
bitfld.quad 0x00 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.quad 0x00 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
if (((per.q(spr:0x207e6))&0xAA)==0xAA)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0xA8)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0xA2)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0xA0)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x8A)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x88)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x82)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x80)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x2A)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x28)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x22)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x20)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x0A)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x08)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.q(spr:0x207e6))&0xAA)==0x02)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.quad 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.q(spr:0x207e6))&0xAA)==0x00)
rgroup.quad spr:0x207e6++0x00
line.quad 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.quad 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.quad 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
endif
group.quad spr:0x33450++0x00
line.quad 0x00 "DSPSR_EL0,Debug Saved Processor Status Register"
group.quad spr:0x33451++0x00
line.quad 0x00 "DLR_EL0,Debug Link Register"
tree.end
tree "Breakpoint Registers"
tree "Breakpoint 0"
if (((per.q(spr:(0x20005+0x0)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x0)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x0)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x0)++0x00
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x0))&0x400000)==0x400000)
group.quad spr:(0x20005+0x0)++0x0
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x0))&0x800000)==0x800000)
group.quad spr:(0x20005+0x0)++0x0
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x0)++0x0
line.quad 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 1"
if (((per.q(spr:(0x20005+0x10)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x10)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x10)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x10)++0x00
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x10))&0x400000)==0x400000)
group.quad spr:(0x20005+0x10)++0x0
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x10))&0x800000)==0x800000)
group.quad spr:(0x20005+0x10)++0x0
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x10)++0x0
line.quad 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 2"
if (((per.q(spr:(0x20005+0x20)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x20)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x20)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x20)++0x00
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x20))&0x400000)==0x400000)
group.quad spr:(0x20005+0x20)++0x0
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x20))&0x800000)==0x800000)
group.quad spr:(0x20005+0x20)++0x0
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x20)++0x0
line.quad 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 3"
if (((per.q(spr:(0x20005+0x30)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x30)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x30)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x30)++0x00
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x30))&0x400000)==0x400000)
group.quad spr:(0x20005+0x30)++0x0
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x30))&0x800000)==0x800000)
group.quad spr:(0x20005+0x30)++0x0
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x30)++0x0
line.quad 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 4"
if (((per.q(spr:(0x20005+0x40)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x40)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x40)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x40)++0x00
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x40))&0x400000)==0x400000)
group.quad spr:(0x20005+0x40)++0x0
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x40))&0x800000)==0x800000)
group.quad spr:(0x20005+0x40)++0x0
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x40)++0x0
line.quad 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree "Breakpoint 5"
if (((per.q(spr:(0x20005+0x50)))&0xA00000)==0x000000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.q(spr:(0x20005+0x50)))&0xA00000)==0x800000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
elif (((per.q(spr:(0x20005+0x50)))&0xA00000)==0x200000)
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
else
group.quad spr:(0x20004+0x50)++0x00
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
if (((per.q(spr:0x20005+0x50))&0x400000)==0x400000)
group.quad spr:(0x20005+0x50)++0x0
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,Reserved,Reserved"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
elif (((per.q(spr:0x20005+0x50))&0x800000)==0x800000)
group.quad spr:(0x20005+0x50)++0x0
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Reserved"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
else
group.quad spr:(0x20005+0x50)++0x0
line.quad 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.quad 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.quad 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.quad 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.quad 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.quad 0x00 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.quad 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
endif
tree.end
tree.end
tree "Watchpoint Control Registers"
tree "Watchpoint 0"
group.quad spr:(0x20006+0x0)++0x00
line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 1"
group.quad spr:(0x20006+0x10)++0x00
line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 2"
group.quad spr:(0x20006+0x20)++0x00
line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 3"
group.quad spr:(0x20006+0x30)++0x00
line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x00 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree.end
tree.end
tree.open "AArch32"
tree "ID Registers"
rgroup.long c15:0x0000++0x00
line.long 0x00 "MIDR,Main ID Register"
hexmask.long.byte 0x00 24.--31. 1. "IMPL,Implementer code"
bitfld.long 0x00 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8"
newline
hexmask.long.word 0x00 4.--15. 1. "PART,Primary Part Number"
bitfld.long 0x00 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c15:0x0100++0x00
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x00 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x00 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
rgroup.long c15:0x0300++0x00
line.long 0x00 "TLBTR,TLB Type Register"
bitfld.long 0x00 0. "NU,Not Unified. Indicates whether the implementation has a unified TLB" "Unified,"
rgroup.long c15:0x0500++0x00
line.long 0x00 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,Uniprocessor"
newline
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largery independent,Very interdependent"
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
bitfld.long 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4"
rgroup.long c15:0x0600++0x00
line.long 0x00 "REVIDR,Revision ID Register"
rgroup.long c15:0x0410++0x00
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Reserved,ACTLR/AIFSR/ADFSR,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0510++0x00
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Reserved,Reserved,Not required,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.long c15:0x0610++0x00
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.long c15:0x0710++0x00
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.long c15:0x0620++0x00
line.long 0x00 "ID_MMFR4,ID_MMFR4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
rgroup.long c15:0x0020++0x00
line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.long c15:0x0120++0x00
line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0220++0x00
line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0320++0x00
line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0420++0x00
line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0520++0x00
line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.long c15:0x0110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,PMUv3,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
rgroup.long c15:0x6C9++0x00
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 30. "CH,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "BC,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "TW,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
newline
bitfld.long 0x00 27. "IS,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "ME,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "BA,Bus access" "Not implemented,Implemented"
newline
bitfld.long 0x00 24. "DC2W,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 23. "DC2R,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "DC2A,Level 2 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 21. "DC1W,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 20. "IC1A,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "MA,Data memory access" "Not implemented,Implemented"
newline
bitfld.long 0x00 18. "BP,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 17. "CC,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "BM,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 15. "UL,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "BR,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "BI,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
newline
bitfld.long 0x00 12. "PW,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "CW,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "ER,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
newline
bitfld.long 0x00 9. "ET,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "IA,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "ST,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
newline
bitfld.long 0x00 6. "LD,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
bitfld.long 0x00 5. "DT1R,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "DC1A,Level 1 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "DC1R,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 2. "IT1R,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "IC1R,Level 1 instruction cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "SI,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
tree.end
tree "System Control and Configuration"
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x0001++0x00
line.long 0x00 "SCTLR,Control Register"
bitfld.long 0x00 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x00 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x00 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x00 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x00 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
else
group.long c15:0x0001++0x00
line.long 0x00 "SCTLR,Control Register"
bitfld.long 0x00 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x00 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x00 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x00 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
endif
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPMRCGEA,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 62. "FPNMRCGEA,Force processor non-memory-system RCG enables active" "Not forced,Forced"
newline
bitfld.quad 0x00 61. "FPDIERCGEA,Force processor Decode and Integer Execute idle RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 60. "FPDRCGEA,Force processor Dispatch idle RCG enables active" "Not forced,Forced"
newline
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
newline
bitfld.quad 0x00 57. "TA,Treat DMB st/st and DMB ld/allas DMB all/all" "Disabled,Enabled"
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
newline
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
newline
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
newline
bitfld.quad 0x00 51. "ECDAFEMP,Enable contention detection and fast exclusive monitor path" "Disabled,Enabled"
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
newline
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
newline
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
bitfld.quad 0x00 46. "DML1DTLBM,Disable multiple outstanding L1 Data TLB misses and L2 TLB hit under miss" "No,Yes"
newline
bitfld.quad 0x00 45. "Dl1DCWT,Disable L1-DCache way tracker" "No,Yes"
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
newline
bitfld.quad 0x00 43. "DVABHWPREF,Disable the Load/Store hardware prefetcher from using VA to cross page boundaries" "No,Yes"
bitfld.quad 0x00 42. "DPREFREQRUT,Disable prefetch requests from ReadUnique transactions" "No,Yes"
newline
bitfld.quad 0x00 41. "ESHWSHAEP,Enable snoop hazard while waiting for second half of atomic exclusive pair" "Disabled,Enabled"
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
newline
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
newline
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
newline
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
newline
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
newline
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
newline
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
newline
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
newline
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad c15:0x110F0++0x01
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 requests,1 request,2 requests,3 requests"
newline
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "16 requests,18 requests,20 requests,22 requests"
bitfld.quad 0x00 6. "SMPEN,Enables the processor to receive instruction cache and TLB maintenance operations broadcast from other processors in the cluster" "Disabled,Enabled"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad c15:0x120F0++0x01
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,Indicates the index address of the first memory error"
group.long c15:0x0101++0x00
line.long 0x00 "ACTLR,Auxiliary Control Register"
group.long c15:0x0201++0x00
line.long 0x00 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x00 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x00 28. "TRCDIS,Disable CP14 access to trace registers" "No,"
newline
bitfld.long 0x00 22.--23. "CP11,Coprocesor access control" "Denied,EL1 or higher,Reserved,Full"
bitfld.long 0x00 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
group.long c15:0x0011++0x00
line.long 0x00 "SCR,Secure Configuration Register"
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "Disabled,Enabled"
newline
bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes"
bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
newline
bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
bitfld.long 0x00 3. "EA,External Abort exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
newline
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure"
group.long c15:0x0111++0x00
line.long 0x00 "SDER,Secure Debug Enable Register"
bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted"
group.long c15:0x0131++0x00
line.long 0x00 "SDCR,Secure Debug Control Register"
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
newline
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
group.long c15:0x0211++0x00
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
newline
bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
group.long c15:0x010C++0x00
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
rgroup.long c15:0x001C++0x00
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
newline
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.long c15:0x020C++0x00
line.long 0x00 "RMR,Reset Management Register"
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"
rgroup.long c15:0x0015++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
rgroup.long c15:0x0115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status bits" "Address size/0th level,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
bitfld.long 0x00 0.--3. 10. "FS[3:0],Fault Status bits" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity/on memory access,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Short,Long"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status bits" "Address size/0th level,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Short,Long"
newline
bitfld.long 0x00 0.--3. 10. "FS[3:0],Fault Status bits" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity/on memory access,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
group.long c15:0x0006++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
group.long c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
rgroup.long c15:0x103F++0x00
line.long 0x00 "CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[43:32],Periphbase[43:32]"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register"
tree.end
tree "Memory Management Unit"
group.long c15:0x0001++0x00
line.long 0x00 "SCTLR,Control Register"
bitfld.long 0x00 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x00 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x00 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x00 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x00 6. "THEE,ThumbEE Enable" "Not implemented,"
bitfld.long 0x00 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "C,Cache enable" "Disabled,Enabled"
bitfld.long 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "M,MMU enable" "Disabled,Enabled"
group.long c15:0x4001++0x00
line.long 0x00 "HSCTLR,Hypervisor System Control Register"
bitfld.long 0x00 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x00 19. "WXN,Write permission implies XN" "Not forced,Forced"
bitfld.long 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x00 5. "CP15BEN,AArch32 CP15 barrier enable" "Disabled,Enabled"
bitfld.long 0x00 2. "C,Cache enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
bitfld.long 0x00 0. "M,MMU enable" "Disabled,Enabled"
if ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0002))&0x02)==0x02))
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB0,Translation table base 0 address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
newline
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
elif ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0002))&0x02)==0x00))
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB0,Translation table base 0 address"
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
else
group.quad c15:0x10020++0x01
line.quad 0x00 "TTBR0,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base 0 address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base 0 address"
endif
if ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0102))&0x02)==0x02))
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base 1 Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base 1 address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
newline
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
elif ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0102))&0x02)==0x00))
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base 1 address"
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
else
group.quad c15:0x11020++0x01
line.quad 0x00 "TTBR1,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base 0 address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base 0 address"
endif
if (((per.l(c15:0x0202))&0x80000000)==0x80000000)
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
newline
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
bitfld.long 0x00 22. "A1,Select ASID from TTBR0/TTBR1 ASID field" "TTBR0,TTBR1"
newline
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
else
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
newline
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
endif
if (((per.l(c15:0x4202))&0x07)==0x00)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 5.--47. 0x20 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x01)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 4.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x02)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 12.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x03)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 11.--47. 0x8 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x04)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 10.--47. 0x4 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x05)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 9.--47. 0x2 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x06)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 8.--47. 0x1 "BADDR,Translation table base address"
else
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 7.--47. 0x80 "BADDR,Translation table base address"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer cacheability attribute, Normal memory" "Outer Non-cacheable,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 8.--9. "IRGN0,  ,Inner cacheability attribute, Normal memory" "Inner Non-cacheable,Inner Write-Back Write-Allocate Cacheable,Inner Write-Through Cacheable,Inner Write-Back no Write-Allocate Cacheable"
hexmask.long.byte 0x00 0.--2. 0x1 "T0SZ, ,Size offset of the memory region addressed by HTTBR"
group.long c15:0x0003++0x00
line.long 0x00 "DACR,Domain Access Control Register"
bitfld.long 0x00 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x00 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x00 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0047))&0x1)==0x0))
group.long c15:0x0047++0x00
line.long 0x00 "PAR,Physical Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 "PA,Physical Address"
newline
bitfld.long 0x00 11. "LPAE,Descriptor translation table format" "Short,Long"
bitfld.long 0x00 10. "NOS,Not Outer Shareable attribute for the region" "No,Yes"
newline
bitfld.long 0x00 9. "NS,Non-secure" "No,Yes"
bitfld.long 0x00 7. "SH,Shareable attribute for the region" "No,Yes"
newline
bitfld.long 0x00 4.--6. "INNER,Inner memory attributes for the region" "Non-cacheable,Strongly-ordered,Reserved,Device,Reserved,Write-Back/Write-Allocate,Write-Through,Write-Back/No Write-Allocate"
newline
bitfld.long 0x00 2.--3. "OUTER,Outer memory attributes for the region" "Non-cacheable,Write-Back/Write-Allocate,Write-Through/No Write-Allocate,Write-Back/No Write-Allocate"
newline
bitfld.long 0x00 1. "SS,Supersection" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif ((((per.l(c15:0x0202))&0x80000000)==0x00000000)&&(((per.l(c15:0x0047))&0x1)==0x1))
group.long c15:0x0047++0x00
line.long 0x00 "PAR,Physical Address Register"
newline
bitfld.long 0x00 11. "LPAE,Descriptor translation table format" "Short,Long"
newline
newline
newline
bitfld.long 0x00 6. "FS[5],Fault status bit - External abort type" "DECERR,SLVERR"
newline
bitfld.long 0x00 1.--5. "FS[0:4],Fault status bit - Fault source" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external abort/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external abort on translation table walk/1st level,Permission/1st level,Sync. external abort on translation table walk/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external abort,Reserved,Async. parity error on memory access,Sync. parity error on memory access,Reserved,Reserved,Sync. parity error on translation table walk/1st level,Reserved,Sync. parity error on translation table walk/2nd level,?..."
newline
bitfld.long 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif ((((per.l(c15:0x0202))&0x80000000)==0x80000000)&&(((per.l(c15:0x10070))&0x1)==0x0))
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
hexmask.quad.byte 0x00 56.--63. 1. "ATTR,Memory attributes for the returned PA"
hexmask.quad.long 0x00 12.--39. 0x10 "PA,Physical Address"
newline
bitfld.quad 0x00 11. "LPAE,Descriptor translation table format" "Short,Long"
newline
bitfld.quad 0x00 9. "NS,Non-secure" "No,Yes"
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
newline
newline
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
newline
bitfld.quad 0x00 11. "LPAE,Descriptor translation table format" "Short,Long"
newline
bitfld.quad 0x00 9. "FSTAGE,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "S2WLK,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
newline
newline
bitfld.quad 0x00 1.--6. "FST,Fault Status Field" "Address/0th level,Address/1st level,Address/2nd level,Address/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. ext. abort,Async. external abort,Reserved,Reserved,Sync. ext. abort/0th level,Sync. ext. abort/1st level,Sync. ext. abort/2nd level,Sync. ext. abort/3rd level,Sync. parity error on memory access,Async. parity error on memory access,Reserved,Reserved,Reserved,Sync. parity error on translation table walk/0th level,Sync. parity error on translation table walk/1st level,Sync. parity error on translation table walk/2nd level,Sync. parity error on translation table walk/3rd level,Reserved,Alignment,Debug event,?..."
newline
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
tree.open "Memory Attribute Indirection Registers"
if ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)==0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)==0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)==0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x002A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x002A))&0xF00000)!=0x000000)&&(((per.l(c15:0x002A))&0xF000)!=0x0000)&&(((per.l(c15:0x002A))&0xF0)!=0x00))
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
else
hgroup.long c15:0x002A++0x00
hide.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
endif
if ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)==0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)==0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)==0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x012A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x012A))&0xF00000)!=0x000000)&&(((per.l(c15:0x012A))&0xF000)!=0x0000)&&(((per.l(c15:0x012A))&0xF0)!=0x00))
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
else
hgroup.long c15:0x012A++0x00
hide.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
endif
if ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)==0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)==0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)==0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x402A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x402A))&0xF00000)!=0x000000)&&(((per.l(c15:0x402A))&0xF000)!=0x0000)&&(((per.l(c15:0x402A))&0xF0)!=0x00))
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
else
hgroup.long c15:0x402A++0x00
hide.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
endif
if ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)==0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)==0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)==0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)==0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "nGnRnE,,,,nGnRE,,,,nGRE,,,,GRE,?..."
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
elif ((((per.l(c15:0x0202))&0x80000000)==0x0x80000000)&&(((per.l(c15:0x412A))&0xF0000000)!=0x00000000)&&(((per.l(c15:0x412A))&0xF00000)!=0x000000)&&(((per.l(c15:0x412A))&0xF000)!=0x0000)&&(((per.l(c15:0x412A))&0xF0)!=0x00))
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR3[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0[7:4],The memory attribute encoding for an AttrIndx[2:0] bits [7:4]" "Device,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Write-through transient,Normal/Outer Non-Cacheable,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-back transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-through non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient,Normal/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0[3:0],The memory attribute encoding for an AttrIndx[2:0] bits [3:0]" "Device,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Write-through transient,Normal/Inner Non-Cacheable,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-back transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-through non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient,Normal/Inner Write-back non-transient"
else
hgroup.long c15:0x412A++0x00
hide.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
endif
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x002A++0x00
line.long 0x00 "PRRR,Primary Region Remap Register"
bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 19. "NS1,Mapping of S = 1 attribute for Normal memory" "Non-shareable,Shareable"
bitfld.long 0x00 18. "NS0,Mapping of S = 0 attribute for Normal memory" "Non-shareable,Shareable"
newline
bitfld.long 0x00 17. "DS1,Mapping of S = 1 attribute for Device memory" "Non-shareable,Shareable"
bitfld.long 0x00 16. "DS0,Mapping of S = 0 attribute for Device memory" "Non-shareable,Shareable"
newline
bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
group.long c15:0x012A++0x00
line.long 0x00 "NMRR,Normal Memory Remap Register"
bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Non-cacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier"
hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier"
else
hgroup.long c15:0x002A++0x00
hide.long 0x00 "PRRR,Primary Region Remap Register"
hgroup.long c15:0x012A++0x00
hide.long 0x00 "NMRR,Normal Memory Remap Register"
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
endif
tree.end
tree.end
tree "Virtualization Extensions"
group.long c15:0x4000++0x00
line.long 0x00 "VPIDR,Virtualization Processor ID Register"
group.long c15:0x4500++0x00
line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
group.long c15:0x4001++0x00
line.long 0x00 "HSCTLR,Hypervisor System Control Register"
bitfld.long 0x00 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x00 19. "WXN,Write permission implies XN" "Not forced,Forced"
bitfld.long 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x00 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x00 5. "CP15BEN,AArch32 CP15 barrier enable" "Disabled,Enabled"
bitfld.long 0x00 2. "C,Cache enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "A,Alignment check enable" "Disabled,Enabled"
bitfld.long 0x00 0. "M,MMU enable" "Disabled,Enabled"
group.long c15:0x4101++0x00
line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR access control" "Disabled,Enabled"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
newline
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
newline
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "No effect,Inner,Outer,Full"
newline
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted"
newline
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed"
newline
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
group.long c15:0x4411++0x00
line.long 0x00 "HCR2,Hypervisor Configuration Register 2"
bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes"
group.long c15:0x4111++0x00
line.long 0x00 "HDCR,Hypervisor Debug Control Register"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
newline
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long c15:0x4211++0x00
line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register"
bitfld.long 0x00 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x00 20. "TTA,Trap Trace Access" "Not supported,"
newline
bitfld.long 0x00 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped"
bitfld.long 0x00 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped"
newline
bitfld.long 0x00 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped"
group.long c15:0x4311++0x00
line.long 0x00 "HSTR,Hypervisor System Trap Register"
bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "No effect,Trap"
bitfld.long 0x00 13. "T13,Trap to Hypervisor mode Non-secure priv 13" "No effect,Trap"
newline
bitfld.long 0x00 12. "T12,Trap to Hypervisor mode Non-secure priv 12" "No effect,Trap"
bitfld.long 0x00 11. "T11,Trap to Hypervisor mode Non-secure priv 11" "No effect,Trap"
newline
bitfld.long 0x00 10. "T10,Trap to Hypervisor mode Non-secure priv 10" "No effect,Trap"
bitfld.long 0x00 9. "T9,Trap to Hypervisor mode Non-secure priv 9" "No effect,Trap"
newline
bitfld.long 0x00 8. "T8,Trap to Hypervisor mode Non-secure priv 8" "No effect,Trap"
bitfld.long 0x00 7. "T7,Trap to Hypervisor mode Non-secure priv 7" "No effect,Trap"
newline
bitfld.long 0x00 6. "T6,Trap to Hypervisor mode Non-secure priv 6" "No effect,Trap"
bitfld.long 0x00 5. "T5,Trap to Hypervisor mode Non-secure priv 5" "No effect,Trap"
newline
bitfld.long 0x00 3. "T3,Trap to Hypervisor mode Non-secure priv 3" "No effect,Trap"
bitfld.long 0x00 2. "T2,Trap to Hypervisor mode Non-secure priv 2" "No effect,Trap"
newline
bitfld.long 0x00 1. "T1,Trap to Hypervisor mode Non-secure priv 1" "No effect,Trap"
bitfld.long 0x00 0. "T0,Trap to Hypervisor mode Non-secure priv 0" "No effect,Trap"
rgroup.long c15:0x4711++0x00
line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register"
if (((per.l(c15:0x4202))&0x07)==0x00)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 5.--47. 0x20 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x01)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 4.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x02)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 12.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x03)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 11.--47. 0x8 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x04)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 10.--47. 0x4 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x05)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 9.--47. 0x2 "BADDR,Translation table base address"
elif (((per.l(c15:0x4202))&0x07)==0x06)
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 8.--47. 0x1 "BADDR,Translation table base address"
else
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 7.--47. 0x80 "BADDR,Translation table base address"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-cacheable,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
if (((per.l(c15:0x4212))&0x0F)==0x00)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 5.--47. 0x20 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x01)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 4.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x02)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 12.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x03)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 11.--47. 0x8 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x04)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 10.--47. 0x4 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x05)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 9.--47. 0x2 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x06)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 8.--47. 0x1 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x07)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 7.--47. 0x80 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x08)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 22.--47. 0x40 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x09)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 21.--47. 0x20 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x0A)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 20.--47. 0x10 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x0B)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 19.--47. 0x8 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x0C)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 18.--47. 0x4 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x0D)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 17.--47. 0x2 "BADDR,Translation table base address"
elif (((per.l(c15:0x4212))&0x0F)==0x0E)
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad.long 0x00 16.--47. 0x1 "BADDR,Translation table base address"
else
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,The VMID for the translation table"
hexmask.quad 0x00 15.--47. 0x80 "BADDR,Translation table base address"
endif
group.long c15:0x4212++0x00
line.long 0x00 "VTCR,Virtualization Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "Non-cacheable,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "Non-cacheable,Write-Back Write-Allocate,Write-Through,Write-Back no Write-Allocate"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "2nd level,1st level,,"
newline
bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High"
bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,-8,-7,-6,-5,-4,-3,-2,-1"
group.long c15:0x4006++0x00
line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register"
if (((per.l(c15:0x4025))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((per.l(c15:0x4025))&0xFC000000)==0x04000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((per.l(c15:0x4025))&0xFC000000)==(0x0C000000||0x14000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "OPC2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.l(c15:0x4025))&0xFC000000)==(0x10000000||0x30000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "OPC1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "RT2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.l(c15:0x4025))&0xFC000000)==0x18000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1. "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "RN,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.l(c15:0x4025))&0xFC000000)==0x1C000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((per.l(c15:0x4025))&0xFC000000)==(0x44000000||0x54000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((per.l(c15:0x4025))&0xFC000000)==0x60000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--21. "OP0,Op0 value from the issued instruction" "0,1,2,3"
newline
bitfld.long 0x00 17.--19. "OP2,Op2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "OP1,Op1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRN,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "RT,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRM,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((per.l(c15:0x4025))&0xFC000000)==(0x80000000||0x84000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((per.l(c15:0x4025))&0xFD000000)==(0x91000000||0x95000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.l(c15:0x4025))&0xFD000000)==(0x90000000||0x94000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((per.l(c15:0x4025))&0xFC800000)==(0xA0800000||0xB0800000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((per.l(c15:0x4025))&0xFC800000)==(0xA0000000||0xB0000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((per.l(c15:0x4025))&0xFD000000)==0xBD000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 15. "UNASE,Unattributable System Error" "Attributable,Unattributable"
newline
bitfld.long 0x00 14. "UNCSE,Uncontainable System Error" "Containable,Uncontainable"
bitfld.long 0x00 0.--1. "SES,System Error Source" "Decode,ECC,Slave,"
elif (((per.l(c15:0x4025))&0xFD000000)==0xBC000000)
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((per.l(c15:0x4025))&0xFC000000)==(0xC0000000||0xC4000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.l(c15:0x4025))&0xFC000000)==(0xC8000000||0xCC000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.l(c15:0x4025))&0xFC000000)==(0xD0000000||0xD4000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((per.l(c15:0x4025))&0xFC000000)==(0xE0000000||0xF0000000))
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1. "COMMENT,Set to the instruction comment field value"
else
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Hypervisor class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
group.long c15:0x4206++0x00
line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register"
group.long c15:0x4406++0x00
line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register"
hexmask.long 0x00 4.--31. 1. "FIPA,Bits [39:12] of the faulting intermediate physical address"
group.long c15:0x400C++0x00
line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address"
tree.end
tree "Cache Control and Configuration"
rgroup.long c15:0x0100++0x00
line.long 0x00 "CTR,Cache Type Register"
bitfld.long 0x00 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x00 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x00 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x00 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x00 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
rgroup.long c15:0x1100++0x00
line.long 0x00 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,Reserved,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
newline
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
newline
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate I/D,?..."
rgroup.long c15:0x1700++0x0
line.long 0x00 "AIDR,Auxiliary ID Register"
rgroup.long c15:0x1000++0x00
line.long 0x00 "CCSIDR,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,"
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
newline
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
newline
hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..."
group.long c15:0x2000++0x00
line.long 0x00 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
tree "Level 1 memory system"
group.long c15:0x001F++0x00
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
group.long c15:0x011F++0x00
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
group.long c15:0x021F++0x00
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
group.long c15:0x031F++0x00
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
group.long c15:0x041F++0x00
line.long 0x00 "DL1DATA4,Data L1 Data 4 Register"
group.long c15:0x000F++0x00
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
group.long c15:0x010F++0x00
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
group.long c15:0x020F++0x00
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
group.long c15:0x030F++0x00
line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register"
wgroup.long c15:0x04F++0x00
line.long 0x00 "RAMINDEX,RAM Index Operation Register"
hexmask.long.byte 0x00 24.--31. 1. "RAMID,RAM identifier"
bitfld.long 0x00 18.--21. "WAY,Indicates the way of the RAM that is being accessed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.tbyte 0x00 0.--17. 1. "INDEX,Indicates the index address of the RAM that is being accessed"
tree.end
tree "Level 2 memory system"
group.long c15:0x1209++0x00
line.long 0x00 "L2CTLR,L2 Control Register"
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "Reset,No reset"
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
rbitfld.long 0x00 23. "L2CP,L2 cache ECC protection" "Not supported,Supported"
newline
rbitfld.long 0x00 22. "L1CECCPP,L1 Cache ECC and Parity protection" "Not supported,Supported"
bitfld.long 0x00 21. "ECCPPEN,ECC and parity enable" "Disabled,Enabled"
bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present"
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present"
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1 present,2 present,?..."
newline
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle"
newline
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,6 cycles,6 cycles"
group.long c15:0x1309++0x00
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.long c15:0x100F++0x00
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
bitfld.long 0x00 30.--31. "L2PLRUIP,Select the L2 PLRU insertion point" "MRU/LRU,MRU,3/4 LRU,LRU"
bitfld.long 0x00 29. "L2RPLCPOL,Select the L2 cache replacement policy" "PLRU,Pseudo random"
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
newline
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
bitfld.long 0x00 26. "FL2GICRCGEA,Force L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
bitfld.long 0x00 25. "ESIAA,Enable single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "L2PLRUMD,Disable PLRU dynamic insertion and update policy" "No,Yes"
bitfld.long 0x00 23. "DACPMUWLU,Disable ACP MakeUnique and WriteLineUnique transactions" "No,Yes"
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.long 0x00 14. "EUCE,Enable UniqueClean evictions with data" "Disabled,Enabled"
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
newline
bitfld.long 0x00 12. "DPSHO,Disable set hazard optimization against prefetch entries" "No,Yes"
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
newline
bitfld.long 0x00 9. "DWHOBBRRQ,Disable set/way hazard optimization on back to back reads from the same CPU targeting the same set" "No,Yes"
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
bitfld.long 0x00 5. "DSWHOWWM,Disables set/way hazard optimization for WBNA/WT memory" "No,Yes"
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "DCEPTE,Disable clean/evict push to external" "No,Yes"
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad c15:0x130F0++0x01
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
tree.end
tree.end
tree "System Performance Monitor"
group.long c15:0xc9++0x00
line.long 0x00 "PMCR,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
newline
group.long c15:0x1c9++0x00
line.long 0x00 "PMCNTENSET,Count Enable Set Register "
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.long c15:0x2c9++0x00
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
newline
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.long c15:0x3c9++0x00
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
eventfld.long 0x00 31. "C,PMCCNTR overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 5. "P5,PMN5 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 4. "P4,PMN4 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 3. "P3,PMN3 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
newline
eventfld.long 0x00 2. "P2,PMN2 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 1. "P1,PMN1 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
eventfld.long 0x00 0. "P0,PMN0 overflow [Read/Write]" "No overflow/No effect,Overflow/Clear"
group.long c15:0x4c9++0x00
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
bitfld.long 0x00 5. "P5,Increment  PMN5" "No action,Increment"
bitfld.long 0x00 4. "P4,Increment  PMN4" "No action,Increment"
bitfld.long 0x00 3. "P3,Increment  PMN3" "No action,Increment"
newline
bitfld.long 0x00 2. "P2,Increment  PMN2" "No action,Increment"
bitfld.long 0x00 1. "P1,Increment  PMN1" "No action,Increment"
bitfld.long 0x00 0. "P0,Increment  PMN0" "No action,Increment"
group.long c15:0x5c9++0x00
line.long 0x00 "PMSELR,Performance Monitor Select Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
group.long c15:0xd9++0x00
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
group.long c15:0x1d9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
group.long c15:0x2d9++0x00
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
bitfld.long 0x00 5. "EVENT[5],Value of 5 event counter" "0,1"
bitfld.long 0x00 4. "EVENT[4],Value of 4 event counter" "0,1"
bitfld.long 0x00 3. "EVENT[3],Value of 3 event counter" "0,1"
newline
bitfld.long 0x00 2. "EVENT[2],Value of 2 event counter" "0,1"
bitfld.long 0x00 1. "EVENT[1],Value of 1 event counter" "0,1"
bitfld.long 0x00 0. "EVENT[0],Value of 0 event counter" "0,1"
newline
group.long c15:0xe9++0x00
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.long c15:0x1e9++0x00
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.long c15:0x2e9++0x00
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
eventfld.long 0x00 31. "C,PMCCNTR enable [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00 5. "P5,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 4. "P4,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 3. "P3,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
newline
eventfld.long 0x00 2. "P2,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 1. "P1,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
eventfld.long 0x00 0. "P0,Overflow Interrupt Clear [Read/Write]" "Disabled/No effect,Enabled/Disable"
group.long c15:0x3e9++0x00
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
group.long c15:0x8E++0x00
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
group.long c15:(0x8E+0x40)++0x00
line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x18E++0x00
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
group.long c15:(0x18E+0x40)++0x00
line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x28E++0x00
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
group.long c15:(0x28E+0x40)++0x00
line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x38E++0x00
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
group.long c15:(0x38E+0x40)++0x00
line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x48E++0x00
line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4"
group.long c15:(0x48E+0x40)++0x00
line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x58E++0x00
line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5"
group.long c15:(0x58E+0x40)++0x00
line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x07FE++0x00
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.long c15:0x000E++0x00
line.long 0x00 "CNTFRQ,Counter Frequency Register"
rgroup.quad c15:0x100E0++0x01
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
group.long c15:0x001E++0x00
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.long c15:0x002E++0x00
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register"
group.long c15:0x012E++0x00
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.long c15:0x003E++0x00
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
group.long c15:0x013E++0x00
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x110E0++0x01
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
group.quad c15:0x120E0++0x01
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
group.quad c15:0x130E0++0x01
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
group.quad c15:0x140E0++0x01
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
group.long c15:0x401E++0x00
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
group.long c15:0x402E++0x00
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
group.long c15:0x412E++0x00
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x160E0++0x01
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch32 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.long c15:0x048C++0x00
line.long 0x00 "ICC_AP0R0,Active Priorities 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x009C++0x00
line.long 0x00 "ICC_AP1R0,Active Priorities 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
wgroup.quad c15:0x110C0++0x01
line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x038C++0x00
line.long 0x00 "ICC_BPR0,Binary Point Register 0"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x03CC++0x00
line.long 0x00 "ICC_BPR1,Binary Point Register 1"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x04CC++0x00
line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1"
rbitfld.long 0x00 19. "EXTRANGE,Extended INTID range" "Not supported,Supported"
rbitfld.long 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
newline
bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1"
group.long c15:0x64CC++0x00
line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3"
rbitfld.long 0x00 19. "EXTRANGE,Extended INTID range" "Not supported,Supported"
rbitfld.long 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
newline
rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled"
bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled"
bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled"
newline
bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register"
bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register"
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.long c15:0x018C++0x00
line.long 0x00 "ICC_EOIR0,End Of Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.long c15:0x01CC++0x00
line.long 0x00 "ICC_EOIR1,End Of Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access."
rgroup.long c15:0x028C++0x00
line.long 0x00 "ICC_HPPIR0,Highest Prioity Pending Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt"
rgroup.long c15:0x02CC++0x00
line.long 0x00 "ICC_HPPIR1,Highest Prioity Pending Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt"
hgroup.long c15:0x008C++0x00
hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0"
in
hgroup.long c15:0x00CC++0x00
hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1"
in
group.long c15:0x06CC++0x00
line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
group.long c15:0x07CC++0x00
line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1"
bitfld.long 0x00 0. "ENABLE,Enables Group 1 interrupts" "Disabled,Enabled"
group.long c15:0x0064++0x00
line.long 0x00 "ICC_PMR,Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.long c15:0x03BC++0x00
line.long 0x00 "ICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
wgroup.quad c15:0x120C0++0x01
line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
wgroup.quad c15:0x100C0++0x01
line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x05CC++0x00
line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.long c15:0x65CC++0x00
line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.long c15:0x67CC++0x00
line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable"
bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
tree.end
tree "AArch32 Virtual Interface Control System Registers"
tree.open "Interrupt Controller Hypervisor Active Priorities Registers"
group.long c15:0x408C++0x00
line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Register 0-0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active priority 31" "0,1"
bitfld.long 0x00 30. "P30,Group 0 interrupt active priority 30" "0,1"
bitfld.long 0x00 29. "P29,Group 0 interrupt active priority 29" "0,1"
bitfld.long 0x00 28. "P28,Group 0 interrupt active priority 28" "0,1"
newline
bitfld.long 0x00 27. "P27,Group 0 interrupt active priority 27" "0,1"
bitfld.long 0x00 26. "P26,Group 0 interrupt active priority 26" "0,1"
bitfld.long 0x00 25. "P25,Group 0 interrupt active priority 25" "0,1"
bitfld.long 0x00 24. "P24,Group 0 interrupt active priority 24" "0,1"
newline
bitfld.long 0x00 23. "P23,Group 0 interrupt active priority 23" "0,1"
bitfld.long 0x00 22. "P22,Group 0 interrupt active priority 22" "0,1"
bitfld.long 0x00 21. "P21,Group 0 interrupt active priority 21" "0,1"
bitfld.long 0x00 20. "P20,Group 0 interrupt active priority 20" "0,1"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active priority 19" "0,1"
bitfld.long 0x00 18. "P18,Group 0 interrupt active priority 18" "0,1"
bitfld.long 0x00 17. "P17,Group 0 interrupt active priority 17" "0,1"
bitfld.long 0x00 16. "P16,Group 0 interrupt active priority 16" "0,1"
newline
bitfld.long 0x00 15. "P15,Group 0 interrupt active priority 15" "0,1"
bitfld.long 0x00 14. "P14,Group 0 interrupt active priority 14" "0,1"
bitfld.long 0x00 13. "P13,Group 0 interrupt active priority 13" "0,1"
bitfld.long 0x00 12. "P12,Group 0 interrupt active priority 12" "0,1"
newline
bitfld.long 0x00 11. "P11,Group 0 interrupt active priority 11" "0,1"
bitfld.long 0x00 10. "P10,Group 0 interrupt active priority 10" "0,1"
bitfld.long 0x00 9. "P9,Group 0 interrupt active priority 9" "0,1"
bitfld.long 0x00 8. "P8,Group 0 interrupt active priority 8" "0,1"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active priority 7" "0,1"
bitfld.long 0x00 6. "P6,Group 0 interrupt active priority 6" "0,1"
bitfld.long 0x00 5. "P5,Group 0 interrupt active priority 5" "0,1"
bitfld.long 0x00 4. "P4,Group 0 interrupt active priority 4" "0,1"
newline
bitfld.long 0x00 3. "P3,Group 0 interrupt active priority 3" "0,1"
bitfld.long 0x00 2. "P2,Group 0 interrupt active priority 2" "0,1"
bitfld.long 0x00 1. "P1,Group 0 interrupt active priority 1" "0,1"
bitfld.long 0x00 0. "P0,Group 0 interrupt active priority 0" "0,1"
group.long c15:0x409C++0x00
line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Register 1-0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active priority 31" "0,1"
bitfld.long 0x00 30. "P30,Group 1 interrupt active priority 30" "0,1"
bitfld.long 0x00 29. "P29,Group 1 interrupt active priority 29" "0,1"
bitfld.long 0x00 28. "P28,Group 1 interrupt active priority 28" "0,1"
newline
bitfld.long 0x00 27. "P27,Group 1 interrupt active priority 27" "0,1"
bitfld.long 0x00 26. "P26,Group 1 interrupt active priority 26" "0,1"
bitfld.long 0x00 25. "P25,Group 1 interrupt active priority 25" "0,1"
bitfld.long 0x00 24. "P24,Group 1 interrupt active priority 24" "0,1"
newline
bitfld.long 0x00 23. "P23,Group 1 interrupt active priority 23" "0,1"
bitfld.long 0x00 22. "P22,Group 1 interrupt active priority 22" "0,1"
bitfld.long 0x00 21. "P21,Group 1 interrupt active priority 21" "0,1"
bitfld.long 0x00 20. "P20,Group 1 interrupt active priority 20" "0,1"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active priority 19" "0,1"
bitfld.long 0x00 18. "P18,Group 1 interrupt active priority 18" "0,1"
bitfld.long 0x00 17. "P17,Group 1 interrupt active priority 17" "0,1"
bitfld.long 0x00 16. "P16,Group 1 interrupt active priority 16" "0,1"
newline
bitfld.long 0x00 15. "P15,Group 1 interrupt active priority 15" "0,1"
bitfld.long 0x00 14. "P14,Group 1 interrupt active priority 14" "0,1"
bitfld.long 0x00 13. "P13,Group 1 interrupt active priority 13" "0,1"
bitfld.long 0x00 12. "P12,Group 1 interrupt active priority 12" "0,1"
newline
bitfld.long 0x00 11. "P11,Group 1 interrupt active priority 11" "0,1"
bitfld.long 0x00 10. "P10,Group 1 interrupt active priority 10" "0,1"
bitfld.long 0x00 9. "P9,Group 1 interrupt active priority 9" "0,1"
bitfld.long 0x00 8. "P8,Group 1 interrupt active priority 8" "0,1"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active priority 7" "0,1"
bitfld.long 0x00 6. "P6,Group 1 interrupt active priority 6" "0,1"
bitfld.long 0x00 5. "P5,Group 1 interrupt active priority 5" "0,1"
bitfld.long 0x00 4. "P4,Group 1 interrupt active priority 4" "0,1"
newline
bitfld.long 0x00 3. "P3,Group 1 interrupt active priority 3" "0,1"
bitfld.long 0x00 2. "P2,Group 1 interrupt active priority 2" "0,1"
bitfld.long 0x00 1. "P1,Group 1 interrupt active priority 1" "0,1"
bitfld.long 0x00 0. "P0,Group 1 interrupt active priority 0" "0,1"
tree.end
newline
rgroup.long c15:0x43BC++0x00
line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.long c15:0x45BC++0x00
line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.long c15:0x40BC++0x00
line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
group.long c15:(0x40CC+0x0)++0x00
line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x100)++0x00
line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x200)++0x00
line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x300)++0x00
line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40EC+0x0)++0x00
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x100)++0x00
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x200)++0x00
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x300)++0x00
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
rgroup.long c15:0x42BC++0x00
line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register"
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.long c15:0x459C++0x00
line.long 0x00 "ICH_SRE,Hypervisor System Register"
group.long c15:0x47BC++0x00
line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.long c15:0x449C++0x00
line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register"
rgroup.long c15:0x41BC++0x00
line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
tree "Coresight Management Registers"
rgroup.long c14:0x0000++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "Reserved,Reserved,Reserved,4,?..."
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "Reserved,2,?..."
newline
bitfld.long 0x0 16.--19. "VERSION,Debug Architecture Version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8,?..."
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Reserved,Not implemented"
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Reserved,Implemented"
group.long c14:0x0070++0x0
line.long 0x00 "DBGVCR,Debug Vector Catch register"
bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled"
bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
group.long c14:0x0020++0x00
line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register"
bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled"
group.long c14:0x0200++0x0
line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)"
hgroup.long c14:0x0050++0x0
hide.long 0x00 "DBGDTRRXINT,Debug Receive Register (Internal View)"
in
group.long c14:0x0220++0x0
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled"
bitfld.long 0x00 22.--23. "INTDIS,Used for save/restore of EDSCR.INTdis" "0,1,2,3"
bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled"
newline
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
newline
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
newline
bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
rgroup.long c14:0x0010++0x0
line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
newline
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
wgroup.long c14:0x0230++0x0
line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)"
group.long c14:0x0050++0x0
line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)"
group.long c14:0x0687++0x0
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.long c14:0x0697++0x0
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
if (((per.l(c14:0x06E7))&0xAA)==0xAA)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0xA8)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0xA2)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0xA0)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x8A)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x88)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x82)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x80)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x2A)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x28)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x22)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x20)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x0A)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x08)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
elif (((per.l(c14:0x06E7))&0xAA)==0x02)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
elif (((per.l(c14:0x06E7))&0xAA)==0x00)
rgroup.long c14:0x06E7++0x00
line.long 0x00 "DBGAUTHSTATUS,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
newline
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
endif
rgroup.long c14:0x0707++0x0
line.long 0x0 "DBGDEVID2,Debug Device ID Register 2"
rgroup.long c14:0x0717++0x0
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" ",,No offset,?..."
rgroup.long c14:0x0727++0x00
line.long 0x00 "DBGDEVID,Debug Device ID Register 0"
bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..."
bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" ",Supported,?..."
bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..."
bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
newline
bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
tree.end
newline
rgroup.quad c14:0x10010++0x1
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
hexmask.quad 0x0 12.--47. 0x10 "ROMADDR,ROM physical address"
bitfld.quad 0x0 0.--1. "VALID,ROM table address valid" "Not valid,,,Valid"
rgroup.quad c14:0x10020++0x1
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
wgroup.long c14:0x0401++0x00
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
rgroup.long c14:0x0411++0x00
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required"
bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked"
bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..."
if (((per.l(c14:0x0411))&0x2)==0x2)
group.long c14:0x0260++0x00
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
else
hgroup.long c14:0x0260++0x00
hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
endif
group.long c14:0x0431++0x00
line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register"
bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked"
group.long c14:0x0441++0x00
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Power down,Emulate"
tree.end
tree "Breakpoint Registers"
tree "Breakpoint 0"
if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x0)++0x0
line.long 0x00 "DBGBVR0,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x0)++0x0
hide.long 0x00 "DBGBVR0,Breakpoint Value Register"
else
group.long c14:(0x0400+0x0)++0x0
line.long 0x00 "DBGBVR0,Breakpoint ContextID Register"
endif
group.long c14:(0x0500+0x0)++0x0
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Breakpoint 1"
if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x10)++0x0
line.long 0x00 "DBGBVR1,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x10)++0x0
hide.long 0x00 "DBGBVR1,Breakpoint Value Register"
else
group.long c14:(0x0400+0x10)++0x0
line.long 0x00 "DBGBVR1,Breakpoint ContextID Register"
endif
group.long c14:(0x0500+0x10)++0x0
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Breakpoint 2"
if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x20)++0x0
line.long 0x00 "DBGBVR2,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x20)++0x0
hide.long 0x00 "DBGBVR2,Breakpoint Value Register"
else
group.long c14:(0x0400+0x20)++0x0
line.long 0x00 "DBGBVR2,Breakpoint ContextID Register"
endif
group.long c14:(0x0500+0x20)++0x0
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Breakpoint 3"
if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x30)++0x0
line.long 0x00 "DBGBVR3,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x30)++0x0
hide.long 0x00 "DBGBVR3,Breakpoint Value Register"
else
group.long c14:(0x0400+0x30)++0x0
line.long 0x00 "DBGBVR3,Breakpoint ContextID Register"
endif
group.long c14:(0x0500+0x30)++0x0
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Breakpoint 4"
if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x40)++0x0
line.long 0x00 "DBGBVR4,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x40)++0x0
hide.long 0x00 "DBGBVR4,Breakpoint Value Register"
else
group.long c14:(0x0400+0x40)++0x0
line.long 0x00 "DBGBVR4,Breakpoint ContextID Register"
endif
if (((per.l(c14:(0x500+0x40)))&0x800000)==0x800000)
group.long c14:(0x0101+0x40)++0x0
line.long 0x00 "DBGBXVR4,Breakpoint Extended Value Register"
hexmask.long.byte 0x00 0.--7. 1. "VAMID,VMID value for comparison"
else
hgroup.long c14:(0x0101+0x40)++0x0
hide.long 0x00 "DBGBXVR4,Breakpoint Extended Value Register"
endif
group.long c14:(0x0500+0x40)++0x0
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Breakpoint 5"
if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x50)++0x0
line.long 0x00 "DBGBVR5,Breakpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
hgroup.long c14:(0x0400+0x50)++0x0
hide.long 0x00 "DBGBVR5,Breakpoint Value Register"
else
group.long c14:(0x0400+0x50)++0x0
line.long 0x00 "DBGBVR5,Breakpoint ContextID Register"
endif
if (((per.l(c14:(0x500+0x50)))&0x800000)==0x800000)
group.long c14:(0x0101+0x50)++0x0
line.long 0x00 "DBGBXVR5,Breakpoint Extended Value Register"
hexmask.long.byte 0x00 0.--7. 1. "VAMID,VMID value for comparison"
else
hgroup.long c14:(0x0101+0x50)++0x0
hide.long 0x00 "DBGBXVR5,Breakpoint Extended Value Register"
endif
group.long c14:(0x0500+0x50)++0x0
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,?..."
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Hyp mode control" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree.end
tree "Watchpoint Control Registers"
tree "Watchpoint 0"
group.long c14:(0x0600+0x0)++0x00
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked,Linked"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,?..."
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hyp Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 1"
group.long c14:(0x0600+0x10)++0x00
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked,Linked"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,?..."
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hyp Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 2"
group.long c14:(0x0600+0x20)++0x00
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked,Linked"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,?..."
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hyp Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoint 3"
group.long c14:(0x0600+0x30)++0x00
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked,Linked"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP0,BRP1,BRP2,BRP3,BRP4,BRP5,?..."
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hyp Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree.end
tree.end
AUTOINDENT.OFF
tree.open "Interrupt Controller (GIC-500)"
base COMP.BASE("GICD",-1.)
width 17.
tree "Distributor Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)))
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 6. "       DS            ,Disable Security" "No,Yes"
textline "                          "
bitfld.long 0x00 5. " ARE_NS       ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_S      ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       ENABLEGRP1S   ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1NS ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0 ,Enable Group 0 interrupts" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_NS        ,Affinity Routing Enable" "Reserved,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1A  ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
rbitfld.long 0x00 6. "       DS            ,Disable Security" "Reserved,Yes"
textline "                          "
bitfld.long 0x00 4. " ARE          ,Affinity Routing Enable" "Reserved,Enabled"
bitfld.long 0x00 1. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0    ,Enable Group 0 interrupts" "Disabled,Enabled"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 25. " NO1N         ,Indicates whether 1 of N SPI interrupts are supported" "Supported,Not supported"
bitfld.long 0x00 24. "  A3V        ,Indicates whether the Distributor supports nonzero values of Affinity level 3" "Not supported,Supported"
bitfld.long 0x00 19.--23. "  IDBITS        ,The number of interrupt identifier bits supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                          "
bitfld.long 0x00 17. " LPIS         ,Indicates whether the implementation supports LPIs" "Not supported,Supported"
bitfld.long 0x00 16. "  MBIS       ,Indicates whether the implementation supports message-based interrupts by writing to Distributor registers" "Not supported,Supported"
bitfld.long 0x00 10. "  SECURITYEXTN  ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
textline "                          "
bitfld.long 0x00 5.--7. " CPUNUMBER    ,Reports the number of PEs that can be used when affinity routing is not enabled" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--4. "              ITLN       ,Indicates the maximum SPI INTID that the GIC implementation supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Reserved"
rgroup.long 0x0008++0x03
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. " PRODID       ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "        VAR        ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x00 12.--15. " REV          ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "             IMP        ,Implementer"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x10000)==0x10000)
wgroup.long 0x40++0x03
line.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
else
hgroup.long 0x40++0x03
hide.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hgroup.long 0x48++0x03
hide.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register"
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register"
endif
width 17.
tree "Group Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0080))
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30  ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29  ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27  ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26  ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24  ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23  ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21  ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20  ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18  ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17  ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15  ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14  ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12  ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11  ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9   ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8   ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6   ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5   ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3   ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2   ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0   ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30  ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29  ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27  ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26  ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24  ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23  ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21  ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20  ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18  ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17  ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15  ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14  ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12  ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11  ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9   ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8   ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6   ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5   ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3   ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2   ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0   ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x0080++0x03
hide.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x84))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 (Secure Access)"
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB62  ,Group Status Bit 62" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB61  ,Group Status Bit 61" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB59  ,Group Status Bit 59" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB58  ,Group Status Bit 58" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB56  ,Group Status Bit 56" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB55  ,Group Status Bit 55" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB53  ,Group Status Bit 53" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB52  ,Group Status Bit 52" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB50  ,Group Status Bit 50" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB49  ,Group Status Bit 49" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB47  ,Group Status Bit 47" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB46  ,Group Status Bit 46" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB44  ,Group Status Bit 44" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB43  ,Group Status Bit 43" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB41  ,Group Status Bit 41" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB40  ,Group Status Bit 40" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB38  ,Group Status Bit 38" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB37  ,Group Status Bit 37" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB35  ,Group Status Bit 35" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB34  ,Group Status Bit 34" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB32  ,Group Status Bit 32" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB62  ,Group Status Bit 62" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB61  ,Group Status Bit 61" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB59  ,Group Status Bit 59" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB58  ,Group Status Bit 58" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB56  ,Group Status Bit 56" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB55  ,Group Status Bit 55" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB53  ,Group Status Bit 53" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB52  ,Group Status Bit 52" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB50  ,Group Status Bit 50" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB49  ,Group Status Bit 49" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB47  ,Group Status Bit 47" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB46  ,Group Status Bit 46" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB44  ,Group Status Bit 44" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB43  ,Group Status Bit 43" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB41  ,Group Status Bit 41" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB40  ,Group Status Bit 40" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB38  ,Group Status Bit 38" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB37  ,Group Status Bit 37" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB35  ,Group Status Bit 35" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB34  ,Group Status Bit 34" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB32  ,Group Status Bit 32" "Group 0,Group 1"
else
hgroup.long 0x0084++0x03
hide.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x88))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 (Secure Access)"
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB94  ,Group Status Bit 94" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB93  ,Group Status Bit 93" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB91  ,Group Status Bit 91" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB90  ,Group Status Bit 90" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB88  ,Group Status Bit 88" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB87  ,Group Status Bit 87" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB85  ,Group Status Bit 85" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB84  ,Group Status Bit 84" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB82  ,Group Status Bit 82" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB81  ,Group Status Bit 81" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB79  ,Group Status Bit 79" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB78  ,Group Status Bit 78" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB76  ,Group Status Bit 76" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB75  ,Group Status Bit 75" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB73  ,Group Status Bit 73" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB72  ,Group Status Bit 72" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB70  ,Group Status Bit 70" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB69  ,Group Status Bit 69" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB67  ,Group Status Bit 67" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB66  ,Group Status Bit 66" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB64  ,Group Status Bit 64" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB94  ,Group Status Bit 94" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB93  ,Group Status Bit 93" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB91  ,Group Status Bit 91" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB90  ,Group Status Bit 90" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB88  ,Group Status Bit 88" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB87  ,Group Status Bit 87" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB85  ,Group Status Bit 85" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB84  ,Group Status Bit 84" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB82  ,Group Status Bit 82" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB81  ,Group Status Bit 81" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB79  ,Group Status Bit 79" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB78  ,Group Status Bit 78" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB76  ,Group Status Bit 76" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB75  ,Group Status Bit 75" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB73  ,Group Status Bit 73" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB72  ,Group Status Bit 72" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB70  ,Group Status Bit 70" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB69  ,Group Status Bit 69" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB67  ,Group Status Bit 67" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB66  ,Group Status Bit 66" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB64  ,Group Status Bit 64" "Group 0,Group 1"
else
hgroup.long 0x0088++0x03
hide.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x8C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 (Secure Access)"
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB126 ,Group Status Bit 126" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB125 ,Group Status Bit 125" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB123 ,Group Status Bit 123" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB122 ,Group Status Bit 122" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB120 ,Group Status Bit 120" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB119 ,Group Status Bit 119" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB117 ,Group Status Bit 117" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB116 ,Group Status Bit 116" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB114 ,Group Status Bit 114" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB113 ,Group Status Bit 113" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB111 ,Group Status Bit 111" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB110 ,Group Status Bit 110" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB108 ,Group Status Bit 108" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB107 ,Group Status Bit 107" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB105 ,Group Status Bit 105" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB104 ,Group Status Bit 104" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB102 ,Group Status Bit 102" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB101 ,Group Status Bit 101" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB99  ,Group Status Bit 99" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB98  ,Group Status Bit 98" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB96  ,Group Status Bit 96" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB126 ,Group Status Bit 126" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB125 ,Group Status Bit 125" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB123 ,Group Status Bit 123" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB122 ,Group Status Bit 122" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB120 ,Group Status Bit 120" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB119 ,Group Status Bit 119" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB117 ,Group Status Bit 117" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB116 ,Group Status Bit 116" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB114 ,Group Status Bit 114" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB113 ,Group Status Bit 113" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB111 ,Group Status Bit 111" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB110 ,Group Status Bit 110" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB108 ,Group Status Bit 108" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB107 ,Group Status Bit 107" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB105 ,Group Status Bit 105" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB104 ,Group Status Bit 104" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB102 ,Group Status Bit 102" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB101 ,Group Status Bit 101" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB99  ,Group Status Bit 99" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB98  ,Group Status Bit 98" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB96  ,Group Status Bit 96" "Group 0,Group 1"
else
hgroup.long 0x008C++0x03
hide.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x90))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 (Secure Access)"
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB158 ,Group Status Bit 158" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB157 ,Group Status Bit 157" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB155 ,Group Status Bit 155" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB154 ,Group Status Bit 154" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB152 ,Group Status Bit 152" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB151 ,Group Status Bit 151" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB149 ,Group Status Bit 149" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB148 ,Group Status Bit 148" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB146 ,Group Status Bit 146" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB145 ,Group Status Bit 145" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB143 ,Group Status Bit 143" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB142 ,Group Status Bit 142" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB140 ,Group Status Bit 140" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB139 ,Group Status Bit 139" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB137 ,Group Status Bit 137" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB136 ,Group Status Bit 136" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB134 ,Group Status Bit 134" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB133 ,Group Status Bit 133" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB131 ,Group Status Bit 131" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB130 ,Group Status Bit 130" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB128 ,Group Status Bit 128" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB158 ,Group Status Bit 158" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB157 ,Group Status Bit 157" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB155 ,Group Status Bit 155" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB154 ,Group Status Bit 154" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB152 ,Group Status Bit 152" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB151 ,Group Status Bit 151" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB149 ,Group Status Bit 149" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB148 ,Group Status Bit 148" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB146 ,Group Status Bit 146" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB145 ,Group Status Bit 145" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB143 ,Group Status Bit 143" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB142 ,Group Status Bit 142" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB140 ,Group Status Bit 140" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB139 ,Group Status Bit 139" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB137 ,Group Status Bit 137" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB136 ,Group Status Bit 136" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB134 ,Group Status Bit 134" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB133 ,Group Status Bit 133" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB131 ,Group Status Bit 131" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB130 ,Group Status Bit 130" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB128 ,Group Status Bit 128" "Group 0,Group 1"
else
hgroup.long 0x0090++0x03
hide.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x94))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 (Secure Access)"
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB190 ,Group Status Bit 190" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB189 ,Group Status Bit 189" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB187 ,Group Status Bit 187" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB186 ,Group Status Bit 186" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB184 ,Group Status Bit 184" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB183 ,Group Status Bit 183" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB181 ,Group Status Bit 181" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB180 ,Group Status Bit 180" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB178 ,Group Status Bit 178" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB177 ,Group Status Bit 177" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB175 ,Group Status Bit 175" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB174 ,Group Status Bit 174" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB172 ,Group Status Bit 172" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB171 ,Group Status Bit 171" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB169 ,Group Status Bit 169" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB168 ,Group Status Bit 168" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB166 ,Group Status Bit 166" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB165 ,Group Status Bit 165" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB163 ,Group Status Bit 163" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB162 ,Group Status Bit 162" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB160 ,Group Status Bit 160" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB190 ,Group Status Bit 190" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB189 ,Group Status Bit 189" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB187 ,Group Status Bit 187" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB186 ,Group Status Bit 186" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB184 ,Group Status Bit 184" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB183 ,Group Status Bit 183" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB181 ,Group Status Bit 181" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB180 ,Group Status Bit 180" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB178 ,Group Status Bit 178" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB177 ,Group Status Bit 177" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB175 ,Group Status Bit 175" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB174 ,Group Status Bit 174" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB172 ,Group Status Bit 172" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB171 ,Group Status Bit 171" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB169 ,Group Status Bit 169" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB168 ,Group Status Bit 168" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB166 ,Group Status Bit 166" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB165 ,Group Status Bit 165" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB163 ,Group Status Bit 163" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB162 ,Group Status Bit 162" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB160 ,Group Status Bit 160" "Group 0,Group 1"
else
hgroup.long 0x0094++0x03
hide.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x98))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 (Secure Access)"
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB222 ,Group Status Bit 222" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB221 ,Group Status Bit 221" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB219 ,Group Status Bit 219" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB218 ,Group Status Bit 218" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB216 ,Group Status Bit 216" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB215 ,Group Status Bit 215" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB213 ,Group Status Bit 213" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB212 ,Group Status Bit 212" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB210 ,Group Status Bit 210" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB209 ,Group Status Bit 209" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB207 ,Group Status Bit 207" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB206 ,Group Status Bit 206" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB204 ,Group Status Bit 204" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB203 ,Group Status Bit 203" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB201 ,Group Status Bit 201" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB200 ,Group Status Bit 200" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB198 ,Group Status Bit 198" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB197 ,Group Status Bit 197" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB195 ,Group Status Bit 195" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB194 ,Group Status Bit 194" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB192 ,Group Status Bit 192" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB222 ,Group Status Bit 222" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB221 ,Group Status Bit 221" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB219 ,Group Status Bit 219" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB218 ,Group Status Bit 218" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB216 ,Group Status Bit 216" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB215 ,Group Status Bit 215" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB213 ,Group Status Bit 213" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB212 ,Group Status Bit 212" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB210 ,Group Status Bit 210" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB209 ,Group Status Bit 209" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB207 ,Group Status Bit 207" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB206 ,Group Status Bit 206" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB204 ,Group Status Bit 204" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB203 ,Group Status Bit 203" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB201 ,Group Status Bit 201" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB200 ,Group Status Bit 200" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB198 ,Group Status Bit 198" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB197 ,Group Status Bit 197" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB195 ,Group Status Bit 195" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB194 ,Group Status Bit 194" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB192 ,Group Status Bit 192" "Group 0,Group 1"
else
hgroup.long 0x0098++0x03
hide.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x9C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 (Secure Access)"
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB254 ,Group Status Bit 254" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB253 ,Group Status Bit 253" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB251 ,Group Status Bit 251" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB250 ,Group Status Bit 250" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB248 ,Group Status Bit 248" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB247 ,Group Status Bit 247" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB245 ,Group Status Bit 245" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB244 ,Group Status Bit 244" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB242 ,Group Status Bit 242" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB241 ,Group Status Bit 241" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB239 ,Group Status Bit 239" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB238 ,Group Status Bit 238" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB236 ,Group Status Bit 236" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB235 ,Group Status Bit 235" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB233 ,Group Status Bit 233" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB232 ,Group Status Bit 232" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB230 ,Group Status Bit 230" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB229 ,Group Status Bit 229" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB227 ,Group Status Bit 227" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB226 ,Group Status Bit 226" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB224 ,Group Status Bit 224" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB254 ,Group Status Bit 254" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB253 ,Group Status Bit 253" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB251 ,Group Status Bit 251" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB250 ,Group Status Bit 250" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB248 ,Group Status Bit 248" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB247 ,Group Status Bit 247" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB245 ,Group Status Bit 245" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB244 ,Group Status Bit 244" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB242 ,Group Status Bit 242" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB241 ,Group Status Bit 241" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB239 ,Group Status Bit 239" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB238 ,Group Status Bit 238" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB236 ,Group Status Bit 236" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB235 ,Group Status Bit 235" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB233 ,Group Status Bit 233" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB232 ,Group Status Bit 232" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB230 ,Group Status Bit 230" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB229 ,Group Status Bit 229" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB227 ,Group Status Bit 227" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB226 ,Group Status Bit 226" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB224 ,Group Status Bit 224" "Group 0,Group 1"
else
hgroup.long 0x009C++0x03
hide.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 (Secure Access)"
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB286 ,Group Status Bit 286" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB285 ,Group Status Bit 285" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB283 ,Group Status Bit 283" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB282 ,Group Status Bit 282" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB280 ,Group Status Bit 280" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB279 ,Group Status Bit 279" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB277 ,Group Status Bit 277" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB276 ,Group Status Bit 276" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB274 ,Group Status Bit 274" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB273 ,Group Status Bit 273" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB271 ,Group Status Bit 271" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB270 ,Group Status Bit 270" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB268 ,Group Status Bit 268" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB267 ,Group Status Bit 267" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB265 ,Group Status Bit 265" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB264 ,Group Status Bit 264" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB262 ,Group Status Bit 262" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB261 ,Group Status Bit 261" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB259 ,Group Status Bit 259" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB258 ,Group Status Bit 258" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB256 ,Group Status Bit 256" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB286 ,Group Status Bit 286" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB285 ,Group Status Bit 285" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB283 ,Group Status Bit 283" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB282 ,Group Status Bit 282" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB280 ,Group Status Bit 280" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB279 ,Group Status Bit 279" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB277 ,Group Status Bit 277" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB276 ,Group Status Bit 276" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB274 ,Group Status Bit 274" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB273 ,Group Status Bit 273" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB271 ,Group Status Bit 271" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB270 ,Group Status Bit 270" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB268 ,Group Status Bit 268" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB267 ,Group Status Bit 267" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB265 ,Group Status Bit 265" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB264 ,Group Status Bit 264" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB262 ,Group Status Bit 262" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB261 ,Group Status Bit 261" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB259 ,Group Status Bit 259" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB258 ,Group Status Bit 258" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB256 ,Group Status Bit 256" "Group 0,Group 1"
else
hgroup.long 0x00A0++0x03
hide.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 (Secure Access)"
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB318 ,Group Status Bit 318" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB317 ,Group Status Bit 317" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB315 ,Group Status Bit 315" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB314 ,Group Status Bit 314" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB312 ,Group Status Bit 312" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB311 ,Group Status Bit 311" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB309 ,Group Status Bit 309" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB308 ,Group Status Bit 308" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB306 ,Group Status Bit 306" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB305 ,Group Status Bit 305" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB303 ,Group Status Bit 303" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB302 ,Group Status Bit 302" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB300 ,Group Status Bit 300" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB299 ,Group Status Bit 299" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB297 ,Group Status Bit 297" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB296 ,Group Status Bit 296" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB294 ,Group Status Bit 294" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB293 ,Group Status Bit 293" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB291 ,Group Status Bit 291" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB290 ,Group Status Bit 290" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB288 ,Group Status Bit 288" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB318 ,Group Status Bit 318" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB317 ,Group Status Bit 317" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB315 ,Group Status Bit 315" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB314 ,Group Status Bit 314" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB312 ,Group Status Bit 312" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB311 ,Group Status Bit 311" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB309 ,Group Status Bit 309" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB308 ,Group Status Bit 308" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB306 ,Group Status Bit 306" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB305 ,Group Status Bit 305" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB303 ,Group Status Bit 303" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB302 ,Group Status Bit 302" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB300 ,Group Status Bit 300" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB299 ,Group Status Bit 299" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB297 ,Group Status Bit 297" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB296 ,Group Status Bit 296" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB294 ,Group Status Bit 294" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB293 ,Group Status Bit 293" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB291 ,Group Status Bit 291" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB290 ,Group Status Bit 290" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB288 ,Group Status Bit 288" "Group 0,Group 1"
else
hgroup.long 0x00A4++0x03
hide.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure Access)"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB350 ,Group Status Bit 350" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB349 ,Group Status Bit 349" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB347 ,Group Status Bit 347" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB346 ,Group Status Bit 346" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB344 ,Group Status Bit 344" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB343 ,Group Status Bit 343" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB341 ,Group Status Bit 341" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB340 ,Group Status Bit 340" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB338 ,Group Status Bit 338" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB337 ,Group Status Bit 337" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB335 ,Group Status Bit 335" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB334 ,Group Status Bit 334" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB332 ,Group Status Bit 332" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB331 ,Group Status Bit 331" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB329 ,Group Status Bit 329" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB328 ,Group Status Bit 328" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB326 ,Group Status Bit 326" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB325 ,Group Status Bit 325" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB323 ,Group Status Bit 323" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB322 ,Group Status Bit 322" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB320 ,Group Status Bit 320" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB350 ,Group Status Bit 350" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB349 ,Group Status Bit 349" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB347 ,Group Status Bit 347" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB346 ,Group Status Bit 346" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB344 ,Group Status Bit 344" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB343 ,Group Status Bit 343" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB341 ,Group Status Bit 341" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB340 ,Group Status Bit 340" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB338 ,Group Status Bit 338" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB337 ,Group Status Bit 337" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB335 ,Group Status Bit 335" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB334 ,Group Status Bit 334" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB332 ,Group Status Bit 332" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB331 ,Group Status Bit 331" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB329 ,Group Status Bit 329" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB328 ,Group Status Bit 328" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB326 ,Group Status Bit 326" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB325 ,Group Status Bit 325" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB323 ,Group Status Bit 323" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB322 ,Group Status Bit 322" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB320 ,Group Status Bit 320" "Group 0,Group 1"
else
hgroup.long 0x00A8++0x03
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xAC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure Access)"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB382 ,Group Status Bit 382" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB381 ,Group Status Bit 381" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB379 ,Group Status Bit 379" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB378 ,Group Status Bit 378" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB376 ,Group Status Bit 376" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB375 ,Group Status Bit 375" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB373 ,Group Status Bit 373" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB372 ,Group Status Bit 372" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB370 ,Group Status Bit 370" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB369 ,Group Status Bit 369" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB367 ,Group Status Bit 367" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB366 ,Group Status Bit 366" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB364 ,Group Status Bit 364" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB363 ,Group Status Bit 363" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB361 ,Group Status Bit 361" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB360 ,Group Status Bit 360" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB358 ,Group Status Bit 358" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB357 ,Group Status Bit 357" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB355 ,Group Status Bit 355" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB354 ,Group Status Bit 354" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB352 ,Group Status Bit 352" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB382 ,Group Status Bit 382" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB381 ,Group Status Bit 381" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB379 ,Group Status Bit 379" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB378 ,Group Status Bit 378" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB376 ,Group Status Bit 376" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB375 ,Group Status Bit 375" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB373 ,Group Status Bit 373" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB372 ,Group Status Bit 372" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB370 ,Group Status Bit 370" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB369 ,Group Status Bit 369" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB367 ,Group Status Bit 367" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB366 ,Group Status Bit 366" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB364 ,Group Status Bit 364" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB363 ,Group Status Bit 363" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB361 ,Group Status Bit 361" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB360 ,Group Status Bit 360" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB358 ,Group Status Bit 358" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB357 ,Group Status Bit 357" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB355 ,Group Status Bit 355" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB354 ,Group Status Bit 354" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB352 ,Group Status Bit 352" "Group 0,Group 1"
else
hgroup.long 0x00AC++0x03
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure Access)"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB414 ,Group Status Bit 414" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB413 ,Group Status Bit 413" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB411 ,Group Status Bit 411" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB410 ,Group Status Bit 410" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB408 ,Group Status Bit 408" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB407 ,Group Status Bit 407" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB405 ,Group Status Bit 405" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB404 ,Group Status Bit 404" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB402 ,Group Status Bit 402" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB401 ,Group Status Bit 401" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB399 ,Group Status Bit 399" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB398 ,Group Status Bit 398" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB396 ,Group Status Bit 396" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB395 ,Group Status Bit 395" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB393 ,Group Status Bit 393" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB392 ,Group Status Bit 392" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB390 ,Group Status Bit 390" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB389 ,Group Status Bit 389" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB387 ,Group Status Bit 387" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB386 ,Group Status Bit 386" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB384 ,Group Status Bit 384" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB414 ,Group Status Bit 414" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB413 ,Group Status Bit 413" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB411 ,Group Status Bit 411" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB410 ,Group Status Bit 410" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB408 ,Group Status Bit 408" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB407 ,Group Status Bit 407" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB405 ,Group Status Bit 405" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB404 ,Group Status Bit 404" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB402 ,Group Status Bit 402" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB401 ,Group Status Bit 401" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB399 ,Group Status Bit 399" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB398 ,Group Status Bit 398" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB396 ,Group Status Bit 396" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB395 ,Group Status Bit 395" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB393 ,Group Status Bit 393" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB392 ,Group Status Bit 392" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB390 ,Group Status Bit 390" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB389 ,Group Status Bit 389" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB387 ,Group Status Bit 387" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB386 ,Group Status Bit 386" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB384 ,Group Status Bit 384" "Group 0,Group 1"
else
hgroup.long 0x00B0++0x03
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure Access)"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB446 ,Group Status Bit 446" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB445 ,Group Status Bit 445" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB443 ,Group Status Bit 443" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB442 ,Group Status Bit 442" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB440 ,Group Status Bit 440" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB439 ,Group Status Bit 439" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB437 ,Group Status Bit 437" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB436 ,Group Status Bit 436" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB434 ,Group Status Bit 434" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB433 ,Group Status Bit 433" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB431 ,Group Status Bit 431" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB430 ,Group Status Bit 430" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB428 ,Group Status Bit 428" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB427 ,Group Status Bit 427" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB425 ,Group Status Bit 425" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB424 ,Group Status Bit 424" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB422 ,Group Status Bit 422" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB421 ,Group Status Bit 421" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB419 ,Group Status Bit 419" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB418 ,Group Status Bit 418" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB416 ,Group Status Bit 416" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB446 ,Group Status Bit 446" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB445 ,Group Status Bit 445" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB443 ,Group Status Bit 443" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB442 ,Group Status Bit 442" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB440 ,Group Status Bit 440" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB439 ,Group Status Bit 439" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB437 ,Group Status Bit 437" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB436 ,Group Status Bit 436" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB434 ,Group Status Bit 434" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB433 ,Group Status Bit 433" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB431 ,Group Status Bit 431" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB430 ,Group Status Bit 430" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB428 ,Group Status Bit 428" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB427 ,Group Status Bit 427" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB425 ,Group Status Bit 425" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB424 ,Group Status Bit 424" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB422 ,Group Status Bit 422" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB421 ,Group Status Bit 421" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB419 ,Group Status Bit 419" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB418 ,Group Status Bit 418" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB416 ,Group Status Bit 416" "Group 0,Group 1"
else
hgroup.long 0x00B4++0x03
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure Access)"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB478 ,Group Status Bit 478" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB477 ,Group Status Bit 477" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB475 ,Group Status Bit 475" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB474 ,Group Status Bit 474" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB472 ,Group Status Bit 472" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB471 ,Group Status Bit 471" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB469 ,Group Status Bit 469" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB468 ,Group Status Bit 468" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB466 ,Group Status Bit 466" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB465 ,Group Status Bit 465" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB463 ,Group Status Bit 463" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB462 ,Group Status Bit 462" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB460 ,Group Status Bit 460" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB459 ,Group Status Bit 459" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB457 ,Group Status Bit 457" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB456 ,Group Status Bit 456" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB454 ,Group Status Bit 454" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB453 ,Group Status Bit 453" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB451 ,Group Status Bit 451" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB450 ,Group Status Bit 450" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB448 ,Group Status Bit 448" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB478 ,Group Status Bit 478" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB477 ,Group Status Bit 477" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB475 ,Group Status Bit 475" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB474 ,Group Status Bit 474" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB472 ,Group Status Bit 472" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB471 ,Group Status Bit 471" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB469 ,Group Status Bit 469" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB468 ,Group Status Bit 468" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB466 ,Group Status Bit 466" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB465 ,Group Status Bit 465" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB463 ,Group Status Bit 463" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB462 ,Group Status Bit 462" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB460 ,Group Status Bit 460" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB459 ,Group Status Bit 459" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB457 ,Group Status Bit 457" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB456 ,Group Status Bit 456" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB454 ,Group Status Bit 454" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB453 ,Group Status Bit 453" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB451 ,Group Status Bit 451" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB450 ,Group Status Bit 450" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB448 ,Group Status Bit 448" "Group 0,Group 1"
else
hgroup.long 0x00B8++0x03
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xBC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure Access)"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB510 ,Group Status Bit 510" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB509 ,Group Status Bit 509" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB507 ,Group Status Bit 507" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB506 ,Group Status Bit 506" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB504 ,Group Status Bit 504" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB503 ,Group Status Bit 503" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB501 ,Group Status Bit 501" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB500 ,Group Status Bit 500" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB498 ,Group Status Bit 498" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB497 ,Group Status Bit 497" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB495 ,Group Status Bit 495" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB494 ,Group Status Bit 494" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB492 ,Group Status Bit 492" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB491 ,Group Status Bit 491" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB489 ,Group Status Bit 489" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB488 ,Group Status Bit 488" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB486 ,Group Status Bit 486" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB485 ,Group Status Bit 485" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB483 ,Group Status Bit 483" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB482 ,Group Status Bit 482" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB480 ,Group Status Bit 480" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB510 ,Group Status Bit 510" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB509 ,Group Status Bit 509" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB507 ,Group Status Bit 507" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB506 ,Group Status Bit 506" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB504 ,Group Status Bit 504" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB503 ,Group Status Bit 503" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB501 ,Group Status Bit 501" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB500 ,Group Status Bit 500" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB498 ,Group Status Bit 498" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB497 ,Group Status Bit 497" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB495 ,Group Status Bit 495" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB494 ,Group Status Bit 494" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB492 ,Group Status Bit 492" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB491 ,Group Status Bit 491" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB489 ,Group Status Bit 489" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB488 ,Group Status Bit 488" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB486 ,Group Status Bit 486" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB485 ,Group Status Bit 485" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB483 ,Group Status Bit 483" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB482 ,Group Status Bit 482" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB480 ,Group Status Bit 480" "Group 0,Group 1"
else
hgroup.long 0x00BC++0x03
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure Access)"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB542 ,Group Status Bit 542" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB541 ,Group Status Bit 541" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB539 ,Group Status Bit 539" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB538 ,Group Status Bit 538" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB536 ,Group Status Bit 536" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB535 ,Group Status Bit 535" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB533 ,Group Status Bit 533" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB532 ,Group Status Bit 532" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB530 ,Group Status Bit 530" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB529 ,Group Status Bit 529" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB527 ,Group Status Bit 527" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB526 ,Group Status Bit 526" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB524 ,Group Status Bit 524" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB523 ,Group Status Bit 523" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB521 ,Group Status Bit 521" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB520 ,Group Status Bit 520" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB518 ,Group Status Bit 518" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB517 ,Group Status Bit 517" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB515 ,Group Status Bit 515" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB514 ,Group Status Bit 514" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB512 ,Group Status Bit 512" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB542 ,Group Status Bit 542" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB541 ,Group Status Bit 541" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB539 ,Group Status Bit 539" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB538 ,Group Status Bit 538" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB536 ,Group Status Bit 536" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB535 ,Group Status Bit 535" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB533 ,Group Status Bit 533" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB532 ,Group Status Bit 532" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB530 ,Group Status Bit 530" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB529 ,Group Status Bit 529" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB527 ,Group Status Bit 527" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB526 ,Group Status Bit 526" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB524 ,Group Status Bit 524" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB523 ,Group Status Bit 523" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB521 ,Group Status Bit 521" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB520 ,Group Status Bit 520" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB518 ,Group Status Bit 518" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB517 ,Group Status Bit 517" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB515 ,Group Status Bit 515" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB514 ,Group Status Bit 514" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB512 ,Group Status Bit 512" "Group 0,Group 1"
else
hgroup.long 0x00C0++0x03
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure Access)"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB574 ,Group Status Bit 574" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB573 ,Group Status Bit 573" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB571 ,Group Status Bit 571" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB570 ,Group Status Bit 570" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB568 ,Group Status Bit 568" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB567 ,Group Status Bit 567" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB565 ,Group Status Bit 565" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB564 ,Group Status Bit 564" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB562 ,Group Status Bit 562" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB561 ,Group Status Bit 561" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB559 ,Group Status Bit 559" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB558 ,Group Status Bit 558" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB556 ,Group Status Bit 556" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB555 ,Group Status Bit 555" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB553 ,Group Status Bit 553" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB552 ,Group Status Bit 552" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB550 ,Group Status Bit 550" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB549 ,Group Status Bit 549" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB547 ,Group Status Bit 547" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB546 ,Group Status Bit 546" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB544 ,Group Status Bit 544" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB574 ,Group Status Bit 574" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB573 ,Group Status Bit 573" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB571 ,Group Status Bit 571" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB570 ,Group Status Bit 570" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB568 ,Group Status Bit 568" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB567 ,Group Status Bit 567" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB565 ,Group Status Bit 565" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB564 ,Group Status Bit 564" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB562 ,Group Status Bit 562" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB561 ,Group Status Bit 561" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB559 ,Group Status Bit 559" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB558 ,Group Status Bit 558" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB556 ,Group Status Bit 556" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB555 ,Group Status Bit 555" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB553 ,Group Status Bit 553" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB552 ,Group Status Bit 552" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB550 ,Group Status Bit 550" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB549 ,Group Status Bit 549" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB547 ,Group Status Bit 547" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB546 ,Group Status Bit 546" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB544 ,Group Status Bit 544" "Group 0,Group 1"
else
hgroup.long 0x00C4++0x03
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure Access)"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB606 ,Group Status Bit 606" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB605 ,Group Status Bit 605" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB603 ,Group Status Bit 603" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB602 ,Group Status Bit 602" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB600 ,Group Status Bit 600" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB599 ,Group Status Bit 599" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB597 ,Group Status Bit 597" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB596 ,Group Status Bit 596" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB594 ,Group Status Bit 594" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB593 ,Group Status Bit 593" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB591 ,Group Status Bit 591" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB590 ,Group Status Bit 590" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB588 ,Group Status Bit 588" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB587 ,Group Status Bit 587" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB585 ,Group Status Bit 585" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB584 ,Group Status Bit 584" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB582 ,Group Status Bit 582" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB581 ,Group Status Bit 581" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB579 ,Group Status Bit 579" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB578 ,Group Status Bit 578" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB576 ,Group Status Bit 576" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB606 ,Group Status Bit 606" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB605 ,Group Status Bit 605" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB603 ,Group Status Bit 603" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB602 ,Group Status Bit 602" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB600 ,Group Status Bit 600" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB599 ,Group Status Bit 599" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB597 ,Group Status Bit 597" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB596 ,Group Status Bit 596" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB594 ,Group Status Bit 594" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB593 ,Group Status Bit 593" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB591 ,Group Status Bit 591" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB590 ,Group Status Bit 590" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB588 ,Group Status Bit 588" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB587 ,Group Status Bit 587" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB585 ,Group Status Bit 585" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB584 ,Group Status Bit 584" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB582 ,Group Status Bit 582" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB581 ,Group Status Bit 581" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB579 ,Group Status Bit 579" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB578 ,Group Status Bit 578" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB576 ,Group Status Bit 576" "Group 0,Group 1"
else
hgroup.long 0x00C8++0x03
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xCC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure Access)"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB638 ,Group Status Bit 638" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB637 ,Group Status Bit 637" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB635 ,Group Status Bit 635" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB634 ,Group Status Bit 634" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB632 ,Group Status Bit 632" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB631 ,Group Status Bit 631" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB629 ,Group Status Bit 629" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB628 ,Group Status Bit 628" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB626 ,Group Status Bit 626" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB625 ,Group Status Bit 625" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB623 ,Group Status Bit 623" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB622 ,Group Status Bit 622" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB620 ,Group Status Bit 620" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB619 ,Group Status Bit 619" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB617 ,Group Status Bit 617" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB616 ,Group Status Bit 616" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB614 ,Group Status Bit 614" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB613 ,Group Status Bit 613" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB611 ,Group Status Bit 611" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB610 ,Group Status Bit 610" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB608 ,Group Status Bit 608" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB638 ,Group Status Bit 638" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB637 ,Group Status Bit 637" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB635 ,Group Status Bit 635" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB634 ,Group Status Bit 634" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB632 ,Group Status Bit 632" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB631 ,Group Status Bit 631" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB629 ,Group Status Bit 629" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB628 ,Group Status Bit 628" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB626 ,Group Status Bit 626" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB625 ,Group Status Bit 625" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB623 ,Group Status Bit 623" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB622 ,Group Status Bit 622" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB620 ,Group Status Bit 620" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB619 ,Group Status Bit 619" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB617 ,Group Status Bit 617" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB616 ,Group Status Bit 616" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB614 ,Group Status Bit 614" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB613 ,Group Status Bit 613" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB611 ,Group Status Bit 611" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB610 ,Group Status Bit 610" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB608 ,Group Status Bit 608" "Group 0,Group 1"
else
hgroup.long 0x00CC++0x03
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure Access)"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB670 ,Group Status Bit 670" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB669 ,Group Status Bit 669" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB667 ,Group Status Bit 667" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB666 ,Group Status Bit 666" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB664 ,Group Status Bit 664" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB663 ,Group Status Bit 663" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB661 ,Group Status Bit 661" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB660 ,Group Status Bit 660" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB658 ,Group Status Bit 658" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB657 ,Group Status Bit 657" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB655 ,Group Status Bit 655" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB654 ,Group Status Bit 654" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB652 ,Group Status Bit 652" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB651 ,Group Status Bit 651" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB649 ,Group Status Bit 649" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB648 ,Group Status Bit 648" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB646 ,Group Status Bit 646" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB645 ,Group Status Bit 645" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB643 ,Group Status Bit 643" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB642 ,Group Status Bit 642" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB640 ,Group Status Bit 640" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB670 ,Group Status Bit 670" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB669 ,Group Status Bit 669" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB667 ,Group Status Bit 667" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB666 ,Group Status Bit 666" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB664 ,Group Status Bit 664" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB663 ,Group Status Bit 663" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB661 ,Group Status Bit 661" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB660 ,Group Status Bit 660" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB658 ,Group Status Bit 658" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB657 ,Group Status Bit 657" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB655 ,Group Status Bit 655" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB654 ,Group Status Bit 654" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB652 ,Group Status Bit 652" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB651 ,Group Status Bit 651" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB649 ,Group Status Bit 649" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB648 ,Group Status Bit 648" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB646 ,Group Status Bit 646" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB645 ,Group Status Bit 645" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB643 ,Group Status Bit 643" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB642 ,Group Status Bit 642" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB640 ,Group Status Bit 640" "Group 0,Group 1"
else
hgroup.long 0x00D0++0x03
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure Access)"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB702 ,Group Status Bit 702" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB701 ,Group Status Bit 701" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB699 ,Group Status Bit 699" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB698 ,Group Status Bit 698" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB696 ,Group Status Bit 696" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB695 ,Group Status Bit 695" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB693 ,Group Status Bit 693" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB692 ,Group Status Bit 692" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB690 ,Group Status Bit 690" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB689 ,Group Status Bit 689" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB687 ,Group Status Bit 687" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB686 ,Group Status Bit 686" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB684 ,Group Status Bit 684" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB683 ,Group Status Bit 683" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB681 ,Group Status Bit 681" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB680 ,Group Status Bit 680" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB678 ,Group Status Bit 678" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB677 ,Group Status Bit 677" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB675 ,Group Status Bit 675" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB674 ,Group Status Bit 674" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB672 ,Group Status Bit 672" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB702 ,Group Status Bit 702" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB701 ,Group Status Bit 701" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB699 ,Group Status Bit 699" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB698 ,Group Status Bit 698" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB696 ,Group Status Bit 696" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB695 ,Group Status Bit 695" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB693 ,Group Status Bit 693" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB692 ,Group Status Bit 692" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB690 ,Group Status Bit 690" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB689 ,Group Status Bit 689" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB687 ,Group Status Bit 687" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB686 ,Group Status Bit 686" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB684 ,Group Status Bit 684" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB683 ,Group Status Bit 683" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB681 ,Group Status Bit 681" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB680 ,Group Status Bit 680" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB678 ,Group Status Bit 678" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB677 ,Group Status Bit 677" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB675 ,Group Status Bit 675" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB674 ,Group Status Bit 674" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB672 ,Group Status Bit 672" "Group 0,Group 1"
else
hgroup.long 0x00D4++0x03
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure Access)"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB734 ,Group Status Bit 734" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB733 ,Group Status Bit 733" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB731 ,Group Status Bit 731" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB730 ,Group Status Bit 730" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB728 ,Group Status Bit 728" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB727 ,Group Status Bit 727" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB725 ,Group Status Bit 725" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB724 ,Group Status Bit 724" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB722 ,Group Status Bit 722" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB721 ,Group Status Bit 721" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB719 ,Group Status Bit 719" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB718 ,Group Status Bit 718" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB716 ,Group Status Bit 716" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB715 ,Group Status Bit 715" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB713 ,Group Status Bit 713" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB712 ,Group Status Bit 712" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB710 ,Group Status Bit 710" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB709 ,Group Status Bit 709" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB707 ,Group Status Bit 707" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB706 ,Group Status Bit 706" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB704 ,Group Status Bit 704" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB734 ,Group Status Bit 734" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB733 ,Group Status Bit 733" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB731 ,Group Status Bit 731" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB730 ,Group Status Bit 730" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB728 ,Group Status Bit 728" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB727 ,Group Status Bit 727" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB725 ,Group Status Bit 725" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB724 ,Group Status Bit 724" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB722 ,Group Status Bit 722" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB721 ,Group Status Bit 721" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB719 ,Group Status Bit 719" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB718 ,Group Status Bit 718" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB716 ,Group Status Bit 716" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB715 ,Group Status Bit 715" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB713 ,Group Status Bit 713" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB712 ,Group Status Bit 712" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB710 ,Group Status Bit 710" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB709 ,Group Status Bit 709" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB707 ,Group Status Bit 707" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB706 ,Group Status Bit 706" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB704 ,Group Status Bit 704" "Group 0,Group 1"
else
hgroup.long 0x00D8++0x03
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xDC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure Access)"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB766 ,Group Status Bit 766" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB765 ,Group Status Bit 765" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB763 ,Group Status Bit 763" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB762 ,Group Status Bit 762" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB760 ,Group Status Bit 760" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB759 ,Group Status Bit 759" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB757 ,Group Status Bit 757" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB756 ,Group Status Bit 756" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB754 ,Group Status Bit 754" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB753 ,Group Status Bit 753" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB751 ,Group Status Bit 751" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB750 ,Group Status Bit 750" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB748 ,Group Status Bit 748" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB747 ,Group Status Bit 747" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB745 ,Group Status Bit 745" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB744 ,Group Status Bit 744" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB742 ,Group Status Bit 742" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB741 ,Group Status Bit 741" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB739 ,Group Status Bit 739" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB738 ,Group Status Bit 738" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB736 ,Group Status Bit 736" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB766 ,Group Status Bit 766" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB765 ,Group Status Bit 765" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB763 ,Group Status Bit 763" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB762 ,Group Status Bit 762" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB760 ,Group Status Bit 760" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB759 ,Group Status Bit 759" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB757 ,Group Status Bit 757" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB756 ,Group Status Bit 756" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB754 ,Group Status Bit 754" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB753 ,Group Status Bit 753" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB751 ,Group Status Bit 751" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB750 ,Group Status Bit 750" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB748 ,Group Status Bit 748" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB747 ,Group Status Bit 747" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB745 ,Group Status Bit 745" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB744 ,Group Status Bit 744" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB742 ,Group Status Bit 742" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB741 ,Group Status Bit 741" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB739 ,Group Status Bit 739" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB738 ,Group Status Bit 738" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB736 ,Group Status Bit 736" "Group 0,Group 1"
else
hgroup.long 0x00DC++0x03
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure Access)"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB798 ,Group Status Bit 798" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB797 ,Group Status Bit 797" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB795 ,Group Status Bit 795" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB794 ,Group Status Bit 794" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB792 ,Group Status Bit 792" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB791 ,Group Status Bit 791" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB789 ,Group Status Bit 789" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB788 ,Group Status Bit 788" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB786 ,Group Status Bit 786" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB785 ,Group Status Bit 785" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB783 ,Group Status Bit 783" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB782 ,Group Status Bit 782" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB780 ,Group Status Bit 780" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB779 ,Group Status Bit 779" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB777 ,Group Status Bit 777" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB776 ,Group Status Bit 776" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB774 ,Group Status Bit 774" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB773 ,Group Status Bit 773" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB771 ,Group Status Bit 771" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB770 ,Group Status Bit 770" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB768 ,Group Status Bit 768" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB798 ,Group Status Bit 798" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB797 ,Group Status Bit 797" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB795 ,Group Status Bit 795" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB794 ,Group Status Bit 794" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB792 ,Group Status Bit 792" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB791 ,Group Status Bit 791" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB789 ,Group Status Bit 789" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB788 ,Group Status Bit 788" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB786 ,Group Status Bit 786" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB785 ,Group Status Bit 785" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB783 ,Group Status Bit 783" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB782 ,Group Status Bit 782" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB780 ,Group Status Bit 780" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB779 ,Group Status Bit 779" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB777 ,Group Status Bit 777" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB776 ,Group Status Bit 776" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB774 ,Group Status Bit 774" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB773 ,Group Status Bit 773" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB771 ,Group Status Bit 771" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB770 ,Group Status Bit 770" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB768 ,Group Status Bit 768" "Group 0,Group 1"
else
hgroup.long 0x00E0++0x03
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure Access)"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB830 ,Group Status Bit 830" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB829 ,Group Status Bit 829" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB827 ,Group Status Bit 827" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB826 ,Group Status Bit 826" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB824 ,Group Status Bit 824" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB823 ,Group Status Bit 823" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB821 ,Group Status Bit 821" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB820 ,Group Status Bit 820" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB818 ,Group Status Bit 818" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB817 ,Group Status Bit 817" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB815 ,Group Status Bit 815" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB814 ,Group Status Bit 814" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB812 ,Group Status Bit 812" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB811 ,Group Status Bit 811" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB809 ,Group Status Bit 809" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB808 ,Group Status Bit 808" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB806 ,Group Status Bit 806" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB805 ,Group Status Bit 805" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB803 ,Group Status Bit 803" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB802 ,Group Status Bit 802" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB800 ,Group Status Bit 800" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB830 ,Group Status Bit 830" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB829 ,Group Status Bit 829" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB827 ,Group Status Bit 827" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB826 ,Group Status Bit 826" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB824 ,Group Status Bit 824" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB823 ,Group Status Bit 823" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB821 ,Group Status Bit 821" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB820 ,Group Status Bit 820" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB818 ,Group Status Bit 818" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB817 ,Group Status Bit 817" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB815 ,Group Status Bit 815" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB814 ,Group Status Bit 814" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB812 ,Group Status Bit 812" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB811 ,Group Status Bit 811" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB809 ,Group Status Bit 809" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB808 ,Group Status Bit 808" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB806 ,Group Status Bit 806" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB805 ,Group Status Bit 805" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB803 ,Group Status Bit 803" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB802 ,Group Status Bit 802" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB800 ,Group Status Bit 800" "Group 0,Group 1"
else
hgroup.long 0x00E4++0x03
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure Access)"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB862 ,Group Status Bit 862" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB861 ,Group Status Bit 861" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB859 ,Group Status Bit 859" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB858 ,Group Status Bit 858" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB856 ,Group Status Bit 856" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB855 ,Group Status Bit 855" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB853 ,Group Status Bit 853" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB852 ,Group Status Bit 852" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB850 ,Group Status Bit 850" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB849 ,Group Status Bit 849" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB847 ,Group Status Bit 847" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB846 ,Group Status Bit 846" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB844 ,Group Status Bit 844" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB843 ,Group Status Bit 843" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB841 ,Group Status Bit 841" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB840 ,Group Status Bit 840" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB838 ,Group Status Bit 838" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB837 ,Group Status Bit 837" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB835 ,Group Status Bit 835" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB834 ,Group Status Bit 834" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB832 ,Group Status Bit 832" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB862 ,Group Status Bit 862" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB861 ,Group Status Bit 861" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB859 ,Group Status Bit 859" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB858 ,Group Status Bit 858" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB856 ,Group Status Bit 856" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB855 ,Group Status Bit 855" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB853 ,Group Status Bit 853" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB852 ,Group Status Bit 852" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB850 ,Group Status Bit 850" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB849 ,Group Status Bit 849" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB847 ,Group Status Bit 847" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB846 ,Group Status Bit 846" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB844 ,Group Status Bit 844" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB843 ,Group Status Bit 843" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB841 ,Group Status Bit 841" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB840 ,Group Status Bit 840" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB838 ,Group Status Bit 838" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB837 ,Group Status Bit 837" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB835 ,Group Status Bit 835" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB834 ,Group Status Bit 834" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB832 ,Group Status Bit 832" "Group 0,Group 1"
else
hgroup.long 0x00E8++0x03
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure Access)"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB894 ,Group Status Bit 894" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB893 ,Group Status Bit 893" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB891 ,Group Status Bit 891" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB890 ,Group Status Bit 890" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB888 ,Group Status Bit 888" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB887 ,Group Status Bit 887" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB885 ,Group Status Bit 885" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB884 ,Group Status Bit 884" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB882 ,Group Status Bit 882" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB881 ,Group Status Bit 881" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB879 ,Group Status Bit 879" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB878 ,Group Status Bit 878" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB876 ,Group Status Bit 876" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB875 ,Group Status Bit 875" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB873 ,Group Status Bit 873" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB872 ,Group Status Bit 872" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB870 ,Group Status Bit 870" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB869 ,Group Status Bit 869" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB867 ,Group Status Bit 867" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB866 ,Group Status Bit 866" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB864 ,Group Status Bit 864" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB894 ,Group Status Bit 894" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB893 ,Group Status Bit 893" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB891 ,Group Status Bit 891" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB890 ,Group Status Bit 890" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB888 ,Group Status Bit 888" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB887 ,Group Status Bit 887" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB885 ,Group Status Bit 885" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB884 ,Group Status Bit 884" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB882 ,Group Status Bit 882" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB881 ,Group Status Bit 881" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB879 ,Group Status Bit 879" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB878 ,Group Status Bit 878" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB876 ,Group Status Bit 876" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB875 ,Group Status Bit 875" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB873 ,Group Status Bit 873" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB872 ,Group Status Bit 872" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB870 ,Group Status Bit 870" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB869 ,Group Status Bit 869" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB867 ,Group Status Bit 867" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB866 ,Group Status Bit 866" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB864 ,Group Status Bit 864" "Group 0,Group 1"
else
hgroup.long 0x00EC++0x03
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure Access)"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB926 ,Group Status Bit 926" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB925 ,Group Status Bit 925" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB923 ,Group Status Bit 923" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB922 ,Group Status Bit 922" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB920 ,Group Status Bit 920" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB919 ,Group Status Bit 919" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB917 ,Group Status Bit 917" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB916 ,Group Status Bit 916" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB914 ,Group Status Bit 914" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB913 ,Group Status Bit 913" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB911 ,Group Status Bit 911" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB910 ,Group Status Bit 910" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB908 ,Group Status Bit 908" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB907 ,Group Status Bit 907" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB905 ,Group Status Bit 905" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB904 ,Group Status Bit 904" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB902 ,Group Status Bit 902" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB901 ,Group Status Bit 901" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB899 ,Group Status Bit 899" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB898 ,Group Status Bit 898" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB896 ,Group Status Bit 896" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB926 ,Group Status Bit 926" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB925 ,Group Status Bit 925" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB923 ,Group Status Bit 923" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB922 ,Group Status Bit 922" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB920 ,Group Status Bit 920" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB919 ,Group Status Bit 919" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB917 ,Group Status Bit 917" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB916 ,Group Status Bit 916" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB914 ,Group Status Bit 914" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB913 ,Group Status Bit 913" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB911 ,Group Status Bit 911" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB910 ,Group Status Bit 910" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB908 ,Group Status Bit 908" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB907 ,Group Status Bit 907" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB905 ,Group Status Bit 905" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB904 ,Group Status Bit 904" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB902 ,Group Status Bit 902" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB901 ,Group Status Bit 901" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB899 ,Group Status Bit 899" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB898 ,Group Status Bit 898" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB896 ,Group Status Bit 896" "Group 0,Group 1"
else
hgroup.long 0x00F0++0x03
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure Access)"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB958 ,Group Status Bit 958" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB957 ,Group Status Bit 957" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB955 ,Group Status Bit 955" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB954 ,Group Status Bit 954" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB952 ,Group Status Bit 952" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB951 ,Group Status Bit 951" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB949 ,Group Status Bit 949" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB948 ,Group Status Bit 948" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB946 ,Group Status Bit 946" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB945 ,Group Status Bit 945" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB943 ,Group Status Bit 943" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB942 ,Group Status Bit 942" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB940 ,Group Status Bit 940" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB939 ,Group Status Bit 939" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB937 ,Group Status Bit 937" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB936 ,Group Status Bit 936" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB934 ,Group Status Bit 934" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB933 ,Group Status Bit 933" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB931 ,Group Status Bit 931" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB930 ,Group Status Bit 930" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB928 ,Group Status Bit 928" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB958 ,Group Status Bit 958" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB957 ,Group Status Bit 957" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB955 ,Group Status Bit 955" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB954 ,Group Status Bit 954" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB952 ,Group Status Bit 952" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB951 ,Group Status Bit 951" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB949 ,Group Status Bit 949" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB948 ,Group Status Bit 948" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB946 ,Group Status Bit 946" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB945 ,Group Status Bit 945" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB943 ,Group Status Bit 943" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB942 ,Group Status Bit 942" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB940 ,Group Status Bit 940" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB939 ,Group Status Bit 939" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB937 ,Group Status Bit 937" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB936 ,Group Status Bit 936" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB934 ,Group Status Bit 934" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB933 ,Group Status Bit 933" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB931 ,Group Status Bit 931" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB930 ,Group Status Bit 930" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB928 ,Group Status Bit 928" "Group 0,Group 1"
else
hgroup.long 0x00F4++0x03
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure Access)"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB990 ,Group Status Bit 990" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB989 ,Group Status Bit 989" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB987 ,Group Status Bit 987" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB986 ,Group Status Bit 986" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB984 ,Group Status Bit 984" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB983 ,Group Status Bit 983" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB981 ,Group Status Bit 981" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB980 ,Group Status Bit 980" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB978 ,Group Status Bit 978" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB977 ,Group Status Bit 977" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB975 ,Group Status Bit 975" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB974 ,Group Status Bit 974" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB972 ,Group Status Bit 972" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB971 ,Group Status Bit 971" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB969 ,Group Status Bit 969" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB968 ,Group Status Bit 968" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB966 ,Group Status Bit 966" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB965 ,Group Status Bit 965" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB963 ,Group Status Bit 963" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB962 ,Group Status Bit 962" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB960 ,Group Status Bit 960" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB990 ,Group Status Bit 990" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB989 ,Group Status Bit 989" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB987 ,Group Status Bit 987" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB986 ,Group Status Bit 986" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB984 ,Group Status Bit 984" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB983 ,Group Status Bit 983" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB981 ,Group Status Bit 981" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB980 ,Group Status Bit 980" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB978 ,Group Status Bit 978" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB977 ,Group Status Bit 977" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB975 ,Group Status Bit 975" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB974 ,Group Status Bit 974" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB972 ,Group Status Bit 972" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB971 ,Group Status Bit 971" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB969 ,Group Status Bit 969" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB968 ,Group Status Bit 968" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB966 ,Group Status Bit 966" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB965 ,Group Status Bit 965" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB963 ,Group Status Bit 963" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB962 ,Group Status Bit 962" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB960 ,Group Status Bit 960" "Group 0,Group 1"
else
hgroup.long 0x00F8++0x03
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
endif
tree.end
width 24.
tree "Set/Clear Enable Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0100++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0100++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31   ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB30   ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB29   ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28   ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB27   ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB26   ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25   ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB24   ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB23   ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22   ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB21   ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB20   ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19   ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB18   ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB17   ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16   ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB15   ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB14   ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13   ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB12   ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB11   ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10   ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB9    ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB8    ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7    ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB6    ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB5    ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4    ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB3    ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB2    ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1    ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB0    ,Set/Clear Enable Bit 0" "Disabled,Enabled"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63   ,Set/Clear Enable Bit 63" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB62   ,Set/Clear Enable Bit 62" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB61   ,Set/Clear Enable Bit 61" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60   ,Set/Clear Enable Bit 60" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB59   ,Set/Clear Enable Bit 59" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB58   ,Set/Clear Enable Bit 58" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57   ,Set/Clear Enable Bit 57" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB56   ,Set/Clear Enable Bit 56" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB55   ,Set/Clear Enable Bit 55" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54   ,Set/Clear Enable Bit 54" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB53   ,Set/Clear Enable Bit 53" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB52   ,Set/Clear Enable Bit 52" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51   ,Set/Clear Enable Bit 51" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB50   ,Set/Clear Enable Bit 50" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB49   ,Set/Clear Enable Bit 49" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48   ,Set/Clear Enable Bit 48" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB47   ,Set/Clear Enable Bit 47" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB46   ,Set/Clear Enable Bit 46" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45   ,Set/Clear Enable Bit 45" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB44   ,Set/Clear Enable Bit 44" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB43   ,Set/Clear Enable Bit 43" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42   ,Set/Clear Enable Bit 42" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB41   ,Set/Clear Enable Bit 41" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB40   ,Set/Clear Enable Bit 40" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39   ,Set/Clear Enable Bit 39" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB38   ,Set/Clear Enable Bit 38" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB37   ,Set/Clear Enable Bit 37" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36   ,Set/Clear Enable Bit 36" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB35   ,Set/Clear Enable Bit 35" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB34   ,Set/Clear Enable Bit 34" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33   ,Set/Clear Enable Bit 33" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB32   ,Set/Clear Enable Bit 32" "Disabled,Enabled"
else
hgroup.long 0x0104++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95   ,Set/Clear Enable Bit 95" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB94   ,Set/Clear Enable Bit 94" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB93   ,Set/Clear Enable Bit 93" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92   ,Set/Clear Enable Bit 92" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB91   ,Set/Clear Enable Bit 91" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB90   ,Set/Clear Enable Bit 90" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89   ,Set/Clear Enable Bit 89" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB88   ,Set/Clear Enable Bit 88" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB87   ,Set/Clear Enable Bit 87" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86   ,Set/Clear Enable Bit 86" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB85   ,Set/Clear Enable Bit 85" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB84   ,Set/Clear Enable Bit 84" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83   ,Set/Clear Enable Bit 83" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB82   ,Set/Clear Enable Bit 82" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB81   ,Set/Clear Enable Bit 81" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80   ,Set/Clear Enable Bit 80" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB79   ,Set/Clear Enable Bit 79" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB78   ,Set/Clear Enable Bit 78" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77   ,Set/Clear Enable Bit 77" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB76   ,Set/Clear Enable Bit 76" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB75   ,Set/Clear Enable Bit 75" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74   ,Set/Clear Enable Bit 74" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB73   ,Set/Clear Enable Bit 73" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB72   ,Set/Clear Enable Bit 72" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71   ,Set/Clear Enable Bit 71" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB70   ,Set/Clear Enable Bit 70" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB69   ,Set/Clear Enable Bit 69" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68   ,Set/Clear Enable Bit 68" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB67   ,Set/Clear Enable Bit 67" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB66   ,Set/Clear Enable Bit 66" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65   ,Set/Clear Enable Bit 65" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB64   ,Set/Clear Enable Bit 64" "Disabled,Enabled"
else
hgroup.long 0x0108++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127  ,Set/Clear Enable Bit 127" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB126  ,Set/Clear Enable Bit 126" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB125  ,Set/Clear Enable Bit 125" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124  ,Set/Clear Enable Bit 124" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB123  ,Set/Clear Enable Bit 123" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB122  ,Set/Clear Enable Bit 122" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121  ,Set/Clear Enable Bit 121" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB120  ,Set/Clear Enable Bit 120" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB119  ,Set/Clear Enable Bit 119" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118  ,Set/Clear Enable Bit 118" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB117  ,Set/Clear Enable Bit 117" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB116  ,Set/Clear Enable Bit 116" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115  ,Set/Clear Enable Bit 115" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB114  ,Set/Clear Enable Bit 114" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB113  ,Set/Clear Enable Bit 113" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112  ,Set/Clear Enable Bit 112" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB111  ,Set/Clear Enable Bit 111" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB110  ,Set/Clear Enable Bit 110" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109  ,Set/Clear Enable Bit 109" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB108  ,Set/Clear Enable Bit 108" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB107  ,Set/Clear Enable Bit 107" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106  ,Set/Clear Enable Bit 106" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB105  ,Set/Clear Enable Bit 105" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB104  ,Set/Clear Enable Bit 104" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103  ,Set/Clear Enable Bit 103" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB102  ,Set/Clear Enable Bit 102" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB101  ,Set/Clear Enable Bit 101" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100  ,Set/Clear Enable Bit 100" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB99   ,Set/Clear Enable Bit 99" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB98   ,Set/Clear Enable Bit 98" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97   ,Set/Clear Enable Bit 97" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB96   ,Set/Clear Enable Bit 96" "Disabled,Enabled"
else
hgroup.long 0x010C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159  ,Set/Clear Enable Bit 159" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB158  ,Set/Clear Enable Bit 158" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB157  ,Set/Clear Enable Bit 157" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156  ,Set/Clear Enable Bit 156" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB155  ,Set/Clear Enable Bit 155" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB154  ,Set/Clear Enable Bit 154" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153  ,Set/Clear Enable Bit 153" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB152  ,Set/Clear Enable Bit 152" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB151  ,Set/Clear Enable Bit 151" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150  ,Set/Clear Enable Bit 150" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB149  ,Set/Clear Enable Bit 149" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB148  ,Set/Clear Enable Bit 148" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147  ,Set/Clear Enable Bit 147" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB146  ,Set/Clear Enable Bit 146" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB145  ,Set/Clear Enable Bit 145" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144  ,Set/Clear Enable Bit 144" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB143  ,Set/Clear Enable Bit 143" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB142  ,Set/Clear Enable Bit 142" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141  ,Set/Clear Enable Bit 141" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB140  ,Set/Clear Enable Bit 140" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB139  ,Set/Clear Enable Bit 139" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138  ,Set/Clear Enable Bit 138" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB137  ,Set/Clear Enable Bit 137" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB136  ,Set/Clear Enable Bit 136" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135  ,Set/Clear Enable Bit 135" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB134  ,Set/Clear Enable Bit 134" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB133  ,Set/Clear Enable Bit 133" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132  ,Set/Clear Enable Bit 132" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB131  ,Set/Clear Enable Bit 131" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB130  ,Set/Clear Enable Bit 130" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129  ,Set/Clear Enable Bit 129" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB128  ,Set/Clear Enable Bit 128" "Disabled,Enabled"
else
hgroup.long 0x0110++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191  ,Set/Clear Enable Bit 191" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB190  ,Set/Clear Enable Bit 190" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB189  ,Set/Clear Enable Bit 189" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188  ,Set/Clear Enable Bit 188" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB187  ,Set/Clear Enable Bit 187" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB186  ,Set/Clear Enable Bit 186" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185  ,Set/Clear Enable Bit 185" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB184  ,Set/Clear Enable Bit 184" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB183  ,Set/Clear Enable Bit 183" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182  ,Set/Clear Enable Bit 182" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB181  ,Set/Clear Enable Bit 181" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB180  ,Set/Clear Enable Bit 180" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179  ,Set/Clear Enable Bit 179" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB178  ,Set/Clear Enable Bit 178" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB177  ,Set/Clear Enable Bit 177" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176  ,Set/Clear Enable Bit 176" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB175  ,Set/Clear Enable Bit 175" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB174  ,Set/Clear Enable Bit 174" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173  ,Set/Clear Enable Bit 173" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB172  ,Set/Clear Enable Bit 172" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB171  ,Set/Clear Enable Bit 171" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170  ,Set/Clear Enable Bit 170" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB169  ,Set/Clear Enable Bit 169" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB168  ,Set/Clear Enable Bit 168" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167  ,Set/Clear Enable Bit 167" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB166  ,Set/Clear Enable Bit 166" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB165  ,Set/Clear Enable Bit 165" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164  ,Set/Clear Enable Bit 164" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB163  ,Set/Clear Enable Bit 163" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB162  ,Set/Clear Enable Bit 162" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161  ,Set/Clear Enable Bit 161" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB160  ,Set/Clear Enable Bit 160" "Disabled,Enabled"
else
hgroup.long 0x0114++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223  ,Set/Clear Enable Bit 223" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB222  ,Set/Clear Enable Bit 222" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB221  ,Set/Clear Enable Bit 221" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220  ,Set/Clear Enable Bit 220" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB219  ,Set/Clear Enable Bit 219" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB218  ,Set/Clear Enable Bit 218" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217  ,Set/Clear Enable Bit 217" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB216  ,Set/Clear Enable Bit 216" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB215  ,Set/Clear Enable Bit 215" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214  ,Set/Clear Enable Bit 214" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB213  ,Set/Clear Enable Bit 213" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB212  ,Set/Clear Enable Bit 212" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211  ,Set/Clear Enable Bit 211" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB210  ,Set/Clear Enable Bit 210" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB209  ,Set/Clear Enable Bit 209" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208  ,Set/Clear Enable Bit 208" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB207  ,Set/Clear Enable Bit 207" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB206  ,Set/Clear Enable Bit 206" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205  ,Set/Clear Enable Bit 205" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB204  ,Set/Clear Enable Bit 204" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB203  ,Set/Clear Enable Bit 203" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202  ,Set/Clear Enable Bit 202" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB201  ,Set/Clear Enable Bit 201" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB200  ,Set/Clear Enable Bit 200" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199  ,Set/Clear Enable Bit 199" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB198  ,Set/Clear Enable Bit 198" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB197  ,Set/Clear Enable Bit 197" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196  ,Set/Clear Enable Bit 196" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB195  ,Set/Clear Enable Bit 195" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB194  ,Set/Clear Enable Bit 194" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193  ,Set/Clear Enable Bit 193" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB192  ,Set/Clear Enable Bit 192" "Disabled,Enabled"
else
hgroup.long 0x0118++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255  ,Set/Clear Enable Bit 255" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB254  ,Set/Clear Enable Bit 254" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB253  ,Set/Clear Enable Bit 253" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252  ,Set/Clear Enable Bit 252" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB251  ,Set/Clear Enable Bit 251" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB250  ,Set/Clear Enable Bit 250" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249  ,Set/Clear Enable Bit 249" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB248  ,Set/Clear Enable Bit 248" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB247  ,Set/Clear Enable Bit 247" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246  ,Set/Clear Enable Bit 246" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB245  ,Set/Clear Enable Bit 245" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB244  ,Set/Clear Enable Bit 244" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243  ,Set/Clear Enable Bit 243" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB242  ,Set/Clear Enable Bit 242" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB241  ,Set/Clear Enable Bit 241" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240  ,Set/Clear Enable Bit 240" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB239  ,Set/Clear Enable Bit 239" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB238  ,Set/Clear Enable Bit 238" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237  ,Set/Clear Enable Bit 237" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB236  ,Set/Clear Enable Bit 236" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB235  ,Set/Clear Enable Bit 235" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234  ,Set/Clear Enable Bit 234" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB233  ,Set/Clear Enable Bit 233" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB232  ,Set/Clear Enable Bit 232" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231  ,Set/Clear Enable Bit 231" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB230  ,Set/Clear Enable Bit 230" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB229  ,Set/Clear Enable Bit 229" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228  ,Set/Clear Enable Bit 228" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB227  ,Set/Clear Enable Bit 227" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB226  ,Set/Clear Enable Bit 226" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225  ,Set/Clear Enable Bit 225" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB224  ,Set/Clear Enable Bit 224" "Disabled,Enabled"
else
hgroup.long 0x011C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287  ,Set/Clear Enable Bit 287" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB286  ,Set/Clear Enable Bit 286" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB285  ,Set/Clear Enable Bit 285" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284  ,Set/Clear Enable Bit 284" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB283  ,Set/Clear Enable Bit 283" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB282  ,Set/Clear Enable Bit 282" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281  ,Set/Clear Enable Bit 281" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB280  ,Set/Clear Enable Bit 280" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB279  ,Set/Clear Enable Bit 279" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278  ,Set/Clear Enable Bit 278" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB277  ,Set/Clear Enable Bit 277" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB276  ,Set/Clear Enable Bit 276" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275  ,Set/Clear Enable Bit 275" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB274  ,Set/Clear Enable Bit 274" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB273  ,Set/Clear Enable Bit 273" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272  ,Set/Clear Enable Bit 272" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB271  ,Set/Clear Enable Bit 271" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB270  ,Set/Clear Enable Bit 270" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269  ,Set/Clear Enable Bit 269" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB268  ,Set/Clear Enable Bit 268" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB267  ,Set/Clear Enable Bit 267" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266  ,Set/Clear Enable Bit 266" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB265  ,Set/Clear Enable Bit 265" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB264  ,Set/Clear Enable Bit 264" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263  ,Set/Clear Enable Bit 263" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB262  ,Set/Clear Enable Bit 262" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB261  ,Set/Clear Enable Bit 261" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260  ,Set/Clear Enable Bit 260" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB259  ,Set/Clear Enable Bit 259" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB258  ,Set/Clear Enable Bit 258" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257  ,Set/Clear Enable Bit 257" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB256  ,Set/Clear Enable Bit 256" "Disabled,Enabled"
else
hgroup.long 0x0120++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319  ,Set/Clear Enable Bit 319" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB318  ,Set/Clear Enable Bit 318" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB317  ,Set/Clear Enable Bit 317" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316  ,Set/Clear Enable Bit 316" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB315  ,Set/Clear Enable Bit 315" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB314  ,Set/Clear Enable Bit 314" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313  ,Set/Clear Enable Bit 313" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB312  ,Set/Clear Enable Bit 312" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB311  ,Set/Clear Enable Bit 311" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310  ,Set/Clear Enable Bit 310" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB309  ,Set/Clear Enable Bit 309" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB308  ,Set/Clear Enable Bit 308" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307  ,Set/Clear Enable Bit 307" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB306  ,Set/Clear Enable Bit 306" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB305  ,Set/Clear Enable Bit 305" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304  ,Set/Clear Enable Bit 304" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB303  ,Set/Clear Enable Bit 303" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB302  ,Set/Clear Enable Bit 302" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301  ,Set/Clear Enable Bit 301" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB300  ,Set/Clear Enable Bit 300" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB299  ,Set/Clear Enable Bit 299" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298  ,Set/Clear Enable Bit 298" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB297  ,Set/Clear Enable Bit 297" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB296  ,Set/Clear Enable Bit 296" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295  ,Set/Clear Enable Bit 295" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB294  ,Set/Clear Enable Bit 294" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB293  ,Set/Clear Enable Bit 293" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292  ,Set/Clear Enable Bit 292" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB291  ,Set/Clear Enable Bit 291" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB290  ,Set/Clear Enable Bit 290" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289  ,Set/Clear Enable Bit 289" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB288  ,Set/Clear Enable Bit 288" "Disabled,Enabled"
else
hgroup.long 0x0124++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351  ,Set/Clear Enable Bit 351" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB350  ,Set/Clear Enable Bit 350" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB349  ,Set/Clear Enable Bit 349" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348  ,Set/Clear Enable Bit 348" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB347  ,Set/Clear Enable Bit 347" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB346  ,Set/Clear Enable Bit 346" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345  ,Set/Clear Enable Bit 345" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB344  ,Set/Clear Enable Bit 344" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB343  ,Set/Clear Enable Bit 343" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342  ,Set/Clear Enable Bit 342" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB341  ,Set/Clear Enable Bit 341" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB340  ,Set/Clear Enable Bit 340" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339  ,Set/Clear Enable Bit 339" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB338  ,Set/Clear Enable Bit 338" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB337  ,Set/Clear Enable Bit 337" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336  ,Set/Clear Enable Bit 336" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB335  ,Set/Clear Enable Bit 335" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB334  ,Set/Clear Enable Bit 334" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333  ,Set/Clear Enable Bit 333" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB332  ,Set/Clear Enable Bit 332" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB331  ,Set/Clear Enable Bit 331" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330  ,Set/Clear Enable Bit 330" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB329  ,Set/Clear Enable Bit 329" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB328  ,Set/Clear Enable Bit 328" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327  ,Set/Clear Enable Bit 327" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB326  ,Set/Clear Enable Bit 326" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB325  ,Set/Clear Enable Bit 325" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324  ,Set/Clear Enable Bit 324" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB323  ,Set/Clear Enable Bit 323" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB322  ,Set/Clear Enable Bit 322" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321  ,Set/Clear Enable Bit 321" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB320  ,Set/Clear Enable Bit 320" "Disabled,Enabled"
else
hgroup.long 0x0128++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383  ,Set/Clear Enable Bit 383" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB382  ,Set/Clear Enable Bit 382" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB381  ,Set/Clear Enable Bit 381" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380  ,Set/Clear Enable Bit 380" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB379  ,Set/Clear Enable Bit 379" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB378  ,Set/Clear Enable Bit 378" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377  ,Set/Clear Enable Bit 377" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB376  ,Set/Clear Enable Bit 376" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB375  ,Set/Clear Enable Bit 375" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374  ,Set/Clear Enable Bit 374" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB373  ,Set/Clear Enable Bit 373" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB372  ,Set/Clear Enable Bit 372" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371  ,Set/Clear Enable Bit 371" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB370  ,Set/Clear Enable Bit 370" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB369  ,Set/Clear Enable Bit 369" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368  ,Set/Clear Enable Bit 368" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB367  ,Set/Clear Enable Bit 367" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB366  ,Set/Clear Enable Bit 366" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365  ,Set/Clear Enable Bit 365" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB364  ,Set/Clear Enable Bit 364" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB363  ,Set/Clear Enable Bit 363" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362  ,Set/Clear Enable Bit 362" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB361  ,Set/Clear Enable Bit 361" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB360  ,Set/Clear Enable Bit 360" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359  ,Set/Clear Enable Bit 359" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB358  ,Set/Clear Enable Bit 358" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB357  ,Set/Clear Enable Bit 357" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356  ,Set/Clear Enable Bit 356" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB355  ,Set/Clear Enable Bit 355" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB354  ,Set/Clear Enable Bit 354" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353  ,Set/Clear Enable Bit 353" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB352  ,Set/Clear Enable Bit 352" "Disabled,Enabled"
else
hgroup.long 0x012C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415  ,Set/Clear Enable Bit 415" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB414  ,Set/Clear Enable Bit 414" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB413  ,Set/Clear Enable Bit 413" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412  ,Set/Clear Enable Bit 412" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB411  ,Set/Clear Enable Bit 411" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB410  ,Set/Clear Enable Bit 410" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409  ,Set/Clear Enable Bit 409" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB408  ,Set/Clear Enable Bit 408" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB407  ,Set/Clear Enable Bit 407" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406  ,Set/Clear Enable Bit 406" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB405  ,Set/Clear Enable Bit 405" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB404  ,Set/Clear Enable Bit 404" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403  ,Set/Clear Enable Bit 403" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB402  ,Set/Clear Enable Bit 402" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB401  ,Set/Clear Enable Bit 401" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400  ,Set/Clear Enable Bit 400" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB399  ,Set/Clear Enable Bit 399" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB398  ,Set/Clear Enable Bit 398" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397  ,Set/Clear Enable Bit 397" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB396  ,Set/Clear Enable Bit 396" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB395  ,Set/Clear Enable Bit 395" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394  ,Set/Clear Enable Bit 394" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB393  ,Set/Clear Enable Bit 393" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB392  ,Set/Clear Enable Bit 392" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391  ,Set/Clear Enable Bit 391" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB390  ,Set/Clear Enable Bit 390" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB389  ,Set/Clear Enable Bit 389" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388  ,Set/Clear Enable Bit 388" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB387  ,Set/Clear Enable Bit 387" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB386  ,Set/Clear Enable Bit 386" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385  ,Set/Clear Enable Bit 385" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB384  ,Set/Clear Enable Bit 384" "Disabled,Enabled"
else
hgroup.long 0x0130++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447  ,Set/Clear Enable Bit 447" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB446  ,Set/Clear Enable Bit 446" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB445  ,Set/Clear Enable Bit 445" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444  ,Set/Clear Enable Bit 444" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB443  ,Set/Clear Enable Bit 443" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB442  ,Set/Clear Enable Bit 442" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441  ,Set/Clear Enable Bit 441" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB440  ,Set/Clear Enable Bit 440" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB439  ,Set/Clear Enable Bit 439" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438  ,Set/Clear Enable Bit 438" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB437  ,Set/Clear Enable Bit 437" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB436  ,Set/Clear Enable Bit 436" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435  ,Set/Clear Enable Bit 435" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB434  ,Set/Clear Enable Bit 434" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB433  ,Set/Clear Enable Bit 433" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432  ,Set/Clear Enable Bit 432" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB431  ,Set/Clear Enable Bit 431" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB430  ,Set/Clear Enable Bit 430" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429  ,Set/Clear Enable Bit 429" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB428  ,Set/Clear Enable Bit 428" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB427  ,Set/Clear Enable Bit 427" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426  ,Set/Clear Enable Bit 426" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB425  ,Set/Clear Enable Bit 425" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB424  ,Set/Clear Enable Bit 424" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423  ,Set/Clear Enable Bit 423" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB422  ,Set/Clear Enable Bit 422" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB421  ,Set/Clear Enable Bit 421" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420  ,Set/Clear Enable Bit 420" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB419  ,Set/Clear Enable Bit 419" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB418  ,Set/Clear Enable Bit 418" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417  ,Set/Clear Enable Bit 417" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB416  ,Set/Clear Enable Bit 416" "Disabled,Enabled"
else
hgroup.long 0x0134++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479  ,Set/Clear Enable Bit 479" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB478  ,Set/Clear Enable Bit 478" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB477  ,Set/Clear Enable Bit 477" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476  ,Set/Clear Enable Bit 476" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB475  ,Set/Clear Enable Bit 475" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB474  ,Set/Clear Enable Bit 474" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473  ,Set/Clear Enable Bit 473" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB472  ,Set/Clear Enable Bit 472" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB471  ,Set/Clear Enable Bit 471" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470  ,Set/Clear Enable Bit 470" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB469  ,Set/Clear Enable Bit 469" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB468  ,Set/Clear Enable Bit 468" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467  ,Set/Clear Enable Bit 467" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB466  ,Set/Clear Enable Bit 466" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB465  ,Set/Clear Enable Bit 465" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464  ,Set/Clear Enable Bit 464" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB463  ,Set/Clear Enable Bit 463" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB462  ,Set/Clear Enable Bit 462" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461  ,Set/Clear Enable Bit 461" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB460  ,Set/Clear Enable Bit 460" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB459  ,Set/Clear Enable Bit 459" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458  ,Set/Clear Enable Bit 458" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB457  ,Set/Clear Enable Bit 457" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB456  ,Set/Clear Enable Bit 456" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455  ,Set/Clear Enable Bit 455" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB454  ,Set/Clear Enable Bit 454" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB453  ,Set/Clear Enable Bit 453" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452  ,Set/Clear Enable Bit 452" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB451  ,Set/Clear Enable Bit 451" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB450  ,Set/Clear Enable Bit 450" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449  ,Set/Clear Enable Bit 449" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB448  ,Set/Clear Enable Bit 448" "Disabled,Enabled"
else
hgroup.long 0x0138++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511  ,Set/Clear Enable Bit 511" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB510  ,Set/Clear Enable Bit 510" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB509  ,Set/Clear Enable Bit 509" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508  ,Set/Clear Enable Bit 508" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB507  ,Set/Clear Enable Bit 507" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB506  ,Set/Clear Enable Bit 506" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505  ,Set/Clear Enable Bit 505" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB504  ,Set/Clear Enable Bit 504" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB503  ,Set/Clear Enable Bit 503" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502  ,Set/Clear Enable Bit 502" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB501  ,Set/Clear Enable Bit 501" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB500  ,Set/Clear Enable Bit 500" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499  ,Set/Clear Enable Bit 499" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB498  ,Set/Clear Enable Bit 498" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB497  ,Set/Clear Enable Bit 497" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496  ,Set/Clear Enable Bit 496" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB495  ,Set/Clear Enable Bit 495" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB494  ,Set/Clear Enable Bit 494" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493  ,Set/Clear Enable Bit 493" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB492  ,Set/Clear Enable Bit 492" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB491  ,Set/Clear Enable Bit 491" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490  ,Set/Clear Enable Bit 490" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB489  ,Set/Clear Enable Bit 489" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB488  ,Set/Clear Enable Bit 488" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487  ,Set/Clear Enable Bit 487" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB486  ,Set/Clear Enable Bit 486" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB485  ,Set/Clear Enable Bit 485" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484  ,Set/Clear Enable Bit 484" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB483  ,Set/Clear Enable Bit 483" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB482  ,Set/Clear Enable Bit 482" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481  ,Set/Clear Enable Bit 481" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB480  ,Set/Clear Enable Bit 480" "Disabled,Enabled"
else
hgroup.long 0x013C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543  ,Set/Clear Enable Bit 543" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB542  ,Set/Clear Enable Bit 542" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB541  ,Set/Clear Enable Bit 541" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540  ,Set/Clear Enable Bit 540" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB539  ,Set/Clear Enable Bit 539" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB538  ,Set/Clear Enable Bit 538" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537  ,Set/Clear Enable Bit 537" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB536  ,Set/Clear Enable Bit 536" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB535  ,Set/Clear Enable Bit 535" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534  ,Set/Clear Enable Bit 534" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB533  ,Set/Clear Enable Bit 533" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB532  ,Set/Clear Enable Bit 532" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531  ,Set/Clear Enable Bit 531" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB530  ,Set/Clear Enable Bit 530" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB529  ,Set/Clear Enable Bit 529" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528  ,Set/Clear Enable Bit 528" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB527  ,Set/Clear Enable Bit 527" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB526  ,Set/Clear Enable Bit 526" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525  ,Set/Clear Enable Bit 525" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB524  ,Set/Clear Enable Bit 524" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB523  ,Set/Clear Enable Bit 523" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522  ,Set/Clear Enable Bit 522" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB521  ,Set/Clear Enable Bit 521" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB520  ,Set/Clear Enable Bit 520" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519  ,Set/Clear Enable Bit 519" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB518  ,Set/Clear Enable Bit 518" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB517  ,Set/Clear Enable Bit 517" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516  ,Set/Clear Enable Bit 516" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB515  ,Set/Clear Enable Bit 515" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB514  ,Set/Clear Enable Bit 514" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513  ,Set/Clear Enable Bit 513" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB512  ,Set/Clear Enable Bit 512" "Disabled,Enabled"
else
hgroup.long 0x0140++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575  ,Set/Clear Enable Bit 575" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB574  ,Set/Clear Enable Bit 574" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB573  ,Set/Clear Enable Bit 573" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572  ,Set/Clear Enable Bit 572" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB571  ,Set/Clear Enable Bit 571" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB570  ,Set/Clear Enable Bit 570" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569  ,Set/Clear Enable Bit 569" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB568  ,Set/Clear Enable Bit 568" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB567  ,Set/Clear Enable Bit 567" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566  ,Set/Clear Enable Bit 566" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB565  ,Set/Clear Enable Bit 565" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB564  ,Set/Clear Enable Bit 564" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563  ,Set/Clear Enable Bit 563" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB562  ,Set/Clear Enable Bit 562" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB561  ,Set/Clear Enable Bit 561" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560  ,Set/Clear Enable Bit 560" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB559  ,Set/Clear Enable Bit 559" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB558  ,Set/Clear Enable Bit 558" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557  ,Set/Clear Enable Bit 557" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB556  ,Set/Clear Enable Bit 556" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB555  ,Set/Clear Enable Bit 555" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554  ,Set/Clear Enable Bit 554" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB553  ,Set/Clear Enable Bit 553" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB552  ,Set/Clear Enable Bit 552" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551  ,Set/Clear Enable Bit 551" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB550  ,Set/Clear Enable Bit 550" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB549  ,Set/Clear Enable Bit 549" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548  ,Set/Clear Enable Bit 548" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB547  ,Set/Clear Enable Bit 547" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB546  ,Set/Clear Enable Bit 546" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545  ,Set/Clear Enable Bit 545" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB544  ,Set/Clear Enable Bit 544" "Disabled,Enabled"
else
hgroup.long 0x0144++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607  ,Set/Clear Enable Bit 607" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB606  ,Set/Clear Enable Bit 606" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB605  ,Set/Clear Enable Bit 605" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604  ,Set/Clear Enable Bit 604" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB603  ,Set/Clear Enable Bit 603" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB602  ,Set/Clear Enable Bit 602" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601  ,Set/Clear Enable Bit 601" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB600  ,Set/Clear Enable Bit 600" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB599  ,Set/Clear Enable Bit 599" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598  ,Set/Clear Enable Bit 598" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB597  ,Set/Clear Enable Bit 597" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB596  ,Set/Clear Enable Bit 596" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595  ,Set/Clear Enable Bit 595" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB594  ,Set/Clear Enable Bit 594" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB593  ,Set/Clear Enable Bit 593" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592  ,Set/Clear Enable Bit 592" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB591  ,Set/Clear Enable Bit 591" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB590  ,Set/Clear Enable Bit 590" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589  ,Set/Clear Enable Bit 589" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB588  ,Set/Clear Enable Bit 588" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB587  ,Set/Clear Enable Bit 587" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586  ,Set/Clear Enable Bit 586" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB585  ,Set/Clear Enable Bit 585" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB584  ,Set/Clear Enable Bit 584" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583  ,Set/Clear Enable Bit 583" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB582  ,Set/Clear Enable Bit 582" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB581  ,Set/Clear Enable Bit 581" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580  ,Set/Clear Enable Bit 580" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB579  ,Set/Clear Enable Bit 579" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB578  ,Set/Clear Enable Bit 578" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577  ,Set/Clear Enable Bit 577" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB576  ,Set/Clear Enable Bit 576" "Disabled,Enabled"
else
hgroup.long 0x0148++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639  ,Set/Clear Enable Bit 639" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB638  ,Set/Clear Enable Bit 638" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB637  ,Set/Clear Enable Bit 637" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636  ,Set/Clear Enable Bit 636" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB635  ,Set/Clear Enable Bit 635" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB634  ,Set/Clear Enable Bit 634" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633  ,Set/Clear Enable Bit 633" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB632  ,Set/Clear Enable Bit 632" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB631  ,Set/Clear Enable Bit 631" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630  ,Set/Clear Enable Bit 630" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB629  ,Set/Clear Enable Bit 629" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB628  ,Set/Clear Enable Bit 628" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627  ,Set/Clear Enable Bit 627" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB626  ,Set/Clear Enable Bit 626" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB625  ,Set/Clear Enable Bit 625" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624  ,Set/Clear Enable Bit 624" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB623  ,Set/Clear Enable Bit 623" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB622  ,Set/Clear Enable Bit 622" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621  ,Set/Clear Enable Bit 621" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB620  ,Set/Clear Enable Bit 620" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB619  ,Set/Clear Enable Bit 619" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618  ,Set/Clear Enable Bit 618" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB617  ,Set/Clear Enable Bit 617" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB616  ,Set/Clear Enable Bit 616" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615  ,Set/Clear Enable Bit 615" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB614  ,Set/Clear Enable Bit 614" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB613  ,Set/Clear Enable Bit 613" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612  ,Set/Clear Enable Bit 612" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB611  ,Set/Clear Enable Bit 611" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB610  ,Set/Clear Enable Bit 610" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609  ,Set/Clear Enable Bit 609" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB608  ,Set/Clear Enable Bit 608" "Disabled,Enabled"
else
hgroup.long 0x014C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671  ,Set/Clear Enable Bit 671" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB670  ,Set/Clear Enable Bit 670" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB669  ,Set/Clear Enable Bit 669" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668  ,Set/Clear Enable Bit 668" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB667  ,Set/Clear Enable Bit 667" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB666  ,Set/Clear Enable Bit 666" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665  ,Set/Clear Enable Bit 665" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB664  ,Set/Clear Enable Bit 664" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB663  ,Set/Clear Enable Bit 663" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662  ,Set/Clear Enable Bit 662" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB661  ,Set/Clear Enable Bit 661" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB660  ,Set/Clear Enable Bit 660" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659  ,Set/Clear Enable Bit 659" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB658  ,Set/Clear Enable Bit 658" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB657  ,Set/Clear Enable Bit 657" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656  ,Set/Clear Enable Bit 656" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB655  ,Set/Clear Enable Bit 655" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB654  ,Set/Clear Enable Bit 654" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653  ,Set/Clear Enable Bit 653" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB652  ,Set/Clear Enable Bit 652" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB651  ,Set/Clear Enable Bit 651" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650  ,Set/Clear Enable Bit 650" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB649  ,Set/Clear Enable Bit 649" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB648  ,Set/Clear Enable Bit 648" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647  ,Set/Clear Enable Bit 647" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB646  ,Set/Clear Enable Bit 646" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB645  ,Set/Clear Enable Bit 645" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644  ,Set/Clear Enable Bit 644" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB643  ,Set/Clear Enable Bit 643" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB642  ,Set/Clear Enable Bit 642" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641  ,Set/Clear Enable Bit 641" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB640  ,Set/Clear Enable Bit 640" "Disabled,Enabled"
else
hgroup.long 0x0150++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703  ,Set/Clear Enable Bit 703" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB702  ,Set/Clear Enable Bit 702" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB701  ,Set/Clear Enable Bit 701" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700  ,Set/Clear Enable Bit 700" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB699  ,Set/Clear Enable Bit 699" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB698  ,Set/Clear Enable Bit 698" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697  ,Set/Clear Enable Bit 697" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB696  ,Set/Clear Enable Bit 696" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB695  ,Set/Clear Enable Bit 695" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694  ,Set/Clear Enable Bit 694" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB693  ,Set/Clear Enable Bit 693" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB692  ,Set/Clear Enable Bit 692" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691  ,Set/Clear Enable Bit 691" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB690  ,Set/Clear Enable Bit 690" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB689  ,Set/Clear Enable Bit 689" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688  ,Set/Clear Enable Bit 688" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB687  ,Set/Clear Enable Bit 687" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB686  ,Set/Clear Enable Bit 686" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685  ,Set/Clear Enable Bit 685" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB684  ,Set/Clear Enable Bit 684" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB683  ,Set/Clear Enable Bit 683" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682  ,Set/Clear Enable Bit 682" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB681  ,Set/Clear Enable Bit 681" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB680  ,Set/Clear Enable Bit 680" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679  ,Set/Clear Enable Bit 679" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB678  ,Set/Clear Enable Bit 678" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB677  ,Set/Clear Enable Bit 677" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676  ,Set/Clear Enable Bit 676" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB675  ,Set/Clear Enable Bit 675" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB674  ,Set/Clear Enable Bit 674" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673  ,Set/Clear Enable Bit 673" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB672  ,Set/Clear Enable Bit 672" "Disabled,Enabled"
else
hgroup.long 0x0154++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735  ,Set/Clear Enable Bit 735" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB734  ,Set/Clear Enable Bit 734" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB733  ,Set/Clear Enable Bit 733" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732  ,Set/Clear Enable Bit 732" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB731  ,Set/Clear Enable Bit 731" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB730  ,Set/Clear Enable Bit 730" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729  ,Set/Clear Enable Bit 729" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB728  ,Set/Clear Enable Bit 728" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB727  ,Set/Clear Enable Bit 727" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726  ,Set/Clear Enable Bit 726" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB725  ,Set/Clear Enable Bit 725" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB724  ,Set/Clear Enable Bit 724" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723  ,Set/Clear Enable Bit 723" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB722  ,Set/Clear Enable Bit 722" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB721  ,Set/Clear Enable Bit 721" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720  ,Set/Clear Enable Bit 720" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB719  ,Set/Clear Enable Bit 719" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB718  ,Set/Clear Enable Bit 718" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717  ,Set/Clear Enable Bit 717" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB716  ,Set/Clear Enable Bit 716" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB715  ,Set/Clear Enable Bit 715" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714  ,Set/Clear Enable Bit 714" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB713  ,Set/Clear Enable Bit 713" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB712  ,Set/Clear Enable Bit 712" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711  ,Set/Clear Enable Bit 711" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB710  ,Set/Clear Enable Bit 710" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB709  ,Set/Clear Enable Bit 709" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708  ,Set/Clear Enable Bit 708" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB707  ,Set/Clear Enable Bit 707" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB706  ,Set/Clear Enable Bit 706" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705  ,Set/Clear Enable Bit 705" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB704  ,Set/Clear Enable Bit 704" "Disabled,Enabled"
else
hgroup.long 0x0158++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767  ,Set/Clear Enable Bit 767" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB766  ,Set/Clear Enable Bit 766" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB765  ,Set/Clear Enable Bit 765" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764  ,Set/Clear Enable Bit 764" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB763  ,Set/Clear Enable Bit 763" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB762  ,Set/Clear Enable Bit 762" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761  ,Set/Clear Enable Bit 761" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB760  ,Set/Clear Enable Bit 760" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB759  ,Set/Clear Enable Bit 759" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758  ,Set/Clear Enable Bit 758" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB757  ,Set/Clear Enable Bit 757" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB756  ,Set/Clear Enable Bit 756" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755  ,Set/Clear Enable Bit 755" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB754  ,Set/Clear Enable Bit 754" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB753  ,Set/Clear Enable Bit 753" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752  ,Set/Clear Enable Bit 752" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB751  ,Set/Clear Enable Bit 751" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB750  ,Set/Clear Enable Bit 750" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749  ,Set/Clear Enable Bit 749" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB748  ,Set/Clear Enable Bit 748" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB747  ,Set/Clear Enable Bit 747" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746  ,Set/Clear Enable Bit 746" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB745  ,Set/Clear Enable Bit 745" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB744  ,Set/Clear Enable Bit 744" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743  ,Set/Clear Enable Bit 743" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB742  ,Set/Clear Enable Bit 742" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB741  ,Set/Clear Enable Bit 741" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740  ,Set/Clear Enable Bit 740" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB739  ,Set/Clear Enable Bit 739" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB738  ,Set/Clear Enable Bit 738" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737  ,Set/Clear Enable Bit 737" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB736  ,Set/Clear Enable Bit 736" "Disabled,Enabled"
else
hgroup.long 0x015C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799  ,Set/Clear Enable Bit 799" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB798  ,Set/Clear Enable Bit 798" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB797  ,Set/Clear Enable Bit 797" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796  ,Set/Clear Enable Bit 796" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB795  ,Set/Clear Enable Bit 795" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB794  ,Set/Clear Enable Bit 794" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793  ,Set/Clear Enable Bit 793" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB792  ,Set/Clear Enable Bit 792" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB791  ,Set/Clear Enable Bit 791" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790  ,Set/Clear Enable Bit 790" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB789  ,Set/Clear Enable Bit 789" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB788  ,Set/Clear Enable Bit 788" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787  ,Set/Clear Enable Bit 787" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB786  ,Set/Clear Enable Bit 786" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB785  ,Set/Clear Enable Bit 785" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784  ,Set/Clear Enable Bit 784" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB783  ,Set/Clear Enable Bit 783" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB782  ,Set/Clear Enable Bit 782" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781  ,Set/Clear Enable Bit 781" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB780  ,Set/Clear Enable Bit 780" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB779  ,Set/Clear Enable Bit 779" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778  ,Set/Clear Enable Bit 778" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB777  ,Set/Clear Enable Bit 777" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB776  ,Set/Clear Enable Bit 776" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775  ,Set/Clear Enable Bit 775" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB774  ,Set/Clear Enable Bit 774" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB773  ,Set/Clear Enable Bit 773" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772  ,Set/Clear Enable Bit 772" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB771  ,Set/Clear Enable Bit 771" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB770  ,Set/Clear Enable Bit 770" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769  ,Set/Clear Enable Bit 769" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB768  ,Set/Clear Enable Bit 768" "Disabled,Enabled"
else
hgroup.long 0x0160++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831  ,Set/Clear Enable Bit 831" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB830  ,Set/Clear Enable Bit 830" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB829  ,Set/Clear Enable Bit 829" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828  ,Set/Clear Enable Bit 828" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB827  ,Set/Clear Enable Bit 827" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB826  ,Set/Clear Enable Bit 826" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825  ,Set/Clear Enable Bit 825" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB824  ,Set/Clear Enable Bit 824" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB823  ,Set/Clear Enable Bit 823" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822  ,Set/Clear Enable Bit 822" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB821  ,Set/Clear Enable Bit 821" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB820  ,Set/Clear Enable Bit 820" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819  ,Set/Clear Enable Bit 819" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB818  ,Set/Clear Enable Bit 818" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB817  ,Set/Clear Enable Bit 817" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816  ,Set/Clear Enable Bit 816" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB815  ,Set/Clear Enable Bit 815" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB814  ,Set/Clear Enable Bit 814" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813  ,Set/Clear Enable Bit 813" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB812  ,Set/Clear Enable Bit 812" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB811  ,Set/Clear Enable Bit 811" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810  ,Set/Clear Enable Bit 810" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB809  ,Set/Clear Enable Bit 809" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB808  ,Set/Clear Enable Bit 808" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807  ,Set/Clear Enable Bit 807" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB806  ,Set/Clear Enable Bit 806" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB805  ,Set/Clear Enable Bit 805" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804  ,Set/Clear Enable Bit 804" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB803  ,Set/Clear Enable Bit 803" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB802  ,Set/Clear Enable Bit 802" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801  ,Set/Clear Enable Bit 801" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB800  ,Set/Clear Enable Bit 800" "Disabled,Enabled"
else
hgroup.long 0x0164++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863  ,Set/Clear Enable Bit 863" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB862  ,Set/Clear Enable Bit 862" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB861  ,Set/Clear Enable Bit 861" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860  ,Set/Clear Enable Bit 860" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB859  ,Set/Clear Enable Bit 859" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB858  ,Set/Clear Enable Bit 858" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857  ,Set/Clear Enable Bit 857" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB856  ,Set/Clear Enable Bit 856" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB855  ,Set/Clear Enable Bit 855" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854  ,Set/Clear Enable Bit 854" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB853  ,Set/Clear Enable Bit 853" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB852  ,Set/Clear Enable Bit 852" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851  ,Set/Clear Enable Bit 851" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB850  ,Set/Clear Enable Bit 850" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB849  ,Set/Clear Enable Bit 849" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848  ,Set/Clear Enable Bit 848" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB847  ,Set/Clear Enable Bit 847" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB846  ,Set/Clear Enable Bit 846" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845  ,Set/Clear Enable Bit 845" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB844  ,Set/Clear Enable Bit 844" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB843  ,Set/Clear Enable Bit 843" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842  ,Set/Clear Enable Bit 842" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB841  ,Set/Clear Enable Bit 841" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB840  ,Set/Clear Enable Bit 840" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839  ,Set/Clear Enable Bit 839" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB838  ,Set/Clear Enable Bit 838" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB837  ,Set/Clear Enable Bit 837" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836  ,Set/Clear Enable Bit 836" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB835  ,Set/Clear Enable Bit 835" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB834  ,Set/Clear Enable Bit 834" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833  ,Set/Clear Enable Bit 833" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB832  ,Set/Clear Enable Bit 832" "Disabled,Enabled"
else
hgroup.long 0x0168++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895  ,Set/Clear Enable Bit 895" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB894  ,Set/Clear Enable Bit 894" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB893  ,Set/Clear Enable Bit 893" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892  ,Set/Clear Enable Bit 892" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB891  ,Set/Clear Enable Bit 891" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB890  ,Set/Clear Enable Bit 890" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889  ,Set/Clear Enable Bit 889" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB888  ,Set/Clear Enable Bit 888" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB887  ,Set/Clear Enable Bit 887" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886  ,Set/Clear Enable Bit 886" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB885  ,Set/Clear Enable Bit 885" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB884  ,Set/Clear Enable Bit 884" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883  ,Set/Clear Enable Bit 883" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB882  ,Set/Clear Enable Bit 882" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB881  ,Set/Clear Enable Bit 881" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880  ,Set/Clear Enable Bit 880" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB879  ,Set/Clear Enable Bit 879" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB878  ,Set/Clear Enable Bit 878" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877  ,Set/Clear Enable Bit 877" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB876  ,Set/Clear Enable Bit 876" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB875  ,Set/Clear Enable Bit 875" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874  ,Set/Clear Enable Bit 874" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB873  ,Set/Clear Enable Bit 873" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB872  ,Set/Clear Enable Bit 872" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871  ,Set/Clear Enable Bit 871" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB870  ,Set/Clear Enable Bit 870" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB869  ,Set/Clear Enable Bit 869" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868  ,Set/Clear Enable Bit 868" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB867  ,Set/Clear Enable Bit 867" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB866  ,Set/Clear Enable Bit 866" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865  ,Set/Clear Enable Bit 865" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB864  ,Set/Clear Enable Bit 864" "Disabled,Enabled"
else
hgroup.long 0x016C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927  ,Set/Clear Enable Bit 927" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB926  ,Set/Clear Enable Bit 926" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB925  ,Set/Clear Enable Bit 925" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924  ,Set/Clear Enable Bit 924" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB923  ,Set/Clear Enable Bit 923" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB922  ,Set/Clear Enable Bit 922" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921  ,Set/Clear Enable Bit 921" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB920  ,Set/Clear Enable Bit 920" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB919  ,Set/Clear Enable Bit 919" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918  ,Set/Clear Enable Bit 918" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB917  ,Set/Clear Enable Bit 917" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB916  ,Set/Clear Enable Bit 916" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915  ,Set/Clear Enable Bit 915" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB914  ,Set/Clear Enable Bit 914" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB913  ,Set/Clear Enable Bit 913" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912  ,Set/Clear Enable Bit 912" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB911  ,Set/Clear Enable Bit 911" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB910  ,Set/Clear Enable Bit 910" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909  ,Set/Clear Enable Bit 909" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB908  ,Set/Clear Enable Bit 908" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB907  ,Set/Clear Enable Bit 907" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906  ,Set/Clear Enable Bit 906" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB905  ,Set/Clear Enable Bit 905" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB904  ,Set/Clear Enable Bit 904" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903  ,Set/Clear Enable Bit 903" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB902  ,Set/Clear Enable Bit 902" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB901  ,Set/Clear Enable Bit 901" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900  ,Set/Clear Enable Bit 900" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB899  ,Set/Clear Enable Bit 899" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB898  ,Set/Clear Enable Bit 898" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897  ,Set/Clear Enable Bit 897" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB896  ,Set/Clear Enable Bit 896" "Disabled,Enabled"
else
hgroup.long 0x0170++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959  ,Set/Clear Enable Bit 959" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB958  ,Set/Clear Enable Bit 958" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB957  ,Set/Clear Enable Bit 957" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956  ,Set/Clear Enable Bit 956" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB955  ,Set/Clear Enable Bit 955" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB954  ,Set/Clear Enable Bit 954" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953  ,Set/Clear Enable Bit 953" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB952  ,Set/Clear Enable Bit 952" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB951  ,Set/Clear Enable Bit 951" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950  ,Set/Clear Enable Bit 950" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB949  ,Set/Clear Enable Bit 949" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB948  ,Set/Clear Enable Bit 948" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947  ,Set/Clear Enable Bit 947" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB946  ,Set/Clear Enable Bit 946" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB945  ,Set/Clear Enable Bit 945" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944  ,Set/Clear Enable Bit 944" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB943  ,Set/Clear Enable Bit 943" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB942  ,Set/Clear Enable Bit 942" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941  ,Set/Clear Enable Bit 941" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB940  ,Set/Clear Enable Bit 940" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB939  ,Set/Clear Enable Bit 939" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938  ,Set/Clear Enable Bit 938" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB937  ,Set/Clear Enable Bit 937" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB936  ,Set/Clear Enable Bit 936" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935  ,Set/Clear Enable Bit 935" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB934  ,Set/Clear Enable Bit 934" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB933  ,Set/Clear Enable Bit 933" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932  ,Set/Clear Enable Bit 932" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB931  ,Set/Clear Enable Bit 931" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB930  ,Set/Clear Enable Bit 930" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929  ,Set/Clear Enable Bit 929" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB928  ,Set/Clear Enable Bit 928" "Disabled,Enabled"
else
hgroup.long 0x0174++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991  ,Set/Clear Enable Bit 991" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB990  ,Set/Clear Enable Bit 990" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB989  ,Set/Clear Enable Bit 989" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988  ,Set/Clear Enable Bit 988" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB987  ,Set/Clear Enable Bit 987" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB986  ,Set/Clear Enable Bit 986" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985  ,Set/Clear Enable Bit 985" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB984  ,Set/Clear Enable Bit 984" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB983  ,Set/Clear Enable Bit 983" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982  ,Set/Clear Enable Bit 982" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB981  ,Set/Clear Enable Bit 981" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB980  ,Set/Clear Enable Bit 980" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979  ,Set/Clear Enable Bit 979" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB978  ,Set/Clear Enable Bit 978" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB977  ,Set/Clear Enable Bit 977" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976  ,Set/Clear Enable Bit 976" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB975  ,Set/Clear Enable Bit 975" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB974  ,Set/Clear Enable Bit 974" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973  ,Set/Clear Enable Bit 973" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB972  ,Set/Clear Enable Bit 972" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB971  ,Set/Clear Enable Bit 971" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970  ,Set/Clear Enable Bit 970" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB969  ,Set/Clear Enable Bit 969" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB968  ,Set/Clear Enable Bit 968" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967  ,Set/Clear Enable Bit 967" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB966  ,Set/Clear Enable Bit 966" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB965  ,Set/Clear Enable Bit 965" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964  ,Set/Clear Enable Bit 964" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB963  ,Set/Clear Enable Bit 963" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB962  ,Set/Clear Enable Bit 962" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961  ,Set/Clear Enable Bit 961" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB960  ,Set/Clear Enable Bit 960" "Disabled,Enabled"
else
hgroup.long 0x0178++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
endif
tree.end
width 22.
tree "Set/Clear Pending Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0200++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0200++0x03
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63   ,Set/Clear Pending Bit 63" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND62   ,Set/Clear Pending Bit 62" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND61   ,Set/Clear Pending Bit 61" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60   ,Set/Clear Pending Bit 60" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND59   ,Set/Clear Pending Bit 59" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND58   ,Set/Clear Pending Bit 58" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57   ,Set/Clear Pending Bit 57" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND56   ,Set/Clear Pending Bit 56" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND55   ,Set/Clear Pending Bit 55" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54   ,Set/Clear Pending Bit 54" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND53   ,Set/Clear Pending Bit 53" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND52   ,Set/Clear Pending Bit 52" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51   ,Set/Clear Pending Bit 51" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND50   ,Set/Clear Pending Bit 50" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND49   ,Set/Clear Pending Bit 49" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48   ,Set/Clear Pending Bit 48" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND47   ,Set/Clear Pending Bit 47" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND46   ,Set/Clear Pending Bit 46" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45   ,Set/Clear Pending Bit 45" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND44   ,Set/Clear Pending Bit 44" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND43   ,Set/Clear Pending Bit 43" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42   ,Set/Clear Pending Bit 42" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND41   ,Set/Clear Pending Bit 41" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND40   ,Set/Clear Pending Bit 40" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39   ,Set/Clear Pending Bit 39" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND38   ,Set/Clear Pending Bit 38" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND37   ,Set/Clear Pending Bit 37" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36   ,Set/Clear Pending Bit 36" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND35   ,Set/Clear Pending Bit 35" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND34   ,Set/Clear Pending Bit 34" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33   ,Set/Clear Pending Bit 33" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND32   ,Set/Clear Pending Bit 32" "Not pending,Pending"
else
hgroup.long 0x0204++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95   ,Set/Clear Pending Bit 95" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND94   ,Set/Clear Pending Bit 94" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND93   ,Set/Clear Pending Bit 93" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92   ,Set/Clear Pending Bit 92" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND91   ,Set/Clear Pending Bit 91" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND90   ,Set/Clear Pending Bit 90" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89   ,Set/Clear Pending Bit 89" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND88   ,Set/Clear Pending Bit 88" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND87   ,Set/Clear Pending Bit 87" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86   ,Set/Clear Pending Bit 86" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND85   ,Set/Clear Pending Bit 85" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND84   ,Set/Clear Pending Bit 84" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83   ,Set/Clear Pending Bit 83" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND82   ,Set/Clear Pending Bit 82" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND81   ,Set/Clear Pending Bit 81" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80   ,Set/Clear Pending Bit 80" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND79   ,Set/Clear Pending Bit 79" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND78   ,Set/Clear Pending Bit 78" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77   ,Set/Clear Pending Bit 77" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND76   ,Set/Clear Pending Bit 76" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND75   ,Set/Clear Pending Bit 75" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74   ,Set/Clear Pending Bit 74" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND73   ,Set/Clear Pending Bit 73" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND72   ,Set/Clear Pending Bit 72" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71   ,Set/Clear Pending Bit 71" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND70   ,Set/Clear Pending Bit 70" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND69   ,Set/Clear Pending Bit 69" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68   ,Set/Clear Pending Bit 68" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND67   ,Set/Clear Pending Bit 67" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND66   ,Set/Clear Pending Bit 66" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65   ,Set/Clear Pending Bit 65" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND64   ,Set/Clear Pending Bit 64" "Not pending,Pending"
else
hgroup.long 0x0208++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127  ,Set/Clear Pending Bit 127" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND126  ,Set/Clear Pending Bit 126" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND125  ,Set/Clear Pending Bit 125" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124  ,Set/Clear Pending Bit 124" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND123  ,Set/Clear Pending Bit 123" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND122  ,Set/Clear Pending Bit 122" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121  ,Set/Clear Pending Bit 121" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND120  ,Set/Clear Pending Bit 120" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND119  ,Set/Clear Pending Bit 119" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118  ,Set/Clear Pending Bit 118" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND117  ,Set/Clear Pending Bit 117" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND116  ,Set/Clear Pending Bit 116" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115  ,Set/Clear Pending Bit 115" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND114  ,Set/Clear Pending Bit 114" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND113  ,Set/Clear Pending Bit 113" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112  ,Set/Clear Pending Bit 112" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND111  ,Set/Clear Pending Bit 111" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND110  ,Set/Clear Pending Bit 110" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109  ,Set/Clear Pending Bit 109" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND108  ,Set/Clear Pending Bit 108" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND107  ,Set/Clear Pending Bit 107" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106  ,Set/Clear Pending Bit 106" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND105  ,Set/Clear Pending Bit 105" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND104  ,Set/Clear Pending Bit 104" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103  ,Set/Clear Pending Bit 103" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND102  ,Set/Clear Pending Bit 102" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND101  ,Set/Clear Pending Bit 101" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100  ,Set/Clear Pending Bit 100" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND99   ,Set/Clear Pending Bit 99" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND98   ,Set/Clear Pending Bit 98" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97   ,Set/Clear Pending Bit 97" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND96   ,Set/Clear Pending Bit 96" "Not pending,Pending"
else
hgroup.long 0x020C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159  ,Set/Clear Pending Bit 159" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND158  ,Set/Clear Pending Bit 158" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND157  ,Set/Clear Pending Bit 157" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156  ,Set/Clear Pending Bit 156" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND155  ,Set/Clear Pending Bit 155" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND154  ,Set/Clear Pending Bit 154" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153  ,Set/Clear Pending Bit 153" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND152  ,Set/Clear Pending Bit 152" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND151  ,Set/Clear Pending Bit 151" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150  ,Set/Clear Pending Bit 150" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND149  ,Set/Clear Pending Bit 149" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND148  ,Set/Clear Pending Bit 148" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147  ,Set/Clear Pending Bit 147" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND146  ,Set/Clear Pending Bit 146" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND145  ,Set/Clear Pending Bit 145" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144  ,Set/Clear Pending Bit 144" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND143  ,Set/Clear Pending Bit 143" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND142  ,Set/Clear Pending Bit 142" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141  ,Set/Clear Pending Bit 141" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND140  ,Set/Clear Pending Bit 140" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND139  ,Set/Clear Pending Bit 139" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138  ,Set/Clear Pending Bit 138" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND137  ,Set/Clear Pending Bit 137" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND136  ,Set/Clear Pending Bit 136" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135  ,Set/Clear Pending Bit 135" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND134  ,Set/Clear Pending Bit 134" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND133  ,Set/Clear Pending Bit 133" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132  ,Set/Clear Pending Bit 132" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND131  ,Set/Clear Pending Bit 131" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND130  ,Set/Clear Pending Bit 130" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129  ,Set/Clear Pending Bit 129" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND128  ,Set/Clear Pending Bit 128" "Not pending,Pending"
else
hgroup.long 0x0210++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191  ,Set/Clear Pending Bit 191" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND190  ,Set/Clear Pending Bit 190" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND189  ,Set/Clear Pending Bit 189" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188  ,Set/Clear Pending Bit 188" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND187  ,Set/Clear Pending Bit 187" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND186  ,Set/Clear Pending Bit 186" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185  ,Set/Clear Pending Bit 185" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND184  ,Set/Clear Pending Bit 184" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND183  ,Set/Clear Pending Bit 183" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182  ,Set/Clear Pending Bit 182" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND181  ,Set/Clear Pending Bit 181" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND180  ,Set/Clear Pending Bit 180" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179  ,Set/Clear Pending Bit 179" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND178  ,Set/Clear Pending Bit 178" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND177  ,Set/Clear Pending Bit 177" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176  ,Set/Clear Pending Bit 176" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND175  ,Set/Clear Pending Bit 175" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND174  ,Set/Clear Pending Bit 174" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173  ,Set/Clear Pending Bit 173" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND172  ,Set/Clear Pending Bit 172" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND171  ,Set/Clear Pending Bit 171" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170  ,Set/Clear Pending Bit 170" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND169  ,Set/Clear Pending Bit 169" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND168  ,Set/Clear Pending Bit 168" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167  ,Set/Clear Pending Bit 167" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND166  ,Set/Clear Pending Bit 166" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND165  ,Set/Clear Pending Bit 165" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164  ,Set/Clear Pending Bit 164" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND163  ,Set/Clear Pending Bit 163" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND162  ,Set/Clear Pending Bit 162" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161  ,Set/Clear Pending Bit 161" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND160  ,Set/Clear Pending Bit 160" "Not pending,Pending"
else
hgroup.long 0x0214++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223  ,Set/Clear Pending Bit 223" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND222  ,Set/Clear Pending Bit 222" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND221  ,Set/Clear Pending Bit 221" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220  ,Set/Clear Pending Bit 220" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND219  ,Set/Clear Pending Bit 219" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND218  ,Set/Clear Pending Bit 218" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217  ,Set/Clear Pending Bit 217" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND216  ,Set/Clear Pending Bit 216" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND215  ,Set/Clear Pending Bit 215" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214  ,Set/Clear Pending Bit 214" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND213  ,Set/Clear Pending Bit 213" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND212  ,Set/Clear Pending Bit 212" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211  ,Set/Clear Pending Bit 211" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND210  ,Set/Clear Pending Bit 210" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND209  ,Set/Clear Pending Bit 209" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208  ,Set/Clear Pending Bit 208" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND207  ,Set/Clear Pending Bit 207" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND206  ,Set/Clear Pending Bit 206" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205  ,Set/Clear Pending Bit 205" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND204  ,Set/Clear Pending Bit 204" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND203  ,Set/Clear Pending Bit 203" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202  ,Set/Clear Pending Bit 202" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND201  ,Set/Clear Pending Bit 201" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND200  ,Set/Clear Pending Bit 200" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199  ,Set/Clear Pending Bit 199" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND198  ,Set/Clear Pending Bit 198" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND197  ,Set/Clear Pending Bit 197" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196  ,Set/Clear Pending Bit 196" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND195  ,Set/Clear Pending Bit 195" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND194  ,Set/Clear Pending Bit 194" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193  ,Set/Clear Pending Bit 193" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND192  ,Set/Clear Pending Bit 192" "Not pending,Pending"
else
hgroup.long 0x0218++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255  ,Set/Clear Pending Bit 255" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND254  ,Set/Clear Pending Bit 254" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND253  ,Set/Clear Pending Bit 253" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252  ,Set/Clear Pending Bit 252" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND251  ,Set/Clear Pending Bit 251" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND250  ,Set/Clear Pending Bit 250" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249  ,Set/Clear Pending Bit 249" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND248  ,Set/Clear Pending Bit 248" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND247  ,Set/Clear Pending Bit 247" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246  ,Set/Clear Pending Bit 246" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND245  ,Set/Clear Pending Bit 245" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND244  ,Set/Clear Pending Bit 244" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243  ,Set/Clear Pending Bit 243" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND242  ,Set/Clear Pending Bit 242" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND241  ,Set/Clear Pending Bit 241" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240  ,Set/Clear Pending Bit 240" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND239  ,Set/Clear Pending Bit 239" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND238  ,Set/Clear Pending Bit 238" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237  ,Set/Clear Pending Bit 237" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND236  ,Set/Clear Pending Bit 236" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND235  ,Set/Clear Pending Bit 235" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234  ,Set/Clear Pending Bit 234" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND233  ,Set/Clear Pending Bit 233" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND232  ,Set/Clear Pending Bit 232" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231  ,Set/Clear Pending Bit 231" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND230  ,Set/Clear Pending Bit 230" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND229  ,Set/Clear Pending Bit 229" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228  ,Set/Clear Pending Bit 228" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND227  ,Set/Clear Pending Bit 227" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND226  ,Set/Clear Pending Bit 226" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225  ,Set/Clear Pending Bit 225" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND224  ,Set/Clear Pending Bit 224" "Not pending,Pending"
else
hgroup.long 0x021C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287  ,Set/Clear Pending Bit 287" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND286  ,Set/Clear Pending Bit 286" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND285  ,Set/Clear Pending Bit 285" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284  ,Set/Clear Pending Bit 284" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND283  ,Set/Clear Pending Bit 283" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND282  ,Set/Clear Pending Bit 282" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281  ,Set/Clear Pending Bit 281" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND280  ,Set/Clear Pending Bit 280" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND279  ,Set/Clear Pending Bit 279" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278  ,Set/Clear Pending Bit 278" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND277  ,Set/Clear Pending Bit 277" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND276  ,Set/Clear Pending Bit 276" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275  ,Set/Clear Pending Bit 275" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND274  ,Set/Clear Pending Bit 274" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND273  ,Set/Clear Pending Bit 273" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272  ,Set/Clear Pending Bit 272" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND271  ,Set/Clear Pending Bit 271" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND270  ,Set/Clear Pending Bit 270" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269  ,Set/Clear Pending Bit 269" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND268  ,Set/Clear Pending Bit 268" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND267  ,Set/Clear Pending Bit 267" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266  ,Set/Clear Pending Bit 266" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND265  ,Set/Clear Pending Bit 265" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND264  ,Set/Clear Pending Bit 264" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263  ,Set/Clear Pending Bit 263" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND262  ,Set/Clear Pending Bit 262" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND261  ,Set/Clear Pending Bit 261" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260  ,Set/Clear Pending Bit 260" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND259  ,Set/Clear Pending Bit 259" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND258  ,Set/Clear Pending Bit 258" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257  ,Set/Clear Pending Bit 257" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND256  ,Set/Clear Pending Bit 256" "Not pending,Pending"
else
hgroup.long 0x0220++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319  ,Set/Clear Pending Bit 319" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND318  ,Set/Clear Pending Bit 318" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND317  ,Set/Clear Pending Bit 317" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316  ,Set/Clear Pending Bit 316" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND315  ,Set/Clear Pending Bit 315" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND314  ,Set/Clear Pending Bit 314" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313  ,Set/Clear Pending Bit 313" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND312  ,Set/Clear Pending Bit 312" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND311  ,Set/Clear Pending Bit 311" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310  ,Set/Clear Pending Bit 310" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND309  ,Set/Clear Pending Bit 309" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND308  ,Set/Clear Pending Bit 308" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307  ,Set/Clear Pending Bit 307" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND306  ,Set/Clear Pending Bit 306" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND305  ,Set/Clear Pending Bit 305" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304  ,Set/Clear Pending Bit 304" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND303  ,Set/Clear Pending Bit 303" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND302  ,Set/Clear Pending Bit 302" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301  ,Set/Clear Pending Bit 301" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND300  ,Set/Clear Pending Bit 300" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND299  ,Set/Clear Pending Bit 299" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298  ,Set/Clear Pending Bit 298" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND297  ,Set/Clear Pending Bit 297" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND296  ,Set/Clear Pending Bit 296" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295  ,Set/Clear Pending Bit 295" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND294  ,Set/Clear Pending Bit 294" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND293  ,Set/Clear Pending Bit 293" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292  ,Set/Clear Pending Bit 292" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND291  ,Set/Clear Pending Bit 291" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND290  ,Set/Clear Pending Bit 290" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289  ,Set/Clear Pending Bit 289" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND288  ,Set/Clear Pending Bit 288" "Not pending,Pending"
else
hgroup.long 0x0224++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351  ,Set/Clear Pending Bit 351" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND350  ,Set/Clear Pending Bit 350" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND349  ,Set/Clear Pending Bit 349" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348  ,Set/Clear Pending Bit 348" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND347  ,Set/Clear Pending Bit 347" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND346  ,Set/Clear Pending Bit 346" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345  ,Set/Clear Pending Bit 345" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND344  ,Set/Clear Pending Bit 344" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND343  ,Set/Clear Pending Bit 343" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342  ,Set/Clear Pending Bit 342" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND341  ,Set/Clear Pending Bit 341" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND340  ,Set/Clear Pending Bit 340" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339  ,Set/Clear Pending Bit 339" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND338  ,Set/Clear Pending Bit 338" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND337  ,Set/Clear Pending Bit 337" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336  ,Set/Clear Pending Bit 336" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND335  ,Set/Clear Pending Bit 335" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND334  ,Set/Clear Pending Bit 334" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333  ,Set/Clear Pending Bit 333" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND332  ,Set/Clear Pending Bit 332" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND331  ,Set/Clear Pending Bit 331" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330  ,Set/Clear Pending Bit 330" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND329  ,Set/Clear Pending Bit 329" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND328  ,Set/Clear Pending Bit 328" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327  ,Set/Clear Pending Bit 327" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND326  ,Set/Clear Pending Bit 326" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND325  ,Set/Clear Pending Bit 325" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324  ,Set/Clear Pending Bit 324" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND323  ,Set/Clear Pending Bit 323" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND322  ,Set/Clear Pending Bit 322" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321  ,Set/Clear Pending Bit 321" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND320  ,Set/Clear Pending Bit 320" "Not pending,Pending"
else
hgroup.long 0x0228++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383  ,Set/Clear Pending Bit 383" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND382  ,Set/Clear Pending Bit 382" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND381  ,Set/Clear Pending Bit 381" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380  ,Set/Clear Pending Bit 380" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND379  ,Set/Clear Pending Bit 379" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND378  ,Set/Clear Pending Bit 378" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377  ,Set/Clear Pending Bit 377" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND376  ,Set/Clear Pending Bit 376" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND375  ,Set/Clear Pending Bit 375" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374  ,Set/Clear Pending Bit 374" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND373  ,Set/Clear Pending Bit 373" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND372  ,Set/Clear Pending Bit 372" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371  ,Set/Clear Pending Bit 371" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND370  ,Set/Clear Pending Bit 370" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND369  ,Set/Clear Pending Bit 369" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368  ,Set/Clear Pending Bit 368" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND367  ,Set/Clear Pending Bit 367" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND366  ,Set/Clear Pending Bit 366" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365  ,Set/Clear Pending Bit 365" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND364  ,Set/Clear Pending Bit 364" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND363  ,Set/Clear Pending Bit 363" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362  ,Set/Clear Pending Bit 362" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND361  ,Set/Clear Pending Bit 361" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND360  ,Set/Clear Pending Bit 360" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359  ,Set/Clear Pending Bit 359" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND358  ,Set/Clear Pending Bit 358" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND357  ,Set/Clear Pending Bit 357" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356  ,Set/Clear Pending Bit 356" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND355  ,Set/Clear Pending Bit 355" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND354  ,Set/Clear Pending Bit 354" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353  ,Set/Clear Pending Bit 353" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND352  ,Set/Clear Pending Bit 352" "Not pending,Pending"
else
hgroup.long 0x022C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415  ,Set/Clear Pending Bit 415" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND414  ,Set/Clear Pending Bit 414" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND413  ,Set/Clear Pending Bit 413" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412  ,Set/Clear Pending Bit 412" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND411  ,Set/Clear Pending Bit 411" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND410  ,Set/Clear Pending Bit 410" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409  ,Set/Clear Pending Bit 409" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND408  ,Set/Clear Pending Bit 408" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND407  ,Set/Clear Pending Bit 407" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406  ,Set/Clear Pending Bit 406" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND405  ,Set/Clear Pending Bit 405" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND404  ,Set/Clear Pending Bit 404" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403  ,Set/Clear Pending Bit 403" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND402  ,Set/Clear Pending Bit 402" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND401  ,Set/Clear Pending Bit 401" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400  ,Set/Clear Pending Bit 400" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND399  ,Set/Clear Pending Bit 399" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND398  ,Set/Clear Pending Bit 398" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397  ,Set/Clear Pending Bit 397" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND396  ,Set/Clear Pending Bit 396" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND395  ,Set/Clear Pending Bit 395" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394  ,Set/Clear Pending Bit 394" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND393  ,Set/Clear Pending Bit 393" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND392  ,Set/Clear Pending Bit 392" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391  ,Set/Clear Pending Bit 391" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND390  ,Set/Clear Pending Bit 390" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND389  ,Set/Clear Pending Bit 389" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388  ,Set/Clear Pending Bit 388" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND387  ,Set/Clear Pending Bit 387" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND386  ,Set/Clear Pending Bit 386" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385  ,Set/Clear Pending Bit 385" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND384  ,Set/Clear Pending Bit 384" "Not pending,Pending"
else
hgroup.long 0x0230++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447  ,Set/Clear Pending Bit 447" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND446  ,Set/Clear Pending Bit 446" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND445  ,Set/Clear Pending Bit 445" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444  ,Set/Clear Pending Bit 444" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND443  ,Set/Clear Pending Bit 443" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND442  ,Set/Clear Pending Bit 442" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441  ,Set/Clear Pending Bit 441" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND440  ,Set/Clear Pending Bit 440" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND439  ,Set/Clear Pending Bit 439" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438  ,Set/Clear Pending Bit 438" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND437  ,Set/Clear Pending Bit 437" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND436  ,Set/Clear Pending Bit 436" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435  ,Set/Clear Pending Bit 435" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND434  ,Set/Clear Pending Bit 434" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND433  ,Set/Clear Pending Bit 433" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432  ,Set/Clear Pending Bit 432" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND431  ,Set/Clear Pending Bit 431" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND430  ,Set/Clear Pending Bit 430" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429  ,Set/Clear Pending Bit 429" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND428  ,Set/Clear Pending Bit 428" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND427  ,Set/Clear Pending Bit 427" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426  ,Set/Clear Pending Bit 426" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND425  ,Set/Clear Pending Bit 425" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND424  ,Set/Clear Pending Bit 424" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423  ,Set/Clear Pending Bit 423" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND422  ,Set/Clear Pending Bit 422" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND421  ,Set/Clear Pending Bit 421" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420  ,Set/Clear Pending Bit 420" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND419  ,Set/Clear Pending Bit 419" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND418  ,Set/Clear Pending Bit 418" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417  ,Set/Clear Pending Bit 417" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND416  ,Set/Clear Pending Bit 416" "Not pending,Pending"
else
hgroup.long 0x0234++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479  ,Set/Clear Pending Bit 479" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND478  ,Set/Clear Pending Bit 478" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND477  ,Set/Clear Pending Bit 477" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476  ,Set/Clear Pending Bit 476" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND475  ,Set/Clear Pending Bit 475" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND474  ,Set/Clear Pending Bit 474" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473  ,Set/Clear Pending Bit 473" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND472  ,Set/Clear Pending Bit 472" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND471  ,Set/Clear Pending Bit 471" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470  ,Set/Clear Pending Bit 470" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND469  ,Set/Clear Pending Bit 469" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND468  ,Set/Clear Pending Bit 468" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467  ,Set/Clear Pending Bit 467" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND466  ,Set/Clear Pending Bit 466" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND465  ,Set/Clear Pending Bit 465" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464  ,Set/Clear Pending Bit 464" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND463  ,Set/Clear Pending Bit 463" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND462  ,Set/Clear Pending Bit 462" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461  ,Set/Clear Pending Bit 461" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND460  ,Set/Clear Pending Bit 460" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND459  ,Set/Clear Pending Bit 459" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458  ,Set/Clear Pending Bit 458" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND457  ,Set/Clear Pending Bit 457" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND456  ,Set/Clear Pending Bit 456" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455  ,Set/Clear Pending Bit 455" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND454  ,Set/Clear Pending Bit 454" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND453  ,Set/Clear Pending Bit 453" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452  ,Set/Clear Pending Bit 452" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND451  ,Set/Clear Pending Bit 451" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND450  ,Set/Clear Pending Bit 450" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449  ,Set/Clear Pending Bit 449" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND448  ,Set/Clear Pending Bit 448" "Not pending,Pending"
else
hgroup.long 0x0238++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511  ,Set/Clear Pending Bit 511" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND510  ,Set/Clear Pending Bit 510" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND509  ,Set/Clear Pending Bit 509" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508  ,Set/Clear Pending Bit 508" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND507  ,Set/Clear Pending Bit 507" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND506  ,Set/Clear Pending Bit 506" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505  ,Set/Clear Pending Bit 505" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND504  ,Set/Clear Pending Bit 504" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND503  ,Set/Clear Pending Bit 503" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502  ,Set/Clear Pending Bit 502" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND501  ,Set/Clear Pending Bit 501" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND500  ,Set/Clear Pending Bit 500" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499  ,Set/Clear Pending Bit 499" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND498  ,Set/Clear Pending Bit 498" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND497  ,Set/Clear Pending Bit 497" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496  ,Set/Clear Pending Bit 496" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND495  ,Set/Clear Pending Bit 495" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND494  ,Set/Clear Pending Bit 494" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493  ,Set/Clear Pending Bit 493" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND492  ,Set/Clear Pending Bit 492" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND491  ,Set/Clear Pending Bit 491" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490  ,Set/Clear Pending Bit 490" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND489  ,Set/Clear Pending Bit 489" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND488  ,Set/Clear Pending Bit 488" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487  ,Set/Clear Pending Bit 487" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND486  ,Set/Clear Pending Bit 486" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND485  ,Set/Clear Pending Bit 485" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484  ,Set/Clear Pending Bit 484" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND483  ,Set/Clear Pending Bit 483" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND482  ,Set/Clear Pending Bit 482" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481  ,Set/Clear Pending Bit 481" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND480  ,Set/Clear Pending Bit 480" "Not pending,Pending"
else
hgroup.long 0x023C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543  ,Set/Clear Pending Bit 543" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND542  ,Set/Clear Pending Bit 542" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND541  ,Set/Clear Pending Bit 541" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540  ,Set/Clear Pending Bit 540" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND539  ,Set/Clear Pending Bit 539" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND538  ,Set/Clear Pending Bit 538" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537  ,Set/Clear Pending Bit 537" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND536  ,Set/Clear Pending Bit 536" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND535  ,Set/Clear Pending Bit 535" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534  ,Set/Clear Pending Bit 534" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND533  ,Set/Clear Pending Bit 533" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND532  ,Set/Clear Pending Bit 532" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531  ,Set/Clear Pending Bit 531" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND530  ,Set/Clear Pending Bit 530" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND529  ,Set/Clear Pending Bit 529" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528  ,Set/Clear Pending Bit 528" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND527  ,Set/Clear Pending Bit 527" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND526  ,Set/Clear Pending Bit 526" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525  ,Set/Clear Pending Bit 525" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND524  ,Set/Clear Pending Bit 524" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND523  ,Set/Clear Pending Bit 523" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522  ,Set/Clear Pending Bit 522" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND521  ,Set/Clear Pending Bit 521" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND520  ,Set/Clear Pending Bit 520" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519  ,Set/Clear Pending Bit 519" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND518  ,Set/Clear Pending Bit 518" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND517  ,Set/Clear Pending Bit 517" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516  ,Set/Clear Pending Bit 516" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND515  ,Set/Clear Pending Bit 515" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND514  ,Set/Clear Pending Bit 514" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513  ,Set/Clear Pending Bit 513" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND512  ,Set/Clear Pending Bit 512" "Not pending,Pending"
else
hgroup.long 0x0240++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575  ,Set/Clear Pending Bit 575" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND574  ,Set/Clear Pending Bit 574" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND573  ,Set/Clear Pending Bit 573" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572  ,Set/Clear Pending Bit 572" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND571  ,Set/Clear Pending Bit 571" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND570  ,Set/Clear Pending Bit 570" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569  ,Set/Clear Pending Bit 569" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND568  ,Set/Clear Pending Bit 568" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND567  ,Set/Clear Pending Bit 567" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566  ,Set/Clear Pending Bit 566" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND565  ,Set/Clear Pending Bit 565" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND564  ,Set/Clear Pending Bit 564" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563  ,Set/Clear Pending Bit 563" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND562  ,Set/Clear Pending Bit 562" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND561  ,Set/Clear Pending Bit 561" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560  ,Set/Clear Pending Bit 560" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND559  ,Set/Clear Pending Bit 559" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND558  ,Set/Clear Pending Bit 558" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557  ,Set/Clear Pending Bit 557" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND556  ,Set/Clear Pending Bit 556" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND555  ,Set/Clear Pending Bit 555" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554  ,Set/Clear Pending Bit 554" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND553  ,Set/Clear Pending Bit 553" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND552  ,Set/Clear Pending Bit 552" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551  ,Set/Clear Pending Bit 551" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND550  ,Set/Clear Pending Bit 550" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND549  ,Set/Clear Pending Bit 549" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548  ,Set/Clear Pending Bit 548" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND547  ,Set/Clear Pending Bit 547" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND546  ,Set/Clear Pending Bit 546" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545  ,Set/Clear Pending Bit 545" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND544  ,Set/Clear Pending Bit 544" "Not pending,Pending"
else
hgroup.long 0x0244++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607  ,Set/Clear Pending Bit 607" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND606  ,Set/Clear Pending Bit 606" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND605  ,Set/Clear Pending Bit 605" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604  ,Set/Clear Pending Bit 604" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND603  ,Set/Clear Pending Bit 603" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND602  ,Set/Clear Pending Bit 602" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601  ,Set/Clear Pending Bit 601" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND600  ,Set/Clear Pending Bit 600" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND599  ,Set/Clear Pending Bit 599" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598  ,Set/Clear Pending Bit 598" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND597  ,Set/Clear Pending Bit 597" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND596  ,Set/Clear Pending Bit 596" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595  ,Set/Clear Pending Bit 595" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND594  ,Set/Clear Pending Bit 594" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND593  ,Set/Clear Pending Bit 593" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592  ,Set/Clear Pending Bit 592" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND591  ,Set/Clear Pending Bit 591" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND590  ,Set/Clear Pending Bit 590" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589  ,Set/Clear Pending Bit 589" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND588  ,Set/Clear Pending Bit 588" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND587  ,Set/Clear Pending Bit 587" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586  ,Set/Clear Pending Bit 586" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND585  ,Set/Clear Pending Bit 585" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND584  ,Set/Clear Pending Bit 584" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583  ,Set/Clear Pending Bit 583" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND582  ,Set/Clear Pending Bit 582" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND581  ,Set/Clear Pending Bit 581" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580  ,Set/Clear Pending Bit 580" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND579  ,Set/Clear Pending Bit 579" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND578  ,Set/Clear Pending Bit 578" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577  ,Set/Clear Pending Bit 577" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND576  ,Set/Clear Pending Bit 576" "Not pending,Pending"
else
hgroup.long 0x0248++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639  ,Set/Clear Pending Bit 639" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND638  ,Set/Clear Pending Bit 638" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND637  ,Set/Clear Pending Bit 637" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636  ,Set/Clear Pending Bit 636" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND635  ,Set/Clear Pending Bit 635" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND634  ,Set/Clear Pending Bit 634" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633  ,Set/Clear Pending Bit 633" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND632  ,Set/Clear Pending Bit 632" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND631  ,Set/Clear Pending Bit 631" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630  ,Set/Clear Pending Bit 630" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND629  ,Set/Clear Pending Bit 629" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND628  ,Set/Clear Pending Bit 628" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627  ,Set/Clear Pending Bit 627" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND626  ,Set/Clear Pending Bit 626" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND625  ,Set/Clear Pending Bit 625" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624  ,Set/Clear Pending Bit 624" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND623  ,Set/Clear Pending Bit 623" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND622  ,Set/Clear Pending Bit 622" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621  ,Set/Clear Pending Bit 621" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND620  ,Set/Clear Pending Bit 620" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND619  ,Set/Clear Pending Bit 619" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618  ,Set/Clear Pending Bit 618" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND617  ,Set/Clear Pending Bit 617" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND616  ,Set/Clear Pending Bit 616" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615  ,Set/Clear Pending Bit 615" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND614  ,Set/Clear Pending Bit 614" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND613  ,Set/Clear Pending Bit 613" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612  ,Set/Clear Pending Bit 612" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND611  ,Set/Clear Pending Bit 611" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND610  ,Set/Clear Pending Bit 610" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609  ,Set/Clear Pending Bit 609" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND608  ,Set/Clear Pending Bit 608" "Not pending,Pending"
else
hgroup.long 0x024C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671  ,Set/Clear Pending Bit 671" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND670  ,Set/Clear Pending Bit 670" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND669  ,Set/Clear Pending Bit 669" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668  ,Set/Clear Pending Bit 668" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND667  ,Set/Clear Pending Bit 667" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND666  ,Set/Clear Pending Bit 666" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665  ,Set/Clear Pending Bit 665" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND664  ,Set/Clear Pending Bit 664" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND663  ,Set/Clear Pending Bit 663" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662  ,Set/Clear Pending Bit 662" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND661  ,Set/Clear Pending Bit 661" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND660  ,Set/Clear Pending Bit 660" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659  ,Set/Clear Pending Bit 659" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND658  ,Set/Clear Pending Bit 658" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND657  ,Set/Clear Pending Bit 657" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656  ,Set/Clear Pending Bit 656" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND655  ,Set/Clear Pending Bit 655" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND654  ,Set/Clear Pending Bit 654" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653  ,Set/Clear Pending Bit 653" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND652  ,Set/Clear Pending Bit 652" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND651  ,Set/Clear Pending Bit 651" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650  ,Set/Clear Pending Bit 650" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND649  ,Set/Clear Pending Bit 649" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND648  ,Set/Clear Pending Bit 648" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647  ,Set/Clear Pending Bit 647" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND646  ,Set/Clear Pending Bit 646" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND645  ,Set/Clear Pending Bit 645" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644  ,Set/Clear Pending Bit 644" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND643  ,Set/Clear Pending Bit 643" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND642  ,Set/Clear Pending Bit 642" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641  ,Set/Clear Pending Bit 641" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND640  ,Set/Clear Pending Bit 640" "Not pending,Pending"
else
hgroup.long 0x0250++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703  ,Set/Clear Pending Bit 703" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND702  ,Set/Clear Pending Bit 702" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND701  ,Set/Clear Pending Bit 701" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700  ,Set/Clear Pending Bit 700" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND699  ,Set/Clear Pending Bit 699" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND698  ,Set/Clear Pending Bit 698" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697  ,Set/Clear Pending Bit 697" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND696  ,Set/Clear Pending Bit 696" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND695  ,Set/Clear Pending Bit 695" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694  ,Set/Clear Pending Bit 694" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND693  ,Set/Clear Pending Bit 693" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND692  ,Set/Clear Pending Bit 692" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691  ,Set/Clear Pending Bit 691" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND690  ,Set/Clear Pending Bit 690" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND689  ,Set/Clear Pending Bit 689" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688  ,Set/Clear Pending Bit 688" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND687  ,Set/Clear Pending Bit 687" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND686  ,Set/Clear Pending Bit 686" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685  ,Set/Clear Pending Bit 685" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND684  ,Set/Clear Pending Bit 684" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND683  ,Set/Clear Pending Bit 683" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682  ,Set/Clear Pending Bit 682" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND681  ,Set/Clear Pending Bit 681" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND680  ,Set/Clear Pending Bit 680" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679  ,Set/Clear Pending Bit 679" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND678  ,Set/Clear Pending Bit 678" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND677  ,Set/Clear Pending Bit 677" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676  ,Set/Clear Pending Bit 676" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND675  ,Set/Clear Pending Bit 675" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND674  ,Set/Clear Pending Bit 674" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673  ,Set/Clear Pending Bit 673" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND672  ,Set/Clear Pending Bit 672" "Not pending,Pending"
else
hgroup.long 0x0254++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735  ,Set/Clear Pending Bit 735" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND734  ,Set/Clear Pending Bit 734" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND733  ,Set/Clear Pending Bit 733" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732  ,Set/Clear Pending Bit 732" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND731  ,Set/Clear Pending Bit 731" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND730  ,Set/Clear Pending Bit 730" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729  ,Set/Clear Pending Bit 729" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND728  ,Set/Clear Pending Bit 728" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND727  ,Set/Clear Pending Bit 727" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726  ,Set/Clear Pending Bit 726" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND725  ,Set/Clear Pending Bit 725" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND724  ,Set/Clear Pending Bit 724" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723  ,Set/Clear Pending Bit 723" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND722  ,Set/Clear Pending Bit 722" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND721  ,Set/Clear Pending Bit 721" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720  ,Set/Clear Pending Bit 720" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND719  ,Set/Clear Pending Bit 719" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND718  ,Set/Clear Pending Bit 718" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717  ,Set/Clear Pending Bit 717" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND716  ,Set/Clear Pending Bit 716" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND715  ,Set/Clear Pending Bit 715" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714  ,Set/Clear Pending Bit 714" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND713  ,Set/Clear Pending Bit 713" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND712  ,Set/Clear Pending Bit 712" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711  ,Set/Clear Pending Bit 711" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND710  ,Set/Clear Pending Bit 710" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND709  ,Set/Clear Pending Bit 709" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708  ,Set/Clear Pending Bit 708" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND707  ,Set/Clear Pending Bit 707" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND706  ,Set/Clear Pending Bit 706" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705  ,Set/Clear Pending Bit 705" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND704  ,Set/Clear Pending Bit 704" "Not pending,Pending"
else
hgroup.long 0x0258++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767  ,Set/Clear Pending Bit 767" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND766  ,Set/Clear Pending Bit 766" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND765  ,Set/Clear Pending Bit 765" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764  ,Set/Clear Pending Bit 764" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND763  ,Set/Clear Pending Bit 763" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND762  ,Set/Clear Pending Bit 762" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761  ,Set/Clear Pending Bit 761" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND760  ,Set/Clear Pending Bit 760" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND759  ,Set/Clear Pending Bit 759" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758  ,Set/Clear Pending Bit 758" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND757  ,Set/Clear Pending Bit 757" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND756  ,Set/Clear Pending Bit 756" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755  ,Set/Clear Pending Bit 755" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND754  ,Set/Clear Pending Bit 754" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND753  ,Set/Clear Pending Bit 753" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752  ,Set/Clear Pending Bit 752" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND751  ,Set/Clear Pending Bit 751" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND750  ,Set/Clear Pending Bit 750" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749  ,Set/Clear Pending Bit 749" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND748  ,Set/Clear Pending Bit 748" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND747  ,Set/Clear Pending Bit 747" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746  ,Set/Clear Pending Bit 746" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND745  ,Set/Clear Pending Bit 745" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND744  ,Set/Clear Pending Bit 744" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743  ,Set/Clear Pending Bit 743" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND742  ,Set/Clear Pending Bit 742" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND741  ,Set/Clear Pending Bit 741" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740  ,Set/Clear Pending Bit 740" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND739  ,Set/Clear Pending Bit 739" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND738  ,Set/Clear Pending Bit 738" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737  ,Set/Clear Pending Bit 737" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND736  ,Set/Clear Pending Bit 736" "Not pending,Pending"
else
hgroup.long 0x025C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799  ,Set/Clear Pending Bit 799" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND798  ,Set/Clear Pending Bit 798" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND797  ,Set/Clear Pending Bit 797" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796  ,Set/Clear Pending Bit 796" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND795  ,Set/Clear Pending Bit 795" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND794  ,Set/Clear Pending Bit 794" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793  ,Set/Clear Pending Bit 793" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND792  ,Set/Clear Pending Bit 792" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND791  ,Set/Clear Pending Bit 791" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790  ,Set/Clear Pending Bit 790" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND789  ,Set/Clear Pending Bit 789" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND788  ,Set/Clear Pending Bit 788" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787  ,Set/Clear Pending Bit 787" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND786  ,Set/Clear Pending Bit 786" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND785  ,Set/Clear Pending Bit 785" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784  ,Set/Clear Pending Bit 784" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND783  ,Set/Clear Pending Bit 783" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND782  ,Set/Clear Pending Bit 782" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781  ,Set/Clear Pending Bit 781" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND780  ,Set/Clear Pending Bit 780" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND779  ,Set/Clear Pending Bit 779" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778  ,Set/Clear Pending Bit 778" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND777  ,Set/Clear Pending Bit 777" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND776  ,Set/Clear Pending Bit 776" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775  ,Set/Clear Pending Bit 775" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND774  ,Set/Clear Pending Bit 774" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND773  ,Set/Clear Pending Bit 773" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772  ,Set/Clear Pending Bit 772" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND771  ,Set/Clear Pending Bit 771" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND770  ,Set/Clear Pending Bit 770" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769  ,Set/Clear Pending Bit 769" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND768  ,Set/Clear Pending Bit 768" "Not pending,Pending"
else
hgroup.long 0x0260++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831  ,Set/Clear Pending Bit 831" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND830  ,Set/Clear Pending Bit 830" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND829  ,Set/Clear Pending Bit 829" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828  ,Set/Clear Pending Bit 828" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND827  ,Set/Clear Pending Bit 827" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND826  ,Set/Clear Pending Bit 826" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825  ,Set/Clear Pending Bit 825" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND824  ,Set/Clear Pending Bit 824" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND823  ,Set/Clear Pending Bit 823" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822  ,Set/Clear Pending Bit 822" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND821  ,Set/Clear Pending Bit 821" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND820  ,Set/Clear Pending Bit 820" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819  ,Set/Clear Pending Bit 819" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND818  ,Set/Clear Pending Bit 818" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND817  ,Set/Clear Pending Bit 817" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816  ,Set/Clear Pending Bit 816" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND815  ,Set/Clear Pending Bit 815" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND814  ,Set/Clear Pending Bit 814" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813  ,Set/Clear Pending Bit 813" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND812  ,Set/Clear Pending Bit 812" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND811  ,Set/Clear Pending Bit 811" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810  ,Set/Clear Pending Bit 810" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND809  ,Set/Clear Pending Bit 809" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND808  ,Set/Clear Pending Bit 808" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807  ,Set/Clear Pending Bit 807" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND806  ,Set/Clear Pending Bit 806" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND805  ,Set/Clear Pending Bit 805" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804  ,Set/Clear Pending Bit 804" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND803  ,Set/Clear Pending Bit 803" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND802  ,Set/Clear Pending Bit 802" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801  ,Set/Clear Pending Bit 801" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND800  ,Set/Clear Pending Bit 800" "Not pending,Pending"
else
hgroup.long 0x0264++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863  ,Set/Clear Pending Bit 863" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND862  ,Set/Clear Pending Bit 862" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND861  ,Set/Clear Pending Bit 861" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860  ,Set/Clear Pending Bit 860" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND859  ,Set/Clear Pending Bit 859" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND858  ,Set/Clear Pending Bit 858" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857  ,Set/Clear Pending Bit 857" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND856  ,Set/Clear Pending Bit 856" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND855  ,Set/Clear Pending Bit 855" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854  ,Set/Clear Pending Bit 854" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND853  ,Set/Clear Pending Bit 853" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND852  ,Set/Clear Pending Bit 852" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851  ,Set/Clear Pending Bit 851" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND850  ,Set/Clear Pending Bit 850" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND849  ,Set/Clear Pending Bit 849" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848  ,Set/Clear Pending Bit 848" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND847  ,Set/Clear Pending Bit 847" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND846  ,Set/Clear Pending Bit 846" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845  ,Set/Clear Pending Bit 845" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND844  ,Set/Clear Pending Bit 844" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND843  ,Set/Clear Pending Bit 843" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842  ,Set/Clear Pending Bit 842" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND841  ,Set/Clear Pending Bit 841" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND840  ,Set/Clear Pending Bit 840" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839  ,Set/Clear Pending Bit 839" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND838  ,Set/Clear Pending Bit 838" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND837  ,Set/Clear Pending Bit 837" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836  ,Set/Clear Pending Bit 836" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND835  ,Set/Clear Pending Bit 835" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND834  ,Set/Clear Pending Bit 834" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833  ,Set/Clear Pending Bit 833" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND832  ,Set/Clear Pending Bit 832" "Not pending,Pending"
else
hgroup.long 0x0268++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895  ,Set/Clear Pending Bit 895" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND894  ,Set/Clear Pending Bit 894" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND893  ,Set/Clear Pending Bit 893" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892  ,Set/Clear Pending Bit 892" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND891  ,Set/Clear Pending Bit 891" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND890  ,Set/Clear Pending Bit 890" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889  ,Set/Clear Pending Bit 889" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND888  ,Set/Clear Pending Bit 888" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND887  ,Set/Clear Pending Bit 887" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886  ,Set/Clear Pending Bit 886" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND885  ,Set/Clear Pending Bit 885" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND884  ,Set/Clear Pending Bit 884" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883  ,Set/Clear Pending Bit 883" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND882  ,Set/Clear Pending Bit 882" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND881  ,Set/Clear Pending Bit 881" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880  ,Set/Clear Pending Bit 880" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND879  ,Set/Clear Pending Bit 879" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND878  ,Set/Clear Pending Bit 878" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877  ,Set/Clear Pending Bit 877" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND876  ,Set/Clear Pending Bit 876" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND875  ,Set/Clear Pending Bit 875" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874  ,Set/Clear Pending Bit 874" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND873  ,Set/Clear Pending Bit 873" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND872  ,Set/Clear Pending Bit 872" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871  ,Set/Clear Pending Bit 871" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND870  ,Set/Clear Pending Bit 870" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND869  ,Set/Clear Pending Bit 869" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868  ,Set/Clear Pending Bit 868" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND867  ,Set/Clear Pending Bit 867" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND866  ,Set/Clear Pending Bit 866" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865  ,Set/Clear Pending Bit 865" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND864  ,Set/Clear Pending Bit 864" "Not pending,Pending"
else
hgroup.long 0x026C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927  ,Set/Clear Pending Bit 927" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND926  ,Set/Clear Pending Bit 926" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND925  ,Set/Clear Pending Bit 925" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924  ,Set/Clear Pending Bit 924" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND923  ,Set/Clear Pending Bit 923" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND922  ,Set/Clear Pending Bit 922" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921  ,Set/Clear Pending Bit 921" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND920  ,Set/Clear Pending Bit 920" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND919  ,Set/Clear Pending Bit 919" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918  ,Set/Clear Pending Bit 918" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND917  ,Set/Clear Pending Bit 917" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND916  ,Set/Clear Pending Bit 916" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915  ,Set/Clear Pending Bit 915" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND914  ,Set/Clear Pending Bit 914" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND913  ,Set/Clear Pending Bit 913" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912  ,Set/Clear Pending Bit 912" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND911  ,Set/Clear Pending Bit 911" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND910  ,Set/Clear Pending Bit 910" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909  ,Set/Clear Pending Bit 909" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND908  ,Set/Clear Pending Bit 908" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND907  ,Set/Clear Pending Bit 907" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906  ,Set/Clear Pending Bit 906" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND905  ,Set/Clear Pending Bit 905" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND904  ,Set/Clear Pending Bit 904" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903  ,Set/Clear Pending Bit 903" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND902  ,Set/Clear Pending Bit 902" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND901  ,Set/Clear Pending Bit 901" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900  ,Set/Clear Pending Bit 900" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND899  ,Set/Clear Pending Bit 899" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND898  ,Set/Clear Pending Bit 898" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897  ,Set/Clear Pending Bit 897" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND896  ,Set/Clear Pending Bit 896" "Not pending,Pending"
else
hgroup.long 0x0270++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959  ,Set/Clear Pending Bit 959" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND958  ,Set/Clear Pending Bit 958" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND957  ,Set/Clear Pending Bit 957" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956  ,Set/Clear Pending Bit 956" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND955  ,Set/Clear Pending Bit 955" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND954  ,Set/Clear Pending Bit 954" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953  ,Set/Clear Pending Bit 953" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND952  ,Set/Clear Pending Bit 952" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND951  ,Set/Clear Pending Bit 951" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950  ,Set/Clear Pending Bit 950" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND949  ,Set/Clear Pending Bit 949" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND948  ,Set/Clear Pending Bit 948" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947  ,Set/Clear Pending Bit 947" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND946  ,Set/Clear Pending Bit 946" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND945  ,Set/Clear Pending Bit 945" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944  ,Set/Clear Pending Bit 944" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND943  ,Set/Clear Pending Bit 943" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND942  ,Set/Clear Pending Bit 942" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941  ,Set/Clear Pending Bit 941" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND940  ,Set/Clear Pending Bit 940" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND939  ,Set/Clear Pending Bit 939" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938  ,Set/Clear Pending Bit 938" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND937  ,Set/Clear Pending Bit 937" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND936  ,Set/Clear Pending Bit 936" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935  ,Set/Clear Pending Bit 935" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND934  ,Set/Clear Pending Bit 934" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND933  ,Set/Clear Pending Bit 933" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932  ,Set/Clear Pending Bit 932" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND931  ,Set/Clear Pending Bit 931" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND930  ,Set/Clear Pending Bit 930" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929  ,Set/Clear Pending Bit 929" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND928  ,Set/Clear Pending Bit 928" "Not pending,Pending"
else
hgroup.long 0x0274++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991  ,Set/Clear Pending Bit 991" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND990  ,Set/Clear Pending Bit 990" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND989  ,Set/Clear Pending Bit 989" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988  ,Set/Clear Pending Bit 988" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND987  ,Set/Clear Pending Bit 987" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND986  ,Set/Clear Pending Bit 986" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985  ,Set/Clear Pending Bit 985" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND984  ,Set/Clear Pending Bit 984" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND983  ,Set/Clear Pending Bit 983" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982  ,Set/Clear Pending Bit 982" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND981  ,Set/Clear Pending Bit 981" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND980  ,Set/Clear Pending Bit 980" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979  ,Set/Clear Pending Bit 979" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND978  ,Set/Clear Pending Bit 978" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND977  ,Set/Clear Pending Bit 977" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976  ,Set/Clear Pending Bit 976" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND975  ,Set/Clear Pending Bit 975" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND974  ,Set/Clear Pending Bit 974" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973  ,Set/Clear Pending Bit 973" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND972  ,Set/Clear Pending Bit 972" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND971  ,Set/Clear Pending Bit 971" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970  ,Set/Clear Pending Bit 970" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND969  ,Set/Clear Pending Bit 969" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND968  ,Set/Clear Pending Bit 968" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967  ,Set/Clear Pending Bit 967" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND966  ,Set/Clear Pending Bit 966" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND965  ,Set/Clear Pending Bit 965" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964  ,Set/Clear Pending Bit 964" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND963  ,Set/Clear Pending Bit 963" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND962  ,Set/Clear Pending Bit 962" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961  ,Set/Clear Pending Bit 961" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND960  ,Set/Clear Pending Bit 960" "Not pending,Pending"
else
hgroup.long 0x0278++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
endif
tree.end
width 24.
tree "Set/Clear Active Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0300++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0300++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31  ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30  ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29  ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28  ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27  ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26  ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25  ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24  ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23  ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22  ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21  ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20  ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19  ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18  ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17  ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16  ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15  ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14  ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13  ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12  ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11  ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10  ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9   ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8   ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7   ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6   ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5   ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4   ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3   ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2   ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1   ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0   ,Set/Clear Active Bit 0" "Not active,Active"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63  ,Set/Clear Active Bit 63" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE62  ,Set/Clear Active Bit 62" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE61  ,Set/Clear Active Bit 61" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60  ,Set/Clear Active Bit 60" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE59  ,Set/Clear Active Bit 59" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE58  ,Set/Clear Active Bit 58" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57  ,Set/Clear Active Bit 57" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE56  ,Set/Clear Active Bit 56" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE55  ,Set/Clear Active Bit 55" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54  ,Set/Clear Active Bit 54" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE53  ,Set/Clear Active Bit 53" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE52  ,Set/Clear Active Bit 52" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51  ,Set/Clear Active Bit 51" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE50  ,Set/Clear Active Bit 50" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE49  ,Set/Clear Active Bit 49" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48  ,Set/Clear Active Bit 48" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE47  ,Set/Clear Active Bit 47" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE46  ,Set/Clear Active Bit 46" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45  ,Set/Clear Active Bit 45" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE44  ,Set/Clear Active Bit 44" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE43  ,Set/Clear Active Bit 43" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42  ,Set/Clear Active Bit 42" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE41  ,Set/Clear Active Bit 41" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE40  ,Set/Clear Active Bit 40" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39  ,Set/Clear Active Bit 39" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE38  ,Set/Clear Active Bit 38" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE37  ,Set/Clear Active Bit 37" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36  ,Set/Clear Active Bit 36" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE35  ,Set/Clear Active Bit 35" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE34  ,Set/Clear Active Bit 34" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33  ,Set/Clear Active Bit 33" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE32  ,Set/Clear Active Bit 32" "Not active,Active"
else
hgroup.long 0x0304++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95  ,Set/Clear Active Bit 95" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE94  ,Set/Clear Active Bit 94" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE93  ,Set/Clear Active Bit 93" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92  ,Set/Clear Active Bit 92" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE91  ,Set/Clear Active Bit 91" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE90  ,Set/Clear Active Bit 90" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89  ,Set/Clear Active Bit 89" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE88  ,Set/Clear Active Bit 88" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE87  ,Set/Clear Active Bit 87" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86  ,Set/Clear Active Bit 86" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE85  ,Set/Clear Active Bit 85" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE84  ,Set/Clear Active Bit 84" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83  ,Set/Clear Active Bit 83" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE82  ,Set/Clear Active Bit 82" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE81  ,Set/Clear Active Bit 81" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80  ,Set/Clear Active Bit 80" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE79  ,Set/Clear Active Bit 79" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE78  ,Set/Clear Active Bit 78" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77  ,Set/Clear Active Bit 77" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE76  ,Set/Clear Active Bit 76" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE75  ,Set/Clear Active Bit 75" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74  ,Set/Clear Active Bit 74" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE73  ,Set/Clear Active Bit 73" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE72  ,Set/Clear Active Bit 72" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71  ,Set/Clear Active Bit 71" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE70  ,Set/Clear Active Bit 70" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE69  ,Set/Clear Active Bit 69" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68  ,Set/Clear Active Bit 68" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE67  ,Set/Clear Active Bit 67" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE66  ,Set/Clear Active Bit 66" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65  ,Set/Clear Active Bit 65" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE64  ,Set/Clear Active Bit 64" "Not active,Active"
else
hgroup.long 0x0308++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE99  ,Set/Clear Active Bit 99" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE98  ,Set/Clear Active Bit 98" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97  ,Set/Clear Active Bit 97" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE96  ,Set/Clear Active Bit 96" "Not active,Active"
else
hgroup.long 0x030C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
else
hgroup.long 0x0310++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
else
hgroup.long 0x0314++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
else
hgroup.long 0x0318++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
else
hgroup.long 0x031C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
else
hgroup.long 0x0320++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
else
hgroup.long 0x0324++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
else
hgroup.long 0x0328++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
else
hgroup.long 0x032C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
else
hgroup.long 0x0330++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
else
hgroup.long 0x0334++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
else
hgroup.long 0x0338++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
else
hgroup.long 0x033C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0340++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE543 ,Set/Clear Active Bit 543" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE542 ,Set/Clear Active Bit 542" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE541 ,Set/Clear Active Bit 541" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE540 ,Set/Clear Active Bit 540" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE539 ,Set/Clear Active Bit 539" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE538 ,Set/Clear Active Bit 538" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE537 ,Set/Clear Active Bit 537" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE536 ,Set/Clear Active Bit 536" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE535 ,Set/Clear Active Bit 535" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE534 ,Set/Clear Active Bit 534" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE533 ,Set/Clear Active Bit 533" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE532 ,Set/Clear Active Bit 532" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE531 ,Set/Clear Active Bit 531" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE530 ,Set/Clear Active Bit 530" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE529 ,Set/Clear Active Bit 529" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE528 ,Set/Clear Active Bit 528" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE527 ,Set/Clear Active Bit 527" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE526 ,Set/Clear Active Bit 526" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE525 ,Set/Clear Active Bit 525" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE524 ,Set/Clear Active Bit 524" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE523 ,Set/Clear Active Bit 523" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE522 ,Set/Clear Active Bit 522" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE521 ,Set/Clear Active Bit 521" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE520 ,Set/Clear Active Bit 520" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE519 ,Set/Clear Active Bit 519" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE518 ,Set/Clear Active Bit 518" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE517 ,Set/Clear Active Bit 517" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE516 ,Set/Clear Active Bit 516" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE515 ,Set/Clear Active Bit 515" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE514 ,Set/Clear Active Bit 514" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE513 ,Set/Clear Active Bit 513" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE512 ,Set/Clear Active Bit 512" "Not active,Active"
else
hgroup.long 0x0340++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0344++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE575 ,Set/Clear Active Bit 575" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE574 ,Set/Clear Active Bit 574" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE573 ,Set/Clear Active Bit 573" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE572 ,Set/Clear Active Bit 572" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE571 ,Set/Clear Active Bit 571" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE570 ,Set/Clear Active Bit 570" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE569 ,Set/Clear Active Bit 569" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE568 ,Set/Clear Active Bit 568" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE567 ,Set/Clear Active Bit 567" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE566 ,Set/Clear Active Bit 566" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE565 ,Set/Clear Active Bit 565" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE564 ,Set/Clear Active Bit 564" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE563 ,Set/Clear Active Bit 563" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE562 ,Set/Clear Active Bit 562" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE561 ,Set/Clear Active Bit 561" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE560 ,Set/Clear Active Bit 560" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE559 ,Set/Clear Active Bit 559" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE558 ,Set/Clear Active Bit 558" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE557 ,Set/Clear Active Bit 557" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE556 ,Set/Clear Active Bit 556" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE555 ,Set/Clear Active Bit 555" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE554 ,Set/Clear Active Bit 554" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE553 ,Set/Clear Active Bit 553" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE552 ,Set/Clear Active Bit 552" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE551 ,Set/Clear Active Bit 551" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE550 ,Set/Clear Active Bit 550" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE549 ,Set/Clear Active Bit 549" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE548 ,Set/Clear Active Bit 548" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE547 ,Set/Clear Active Bit 547" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE546 ,Set/Clear Active Bit 546" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE545 ,Set/Clear Active Bit 545" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE544 ,Set/Clear Active Bit 544" "Not active,Active"
else
hgroup.long 0x0344++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0348++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE607 ,Set/Clear Active Bit 607" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE606 ,Set/Clear Active Bit 606" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE605 ,Set/Clear Active Bit 605" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE604 ,Set/Clear Active Bit 604" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE603 ,Set/Clear Active Bit 603" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE602 ,Set/Clear Active Bit 602" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE601 ,Set/Clear Active Bit 601" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE600 ,Set/Clear Active Bit 600" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE599 ,Set/Clear Active Bit 599" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE598 ,Set/Clear Active Bit 598" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE597 ,Set/Clear Active Bit 597" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE596 ,Set/Clear Active Bit 596" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE595 ,Set/Clear Active Bit 595" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE594 ,Set/Clear Active Bit 594" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE593 ,Set/Clear Active Bit 593" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE592 ,Set/Clear Active Bit 592" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE591 ,Set/Clear Active Bit 591" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE590 ,Set/Clear Active Bit 590" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE589 ,Set/Clear Active Bit 589" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE588 ,Set/Clear Active Bit 588" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE587 ,Set/Clear Active Bit 587" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE586 ,Set/Clear Active Bit 586" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE585 ,Set/Clear Active Bit 585" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE584 ,Set/Clear Active Bit 584" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE583 ,Set/Clear Active Bit 583" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE582 ,Set/Clear Active Bit 582" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE581 ,Set/Clear Active Bit 581" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE580 ,Set/Clear Active Bit 580" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE579 ,Set/Clear Active Bit 579" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE578 ,Set/Clear Active Bit 578" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE577 ,Set/Clear Active Bit 577" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE576 ,Set/Clear Active Bit 576" "Not active,Active"
else
hgroup.long 0x0348++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x034C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE639 ,Set/Clear Active Bit 639" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE638 ,Set/Clear Active Bit 638" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE637 ,Set/Clear Active Bit 637" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE636 ,Set/Clear Active Bit 636" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE635 ,Set/Clear Active Bit 635" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE634 ,Set/Clear Active Bit 634" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE633 ,Set/Clear Active Bit 633" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE632 ,Set/Clear Active Bit 632" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE631 ,Set/Clear Active Bit 631" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE630 ,Set/Clear Active Bit 630" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE629 ,Set/Clear Active Bit 629" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE628 ,Set/Clear Active Bit 628" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE627 ,Set/Clear Active Bit 627" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE626 ,Set/Clear Active Bit 626" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE625 ,Set/Clear Active Bit 625" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE624 ,Set/Clear Active Bit 624" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE623 ,Set/Clear Active Bit 623" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE622 ,Set/Clear Active Bit 622" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE621 ,Set/Clear Active Bit 621" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE620 ,Set/Clear Active Bit 620" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE619 ,Set/Clear Active Bit 619" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE618 ,Set/Clear Active Bit 618" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE617 ,Set/Clear Active Bit 617" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE616 ,Set/Clear Active Bit 616" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE615 ,Set/Clear Active Bit 615" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE614 ,Set/Clear Active Bit 614" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE613 ,Set/Clear Active Bit 613" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE612 ,Set/Clear Active Bit 612" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE611 ,Set/Clear Active Bit 611" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE610 ,Set/Clear Active Bit 610" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE609 ,Set/Clear Active Bit 609" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE608 ,Set/Clear Active Bit 608" "Not active,Active"
else
hgroup.long 0x034C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0350++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE671 ,Set/Clear Active Bit 671" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE670 ,Set/Clear Active Bit 670" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE669 ,Set/Clear Active Bit 669" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE668 ,Set/Clear Active Bit 668" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE667 ,Set/Clear Active Bit 667" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE666 ,Set/Clear Active Bit 666" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE665 ,Set/Clear Active Bit 665" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE664 ,Set/Clear Active Bit 664" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE663 ,Set/Clear Active Bit 663" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE662 ,Set/Clear Active Bit 662" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE661 ,Set/Clear Active Bit 661" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE660 ,Set/Clear Active Bit 660" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE659 ,Set/Clear Active Bit 659" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE658 ,Set/Clear Active Bit 658" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE657 ,Set/Clear Active Bit 657" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE656 ,Set/Clear Active Bit 656" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE655 ,Set/Clear Active Bit 655" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE654 ,Set/Clear Active Bit 654" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE653 ,Set/Clear Active Bit 653" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE652 ,Set/Clear Active Bit 652" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE651 ,Set/Clear Active Bit 651" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE650 ,Set/Clear Active Bit 650" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE649 ,Set/Clear Active Bit 649" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE648 ,Set/Clear Active Bit 648" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE647 ,Set/Clear Active Bit 647" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE646 ,Set/Clear Active Bit 646" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE645 ,Set/Clear Active Bit 645" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE644 ,Set/Clear Active Bit 644" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE643 ,Set/Clear Active Bit 643" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE642 ,Set/Clear Active Bit 642" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE641 ,Set/Clear Active Bit 641" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE640 ,Set/Clear Active Bit 640" "Not active,Active"
else
hgroup.long 0x0350++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0354++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE703 ,Set/Clear Active Bit 703" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE702 ,Set/Clear Active Bit 702" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE701 ,Set/Clear Active Bit 701" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE700 ,Set/Clear Active Bit 700" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE699 ,Set/Clear Active Bit 699" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE698 ,Set/Clear Active Bit 698" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE697 ,Set/Clear Active Bit 697" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE696 ,Set/Clear Active Bit 696" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE695 ,Set/Clear Active Bit 695" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE694 ,Set/Clear Active Bit 694" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE693 ,Set/Clear Active Bit 693" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE692 ,Set/Clear Active Bit 692" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE691 ,Set/Clear Active Bit 691" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE690 ,Set/Clear Active Bit 690" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE689 ,Set/Clear Active Bit 689" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE688 ,Set/Clear Active Bit 688" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE687 ,Set/Clear Active Bit 687" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE686 ,Set/Clear Active Bit 686" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE685 ,Set/Clear Active Bit 685" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE684 ,Set/Clear Active Bit 684" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE683 ,Set/Clear Active Bit 683" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE682 ,Set/Clear Active Bit 682" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE681 ,Set/Clear Active Bit 681" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE680 ,Set/Clear Active Bit 680" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE679 ,Set/Clear Active Bit 679" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE678 ,Set/Clear Active Bit 678" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE677 ,Set/Clear Active Bit 677" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE676 ,Set/Clear Active Bit 676" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE675 ,Set/Clear Active Bit 675" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE674 ,Set/Clear Active Bit 674" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE673 ,Set/Clear Active Bit 673" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE672 ,Set/Clear Active Bit 672" "Not active,Active"
else
hgroup.long 0x0354++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0358++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE735 ,Set/Clear Active Bit 735" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE734 ,Set/Clear Active Bit 734" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE733 ,Set/Clear Active Bit 733" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE732 ,Set/Clear Active Bit 732" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE731 ,Set/Clear Active Bit 731" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE730 ,Set/Clear Active Bit 730" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE729 ,Set/Clear Active Bit 729" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE728 ,Set/Clear Active Bit 728" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE727 ,Set/Clear Active Bit 727" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE726 ,Set/Clear Active Bit 726" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE725 ,Set/Clear Active Bit 725" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE724 ,Set/Clear Active Bit 724" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE723 ,Set/Clear Active Bit 723" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE722 ,Set/Clear Active Bit 722" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE721 ,Set/Clear Active Bit 721" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE720 ,Set/Clear Active Bit 720" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE719 ,Set/Clear Active Bit 719" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE718 ,Set/Clear Active Bit 718" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE717 ,Set/Clear Active Bit 717" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE716 ,Set/Clear Active Bit 716" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE715 ,Set/Clear Active Bit 715" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE714 ,Set/Clear Active Bit 714" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE713 ,Set/Clear Active Bit 713" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE712 ,Set/Clear Active Bit 712" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE711 ,Set/Clear Active Bit 711" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE710 ,Set/Clear Active Bit 710" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE709 ,Set/Clear Active Bit 709" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE708 ,Set/Clear Active Bit 708" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE707 ,Set/Clear Active Bit 707" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE706 ,Set/Clear Active Bit 706" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE705 ,Set/Clear Active Bit 705" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE704 ,Set/Clear Active Bit 704" "Not active,Active"
else
hgroup.long 0x0358++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x035C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE767 ,Set/Clear Active Bit 767" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE766 ,Set/Clear Active Bit 766" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE765 ,Set/Clear Active Bit 765" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE764 ,Set/Clear Active Bit 764" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE763 ,Set/Clear Active Bit 763" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE762 ,Set/Clear Active Bit 762" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE761 ,Set/Clear Active Bit 761" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE760 ,Set/Clear Active Bit 760" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE759 ,Set/Clear Active Bit 759" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE758 ,Set/Clear Active Bit 758" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE757 ,Set/Clear Active Bit 757" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE756 ,Set/Clear Active Bit 756" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE755 ,Set/Clear Active Bit 755" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE754 ,Set/Clear Active Bit 754" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE753 ,Set/Clear Active Bit 753" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE752 ,Set/Clear Active Bit 752" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE751 ,Set/Clear Active Bit 751" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE750 ,Set/Clear Active Bit 750" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE749 ,Set/Clear Active Bit 749" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE748 ,Set/Clear Active Bit 748" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE747 ,Set/Clear Active Bit 747" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE746 ,Set/Clear Active Bit 746" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE745 ,Set/Clear Active Bit 745" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE744 ,Set/Clear Active Bit 744" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE743 ,Set/Clear Active Bit 743" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE742 ,Set/Clear Active Bit 742" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE741 ,Set/Clear Active Bit 741" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE740 ,Set/Clear Active Bit 740" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE739 ,Set/Clear Active Bit 739" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE738 ,Set/Clear Active Bit 738" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE737 ,Set/Clear Active Bit 737" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE736 ,Set/Clear Active Bit 736" "Not active,Active"
else
hgroup.long 0x035C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0360++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE799 ,Set/Clear Active Bit 799" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE798 ,Set/Clear Active Bit 798" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE797 ,Set/Clear Active Bit 797" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE796 ,Set/Clear Active Bit 796" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE795 ,Set/Clear Active Bit 795" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE794 ,Set/Clear Active Bit 794" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE793 ,Set/Clear Active Bit 793" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE792 ,Set/Clear Active Bit 792" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE791 ,Set/Clear Active Bit 791" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE790 ,Set/Clear Active Bit 790" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE789 ,Set/Clear Active Bit 789" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE788 ,Set/Clear Active Bit 788" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE787 ,Set/Clear Active Bit 787" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE786 ,Set/Clear Active Bit 786" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE785 ,Set/Clear Active Bit 785" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE784 ,Set/Clear Active Bit 784" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE783 ,Set/Clear Active Bit 783" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE782 ,Set/Clear Active Bit 782" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE781 ,Set/Clear Active Bit 781" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE780 ,Set/Clear Active Bit 780" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE779 ,Set/Clear Active Bit 779" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE778 ,Set/Clear Active Bit 778" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE777 ,Set/Clear Active Bit 777" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE776 ,Set/Clear Active Bit 776" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE775 ,Set/Clear Active Bit 775" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE774 ,Set/Clear Active Bit 774" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE773 ,Set/Clear Active Bit 773" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE772 ,Set/Clear Active Bit 772" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE771 ,Set/Clear Active Bit 771" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE770 ,Set/Clear Active Bit 770" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE769 ,Set/Clear Active Bit 769" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE768 ,Set/Clear Active Bit 768" "Not active,Active"
else
hgroup.long 0x0360++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0364++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE831 ,Set/Clear Active Bit 831" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE830 ,Set/Clear Active Bit 830" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE829 ,Set/Clear Active Bit 829" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE828 ,Set/Clear Active Bit 828" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE827 ,Set/Clear Active Bit 827" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE826 ,Set/Clear Active Bit 826" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE825 ,Set/Clear Active Bit 825" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE824 ,Set/Clear Active Bit 824" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE823 ,Set/Clear Active Bit 823" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE822 ,Set/Clear Active Bit 822" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE821 ,Set/Clear Active Bit 821" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE820 ,Set/Clear Active Bit 820" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE819 ,Set/Clear Active Bit 819" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE818 ,Set/Clear Active Bit 818" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE817 ,Set/Clear Active Bit 817" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE816 ,Set/Clear Active Bit 816" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE815 ,Set/Clear Active Bit 815" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE814 ,Set/Clear Active Bit 814" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE813 ,Set/Clear Active Bit 813" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE812 ,Set/Clear Active Bit 812" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE811 ,Set/Clear Active Bit 811" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE810 ,Set/Clear Active Bit 810" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE809 ,Set/Clear Active Bit 809" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE808 ,Set/Clear Active Bit 808" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE807 ,Set/Clear Active Bit 807" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE806 ,Set/Clear Active Bit 806" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE805 ,Set/Clear Active Bit 805" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE804 ,Set/Clear Active Bit 804" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE803 ,Set/Clear Active Bit 803" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE802 ,Set/Clear Active Bit 802" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE801 ,Set/Clear Active Bit 801" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE800 ,Set/Clear Active Bit 800" "Not active,Active"
else
hgroup.long 0x0364++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0368++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE863 ,Set/Clear Active Bit 863" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE862 ,Set/Clear Active Bit 862" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE861 ,Set/Clear Active Bit 861" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE860 ,Set/Clear Active Bit 860" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE859 ,Set/Clear Active Bit 859" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE858 ,Set/Clear Active Bit 858" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE857 ,Set/Clear Active Bit 857" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE856 ,Set/Clear Active Bit 856" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE855 ,Set/Clear Active Bit 855" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE854 ,Set/Clear Active Bit 854" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE853 ,Set/Clear Active Bit 853" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE852 ,Set/Clear Active Bit 852" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE851 ,Set/Clear Active Bit 851" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE850 ,Set/Clear Active Bit 850" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE849 ,Set/Clear Active Bit 849" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE848 ,Set/Clear Active Bit 848" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE847 ,Set/Clear Active Bit 847" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE846 ,Set/Clear Active Bit 846" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE845 ,Set/Clear Active Bit 845" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE844 ,Set/Clear Active Bit 844" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE843 ,Set/Clear Active Bit 843" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE842 ,Set/Clear Active Bit 842" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE841 ,Set/Clear Active Bit 841" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE840 ,Set/Clear Active Bit 840" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE839 ,Set/Clear Active Bit 839" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE838 ,Set/Clear Active Bit 838" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE837 ,Set/Clear Active Bit 837" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE836 ,Set/Clear Active Bit 836" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE835 ,Set/Clear Active Bit 835" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE834 ,Set/Clear Active Bit 834" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE833 ,Set/Clear Active Bit 833" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE832 ,Set/Clear Active Bit 832" "Not active,Active"
else
hgroup.long 0x0368++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x036C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE895 ,Set/Clear Active Bit 895" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE894 ,Set/Clear Active Bit 894" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE893 ,Set/Clear Active Bit 893" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE892 ,Set/Clear Active Bit 892" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE891 ,Set/Clear Active Bit 891" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE890 ,Set/Clear Active Bit 890" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE889 ,Set/Clear Active Bit 889" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE888 ,Set/Clear Active Bit 888" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE887 ,Set/Clear Active Bit 887" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE886 ,Set/Clear Active Bit 886" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE885 ,Set/Clear Active Bit 885" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE884 ,Set/Clear Active Bit 884" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE883 ,Set/Clear Active Bit 883" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE882 ,Set/Clear Active Bit 882" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE881 ,Set/Clear Active Bit 881" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE880 ,Set/Clear Active Bit 880" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE879 ,Set/Clear Active Bit 879" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE878 ,Set/Clear Active Bit 878" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE877 ,Set/Clear Active Bit 877" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE876 ,Set/Clear Active Bit 876" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE875 ,Set/Clear Active Bit 875" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE874 ,Set/Clear Active Bit 874" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE873 ,Set/Clear Active Bit 873" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE872 ,Set/Clear Active Bit 872" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE871 ,Set/Clear Active Bit 871" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE870 ,Set/Clear Active Bit 870" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE869 ,Set/Clear Active Bit 869" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE868 ,Set/Clear Active Bit 868" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE867 ,Set/Clear Active Bit 867" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE866 ,Set/Clear Active Bit 866" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE865 ,Set/Clear Active Bit 865" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE864 ,Set/Clear Active Bit 864" "Not active,Active"
else
hgroup.long 0x036C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0370++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE927 ,Set/Clear Active Bit 927" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE926 ,Set/Clear Active Bit 926" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE925 ,Set/Clear Active Bit 925" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE924 ,Set/Clear Active Bit 924" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE923 ,Set/Clear Active Bit 923" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE922 ,Set/Clear Active Bit 922" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE921 ,Set/Clear Active Bit 921" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE920 ,Set/Clear Active Bit 920" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE919 ,Set/Clear Active Bit 919" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE918 ,Set/Clear Active Bit 918" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE917 ,Set/Clear Active Bit 917" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE916 ,Set/Clear Active Bit 916" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE915 ,Set/Clear Active Bit 915" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE914 ,Set/Clear Active Bit 914" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE913 ,Set/Clear Active Bit 913" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE912 ,Set/Clear Active Bit 912" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE911 ,Set/Clear Active Bit 911" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE910 ,Set/Clear Active Bit 910" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE909 ,Set/Clear Active Bit 909" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE908 ,Set/Clear Active Bit 908" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE907 ,Set/Clear Active Bit 907" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE906 ,Set/Clear Active Bit 906" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE905 ,Set/Clear Active Bit 905" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE904 ,Set/Clear Active Bit 904" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE903 ,Set/Clear Active Bit 903" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE902 ,Set/Clear Active Bit 902" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE901 ,Set/Clear Active Bit 901" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE900 ,Set/Clear Active Bit 900" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE899 ,Set/Clear Active Bit 899" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE898 ,Set/Clear Active Bit 898" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE897 ,Set/Clear Active Bit 897" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE896 ,Set/Clear Active Bit 896" "Not active,Active"
else
hgroup.long 0x0370++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0374++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE959 ,Set/Clear Active Bit 959" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE958 ,Set/Clear Active Bit 958" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE957 ,Set/Clear Active Bit 957" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE956 ,Set/Clear Active Bit 956" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE955 ,Set/Clear Active Bit 955" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE954 ,Set/Clear Active Bit 954" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE953 ,Set/Clear Active Bit 953" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE952 ,Set/Clear Active Bit 952" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE951 ,Set/Clear Active Bit 951" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE950 ,Set/Clear Active Bit 950" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE949 ,Set/Clear Active Bit 949" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE948 ,Set/Clear Active Bit 948" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE947 ,Set/Clear Active Bit 947" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE946 ,Set/Clear Active Bit 946" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE945 ,Set/Clear Active Bit 945" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE944 ,Set/Clear Active Bit 944" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE943 ,Set/Clear Active Bit 943" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE942 ,Set/Clear Active Bit 942" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE941 ,Set/Clear Active Bit 941" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE940 ,Set/Clear Active Bit 940" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE939 ,Set/Clear Active Bit 939" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE938 ,Set/Clear Active Bit 938" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE937 ,Set/Clear Active Bit 937" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE936 ,Set/Clear Active Bit 936" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE935 ,Set/Clear Active Bit 935" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE934 ,Set/Clear Active Bit 934" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE933 ,Set/Clear Active Bit 933" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE932 ,Set/Clear Active Bit 932" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE931 ,Set/Clear Active Bit 931" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE930 ,Set/Clear Active Bit 930" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE929 ,Set/Clear Active Bit 929" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE928 ,Set/Clear Active Bit 928" "Not active,Active"
else
hgroup.long 0x0374++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0378++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE991 ,Set/Clear Active Bit 991" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE990 ,Set/Clear Active Bit 990" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE989 ,Set/Clear Active Bit 989" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE988 ,Set/Clear Active Bit 988" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE987 ,Set/Clear Active Bit 987" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE986 ,Set/Clear Active Bit 986" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE985 ,Set/Clear Active Bit 985" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE984 ,Set/Clear Active Bit 984" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE983 ,Set/Clear Active Bit 983" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE982 ,Set/Clear Active Bit 982" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE981 ,Set/Clear Active Bit 981" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE980 ,Set/Clear Active Bit 980" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE979 ,Set/Clear Active Bit 979" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE978 ,Set/Clear Active Bit 978" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE977 ,Set/Clear Active Bit 977" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE976 ,Set/Clear Active Bit 976" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE975 ,Set/Clear Active Bit 975" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE974 ,Set/Clear Active Bit 974" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE973 ,Set/Clear Active Bit 973" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE972 ,Set/Clear Active Bit 972" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE971 ,Set/Clear Active Bit 971" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE970 ,Set/Clear Active Bit 970" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE969 ,Set/Clear Active Bit 969" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE968 ,Set/Clear Active Bit 968" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE967 ,Set/Clear Active Bit 967" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE966 ,Set/Clear Active Bit 966" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE965 ,Set/Clear Active Bit 965" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE964 ,Set/Clear Active Bit 964" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE963 ,Set/Clear Active Bit 963" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE962 ,Set/Clear Active Bit 962" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE961 ,Set/Clear Active Bit 961" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE960 ,Set/Clear Active Bit 960" "Not active,Active"
else
hgroup.long 0x0378++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
endif
tree.end
width 20.
tree "Priority Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x400++0x03
hide.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hgroup.long 0x404++0x03
hide.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hgroup.long 0x408++0x03
hide.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hgroup.long 0x40C++0x03
hide.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hgroup.long 0x410++0x03
hide.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hgroup.long 0x414++0x03
hide.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hgroup.long 0x418++0x03
hide.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hgroup.long 0x41C++0x03
hide.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
else
group.long 0x400++0x03
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID2    ,Interrupt ID2     Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID0    ,Interrupt ID0     Priority/Priority Byte Offset 0   "
group.long 0x404++0x03
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID6    ,Interrupt ID6     Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID4    ,Interrupt ID4     Priority/Priority Byte Offset 4   "
group.long 0x408++0x03
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID10   ,Interrupt ID10    Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID8    ,Interrupt ID8     Priority/Priority Byte Offset 8   "
group.long 0x40C++0x03
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID14   ,Interrupt ID14    Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID12   ,Interrupt ID12    Priority/Priority Byte Offset 12  "
group.long 0x410++0x03
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID18   ,Interrupt ID18    Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID16   ,Interrupt ID16    Priority/Priority Byte Offset 16  "
group.long 0x414++0x03
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID22   ,Interrupt ID22    Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID20   ,Interrupt ID20    Priority/Priority Byte Offset 20  "
group.long 0x418++0x03
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID26   ,Interrupt ID26    Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID24   ,Interrupt ID24    Priority/Priority Byte Offset 24  "
group.long 0x41C++0x03
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID30   ,Interrupt ID30    Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID28   ,Interrupt ID28    Priority/Priority Byte Offset 28  "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hexmask.long.byte 0x00 24.--31. 1. " INTID35   ,Interrupt ID35   Priority/Priority Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID34   ,Interrupt ID34    Priority/Priority Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID33   ,Interrupt ID33   Priority/Priority Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID32   ,Interrupt ID32    Priority/Priority Byte Offset 32  "
group.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hexmask.long.byte 0x00 24.--31. 1. " INTID39   ,Interrupt ID39   Priority/Priority Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID38   ,Interrupt ID38    Priority/Priority Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID37   ,Interrupt ID37   Priority/Priority Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID36   ,Interrupt ID36    Priority/Priority Byte Offset 36  "
group.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hexmask.long.byte 0x00 24.--31. 1. " INTID43   ,Interrupt ID43   Priority/Priority Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID42   ,Interrupt ID42    Priority/Priority Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID41   ,Interrupt ID41   Priority/Priority Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID40   ,Interrupt ID40    Priority/Priority Byte Offset 40  "
group.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hexmask.long.byte 0x00 24.--31. 1. " INTID47   ,Interrupt ID47   Priority/Priority Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID46   ,Interrupt ID46    Priority/Priority Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID45   ,Interrupt ID45   Priority/Priority Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID44   ,Interrupt ID44    Priority/Priority Byte Offset 44  "
group.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hexmask.long.byte 0x00 24.--31. 1. " INTID51   ,Interrupt ID51   Priority/Priority Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID50   ,Interrupt ID50    Priority/Priority Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID49   ,Interrupt ID49   Priority/Priority Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID48   ,Interrupt ID48    Priority/Priority Byte Offset 48  "
group.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hexmask.long.byte 0x00 24.--31. 1. " INTID55   ,Interrupt ID55   Priority/Priority Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID54   ,Interrupt ID54    Priority/Priority Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID53   ,Interrupt ID53   Priority/Priority Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID52   ,Interrupt ID52    Priority/Priority Byte Offset 52  "
group.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hexmask.long.byte 0x00 24.--31. 1. " INTID59   ,Interrupt ID59   Priority/Priority Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID58   ,Interrupt ID58    Priority/Priority Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID57   ,Interrupt ID57   Priority/Priority Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID56   ,Interrupt ID56    Priority/Priority Byte Offset 56  "
group.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
hexmask.long.byte 0x00 24.--31. 1. " INTID63   ,Interrupt ID63   Priority/Priority Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID62   ,Interrupt ID62    Priority/Priority Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID61   ,Interrupt ID61   Priority/Priority Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID60   ,Interrupt ID60    Priority/Priority Byte Offset 60  "
else
hgroup.long 0x420++0x03
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hgroup.long 0x424++0x03
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hgroup.long 0x428++0x03
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hgroup.long 0x42C++0x03
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hgroup.long 0x430++0x03
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hgroup.long 0x434++0x03
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hgroup.long 0x438++0x03
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hgroup.long 0x43C++0x03
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hexmask.long.byte 0x00 24.--31. 1. " INTID67   ,Interrupt ID67   Priority/Priority Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID66   ,Interrupt ID66    Priority/Priority Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID65   ,Interrupt ID65   Priority/Priority Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID64   ,Interrupt ID64    Priority/Priority Byte Offset 64  "
group.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hexmask.long.byte 0x00 24.--31. 1. " INTID71   ,Interrupt ID71   Priority/Priority Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID70   ,Interrupt ID70    Priority/Priority Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID69   ,Interrupt ID69   Priority/Priority Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID68   ,Interrupt ID68    Priority/Priority Byte Offset 68  "
group.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hexmask.long.byte 0x00 24.--31. 1. " INTID75   ,Interrupt ID75   Priority/Priority Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID74   ,Interrupt ID74    Priority/Priority Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID73   ,Interrupt ID73   Priority/Priority Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID72   ,Interrupt ID72    Priority/Priority Byte Offset 72  "
group.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hexmask.long.byte 0x00 24.--31. 1. " INTID79   ,Interrupt ID79   Priority/Priority Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID78   ,Interrupt ID78    Priority/Priority Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID77   ,Interrupt ID77   Priority/Priority Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID76   ,Interrupt ID76    Priority/Priority Byte Offset 76  "
group.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hexmask.long.byte 0x00 24.--31. 1. " INTID83   ,Interrupt ID83   Priority/Priority Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID82   ,Interrupt ID82    Priority/Priority Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID81   ,Interrupt ID81   Priority/Priority Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID80   ,Interrupt ID80    Priority/Priority Byte Offset 80  "
group.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hexmask.long.byte 0x00 24.--31. 1. " INTID87   ,Interrupt ID87   Priority/Priority Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID86   ,Interrupt ID86    Priority/Priority Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID85   ,Interrupt ID85   Priority/Priority Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID84   ,Interrupt ID84    Priority/Priority Byte Offset 84  "
group.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hexmask.long.byte 0x00 24.--31. 1. " INTID91   ,Interrupt ID91   Priority/Priority Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID90   ,Interrupt ID90    Priority/Priority Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID89   ,Interrupt ID89   Priority/Priority Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID88   ,Interrupt ID88    Priority/Priority Byte Offset 88  "
group.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
hexmask.long.byte 0x00 24.--31. 1. " INTID95   ,Interrupt ID95   Priority/Priority Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID94   ,Interrupt ID94    Priority/Priority Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID93   ,Interrupt ID93   Priority/Priority Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID92   ,Interrupt ID92    Priority/Priority Byte Offset 92  "
else
hgroup.long 0x440++0x03
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hgroup.long 0x444++0x03
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hgroup.long 0x448++0x03
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hgroup.long 0x44C++0x03
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hgroup.long 0x450++0x03
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hgroup.long 0x454++0x03
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hgroup.long 0x458++0x03
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hgroup.long 0x45C++0x03
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hexmask.long.byte 0x00 24.--31. 1. " INTID99   ,Interrupt ID99   Priority/Priority Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID98   ,Interrupt ID98    Priority/Priority Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID97   ,Interrupt ID97   Priority/Priority Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID96   ,Interrupt ID96    Priority/Priority Byte Offset 96  "
group.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hexmask.long.byte 0x00 24.--31. 1. " INTID103  ,Interrupt ID103  Priority/Priority Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID102  ,Interrupt ID102   Priority/Priority Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID101  ,Interrupt ID101  Priority/Priority Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID100  ,Interrupt ID100   Priority/Priority Byte Offset 100 "
group.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hexmask.long.byte 0x00 24.--31. 1. " INTID107  ,Interrupt ID107  Priority/Priority Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID106  ,Interrupt ID106   Priority/Priority Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID105  ,Interrupt ID105  Priority/Priority Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID104  ,Interrupt ID104   Priority/Priority Byte Offset 104 "
group.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hexmask.long.byte 0x00 24.--31. 1. " INTID111  ,Interrupt ID111  Priority/Priority Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID110  ,Interrupt ID110   Priority/Priority Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID109  ,Interrupt ID109  Priority/Priority Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID108  ,Interrupt ID108   Priority/Priority Byte Offset 108 "
group.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hexmask.long.byte 0x00 24.--31. 1. " INTID115  ,Interrupt ID115  Priority/Priority Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID114  ,Interrupt ID114   Priority/Priority Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID113  ,Interrupt ID113  Priority/Priority Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID112  ,Interrupt ID112   Priority/Priority Byte Offset 112 "
group.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hexmask.long.byte 0x00 24.--31. 1. " INTID119  ,Interrupt ID119  Priority/Priority Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID118  ,Interrupt ID118   Priority/Priority Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID117  ,Interrupt ID117  Priority/Priority Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID116  ,Interrupt ID116   Priority/Priority Byte Offset 116 "
group.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hexmask.long.byte 0x00 24.--31. 1. " INTID123  ,Interrupt ID123  Priority/Priority Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID122  ,Interrupt ID122   Priority/Priority Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID121  ,Interrupt ID121  Priority/Priority Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID120  ,Interrupt ID120   Priority/Priority Byte Offset 120 "
group.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
hexmask.long.byte 0x00 24.--31. 1. " INTID127  ,Interrupt ID127  Priority/Priority Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID126  ,Interrupt ID126   Priority/Priority Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID125  ,Interrupt ID125  Priority/Priority Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID124  ,Interrupt ID124   Priority/Priority Byte Offset 124 "
else
hgroup.long 0x460++0x03
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hgroup.long 0x464++0x03
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hgroup.long 0x468++0x03
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hgroup.long 0x46C++0x03
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hgroup.long 0x470++0x03
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hgroup.long 0x474++0x03
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hgroup.long 0x478++0x03
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hgroup.long 0x47C++0x03
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hexmask.long.byte 0x00 24.--31. 1. " INTID131  ,Interrupt ID131  Priority/Priority Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID130  ,Interrupt ID130   Priority/Priority Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID129  ,Interrupt ID129  Priority/Priority Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID128  ,Interrupt ID128   Priority/Priority Byte Offset 128 "
group.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hexmask.long.byte 0x00 24.--31. 1. " INTID135  ,Interrupt ID135  Priority/Priority Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID134  ,Interrupt ID134   Priority/Priority Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID133  ,Interrupt ID133  Priority/Priority Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID132  ,Interrupt ID132   Priority/Priority Byte Offset 132 "
group.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hexmask.long.byte 0x00 24.--31. 1. " INTID139  ,Interrupt ID139  Priority/Priority Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID138  ,Interrupt ID138   Priority/Priority Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID137  ,Interrupt ID137  Priority/Priority Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID136  ,Interrupt ID136   Priority/Priority Byte Offset 136 "
group.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hexmask.long.byte 0x00 24.--31. 1. " INTID143  ,Interrupt ID143  Priority/Priority Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID142  ,Interrupt ID142   Priority/Priority Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID141  ,Interrupt ID141  Priority/Priority Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID140  ,Interrupt ID140   Priority/Priority Byte Offset 140 "
group.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hexmask.long.byte 0x00 24.--31. 1. " INTID147  ,Interrupt ID147  Priority/Priority Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID146  ,Interrupt ID146   Priority/Priority Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID145  ,Interrupt ID145  Priority/Priority Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID144  ,Interrupt ID144   Priority/Priority Byte Offset 144 "
group.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hexmask.long.byte 0x00 24.--31. 1. " INTID151  ,Interrupt ID151  Priority/Priority Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID150  ,Interrupt ID150   Priority/Priority Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID149  ,Interrupt ID149  Priority/Priority Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID148  ,Interrupt ID148   Priority/Priority Byte Offset 148 "
group.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hexmask.long.byte 0x00 24.--31. 1. " INTID155  ,Interrupt ID155  Priority/Priority Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID154  ,Interrupt ID154   Priority/Priority Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID153  ,Interrupt ID153  Priority/Priority Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID152  ,Interrupt ID152   Priority/Priority Byte Offset 152 "
group.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
hexmask.long.byte 0x00 24.--31. 1. " INTID159  ,Interrupt ID159  Priority/Priority Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID158  ,Interrupt ID158   Priority/Priority Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID157  ,Interrupt ID157  Priority/Priority Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID156  ,Interrupt ID156   Priority/Priority Byte Offset 156 "
else
hgroup.long 0x480++0x03
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hgroup.long 0x484++0x03
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hgroup.long 0x488++0x03
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hgroup.long 0x48C++0x03
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hgroup.long 0x490++0x03
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hgroup.long 0x494++0x03
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hgroup.long 0x498++0x03
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hgroup.long 0x49C++0x03
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hexmask.long.byte 0x00 24.--31. 1. " INTID163  ,Interrupt ID163  Priority/Priority Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID162  ,Interrupt ID162   Priority/Priority Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID161  ,Interrupt ID161  Priority/Priority Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID160  ,Interrupt ID160   Priority/Priority Byte Offset 160 "
group.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hexmask.long.byte 0x00 24.--31. 1. " INTID167  ,Interrupt ID167  Priority/Priority Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID166  ,Interrupt ID166   Priority/Priority Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID165  ,Interrupt ID165  Priority/Priority Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID164  ,Interrupt ID164   Priority/Priority Byte Offset 164 "
group.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hexmask.long.byte 0x00 24.--31. 1. " INTID171  ,Interrupt ID171  Priority/Priority Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID170  ,Interrupt ID170   Priority/Priority Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID169  ,Interrupt ID169  Priority/Priority Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID168  ,Interrupt ID168   Priority/Priority Byte Offset 168 "
group.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hexmask.long.byte 0x00 24.--31. 1. " INTID175  ,Interrupt ID175  Priority/Priority Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID174  ,Interrupt ID174   Priority/Priority Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID173  ,Interrupt ID173  Priority/Priority Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID172  ,Interrupt ID172   Priority/Priority Byte Offset 172 "
group.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hexmask.long.byte 0x00 24.--31. 1. " INTID179  ,Interrupt ID179  Priority/Priority Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID178  ,Interrupt ID178   Priority/Priority Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID177  ,Interrupt ID177  Priority/Priority Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID176  ,Interrupt ID176   Priority/Priority Byte Offset 176 "
group.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hexmask.long.byte 0x00 24.--31. 1. " INTID183  ,Interrupt ID183  Priority/Priority Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID182  ,Interrupt ID182   Priority/Priority Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID181  ,Interrupt ID181  Priority/Priority Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID180  ,Interrupt ID180   Priority/Priority Byte Offset 180 "
group.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hexmask.long.byte 0x00 24.--31. 1. " INTID187  ,Interrupt ID187  Priority/Priority Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID186  ,Interrupt ID186   Priority/Priority Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID185  ,Interrupt ID185  Priority/Priority Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID184  ,Interrupt ID184   Priority/Priority Byte Offset 184 "
group.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
hexmask.long.byte 0x00 24.--31. 1. " INTID191  ,Interrupt ID191  Priority/Priority Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID190  ,Interrupt ID190   Priority/Priority Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID189  ,Interrupt ID189  Priority/Priority Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID188  ,Interrupt ID188   Priority/Priority Byte Offset 188 "
else
hgroup.long 0x4A0++0x03
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hgroup.long 0x4A4++0x03
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hgroup.long 0x4A8++0x03
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hgroup.long 0x4AC++0x03
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hgroup.long 0x4B0++0x03
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hgroup.long 0x4B4++0x03
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hgroup.long 0x4B8++0x03
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hgroup.long 0x4BC++0x03
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hexmask.long.byte 0x00 24.--31. 1. " INTID195  ,Interrupt ID195  Priority/Priority Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID194  ,Interrupt ID194   Priority/Priority Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID193  ,Interrupt ID193  Priority/Priority Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID192  ,Interrupt ID192   Priority/Priority Byte Offset 192 "
group.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hexmask.long.byte 0x00 24.--31. 1. " INTID199  ,Interrupt ID199  Priority/Priority Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID198  ,Interrupt ID198   Priority/Priority Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID197  ,Interrupt ID197  Priority/Priority Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID196  ,Interrupt ID196   Priority/Priority Byte Offset 196 "
group.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hexmask.long.byte 0x00 24.--31. 1. " INTID203  ,Interrupt ID203  Priority/Priority Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID202  ,Interrupt ID202   Priority/Priority Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID201  ,Interrupt ID201  Priority/Priority Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID200  ,Interrupt ID200   Priority/Priority Byte Offset 200 "
group.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hexmask.long.byte 0x00 24.--31. 1. " INTID207  ,Interrupt ID207  Priority/Priority Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID206  ,Interrupt ID206   Priority/Priority Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID205  ,Interrupt ID205  Priority/Priority Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID204  ,Interrupt ID204   Priority/Priority Byte Offset 204 "
group.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hexmask.long.byte 0x00 24.--31. 1. " INTID211  ,Interrupt ID211  Priority/Priority Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID210  ,Interrupt ID210   Priority/Priority Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID209  ,Interrupt ID209  Priority/Priority Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID208  ,Interrupt ID208   Priority/Priority Byte Offset 208 "
group.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hexmask.long.byte 0x00 24.--31. 1. " INTID215  ,Interrupt ID215  Priority/Priority Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID214  ,Interrupt ID214   Priority/Priority Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID213  ,Interrupt ID213  Priority/Priority Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID212  ,Interrupt ID212   Priority/Priority Byte Offset 212 "
group.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hexmask.long.byte 0x00 24.--31. 1. " INTID219  ,Interrupt ID219  Priority/Priority Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID218  ,Interrupt ID218   Priority/Priority Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID217  ,Interrupt ID217  Priority/Priority Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID216  ,Interrupt ID216   Priority/Priority Byte Offset 216 "
group.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
hexmask.long.byte 0x00 24.--31. 1. " INTID223  ,Interrupt ID223  Priority/Priority Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID222  ,Interrupt ID222   Priority/Priority Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID221  ,Interrupt ID221  Priority/Priority Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID220  ,Interrupt ID220   Priority/Priority Byte Offset 220 "
else
hgroup.long 0x4C0++0x03
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hgroup.long 0x4C4++0x03
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hgroup.long 0x4C8++0x03
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hgroup.long 0x4CC++0x03
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hgroup.long 0x4D0++0x03
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hgroup.long 0x4D4++0x03
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hgroup.long 0x4D8++0x03
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hgroup.long 0x4DC++0x03
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hexmask.long.byte 0x00 24.--31. 1. " INTID227  ,Interrupt ID227  Priority/Priority Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID226  ,Interrupt ID226   Priority/Priority Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID225  ,Interrupt ID225  Priority/Priority Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID224  ,Interrupt ID224   Priority/Priority Byte Offset 224 "
group.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hexmask.long.byte 0x00 24.--31. 1. " INTID231  ,Interrupt ID231  Priority/Priority Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID230  ,Interrupt ID230   Priority/Priority Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID229  ,Interrupt ID229  Priority/Priority Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID228  ,Interrupt ID228   Priority/Priority Byte Offset 228 "
group.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hexmask.long.byte 0x00 24.--31. 1. " INTID235  ,Interrupt ID235  Priority/Priority Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID234  ,Interrupt ID234   Priority/Priority Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID233  ,Interrupt ID233  Priority/Priority Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID232  ,Interrupt ID232   Priority/Priority Byte Offset 232 "
group.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hexmask.long.byte 0x00 24.--31. 1. " INTID239  ,Interrupt ID239  Priority/Priority Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID238  ,Interrupt ID238   Priority/Priority Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID237  ,Interrupt ID237  Priority/Priority Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID236  ,Interrupt ID236   Priority/Priority Byte Offset 236 "
group.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hexmask.long.byte 0x00 24.--31. 1. " INTID243  ,Interrupt ID243  Priority/Priority Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID242  ,Interrupt ID242   Priority/Priority Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID241  ,Interrupt ID241  Priority/Priority Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID240  ,Interrupt ID240   Priority/Priority Byte Offset 240 "
group.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hexmask.long.byte 0x00 24.--31. 1. " INTID247  ,Interrupt ID247  Priority/Priority Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID246  ,Interrupt ID246   Priority/Priority Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID245  ,Interrupt ID245  Priority/Priority Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID244  ,Interrupt ID244   Priority/Priority Byte Offset 244 "
group.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hexmask.long.byte 0x00 24.--31. 1. " INTID251  ,Interrupt ID251  Priority/Priority Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID250  ,Interrupt ID250   Priority/Priority Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID249  ,Interrupt ID249  Priority/Priority Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID248  ,Interrupt ID248   Priority/Priority Byte Offset 248 "
group.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
hexmask.long.byte 0x00 24.--31. 1. " INTID255  ,Interrupt ID255  Priority/Priority Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID254  ,Interrupt ID254   Priority/Priority Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID253  ,Interrupt ID253  Priority/Priority Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID252  ,Interrupt ID252   Priority/Priority Byte Offset 252 "
else
hgroup.long 0x4E0++0x03
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hgroup.long 0x4E4++0x03
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hgroup.long 0x4E8++0x03
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hgroup.long 0x4EC++0x03
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hgroup.long 0x4F0++0x03
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hgroup.long 0x4F4++0x03
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hgroup.long 0x4F8++0x03
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hgroup.long 0x4FC++0x03
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hexmask.long.byte 0x00 24.--31. 1. " INTID259  ,Interrupt ID259  Priority/Priority Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID258  ,Interrupt ID258   Priority/Priority Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID257  ,Interrupt ID257  Priority/Priority Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID256  ,Interrupt ID256   Priority/Priority Byte Offset 256 "
group.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hexmask.long.byte 0x00 24.--31. 1. " INTID263  ,Interrupt ID263  Priority/Priority Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID262  ,Interrupt ID262   Priority/Priority Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID261  ,Interrupt ID261  Priority/Priority Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID260  ,Interrupt ID260   Priority/Priority Byte Offset 260 "
group.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hexmask.long.byte 0x00 24.--31. 1. " INTID267  ,Interrupt ID267  Priority/Priority Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID266  ,Interrupt ID266   Priority/Priority Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID265  ,Interrupt ID265  Priority/Priority Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID264  ,Interrupt ID264   Priority/Priority Byte Offset 264 "
group.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hexmask.long.byte 0x00 24.--31. 1. " INTID271  ,Interrupt ID271  Priority/Priority Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID270  ,Interrupt ID270   Priority/Priority Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID269  ,Interrupt ID269  Priority/Priority Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID268  ,Interrupt ID268   Priority/Priority Byte Offset 268 "
group.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hexmask.long.byte 0x00 24.--31. 1. " INTID275  ,Interrupt ID275  Priority/Priority Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID274  ,Interrupt ID274   Priority/Priority Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID273  ,Interrupt ID273  Priority/Priority Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID272  ,Interrupt ID272   Priority/Priority Byte Offset 272 "
group.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hexmask.long.byte 0x00 24.--31. 1. " INTID279  ,Interrupt ID279  Priority/Priority Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID278  ,Interrupt ID278   Priority/Priority Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID277  ,Interrupt ID277  Priority/Priority Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID276  ,Interrupt ID276   Priority/Priority Byte Offset 276 "
group.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hexmask.long.byte 0x00 24.--31. 1. " INTID283  ,Interrupt ID283  Priority/Priority Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID282  ,Interrupt ID282   Priority/Priority Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID281  ,Interrupt ID281  Priority/Priority Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID280  ,Interrupt ID280   Priority/Priority Byte Offset 280 "
group.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
hexmask.long.byte 0x00 24.--31. 1. " INTID287  ,Interrupt ID287  Priority/Priority Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID286  ,Interrupt ID286   Priority/Priority Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID285  ,Interrupt ID285  Priority/Priority Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID284  ,Interrupt ID284   Priority/Priority Byte Offset 284 "
else
hgroup.long 0x500++0x03
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hgroup.long 0x504++0x03
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hgroup.long 0x508++0x03
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hgroup.long 0x50C++0x03
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hgroup.long 0x510++0x03
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hgroup.long 0x514++0x03
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hgroup.long 0x518++0x03
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hgroup.long 0x51C++0x03
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hexmask.long.byte 0x00 24.--31. 1. " INTID291  ,Interrupt ID291  Priority/Priority Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID290  ,Interrupt ID290   Priority/Priority Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID289  ,Interrupt ID289  Priority/Priority Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID288  ,Interrupt ID288   Priority/Priority Byte Offset 288 "
group.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hexmask.long.byte 0x00 24.--31. 1. " INTID295  ,Interrupt ID295  Priority/Priority Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID294  ,Interrupt ID294   Priority/Priority Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID293  ,Interrupt ID293  Priority/Priority Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID292  ,Interrupt ID292   Priority/Priority Byte Offset 292 "
group.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hexmask.long.byte 0x00 24.--31. 1. " INTID299  ,Interrupt ID299  Priority/Priority Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID298  ,Interrupt ID298   Priority/Priority Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID297  ,Interrupt ID297  Priority/Priority Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID296  ,Interrupt ID296   Priority/Priority Byte Offset 296 "
group.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hexmask.long.byte 0x00 24.--31. 1. " INTID303  ,Interrupt ID303  Priority/Priority Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID302  ,Interrupt ID302   Priority/Priority Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID301  ,Interrupt ID301  Priority/Priority Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID300  ,Interrupt ID300   Priority/Priority Byte Offset 300 "
group.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hexmask.long.byte 0x00 24.--31. 1. " INTID307  ,Interrupt ID307  Priority/Priority Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID306  ,Interrupt ID306   Priority/Priority Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID305  ,Interrupt ID305  Priority/Priority Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID304  ,Interrupt ID304   Priority/Priority Byte Offset 304 "
group.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hexmask.long.byte 0x00 24.--31. 1. " INTID311  ,Interrupt ID311  Priority/Priority Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID310  ,Interrupt ID310   Priority/Priority Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID309  ,Interrupt ID309  Priority/Priority Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID308  ,Interrupt ID308   Priority/Priority Byte Offset 308 "
group.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hexmask.long.byte 0x00 24.--31. 1. " INTID315  ,Interrupt ID315  Priority/Priority Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID314  ,Interrupt ID314   Priority/Priority Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID313  ,Interrupt ID313  Priority/Priority Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID312  ,Interrupt ID312   Priority/Priority Byte Offset 312 "
group.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
hexmask.long.byte 0x00 24.--31. 1. " INTID319  ,Interrupt ID319  Priority/Priority Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID318  ,Interrupt ID318   Priority/Priority Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID317  ,Interrupt ID317  Priority/Priority Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID316  ,Interrupt ID316   Priority/Priority Byte Offset 316 "
else
hgroup.long 0x520++0x03
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hgroup.long 0x524++0x03
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hgroup.long 0x528++0x03
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hgroup.long 0x52C++0x03
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hgroup.long 0x530++0x03
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hgroup.long 0x534++0x03
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hgroup.long 0x538++0x03
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hgroup.long 0x53C++0x03
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hexmask.long.byte 0x00 24.--31. 1. " INTID323  ,Interrupt ID323  Priority/Priority Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID322  ,Interrupt ID322   Priority/Priority Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID321  ,Interrupt ID321  Priority/Priority Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID320  ,Interrupt ID320   Priority/Priority Byte Offset 320 "
group.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hexmask.long.byte 0x00 24.--31. 1. " INTID327  ,Interrupt ID327  Priority/Priority Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID326  ,Interrupt ID326   Priority/Priority Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID325  ,Interrupt ID325  Priority/Priority Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID324  ,Interrupt ID324   Priority/Priority Byte Offset 324 "
group.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hexmask.long.byte 0x00 24.--31. 1. " INTID331  ,Interrupt ID331  Priority/Priority Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID330  ,Interrupt ID330   Priority/Priority Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID329  ,Interrupt ID329  Priority/Priority Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID328  ,Interrupt ID328   Priority/Priority Byte Offset 328 "
group.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hexmask.long.byte 0x00 24.--31. 1. " INTID335  ,Interrupt ID335  Priority/Priority Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID334  ,Interrupt ID334   Priority/Priority Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID333  ,Interrupt ID333  Priority/Priority Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID332  ,Interrupt ID332   Priority/Priority Byte Offset 332 "
group.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hexmask.long.byte 0x00 24.--31. 1. " INTID339  ,Interrupt ID339  Priority/Priority Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID338  ,Interrupt ID338   Priority/Priority Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID337  ,Interrupt ID337  Priority/Priority Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID336  ,Interrupt ID336   Priority/Priority Byte Offset 336 "
group.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hexmask.long.byte 0x00 24.--31. 1. " INTID343  ,Interrupt ID343  Priority/Priority Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID342  ,Interrupt ID342   Priority/Priority Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID341  ,Interrupt ID341  Priority/Priority Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID340  ,Interrupt ID340   Priority/Priority Byte Offset 340 "
group.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hexmask.long.byte 0x00 24.--31. 1. " INTID347  ,Interrupt ID347  Priority/Priority Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID346  ,Interrupt ID346   Priority/Priority Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID345  ,Interrupt ID345  Priority/Priority Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID344  ,Interrupt ID344   Priority/Priority Byte Offset 344 "
group.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
hexmask.long.byte 0x00 24.--31. 1. " INTID351  ,Interrupt ID351  Priority/Priority Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID350  ,Interrupt ID350   Priority/Priority Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID349  ,Interrupt ID349  Priority/Priority Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID348  ,Interrupt ID348   Priority/Priority Byte Offset 348 "
else
hgroup.long 0x540++0x03
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hgroup.long 0x544++0x03
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hgroup.long 0x548++0x03
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hgroup.long 0x54C++0x03
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hgroup.long 0x550++0x03
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hgroup.long 0x554++0x03
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hgroup.long 0x558++0x03
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hgroup.long 0x55C++0x03
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hexmask.long.byte 0x00 24.--31. 1. " INTID355  ,Interrupt ID355  Priority/Priority Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID354  ,Interrupt ID354   Priority/Priority Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID353  ,Interrupt ID353  Priority/Priority Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID352  ,Interrupt ID352   Priority/Priority Byte Offset 352 "
group.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hexmask.long.byte 0x00 24.--31. 1. " INTID359  ,Interrupt ID359  Priority/Priority Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID358  ,Interrupt ID358   Priority/Priority Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID357  ,Interrupt ID357  Priority/Priority Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID356  ,Interrupt ID356   Priority/Priority Byte Offset 356 "
group.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hexmask.long.byte 0x00 24.--31. 1. " INTID363  ,Interrupt ID363  Priority/Priority Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID362  ,Interrupt ID362   Priority/Priority Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID361  ,Interrupt ID361  Priority/Priority Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID360  ,Interrupt ID360   Priority/Priority Byte Offset 360 "
group.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hexmask.long.byte 0x00 24.--31. 1. " INTID367  ,Interrupt ID367  Priority/Priority Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID366  ,Interrupt ID366   Priority/Priority Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID365  ,Interrupt ID365  Priority/Priority Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID364  ,Interrupt ID364   Priority/Priority Byte Offset 364 "
group.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hexmask.long.byte 0x00 24.--31. 1. " INTID371  ,Interrupt ID371  Priority/Priority Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID370  ,Interrupt ID370   Priority/Priority Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID369  ,Interrupt ID369  Priority/Priority Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID368  ,Interrupt ID368   Priority/Priority Byte Offset 368 "
group.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hexmask.long.byte 0x00 24.--31. 1. " INTID375  ,Interrupt ID375  Priority/Priority Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID374  ,Interrupt ID374   Priority/Priority Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID373  ,Interrupt ID373  Priority/Priority Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID372  ,Interrupt ID372   Priority/Priority Byte Offset 372 "
group.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hexmask.long.byte 0x00 24.--31. 1. " INTID379  ,Interrupt ID379  Priority/Priority Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID378  ,Interrupt ID378   Priority/Priority Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID377  ,Interrupt ID377  Priority/Priority Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID376  ,Interrupt ID376   Priority/Priority Byte Offset 376 "
group.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
hexmask.long.byte 0x00 24.--31. 1. " INTID383  ,Interrupt ID383  Priority/Priority Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID382  ,Interrupt ID382   Priority/Priority Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID381  ,Interrupt ID381  Priority/Priority Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID380  ,Interrupt ID380   Priority/Priority Byte Offset 380 "
else
hgroup.long 0x560++0x03
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hgroup.long 0x564++0x03
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hgroup.long 0x568++0x03
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hgroup.long 0x56C++0x03
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hgroup.long 0x570++0x03
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hgroup.long 0x574++0x03
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hgroup.long 0x578++0x03
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hgroup.long 0x57C++0x03
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hexmask.long.byte 0x00 24.--31. 1. " INTID387  ,Interrupt ID387  Priority/Priority Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID386  ,Interrupt ID386   Priority/Priority Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID385  ,Interrupt ID385  Priority/Priority Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID384  ,Interrupt ID384   Priority/Priority Byte Offset 384 "
group.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hexmask.long.byte 0x00 24.--31. 1. " INTID391  ,Interrupt ID391  Priority/Priority Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID390  ,Interrupt ID390   Priority/Priority Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID389  ,Interrupt ID389  Priority/Priority Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID388  ,Interrupt ID388   Priority/Priority Byte Offset 388 "
group.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hexmask.long.byte 0x00 24.--31. 1. " INTID395  ,Interrupt ID395  Priority/Priority Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID394  ,Interrupt ID394   Priority/Priority Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID393  ,Interrupt ID393  Priority/Priority Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID392  ,Interrupt ID392   Priority/Priority Byte Offset 392 "
group.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hexmask.long.byte 0x00 24.--31. 1. " INTID399  ,Interrupt ID399  Priority/Priority Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID398  ,Interrupt ID398   Priority/Priority Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID397  ,Interrupt ID397  Priority/Priority Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID396  ,Interrupt ID396   Priority/Priority Byte Offset 396 "
group.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hexmask.long.byte 0x00 24.--31. 1. " INTID403  ,Interrupt ID403  Priority/Priority Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID402  ,Interrupt ID402   Priority/Priority Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID401  ,Interrupt ID401  Priority/Priority Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID400  ,Interrupt ID400   Priority/Priority Byte Offset 400 "
group.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hexmask.long.byte 0x00 24.--31. 1. " INTID407  ,Interrupt ID407  Priority/Priority Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID406  ,Interrupt ID406   Priority/Priority Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID405  ,Interrupt ID405  Priority/Priority Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID404  ,Interrupt ID404   Priority/Priority Byte Offset 404 "
group.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hexmask.long.byte 0x00 24.--31. 1. " INTID411  ,Interrupt ID411  Priority/Priority Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID410  ,Interrupt ID410   Priority/Priority Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID409  ,Interrupt ID409  Priority/Priority Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID408  ,Interrupt ID408   Priority/Priority Byte Offset 408 "
group.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
hexmask.long.byte 0x00 24.--31. 1. " INTID415  ,Interrupt ID415  Priority/Priority Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID414  ,Interrupt ID414   Priority/Priority Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID413  ,Interrupt ID413  Priority/Priority Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID412  ,Interrupt ID412   Priority/Priority Byte Offset 412 "
else
hgroup.long 0x580++0x03
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hgroup.long 0x584++0x03
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hgroup.long 0x588++0x03
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hgroup.long 0x58C++0x03
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hgroup.long 0x590++0x03
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hgroup.long 0x594++0x03
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hgroup.long 0x598++0x03
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hgroup.long 0x59C++0x03
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hexmask.long.byte 0x00 24.--31. 1. " INTID419  ,Interrupt ID419  Priority/Priority Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID418  ,Interrupt ID418   Priority/Priority Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID417  ,Interrupt ID417  Priority/Priority Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID416  ,Interrupt ID416   Priority/Priority Byte Offset 416 "
group.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hexmask.long.byte 0x00 24.--31. 1. " INTID423  ,Interrupt ID423  Priority/Priority Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID422  ,Interrupt ID422   Priority/Priority Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID421  ,Interrupt ID421  Priority/Priority Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID420  ,Interrupt ID420   Priority/Priority Byte Offset 420 "
group.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hexmask.long.byte 0x00 24.--31. 1. " INTID427  ,Interrupt ID427  Priority/Priority Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID426  ,Interrupt ID426   Priority/Priority Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID425  ,Interrupt ID425  Priority/Priority Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID424  ,Interrupt ID424   Priority/Priority Byte Offset 424 "
group.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hexmask.long.byte 0x00 24.--31. 1. " INTID431  ,Interrupt ID431  Priority/Priority Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID430  ,Interrupt ID430   Priority/Priority Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID429  ,Interrupt ID429  Priority/Priority Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID428  ,Interrupt ID428   Priority/Priority Byte Offset 428 "
group.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hexmask.long.byte 0x00 24.--31. 1. " INTID435  ,Interrupt ID435  Priority/Priority Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID434  ,Interrupt ID434   Priority/Priority Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID433  ,Interrupt ID433  Priority/Priority Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID432  ,Interrupt ID432   Priority/Priority Byte Offset 432 "
group.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hexmask.long.byte 0x00 24.--31. 1. " INTID439  ,Interrupt ID439  Priority/Priority Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID438  ,Interrupt ID438   Priority/Priority Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID437  ,Interrupt ID437  Priority/Priority Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID436  ,Interrupt ID436   Priority/Priority Byte Offset 436 "
group.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hexmask.long.byte 0x00 24.--31. 1. " INTID443  ,Interrupt ID443  Priority/Priority Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID442  ,Interrupt ID442   Priority/Priority Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID441  ,Interrupt ID441  Priority/Priority Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID440  ,Interrupt ID440   Priority/Priority Byte Offset 440 "
group.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
hexmask.long.byte 0x00 24.--31. 1. " INTID447  ,Interrupt ID447  Priority/Priority Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID446  ,Interrupt ID446   Priority/Priority Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID445  ,Interrupt ID445  Priority/Priority Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID444  ,Interrupt ID444   Priority/Priority Byte Offset 444 "
else
hgroup.long 0x5A0++0x03
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hgroup.long 0x5A4++0x03
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hgroup.long 0x5A8++0x03
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hgroup.long 0x5AC++0x03
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hgroup.long 0x5B0++0x03
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hgroup.long 0x5B4++0x03
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hgroup.long 0x5B8++0x03
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hgroup.long 0x5BC++0x03
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hexmask.long.byte 0x00 24.--31. 1. " INTID451  ,Interrupt ID451  Priority/Priority Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID450  ,Interrupt ID450   Priority/Priority Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID449  ,Interrupt ID449  Priority/Priority Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID448  ,Interrupt ID448   Priority/Priority Byte Offset 448 "
group.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hexmask.long.byte 0x00 24.--31. 1. " INTID455  ,Interrupt ID455  Priority/Priority Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID454  ,Interrupt ID454   Priority/Priority Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID453  ,Interrupt ID453  Priority/Priority Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID452  ,Interrupt ID452   Priority/Priority Byte Offset 452 "
group.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hexmask.long.byte 0x00 24.--31. 1. " INTID459  ,Interrupt ID459  Priority/Priority Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID458  ,Interrupt ID458   Priority/Priority Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID457  ,Interrupt ID457  Priority/Priority Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID456  ,Interrupt ID456   Priority/Priority Byte Offset 456 "
group.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hexmask.long.byte 0x00 24.--31. 1. " INTID463  ,Interrupt ID463  Priority/Priority Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID462  ,Interrupt ID462   Priority/Priority Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID461  ,Interrupt ID461  Priority/Priority Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID460  ,Interrupt ID460   Priority/Priority Byte Offset 460 "
group.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hexmask.long.byte 0x00 24.--31. 1. " INTID467  ,Interrupt ID467  Priority/Priority Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID466  ,Interrupt ID466   Priority/Priority Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID465  ,Interrupt ID465  Priority/Priority Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID464  ,Interrupt ID464   Priority/Priority Byte Offset 464 "
group.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hexmask.long.byte 0x00 24.--31. 1. " INTID471  ,Interrupt ID471  Priority/Priority Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID470  ,Interrupt ID470   Priority/Priority Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID469  ,Interrupt ID469  Priority/Priority Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID468  ,Interrupt ID468   Priority/Priority Byte Offset 468 "
group.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hexmask.long.byte 0x00 24.--31. 1. " INTID475  ,Interrupt ID475  Priority/Priority Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID474  ,Interrupt ID474   Priority/Priority Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID473  ,Interrupt ID473  Priority/Priority Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID472  ,Interrupt ID472   Priority/Priority Byte Offset 472 "
group.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
hexmask.long.byte 0x00 24.--31. 1. " INTID479  ,Interrupt ID479  Priority/Priority Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID478  ,Interrupt ID478   Priority/Priority Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID477  ,Interrupt ID477  Priority/Priority Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID476  ,Interrupt ID476   Priority/Priority Byte Offset 476 "
else
hgroup.long 0x5C0++0x03
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hgroup.long 0x5C4++0x03
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hgroup.long 0x5C8++0x03
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hgroup.long 0x5CC++0x03
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hgroup.long 0x5D0++0x03
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hgroup.long 0x5D4++0x03
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hgroup.long 0x5D8++0x03
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hgroup.long 0x5DC++0x03
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hexmask.long.byte 0x00 24.--31. 1. " INTID483  ,Interrupt ID483  Priority/Priority Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID482  ,Interrupt ID482   Priority/Priority Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID481  ,Interrupt ID481  Priority/Priority Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID480  ,Interrupt ID480   Priority/Priority Byte Offset 480 "
group.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hexmask.long.byte 0x00 24.--31. 1. " INTID487  ,Interrupt ID487  Priority/Priority Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID486  ,Interrupt ID486   Priority/Priority Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID485  ,Interrupt ID485  Priority/Priority Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID484  ,Interrupt ID484   Priority/Priority Byte Offset 484 "
group.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hexmask.long.byte 0x00 24.--31. 1. " INTID491  ,Interrupt ID491  Priority/Priority Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID490  ,Interrupt ID490   Priority/Priority Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID489  ,Interrupt ID489  Priority/Priority Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID488  ,Interrupt ID488   Priority/Priority Byte Offset 488 "
group.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hexmask.long.byte 0x00 24.--31. 1. " INTID495  ,Interrupt ID495  Priority/Priority Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID494  ,Interrupt ID494   Priority/Priority Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID493  ,Interrupt ID493  Priority/Priority Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID492  ,Interrupt ID492   Priority/Priority Byte Offset 492 "
group.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hexmask.long.byte 0x00 24.--31. 1. " INTID499  ,Interrupt ID499  Priority/Priority Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID498  ,Interrupt ID498   Priority/Priority Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID497  ,Interrupt ID497  Priority/Priority Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID496  ,Interrupt ID496   Priority/Priority Byte Offset 496 "
group.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hexmask.long.byte 0x00 24.--31. 1. " INTID503  ,Interrupt ID503  Priority/Priority Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID502  ,Interrupt ID502   Priority/Priority Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID501  ,Interrupt ID501  Priority/Priority Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID500  ,Interrupt ID500   Priority/Priority Byte Offset 500 "
group.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hexmask.long.byte 0x00 24.--31. 1. " INTID507  ,Interrupt ID507  Priority/Priority Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID506  ,Interrupt ID506   Priority/Priority Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID505  ,Interrupt ID505  Priority/Priority Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID504  ,Interrupt ID504   Priority/Priority Byte Offset 504 "
group.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
hexmask.long.byte 0x00 24.--31. 1. " INTID511  ,Interrupt ID511  Priority/Priority Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID510  ,Interrupt ID510   Priority/Priority Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID509  ,Interrupt ID509  Priority/Priority Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID508  ,Interrupt ID508   Priority/Priority Byte Offset 508 "
else
hgroup.long 0x5E0++0x03
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hgroup.long 0x5E4++0x03
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hgroup.long 0x5E8++0x03
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hgroup.long 0x5EC++0x03
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hgroup.long 0x5F0++0x03
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hgroup.long 0x5F4++0x03
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hgroup.long 0x5F8++0x03
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hgroup.long 0x5FC++0x03
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hexmask.long.byte 0x00 24.--31. 1. " INTID515  ,Interrupt ID515  Priority/Priority Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID514  ,Interrupt ID514   Priority/Priority Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID513  ,Interrupt ID513  Priority/Priority Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID512  ,Interrupt ID512   Priority/Priority Byte Offset 512 "
group.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hexmask.long.byte 0x00 24.--31. 1. " INTID519  ,Interrupt ID519  Priority/Priority Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID518  ,Interrupt ID518   Priority/Priority Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID517  ,Interrupt ID517  Priority/Priority Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID516  ,Interrupt ID516   Priority/Priority Byte Offset 516 "
group.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hexmask.long.byte 0x00 24.--31. 1. " INTID523  ,Interrupt ID523  Priority/Priority Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID522  ,Interrupt ID522   Priority/Priority Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID521  ,Interrupt ID521  Priority/Priority Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID520  ,Interrupt ID520   Priority/Priority Byte Offset 520 "
group.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hexmask.long.byte 0x00 24.--31. 1. " INTID527  ,Interrupt ID527  Priority/Priority Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID526  ,Interrupt ID526   Priority/Priority Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID525  ,Interrupt ID525  Priority/Priority Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID524  ,Interrupt ID524   Priority/Priority Byte Offset 524 "
group.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hexmask.long.byte 0x00 24.--31. 1. " INTID531  ,Interrupt ID531  Priority/Priority Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID530  ,Interrupt ID530   Priority/Priority Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID529  ,Interrupt ID529  Priority/Priority Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID528  ,Interrupt ID528   Priority/Priority Byte Offset 528 "
group.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hexmask.long.byte 0x00 24.--31. 1. " INTID535  ,Interrupt ID535  Priority/Priority Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID534  ,Interrupt ID534   Priority/Priority Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID533  ,Interrupt ID533  Priority/Priority Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID532  ,Interrupt ID532   Priority/Priority Byte Offset 532 "
group.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hexmask.long.byte 0x00 24.--31. 1. " INTID539  ,Interrupt ID539  Priority/Priority Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID538  ,Interrupt ID538   Priority/Priority Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID537  ,Interrupt ID537  Priority/Priority Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID536  ,Interrupt ID536   Priority/Priority Byte Offset 536 "
group.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
hexmask.long.byte 0x00 24.--31. 1. " INTID543  ,Interrupt ID543  Priority/Priority Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID542  ,Interrupt ID542   Priority/Priority Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID541  ,Interrupt ID541  Priority/Priority Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID540  ,Interrupt ID540   Priority/Priority Byte Offset 540 "
else
hgroup.long 0x600++0x03
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hgroup.long 0x604++0x03
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hgroup.long 0x608++0x03
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hgroup.long 0x60C++0x03
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hgroup.long 0x610++0x03
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hgroup.long 0x614++0x03
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hgroup.long 0x618++0x03
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hgroup.long 0x61C++0x03
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hexmask.long.byte 0x00 24.--31. 1. " INTID547  ,Interrupt ID547  Priority/Priority Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID546  ,Interrupt ID546   Priority/Priority Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID545  ,Interrupt ID545  Priority/Priority Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID544  ,Interrupt ID544   Priority/Priority Byte Offset 544 "
group.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hexmask.long.byte 0x00 24.--31. 1. " INTID551  ,Interrupt ID551  Priority/Priority Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID550  ,Interrupt ID550   Priority/Priority Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID549  ,Interrupt ID549  Priority/Priority Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID548  ,Interrupt ID548   Priority/Priority Byte Offset 548 "
group.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hexmask.long.byte 0x00 24.--31. 1. " INTID555  ,Interrupt ID555  Priority/Priority Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID554  ,Interrupt ID554   Priority/Priority Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID553  ,Interrupt ID553  Priority/Priority Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID552  ,Interrupt ID552   Priority/Priority Byte Offset 552 "
group.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hexmask.long.byte 0x00 24.--31. 1. " INTID559  ,Interrupt ID559  Priority/Priority Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID558  ,Interrupt ID558   Priority/Priority Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID557  ,Interrupt ID557  Priority/Priority Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID556  ,Interrupt ID556   Priority/Priority Byte Offset 556 "
group.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hexmask.long.byte 0x00 24.--31. 1. " INTID563  ,Interrupt ID563  Priority/Priority Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID562  ,Interrupt ID562   Priority/Priority Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID561  ,Interrupt ID561  Priority/Priority Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID560  ,Interrupt ID560   Priority/Priority Byte Offset 560 "
group.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hexmask.long.byte 0x00 24.--31. 1. " INTID567  ,Interrupt ID567  Priority/Priority Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID566  ,Interrupt ID566   Priority/Priority Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID565  ,Interrupt ID565  Priority/Priority Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID564  ,Interrupt ID564   Priority/Priority Byte Offset 564 "
group.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hexmask.long.byte 0x00 24.--31. 1. " INTID571  ,Interrupt ID571  Priority/Priority Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID570  ,Interrupt ID570   Priority/Priority Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID569  ,Interrupt ID569  Priority/Priority Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID568  ,Interrupt ID568   Priority/Priority Byte Offset 568 "
group.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
hexmask.long.byte 0x00 24.--31. 1. " INTID575  ,Interrupt ID575  Priority/Priority Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID574  ,Interrupt ID574   Priority/Priority Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID573  ,Interrupt ID573  Priority/Priority Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID572  ,Interrupt ID572   Priority/Priority Byte Offset 572 "
else
hgroup.long 0x620++0x03
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hgroup.long 0x624++0x03
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hgroup.long 0x628++0x03
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hgroup.long 0x62C++0x03
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hgroup.long 0x630++0x03
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hgroup.long 0x634++0x03
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hgroup.long 0x638++0x03
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hgroup.long 0x63C++0x03
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hexmask.long.byte 0x00 24.--31. 1. " INTID579  ,Interrupt ID579  Priority/Priority Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID578  ,Interrupt ID578   Priority/Priority Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID577  ,Interrupt ID577  Priority/Priority Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID576  ,Interrupt ID576   Priority/Priority Byte Offset 576 "
group.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hexmask.long.byte 0x00 24.--31. 1. " INTID583  ,Interrupt ID583  Priority/Priority Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID582  ,Interrupt ID582   Priority/Priority Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID581  ,Interrupt ID581  Priority/Priority Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID580  ,Interrupt ID580   Priority/Priority Byte Offset 580 "
group.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hexmask.long.byte 0x00 24.--31. 1. " INTID587  ,Interrupt ID587  Priority/Priority Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID586  ,Interrupt ID586   Priority/Priority Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID585  ,Interrupt ID585  Priority/Priority Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID584  ,Interrupt ID584   Priority/Priority Byte Offset 584 "
group.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hexmask.long.byte 0x00 24.--31. 1. " INTID591  ,Interrupt ID591  Priority/Priority Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID590  ,Interrupt ID590   Priority/Priority Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID589  ,Interrupt ID589  Priority/Priority Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID588  ,Interrupt ID588   Priority/Priority Byte Offset 588 "
group.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hexmask.long.byte 0x00 24.--31. 1. " INTID595  ,Interrupt ID595  Priority/Priority Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID594  ,Interrupt ID594   Priority/Priority Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID593  ,Interrupt ID593  Priority/Priority Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID592  ,Interrupt ID592   Priority/Priority Byte Offset 592 "
group.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hexmask.long.byte 0x00 24.--31. 1. " INTID599  ,Interrupt ID599  Priority/Priority Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID598  ,Interrupt ID598   Priority/Priority Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID597  ,Interrupt ID597  Priority/Priority Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID596  ,Interrupt ID596   Priority/Priority Byte Offset 596 "
group.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hexmask.long.byte 0x00 24.--31. 1. " INTID603  ,Interrupt ID603  Priority/Priority Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID602  ,Interrupt ID602   Priority/Priority Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID601  ,Interrupt ID601  Priority/Priority Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID600  ,Interrupt ID600   Priority/Priority Byte Offset 600 "
group.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
hexmask.long.byte 0x00 24.--31. 1. " INTID607  ,Interrupt ID607  Priority/Priority Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID606  ,Interrupt ID606   Priority/Priority Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID605  ,Interrupt ID605  Priority/Priority Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID604  ,Interrupt ID604   Priority/Priority Byte Offset 604 "
else
hgroup.long 0x640++0x03
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hgroup.long 0x644++0x03
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hgroup.long 0x648++0x03
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hgroup.long 0x64C++0x03
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hgroup.long 0x650++0x03
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hgroup.long 0x654++0x03
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hgroup.long 0x658++0x03
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hgroup.long 0x65C++0x03
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hexmask.long.byte 0x00 24.--31. 1. " INTID611  ,Interrupt ID611  Priority/Priority Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID610  ,Interrupt ID610   Priority/Priority Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID609  ,Interrupt ID609  Priority/Priority Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID608  ,Interrupt ID608   Priority/Priority Byte Offset 608 "
group.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hexmask.long.byte 0x00 24.--31. 1. " INTID615  ,Interrupt ID615  Priority/Priority Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID614  ,Interrupt ID614   Priority/Priority Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID613  ,Interrupt ID613  Priority/Priority Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID612  ,Interrupt ID612   Priority/Priority Byte Offset 612 "
group.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hexmask.long.byte 0x00 24.--31. 1. " INTID619  ,Interrupt ID619  Priority/Priority Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID618  ,Interrupt ID618   Priority/Priority Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID617  ,Interrupt ID617  Priority/Priority Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID616  ,Interrupt ID616   Priority/Priority Byte Offset 616 "
group.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hexmask.long.byte 0x00 24.--31. 1. " INTID623  ,Interrupt ID623  Priority/Priority Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID622  ,Interrupt ID622   Priority/Priority Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID621  ,Interrupt ID621  Priority/Priority Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID620  ,Interrupt ID620   Priority/Priority Byte Offset 620 "
group.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hexmask.long.byte 0x00 24.--31. 1. " INTID627  ,Interrupt ID627  Priority/Priority Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID626  ,Interrupt ID626   Priority/Priority Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID625  ,Interrupt ID625  Priority/Priority Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID624  ,Interrupt ID624   Priority/Priority Byte Offset 624 "
group.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hexmask.long.byte 0x00 24.--31. 1. " INTID631  ,Interrupt ID631  Priority/Priority Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID630  ,Interrupt ID630   Priority/Priority Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID629  ,Interrupt ID629  Priority/Priority Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID628  ,Interrupt ID628   Priority/Priority Byte Offset 628 "
group.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hexmask.long.byte 0x00 24.--31. 1. " INTID635  ,Interrupt ID635  Priority/Priority Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID634  ,Interrupt ID634   Priority/Priority Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID633  ,Interrupt ID633  Priority/Priority Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID632  ,Interrupt ID632   Priority/Priority Byte Offset 632 "
group.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
hexmask.long.byte 0x00 24.--31. 1. " INTID639  ,Interrupt ID639  Priority/Priority Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID638  ,Interrupt ID638   Priority/Priority Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID637  ,Interrupt ID637  Priority/Priority Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID636  ,Interrupt ID636   Priority/Priority Byte Offset 636 "
else
hgroup.long 0x660++0x03
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hgroup.long 0x664++0x03
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hgroup.long 0x668++0x03
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hgroup.long 0x66C++0x03
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hgroup.long 0x670++0x03
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hgroup.long 0x674++0x03
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hgroup.long 0x678++0x03
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hgroup.long 0x67C++0x03
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hexmask.long.byte 0x00 24.--31. 1. " INTID643  ,Interrupt ID643  Priority/Priority Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID642  ,Interrupt ID642   Priority/Priority Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID641  ,Interrupt ID641  Priority/Priority Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID640  ,Interrupt ID640   Priority/Priority Byte Offset 640 "
group.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hexmask.long.byte 0x00 24.--31. 1. " INTID647  ,Interrupt ID647  Priority/Priority Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID646  ,Interrupt ID646   Priority/Priority Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID645  ,Interrupt ID645  Priority/Priority Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID644  ,Interrupt ID644   Priority/Priority Byte Offset 644 "
group.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hexmask.long.byte 0x00 24.--31. 1. " INTID651  ,Interrupt ID651  Priority/Priority Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID650  ,Interrupt ID650   Priority/Priority Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID649  ,Interrupt ID649  Priority/Priority Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID648  ,Interrupt ID648   Priority/Priority Byte Offset 648 "
group.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hexmask.long.byte 0x00 24.--31. 1. " INTID655  ,Interrupt ID655  Priority/Priority Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID654  ,Interrupt ID654   Priority/Priority Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID653  ,Interrupt ID653  Priority/Priority Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID652  ,Interrupt ID652   Priority/Priority Byte Offset 652 "
group.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hexmask.long.byte 0x00 24.--31. 1. " INTID659  ,Interrupt ID659  Priority/Priority Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID658  ,Interrupt ID658   Priority/Priority Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID657  ,Interrupt ID657  Priority/Priority Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID656  ,Interrupt ID656   Priority/Priority Byte Offset 656 "
group.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hexmask.long.byte 0x00 24.--31. 1. " INTID663  ,Interrupt ID663  Priority/Priority Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID662  ,Interrupt ID662   Priority/Priority Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID661  ,Interrupt ID661  Priority/Priority Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID660  ,Interrupt ID660   Priority/Priority Byte Offset 660 "
group.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hexmask.long.byte 0x00 24.--31. 1. " INTID667  ,Interrupt ID667  Priority/Priority Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID666  ,Interrupt ID666   Priority/Priority Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID665  ,Interrupt ID665  Priority/Priority Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID664  ,Interrupt ID664   Priority/Priority Byte Offset 664 "
group.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
hexmask.long.byte 0x00 24.--31. 1. " INTID671  ,Interrupt ID671  Priority/Priority Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID670  ,Interrupt ID670   Priority/Priority Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID669  ,Interrupt ID669  Priority/Priority Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID668  ,Interrupt ID668   Priority/Priority Byte Offset 668 "
else
hgroup.long 0x680++0x03
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hgroup.long 0x684++0x03
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hgroup.long 0x688++0x03
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hgroup.long 0x68C++0x03
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hgroup.long 0x690++0x03
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hgroup.long 0x694++0x03
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hgroup.long 0x698++0x03
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hgroup.long 0x69C++0x03
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hexmask.long.byte 0x00 24.--31. 1. " INTID675  ,Interrupt ID675  Priority/Priority Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID674  ,Interrupt ID674   Priority/Priority Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID673  ,Interrupt ID673  Priority/Priority Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID672  ,Interrupt ID672   Priority/Priority Byte Offset 672 "
group.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hexmask.long.byte 0x00 24.--31. 1. " INTID679  ,Interrupt ID679  Priority/Priority Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID678  ,Interrupt ID678   Priority/Priority Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID677  ,Interrupt ID677  Priority/Priority Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID676  ,Interrupt ID676   Priority/Priority Byte Offset 676 "
group.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hexmask.long.byte 0x00 24.--31. 1. " INTID683  ,Interrupt ID683  Priority/Priority Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID682  ,Interrupt ID682   Priority/Priority Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID681  ,Interrupt ID681  Priority/Priority Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID680  ,Interrupt ID680   Priority/Priority Byte Offset 680 "
group.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hexmask.long.byte 0x00 24.--31. 1. " INTID687  ,Interrupt ID687  Priority/Priority Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID686  ,Interrupt ID686   Priority/Priority Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID685  ,Interrupt ID685  Priority/Priority Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID684  ,Interrupt ID684   Priority/Priority Byte Offset 684 "
group.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hexmask.long.byte 0x00 24.--31. 1. " INTID691  ,Interrupt ID691  Priority/Priority Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID690  ,Interrupt ID690   Priority/Priority Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID689  ,Interrupt ID689  Priority/Priority Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID688  ,Interrupt ID688   Priority/Priority Byte Offset 688 "
group.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hexmask.long.byte 0x00 24.--31. 1. " INTID695  ,Interrupt ID695  Priority/Priority Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID694  ,Interrupt ID694   Priority/Priority Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID693  ,Interrupt ID693  Priority/Priority Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID692  ,Interrupt ID692   Priority/Priority Byte Offset 692 "
group.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hexmask.long.byte 0x00 24.--31. 1. " INTID699  ,Interrupt ID699  Priority/Priority Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID698  ,Interrupt ID698   Priority/Priority Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID697  ,Interrupt ID697  Priority/Priority Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID696  ,Interrupt ID696   Priority/Priority Byte Offset 696 "
group.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
hexmask.long.byte 0x00 24.--31. 1. " INTID703  ,Interrupt ID703  Priority/Priority Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID702  ,Interrupt ID702   Priority/Priority Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID701  ,Interrupt ID701  Priority/Priority Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID700  ,Interrupt ID700   Priority/Priority Byte Offset 700 "
else
hgroup.long 0x6A0++0x03
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hgroup.long 0x6A4++0x03
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hgroup.long 0x6A8++0x03
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hgroup.long 0x6AC++0x03
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hgroup.long 0x6B0++0x03
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hgroup.long 0x6B4++0x03
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hgroup.long 0x6B8++0x03
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hgroup.long 0x6BC++0x03
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hexmask.long.byte 0x00 24.--31. 1. " INTID707  ,Interrupt ID707  Priority/Priority Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID706  ,Interrupt ID706   Priority/Priority Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID705  ,Interrupt ID705  Priority/Priority Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID704  ,Interrupt ID704   Priority/Priority Byte Offset 704 "
group.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hexmask.long.byte 0x00 24.--31. 1. " INTID711  ,Interrupt ID711  Priority/Priority Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID710  ,Interrupt ID710   Priority/Priority Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID709  ,Interrupt ID709  Priority/Priority Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID708  ,Interrupt ID708   Priority/Priority Byte Offset 708 "
group.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hexmask.long.byte 0x00 24.--31. 1. " INTID715  ,Interrupt ID715  Priority/Priority Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID714  ,Interrupt ID714   Priority/Priority Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID713  ,Interrupt ID713  Priority/Priority Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID712  ,Interrupt ID712   Priority/Priority Byte Offset 712 "
group.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hexmask.long.byte 0x00 24.--31. 1. " INTID719  ,Interrupt ID719  Priority/Priority Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID718  ,Interrupt ID718   Priority/Priority Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID717  ,Interrupt ID717  Priority/Priority Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID716  ,Interrupt ID716   Priority/Priority Byte Offset 716 "
group.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hexmask.long.byte 0x00 24.--31. 1. " INTID723  ,Interrupt ID723  Priority/Priority Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID722  ,Interrupt ID722   Priority/Priority Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID721  ,Interrupt ID721  Priority/Priority Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID720  ,Interrupt ID720   Priority/Priority Byte Offset 720 "
group.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hexmask.long.byte 0x00 24.--31. 1. " INTID727  ,Interrupt ID727  Priority/Priority Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID726  ,Interrupt ID726   Priority/Priority Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID725  ,Interrupt ID725  Priority/Priority Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID724  ,Interrupt ID724   Priority/Priority Byte Offset 724 "
group.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hexmask.long.byte 0x00 24.--31. 1. " INTID731  ,Interrupt ID731  Priority/Priority Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID730  ,Interrupt ID730   Priority/Priority Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID729  ,Interrupt ID729  Priority/Priority Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID728  ,Interrupt ID728   Priority/Priority Byte Offset 728 "
group.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
hexmask.long.byte 0x00 24.--31. 1. " INTID735  ,Interrupt ID735  Priority/Priority Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID734  ,Interrupt ID734   Priority/Priority Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID733  ,Interrupt ID733  Priority/Priority Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID732  ,Interrupt ID732   Priority/Priority Byte Offset 732 "
else
hgroup.long 0x6C0++0x03
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hgroup.long 0x6C4++0x03
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hgroup.long 0x6C8++0x03
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hgroup.long 0x6CC++0x03
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hgroup.long 0x6D0++0x03
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hgroup.long 0x6D4++0x03
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hgroup.long 0x6D8++0x03
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hgroup.long 0x6DC++0x03
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hexmask.long.byte 0x00 24.--31. 1. " INTID739  ,Interrupt ID739  Priority/Priority Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID738  ,Interrupt ID738   Priority/Priority Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID737  ,Interrupt ID737  Priority/Priority Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID736  ,Interrupt ID736   Priority/Priority Byte Offset 736 "
group.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hexmask.long.byte 0x00 24.--31. 1. " INTID743  ,Interrupt ID743  Priority/Priority Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID742  ,Interrupt ID742   Priority/Priority Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID741  ,Interrupt ID741  Priority/Priority Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID740  ,Interrupt ID740   Priority/Priority Byte Offset 740 "
group.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hexmask.long.byte 0x00 24.--31. 1. " INTID747  ,Interrupt ID747  Priority/Priority Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID746  ,Interrupt ID746   Priority/Priority Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID745  ,Interrupt ID745  Priority/Priority Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID744  ,Interrupt ID744   Priority/Priority Byte Offset 744 "
group.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hexmask.long.byte 0x00 24.--31. 1. " INTID751  ,Interrupt ID751  Priority/Priority Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID750  ,Interrupt ID750   Priority/Priority Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID749  ,Interrupt ID749  Priority/Priority Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID748  ,Interrupt ID748   Priority/Priority Byte Offset 748 "
group.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hexmask.long.byte 0x00 24.--31. 1. " INTID755  ,Interrupt ID755  Priority/Priority Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID754  ,Interrupt ID754   Priority/Priority Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID753  ,Interrupt ID753  Priority/Priority Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID752  ,Interrupt ID752   Priority/Priority Byte Offset 752 "
group.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hexmask.long.byte 0x00 24.--31. 1. " INTID759  ,Interrupt ID759  Priority/Priority Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID758  ,Interrupt ID758   Priority/Priority Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID757  ,Interrupt ID757  Priority/Priority Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID756  ,Interrupt ID756   Priority/Priority Byte Offset 756 "
group.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hexmask.long.byte 0x00 24.--31. 1. " INTID763  ,Interrupt ID763  Priority/Priority Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID762  ,Interrupt ID762   Priority/Priority Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID761  ,Interrupt ID761  Priority/Priority Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID760  ,Interrupt ID760   Priority/Priority Byte Offset 760 "
group.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
hexmask.long.byte 0x00 24.--31. 1. " INTID767  ,Interrupt ID767  Priority/Priority Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID766  ,Interrupt ID766   Priority/Priority Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID765  ,Interrupt ID765  Priority/Priority Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID764  ,Interrupt ID764   Priority/Priority Byte Offset 764 "
else
hgroup.long 0x6E0++0x03
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hgroup.long 0x6E4++0x03
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hgroup.long 0x6E8++0x03
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hgroup.long 0x6EC++0x03
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hgroup.long 0x6F0++0x03
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hgroup.long 0x6F4++0x03
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hgroup.long 0x6F8++0x03
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hgroup.long 0x6FC++0x03
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hexmask.long.byte 0x00 24.--31. 1. " INTID771  ,Interrupt ID771  Priority/Priority Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID770  ,Interrupt ID770   Priority/Priority Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID769  ,Interrupt ID769  Priority/Priority Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID768  ,Interrupt ID768   Priority/Priority Byte Offset 768 "
group.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hexmask.long.byte 0x00 24.--31. 1. " INTID775  ,Interrupt ID775  Priority/Priority Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID774  ,Interrupt ID774   Priority/Priority Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID773  ,Interrupt ID773  Priority/Priority Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID772  ,Interrupt ID772   Priority/Priority Byte Offset 772 "
group.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hexmask.long.byte 0x00 24.--31. 1. " INTID779  ,Interrupt ID779  Priority/Priority Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID778  ,Interrupt ID778   Priority/Priority Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID777  ,Interrupt ID777  Priority/Priority Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID776  ,Interrupt ID776   Priority/Priority Byte Offset 776 "
group.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hexmask.long.byte 0x00 24.--31. 1. " INTID783  ,Interrupt ID783  Priority/Priority Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID782  ,Interrupt ID782   Priority/Priority Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID781  ,Interrupt ID781  Priority/Priority Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID780  ,Interrupt ID780   Priority/Priority Byte Offset 780 "
group.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hexmask.long.byte 0x00 24.--31. 1. " INTID787  ,Interrupt ID787  Priority/Priority Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID786  ,Interrupt ID786   Priority/Priority Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID785  ,Interrupt ID785  Priority/Priority Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID784  ,Interrupt ID784   Priority/Priority Byte Offset 784 "
group.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hexmask.long.byte 0x00 24.--31. 1. " INTID791  ,Interrupt ID791  Priority/Priority Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID790  ,Interrupt ID790   Priority/Priority Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID789  ,Interrupt ID789  Priority/Priority Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID788  ,Interrupt ID788   Priority/Priority Byte Offset 788 "
group.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hexmask.long.byte 0x00 24.--31. 1. " INTID795  ,Interrupt ID795  Priority/Priority Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID794  ,Interrupt ID794   Priority/Priority Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID793  ,Interrupt ID793  Priority/Priority Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID792  ,Interrupt ID792   Priority/Priority Byte Offset 792 "
group.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
hexmask.long.byte 0x00 24.--31. 1. " INTID799  ,Interrupt ID799  Priority/Priority Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID798  ,Interrupt ID798   Priority/Priority Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID797  ,Interrupt ID797  Priority/Priority Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID796  ,Interrupt ID796   Priority/Priority Byte Offset 796 "
else
hgroup.long 0x700++0x03
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hgroup.long 0x704++0x03
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hgroup.long 0x708++0x03
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hgroup.long 0x70C++0x03
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hgroup.long 0x710++0x03
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hgroup.long 0x714++0x03
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hgroup.long 0x718++0x03
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hgroup.long 0x71C++0x03
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hexmask.long.byte 0x00 24.--31. 1. " INTID803  ,Interrupt ID803  Priority/Priority Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID802  ,Interrupt ID802   Priority/Priority Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID801  ,Interrupt ID801  Priority/Priority Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID800  ,Interrupt ID800   Priority/Priority Byte Offset 800 "
group.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hexmask.long.byte 0x00 24.--31. 1. " INTID807  ,Interrupt ID807  Priority/Priority Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID806  ,Interrupt ID806   Priority/Priority Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID805  ,Interrupt ID805  Priority/Priority Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID804  ,Interrupt ID804   Priority/Priority Byte Offset 804 "
group.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hexmask.long.byte 0x00 24.--31. 1. " INTID811  ,Interrupt ID811  Priority/Priority Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID810  ,Interrupt ID810   Priority/Priority Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID809  ,Interrupt ID809  Priority/Priority Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID808  ,Interrupt ID808   Priority/Priority Byte Offset 808 "
group.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hexmask.long.byte 0x00 24.--31. 1. " INTID815  ,Interrupt ID815  Priority/Priority Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID814  ,Interrupt ID814   Priority/Priority Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID813  ,Interrupt ID813  Priority/Priority Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID812  ,Interrupt ID812   Priority/Priority Byte Offset 812 "
group.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hexmask.long.byte 0x00 24.--31. 1. " INTID819  ,Interrupt ID819  Priority/Priority Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID818  ,Interrupt ID818   Priority/Priority Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID817  ,Interrupt ID817  Priority/Priority Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID816  ,Interrupt ID816   Priority/Priority Byte Offset 816 "
group.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hexmask.long.byte 0x00 24.--31. 1. " INTID823  ,Interrupt ID823  Priority/Priority Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID822  ,Interrupt ID822   Priority/Priority Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID821  ,Interrupt ID821  Priority/Priority Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID820  ,Interrupt ID820   Priority/Priority Byte Offset 820 "
group.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hexmask.long.byte 0x00 24.--31. 1. " INTID827  ,Interrupt ID827  Priority/Priority Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID826  ,Interrupt ID826   Priority/Priority Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID825  ,Interrupt ID825  Priority/Priority Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID824  ,Interrupt ID824   Priority/Priority Byte Offset 824 "
group.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
hexmask.long.byte 0x00 24.--31. 1. " INTID831  ,Interrupt ID831  Priority/Priority Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID830  ,Interrupt ID830   Priority/Priority Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID829  ,Interrupt ID829  Priority/Priority Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID828  ,Interrupt ID828   Priority/Priority Byte Offset 828 "
else
hgroup.long 0x720++0x03
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hgroup.long 0x724++0x03
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hgroup.long 0x728++0x03
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hgroup.long 0x72C++0x03
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hgroup.long 0x730++0x03
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hgroup.long 0x734++0x03
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hgroup.long 0x738++0x03
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hgroup.long 0x73C++0x03
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hexmask.long.byte 0x00 24.--31. 1. " INTID835  ,Interrupt ID835  Priority/Priority Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID834  ,Interrupt ID834   Priority/Priority Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID833  ,Interrupt ID833  Priority/Priority Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID832  ,Interrupt ID832   Priority/Priority Byte Offset 832 "
group.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hexmask.long.byte 0x00 24.--31. 1. " INTID839  ,Interrupt ID839  Priority/Priority Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID838  ,Interrupt ID838   Priority/Priority Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID837  ,Interrupt ID837  Priority/Priority Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID836  ,Interrupt ID836   Priority/Priority Byte Offset 836 "
group.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hexmask.long.byte 0x00 24.--31. 1. " INTID843  ,Interrupt ID843  Priority/Priority Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID842  ,Interrupt ID842   Priority/Priority Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID841  ,Interrupt ID841  Priority/Priority Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID840  ,Interrupt ID840   Priority/Priority Byte Offset 840 "
group.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hexmask.long.byte 0x00 24.--31. 1. " INTID847  ,Interrupt ID847  Priority/Priority Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID846  ,Interrupt ID846   Priority/Priority Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID845  ,Interrupt ID845  Priority/Priority Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID844  ,Interrupt ID844   Priority/Priority Byte Offset 844 "
group.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hexmask.long.byte 0x00 24.--31. 1. " INTID851  ,Interrupt ID851  Priority/Priority Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID850  ,Interrupt ID850   Priority/Priority Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID849  ,Interrupt ID849  Priority/Priority Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID848  ,Interrupt ID848   Priority/Priority Byte Offset 848 "
group.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hexmask.long.byte 0x00 24.--31. 1. " INTID855  ,Interrupt ID855  Priority/Priority Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID854  ,Interrupt ID854   Priority/Priority Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID853  ,Interrupt ID853  Priority/Priority Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID852  ,Interrupt ID852   Priority/Priority Byte Offset 852 "
group.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hexmask.long.byte 0x00 24.--31. 1. " INTID859  ,Interrupt ID859  Priority/Priority Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID858  ,Interrupt ID858   Priority/Priority Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID857  ,Interrupt ID857  Priority/Priority Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID856  ,Interrupt ID856   Priority/Priority Byte Offset 856 "
group.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
hexmask.long.byte 0x00 24.--31. 1. " INTID863  ,Interrupt ID863  Priority/Priority Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID862  ,Interrupt ID862   Priority/Priority Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID861  ,Interrupt ID861  Priority/Priority Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID860  ,Interrupt ID860   Priority/Priority Byte Offset 860 "
else
hgroup.long 0x740++0x03
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hgroup.long 0x744++0x03
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hgroup.long 0x748++0x03
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hgroup.long 0x74C++0x03
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hgroup.long 0x750++0x03
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hgroup.long 0x754++0x03
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hgroup.long 0x758++0x03
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hgroup.long 0x75C++0x03
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hexmask.long.byte 0x00 24.--31. 1. " INTID867  ,Interrupt ID867  Priority/Priority Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID866  ,Interrupt ID866   Priority/Priority Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID865  ,Interrupt ID865  Priority/Priority Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID864  ,Interrupt ID864   Priority/Priority Byte Offset 864 "
group.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hexmask.long.byte 0x00 24.--31. 1. " INTID871  ,Interrupt ID871  Priority/Priority Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID870  ,Interrupt ID870   Priority/Priority Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID869  ,Interrupt ID869  Priority/Priority Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID868  ,Interrupt ID868   Priority/Priority Byte Offset 868 "
group.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hexmask.long.byte 0x00 24.--31. 1. " INTID875  ,Interrupt ID875  Priority/Priority Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID874  ,Interrupt ID874   Priority/Priority Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID873  ,Interrupt ID873  Priority/Priority Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID872  ,Interrupt ID872   Priority/Priority Byte Offset 872 "
group.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hexmask.long.byte 0x00 24.--31. 1. " INTID879  ,Interrupt ID879  Priority/Priority Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID878  ,Interrupt ID878   Priority/Priority Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID877  ,Interrupt ID877  Priority/Priority Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID876  ,Interrupt ID876   Priority/Priority Byte Offset 876 "
group.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hexmask.long.byte 0x00 24.--31. 1. " INTID883  ,Interrupt ID883  Priority/Priority Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID882  ,Interrupt ID882   Priority/Priority Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID881  ,Interrupt ID881  Priority/Priority Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID880  ,Interrupt ID880   Priority/Priority Byte Offset 880 "
group.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hexmask.long.byte 0x00 24.--31. 1. " INTID887  ,Interrupt ID887  Priority/Priority Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID886  ,Interrupt ID886   Priority/Priority Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID885  ,Interrupt ID885  Priority/Priority Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID884  ,Interrupt ID884   Priority/Priority Byte Offset 884 "
group.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hexmask.long.byte 0x00 24.--31. 1. " INTID891  ,Interrupt ID891  Priority/Priority Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID890  ,Interrupt ID890   Priority/Priority Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID889  ,Interrupt ID889  Priority/Priority Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID888  ,Interrupt ID888   Priority/Priority Byte Offset 888 "
group.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
hexmask.long.byte 0x00 24.--31. 1. " INTID895  ,Interrupt ID895  Priority/Priority Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID894  ,Interrupt ID894   Priority/Priority Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID893  ,Interrupt ID893  Priority/Priority Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID892  ,Interrupt ID892   Priority/Priority Byte Offset 892 "
else
hgroup.long 0x760++0x03
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hgroup.long 0x764++0x03
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hgroup.long 0x768++0x03
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hgroup.long 0x76C++0x03
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hgroup.long 0x770++0x03
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hgroup.long 0x774++0x03
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hgroup.long 0x778++0x03
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hgroup.long 0x77C++0x03
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hexmask.long.byte 0x00 24.--31. 1. " INTID899  ,Interrupt ID899  Priority/Priority Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID898  ,Interrupt ID898   Priority/Priority Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID897  ,Interrupt ID897  Priority/Priority Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID896  ,Interrupt ID896   Priority/Priority Byte Offset 896 "
group.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hexmask.long.byte 0x00 24.--31. 1. " INTID903  ,Interrupt ID903  Priority/Priority Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID902  ,Interrupt ID902   Priority/Priority Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID901  ,Interrupt ID901  Priority/Priority Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID900  ,Interrupt ID900   Priority/Priority Byte Offset 900 "
group.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hexmask.long.byte 0x00 24.--31. 1. " INTID907  ,Interrupt ID907  Priority/Priority Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID906  ,Interrupt ID906   Priority/Priority Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID905  ,Interrupt ID905  Priority/Priority Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID904  ,Interrupt ID904   Priority/Priority Byte Offset 904 "
group.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hexmask.long.byte 0x00 24.--31. 1. " INTID911  ,Interrupt ID911  Priority/Priority Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID910  ,Interrupt ID910   Priority/Priority Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID909  ,Interrupt ID909  Priority/Priority Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID908  ,Interrupt ID908   Priority/Priority Byte Offset 908 "
group.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hexmask.long.byte 0x00 24.--31. 1. " INTID915  ,Interrupt ID915  Priority/Priority Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID914  ,Interrupt ID914   Priority/Priority Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID913  ,Interrupt ID913  Priority/Priority Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID912  ,Interrupt ID912   Priority/Priority Byte Offset 912 "
group.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hexmask.long.byte 0x00 24.--31. 1. " INTID919  ,Interrupt ID919  Priority/Priority Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID918  ,Interrupt ID918   Priority/Priority Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID917  ,Interrupt ID917  Priority/Priority Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID916  ,Interrupt ID916   Priority/Priority Byte Offset 916 "
group.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hexmask.long.byte 0x00 24.--31. 1. " INTID923  ,Interrupt ID923  Priority/Priority Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID922  ,Interrupt ID922   Priority/Priority Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID921  ,Interrupt ID921  Priority/Priority Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID920  ,Interrupt ID920   Priority/Priority Byte Offset 920 "
group.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
hexmask.long.byte 0x00 24.--31. 1. " INTID927  ,Interrupt ID927  Priority/Priority Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID926  ,Interrupt ID926   Priority/Priority Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID925  ,Interrupt ID925  Priority/Priority Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID924  ,Interrupt ID924   Priority/Priority Byte Offset 924 "
else
hgroup.long 0x780++0x03
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hgroup.long 0x784++0x03
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hgroup.long 0x788++0x03
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hgroup.long 0x78C++0x03
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hgroup.long 0x790++0x03
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hgroup.long 0x794++0x03
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hgroup.long 0x798++0x03
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hgroup.long 0x79C++0x03
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hexmask.long.byte 0x00 24.--31. 1. " INTID931  ,Interrupt ID931  Priority/Priority Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID930  ,Interrupt ID930   Priority/Priority Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID929  ,Interrupt ID929  Priority/Priority Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID928  ,Interrupt ID928   Priority/Priority Byte Offset 928 "
group.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hexmask.long.byte 0x00 24.--31. 1. " INTID935  ,Interrupt ID935  Priority/Priority Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID934  ,Interrupt ID934   Priority/Priority Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID933  ,Interrupt ID933  Priority/Priority Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID932  ,Interrupt ID932   Priority/Priority Byte Offset 932 "
group.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hexmask.long.byte 0x00 24.--31. 1. " INTID939  ,Interrupt ID939  Priority/Priority Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID938  ,Interrupt ID938   Priority/Priority Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID937  ,Interrupt ID937  Priority/Priority Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID936  ,Interrupt ID936   Priority/Priority Byte Offset 936 "
group.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hexmask.long.byte 0x00 24.--31. 1. " INTID943  ,Interrupt ID943  Priority/Priority Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID942  ,Interrupt ID942   Priority/Priority Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID941  ,Interrupt ID941  Priority/Priority Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID940  ,Interrupt ID940   Priority/Priority Byte Offset 940 "
group.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hexmask.long.byte 0x00 24.--31. 1. " INTID947  ,Interrupt ID947  Priority/Priority Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID946  ,Interrupt ID946   Priority/Priority Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID945  ,Interrupt ID945  Priority/Priority Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID944  ,Interrupt ID944   Priority/Priority Byte Offset 944 "
group.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hexmask.long.byte 0x00 24.--31. 1. " INTID951  ,Interrupt ID951  Priority/Priority Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID950  ,Interrupt ID950   Priority/Priority Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID949  ,Interrupt ID949  Priority/Priority Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID948  ,Interrupt ID948   Priority/Priority Byte Offset 948 "
group.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hexmask.long.byte 0x00 24.--31. 1. " INTID955  ,Interrupt ID955  Priority/Priority Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID954  ,Interrupt ID954   Priority/Priority Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID953  ,Interrupt ID953  Priority/Priority Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID952  ,Interrupt ID952   Priority/Priority Byte Offset 952 "
group.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
hexmask.long.byte 0x00 24.--31. 1. " INTID959  ,Interrupt ID959  Priority/Priority Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID958  ,Interrupt ID958   Priority/Priority Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID957  ,Interrupt ID957  Priority/Priority Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID956  ,Interrupt ID956   Priority/Priority Byte Offset 956 "
else
hgroup.long 0x7A0++0x03
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hgroup.long 0x7A4++0x03
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hgroup.long 0x7A8++0x03
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hgroup.long 0x7AC++0x03
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hgroup.long 0x7B0++0x03
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hgroup.long 0x7B4++0x03
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hgroup.long 0x7B8++0x03
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hgroup.long 0x7BC++0x03
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hexmask.long.byte 0x00 24.--31. 1. " INTID963  ,Interrupt ID963  Priority/Priority Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID962  ,Interrupt ID962   Priority/Priority Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID961  ,Interrupt ID961  Priority/Priority Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID960  ,Interrupt ID960   Priority/Priority Byte Offset 960 "
group.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hexmask.long.byte 0x00 24.--31. 1. " INTID967  ,Interrupt ID967  Priority/Priority Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID966  ,Interrupt ID966   Priority/Priority Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID965  ,Interrupt ID965  Priority/Priority Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID964  ,Interrupt ID964   Priority/Priority Byte Offset 964 "
group.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hexmask.long.byte 0x00 24.--31. 1. " INTID971  ,Interrupt ID971  Priority/Priority Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID970  ,Interrupt ID970   Priority/Priority Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID969  ,Interrupt ID969  Priority/Priority Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID968  ,Interrupt ID968   Priority/Priority Byte Offset 968 "
group.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hexmask.long.byte 0x00 24.--31. 1. " INTID975  ,Interrupt ID975  Priority/Priority Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID974  ,Interrupt ID974   Priority/Priority Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID973  ,Interrupt ID973  Priority/Priority Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID972  ,Interrupt ID972   Priority/Priority Byte Offset 972 "
group.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hexmask.long.byte 0x00 24.--31. 1. " INTID979  ,Interrupt ID979  Priority/Priority Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID978  ,Interrupt ID978   Priority/Priority Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID977  ,Interrupt ID977  Priority/Priority Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID976  ,Interrupt ID976   Priority/Priority Byte Offset 976 "
group.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hexmask.long.byte 0x00 24.--31. 1. " INTID983  ,Interrupt ID983  Priority/Priority Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID982  ,Interrupt ID982   Priority/Priority Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID981  ,Interrupt ID981  Priority/Priority Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID980  ,Interrupt ID980   Priority/Priority Byte Offset 980 "
group.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hexmask.long.byte 0x00 24.--31. 1. " INTID987  ,Interrupt ID987  Priority/Priority Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID986  ,Interrupt ID986   Priority/Priority Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID985  ,Interrupt ID985  Priority/Priority Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID984  ,Interrupt ID984   Priority/Priority Byte Offset 984 "
group.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
hexmask.long.byte 0x00 24.--31. 1. " INTID991  ,Interrupt ID991  Priority/Priority Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID990  ,Interrupt ID990   Priority/Priority Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID989  ,Interrupt ID989  Priority/Priority Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID988  ,Interrupt ID988   Priority/Priority Byte Offset 988 "
else
hgroup.long 0x7C0++0x03
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hgroup.long 0x7C4++0x03
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hgroup.long 0x7C8++0x03
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hgroup.long 0x7CC++0x03
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hgroup.long 0x7D0++0x03
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hgroup.long 0x7D4++0x03
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hgroup.long 0x7D8++0x03
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hgroup.long 0x7DC++0x03
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
endif
tree.end
width 19.
tree "Interrupt Targets Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x000000E0)>0x1)
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35   ,CPU Targets Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO34   ,CPU Targets Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO33   ,CPU Targets Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO32   ,CPU Targets Byte Offset 32  "
group.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39   ,CPU Targets Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO38   ,CPU Targets Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO37   ,CPU Targets Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO36   ,CPU Targets Byte Offset 36  "
group.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43   ,CPU Targets Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO42   ,CPU Targets Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO41   ,CPU Targets Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO40   ,CPU Targets Byte Offset 40  "
group.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47   ,CPU Targets Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO46   ,CPU Targets Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO45   ,CPU Targets Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO44   ,CPU Targets Byte Offset 44  "
group.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51   ,CPU Targets Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO50   ,CPU Targets Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO49   ,CPU Targets Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO48   ,CPU Targets Byte Offset 48  "
group.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55   ,CPU Targets Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO54   ,CPU Targets Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO53   ,CPU Targets Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO52   ,CPU Targets Byte Offset 52  "
group.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59   ,CPU Targets Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO58   ,CPU Targets Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO57   ,CPU Targets Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO56   ,CPU Targets Byte Offset 56  "
group.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63   ,CPU Targets Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO62   ,CPU Targets Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO61   ,CPU Targets Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO60   ,CPU Targets Byte Offset 60  "
else
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67   ,CPU Targets Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO66   ,CPU Targets Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO65   ,CPU Targets Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO64   ,CPU Targets Byte Offset 64  "
group.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71   ,CPU Targets Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO70   ,CPU Targets Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO69   ,CPU Targets Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO68   ,CPU Targets Byte Offset 68  "
group.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75   ,CPU Targets Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO74   ,CPU Targets Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO73   ,CPU Targets Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO72   ,CPU Targets Byte Offset 72  "
group.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79   ,CPU Targets Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO78   ,CPU Targets Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO77   ,CPU Targets Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO76   ,CPU Targets Byte Offset 76  "
group.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83   ,CPU Targets Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO82   ,CPU Targets Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO81   ,CPU Targets Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO80   ,CPU Targets Byte Offset 80  "
group.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87   ,CPU Targets Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO86   ,CPU Targets Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO85   ,CPU Targets Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO84   ,CPU Targets Byte Offset 84  "
group.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91   ,CPU Targets Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO90   ,CPU Targets Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO89   ,CPU Targets Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO88   ,CPU Targets Byte Offset 88  "
group.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95   ,CPU Targets Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO94   ,CPU Targets Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO93   ,CPU Targets Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO92   ,CPU Targets Byte Offset 92  "
else
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99   ,CPU Targets Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO98   ,CPU Targets Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO97   ,CPU Targets Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO96   ,CPU Targets Byte Offset 96  "
group.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103  ,CPU Targets Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO102  ,CPU Targets Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO101  ,CPU Targets Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO100  ,CPU Targets Byte Offset 100 "
group.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107  ,CPU Targets Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO106  ,CPU Targets Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO105  ,CPU Targets Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO104  ,CPU Targets Byte Offset 104 "
group.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111  ,CPU Targets Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO110  ,CPU Targets Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO109  ,CPU Targets Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO108  ,CPU Targets Byte Offset 108 "
group.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115  ,CPU Targets Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO114  ,CPU Targets Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO113  ,CPU Targets Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO112  ,CPU Targets Byte Offset 112 "
group.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119  ,CPU Targets Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO118  ,CPU Targets Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO117  ,CPU Targets Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO116  ,CPU Targets Byte Offset 116 "
group.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123  ,CPU Targets Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO122  ,CPU Targets Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO121  ,CPU Targets Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO120  ,CPU Targets Byte Offset 120 "
group.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127  ,CPU Targets Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO126  ,CPU Targets Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO125  ,CPU Targets Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO124  ,CPU Targets Byte Offset 124 "
else
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131  ,CPU Targets Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO130  ,CPU Targets Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO129  ,CPU Targets Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO128  ,CPU Targets Byte Offset 128 "
group.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135  ,CPU Targets Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO134  ,CPU Targets Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO133  ,CPU Targets Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO132  ,CPU Targets Byte Offset 132 "
group.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139  ,CPU Targets Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO138  ,CPU Targets Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO137  ,CPU Targets Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO136  ,CPU Targets Byte Offset 136 "
group.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143  ,CPU Targets Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO142  ,CPU Targets Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO141  ,CPU Targets Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO140  ,CPU Targets Byte Offset 140 "
group.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147  ,CPU Targets Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO146  ,CPU Targets Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO145  ,CPU Targets Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO144  ,CPU Targets Byte Offset 144 "
group.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151  ,CPU Targets Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO150  ,CPU Targets Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO149  ,CPU Targets Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO148  ,CPU Targets Byte Offset 148 "
group.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155  ,CPU Targets Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO154  ,CPU Targets Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO153  ,CPU Targets Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO152  ,CPU Targets Byte Offset 152 "
group.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159  ,CPU Targets Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO158  ,CPU Targets Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO157  ,CPU Targets Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO156  ,CPU Targets Byte Offset 156 "
else
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163  ,CPU Targets Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO162  ,CPU Targets Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO161  ,CPU Targets Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO160  ,CPU Targets Byte Offset 160 "
group.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167  ,CPU Targets Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO166  ,CPU Targets Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO165  ,CPU Targets Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO164  ,CPU Targets Byte Offset 164 "
group.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171  ,CPU Targets Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO170  ,CPU Targets Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO169  ,CPU Targets Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO168  ,CPU Targets Byte Offset 168 "
group.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175  ,CPU Targets Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO174  ,CPU Targets Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO173  ,CPU Targets Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO172  ,CPU Targets Byte Offset 172 "
group.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179  ,CPU Targets Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO178  ,CPU Targets Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO177  ,CPU Targets Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO176  ,CPU Targets Byte Offset 176 "
group.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183  ,CPU Targets Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO182  ,CPU Targets Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO181  ,CPU Targets Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO180  ,CPU Targets Byte Offset 180 "
group.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187  ,CPU Targets Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO186  ,CPU Targets Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO185  ,CPU Targets Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO184  ,CPU Targets Byte Offset 184 "
group.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191  ,CPU Targets Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO190  ,CPU Targets Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO189  ,CPU Targets Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO188  ,CPU Targets Byte Offset 188 "
else
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195  ,CPU Targets Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO194  ,CPU Targets Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO193  ,CPU Targets Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO192  ,CPU Targets Byte Offset 192 "
group.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199  ,CPU Targets Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO198  ,CPU Targets Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO197  ,CPU Targets Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO196  ,CPU Targets Byte Offset 196 "
group.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203  ,CPU Targets Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO202  ,CPU Targets Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO201  ,CPU Targets Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO200  ,CPU Targets Byte Offset 200 "
group.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207  ,CPU Targets Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO206  ,CPU Targets Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO205  ,CPU Targets Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO204  ,CPU Targets Byte Offset 204 "
group.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211  ,CPU Targets Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO210  ,CPU Targets Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO209  ,CPU Targets Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO208  ,CPU Targets Byte Offset 208 "
group.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215  ,CPU Targets Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO214  ,CPU Targets Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO213  ,CPU Targets Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO212  ,CPU Targets Byte Offset 212 "
group.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219  ,CPU Targets Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO218  ,CPU Targets Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO217  ,CPU Targets Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO216  ,CPU Targets Byte Offset 216 "
group.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223  ,CPU Targets Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO222  ,CPU Targets Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO221  ,CPU Targets Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO220  ,CPU Targets Byte Offset 220 "
else
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227  ,CPU Targets Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO226  ,CPU Targets Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO225  ,CPU Targets Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO224  ,CPU Targets Byte Offset 224 "
group.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231  ,CPU Targets Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO230  ,CPU Targets Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO229  ,CPU Targets Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO228  ,CPU Targets Byte Offset 228 "
group.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235  ,CPU Targets Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO234  ,CPU Targets Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO233  ,CPU Targets Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO232  ,CPU Targets Byte Offset 232 "
group.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239  ,CPU Targets Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO238  ,CPU Targets Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO237  ,CPU Targets Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO236  ,CPU Targets Byte Offset 236 "
group.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243  ,CPU Targets Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO242  ,CPU Targets Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO241  ,CPU Targets Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO240  ,CPU Targets Byte Offset 240 "
group.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247  ,CPU Targets Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO246  ,CPU Targets Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO245  ,CPU Targets Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO244  ,CPU Targets Byte Offset 244 "
group.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251  ,CPU Targets Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO250  ,CPU Targets Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO249  ,CPU Targets Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO248  ,CPU Targets Byte Offset 248 "
group.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255  ,CPU Targets Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO254  ,CPU Targets Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO253  ,CPU Targets Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO252  ,CPU Targets Byte Offset 252 "
else
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259  ,CPU Targets Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO258  ,CPU Targets Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO257  ,CPU Targets Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO256  ,CPU Targets Byte Offset 256 "
group.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263  ,CPU Targets Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO262  ,CPU Targets Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO261  ,CPU Targets Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO260  ,CPU Targets Byte Offset 260 "
group.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267  ,CPU Targets Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO266  ,CPU Targets Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO265  ,CPU Targets Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO264  ,CPU Targets Byte Offset 264 "
group.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271  ,CPU Targets Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO270  ,CPU Targets Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO269  ,CPU Targets Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO268  ,CPU Targets Byte Offset 268 "
group.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275  ,CPU Targets Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO274  ,CPU Targets Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO273  ,CPU Targets Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO272  ,CPU Targets Byte Offset 272 "
group.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279  ,CPU Targets Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO278  ,CPU Targets Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO277  ,CPU Targets Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO276  ,CPU Targets Byte Offset 276 "
group.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283  ,CPU Targets Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO282  ,CPU Targets Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO281  ,CPU Targets Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO280  ,CPU Targets Byte Offset 280 "
group.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287  ,CPU Targets Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO286  ,CPU Targets Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO285  ,CPU Targets Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO284  ,CPU Targets Byte Offset 284 "
else
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291  ,CPU Targets Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO290  ,CPU Targets Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO289  ,CPU Targets Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO288  ,CPU Targets Byte Offset 288 "
group.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295  ,CPU Targets Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO294  ,CPU Targets Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO293  ,CPU Targets Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO292  ,CPU Targets Byte Offset 292 "
group.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299  ,CPU Targets Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO298  ,CPU Targets Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO297  ,CPU Targets Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO296  ,CPU Targets Byte Offset 296 "
group.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303  ,CPU Targets Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO302  ,CPU Targets Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO301  ,CPU Targets Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO300  ,CPU Targets Byte Offset 300 "
group.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307  ,CPU Targets Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO306  ,CPU Targets Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO305  ,CPU Targets Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO304  ,CPU Targets Byte Offset 304 "
group.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311  ,CPU Targets Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO310  ,CPU Targets Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO309  ,CPU Targets Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO308  ,CPU Targets Byte Offset 308 "
group.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315  ,CPU Targets Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO314  ,CPU Targets Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO313  ,CPU Targets Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO312  ,CPU Targets Byte Offset 312 "
group.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319  ,CPU Targets Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO318  ,CPU Targets Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO317  ,CPU Targets Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO316  ,CPU Targets Byte Offset 316 "
else
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323  ,CPU Targets Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO322  ,CPU Targets Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO321  ,CPU Targets Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO320  ,CPU Targets Byte Offset 320 "
group.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327  ,CPU Targets Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO326  ,CPU Targets Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO325  ,CPU Targets Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO324  ,CPU Targets Byte Offset 324 "
group.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331  ,CPU Targets Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO330  ,CPU Targets Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO329  ,CPU Targets Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO328  ,CPU Targets Byte Offset 328 "
group.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335  ,CPU Targets Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO334  ,CPU Targets Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO333  ,CPU Targets Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO332  ,CPU Targets Byte Offset 332 "
group.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339  ,CPU Targets Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO338  ,CPU Targets Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO337  ,CPU Targets Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO336  ,CPU Targets Byte Offset 336 "
group.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343  ,CPU Targets Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO342  ,CPU Targets Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO341  ,CPU Targets Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO340  ,CPU Targets Byte Offset 340 "
group.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347  ,CPU Targets Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO346  ,CPU Targets Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO345  ,CPU Targets Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO344  ,CPU Targets Byte Offset 344 "
group.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351  ,CPU Targets Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO350  ,CPU Targets Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO349  ,CPU Targets Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO348  ,CPU Targets Byte Offset 348 "
else
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355  ,CPU Targets Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO354  ,CPU Targets Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO353  ,CPU Targets Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO352  ,CPU Targets Byte Offset 352 "
group.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359  ,CPU Targets Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO358  ,CPU Targets Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO357  ,CPU Targets Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO356  ,CPU Targets Byte Offset 356 "
group.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363  ,CPU Targets Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO362  ,CPU Targets Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO361  ,CPU Targets Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO360  ,CPU Targets Byte Offset 360 "
group.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367  ,CPU Targets Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO366  ,CPU Targets Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO365  ,CPU Targets Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO364  ,CPU Targets Byte Offset 364 "
group.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371  ,CPU Targets Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO370  ,CPU Targets Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO369  ,CPU Targets Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO368  ,CPU Targets Byte Offset 368 "
group.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375  ,CPU Targets Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO374  ,CPU Targets Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO373  ,CPU Targets Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO372  ,CPU Targets Byte Offset 372 "
group.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379  ,CPU Targets Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO378  ,CPU Targets Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO377  ,CPU Targets Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO376  ,CPU Targets Byte Offset 376 "
group.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383  ,CPU Targets Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO382  ,CPU Targets Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO381  ,CPU Targets Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO380  ,CPU Targets Byte Offset 380 "
else
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387  ,CPU Targets Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO386  ,CPU Targets Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO385  ,CPU Targets Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO384  ,CPU Targets Byte Offset 384 "
group.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391  ,CPU Targets Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO390  ,CPU Targets Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO389  ,CPU Targets Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO388  ,CPU Targets Byte Offset 388 "
group.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395  ,CPU Targets Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO394  ,CPU Targets Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO393  ,CPU Targets Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO392  ,CPU Targets Byte Offset 392 "
group.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399  ,CPU Targets Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO398  ,CPU Targets Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO397  ,CPU Targets Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO396  ,CPU Targets Byte Offset 396 "
group.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403  ,CPU Targets Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO402  ,CPU Targets Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO401  ,CPU Targets Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO400  ,CPU Targets Byte Offset 400 "
group.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407  ,CPU Targets Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO406  ,CPU Targets Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO405  ,CPU Targets Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO404  ,CPU Targets Byte Offset 404 "
group.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411  ,CPU Targets Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO410  ,CPU Targets Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO409  ,CPU Targets Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO408  ,CPU Targets Byte Offset 408 "
group.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415  ,CPU Targets Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO414  ,CPU Targets Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO413  ,CPU Targets Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO412  ,CPU Targets Byte Offset 412 "
else
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419  ,CPU Targets Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO418  ,CPU Targets Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO417  ,CPU Targets Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO416  ,CPU Targets Byte Offset 416 "
group.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423  ,CPU Targets Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO422  ,CPU Targets Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO421  ,CPU Targets Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO420  ,CPU Targets Byte Offset 420 "
group.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427  ,CPU Targets Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO426  ,CPU Targets Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO425  ,CPU Targets Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO424  ,CPU Targets Byte Offset 424 "
group.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431  ,CPU Targets Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO430  ,CPU Targets Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO429  ,CPU Targets Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO428  ,CPU Targets Byte Offset 428 "
group.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435  ,CPU Targets Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO434  ,CPU Targets Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO433  ,CPU Targets Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO432  ,CPU Targets Byte Offset 432 "
group.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439  ,CPU Targets Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO438  ,CPU Targets Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO437  ,CPU Targets Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO436  ,CPU Targets Byte Offset 436 "
group.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443  ,CPU Targets Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO442  ,CPU Targets Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO441  ,CPU Targets Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO440  ,CPU Targets Byte Offset 440 "
group.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447  ,CPU Targets Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO446  ,CPU Targets Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO445  ,CPU Targets Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO444  ,CPU Targets Byte Offset 444 "
else
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451  ,CPU Targets Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO450  ,CPU Targets Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO449  ,CPU Targets Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO448  ,CPU Targets Byte Offset 448 "
group.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455  ,CPU Targets Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO454  ,CPU Targets Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO453  ,CPU Targets Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO452  ,CPU Targets Byte Offset 452 "
group.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459  ,CPU Targets Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO458  ,CPU Targets Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO457  ,CPU Targets Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO456  ,CPU Targets Byte Offset 456 "
group.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463  ,CPU Targets Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO462  ,CPU Targets Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO461  ,CPU Targets Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO460  ,CPU Targets Byte Offset 460 "
group.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467  ,CPU Targets Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO466  ,CPU Targets Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO465  ,CPU Targets Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO464  ,CPU Targets Byte Offset 464 "
group.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471  ,CPU Targets Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO470  ,CPU Targets Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO469  ,CPU Targets Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO468  ,CPU Targets Byte Offset 468 "
group.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475  ,CPU Targets Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO474  ,CPU Targets Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO473  ,CPU Targets Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO472  ,CPU Targets Byte Offset 472 "
group.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479  ,CPU Targets Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO478  ,CPU Targets Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO477  ,CPU Targets Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO476  ,CPU Targets Byte Offset 476 "
else
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483  ,CPU Targets Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO482  ,CPU Targets Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO481  ,CPU Targets Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO480  ,CPU Targets Byte Offset 480 "
group.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487  ,CPU Targets Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO486  ,CPU Targets Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO485  ,CPU Targets Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO484  ,CPU Targets Byte Offset 484 "
group.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491  ,CPU Targets Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO490  ,CPU Targets Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO489  ,CPU Targets Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO488  ,CPU Targets Byte Offset 488 "
group.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495  ,CPU Targets Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO494  ,CPU Targets Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO493  ,CPU Targets Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO492  ,CPU Targets Byte Offset 492 "
group.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499  ,CPU Targets Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO498  ,CPU Targets Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO497  ,CPU Targets Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO496  ,CPU Targets Byte Offset 496 "
group.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503  ,CPU Targets Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO502  ,CPU Targets Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO501  ,CPU Targets Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO500  ,CPU Targets Byte Offset 500 "
group.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507  ,CPU Targets Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO506  ,CPU Targets Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO505  ,CPU Targets Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO504  ,CPU Targets Byte Offset 504 "
group.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511  ,CPU Targets Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO510  ,CPU Targets Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO509  ,CPU Targets Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO508  ,CPU Targets Byte Offset 508 "
else
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515  ,CPU Targets Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO514  ,CPU Targets Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO513  ,CPU Targets Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO512  ,CPU Targets Byte Offset 512 "
group.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519  ,CPU Targets Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO518  ,CPU Targets Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO517  ,CPU Targets Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO516  ,CPU Targets Byte Offset 516 "
group.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523  ,CPU Targets Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO522  ,CPU Targets Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO521  ,CPU Targets Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO520  ,CPU Targets Byte Offset 520 "
group.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527  ,CPU Targets Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO526  ,CPU Targets Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO525  ,CPU Targets Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO524  ,CPU Targets Byte Offset 524 "
group.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531  ,CPU Targets Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO530  ,CPU Targets Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO529  ,CPU Targets Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO528  ,CPU Targets Byte Offset 528 "
group.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535  ,CPU Targets Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO534  ,CPU Targets Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO533  ,CPU Targets Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO532  ,CPU Targets Byte Offset 532 "
group.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539  ,CPU Targets Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO538  ,CPU Targets Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO537  ,CPU Targets Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO536  ,CPU Targets Byte Offset 536 "
group.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543  ,CPU Targets Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO542  ,CPU Targets Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO541  ,CPU Targets Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO540  ,CPU Targets Byte Offset 540 "
else
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547  ,CPU Targets Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO546  ,CPU Targets Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO545  ,CPU Targets Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO544  ,CPU Targets Byte Offset 544 "
group.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551  ,CPU Targets Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO550  ,CPU Targets Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO549  ,CPU Targets Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO548  ,CPU Targets Byte Offset 548 "
group.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555  ,CPU Targets Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO554  ,CPU Targets Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO553  ,CPU Targets Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO552  ,CPU Targets Byte Offset 552 "
group.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559  ,CPU Targets Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO558  ,CPU Targets Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO557  ,CPU Targets Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO556  ,CPU Targets Byte Offset 556 "
group.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563  ,CPU Targets Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO562  ,CPU Targets Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO561  ,CPU Targets Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO560  ,CPU Targets Byte Offset 560 "
group.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567  ,CPU Targets Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO566  ,CPU Targets Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO565  ,CPU Targets Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO564  ,CPU Targets Byte Offset 564 "
group.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571  ,CPU Targets Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO570  ,CPU Targets Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO569  ,CPU Targets Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO568  ,CPU Targets Byte Offset 568 "
group.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575  ,CPU Targets Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO574  ,CPU Targets Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO573  ,CPU Targets Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO572  ,CPU Targets Byte Offset 572 "
else
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579  ,CPU Targets Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO578  ,CPU Targets Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO577  ,CPU Targets Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO576  ,CPU Targets Byte Offset 576 "
group.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583  ,CPU Targets Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO582  ,CPU Targets Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO581  ,CPU Targets Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO580  ,CPU Targets Byte Offset 580 "
group.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587  ,CPU Targets Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO586  ,CPU Targets Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO585  ,CPU Targets Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO584  ,CPU Targets Byte Offset 584 "
group.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591  ,CPU Targets Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO590  ,CPU Targets Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO589  ,CPU Targets Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO588  ,CPU Targets Byte Offset 588 "
group.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595  ,CPU Targets Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO594  ,CPU Targets Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO593  ,CPU Targets Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO592  ,CPU Targets Byte Offset 592 "
group.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599  ,CPU Targets Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO598  ,CPU Targets Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO597  ,CPU Targets Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO596  ,CPU Targets Byte Offset 596 "
group.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603  ,CPU Targets Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO602  ,CPU Targets Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO601  ,CPU Targets Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO600  ,CPU Targets Byte Offset 600 "
group.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607  ,CPU Targets Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO606  ,CPU Targets Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO605  ,CPU Targets Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO604  ,CPU Targets Byte Offset 604 "
else
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611  ,CPU Targets Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO610  ,CPU Targets Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO609  ,CPU Targets Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO608  ,CPU Targets Byte Offset 608 "
group.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615  ,CPU Targets Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO614  ,CPU Targets Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO613  ,CPU Targets Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO612  ,CPU Targets Byte Offset 612 "
group.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619  ,CPU Targets Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO618  ,CPU Targets Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO617  ,CPU Targets Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO616  ,CPU Targets Byte Offset 616 "
group.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623  ,CPU Targets Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO622  ,CPU Targets Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO621  ,CPU Targets Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO620  ,CPU Targets Byte Offset 620 "
group.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627  ,CPU Targets Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO626  ,CPU Targets Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO625  ,CPU Targets Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO624  ,CPU Targets Byte Offset 624 "
group.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631  ,CPU Targets Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO630  ,CPU Targets Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO629  ,CPU Targets Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO628  ,CPU Targets Byte Offset 628 "
group.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635  ,CPU Targets Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO634  ,CPU Targets Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO633  ,CPU Targets Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO632  ,CPU Targets Byte Offset 632 "
group.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639  ,CPU Targets Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO638  ,CPU Targets Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO637  ,CPU Targets Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO636  ,CPU Targets Byte Offset 636 "
else
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643  ,CPU Targets Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO642  ,CPU Targets Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO641  ,CPU Targets Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO640  ,CPU Targets Byte Offset 640 "
group.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647  ,CPU Targets Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO646  ,CPU Targets Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO645  ,CPU Targets Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO644  ,CPU Targets Byte Offset 644 "
group.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651  ,CPU Targets Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO650  ,CPU Targets Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO649  ,CPU Targets Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO648  ,CPU Targets Byte Offset 648 "
group.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655  ,CPU Targets Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO654  ,CPU Targets Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO653  ,CPU Targets Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO652  ,CPU Targets Byte Offset 652 "
group.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659  ,CPU Targets Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO658  ,CPU Targets Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO657  ,CPU Targets Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO656  ,CPU Targets Byte Offset 656 "
group.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663  ,CPU Targets Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO662  ,CPU Targets Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO661  ,CPU Targets Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO660  ,CPU Targets Byte Offset 660 "
group.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667  ,CPU Targets Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO666  ,CPU Targets Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO665  ,CPU Targets Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO664  ,CPU Targets Byte Offset 664 "
group.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671  ,CPU Targets Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO670  ,CPU Targets Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO669  ,CPU Targets Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO668  ,CPU Targets Byte Offset 668 "
else
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675  ,CPU Targets Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO674  ,CPU Targets Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO673  ,CPU Targets Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO672  ,CPU Targets Byte Offset 672 "
group.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679  ,CPU Targets Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO678  ,CPU Targets Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO677  ,CPU Targets Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO676  ,CPU Targets Byte Offset 676 "
group.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683  ,CPU Targets Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO682  ,CPU Targets Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO681  ,CPU Targets Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO680  ,CPU Targets Byte Offset 680 "
group.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687  ,CPU Targets Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO686  ,CPU Targets Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO685  ,CPU Targets Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO684  ,CPU Targets Byte Offset 684 "
group.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691  ,CPU Targets Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO690  ,CPU Targets Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO689  ,CPU Targets Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO688  ,CPU Targets Byte Offset 688 "
group.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695  ,CPU Targets Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO694  ,CPU Targets Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO693  ,CPU Targets Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO692  ,CPU Targets Byte Offset 692 "
group.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699  ,CPU Targets Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO698  ,CPU Targets Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO697  ,CPU Targets Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO696  ,CPU Targets Byte Offset 696 "
group.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703  ,CPU Targets Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO702  ,CPU Targets Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO701  ,CPU Targets Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO700  ,CPU Targets Byte Offset 700 "
else
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707  ,CPU Targets Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO706  ,CPU Targets Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO705  ,CPU Targets Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO704  ,CPU Targets Byte Offset 704 "
group.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711  ,CPU Targets Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO710  ,CPU Targets Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO709  ,CPU Targets Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO708  ,CPU Targets Byte Offset 708 "
group.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715  ,CPU Targets Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO714  ,CPU Targets Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO713  ,CPU Targets Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO712  ,CPU Targets Byte Offset 712 "
group.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719  ,CPU Targets Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO718  ,CPU Targets Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO717  ,CPU Targets Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO716  ,CPU Targets Byte Offset 716 "
group.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723  ,CPU Targets Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO722  ,CPU Targets Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO721  ,CPU Targets Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO720  ,CPU Targets Byte Offset 720 "
group.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727  ,CPU Targets Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO726  ,CPU Targets Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO725  ,CPU Targets Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO724  ,CPU Targets Byte Offset 724 "
group.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731  ,CPU Targets Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO730  ,CPU Targets Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO729  ,CPU Targets Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO728  ,CPU Targets Byte Offset 728 "
group.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735  ,CPU Targets Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO734  ,CPU Targets Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO733  ,CPU Targets Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO732  ,CPU Targets Byte Offset 732 "
else
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739  ,CPU Targets Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO738  ,CPU Targets Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO737  ,CPU Targets Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO736  ,CPU Targets Byte Offset 736 "
group.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743  ,CPU Targets Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO742  ,CPU Targets Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO741  ,CPU Targets Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO740  ,CPU Targets Byte Offset 740 "
group.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747  ,CPU Targets Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO746  ,CPU Targets Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO745  ,CPU Targets Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO744  ,CPU Targets Byte Offset 744 "
group.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751  ,CPU Targets Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO750  ,CPU Targets Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO749  ,CPU Targets Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO748  ,CPU Targets Byte Offset 748 "
group.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755  ,CPU Targets Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO754  ,CPU Targets Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO753  ,CPU Targets Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO752  ,CPU Targets Byte Offset 752 "
group.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759  ,CPU Targets Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO758  ,CPU Targets Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO757  ,CPU Targets Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO756  ,CPU Targets Byte Offset 756 "
group.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763  ,CPU Targets Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO762  ,CPU Targets Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO761  ,CPU Targets Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO760  ,CPU Targets Byte Offset 760 "
group.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767  ,CPU Targets Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO766  ,CPU Targets Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO765  ,CPU Targets Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO764  ,CPU Targets Byte Offset 764 "
else
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771  ,CPU Targets Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO770  ,CPU Targets Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO769  ,CPU Targets Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO768  ,CPU Targets Byte Offset 768 "
group.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775  ,CPU Targets Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO774  ,CPU Targets Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO773  ,CPU Targets Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO772  ,CPU Targets Byte Offset 772 "
group.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779  ,CPU Targets Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO778  ,CPU Targets Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO777  ,CPU Targets Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO776  ,CPU Targets Byte Offset 776 "
group.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783  ,CPU Targets Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO782  ,CPU Targets Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO781  ,CPU Targets Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO780  ,CPU Targets Byte Offset 780 "
group.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787  ,CPU Targets Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO786  ,CPU Targets Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO785  ,CPU Targets Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO784  ,CPU Targets Byte Offset 784 "
group.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791  ,CPU Targets Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO790  ,CPU Targets Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO789  ,CPU Targets Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO788  ,CPU Targets Byte Offset 788 "
group.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795  ,CPU Targets Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO794  ,CPU Targets Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO793  ,CPU Targets Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO792  ,CPU Targets Byte Offset 792 "
group.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799  ,CPU Targets Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO798  ,CPU Targets Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO797  ,CPU Targets Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO796  ,CPU Targets Byte Offset 796 "
else
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803  ,CPU Targets Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO802  ,CPU Targets Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO801  ,CPU Targets Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO800  ,CPU Targets Byte Offset 800 "
group.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807  ,CPU Targets Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO806  ,CPU Targets Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO805  ,CPU Targets Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO804  ,CPU Targets Byte Offset 804 "
group.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811  ,CPU Targets Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO810  ,CPU Targets Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO809  ,CPU Targets Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO808  ,CPU Targets Byte Offset 808 "
group.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815  ,CPU Targets Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO814  ,CPU Targets Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO813  ,CPU Targets Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO812  ,CPU Targets Byte Offset 812 "
group.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819  ,CPU Targets Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO818  ,CPU Targets Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO817  ,CPU Targets Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO816  ,CPU Targets Byte Offset 816 "
group.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823  ,CPU Targets Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO822  ,CPU Targets Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO821  ,CPU Targets Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO820  ,CPU Targets Byte Offset 820 "
group.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827  ,CPU Targets Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO826  ,CPU Targets Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO825  ,CPU Targets Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO824  ,CPU Targets Byte Offset 824 "
group.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831  ,CPU Targets Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO830  ,CPU Targets Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO829  ,CPU Targets Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO828  ,CPU Targets Byte Offset 828 "
else
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835  ,CPU Targets Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO834  ,CPU Targets Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO833  ,CPU Targets Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO832  ,CPU Targets Byte Offset 832 "
group.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839  ,CPU Targets Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO838  ,CPU Targets Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO837  ,CPU Targets Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO836  ,CPU Targets Byte Offset 836 "
group.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843  ,CPU Targets Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO842  ,CPU Targets Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO841  ,CPU Targets Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO840  ,CPU Targets Byte Offset 840 "
group.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847  ,CPU Targets Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO846  ,CPU Targets Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO845  ,CPU Targets Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO844  ,CPU Targets Byte Offset 844 "
group.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851  ,CPU Targets Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO850  ,CPU Targets Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO849  ,CPU Targets Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO848  ,CPU Targets Byte Offset 848 "
group.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855  ,CPU Targets Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO854  ,CPU Targets Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO853  ,CPU Targets Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO852  ,CPU Targets Byte Offset 852 "
group.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859  ,CPU Targets Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO858  ,CPU Targets Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO857  ,CPU Targets Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO856  ,CPU Targets Byte Offset 856 "
group.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863  ,CPU Targets Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO862  ,CPU Targets Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO861  ,CPU Targets Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO860  ,CPU Targets Byte Offset 860 "
else
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867  ,CPU Targets Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO866  ,CPU Targets Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO865  ,CPU Targets Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO864  ,CPU Targets Byte Offset 864 "
group.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871  ,CPU Targets Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO870  ,CPU Targets Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO869  ,CPU Targets Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO868  ,CPU Targets Byte Offset 868 "
group.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875  ,CPU Targets Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO874  ,CPU Targets Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO873  ,CPU Targets Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO872  ,CPU Targets Byte Offset 872 "
group.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879  ,CPU Targets Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO878  ,CPU Targets Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO877  ,CPU Targets Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO876  ,CPU Targets Byte Offset 876 "
group.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883  ,CPU Targets Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO882  ,CPU Targets Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO881  ,CPU Targets Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO880  ,CPU Targets Byte Offset 880 "
group.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887  ,CPU Targets Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO886  ,CPU Targets Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO885  ,CPU Targets Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO884  ,CPU Targets Byte Offset 884 "
group.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891  ,CPU Targets Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO890  ,CPU Targets Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO889  ,CPU Targets Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO888  ,CPU Targets Byte Offset 888 "
group.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895  ,CPU Targets Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO894  ,CPU Targets Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO893  ,CPU Targets Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO892  ,CPU Targets Byte Offset 892 "
else
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899  ,CPU Targets Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO898  ,CPU Targets Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO897  ,CPU Targets Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO896  ,CPU Targets Byte Offset 896 "
group.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903  ,CPU Targets Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO902  ,CPU Targets Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO901  ,CPU Targets Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO900  ,CPU Targets Byte Offset 900 "
group.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907  ,CPU Targets Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO906  ,CPU Targets Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO905  ,CPU Targets Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO904  ,CPU Targets Byte Offset 904 "
group.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911  ,CPU Targets Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO910  ,CPU Targets Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO909  ,CPU Targets Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO908  ,CPU Targets Byte Offset 908 "
group.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915  ,CPU Targets Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO914  ,CPU Targets Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO913  ,CPU Targets Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO912  ,CPU Targets Byte Offset 912 "
group.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919  ,CPU Targets Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO918  ,CPU Targets Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO917  ,CPU Targets Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO916  ,CPU Targets Byte Offset 916 "
group.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923  ,CPU Targets Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO922  ,CPU Targets Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO921  ,CPU Targets Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO920  ,CPU Targets Byte Offset 920 "
group.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927  ,CPU Targets Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO926  ,CPU Targets Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO925  ,CPU Targets Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO924  ,CPU Targets Byte Offset 924 "
else
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931  ,CPU Targets Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO930  ,CPU Targets Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO929  ,CPU Targets Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO928  ,CPU Targets Byte Offset 928 "
group.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935  ,CPU Targets Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO934  ,CPU Targets Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO933  ,CPU Targets Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO932  ,CPU Targets Byte Offset 932 "
group.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939  ,CPU Targets Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO938  ,CPU Targets Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO937  ,CPU Targets Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO936  ,CPU Targets Byte Offset 936 "
group.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943  ,CPU Targets Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO942  ,CPU Targets Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO941  ,CPU Targets Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO940  ,CPU Targets Byte Offset 940 "
group.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947  ,CPU Targets Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO946  ,CPU Targets Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO945  ,CPU Targets Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO944  ,CPU Targets Byte Offset 944 "
group.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951  ,CPU Targets Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO950  ,CPU Targets Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO949  ,CPU Targets Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO948  ,CPU Targets Byte Offset 948 "
group.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955  ,CPU Targets Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO954  ,CPU Targets Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO953  ,CPU Targets Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO952  ,CPU Targets Byte Offset 952 "
group.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959  ,CPU Targets Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO958  ,CPU Targets Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO957  ,CPU Targets Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO956  ,CPU Targets Byte Offset 956 "
else
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963  ,CPU Targets Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO962  ,CPU Targets Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO961  ,CPU Targets Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO960  ,CPU Targets Byte Offset 960 "
group.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967  ,CPU Targets Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO966  ,CPU Targets Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO965  ,CPU Targets Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO964  ,CPU Targets Byte Offset 964 "
group.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971  ,CPU Targets Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO970  ,CPU Targets Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO969  ,CPU Targets Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO968  ,CPU Targets Byte Offset 968 "
group.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975  ,CPU Targets Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO974  ,CPU Targets Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO973  ,CPU Targets Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO972  ,CPU Targets Byte Offset 972 "
group.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979  ,CPU Targets Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO978  ,CPU Targets Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO977  ,CPU Targets Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO976  ,CPU Targets Byte Offset 976 "
group.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983  ,CPU Targets Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO982  ,CPU Targets Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO981  ,CPU Targets Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO980  ,CPU Targets Byte Offset 980 "
group.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987  ,CPU Targets Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO986  ,CPU Targets Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO985  ,CPU Targets Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO984  ,CPU Targets Byte Offset 984 "
group.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991  ,CPU Targets Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO990  ,CPU Targets Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO989  ,CPU Targets Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO988  ,CPU Targets Byte Offset 988 "
else
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
else
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0  ,Interrupt Processor Targets Register 0  "
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1  ,Interrupt Processor Targets Register 1  "
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2  ,Interrupt Processor Targets Register 2  "
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3  ,Interrupt Processor Targets Register 3  "
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4  ,Interrupt Processor Targets Register 4  "
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5  ,Interrupt Processor Targets Register 5  "
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6  ,Interrupt Processor Targets Register 6  "
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7  ,Interrupt Processor Targets Register 7  "
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8  ,Interrupt Processor Targets Register 8  "
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9  ,Interrupt Processor Targets Register 9  "
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
tree.end
width 14.
tree "Configuration Registers"
rgroup.long 0xC00++0x03
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SGI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SGI)" "Level,Edge"
group.long 0xC04++0x03
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (PPI)" "Level,Edge"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)
group.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC08++0x03
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
hgroup.long 0xC0C++0x03
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)
group.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC10++0x03
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
hgroup.long 0xC14++0x03
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)
group.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC18++0x03
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
hgroup.long 0xC1C++0x03
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)
group.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC20++0x03
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
hgroup.long 0xC24++0x03
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)
group.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC28++0x03
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
hgroup.long 0xC2C++0x03
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)
group.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC30++0x03
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
hgroup.long 0xC34++0x03
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)
group.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC38++0x03
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
hgroup.long 0xC3C++0x03
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)
group.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC40++0x03
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
hgroup.long 0xC44++0x03
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)
group.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC48++0x03
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
hgroup.long 0xC4C++0x03
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)
group.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC50++0x03
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
hgroup.long 0xC54++0x03
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)
group.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC58++0x03
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
hgroup.long 0xC5C++0x03
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)
group.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC60++0x03
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
hgroup.long 0xC64++0x03
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)
group.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC68++0x03
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
hgroup.long 0xC6C++0x03
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)
group.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC70++0x03
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
hgroup.long 0xC74++0x03
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)
group.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC78++0x03
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
hgroup.long 0xC7C++0x03
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC80++0x03
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
hgroup.long 0xC84++0x03
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC88++0x03
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
hgroup.long 0xC8C++0x03
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC90++0x03
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
hgroup.long 0xC94++0x03
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC98++0x03
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
hgroup.long 0xC9C++0x03
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA0++0x03
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
hgroup.long 0xCA4++0x03
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA8++0x03
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
hgroup.long 0xCAC++0x03
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB0++0x03
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
hgroup.long 0xCB4++0x03
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB8++0x03
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
hgroup.long 0xCBC++0x03
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC0++0x03
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
hgroup.long 0xCC4++0x03
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC8++0x03
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
hgroup.long 0xCCC++0x03
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD0++0x03
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
hgroup.long 0xCD4++0x03
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD8++0x03
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
hgroup.long 0xCDC++0x03
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE0++0x03
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
hgroup.long 0xCE4++0x03
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE8++0x03
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
hgroup.long 0xCEC++0x03
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCF0++0x03
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
hgroup.long 0xCF4++0x03
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
endif
tree.end
width 17.
tree "Interrupt Group Modifier Registers"
hgroup.long 0x0D00++0x03
hide.long 0x0 "GICD_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D00))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01))
group.long 0x0D04++0x03
line.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
bitfld.long 0x00 31. " GMB63  ,Group Modifier Bit 63" "0,1"
bitfld.long 0x00 30. "  GMB62  ,Group Modifier Bit 62" "0,1"
bitfld.long 0x00 29. "  GMB61  ,Group Modifier Bit 61" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB60  ,Group Modifier Bit 60" "0,1"
bitfld.long 0x00 27. "  GMB59  ,Group Modifier Bit 59" "0,1"
bitfld.long 0x00 26. "  GMB58  ,Group Modifier Bit 58" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB57  ,Group Modifier Bit 57" "0,1"
bitfld.long 0x00 24. "  GMB56  ,Group Modifier Bit 56" "0,1"
bitfld.long 0x00 23. "  GMB55  ,Group Modifier Bit 55" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB54  ,Group Modifier Bit 54" "0,1"
bitfld.long 0x00 21. "  GMB53  ,Group Modifier Bit 53" "0,1"
bitfld.long 0x00 20. "  GMB52  ,Group Modifier Bit 52" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB51  ,Group Modifier Bit 51" "0,1"
bitfld.long 0x00 18. "  GMB50  ,Group Modifier Bit 50" "0,1"
bitfld.long 0x00 17. "  GMB49  ,Group Modifier Bit 49" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB48  ,Group Modifier Bit 48" "0,1"
bitfld.long 0x00 15. "  GMB47  ,Group Modifier Bit 47" "0,1"
bitfld.long 0x00 14. "  GMB46  ,Group Modifier Bit 46" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB45  ,Group Modifier Bit 45" "0,1"
bitfld.long 0x00 12. "  GMB44  ,Group Modifier Bit 44" "0,1"
bitfld.long 0x00 11. "  GMB43  ,Group Modifier Bit 43" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB42  ,Group Modifier Bit 42" "0,1"
bitfld.long 0x00 9. "  GMB41  ,Group Modifier Bit 41" "0,1"
bitfld.long 0x00 8. "  GMB40  ,Group Modifier Bit 40" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB39  ,Group Modifier Bit 39" "0,1"
bitfld.long 0x00 6. "  GMB38  ,Group Modifier Bit 38" "0,1"
bitfld.long 0x00 5. "  GMB37  ,Group Modifier Bit 37" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB36  ,Group Modifier Bit 36" "0,1"
bitfld.long 0x00 3. "  GMB35  ,Group Modifier Bit 35" "0,1"
bitfld.long 0x00 2. "  GMB34  ,Group Modifier Bit 34" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB33  ,Group Modifier Bit 33" "0,1"
bitfld.long 0x00 0. "  GMB32  ,Group Modifier Bit 32" "0,1"
else
hgroup.long 0x0D04++0x03
hide.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D08))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02))
group.long 0x0D08++0x03
line.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
bitfld.long 0x00 31. " GMB95  ,Group Modifier Bit 95" "0,1"
bitfld.long 0x00 30. "  GMB94  ,Group Modifier Bit 94" "0,1"
bitfld.long 0x00 29. "  GMB93  ,Group Modifier Bit 93" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB92  ,Group Modifier Bit 92" "0,1"
bitfld.long 0x00 27. "  GMB91  ,Group Modifier Bit 91" "0,1"
bitfld.long 0x00 26. "  GMB90  ,Group Modifier Bit 90" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB89  ,Group Modifier Bit 89" "0,1"
bitfld.long 0x00 24. "  GMB88  ,Group Modifier Bit 88" "0,1"
bitfld.long 0x00 23. "  GMB87  ,Group Modifier Bit 87" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB86  ,Group Modifier Bit 86" "0,1"
bitfld.long 0x00 21. "  GMB85  ,Group Modifier Bit 85" "0,1"
bitfld.long 0x00 20. "  GMB84  ,Group Modifier Bit 84" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB83  ,Group Modifier Bit 83" "0,1"
bitfld.long 0x00 18. "  GMB82  ,Group Modifier Bit 82" "0,1"
bitfld.long 0x00 17. "  GMB81  ,Group Modifier Bit 81" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB80  ,Group Modifier Bit 80" "0,1"
bitfld.long 0x00 15. "  GMB79  ,Group Modifier Bit 79" "0,1"
bitfld.long 0x00 14. "  GMB78  ,Group Modifier Bit 78" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB77  ,Group Modifier Bit 77" "0,1"
bitfld.long 0x00 12. "  GMB76  ,Group Modifier Bit 76" "0,1"
bitfld.long 0x00 11. "  GMB75  ,Group Modifier Bit 75" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB74  ,Group Modifier Bit 74" "0,1"
bitfld.long 0x00 9. "  GMB73  ,Group Modifier Bit 73" "0,1"
bitfld.long 0x00 8. "  GMB72  ,Group Modifier Bit 72" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB71  ,Group Modifier Bit 71" "0,1"
bitfld.long 0x00 6. "  GMB70  ,Group Modifier Bit 70" "0,1"
bitfld.long 0x00 5. "  GMB69  ,Group Modifier Bit 69" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB68  ,Group Modifier Bit 68" "0,1"
bitfld.long 0x00 3. "  GMB67  ,Group Modifier Bit 67" "0,1"
bitfld.long 0x00 2. "  GMB66  ,Group Modifier Bit 66" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB65  ,Group Modifier Bit 65" "0,1"
bitfld.long 0x00 0. "  GMB64  ,Group Modifier Bit 64" "0,1"
else
hgroup.long 0x0D08++0x03
hide.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D0C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03))
group.long 0x0D0C++0x03
line.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
bitfld.long 0x00 31. " GMB127 ,Group Modifier Bit 127" "0,1"
bitfld.long 0x00 30. "  GMB126 ,Group Modifier Bit 126" "0,1"
bitfld.long 0x00 29. "  GMB125 ,Group Modifier Bit 125" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB124 ,Group Modifier Bit 124" "0,1"
bitfld.long 0x00 27. "  GMB123 ,Group Modifier Bit 123" "0,1"
bitfld.long 0x00 26. "  GMB122 ,Group Modifier Bit 122" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB121 ,Group Modifier Bit 121" "0,1"
bitfld.long 0x00 24. "  GMB120 ,Group Modifier Bit 120" "0,1"
bitfld.long 0x00 23. "  GMB119 ,Group Modifier Bit 119" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB118 ,Group Modifier Bit 118" "0,1"
bitfld.long 0x00 21. "  GMB117 ,Group Modifier Bit 117" "0,1"
bitfld.long 0x00 20. "  GMB116 ,Group Modifier Bit 116" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB115 ,Group Modifier Bit 115" "0,1"
bitfld.long 0x00 18. "  GMB114 ,Group Modifier Bit 114" "0,1"
bitfld.long 0x00 17. "  GMB113 ,Group Modifier Bit 113" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB112 ,Group Modifier Bit 112" "0,1"
bitfld.long 0x00 15. "  GMB111 ,Group Modifier Bit 111" "0,1"
bitfld.long 0x00 14. "  GMB110 ,Group Modifier Bit 110" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB109 ,Group Modifier Bit 109" "0,1"
bitfld.long 0x00 12. "  GMB108 ,Group Modifier Bit 108" "0,1"
bitfld.long 0x00 11. "  GMB107 ,Group Modifier Bit 107" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB106 ,Group Modifier Bit 106" "0,1"
bitfld.long 0x00 9. "  GMB105 ,Group Modifier Bit 105" "0,1"
bitfld.long 0x00 8. "  GMB104 ,Group Modifier Bit 104" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB103 ,Group Modifier Bit 103" "0,1"
bitfld.long 0x00 6. "  GMB102 ,Group Modifier Bit 102" "0,1"
bitfld.long 0x00 5. "  GMB101 ,Group Modifier Bit 101" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB100 ,Group Modifier Bit 100" "0,1"
bitfld.long 0x00 3. "  GMB99  ,Group Modifier Bit 99" "0,1"
bitfld.long 0x00 2. "  GMB98  ,Group Modifier Bit 98" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB97  ,Group Modifier Bit 97" "0,1"
bitfld.long 0x00 0. "  GMB96  ,Group Modifier Bit 96" "0,1"
else
hgroup.long 0x0D0C++0x03
hide.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D10))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04))
group.long 0x0D10++0x03
line.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
bitfld.long 0x00 31. " GMB159 ,Group Modifier Bit 159" "0,1"
bitfld.long 0x00 30. "  GMB158 ,Group Modifier Bit 158" "0,1"
bitfld.long 0x00 29. "  GMB157 ,Group Modifier Bit 157" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB156 ,Group Modifier Bit 156" "0,1"
bitfld.long 0x00 27. "  GMB155 ,Group Modifier Bit 155" "0,1"
bitfld.long 0x00 26. "  GMB154 ,Group Modifier Bit 154" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB153 ,Group Modifier Bit 153" "0,1"
bitfld.long 0x00 24. "  GMB152 ,Group Modifier Bit 152" "0,1"
bitfld.long 0x00 23. "  GMB151 ,Group Modifier Bit 151" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB150 ,Group Modifier Bit 150" "0,1"
bitfld.long 0x00 21. "  GMB149 ,Group Modifier Bit 149" "0,1"
bitfld.long 0x00 20. "  GMB148 ,Group Modifier Bit 148" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB147 ,Group Modifier Bit 147" "0,1"
bitfld.long 0x00 18. "  GMB146 ,Group Modifier Bit 146" "0,1"
bitfld.long 0x00 17. "  GMB145 ,Group Modifier Bit 145" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB144 ,Group Modifier Bit 144" "0,1"
bitfld.long 0x00 15. "  GMB143 ,Group Modifier Bit 143" "0,1"
bitfld.long 0x00 14. "  GMB142 ,Group Modifier Bit 142" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB141 ,Group Modifier Bit 141" "0,1"
bitfld.long 0x00 12. "  GMB140 ,Group Modifier Bit 140" "0,1"
bitfld.long 0x00 11. "  GMB139 ,Group Modifier Bit 139" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB138 ,Group Modifier Bit 138" "0,1"
bitfld.long 0x00 9. "  GMB137 ,Group Modifier Bit 137" "0,1"
bitfld.long 0x00 8. "  GMB136 ,Group Modifier Bit 136" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB135 ,Group Modifier Bit 135" "0,1"
bitfld.long 0x00 6. "  GMB134 ,Group Modifier Bit 134" "0,1"
bitfld.long 0x00 5. "  GMB133 ,Group Modifier Bit 133" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB132 ,Group Modifier Bit 132" "0,1"
bitfld.long 0x00 3. "  GMB131 ,Group Modifier Bit 131" "0,1"
bitfld.long 0x00 2. "  GMB130 ,Group Modifier Bit 130" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB129 ,Group Modifier Bit 129" "0,1"
bitfld.long 0x00 0. "  GMB128 ,Group Modifier Bit 128" "0,1"
else
hgroup.long 0x0D10++0x03
hide.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D14))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05))
group.long 0x0D14++0x03
line.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
bitfld.long 0x00 31. " GMB191 ,Group Modifier Bit 191" "0,1"
bitfld.long 0x00 30. "  GMB190 ,Group Modifier Bit 190" "0,1"
bitfld.long 0x00 29. "  GMB189 ,Group Modifier Bit 189" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB188 ,Group Modifier Bit 188" "0,1"
bitfld.long 0x00 27. "  GMB187 ,Group Modifier Bit 187" "0,1"
bitfld.long 0x00 26. "  GMB186 ,Group Modifier Bit 186" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB185 ,Group Modifier Bit 185" "0,1"
bitfld.long 0x00 24. "  GMB184 ,Group Modifier Bit 184" "0,1"
bitfld.long 0x00 23. "  GMB183 ,Group Modifier Bit 183" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB182 ,Group Modifier Bit 182" "0,1"
bitfld.long 0x00 21. "  GMB181 ,Group Modifier Bit 181" "0,1"
bitfld.long 0x00 20. "  GMB180 ,Group Modifier Bit 180" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB179 ,Group Modifier Bit 179" "0,1"
bitfld.long 0x00 18. "  GMB178 ,Group Modifier Bit 178" "0,1"
bitfld.long 0x00 17. "  GMB177 ,Group Modifier Bit 177" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB176 ,Group Modifier Bit 176" "0,1"
bitfld.long 0x00 15. "  GMB175 ,Group Modifier Bit 175" "0,1"
bitfld.long 0x00 14. "  GMB174 ,Group Modifier Bit 174" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB173 ,Group Modifier Bit 173" "0,1"
bitfld.long 0x00 12. "  GMB172 ,Group Modifier Bit 172" "0,1"
bitfld.long 0x00 11. "  GMB171 ,Group Modifier Bit 171" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB170 ,Group Modifier Bit 170" "0,1"
bitfld.long 0x00 9. "  GMB169 ,Group Modifier Bit 169" "0,1"
bitfld.long 0x00 8. "  GMB168 ,Group Modifier Bit 168" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB167 ,Group Modifier Bit 167" "0,1"
bitfld.long 0x00 6. "  GMB166 ,Group Modifier Bit 166" "0,1"
bitfld.long 0x00 5. "  GMB165 ,Group Modifier Bit 165" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB164 ,Group Modifier Bit 164" "0,1"
bitfld.long 0x00 3. "  GMB163 ,Group Modifier Bit 163" "0,1"
bitfld.long 0x00 2. "  GMB162 ,Group Modifier Bit 162" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB161 ,Group Modifier Bit 161" "0,1"
bitfld.long 0x00 0. "  GMB160 ,Group Modifier Bit 160" "0,1"
else
hgroup.long 0x0D14++0x03
hide.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D18))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06))
group.long 0x0D18++0x03
line.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
bitfld.long 0x00 31. " GMB223 ,Group Modifier Bit 223" "0,1"
bitfld.long 0x00 30. "  GMB222 ,Group Modifier Bit 222" "0,1"
bitfld.long 0x00 29. "  GMB221 ,Group Modifier Bit 221" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB220 ,Group Modifier Bit 220" "0,1"
bitfld.long 0x00 27. "  GMB219 ,Group Modifier Bit 219" "0,1"
bitfld.long 0x00 26. "  GMB218 ,Group Modifier Bit 218" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB217 ,Group Modifier Bit 217" "0,1"
bitfld.long 0x00 24. "  GMB216 ,Group Modifier Bit 216" "0,1"
bitfld.long 0x00 23. "  GMB215 ,Group Modifier Bit 215" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB214 ,Group Modifier Bit 214" "0,1"
bitfld.long 0x00 21. "  GMB213 ,Group Modifier Bit 213" "0,1"
bitfld.long 0x00 20. "  GMB212 ,Group Modifier Bit 212" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB211 ,Group Modifier Bit 211" "0,1"
bitfld.long 0x00 18. "  GMB210 ,Group Modifier Bit 210" "0,1"
bitfld.long 0x00 17. "  GMB209 ,Group Modifier Bit 209" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB208 ,Group Modifier Bit 208" "0,1"
bitfld.long 0x00 15. "  GMB207 ,Group Modifier Bit 207" "0,1"
bitfld.long 0x00 14. "  GMB206 ,Group Modifier Bit 206" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB205 ,Group Modifier Bit 205" "0,1"
bitfld.long 0x00 12. "  GMB204 ,Group Modifier Bit 204" "0,1"
bitfld.long 0x00 11. "  GMB203 ,Group Modifier Bit 203" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB202 ,Group Modifier Bit 202" "0,1"
bitfld.long 0x00 9. "  GMB201 ,Group Modifier Bit 201" "0,1"
bitfld.long 0x00 8. "  GMB200 ,Group Modifier Bit 200" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB199 ,Group Modifier Bit 199" "0,1"
bitfld.long 0x00 6. "  GMB198 ,Group Modifier Bit 198" "0,1"
bitfld.long 0x00 5. "  GMB197 ,Group Modifier Bit 197" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB196 ,Group Modifier Bit 196" "0,1"
bitfld.long 0x00 3. "  GMB195 ,Group Modifier Bit 195" "0,1"
bitfld.long 0x00 2. "  GMB194 ,Group Modifier Bit 194" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB193 ,Group Modifier Bit 193" "0,1"
bitfld.long 0x00 0. "  GMB192 ,Group Modifier Bit 192" "0,1"
else
hgroup.long 0x0D18++0x03
hide.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D1C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07))
group.long 0x0D1C++0x03
line.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
bitfld.long 0x00 31. " GMB255 ,Group Modifier Bit 255" "0,1"
bitfld.long 0x00 30. "  GMB254 ,Group Modifier Bit 254" "0,1"
bitfld.long 0x00 29. "  GMB253 ,Group Modifier Bit 253" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB252 ,Group Modifier Bit 252" "0,1"
bitfld.long 0x00 27. "  GMB251 ,Group Modifier Bit 251" "0,1"
bitfld.long 0x00 26. "  GMB250 ,Group Modifier Bit 250" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB249 ,Group Modifier Bit 249" "0,1"
bitfld.long 0x00 24. "  GMB248 ,Group Modifier Bit 248" "0,1"
bitfld.long 0x00 23. "  GMB247 ,Group Modifier Bit 247" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB246 ,Group Modifier Bit 246" "0,1"
bitfld.long 0x00 21. "  GMB245 ,Group Modifier Bit 245" "0,1"
bitfld.long 0x00 20. "  GMB244 ,Group Modifier Bit 244" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB243 ,Group Modifier Bit 243" "0,1"
bitfld.long 0x00 18. "  GMB242 ,Group Modifier Bit 242" "0,1"
bitfld.long 0x00 17. "  GMB241 ,Group Modifier Bit 241" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB240 ,Group Modifier Bit 240" "0,1"
bitfld.long 0x00 15. "  GMB239 ,Group Modifier Bit 239" "0,1"
bitfld.long 0x00 14. "  GMB238 ,Group Modifier Bit 238" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB237 ,Group Modifier Bit 237" "0,1"
bitfld.long 0x00 12. "  GMB236 ,Group Modifier Bit 236" "0,1"
bitfld.long 0x00 11. "  GMB235 ,Group Modifier Bit 235" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB234 ,Group Modifier Bit 234" "0,1"
bitfld.long 0x00 9. "  GMB233 ,Group Modifier Bit 233" "0,1"
bitfld.long 0x00 8. "  GMB232 ,Group Modifier Bit 232" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB231 ,Group Modifier Bit 231" "0,1"
bitfld.long 0x00 6. "  GMB230 ,Group Modifier Bit 230" "0,1"
bitfld.long 0x00 5. "  GMB229 ,Group Modifier Bit 229" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB228 ,Group Modifier Bit 228" "0,1"
bitfld.long 0x00 3. "  GMB227 ,Group Modifier Bit 227" "0,1"
bitfld.long 0x00 2. "  GMB226 ,Group Modifier Bit 226" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB225 ,Group Modifier Bit 225" "0,1"
bitfld.long 0x00 0. "  GMB224 ,Group Modifier Bit 224" "0,1"
else
hgroup.long 0x0D1C++0x03
hide.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D20))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08))
group.long 0x0D20++0x03
line.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
bitfld.long 0x00 31. " GMB287 ,Group Modifier Bit 287" "0,1"
bitfld.long 0x00 30. "  GMB286 ,Group Modifier Bit 286" "0,1"
bitfld.long 0x00 29. "  GMB285 ,Group Modifier Bit 285" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB284 ,Group Modifier Bit 284" "0,1"
bitfld.long 0x00 27. "  GMB283 ,Group Modifier Bit 283" "0,1"
bitfld.long 0x00 26. "  GMB282 ,Group Modifier Bit 282" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB281 ,Group Modifier Bit 281" "0,1"
bitfld.long 0x00 24. "  GMB280 ,Group Modifier Bit 280" "0,1"
bitfld.long 0x00 23. "  GMB279 ,Group Modifier Bit 279" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB278 ,Group Modifier Bit 278" "0,1"
bitfld.long 0x00 21. "  GMB277 ,Group Modifier Bit 277" "0,1"
bitfld.long 0x00 20. "  GMB276 ,Group Modifier Bit 276" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB275 ,Group Modifier Bit 275" "0,1"
bitfld.long 0x00 18. "  GMB274 ,Group Modifier Bit 274" "0,1"
bitfld.long 0x00 17. "  GMB273 ,Group Modifier Bit 273" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB272 ,Group Modifier Bit 272" "0,1"
bitfld.long 0x00 15. "  GMB271 ,Group Modifier Bit 271" "0,1"
bitfld.long 0x00 14. "  GMB270 ,Group Modifier Bit 270" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB269 ,Group Modifier Bit 269" "0,1"
bitfld.long 0x00 12. "  GMB268 ,Group Modifier Bit 268" "0,1"
bitfld.long 0x00 11. "  GMB267 ,Group Modifier Bit 267" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB266 ,Group Modifier Bit 266" "0,1"
bitfld.long 0x00 9. "  GMB265 ,Group Modifier Bit 265" "0,1"
bitfld.long 0x00 8. "  GMB264 ,Group Modifier Bit 264" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB263 ,Group Modifier Bit 263" "0,1"
bitfld.long 0x00 6. "  GMB262 ,Group Modifier Bit 262" "0,1"
bitfld.long 0x00 5. "  GMB261 ,Group Modifier Bit 261" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB260 ,Group Modifier Bit 260" "0,1"
bitfld.long 0x00 3. "  GMB259 ,Group Modifier Bit 259" "0,1"
bitfld.long 0x00 2. "  GMB258 ,Group Modifier Bit 258" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB257 ,Group Modifier Bit 257" "0,1"
bitfld.long 0x00 0. "  GMB256 ,Group Modifier Bit 256" "0,1"
else
hgroup.long 0x0D20++0x03
hide.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D24))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09))
group.long 0x0D24++0x03
line.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
bitfld.long 0x00 31. " GMB319 ,Group Modifier Bit 319" "0,1"
bitfld.long 0x00 30. "  GMB318 ,Group Modifier Bit 318" "0,1"
bitfld.long 0x00 29. "  GMB317 ,Group Modifier Bit 317" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB316 ,Group Modifier Bit 316" "0,1"
bitfld.long 0x00 27. "  GMB315 ,Group Modifier Bit 315" "0,1"
bitfld.long 0x00 26. "  GMB314 ,Group Modifier Bit 314" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB313 ,Group Modifier Bit 313" "0,1"
bitfld.long 0x00 24. "  GMB312 ,Group Modifier Bit 312" "0,1"
bitfld.long 0x00 23. "  GMB311 ,Group Modifier Bit 311" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB310 ,Group Modifier Bit 310" "0,1"
bitfld.long 0x00 21. "  GMB309 ,Group Modifier Bit 309" "0,1"
bitfld.long 0x00 20. "  GMB308 ,Group Modifier Bit 308" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB307 ,Group Modifier Bit 307" "0,1"
bitfld.long 0x00 18. "  GMB306 ,Group Modifier Bit 306" "0,1"
bitfld.long 0x00 17. "  GMB305 ,Group Modifier Bit 305" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB304 ,Group Modifier Bit 304" "0,1"
bitfld.long 0x00 15. "  GMB303 ,Group Modifier Bit 303" "0,1"
bitfld.long 0x00 14. "  GMB302 ,Group Modifier Bit 302" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB301 ,Group Modifier Bit 301" "0,1"
bitfld.long 0x00 12. "  GMB300 ,Group Modifier Bit 300" "0,1"
bitfld.long 0x00 11. "  GMB299 ,Group Modifier Bit 299" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB298 ,Group Modifier Bit 298" "0,1"
bitfld.long 0x00 9. "  GMB297 ,Group Modifier Bit 297" "0,1"
bitfld.long 0x00 8. "  GMB296 ,Group Modifier Bit 296" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB295 ,Group Modifier Bit 295" "0,1"
bitfld.long 0x00 6. "  GMB294 ,Group Modifier Bit 294" "0,1"
bitfld.long 0x00 5. "  GMB293 ,Group Modifier Bit 293" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB292 ,Group Modifier Bit 292" "0,1"
bitfld.long 0x00 3. "  GMB291 ,Group Modifier Bit 291" "0,1"
bitfld.long 0x00 2. "  GMB290 ,Group Modifier Bit 290" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB289 ,Group Modifier Bit 289" "0,1"
bitfld.long 0x00 0. "  GMB288 ,Group Modifier Bit 288" "0,1"
else
hgroup.long 0x0D24++0x03
hide.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D28))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A))
group.long 0x0D28++0x03
line.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
bitfld.long 0x00 31. " GMB351 ,Group Modifier Bit 351" "0,1"
bitfld.long 0x00 30. "  GMB350 ,Group Modifier Bit 350" "0,1"
bitfld.long 0x00 29. "  GMB349 ,Group Modifier Bit 349" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB348 ,Group Modifier Bit 348" "0,1"
bitfld.long 0x00 27. "  GMB347 ,Group Modifier Bit 347" "0,1"
bitfld.long 0x00 26. "  GMB346 ,Group Modifier Bit 346" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB345 ,Group Modifier Bit 345" "0,1"
bitfld.long 0x00 24. "  GMB344 ,Group Modifier Bit 344" "0,1"
bitfld.long 0x00 23. "  GMB343 ,Group Modifier Bit 343" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB342 ,Group Modifier Bit 342" "0,1"
bitfld.long 0x00 21. "  GMB341 ,Group Modifier Bit 341" "0,1"
bitfld.long 0x00 20. "  GMB340 ,Group Modifier Bit 340" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB339 ,Group Modifier Bit 339" "0,1"
bitfld.long 0x00 18. "  GMB338 ,Group Modifier Bit 338" "0,1"
bitfld.long 0x00 17. "  GMB337 ,Group Modifier Bit 337" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB336 ,Group Modifier Bit 336" "0,1"
bitfld.long 0x00 15. "  GMB335 ,Group Modifier Bit 335" "0,1"
bitfld.long 0x00 14. "  GMB334 ,Group Modifier Bit 334" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB333 ,Group Modifier Bit 333" "0,1"
bitfld.long 0x00 12. "  GMB332 ,Group Modifier Bit 332" "0,1"
bitfld.long 0x00 11. "  GMB331 ,Group Modifier Bit 331" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB330 ,Group Modifier Bit 330" "0,1"
bitfld.long 0x00 9. "  GMB329 ,Group Modifier Bit 329" "0,1"
bitfld.long 0x00 8. "  GMB328 ,Group Modifier Bit 328" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB327 ,Group Modifier Bit 327" "0,1"
bitfld.long 0x00 6. "  GMB326 ,Group Modifier Bit 326" "0,1"
bitfld.long 0x00 5. "  GMB325 ,Group Modifier Bit 325" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB324 ,Group Modifier Bit 324" "0,1"
bitfld.long 0x00 3. "  GMB323 ,Group Modifier Bit 323" "0,1"
bitfld.long 0x00 2. "  GMB322 ,Group Modifier Bit 322" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB321 ,Group Modifier Bit 321" "0,1"
bitfld.long 0x00 0. "  GMB320 ,Group Modifier Bit 320" "0,1"
else
hgroup.long 0x0D28++0x03
hide.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D2C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B))
group.long 0x0D2C++0x03
line.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
bitfld.long 0x00 31. " GMB383 ,Group Modifier Bit 383" "0,1"
bitfld.long 0x00 30. "  GMB382 ,Group Modifier Bit 382" "0,1"
bitfld.long 0x00 29. "  GMB381 ,Group Modifier Bit 381" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB380 ,Group Modifier Bit 380" "0,1"
bitfld.long 0x00 27. "  GMB379 ,Group Modifier Bit 379" "0,1"
bitfld.long 0x00 26. "  GMB378 ,Group Modifier Bit 378" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB377 ,Group Modifier Bit 377" "0,1"
bitfld.long 0x00 24. "  GMB376 ,Group Modifier Bit 376" "0,1"
bitfld.long 0x00 23. "  GMB375 ,Group Modifier Bit 375" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB374 ,Group Modifier Bit 374" "0,1"
bitfld.long 0x00 21. "  GMB373 ,Group Modifier Bit 373" "0,1"
bitfld.long 0x00 20. "  GMB372 ,Group Modifier Bit 372" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB371 ,Group Modifier Bit 371" "0,1"
bitfld.long 0x00 18. "  GMB370 ,Group Modifier Bit 370" "0,1"
bitfld.long 0x00 17. "  GMB369 ,Group Modifier Bit 369" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB368 ,Group Modifier Bit 368" "0,1"
bitfld.long 0x00 15. "  GMB367 ,Group Modifier Bit 367" "0,1"
bitfld.long 0x00 14. "  GMB366 ,Group Modifier Bit 366" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB365 ,Group Modifier Bit 365" "0,1"
bitfld.long 0x00 12. "  GMB364 ,Group Modifier Bit 364" "0,1"
bitfld.long 0x00 11. "  GMB363 ,Group Modifier Bit 363" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB362 ,Group Modifier Bit 362" "0,1"
bitfld.long 0x00 9. "  GMB361 ,Group Modifier Bit 361" "0,1"
bitfld.long 0x00 8. "  GMB360 ,Group Modifier Bit 360" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB359 ,Group Modifier Bit 359" "0,1"
bitfld.long 0x00 6. "  GMB358 ,Group Modifier Bit 358" "0,1"
bitfld.long 0x00 5. "  GMB357 ,Group Modifier Bit 357" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB356 ,Group Modifier Bit 356" "0,1"
bitfld.long 0x00 3. "  GMB355 ,Group Modifier Bit 355" "0,1"
bitfld.long 0x00 2. "  GMB354 ,Group Modifier Bit 354" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB353 ,Group Modifier Bit 353" "0,1"
bitfld.long 0x00 0. "  GMB352 ,Group Modifier Bit 352" "0,1"
else
hgroup.long 0x0D2C++0x03
hide.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D30))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C))
group.long 0x0D30++0x03
line.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
bitfld.long 0x00 31. " GMB415 ,Group Modifier Bit 415" "0,1"
bitfld.long 0x00 30. "  GMB414 ,Group Modifier Bit 414" "0,1"
bitfld.long 0x00 29. "  GMB413 ,Group Modifier Bit 413" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB412 ,Group Modifier Bit 412" "0,1"
bitfld.long 0x00 27. "  GMB411 ,Group Modifier Bit 411" "0,1"
bitfld.long 0x00 26. "  GMB410 ,Group Modifier Bit 410" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB409 ,Group Modifier Bit 409" "0,1"
bitfld.long 0x00 24. "  GMB408 ,Group Modifier Bit 408" "0,1"
bitfld.long 0x00 23. "  GMB407 ,Group Modifier Bit 407" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB406 ,Group Modifier Bit 406" "0,1"
bitfld.long 0x00 21. "  GMB405 ,Group Modifier Bit 405" "0,1"
bitfld.long 0x00 20. "  GMB404 ,Group Modifier Bit 404" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB403 ,Group Modifier Bit 403" "0,1"
bitfld.long 0x00 18. "  GMB402 ,Group Modifier Bit 402" "0,1"
bitfld.long 0x00 17. "  GMB401 ,Group Modifier Bit 401" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB400 ,Group Modifier Bit 400" "0,1"
bitfld.long 0x00 15. "  GMB399 ,Group Modifier Bit 399" "0,1"
bitfld.long 0x00 14. "  GMB398 ,Group Modifier Bit 398" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB397 ,Group Modifier Bit 397" "0,1"
bitfld.long 0x00 12. "  GMB396 ,Group Modifier Bit 396" "0,1"
bitfld.long 0x00 11. "  GMB395 ,Group Modifier Bit 395" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB394 ,Group Modifier Bit 394" "0,1"
bitfld.long 0x00 9. "  GMB393 ,Group Modifier Bit 393" "0,1"
bitfld.long 0x00 8. "  GMB392 ,Group Modifier Bit 392" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB391 ,Group Modifier Bit 391" "0,1"
bitfld.long 0x00 6. "  GMB390 ,Group Modifier Bit 390" "0,1"
bitfld.long 0x00 5. "  GMB389 ,Group Modifier Bit 389" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB388 ,Group Modifier Bit 388" "0,1"
bitfld.long 0x00 3. "  GMB387 ,Group Modifier Bit 387" "0,1"
bitfld.long 0x00 2. "  GMB386 ,Group Modifier Bit 386" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB385 ,Group Modifier Bit 385" "0,1"
bitfld.long 0x00 0. "  GMB384 ,Group Modifier Bit 384" "0,1"
else
hgroup.long 0x0D30++0x03
hide.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D34))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D))
group.long 0x0D34++0x03
line.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
bitfld.long 0x00 31. " GMB447 ,Group Modifier Bit 447" "0,1"
bitfld.long 0x00 30. "  GMB446 ,Group Modifier Bit 446" "0,1"
bitfld.long 0x00 29. "  GMB445 ,Group Modifier Bit 445" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB444 ,Group Modifier Bit 444" "0,1"
bitfld.long 0x00 27. "  GMB443 ,Group Modifier Bit 443" "0,1"
bitfld.long 0x00 26. "  GMB442 ,Group Modifier Bit 442" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB441 ,Group Modifier Bit 441" "0,1"
bitfld.long 0x00 24. "  GMB440 ,Group Modifier Bit 440" "0,1"
bitfld.long 0x00 23. "  GMB439 ,Group Modifier Bit 439" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB438 ,Group Modifier Bit 438" "0,1"
bitfld.long 0x00 21. "  GMB437 ,Group Modifier Bit 437" "0,1"
bitfld.long 0x00 20. "  GMB436 ,Group Modifier Bit 436" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB435 ,Group Modifier Bit 435" "0,1"
bitfld.long 0x00 18. "  GMB434 ,Group Modifier Bit 434" "0,1"
bitfld.long 0x00 17. "  GMB433 ,Group Modifier Bit 433" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB432 ,Group Modifier Bit 432" "0,1"
bitfld.long 0x00 15. "  GMB431 ,Group Modifier Bit 431" "0,1"
bitfld.long 0x00 14. "  GMB430 ,Group Modifier Bit 430" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB429 ,Group Modifier Bit 429" "0,1"
bitfld.long 0x00 12. "  GMB428 ,Group Modifier Bit 428" "0,1"
bitfld.long 0x00 11. "  GMB427 ,Group Modifier Bit 427" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB426 ,Group Modifier Bit 426" "0,1"
bitfld.long 0x00 9. "  GMB425 ,Group Modifier Bit 425" "0,1"
bitfld.long 0x00 8. "  GMB424 ,Group Modifier Bit 424" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB423 ,Group Modifier Bit 423" "0,1"
bitfld.long 0x00 6. "  GMB422 ,Group Modifier Bit 422" "0,1"
bitfld.long 0x00 5. "  GMB421 ,Group Modifier Bit 421" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB420 ,Group Modifier Bit 420" "0,1"
bitfld.long 0x00 3. "  GMB419 ,Group Modifier Bit 419" "0,1"
bitfld.long 0x00 2. "  GMB418 ,Group Modifier Bit 418" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB417 ,Group Modifier Bit 417" "0,1"
bitfld.long 0x00 0. "  GMB416 ,Group Modifier Bit 416" "0,1"
else
hgroup.long 0x0D34++0x03
hide.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D38))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E))
group.long 0x0D38++0x03
line.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
bitfld.long 0x00 31. " GMB479 ,Group Modifier Bit 479" "0,1"
bitfld.long 0x00 30. "  GMB478 ,Group Modifier Bit 478" "0,1"
bitfld.long 0x00 29. "  GMB477 ,Group Modifier Bit 477" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB476 ,Group Modifier Bit 476" "0,1"
bitfld.long 0x00 27. "  GMB475 ,Group Modifier Bit 475" "0,1"
bitfld.long 0x00 26. "  GMB474 ,Group Modifier Bit 474" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB473 ,Group Modifier Bit 473" "0,1"
bitfld.long 0x00 24. "  GMB472 ,Group Modifier Bit 472" "0,1"
bitfld.long 0x00 23. "  GMB471 ,Group Modifier Bit 471" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB470 ,Group Modifier Bit 470" "0,1"
bitfld.long 0x00 21. "  GMB469 ,Group Modifier Bit 469" "0,1"
bitfld.long 0x00 20. "  GMB468 ,Group Modifier Bit 468" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB467 ,Group Modifier Bit 467" "0,1"
bitfld.long 0x00 18. "  GMB466 ,Group Modifier Bit 466" "0,1"
bitfld.long 0x00 17. "  GMB465 ,Group Modifier Bit 465" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB464 ,Group Modifier Bit 464" "0,1"
bitfld.long 0x00 15. "  GMB463 ,Group Modifier Bit 463" "0,1"
bitfld.long 0x00 14. "  GMB462 ,Group Modifier Bit 462" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB461 ,Group Modifier Bit 461" "0,1"
bitfld.long 0x00 12. "  GMB460 ,Group Modifier Bit 460" "0,1"
bitfld.long 0x00 11. "  GMB459 ,Group Modifier Bit 459" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB458 ,Group Modifier Bit 458" "0,1"
bitfld.long 0x00 9. "  GMB457 ,Group Modifier Bit 457" "0,1"
bitfld.long 0x00 8. "  GMB456 ,Group Modifier Bit 456" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB455 ,Group Modifier Bit 455" "0,1"
bitfld.long 0x00 6. "  GMB454 ,Group Modifier Bit 454" "0,1"
bitfld.long 0x00 5. "  GMB453 ,Group Modifier Bit 453" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB452 ,Group Modifier Bit 452" "0,1"
bitfld.long 0x00 3. "  GMB451 ,Group Modifier Bit 451" "0,1"
bitfld.long 0x00 2. "  GMB450 ,Group Modifier Bit 450" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB449 ,Group Modifier Bit 449" "0,1"
bitfld.long 0x00 0. "  GMB448 ,Group Modifier Bit 448" "0,1"
else
hgroup.long 0x0D38++0x03
hide.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D3C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F))
group.long 0x0D3C++0x03
line.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
bitfld.long 0x00 31. " GMB511 ,Group Modifier Bit 511" "0,1"
bitfld.long 0x00 30. "  GMB510 ,Group Modifier Bit 510" "0,1"
bitfld.long 0x00 29. "  GMB509 ,Group Modifier Bit 509" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB508 ,Group Modifier Bit 508" "0,1"
bitfld.long 0x00 27. "  GMB507 ,Group Modifier Bit 507" "0,1"
bitfld.long 0x00 26. "  GMB506 ,Group Modifier Bit 506" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB505 ,Group Modifier Bit 505" "0,1"
bitfld.long 0x00 24. "  GMB504 ,Group Modifier Bit 504" "0,1"
bitfld.long 0x00 23. "  GMB503 ,Group Modifier Bit 503" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB502 ,Group Modifier Bit 502" "0,1"
bitfld.long 0x00 21. "  GMB501 ,Group Modifier Bit 501" "0,1"
bitfld.long 0x00 20. "  GMB500 ,Group Modifier Bit 500" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB499 ,Group Modifier Bit 499" "0,1"
bitfld.long 0x00 18. "  GMB498 ,Group Modifier Bit 498" "0,1"
bitfld.long 0x00 17. "  GMB497 ,Group Modifier Bit 497" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB496 ,Group Modifier Bit 496" "0,1"
bitfld.long 0x00 15. "  GMB495 ,Group Modifier Bit 495" "0,1"
bitfld.long 0x00 14. "  GMB494 ,Group Modifier Bit 494" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB493 ,Group Modifier Bit 493" "0,1"
bitfld.long 0x00 12. "  GMB492 ,Group Modifier Bit 492" "0,1"
bitfld.long 0x00 11. "  GMB491 ,Group Modifier Bit 491" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB490 ,Group Modifier Bit 490" "0,1"
bitfld.long 0x00 9. "  GMB489 ,Group Modifier Bit 489" "0,1"
bitfld.long 0x00 8. "  GMB488 ,Group Modifier Bit 488" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB487 ,Group Modifier Bit 487" "0,1"
bitfld.long 0x00 6. "  GMB486 ,Group Modifier Bit 486" "0,1"
bitfld.long 0x00 5. "  GMB485 ,Group Modifier Bit 485" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB484 ,Group Modifier Bit 484" "0,1"
bitfld.long 0x00 3. "  GMB483 ,Group Modifier Bit 483" "0,1"
bitfld.long 0x00 2. "  GMB482 ,Group Modifier Bit 482" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB481 ,Group Modifier Bit 481" "0,1"
bitfld.long 0x00 0. "  GMB480 ,Group Modifier Bit 480" "0,1"
else
hgroup.long 0x0D3C++0x03
hide.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D40))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x0D40++0x03
line.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
bitfld.long 0x00 31. " GMB543 ,Group Modifier Bit 543" "0,1"
bitfld.long 0x00 30. "  GMB542 ,Group Modifier Bit 542" "0,1"
bitfld.long 0x00 29. "  GMB541 ,Group Modifier Bit 541" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB540 ,Group Modifier Bit 540" "0,1"
bitfld.long 0x00 27. "  GMB539 ,Group Modifier Bit 539" "0,1"
bitfld.long 0x00 26. "  GMB538 ,Group Modifier Bit 538" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB537 ,Group Modifier Bit 537" "0,1"
bitfld.long 0x00 24. "  GMB536 ,Group Modifier Bit 536" "0,1"
bitfld.long 0x00 23. "  GMB535 ,Group Modifier Bit 535" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB534 ,Group Modifier Bit 534" "0,1"
bitfld.long 0x00 21. "  GMB533 ,Group Modifier Bit 533" "0,1"
bitfld.long 0x00 20. "  GMB532 ,Group Modifier Bit 532" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB531 ,Group Modifier Bit 531" "0,1"
bitfld.long 0x00 18. "  GMB530 ,Group Modifier Bit 530" "0,1"
bitfld.long 0x00 17. "  GMB529 ,Group Modifier Bit 529" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB528 ,Group Modifier Bit 528" "0,1"
bitfld.long 0x00 15. "  GMB527 ,Group Modifier Bit 527" "0,1"
bitfld.long 0x00 14. "  GMB526 ,Group Modifier Bit 526" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB525 ,Group Modifier Bit 525" "0,1"
bitfld.long 0x00 12. "  GMB524 ,Group Modifier Bit 524" "0,1"
bitfld.long 0x00 11. "  GMB523 ,Group Modifier Bit 523" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB522 ,Group Modifier Bit 522" "0,1"
bitfld.long 0x00 9. "  GMB521 ,Group Modifier Bit 521" "0,1"
bitfld.long 0x00 8. "  GMB520 ,Group Modifier Bit 520" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB519 ,Group Modifier Bit 519" "0,1"
bitfld.long 0x00 6. "  GMB518 ,Group Modifier Bit 518" "0,1"
bitfld.long 0x00 5. "  GMB517 ,Group Modifier Bit 517" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB516 ,Group Modifier Bit 516" "0,1"
bitfld.long 0x00 3. "  GMB515 ,Group Modifier Bit 515" "0,1"
bitfld.long 0x00 2. "  GMB514 ,Group Modifier Bit 514" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB513 ,Group Modifier Bit 513" "0,1"
bitfld.long 0x00 0. "  GMB512 ,Group Modifier Bit 512" "0,1"
else
hgroup.long 0x0D40++0x03
hide.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D44))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x0D44++0x03
line.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
bitfld.long 0x00 31. " GMB575 ,Group Modifier Bit 575" "0,1"
bitfld.long 0x00 30. "  GMB574 ,Group Modifier Bit 574" "0,1"
bitfld.long 0x00 29. "  GMB573 ,Group Modifier Bit 573" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB572 ,Group Modifier Bit 572" "0,1"
bitfld.long 0x00 27. "  GMB571 ,Group Modifier Bit 571" "0,1"
bitfld.long 0x00 26. "  GMB570 ,Group Modifier Bit 570" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB569 ,Group Modifier Bit 569" "0,1"
bitfld.long 0x00 24. "  GMB568 ,Group Modifier Bit 568" "0,1"
bitfld.long 0x00 23. "  GMB567 ,Group Modifier Bit 567" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB566 ,Group Modifier Bit 566" "0,1"
bitfld.long 0x00 21. "  GMB565 ,Group Modifier Bit 565" "0,1"
bitfld.long 0x00 20. "  GMB564 ,Group Modifier Bit 564" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB563 ,Group Modifier Bit 563" "0,1"
bitfld.long 0x00 18. "  GMB562 ,Group Modifier Bit 562" "0,1"
bitfld.long 0x00 17. "  GMB561 ,Group Modifier Bit 561" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB560 ,Group Modifier Bit 560" "0,1"
bitfld.long 0x00 15. "  GMB559 ,Group Modifier Bit 559" "0,1"
bitfld.long 0x00 14. "  GMB558 ,Group Modifier Bit 558" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB557 ,Group Modifier Bit 557" "0,1"
bitfld.long 0x00 12. "  GMB556 ,Group Modifier Bit 556" "0,1"
bitfld.long 0x00 11. "  GMB555 ,Group Modifier Bit 555" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB554 ,Group Modifier Bit 554" "0,1"
bitfld.long 0x00 9. "  GMB553 ,Group Modifier Bit 553" "0,1"
bitfld.long 0x00 8. "  GMB552 ,Group Modifier Bit 552" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB551 ,Group Modifier Bit 551" "0,1"
bitfld.long 0x00 6. "  GMB550 ,Group Modifier Bit 550" "0,1"
bitfld.long 0x00 5. "  GMB549 ,Group Modifier Bit 549" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB548 ,Group Modifier Bit 548" "0,1"
bitfld.long 0x00 3. "  GMB547 ,Group Modifier Bit 547" "0,1"
bitfld.long 0x00 2. "  GMB546 ,Group Modifier Bit 546" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB545 ,Group Modifier Bit 545" "0,1"
bitfld.long 0x00 0. "  GMB544 ,Group Modifier Bit 544" "0,1"
else
hgroup.long 0x0D44++0x03
hide.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D48))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x0D48++0x03
line.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
bitfld.long 0x00 31. " GMB607 ,Group Modifier Bit 607" "0,1"
bitfld.long 0x00 30. "  GMB606 ,Group Modifier Bit 606" "0,1"
bitfld.long 0x00 29. "  GMB605 ,Group Modifier Bit 605" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB604 ,Group Modifier Bit 604" "0,1"
bitfld.long 0x00 27. "  GMB603 ,Group Modifier Bit 603" "0,1"
bitfld.long 0x00 26. "  GMB602 ,Group Modifier Bit 602" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB601 ,Group Modifier Bit 601" "0,1"
bitfld.long 0x00 24. "  GMB600 ,Group Modifier Bit 600" "0,1"
bitfld.long 0x00 23. "  GMB599 ,Group Modifier Bit 599" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB598 ,Group Modifier Bit 598" "0,1"
bitfld.long 0x00 21. "  GMB597 ,Group Modifier Bit 597" "0,1"
bitfld.long 0x00 20. "  GMB596 ,Group Modifier Bit 596" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB595 ,Group Modifier Bit 595" "0,1"
bitfld.long 0x00 18. "  GMB594 ,Group Modifier Bit 594" "0,1"
bitfld.long 0x00 17. "  GMB593 ,Group Modifier Bit 593" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB592 ,Group Modifier Bit 592" "0,1"
bitfld.long 0x00 15. "  GMB591 ,Group Modifier Bit 591" "0,1"
bitfld.long 0x00 14. "  GMB590 ,Group Modifier Bit 590" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB589 ,Group Modifier Bit 589" "0,1"
bitfld.long 0x00 12. "  GMB588 ,Group Modifier Bit 588" "0,1"
bitfld.long 0x00 11. "  GMB587 ,Group Modifier Bit 587" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB586 ,Group Modifier Bit 586" "0,1"
bitfld.long 0x00 9. "  GMB585 ,Group Modifier Bit 585" "0,1"
bitfld.long 0x00 8. "  GMB584 ,Group Modifier Bit 584" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB583 ,Group Modifier Bit 583" "0,1"
bitfld.long 0x00 6. "  GMB582 ,Group Modifier Bit 582" "0,1"
bitfld.long 0x00 5. "  GMB581 ,Group Modifier Bit 581" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB580 ,Group Modifier Bit 580" "0,1"
bitfld.long 0x00 3. "  GMB579 ,Group Modifier Bit 579" "0,1"
bitfld.long 0x00 2. "  GMB578 ,Group Modifier Bit 578" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB577 ,Group Modifier Bit 577" "0,1"
bitfld.long 0x00 0. "  GMB576 ,Group Modifier Bit 576" "0,1"
else
hgroup.long 0x0D48++0x03
hide.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D4C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x0D4C++0x03
line.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
bitfld.long 0x00 31. " GMB639 ,Group Modifier Bit 639" "0,1"
bitfld.long 0x00 30. "  GMB638 ,Group Modifier Bit 638" "0,1"
bitfld.long 0x00 29. "  GMB637 ,Group Modifier Bit 637" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB636 ,Group Modifier Bit 636" "0,1"
bitfld.long 0x00 27. "  GMB635 ,Group Modifier Bit 635" "0,1"
bitfld.long 0x00 26. "  GMB634 ,Group Modifier Bit 634" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB633 ,Group Modifier Bit 633" "0,1"
bitfld.long 0x00 24. "  GMB632 ,Group Modifier Bit 632" "0,1"
bitfld.long 0x00 23. "  GMB631 ,Group Modifier Bit 631" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB630 ,Group Modifier Bit 630" "0,1"
bitfld.long 0x00 21. "  GMB629 ,Group Modifier Bit 629" "0,1"
bitfld.long 0x00 20. "  GMB628 ,Group Modifier Bit 628" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB627 ,Group Modifier Bit 627" "0,1"
bitfld.long 0x00 18. "  GMB626 ,Group Modifier Bit 626" "0,1"
bitfld.long 0x00 17. "  GMB625 ,Group Modifier Bit 625" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB624 ,Group Modifier Bit 624" "0,1"
bitfld.long 0x00 15. "  GMB623 ,Group Modifier Bit 623" "0,1"
bitfld.long 0x00 14. "  GMB622 ,Group Modifier Bit 622" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB621 ,Group Modifier Bit 621" "0,1"
bitfld.long 0x00 12. "  GMB620 ,Group Modifier Bit 620" "0,1"
bitfld.long 0x00 11. "  GMB619 ,Group Modifier Bit 619" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB618 ,Group Modifier Bit 618" "0,1"
bitfld.long 0x00 9. "  GMB617 ,Group Modifier Bit 617" "0,1"
bitfld.long 0x00 8. "  GMB616 ,Group Modifier Bit 616" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB615 ,Group Modifier Bit 615" "0,1"
bitfld.long 0x00 6. "  GMB614 ,Group Modifier Bit 614" "0,1"
bitfld.long 0x00 5. "  GMB613 ,Group Modifier Bit 613" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB612 ,Group Modifier Bit 612" "0,1"
bitfld.long 0x00 3. "  GMB611 ,Group Modifier Bit 611" "0,1"
bitfld.long 0x00 2. "  GMB610 ,Group Modifier Bit 610" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB609 ,Group Modifier Bit 609" "0,1"
bitfld.long 0x00 0. "  GMB608 ,Group Modifier Bit 608" "0,1"
else
hgroup.long 0x0D4C++0x03
hide.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D50))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x0D50++0x03
line.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
bitfld.long 0x00 31. " GMB671 ,Group Modifier Bit 671" "0,1"
bitfld.long 0x00 30. "  GMB670 ,Group Modifier Bit 670" "0,1"
bitfld.long 0x00 29. "  GMB669 ,Group Modifier Bit 669" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB668 ,Group Modifier Bit 668" "0,1"
bitfld.long 0x00 27. "  GMB667 ,Group Modifier Bit 667" "0,1"
bitfld.long 0x00 26. "  GMB666 ,Group Modifier Bit 666" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB665 ,Group Modifier Bit 665" "0,1"
bitfld.long 0x00 24. "  GMB664 ,Group Modifier Bit 664" "0,1"
bitfld.long 0x00 23. "  GMB663 ,Group Modifier Bit 663" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB662 ,Group Modifier Bit 662" "0,1"
bitfld.long 0x00 21. "  GMB661 ,Group Modifier Bit 661" "0,1"
bitfld.long 0x00 20. "  GMB660 ,Group Modifier Bit 660" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB659 ,Group Modifier Bit 659" "0,1"
bitfld.long 0x00 18. "  GMB658 ,Group Modifier Bit 658" "0,1"
bitfld.long 0x00 17. "  GMB657 ,Group Modifier Bit 657" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB656 ,Group Modifier Bit 656" "0,1"
bitfld.long 0x00 15. "  GMB655 ,Group Modifier Bit 655" "0,1"
bitfld.long 0x00 14. "  GMB654 ,Group Modifier Bit 654" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB653 ,Group Modifier Bit 653" "0,1"
bitfld.long 0x00 12. "  GMB652 ,Group Modifier Bit 652" "0,1"
bitfld.long 0x00 11. "  GMB651 ,Group Modifier Bit 651" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB650 ,Group Modifier Bit 650" "0,1"
bitfld.long 0x00 9. "  GMB649 ,Group Modifier Bit 649" "0,1"
bitfld.long 0x00 8. "  GMB648 ,Group Modifier Bit 648" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB647 ,Group Modifier Bit 647" "0,1"
bitfld.long 0x00 6. "  GMB646 ,Group Modifier Bit 646" "0,1"
bitfld.long 0x00 5. "  GMB645 ,Group Modifier Bit 645" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB644 ,Group Modifier Bit 644" "0,1"
bitfld.long 0x00 3. "  GMB643 ,Group Modifier Bit 643" "0,1"
bitfld.long 0x00 2. "  GMB642 ,Group Modifier Bit 642" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB641 ,Group Modifier Bit 641" "0,1"
bitfld.long 0x00 0. "  GMB640 ,Group Modifier Bit 640" "0,1"
else
hgroup.long 0x0D50++0x03
hide.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D54))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x0D54++0x03
line.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
bitfld.long 0x00 31. " GMB703 ,Group Modifier Bit 703" "0,1"
bitfld.long 0x00 30. "  GMB702 ,Group Modifier Bit 702" "0,1"
bitfld.long 0x00 29. "  GMB701 ,Group Modifier Bit 701" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB700 ,Group Modifier Bit 700" "0,1"
bitfld.long 0x00 27. "  GMB699 ,Group Modifier Bit 699" "0,1"
bitfld.long 0x00 26. "  GMB698 ,Group Modifier Bit 698" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB697 ,Group Modifier Bit 697" "0,1"
bitfld.long 0x00 24. "  GMB696 ,Group Modifier Bit 696" "0,1"
bitfld.long 0x00 23. "  GMB695 ,Group Modifier Bit 695" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB694 ,Group Modifier Bit 694" "0,1"
bitfld.long 0x00 21. "  GMB693 ,Group Modifier Bit 693" "0,1"
bitfld.long 0x00 20. "  GMB692 ,Group Modifier Bit 692" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB691 ,Group Modifier Bit 691" "0,1"
bitfld.long 0x00 18. "  GMB690 ,Group Modifier Bit 690" "0,1"
bitfld.long 0x00 17. "  GMB689 ,Group Modifier Bit 689" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB688 ,Group Modifier Bit 688" "0,1"
bitfld.long 0x00 15. "  GMB687 ,Group Modifier Bit 687" "0,1"
bitfld.long 0x00 14. "  GMB686 ,Group Modifier Bit 686" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB685 ,Group Modifier Bit 685" "0,1"
bitfld.long 0x00 12. "  GMB684 ,Group Modifier Bit 684" "0,1"
bitfld.long 0x00 11. "  GMB683 ,Group Modifier Bit 683" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB682 ,Group Modifier Bit 682" "0,1"
bitfld.long 0x00 9. "  GMB681 ,Group Modifier Bit 681" "0,1"
bitfld.long 0x00 8. "  GMB680 ,Group Modifier Bit 680" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB679 ,Group Modifier Bit 679" "0,1"
bitfld.long 0x00 6. "  GMB678 ,Group Modifier Bit 678" "0,1"
bitfld.long 0x00 5. "  GMB677 ,Group Modifier Bit 677" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB676 ,Group Modifier Bit 676" "0,1"
bitfld.long 0x00 3. "  GMB675 ,Group Modifier Bit 675" "0,1"
bitfld.long 0x00 2. "  GMB674 ,Group Modifier Bit 674" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB673 ,Group Modifier Bit 673" "0,1"
bitfld.long 0x00 0. "  GMB672 ,Group Modifier Bit 672" "0,1"
else
hgroup.long 0x0D54++0x03
hide.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D58))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x0D58++0x03
line.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
bitfld.long 0x00 31. " GMB735 ,Group Modifier Bit 735" "0,1"
bitfld.long 0x00 30. "  GMB734 ,Group Modifier Bit 734" "0,1"
bitfld.long 0x00 29. "  GMB733 ,Group Modifier Bit 733" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB732 ,Group Modifier Bit 732" "0,1"
bitfld.long 0x00 27. "  GMB731 ,Group Modifier Bit 731" "0,1"
bitfld.long 0x00 26. "  GMB730 ,Group Modifier Bit 730" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB729 ,Group Modifier Bit 729" "0,1"
bitfld.long 0x00 24. "  GMB728 ,Group Modifier Bit 728" "0,1"
bitfld.long 0x00 23. "  GMB727 ,Group Modifier Bit 727" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB726 ,Group Modifier Bit 726" "0,1"
bitfld.long 0x00 21. "  GMB725 ,Group Modifier Bit 725" "0,1"
bitfld.long 0x00 20. "  GMB724 ,Group Modifier Bit 724" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB723 ,Group Modifier Bit 723" "0,1"
bitfld.long 0x00 18. "  GMB722 ,Group Modifier Bit 722" "0,1"
bitfld.long 0x00 17. "  GMB721 ,Group Modifier Bit 721" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB720 ,Group Modifier Bit 720" "0,1"
bitfld.long 0x00 15. "  GMB719 ,Group Modifier Bit 719" "0,1"
bitfld.long 0x00 14. "  GMB718 ,Group Modifier Bit 718" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB717 ,Group Modifier Bit 717" "0,1"
bitfld.long 0x00 12. "  GMB716 ,Group Modifier Bit 716" "0,1"
bitfld.long 0x00 11. "  GMB715 ,Group Modifier Bit 715" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB714 ,Group Modifier Bit 714" "0,1"
bitfld.long 0x00 9. "  GMB713 ,Group Modifier Bit 713" "0,1"
bitfld.long 0x00 8. "  GMB712 ,Group Modifier Bit 712" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB711 ,Group Modifier Bit 711" "0,1"
bitfld.long 0x00 6. "  GMB710 ,Group Modifier Bit 710" "0,1"
bitfld.long 0x00 5. "  GMB709 ,Group Modifier Bit 709" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB708 ,Group Modifier Bit 708" "0,1"
bitfld.long 0x00 3. "  GMB707 ,Group Modifier Bit 707" "0,1"
bitfld.long 0x00 2. "  GMB706 ,Group Modifier Bit 706" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB705 ,Group Modifier Bit 705" "0,1"
bitfld.long 0x00 0. "  GMB704 ,Group Modifier Bit 704" "0,1"
else
hgroup.long 0x0D58++0x03
hide.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D5C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x0D5C++0x03
line.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
bitfld.long 0x00 31. " GMB767 ,Group Modifier Bit 767" "0,1"
bitfld.long 0x00 30. "  GMB766 ,Group Modifier Bit 766" "0,1"
bitfld.long 0x00 29. "  GMB765 ,Group Modifier Bit 765" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB764 ,Group Modifier Bit 764" "0,1"
bitfld.long 0x00 27. "  GMB763 ,Group Modifier Bit 763" "0,1"
bitfld.long 0x00 26. "  GMB762 ,Group Modifier Bit 762" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB761 ,Group Modifier Bit 761" "0,1"
bitfld.long 0x00 24. "  GMB760 ,Group Modifier Bit 760" "0,1"
bitfld.long 0x00 23. "  GMB759 ,Group Modifier Bit 759" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB758 ,Group Modifier Bit 758" "0,1"
bitfld.long 0x00 21. "  GMB757 ,Group Modifier Bit 757" "0,1"
bitfld.long 0x00 20. "  GMB756 ,Group Modifier Bit 756" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB755 ,Group Modifier Bit 755" "0,1"
bitfld.long 0x00 18. "  GMB754 ,Group Modifier Bit 754" "0,1"
bitfld.long 0x00 17. "  GMB753 ,Group Modifier Bit 753" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB752 ,Group Modifier Bit 752" "0,1"
bitfld.long 0x00 15. "  GMB751 ,Group Modifier Bit 751" "0,1"
bitfld.long 0x00 14. "  GMB750 ,Group Modifier Bit 750" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB749 ,Group Modifier Bit 749" "0,1"
bitfld.long 0x00 12. "  GMB748 ,Group Modifier Bit 748" "0,1"
bitfld.long 0x00 11. "  GMB747 ,Group Modifier Bit 747" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB746 ,Group Modifier Bit 746" "0,1"
bitfld.long 0x00 9. "  GMB745 ,Group Modifier Bit 745" "0,1"
bitfld.long 0x00 8. "  GMB744 ,Group Modifier Bit 744" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB743 ,Group Modifier Bit 743" "0,1"
bitfld.long 0x00 6. "  GMB742 ,Group Modifier Bit 742" "0,1"
bitfld.long 0x00 5. "  GMB741 ,Group Modifier Bit 741" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB740 ,Group Modifier Bit 740" "0,1"
bitfld.long 0x00 3. "  GMB739 ,Group Modifier Bit 739" "0,1"
bitfld.long 0x00 2. "  GMB738 ,Group Modifier Bit 738" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB737 ,Group Modifier Bit 737" "0,1"
bitfld.long 0x00 0. "  GMB736 ,Group Modifier Bit 736" "0,1"
else
hgroup.long 0x0D5C++0x03
hide.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D60))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x0D60++0x03
line.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
bitfld.long 0x00 31. " GMB799 ,Group Modifier Bit 799" "0,1"
bitfld.long 0x00 30. "  GMB798 ,Group Modifier Bit 798" "0,1"
bitfld.long 0x00 29. "  GMB797 ,Group Modifier Bit 797" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB796 ,Group Modifier Bit 796" "0,1"
bitfld.long 0x00 27. "  GMB795 ,Group Modifier Bit 795" "0,1"
bitfld.long 0x00 26. "  GMB794 ,Group Modifier Bit 794" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB793 ,Group Modifier Bit 793" "0,1"
bitfld.long 0x00 24. "  GMB792 ,Group Modifier Bit 792" "0,1"
bitfld.long 0x00 23. "  GMB791 ,Group Modifier Bit 791" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB790 ,Group Modifier Bit 790" "0,1"
bitfld.long 0x00 21. "  GMB789 ,Group Modifier Bit 789" "0,1"
bitfld.long 0x00 20. "  GMB788 ,Group Modifier Bit 788" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB787 ,Group Modifier Bit 787" "0,1"
bitfld.long 0x00 18. "  GMB786 ,Group Modifier Bit 786" "0,1"
bitfld.long 0x00 17. "  GMB785 ,Group Modifier Bit 785" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB784 ,Group Modifier Bit 784" "0,1"
bitfld.long 0x00 15. "  GMB783 ,Group Modifier Bit 783" "0,1"
bitfld.long 0x00 14. "  GMB782 ,Group Modifier Bit 782" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB781 ,Group Modifier Bit 781" "0,1"
bitfld.long 0x00 12. "  GMB780 ,Group Modifier Bit 780" "0,1"
bitfld.long 0x00 11. "  GMB779 ,Group Modifier Bit 779" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB778 ,Group Modifier Bit 778" "0,1"
bitfld.long 0x00 9. "  GMB777 ,Group Modifier Bit 777" "0,1"
bitfld.long 0x00 8. "  GMB776 ,Group Modifier Bit 776" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB775 ,Group Modifier Bit 775" "0,1"
bitfld.long 0x00 6. "  GMB774 ,Group Modifier Bit 774" "0,1"
bitfld.long 0x00 5. "  GMB773 ,Group Modifier Bit 773" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB772 ,Group Modifier Bit 772" "0,1"
bitfld.long 0x00 3. "  GMB771 ,Group Modifier Bit 771" "0,1"
bitfld.long 0x00 2. "  GMB770 ,Group Modifier Bit 770" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB769 ,Group Modifier Bit 769" "0,1"
bitfld.long 0x00 0. "  GMB768 ,Group Modifier Bit 768" "0,1"
else
hgroup.long 0x0D60++0x03
hide.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D64))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x0D64++0x03
line.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
bitfld.long 0x00 31. " GMB831 ,Group Modifier Bit 831" "0,1"
bitfld.long 0x00 30. "  GMB830 ,Group Modifier Bit 830" "0,1"
bitfld.long 0x00 29. "  GMB829 ,Group Modifier Bit 829" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB828 ,Group Modifier Bit 828" "0,1"
bitfld.long 0x00 27. "  GMB827 ,Group Modifier Bit 827" "0,1"
bitfld.long 0x00 26. "  GMB826 ,Group Modifier Bit 826" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB825 ,Group Modifier Bit 825" "0,1"
bitfld.long 0x00 24. "  GMB824 ,Group Modifier Bit 824" "0,1"
bitfld.long 0x00 23. "  GMB823 ,Group Modifier Bit 823" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB822 ,Group Modifier Bit 822" "0,1"
bitfld.long 0x00 21. "  GMB821 ,Group Modifier Bit 821" "0,1"
bitfld.long 0x00 20. "  GMB820 ,Group Modifier Bit 820" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB819 ,Group Modifier Bit 819" "0,1"
bitfld.long 0x00 18. "  GMB818 ,Group Modifier Bit 818" "0,1"
bitfld.long 0x00 17. "  GMB817 ,Group Modifier Bit 817" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB816 ,Group Modifier Bit 816" "0,1"
bitfld.long 0x00 15. "  GMB815 ,Group Modifier Bit 815" "0,1"
bitfld.long 0x00 14. "  GMB814 ,Group Modifier Bit 814" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB813 ,Group Modifier Bit 813" "0,1"
bitfld.long 0x00 12. "  GMB812 ,Group Modifier Bit 812" "0,1"
bitfld.long 0x00 11. "  GMB811 ,Group Modifier Bit 811" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB810 ,Group Modifier Bit 810" "0,1"
bitfld.long 0x00 9. "  GMB809 ,Group Modifier Bit 809" "0,1"
bitfld.long 0x00 8. "  GMB808 ,Group Modifier Bit 808" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB807 ,Group Modifier Bit 807" "0,1"
bitfld.long 0x00 6. "  GMB806 ,Group Modifier Bit 806" "0,1"
bitfld.long 0x00 5. "  GMB805 ,Group Modifier Bit 805" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB804 ,Group Modifier Bit 804" "0,1"
bitfld.long 0x00 3. "  GMB803 ,Group Modifier Bit 803" "0,1"
bitfld.long 0x00 2. "  GMB802 ,Group Modifier Bit 802" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB801 ,Group Modifier Bit 801" "0,1"
bitfld.long 0x00 0. "  GMB800 ,Group Modifier Bit 800" "0,1"
else
hgroup.long 0x0D64++0x03
hide.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D68))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01A))
group.long 0x0D68++0x03
line.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
bitfld.long 0x00 31. " GMB863 ,Group Modifier Bit 863" "0,1"
bitfld.long 0x00 30. "  GMB862 ,Group Modifier Bit 862" "0,1"
bitfld.long 0x00 29. "  GMB861 ,Group Modifier Bit 861" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB860 ,Group Modifier Bit 860" "0,1"
bitfld.long 0x00 27. "  GMB859 ,Group Modifier Bit 859" "0,1"
bitfld.long 0x00 26. "  GMB858 ,Group Modifier Bit 858" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB857 ,Group Modifier Bit 857" "0,1"
bitfld.long 0x00 24. "  GMB856 ,Group Modifier Bit 856" "0,1"
bitfld.long 0x00 23. "  GMB855 ,Group Modifier Bit 855" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB854 ,Group Modifier Bit 854" "0,1"
bitfld.long 0x00 21. "  GMB853 ,Group Modifier Bit 853" "0,1"
bitfld.long 0x00 20. "  GMB852 ,Group Modifier Bit 852" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB851 ,Group Modifier Bit 851" "0,1"
bitfld.long 0x00 18. "  GMB850 ,Group Modifier Bit 850" "0,1"
bitfld.long 0x00 17. "  GMB849 ,Group Modifier Bit 849" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB848 ,Group Modifier Bit 848" "0,1"
bitfld.long 0x00 15. "  GMB847 ,Group Modifier Bit 847" "0,1"
bitfld.long 0x00 14. "  GMB846 ,Group Modifier Bit 846" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB845 ,Group Modifier Bit 845" "0,1"
bitfld.long 0x00 12. "  GMB844 ,Group Modifier Bit 844" "0,1"
bitfld.long 0x00 11. "  GMB843 ,Group Modifier Bit 843" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB842 ,Group Modifier Bit 842" "0,1"
bitfld.long 0x00 9. "  GMB841 ,Group Modifier Bit 841" "0,1"
bitfld.long 0x00 8. "  GMB840 ,Group Modifier Bit 840" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB839 ,Group Modifier Bit 839" "0,1"
bitfld.long 0x00 6. "  GMB838 ,Group Modifier Bit 838" "0,1"
bitfld.long 0x00 5. "  GMB837 ,Group Modifier Bit 837" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB836 ,Group Modifier Bit 836" "0,1"
bitfld.long 0x00 3. "  GMB835 ,Group Modifier Bit 835" "0,1"
bitfld.long 0x00 2. "  GMB834 ,Group Modifier Bit 834" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB833 ,Group Modifier Bit 833" "0,1"
bitfld.long 0x00 0. "  GMB832 ,Group Modifier Bit 832" "0,1"
else
hgroup.long 0x0D68++0x03
hide.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D6C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x0D6C++0x03
line.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
bitfld.long 0x00 31. " GMB895 ,Group Modifier Bit 895" "0,1"
bitfld.long 0x00 30. "  GMB894 ,Group Modifier Bit 894" "0,1"
bitfld.long 0x00 29. "  GMB893 ,Group Modifier Bit 893" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB892 ,Group Modifier Bit 892" "0,1"
bitfld.long 0x00 27. "  GMB891 ,Group Modifier Bit 891" "0,1"
bitfld.long 0x00 26. "  GMB890 ,Group Modifier Bit 890" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB889 ,Group Modifier Bit 889" "0,1"
bitfld.long 0x00 24. "  GMB888 ,Group Modifier Bit 888" "0,1"
bitfld.long 0x00 23. "  GMB887 ,Group Modifier Bit 887" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB886 ,Group Modifier Bit 886" "0,1"
bitfld.long 0x00 21. "  GMB885 ,Group Modifier Bit 885" "0,1"
bitfld.long 0x00 20. "  GMB884 ,Group Modifier Bit 884" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB883 ,Group Modifier Bit 883" "0,1"
bitfld.long 0x00 18. "  GMB882 ,Group Modifier Bit 882" "0,1"
bitfld.long 0x00 17. "  GMB881 ,Group Modifier Bit 881" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB880 ,Group Modifier Bit 880" "0,1"
bitfld.long 0x00 15. "  GMB879 ,Group Modifier Bit 879" "0,1"
bitfld.long 0x00 14. "  GMB878 ,Group Modifier Bit 878" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB877 ,Group Modifier Bit 877" "0,1"
bitfld.long 0x00 12. "  GMB876 ,Group Modifier Bit 876" "0,1"
bitfld.long 0x00 11. "  GMB875 ,Group Modifier Bit 875" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB874 ,Group Modifier Bit 874" "0,1"
bitfld.long 0x00 9. "  GMB873 ,Group Modifier Bit 873" "0,1"
bitfld.long 0x00 8. "  GMB872 ,Group Modifier Bit 872" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB871 ,Group Modifier Bit 871" "0,1"
bitfld.long 0x00 6. "  GMB870 ,Group Modifier Bit 870" "0,1"
bitfld.long 0x00 5. "  GMB869 ,Group Modifier Bit 869" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB868 ,Group Modifier Bit 868" "0,1"
bitfld.long 0x00 3. "  GMB867 ,Group Modifier Bit 867" "0,1"
bitfld.long 0x00 2. "  GMB866 ,Group Modifier Bit 866" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB865 ,Group Modifier Bit 865" "0,1"
bitfld.long 0x00 0. "  GMB864 ,Group Modifier Bit 864" "0,1"
else
hgroup.long 0x0D6C++0x03
hide.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D70))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x0D70++0x03
line.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
bitfld.long 0x00 31. " GMB927 ,Group Modifier Bit 927" "0,1"
bitfld.long 0x00 30. "  GMB926 ,Group Modifier Bit 926" "0,1"
bitfld.long 0x00 29. "  GMB925 ,Group Modifier Bit 925" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB924 ,Group Modifier Bit 924" "0,1"
bitfld.long 0x00 27. "  GMB923 ,Group Modifier Bit 923" "0,1"
bitfld.long 0x00 26. "  GMB922 ,Group Modifier Bit 922" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB921 ,Group Modifier Bit 921" "0,1"
bitfld.long 0x00 24. "  GMB920 ,Group Modifier Bit 920" "0,1"
bitfld.long 0x00 23. "  GMB919 ,Group Modifier Bit 919" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB918 ,Group Modifier Bit 918" "0,1"
bitfld.long 0x00 21. "  GMB917 ,Group Modifier Bit 917" "0,1"
bitfld.long 0x00 20. "  GMB916 ,Group Modifier Bit 916" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB915 ,Group Modifier Bit 915" "0,1"
bitfld.long 0x00 18. "  GMB914 ,Group Modifier Bit 914" "0,1"
bitfld.long 0x00 17. "  GMB913 ,Group Modifier Bit 913" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB912 ,Group Modifier Bit 912" "0,1"
bitfld.long 0x00 15. "  GMB911 ,Group Modifier Bit 911" "0,1"
bitfld.long 0x00 14. "  GMB910 ,Group Modifier Bit 910" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB909 ,Group Modifier Bit 909" "0,1"
bitfld.long 0x00 12. "  GMB908 ,Group Modifier Bit 908" "0,1"
bitfld.long 0x00 11. "  GMB907 ,Group Modifier Bit 907" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB906 ,Group Modifier Bit 906" "0,1"
bitfld.long 0x00 9. "  GMB905 ,Group Modifier Bit 905" "0,1"
bitfld.long 0x00 8. "  GMB904 ,Group Modifier Bit 904" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB903 ,Group Modifier Bit 903" "0,1"
bitfld.long 0x00 6. "  GMB902 ,Group Modifier Bit 902" "0,1"
bitfld.long 0x00 5. "  GMB901 ,Group Modifier Bit 901" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB900 ,Group Modifier Bit 900" "0,1"
bitfld.long 0x00 3. "  GMB899 ,Group Modifier Bit 899" "0,1"
bitfld.long 0x00 2. "  GMB898 ,Group Modifier Bit 898" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB897 ,Group Modifier Bit 897" "0,1"
bitfld.long 0x00 0. "  GMB896 ,Group Modifier Bit 896" "0,1"
else
hgroup.long 0x0D70++0x03
hide.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D74))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x0D74++0x03
line.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
bitfld.long 0x00 31. " GMB959 ,Group Modifier Bit 959" "0,1"
bitfld.long 0x00 30. "  GMB958 ,Group Modifier Bit 958" "0,1"
bitfld.long 0x00 29. "  GMB957 ,Group Modifier Bit 957" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB956 ,Group Modifier Bit 956" "0,1"
bitfld.long 0x00 27. "  GMB955 ,Group Modifier Bit 955" "0,1"
bitfld.long 0x00 26. "  GMB954 ,Group Modifier Bit 954" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB953 ,Group Modifier Bit 953" "0,1"
bitfld.long 0x00 24. "  GMB952 ,Group Modifier Bit 952" "0,1"
bitfld.long 0x00 23. "  GMB951 ,Group Modifier Bit 951" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB950 ,Group Modifier Bit 950" "0,1"
bitfld.long 0x00 21. "  GMB949 ,Group Modifier Bit 949" "0,1"
bitfld.long 0x00 20. "  GMB948 ,Group Modifier Bit 948" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB947 ,Group Modifier Bit 947" "0,1"
bitfld.long 0x00 18. "  GMB946 ,Group Modifier Bit 946" "0,1"
bitfld.long 0x00 17. "  GMB945 ,Group Modifier Bit 945" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB944 ,Group Modifier Bit 944" "0,1"
bitfld.long 0x00 15. "  GMB943 ,Group Modifier Bit 943" "0,1"
bitfld.long 0x00 14. "  GMB942 ,Group Modifier Bit 942" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB941 ,Group Modifier Bit 941" "0,1"
bitfld.long 0x00 12. "  GMB940 ,Group Modifier Bit 940" "0,1"
bitfld.long 0x00 11. "  GMB939 ,Group Modifier Bit 939" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB938 ,Group Modifier Bit 938" "0,1"
bitfld.long 0x00 9. "  GMB937 ,Group Modifier Bit 937" "0,1"
bitfld.long 0x00 8. "  GMB936 ,Group Modifier Bit 936" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB935 ,Group Modifier Bit 935" "0,1"
bitfld.long 0x00 6. "  GMB934 ,Group Modifier Bit 934" "0,1"
bitfld.long 0x00 5. "  GMB933 ,Group Modifier Bit 933" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB932 ,Group Modifier Bit 932" "0,1"
bitfld.long 0x00 3. "  GMB931 ,Group Modifier Bit 931" "0,1"
bitfld.long 0x00 2. "  GMB930 ,Group Modifier Bit 930" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB929 ,Group Modifier Bit 929" "0,1"
bitfld.long 0x00 0. "  GMB928 ,Group Modifier Bit 928" "0,1"
else
hgroup.long 0x0D74++0x03
hide.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D78))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x0D78++0x03
line.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
bitfld.long 0x00 31. " GMB991 ,Group Modifier Bit 991" "0,1"
bitfld.long 0x00 30. "  GMB990 ,Group Modifier Bit 990" "0,1"
bitfld.long 0x00 29. "  GMB989 ,Group Modifier Bit 989" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB988 ,Group Modifier Bit 988" "0,1"
bitfld.long 0x00 27. "  GMB987 ,Group Modifier Bit 987" "0,1"
bitfld.long 0x00 26. "  GMB986 ,Group Modifier Bit 986" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB985 ,Group Modifier Bit 985" "0,1"
bitfld.long 0x00 24. "  GMB984 ,Group Modifier Bit 984" "0,1"
bitfld.long 0x00 23. "  GMB983 ,Group Modifier Bit 983" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB982 ,Group Modifier Bit 982" "0,1"
bitfld.long 0x00 21. "  GMB981 ,Group Modifier Bit 981" "0,1"
bitfld.long 0x00 20. "  GMB980 ,Group Modifier Bit 980" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB979 ,Group Modifier Bit 979" "0,1"
bitfld.long 0x00 18. "  GMB978 ,Group Modifier Bit 978" "0,1"
bitfld.long 0x00 17. "  GMB977 ,Group Modifier Bit 977" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB976 ,Group Modifier Bit 976" "0,1"
bitfld.long 0x00 15. "  GMB975 ,Group Modifier Bit 975" "0,1"
bitfld.long 0x00 14. "  GMB974 ,Group Modifier Bit 974" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB973 ,Group Modifier Bit 973" "0,1"
bitfld.long 0x00 12. "  GMB972 ,Group Modifier Bit 972" "0,1"
bitfld.long 0x00 11. "  GMB971 ,Group Modifier Bit 971" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB970 ,Group Modifier Bit 970" "0,1"
bitfld.long 0x00 9. "  GMB969 ,Group Modifier Bit 969" "0,1"
bitfld.long 0x00 8. "  GMB968 ,Group Modifier Bit 968" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB967 ,Group Modifier Bit 967" "0,1"
bitfld.long 0x00 6. "  GMB966 ,Group Modifier Bit 966" "0,1"
bitfld.long 0x00 5. "  GMB965 ,Group Modifier Bit 965" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB964 ,Group Modifier Bit 964" "0,1"
bitfld.long 0x00 3. "  GMB963 ,Group Modifier Bit 963" "0,1"
bitfld.long 0x00 2. "  GMB962 ,Group Modifier Bit 962" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB961 ,Group Modifier Bit 961" "0,1"
bitfld.long 0x00 0. "  GMB960 ,Group Modifier Bit 960" "0,1"
else
hgroup.long 0x0D78++0x03
hide.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
endif
tree.end
width 14.
tree "Non-secure Access Control Registers"
hgroup.long 0x0E00++0x03
hide.long 0x00 "GICD_NSACR0,Non-secure Access Control Register 0"
hgroup.long 0xE04++0x03
hide.long 0x00 "GICD_NSACR1,Non-secure Access Control Register 1"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE08)))
group.long 0xE08++0x03
line.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
bitfld.long 0x00 30.--31. " NS_ACCESS47  ,Controls Non-secure access of the interrupt with ID47 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS46  ,Controls Non-secure access of the interrupt with ID46 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS45  ,Controls Non-secure access of the interrupt with ID45 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS44  ,Controls Non-secure access of the interrupt with ID44 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS43  ,Controls Non-secure access of the interrupt with ID43 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS42  ,Controls Non-secure access of the interrupt with ID42 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS41  ,Controls Non-secure access of the interrupt with ID41 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS40  ,Controls Non-secure access of the interrupt with ID40 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS39  ,Controls Non-secure access of the interrupt with ID39 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS38  ,Controls Non-secure access of the interrupt with ID38 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS37  ,Controls Non-secure access of the interrupt with ID37 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS36  ,Controls Non-secure access of the interrupt with ID36 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS35  ,Controls Non-secure access of the interrupt with ID35 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS34  ,Controls Non-secure access of the interrupt with ID34 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS33  ,Controls Non-secure access of the interrupt with ID33 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS32  ,Controls Non-secure access of the interrupt with ID32 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0C)))
group.long 0xE0C++0x03
line.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
bitfld.long 0x00 30.--31. " NS_ACCESS63  ,Controls Non-secure access of the interrupt with ID63 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS62  ,Controls Non-secure access of the interrupt with ID62 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS61  ,Controls Non-secure access of the interrupt with ID61 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS60  ,Controls Non-secure access of the interrupt with ID60 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS59  ,Controls Non-secure access of the interrupt with ID59 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS58  ,Controls Non-secure access of the interrupt with ID58 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS57  ,Controls Non-secure access of the interrupt with ID57 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS56  ,Controls Non-secure access of the interrupt with ID56 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS55  ,Controls Non-secure access of the interrupt with ID55 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS54  ,Controls Non-secure access of the interrupt with ID54 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS53  ,Controls Non-secure access of the interrupt with ID53 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS52  ,Controls Non-secure access of the interrupt with ID52 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS51  ,Controls Non-secure access of the interrupt with ID51 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS50  ,Controls Non-secure access of the interrupt with ID50 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS49  ,Controls Non-secure access of the interrupt with ID49 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS48  ,Controls Non-secure access of the interrupt with ID48 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE0C++0x03
hide.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE10)))
group.long 0xE10++0x03
line.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
bitfld.long 0x00 30.--31. " NS_ACCESS79  ,Controls Non-secure access of the interrupt with ID79 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS78  ,Controls Non-secure access of the interrupt with ID78 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS77  ,Controls Non-secure access of the interrupt with ID77 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS76  ,Controls Non-secure access of the interrupt with ID76 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS75  ,Controls Non-secure access of the interrupt with ID75 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS74  ,Controls Non-secure access of the interrupt with ID74 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS73  ,Controls Non-secure access of the interrupt with ID73 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS72  ,Controls Non-secure access of the interrupt with ID72 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS71  ,Controls Non-secure access of the interrupt with ID71 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS70  ,Controls Non-secure access of the interrupt with ID70 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS69  ,Controls Non-secure access of the interrupt with ID69 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS68  ,Controls Non-secure access of the interrupt with ID68 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS67  ,Controls Non-secure access of the interrupt with ID67 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS66  ,Controls Non-secure access of the interrupt with ID66 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS65  ,Controls Non-secure access of the interrupt with ID65 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS64  ,Controls Non-secure access of the interrupt with ID64 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE10++0x03
hide.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE14)))
group.long 0xE14++0x03
line.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
bitfld.long 0x00 30.--31. " NS_ACCESS95  ,Controls Non-secure access of the interrupt with ID95 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS94  ,Controls Non-secure access of the interrupt with ID94 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS93  ,Controls Non-secure access of the interrupt with ID93 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS92  ,Controls Non-secure access of the interrupt with ID92 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS91  ,Controls Non-secure access of the interrupt with ID91 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS90  ,Controls Non-secure access of the interrupt with ID90 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS89  ,Controls Non-secure access of the interrupt with ID89 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS88  ,Controls Non-secure access of the interrupt with ID88 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS87  ,Controls Non-secure access of the interrupt with ID87 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS86  ,Controls Non-secure access of the interrupt with ID86 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS85  ,Controls Non-secure access of the interrupt with ID85 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS84  ,Controls Non-secure access of the interrupt with ID84 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS83  ,Controls Non-secure access of the interrupt with ID83 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS82  ,Controls Non-secure access of the interrupt with ID82 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS81  ,Controls Non-secure access of the interrupt with ID81 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS80  ,Controls Non-secure access of the interrupt with ID80 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE14++0x03
hide.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE18)))
group.long 0xE18++0x03
line.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
bitfld.long 0x00 30.--31. " NS_ACCESS111 ,Controls Non-secure access of the interrupt with ID111" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS110 ,Controls Non-secure access of the interrupt with ID110" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS109 ,Controls Non-secure access of the interrupt with ID109" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS108 ,Controls Non-secure access of the interrupt with ID108" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS107 ,Controls Non-secure access of the interrupt with ID107" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS106 ,Controls Non-secure access of the interrupt with ID106" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS105 ,Controls Non-secure access of the interrupt with ID105" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS104 ,Controls Non-secure access of the interrupt with ID104" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS103 ,Controls Non-secure access of the interrupt with ID103" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS102 ,Controls Non-secure access of the interrupt with ID102" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS101 ,Controls Non-secure access of the interrupt with ID101" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS100 ,Controls Non-secure access of the interrupt with ID100" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS99  ,Controls Non-secure access of the interrupt with ID99 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS98  ,Controls Non-secure access of the interrupt with ID98 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS97  ,Controls Non-secure access of the interrupt with ID97 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS96  ,Controls Non-secure access of the interrupt with ID96 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE18++0x03
hide.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE1C)))
group.long 0xE1C++0x03
line.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
bitfld.long 0x00 30.--31. " NS_ACCESS127 ,Controls Non-secure access of the interrupt with ID127" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS126 ,Controls Non-secure access of the interrupt with ID126" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS125 ,Controls Non-secure access of the interrupt with ID125" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS124 ,Controls Non-secure access of the interrupt with ID124" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS123 ,Controls Non-secure access of the interrupt with ID123" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS122 ,Controls Non-secure access of the interrupt with ID122" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS121 ,Controls Non-secure access of the interrupt with ID121" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS120 ,Controls Non-secure access of the interrupt with ID120" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS119 ,Controls Non-secure access of the interrupt with ID119" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS118 ,Controls Non-secure access of the interrupt with ID118" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS117 ,Controls Non-secure access of the interrupt with ID117" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS116 ,Controls Non-secure access of the interrupt with ID116" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS115 ,Controls Non-secure access of the interrupt with ID115" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS114 ,Controls Non-secure access of the interrupt with ID114" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS113 ,Controls Non-secure access of the interrupt with ID113" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS112 ,Controls Non-secure access of the interrupt with ID112" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE1C++0x03
hide.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE20)))
group.long 0xE20++0x03
line.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
bitfld.long 0x00 30.--31. " NS_ACCESS143 ,Controls Non-secure access of the interrupt with ID143" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS142 ,Controls Non-secure access of the interrupt with ID142" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS141 ,Controls Non-secure access of the interrupt with ID141" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS140 ,Controls Non-secure access of the interrupt with ID140" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS139 ,Controls Non-secure access of the interrupt with ID139" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS138 ,Controls Non-secure access of the interrupt with ID138" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS137 ,Controls Non-secure access of the interrupt with ID137" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS136 ,Controls Non-secure access of the interrupt with ID136" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS135 ,Controls Non-secure access of the interrupt with ID135" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS134 ,Controls Non-secure access of the interrupt with ID134" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS133 ,Controls Non-secure access of the interrupt with ID133" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS132 ,Controls Non-secure access of the interrupt with ID132" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS131 ,Controls Non-secure access of the interrupt with ID131" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS130 ,Controls Non-secure access of the interrupt with ID130" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS129 ,Controls Non-secure access of the interrupt with ID129" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS128 ,Controls Non-secure access of the interrupt with ID128" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE20++0x03
hide.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE24)))
group.long 0xE24++0x03
line.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
bitfld.long 0x00 30.--31. " NS_ACCESS159 ,Controls Non-secure access of the interrupt with ID159" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS158 ,Controls Non-secure access of the interrupt with ID158" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS157 ,Controls Non-secure access of the interrupt with ID157" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS156 ,Controls Non-secure access of the interrupt with ID156" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS155 ,Controls Non-secure access of the interrupt with ID155" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS154 ,Controls Non-secure access of the interrupt with ID154" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS153 ,Controls Non-secure access of the interrupt with ID153" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS152 ,Controls Non-secure access of the interrupt with ID152" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS151 ,Controls Non-secure access of the interrupt with ID151" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS150 ,Controls Non-secure access of the interrupt with ID150" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS149 ,Controls Non-secure access of the interrupt with ID149" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS148 ,Controls Non-secure access of the interrupt with ID148" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS147 ,Controls Non-secure access of the interrupt with ID147" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS146 ,Controls Non-secure access of the interrupt with ID146" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS145 ,Controls Non-secure access of the interrupt with ID145" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS144 ,Controls Non-secure access of the interrupt with ID144" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE24++0x03
hide.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE28)))
group.long 0xE28++0x03
line.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
bitfld.long 0x00 30.--31. " NS_ACCESS175 ,Controls Non-secure access of the interrupt with ID175" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS174 ,Controls Non-secure access of the interrupt with ID174" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS173 ,Controls Non-secure access of the interrupt with ID173" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS172 ,Controls Non-secure access of the interrupt with ID172" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS171 ,Controls Non-secure access of the interrupt with ID171" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS170 ,Controls Non-secure access of the interrupt with ID170" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS169 ,Controls Non-secure access of the interrupt with ID169" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS168 ,Controls Non-secure access of the interrupt with ID168" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS167 ,Controls Non-secure access of the interrupt with ID167" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS166 ,Controls Non-secure access of the interrupt with ID166" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS165 ,Controls Non-secure access of the interrupt with ID165" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS164 ,Controls Non-secure access of the interrupt with ID164" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS163 ,Controls Non-secure access of the interrupt with ID163" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS162 ,Controls Non-secure access of the interrupt with ID162" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS161 ,Controls Non-secure access of the interrupt with ID161" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS160 ,Controls Non-secure access of the interrupt with ID160" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE28++0x03
hide.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE2C)))
group.long 0xE2C++0x03
line.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
bitfld.long 0x00 30.--31. " NS_ACCESS191 ,Controls Non-secure access of the interrupt with ID191" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS190 ,Controls Non-secure access of the interrupt with ID190" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS189 ,Controls Non-secure access of the interrupt with ID189" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS188 ,Controls Non-secure access of the interrupt with ID188" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS187 ,Controls Non-secure access of the interrupt with ID187" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS186 ,Controls Non-secure access of the interrupt with ID186" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS185 ,Controls Non-secure access of the interrupt with ID185" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS184 ,Controls Non-secure access of the interrupt with ID184" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS183 ,Controls Non-secure access of the interrupt with ID183" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS182 ,Controls Non-secure access of the interrupt with ID182" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS181 ,Controls Non-secure access of the interrupt with ID181" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS180 ,Controls Non-secure access of the interrupt with ID180" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS179 ,Controls Non-secure access of the interrupt with ID179" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS178 ,Controls Non-secure access of the interrupt with ID178" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS177 ,Controls Non-secure access of the interrupt with ID177" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS176 ,Controls Non-secure access of the interrupt with ID176" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE2C++0x03
hide.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE30)))
group.long 0xE30++0x03
line.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
bitfld.long 0x00 30.--31. " NS_ACCESS207 ,Controls Non-secure access of the interrupt with ID207" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS206 ,Controls Non-secure access of the interrupt with ID206" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS205 ,Controls Non-secure access of the interrupt with ID205" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS204 ,Controls Non-secure access of the interrupt with ID204" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS203 ,Controls Non-secure access of the interrupt with ID203" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS202 ,Controls Non-secure access of the interrupt with ID202" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS201 ,Controls Non-secure access of the interrupt with ID201" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS200 ,Controls Non-secure access of the interrupt with ID200" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS199 ,Controls Non-secure access of the interrupt with ID199" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS198 ,Controls Non-secure access of the interrupt with ID198" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS197 ,Controls Non-secure access of the interrupt with ID197" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS196 ,Controls Non-secure access of the interrupt with ID196" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS195 ,Controls Non-secure access of the interrupt with ID195" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS194 ,Controls Non-secure access of the interrupt with ID194" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS193 ,Controls Non-secure access of the interrupt with ID193" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS192 ,Controls Non-secure access of the interrupt with ID192" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE30++0x03
hide.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE34)))
group.long 0xE34++0x03
line.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
bitfld.long 0x00 30.--31. " NS_ACCESS223 ,Controls Non-secure access of the interrupt with ID223" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS222 ,Controls Non-secure access of the interrupt with ID222" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS221 ,Controls Non-secure access of the interrupt with ID221" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS220 ,Controls Non-secure access of the interrupt with ID220" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS219 ,Controls Non-secure access of the interrupt with ID219" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS218 ,Controls Non-secure access of the interrupt with ID218" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS217 ,Controls Non-secure access of the interrupt with ID217" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS216 ,Controls Non-secure access of the interrupt with ID216" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS215 ,Controls Non-secure access of the interrupt with ID215" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS214 ,Controls Non-secure access of the interrupt with ID214" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS213 ,Controls Non-secure access of the interrupt with ID213" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS212 ,Controls Non-secure access of the interrupt with ID212" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS211 ,Controls Non-secure access of the interrupt with ID211" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS210 ,Controls Non-secure access of the interrupt with ID210" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS209 ,Controls Non-secure access of the interrupt with ID209" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS208 ,Controls Non-secure access of the interrupt with ID208" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE34++0x03
hide.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE38)))
group.long 0xE38++0x03
line.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
bitfld.long 0x00 30.--31. " NS_ACCESS239 ,Controls Non-secure access of the interrupt with ID239" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS238 ,Controls Non-secure access of the interrupt with ID238" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS237 ,Controls Non-secure access of the interrupt with ID237" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS236 ,Controls Non-secure access of the interrupt with ID236" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS235 ,Controls Non-secure access of the interrupt with ID235" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS234 ,Controls Non-secure access of the interrupt with ID234" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS233 ,Controls Non-secure access of the interrupt with ID233" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS232 ,Controls Non-secure access of the interrupt with ID232" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS231 ,Controls Non-secure access of the interrupt with ID231" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS230 ,Controls Non-secure access of the interrupt with ID230" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS229 ,Controls Non-secure access of the interrupt with ID229" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS228 ,Controls Non-secure access of the interrupt with ID228" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS227 ,Controls Non-secure access of the interrupt with ID227" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS226 ,Controls Non-secure access of the interrupt with ID226" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS225 ,Controls Non-secure access of the interrupt with ID225" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS224 ,Controls Non-secure access of the interrupt with ID224" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE38++0x03
hide.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE3C)))
group.long 0xE3C++0x03
line.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
bitfld.long 0x00 30.--31. " NS_ACCESS255 ,Controls Non-secure access of the interrupt with ID255" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS254 ,Controls Non-secure access of the interrupt with ID254" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS253 ,Controls Non-secure access of the interrupt with ID253" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS252 ,Controls Non-secure access of the interrupt with ID252" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS251 ,Controls Non-secure access of the interrupt with ID251" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS250 ,Controls Non-secure access of the interrupt with ID250" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS249 ,Controls Non-secure access of the interrupt with ID249" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS248 ,Controls Non-secure access of the interrupt with ID248" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS247 ,Controls Non-secure access of the interrupt with ID247" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS246 ,Controls Non-secure access of the interrupt with ID246" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS245 ,Controls Non-secure access of the interrupt with ID245" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS244 ,Controls Non-secure access of the interrupt with ID244" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS243 ,Controls Non-secure access of the interrupt with ID243" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS242 ,Controls Non-secure access of the interrupt with ID242" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS241 ,Controls Non-secure access of the interrupt with ID241" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS240 ,Controls Non-secure access of the interrupt with ID240" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE3C++0x03
hide.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE40)))
group.long 0xE40++0x03
line.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
bitfld.long 0x00 30.--31. " NS_ACCESS271 ,Controls Non-secure access of the interrupt with ID271" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS270 ,Controls Non-secure access of the interrupt with ID270" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS269 ,Controls Non-secure access of the interrupt with ID269" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS268 ,Controls Non-secure access of the interrupt with ID268" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS267 ,Controls Non-secure access of the interrupt with ID267" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS266 ,Controls Non-secure access of the interrupt with ID266" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS265 ,Controls Non-secure access of the interrupt with ID265" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS264 ,Controls Non-secure access of the interrupt with ID264" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS263 ,Controls Non-secure access of the interrupt with ID263" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS262 ,Controls Non-secure access of the interrupt with ID262" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS261 ,Controls Non-secure access of the interrupt with ID261" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS260 ,Controls Non-secure access of the interrupt with ID260" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS259 ,Controls Non-secure access of the interrupt with ID259" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS258 ,Controls Non-secure access of the interrupt with ID258" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS257 ,Controls Non-secure access of the interrupt with ID257" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS256 ,Controls Non-secure access of the interrupt with ID256" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE40++0x03
hide.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE44)))
group.long 0xE44++0x03
line.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
bitfld.long 0x00 30.--31. " NS_ACCESS287 ,Controls Non-secure access of the interrupt with ID287" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS286 ,Controls Non-secure access of the interrupt with ID286" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS285 ,Controls Non-secure access of the interrupt with ID285" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS284 ,Controls Non-secure access of the interrupt with ID284" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS283 ,Controls Non-secure access of the interrupt with ID283" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS282 ,Controls Non-secure access of the interrupt with ID282" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS281 ,Controls Non-secure access of the interrupt with ID281" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS280 ,Controls Non-secure access of the interrupt with ID280" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS279 ,Controls Non-secure access of the interrupt with ID279" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS278 ,Controls Non-secure access of the interrupt with ID278" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS277 ,Controls Non-secure access of the interrupt with ID277" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS276 ,Controls Non-secure access of the interrupt with ID276" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS275 ,Controls Non-secure access of the interrupt with ID275" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS274 ,Controls Non-secure access of the interrupt with ID274" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS273 ,Controls Non-secure access of the interrupt with ID273" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS272 ,Controls Non-secure access of the interrupt with ID272" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE44++0x03
hide.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE48)))
group.long 0xE48++0x03
line.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
bitfld.long 0x00 30.--31. " NS_ACCESS303 ,Controls Non-secure access of the interrupt with ID303" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS302 ,Controls Non-secure access of the interrupt with ID302" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS301 ,Controls Non-secure access of the interrupt with ID301" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS300 ,Controls Non-secure access of the interrupt with ID300" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS299 ,Controls Non-secure access of the interrupt with ID299" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS298 ,Controls Non-secure access of the interrupt with ID298" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS297 ,Controls Non-secure access of the interrupt with ID297" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS296 ,Controls Non-secure access of the interrupt with ID296" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS295 ,Controls Non-secure access of the interrupt with ID295" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS294 ,Controls Non-secure access of the interrupt with ID294" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS293 ,Controls Non-secure access of the interrupt with ID293" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS292 ,Controls Non-secure access of the interrupt with ID292" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS291 ,Controls Non-secure access of the interrupt with ID291" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS290 ,Controls Non-secure access of the interrupt with ID290" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS289 ,Controls Non-secure access of the interrupt with ID289" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS288 ,Controls Non-secure access of the interrupt with ID288" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE48++0x03
hide.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4C)))
group.long 0xE4C++0x03
line.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
bitfld.long 0x00 30.--31. " NS_ACCESS319 ,Controls Non-secure access of the interrupt with ID319" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS318 ,Controls Non-secure access of the interrupt with ID318" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS317 ,Controls Non-secure access of the interrupt with ID317" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS316 ,Controls Non-secure access of the interrupt with ID316" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS315 ,Controls Non-secure access of the interrupt with ID315" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS314 ,Controls Non-secure access of the interrupt with ID314" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS313 ,Controls Non-secure access of the interrupt with ID313" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS312 ,Controls Non-secure access of the interrupt with ID312" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS311 ,Controls Non-secure access of the interrupt with ID311" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS310 ,Controls Non-secure access of the interrupt with ID310" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS309 ,Controls Non-secure access of the interrupt with ID309" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS308 ,Controls Non-secure access of the interrupt with ID308" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS307 ,Controls Non-secure access of the interrupt with ID307" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS306 ,Controls Non-secure access of the interrupt with ID306" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS305 ,Controls Non-secure access of the interrupt with ID305" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS304 ,Controls Non-secure access of the interrupt with ID304" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE4C++0x03
hide.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE50)))
group.long 0xE50++0x03
line.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
bitfld.long 0x00 30.--31. " NS_ACCESS335 ,Controls Non-secure access of the interrupt with ID335" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS334 ,Controls Non-secure access of the interrupt with ID334" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS333 ,Controls Non-secure access of the interrupt with ID333" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS332 ,Controls Non-secure access of the interrupt with ID332" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS331 ,Controls Non-secure access of the interrupt with ID331" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS330 ,Controls Non-secure access of the interrupt with ID330" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS329 ,Controls Non-secure access of the interrupt with ID329" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS328 ,Controls Non-secure access of the interrupt with ID328" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS327 ,Controls Non-secure access of the interrupt with ID327" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS326 ,Controls Non-secure access of the interrupt with ID326" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS325 ,Controls Non-secure access of the interrupt with ID325" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS324 ,Controls Non-secure access of the interrupt with ID324" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS323 ,Controls Non-secure access of the interrupt with ID323" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS322 ,Controls Non-secure access of the interrupt with ID322" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS321 ,Controls Non-secure access of the interrupt with ID321" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS320 ,Controls Non-secure access of the interrupt with ID320" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE50++0x03
hide.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE54)))
group.long 0xE54++0x03
line.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
bitfld.long 0x00 30.--31. " NS_ACCESS351 ,Controls Non-secure access of the interrupt with ID351" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS350 ,Controls Non-secure access of the interrupt with ID350" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS349 ,Controls Non-secure access of the interrupt with ID349" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS348 ,Controls Non-secure access of the interrupt with ID348" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS347 ,Controls Non-secure access of the interrupt with ID347" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS346 ,Controls Non-secure access of the interrupt with ID346" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS345 ,Controls Non-secure access of the interrupt with ID345" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS344 ,Controls Non-secure access of the interrupt with ID344" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS343 ,Controls Non-secure access of the interrupt with ID343" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS342 ,Controls Non-secure access of the interrupt with ID342" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS341 ,Controls Non-secure access of the interrupt with ID341" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS340 ,Controls Non-secure access of the interrupt with ID340" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS339 ,Controls Non-secure access of the interrupt with ID339" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS338 ,Controls Non-secure access of the interrupt with ID338" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS337 ,Controls Non-secure access of the interrupt with ID337" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS336 ,Controls Non-secure access of the interrupt with ID336" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE54++0x03
hide.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE58)))
group.long 0xE58++0x03
line.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
bitfld.long 0x00 30.--31. " NS_ACCESS367 ,Controls Non-secure access of the interrupt with ID367" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS366 ,Controls Non-secure access of the interrupt with ID366" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS365 ,Controls Non-secure access of the interrupt with ID365" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS364 ,Controls Non-secure access of the interrupt with ID364" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS363 ,Controls Non-secure access of the interrupt with ID363" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS362 ,Controls Non-secure access of the interrupt with ID362" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS361 ,Controls Non-secure access of the interrupt with ID361" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS360 ,Controls Non-secure access of the interrupt with ID360" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS359 ,Controls Non-secure access of the interrupt with ID359" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS358 ,Controls Non-secure access of the interrupt with ID358" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS357 ,Controls Non-secure access of the interrupt with ID357" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS356 ,Controls Non-secure access of the interrupt with ID356" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS355 ,Controls Non-secure access of the interrupt with ID355" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS354 ,Controls Non-secure access of the interrupt with ID354" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS353 ,Controls Non-secure access of the interrupt with ID353" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS352 ,Controls Non-secure access of the interrupt with ID352" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE58++0x03
hide.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE5C)))
group.long 0xE5C++0x03
line.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
bitfld.long 0x00 30.--31. " NS_ACCESS383 ,Controls Non-secure access of the interrupt with ID383" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS382 ,Controls Non-secure access of the interrupt with ID382" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS381 ,Controls Non-secure access of the interrupt with ID381" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS380 ,Controls Non-secure access of the interrupt with ID380" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS379 ,Controls Non-secure access of the interrupt with ID379" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS378 ,Controls Non-secure access of the interrupt with ID378" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS377 ,Controls Non-secure access of the interrupt with ID377" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS376 ,Controls Non-secure access of the interrupt with ID376" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS375 ,Controls Non-secure access of the interrupt with ID375" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS374 ,Controls Non-secure access of the interrupt with ID374" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS373 ,Controls Non-secure access of the interrupt with ID373" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS372 ,Controls Non-secure access of the interrupt with ID372" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS371 ,Controls Non-secure access of the interrupt with ID371" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS370 ,Controls Non-secure access of the interrupt with ID370" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS369 ,Controls Non-secure access of the interrupt with ID369" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS368 ,Controls Non-secure access of the interrupt with ID368" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE5C++0x03
hide.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE60)))
group.long 0xE60++0x03
line.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
bitfld.long 0x00 30.--31. " NS_ACCESS399 ,Controls Non-secure access of the interrupt with ID399" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS398 ,Controls Non-secure access of the interrupt with ID398" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS397 ,Controls Non-secure access of the interrupt with ID397" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS396 ,Controls Non-secure access of the interrupt with ID396" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS395 ,Controls Non-secure access of the interrupt with ID395" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS394 ,Controls Non-secure access of the interrupt with ID394" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS393 ,Controls Non-secure access of the interrupt with ID393" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS392 ,Controls Non-secure access of the interrupt with ID392" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS391 ,Controls Non-secure access of the interrupt with ID391" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS390 ,Controls Non-secure access of the interrupt with ID390" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS389 ,Controls Non-secure access of the interrupt with ID389" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS388 ,Controls Non-secure access of the interrupt with ID388" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS387 ,Controls Non-secure access of the interrupt with ID387" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS386 ,Controls Non-secure access of the interrupt with ID386" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS385 ,Controls Non-secure access of the interrupt with ID385" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS384 ,Controls Non-secure access of the interrupt with ID384" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE60++0x03
hide.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE64)))
group.long 0xE64++0x03
line.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
bitfld.long 0x00 30.--31. " NS_ACCESS415 ,Controls Non-secure access of the interrupt with ID415" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS414 ,Controls Non-secure access of the interrupt with ID414" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS413 ,Controls Non-secure access of the interrupt with ID413" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS412 ,Controls Non-secure access of the interrupt with ID412" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS411 ,Controls Non-secure access of the interrupt with ID411" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS410 ,Controls Non-secure access of the interrupt with ID410" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS409 ,Controls Non-secure access of the interrupt with ID409" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS408 ,Controls Non-secure access of the interrupt with ID408" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS407 ,Controls Non-secure access of the interrupt with ID407" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS406 ,Controls Non-secure access of the interrupt with ID406" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS405 ,Controls Non-secure access of the interrupt with ID405" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS404 ,Controls Non-secure access of the interrupt with ID404" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS403 ,Controls Non-secure access of the interrupt with ID403" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS402 ,Controls Non-secure access of the interrupt with ID402" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS401 ,Controls Non-secure access of the interrupt with ID401" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS400 ,Controls Non-secure access of the interrupt with ID400" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE64++0x03
hide.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE68)))
group.long 0xE68++0x03
line.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
bitfld.long 0x00 30.--31. " NS_ACCESS431 ,Controls Non-secure access of the interrupt with ID431" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS430 ,Controls Non-secure access of the interrupt with ID430" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS429 ,Controls Non-secure access of the interrupt with ID429" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS428 ,Controls Non-secure access of the interrupt with ID428" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS427 ,Controls Non-secure access of the interrupt with ID427" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS426 ,Controls Non-secure access of the interrupt with ID426" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS425 ,Controls Non-secure access of the interrupt with ID425" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS424 ,Controls Non-secure access of the interrupt with ID424" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS423 ,Controls Non-secure access of the interrupt with ID423" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS422 ,Controls Non-secure access of the interrupt with ID422" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS421 ,Controls Non-secure access of the interrupt with ID421" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS420 ,Controls Non-secure access of the interrupt with ID420" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS419 ,Controls Non-secure access of the interrupt with ID419" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS418 ,Controls Non-secure access of the interrupt with ID418" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS417 ,Controls Non-secure access of the interrupt with ID417" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS416 ,Controls Non-secure access of the interrupt with ID416" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE68++0x03
hide.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE6C)))
group.long 0xE6C++0x03
line.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
bitfld.long 0x00 30.--31. " NS_ACCESS447 ,Controls Non-secure access of the interrupt with ID447" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS446 ,Controls Non-secure access of the interrupt with ID446" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS445 ,Controls Non-secure access of the interrupt with ID445" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS444 ,Controls Non-secure access of the interrupt with ID444" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS443 ,Controls Non-secure access of the interrupt with ID443" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS442 ,Controls Non-secure access of the interrupt with ID442" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS441 ,Controls Non-secure access of the interrupt with ID441" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS440 ,Controls Non-secure access of the interrupt with ID440" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS439 ,Controls Non-secure access of the interrupt with ID439" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS438 ,Controls Non-secure access of the interrupt with ID438" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS437 ,Controls Non-secure access of the interrupt with ID437" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS436 ,Controls Non-secure access of the interrupt with ID436" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS435 ,Controls Non-secure access of the interrupt with ID435" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS434 ,Controls Non-secure access of the interrupt with ID434" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS433 ,Controls Non-secure access of the interrupt with ID433" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS432 ,Controls Non-secure access of the interrupt with ID432" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE6C++0x03
hide.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE70)))
group.long 0xE70++0x03
line.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
bitfld.long 0x00 30.--31. " NS_ACCESS463 ,Controls Non-secure access of the interrupt with ID463" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS462 ,Controls Non-secure access of the interrupt with ID462" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS461 ,Controls Non-secure access of the interrupt with ID461" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS460 ,Controls Non-secure access of the interrupt with ID460" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS459 ,Controls Non-secure access of the interrupt with ID459" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS458 ,Controls Non-secure access of the interrupt with ID458" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS457 ,Controls Non-secure access of the interrupt with ID457" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS456 ,Controls Non-secure access of the interrupt with ID456" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS455 ,Controls Non-secure access of the interrupt with ID455" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS454 ,Controls Non-secure access of the interrupt with ID454" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS453 ,Controls Non-secure access of the interrupt with ID453" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS452 ,Controls Non-secure access of the interrupt with ID452" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS451 ,Controls Non-secure access of the interrupt with ID451" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS450 ,Controls Non-secure access of the interrupt with ID450" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS449 ,Controls Non-secure access of the interrupt with ID449" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS448 ,Controls Non-secure access of the interrupt with ID448" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE70++0x03
hide.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE74)))
group.long 0xE74++0x03
line.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
bitfld.long 0x00 30.--31. " NS_ACCESS479 ,Controls Non-secure access of the interrupt with ID479" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS478 ,Controls Non-secure access of the interrupt with ID478" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS477 ,Controls Non-secure access of the interrupt with ID477" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS476 ,Controls Non-secure access of the interrupt with ID476" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS475 ,Controls Non-secure access of the interrupt with ID475" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS474 ,Controls Non-secure access of the interrupt with ID474" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS473 ,Controls Non-secure access of the interrupt with ID473" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS472 ,Controls Non-secure access of the interrupt with ID472" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS471 ,Controls Non-secure access of the interrupt with ID471" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS470 ,Controls Non-secure access of the interrupt with ID470" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS469 ,Controls Non-secure access of the interrupt with ID469" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS468 ,Controls Non-secure access of the interrupt with ID468" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS467 ,Controls Non-secure access of the interrupt with ID467" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS466 ,Controls Non-secure access of the interrupt with ID466" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS465 ,Controls Non-secure access of the interrupt with ID465" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS464 ,Controls Non-secure access of the interrupt with ID464" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE74++0x03
hide.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE78)))
group.long 0xE78++0x03
line.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
bitfld.long 0x00 30.--31. " NS_ACCESS495 ,Controls Non-secure access of the interrupt with ID495" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS494 ,Controls Non-secure access of the interrupt with ID494" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS493 ,Controls Non-secure access of the interrupt with ID493" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS492 ,Controls Non-secure access of the interrupt with ID492" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS491 ,Controls Non-secure access of the interrupt with ID491" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS490 ,Controls Non-secure access of the interrupt with ID490" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS489 ,Controls Non-secure access of the interrupt with ID489" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS488 ,Controls Non-secure access of the interrupt with ID488" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS487 ,Controls Non-secure access of the interrupt with ID487" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS486 ,Controls Non-secure access of the interrupt with ID486" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS485 ,Controls Non-secure access of the interrupt with ID485" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS484 ,Controls Non-secure access of the interrupt with ID484" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS483 ,Controls Non-secure access of the interrupt with ID483" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS482 ,Controls Non-secure access of the interrupt with ID482" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS481 ,Controls Non-secure access of the interrupt with ID481" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS480 ,Controls Non-secure access of the interrupt with ID480" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE78++0x03
hide.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE7C)))
group.long 0xE7C++0x03
line.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
bitfld.long 0x00 30.--31. " NS_ACCESS511 ,Controls Non-secure access of the interrupt with ID511" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS510 ,Controls Non-secure access of the interrupt with ID510" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS509 ,Controls Non-secure access of the interrupt with ID509" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS508 ,Controls Non-secure access of the interrupt with ID508" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS507 ,Controls Non-secure access of the interrupt with ID507" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS506 ,Controls Non-secure access of the interrupt with ID506" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS505 ,Controls Non-secure access of the interrupt with ID505" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS504 ,Controls Non-secure access of the interrupt with ID504" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS503 ,Controls Non-secure access of the interrupt with ID503" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS502 ,Controls Non-secure access of the interrupt with ID502" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS501 ,Controls Non-secure access of the interrupt with ID501" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS500 ,Controls Non-secure access of the interrupt with ID500" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS499 ,Controls Non-secure access of the interrupt with ID499" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS498 ,Controls Non-secure access of the interrupt with ID498" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS497 ,Controls Non-secure access of the interrupt with ID497" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS496 ,Controls Non-secure access of the interrupt with ID496" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE7C++0x03
hide.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE80)))
group.long 0xE80++0x03
line.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
bitfld.long 0x00 30.--31. " NS_ACCESS527 ,Controls Non-secure access of the interrupt with ID527" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS526 ,Controls Non-secure access of the interrupt with ID526" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS525 ,Controls Non-secure access of the interrupt with ID525" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS524 ,Controls Non-secure access of the interrupt with ID524" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS523 ,Controls Non-secure access of the interrupt with ID523" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS522 ,Controls Non-secure access of the interrupt with ID522" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS521 ,Controls Non-secure access of the interrupt with ID521" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS520 ,Controls Non-secure access of the interrupt with ID520" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS519 ,Controls Non-secure access of the interrupt with ID519" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS518 ,Controls Non-secure access of the interrupt with ID518" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS517 ,Controls Non-secure access of the interrupt with ID517" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS516 ,Controls Non-secure access of the interrupt with ID516" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS515 ,Controls Non-secure access of the interrupt with ID515" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS514 ,Controls Non-secure access of the interrupt with ID514" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS513 ,Controls Non-secure access of the interrupt with ID513" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS512 ,Controls Non-secure access of the interrupt with ID512" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE80++0x03
hide.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE84)))
group.long 0xE84++0x03
line.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
bitfld.long 0x00 30.--31. " NS_ACCESS543 ,Controls Non-secure access of the interrupt with ID543" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS542 ,Controls Non-secure access of the interrupt with ID542" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS541 ,Controls Non-secure access of the interrupt with ID541" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS540 ,Controls Non-secure access of the interrupt with ID540" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS539 ,Controls Non-secure access of the interrupt with ID539" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS538 ,Controls Non-secure access of the interrupt with ID538" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS537 ,Controls Non-secure access of the interrupt with ID537" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS536 ,Controls Non-secure access of the interrupt with ID536" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS535 ,Controls Non-secure access of the interrupt with ID535" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS534 ,Controls Non-secure access of the interrupt with ID534" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS533 ,Controls Non-secure access of the interrupt with ID533" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS532 ,Controls Non-secure access of the interrupt with ID532" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS531 ,Controls Non-secure access of the interrupt with ID531" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS530 ,Controls Non-secure access of the interrupt with ID530" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS529 ,Controls Non-secure access of the interrupt with ID529" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS528 ,Controls Non-secure access of the interrupt with ID528" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE84++0x03
hide.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE88)))
group.long 0xE88++0x03
line.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
bitfld.long 0x00 30.--31. " NS_ACCESS559 ,Controls Non-secure access of the interrupt with ID559" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS558 ,Controls Non-secure access of the interrupt with ID558" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS557 ,Controls Non-secure access of the interrupt with ID557" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS556 ,Controls Non-secure access of the interrupt with ID556" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS555 ,Controls Non-secure access of the interrupt with ID555" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS554 ,Controls Non-secure access of the interrupt with ID554" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS553 ,Controls Non-secure access of the interrupt with ID553" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS552 ,Controls Non-secure access of the interrupt with ID552" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS551 ,Controls Non-secure access of the interrupt with ID551" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS550 ,Controls Non-secure access of the interrupt with ID550" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS549 ,Controls Non-secure access of the interrupt with ID549" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS548 ,Controls Non-secure access of the interrupt with ID548" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS547 ,Controls Non-secure access of the interrupt with ID547" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS546 ,Controls Non-secure access of the interrupt with ID546" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS545 ,Controls Non-secure access of the interrupt with ID545" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS544 ,Controls Non-secure access of the interrupt with ID544" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE88++0x03
hide.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8C)))
group.long 0xE8C++0x03
line.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
bitfld.long 0x00 30.--31. " NS_ACCESS575 ,Controls Non-secure access of the interrupt with ID575" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS574 ,Controls Non-secure access of the interrupt with ID574" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS573 ,Controls Non-secure access of the interrupt with ID573" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS572 ,Controls Non-secure access of the interrupt with ID572" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS571 ,Controls Non-secure access of the interrupt with ID571" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS570 ,Controls Non-secure access of the interrupt with ID570" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS569 ,Controls Non-secure access of the interrupt with ID569" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS568 ,Controls Non-secure access of the interrupt with ID568" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS567 ,Controls Non-secure access of the interrupt with ID567" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS566 ,Controls Non-secure access of the interrupt with ID566" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS565 ,Controls Non-secure access of the interrupt with ID565" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS564 ,Controls Non-secure access of the interrupt with ID564" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS563 ,Controls Non-secure access of the interrupt with ID563" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS562 ,Controls Non-secure access of the interrupt with ID562" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS561 ,Controls Non-secure access of the interrupt with ID561" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS560 ,Controls Non-secure access of the interrupt with ID560" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE8C++0x03
hide.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE90)))
group.long 0xE90++0x03
line.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
bitfld.long 0x00 30.--31. " NS_ACCESS591 ,Controls Non-secure access of the interrupt with ID591" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS590 ,Controls Non-secure access of the interrupt with ID590" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS589 ,Controls Non-secure access of the interrupt with ID589" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS588 ,Controls Non-secure access of the interrupt with ID588" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS587 ,Controls Non-secure access of the interrupt with ID587" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS586 ,Controls Non-secure access of the interrupt with ID586" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS585 ,Controls Non-secure access of the interrupt with ID585" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS584 ,Controls Non-secure access of the interrupt with ID584" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS583 ,Controls Non-secure access of the interrupt with ID583" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS582 ,Controls Non-secure access of the interrupt with ID582" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS581 ,Controls Non-secure access of the interrupt with ID581" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS580 ,Controls Non-secure access of the interrupt with ID580" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS579 ,Controls Non-secure access of the interrupt with ID579" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS578 ,Controls Non-secure access of the interrupt with ID578" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS577 ,Controls Non-secure access of the interrupt with ID577" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS576 ,Controls Non-secure access of the interrupt with ID576" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE90++0x03
hide.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE94)))
group.long 0xE94++0x03
line.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
bitfld.long 0x00 30.--31. " NS_ACCESS607 ,Controls Non-secure access of the interrupt with ID607" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS606 ,Controls Non-secure access of the interrupt with ID606" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS605 ,Controls Non-secure access of the interrupt with ID605" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS604 ,Controls Non-secure access of the interrupt with ID604" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS603 ,Controls Non-secure access of the interrupt with ID603" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS602 ,Controls Non-secure access of the interrupt with ID602" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS601 ,Controls Non-secure access of the interrupt with ID601" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS600 ,Controls Non-secure access of the interrupt with ID600" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS599 ,Controls Non-secure access of the interrupt with ID599" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS598 ,Controls Non-secure access of the interrupt with ID598" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS597 ,Controls Non-secure access of the interrupt with ID597" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS596 ,Controls Non-secure access of the interrupt with ID596" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS595 ,Controls Non-secure access of the interrupt with ID595" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS594 ,Controls Non-secure access of the interrupt with ID594" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS593 ,Controls Non-secure access of the interrupt with ID593" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS592 ,Controls Non-secure access of the interrupt with ID592" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE94++0x03
hide.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE98)))
group.long 0xE98++0x03
line.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
bitfld.long 0x00 30.--31. " NS_ACCESS623 ,Controls Non-secure access of the interrupt with ID623" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS622 ,Controls Non-secure access of the interrupt with ID622" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS621 ,Controls Non-secure access of the interrupt with ID621" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS620 ,Controls Non-secure access of the interrupt with ID620" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS619 ,Controls Non-secure access of the interrupt with ID619" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS618 ,Controls Non-secure access of the interrupt with ID618" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS617 ,Controls Non-secure access of the interrupt with ID617" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS616 ,Controls Non-secure access of the interrupt with ID616" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS615 ,Controls Non-secure access of the interrupt with ID615" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS614 ,Controls Non-secure access of the interrupt with ID614" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS613 ,Controls Non-secure access of the interrupt with ID613" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS612 ,Controls Non-secure access of the interrupt with ID612" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS611 ,Controls Non-secure access of the interrupt with ID611" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS610 ,Controls Non-secure access of the interrupt with ID610" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS609 ,Controls Non-secure access of the interrupt with ID609" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS608 ,Controls Non-secure access of the interrupt with ID608" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE98++0x03
hide.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE9C)))
group.long 0xE9C++0x03
line.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
bitfld.long 0x00 30.--31. " NS_ACCESS639 ,Controls Non-secure access of the interrupt with ID639" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS638 ,Controls Non-secure access of the interrupt with ID638" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS637 ,Controls Non-secure access of the interrupt with ID637" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS636 ,Controls Non-secure access of the interrupt with ID636" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS635 ,Controls Non-secure access of the interrupt with ID635" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS634 ,Controls Non-secure access of the interrupt with ID634" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS633 ,Controls Non-secure access of the interrupt with ID633" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS632 ,Controls Non-secure access of the interrupt with ID632" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS631 ,Controls Non-secure access of the interrupt with ID631" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS630 ,Controls Non-secure access of the interrupt with ID630" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS629 ,Controls Non-secure access of the interrupt with ID629" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS628 ,Controls Non-secure access of the interrupt with ID628" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS627 ,Controls Non-secure access of the interrupt with ID627" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS626 ,Controls Non-secure access of the interrupt with ID626" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS625 ,Controls Non-secure access of the interrupt with ID625" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS624 ,Controls Non-secure access of the interrupt with ID624" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE9C++0x03
hide.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA0)))
group.long 0xEA0++0x03
line.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
bitfld.long 0x00 30.--31. " NS_ACCESS655 ,Controls Non-secure access of the interrupt with ID655" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS654 ,Controls Non-secure access of the interrupt with ID654" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS653 ,Controls Non-secure access of the interrupt with ID653" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS652 ,Controls Non-secure access of the interrupt with ID652" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS651 ,Controls Non-secure access of the interrupt with ID651" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS650 ,Controls Non-secure access of the interrupt with ID650" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS649 ,Controls Non-secure access of the interrupt with ID649" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS648 ,Controls Non-secure access of the interrupt with ID648" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS647 ,Controls Non-secure access of the interrupt with ID647" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS646 ,Controls Non-secure access of the interrupt with ID646" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS645 ,Controls Non-secure access of the interrupt with ID645" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS644 ,Controls Non-secure access of the interrupt with ID644" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS643 ,Controls Non-secure access of the interrupt with ID643" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS642 ,Controls Non-secure access of the interrupt with ID642" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS641 ,Controls Non-secure access of the interrupt with ID641" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS640 ,Controls Non-secure access of the interrupt with ID640" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA0++0x03
hide.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA4)))
group.long 0xEA4++0x03
line.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
bitfld.long 0x00 30.--31. " NS_ACCESS671 ,Controls Non-secure access of the interrupt with ID671" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS670 ,Controls Non-secure access of the interrupt with ID670" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS669 ,Controls Non-secure access of the interrupt with ID669" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS668 ,Controls Non-secure access of the interrupt with ID668" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS667 ,Controls Non-secure access of the interrupt with ID667" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS666 ,Controls Non-secure access of the interrupt with ID666" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS665 ,Controls Non-secure access of the interrupt with ID665" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS664 ,Controls Non-secure access of the interrupt with ID664" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS663 ,Controls Non-secure access of the interrupt with ID663" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS662 ,Controls Non-secure access of the interrupt with ID662" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS661 ,Controls Non-secure access of the interrupt with ID661" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS660 ,Controls Non-secure access of the interrupt with ID660" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS659 ,Controls Non-secure access of the interrupt with ID659" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS658 ,Controls Non-secure access of the interrupt with ID658" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS657 ,Controls Non-secure access of the interrupt with ID657" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS656 ,Controls Non-secure access of the interrupt with ID656" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA4++0x03
hide.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA8)))
group.long 0xEA8++0x03
line.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
bitfld.long 0x00 30.--31. " NS_ACCESS687 ,Controls Non-secure access of the interrupt with ID687" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS686 ,Controls Non-secure access of the interrupt with ID686" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS685 ,Controls Non-secure access of the interrupt with ID685" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS684 ,Controls Non-secure access of the interrupt with ID684" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS683 ,Controls Non-secure access of the interrupt with ID683" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS682 ,Controls Non-secure access of the interrupt with ID682" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS681 ,Controls Non-secure access of the interrupt with ID681" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS680 ,Controls Non-secure access of the interrupt with ID680" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS679 ,Controls Non-secure access of the interrupt with ID679" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS678 ,Controls Non-secure access of the interrupt with ID678" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS677 ,Controls Non-secure access of the interrupt with ID677" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS676 ,Controls Non-secure access of the interrupt with ID676" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS675 ,Controls Non-secure access of the interrupt with ID675" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS674 ,Controls Non-secure access of the interrupt with ID674" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS673 ,Controls Non-secure access of the interrupt with ID673" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS672 ,Controls Non-secure access of the interrupt with ID672" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA8++0x03
hide.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEAC)))
group.long 0xEAC++0x03
line.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
bitfld.long 0x00 30.--31. " NS_ACCESS703 ,Controls Non-secure access of the interrupt with ID703" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS702 ,Controls Non-secure access of the interrupt with ID702" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS701 ,Controls Non-secure access of the interrupt with ID701" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS700 ,Controls Non-secure access of the interrupt with ID700" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS699 ,Controls Non-secure access of the interrupt with ID699" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS698 ,Controls Non-secure access of the interrupt with ID698" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS697 ,Controls Non-secure access of the interrupt with ID697" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS696 ,Controls Non-secure access of the interrupt with ID696" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS695 ,Controls Non-secure access of the interrupt with ID695" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS694 ,Controls Non-secure access of the interrupt with ID694" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS693 ,Controls Non-secure access of the interrupt with ID693" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS692 ,Controls Non-secure access of the interrupt with ID692" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS691 ,Controls Non-secure access of the interrupt with ID691" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS690 ,Controls Non-secure access of the interrupt with ID690" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS689 ,Controls Non-secure access of the interrupt with ID689" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS688 ,Controls Non-secure access of the interrupt with ID688" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEAC++0x03
hide.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB0)))
group.long 0xEB0++0x03
line.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
bitfld.long 0x00 30.--31. " NS_ACCESS719 ,Controls Non-secure access of the interrupt with ID719" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS718 ,Controls Non-secure access of the interrupt with ID718" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS717 ,Controls Non-secure access of the interrupt with ID717" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS716 ,Controls Non-secure access of the interrupt with ID716" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS715 ,Controls Non-secure access of the interrupt with ID715" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS714 ,Controls Non-secure access of the interrupt with ID714" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS713 ,Controls Non-secure access of the interrupt with ID713" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS712 ,Controls Non-secure access of the interrupt with ID712" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS711 ,Controls Non-secure access of the interrupt with ID711" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS710 ,Controls Non-secure access of the interrupt with ID710" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS709 ,Controls Non-secure access of the interrupt with ID709" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS708 ,Controls Non-secure access of the interrupt with ID708" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS707 ,Controls Non-secure access of the interrupt with ID707" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS706 ,Controls Non-secure access of the interrupt with ID706" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS705 ,Controls Non-secure access of the interrupt with ID705" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS704 ,Controls Non-secure access of the interrupt with ID704" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB0++0x03
hide.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB4)))
group.long 0xEB4++0x03
line.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
bitfld.long 0x00 30.--31. " NS_ACCESS735 ,Controls Non-secure access of the interrupt with ID735" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS734 ,Controls Non-secure access of the interrupt with ID734" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS733 ,Controls Non-secure access of the interrupt with ID733" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS732 ,Controls Non-secure access of the interrupt with ID732" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS731 ,Controls Non-secure access of the interrupt with ID731" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS730 ,Controls Non-secure access of the interrupt with ID730" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS729 ,Controls Non-secure access of the interrupt with ID729" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS728 ,Controls Non-secure access of the interrupt with ID728" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS727 ,Controls Non-secure access of the interrupt with ID727" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS726 ,Controls Non-secure access of the interrupt with ID726" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS725 ,Controls Non-secure access of the interrupt with ID725" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS724 ,Controls Non-secure access of the interrupt with ID724" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS723 ,Controls Non-secure access of the interrupt with ID723" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS722 ,Controls Non-secure access of the interrupt with ID722" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS721 ,Controls Non-secure access of the interrupt with ID721" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS720 ,Controls Non-secure access of the interrupt with ID720" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB4++0x03
hide.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB8)))
group.long 0xEB8++0x03
line.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
bitfld.long 0x00 30.--31. " NS_ACCESS751 ,Controls Non-secure access of the interrupt with ID751" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS750 ,Controls Non-secure access of the interrupt with ID750" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS749 ,Controls Non-secure access of the interrupt with ID749" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS748 ,Controls Non-secure access of the interrupt with ID748" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS747 ,Controls Non-secure access of the interrupt with ID747" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS746 ,Controls Non-secure access of the interrupt with ID746" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS745 ,Controls Non-secure access of the interrupt with ID745" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS744 ,Controls Non-secure access of the interrupt with ID744" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS743 ,Controls Non-secure access of the interrupt with ID743" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS742 ,Controls Non-secure access of the interrupt with ID742" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS741 ,Controls Non-secure access of the interrupt with ID741" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS740 ,Controls Non-secure access of the interrupt with ID740" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS739 ,Controls Non-secure access of the interrupt with ID739" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS738 ,Controls Non-secure access of the interrupt with ID738" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS737 ,Controls Non-secure access of the interrupt with ID737" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS736 ,Controls Non-secure access of the interrupt with ID736" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB8++0x03
hide.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEBC)))
group.long 0xEBC++0x03
line.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
bitfld.long 0x00 30.--31. " NS_ACCESS767 ,Controls Non-secure access of the interrupt with ID767" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS766 ,Controls Non-secure access of the interrupt with ID766" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS765 ,Controls Non-secure access of the interrupt with ID765" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS764 ,Controls Non-secure access of the interrupt with ID764" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS763 ,Controls Non-secure access of the interrupt with ID763" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS762 ,Controls Non-secure access of the interrupt with ID762" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS761 ,Controls Non-secure access of the interrupt with ID761" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS760 ,Controls Non-secure access of the interrupt with ID760" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS759 ,Controls Non-secure access of the interrupt with ID759" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS758 ,Controls Non-secure access of the interrupt with ID758" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS757 ,Controls Non-secure access of the interrupt with ID757" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS756 ,Controls Non-secure access of the interrupt with ID756" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS755 ,Controls Non-secure access of the interrupt with ID755" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS754 ,Controls Non-secure access of the interrupt with ID754" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS753 ,Controls Non-secure access of the interrupt with ID753" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS752 ,Controls Non-secure access of the interrupt with ID752" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEBC++0x03
hide.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC0)))
group.long 0xEC0++0x03
line.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
bitfld.long 0x00 30.--31. " NS_ACCESS783 ,Controls Non-secure access of the interrupt with ID783" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS782 ,Controls Non-secure access of the interrupt with ID782" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS781 ,Controls Non-secure access of the interrupt with ID781" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS780 ,Controls Non-secure access of the interrupt with ID780" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS779 ,Controls Non-secure access of the interrupt with ID779" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS778 ,Controls Non-secure access of the interrupt with ID778" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS777 ,Controls Non-secure access of the interrupt with ID777" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS776 ,Controls Non-secure access of the interrupt with ID776" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS775 ,Controls Non-secure access of the interrupt with ID775" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS774 ,Controls Non-secure access of the interrupt with ID774" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS773 ,Controls Non-secure access of the interrupt with ID773" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS772 ,Controls Non-secure access of the interrupt with ID772" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS771 ,Controls Non-secure access of the interrupt with ID771" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS770 ,Controls Non-secure access of the interrupt with ID770" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS769 ,Controls Non-secure access of the interrupt with ID769" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS768 ,Controls Non-secure access of the interrupt with ID768" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC0++0x03
hide.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC4)))
group.long 0xEC4++0x03
line.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
bitfld.long 0x00 30.--31. " NS_ACCESS799 ,Controls Non-secure access of the interrupt with ID799" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS798 ,Controls Non-secure access of the interrupt with ID798" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS797 ,Controls Non-secure access of the interrupt with ID797" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS796 ,Controls Non-secure access of the interrupt with ID796" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS795 ,Controls Non-secure access of the interrupt with ID795" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS794 ,Controls Non-secure access of the interrupt with ID794" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS793 ,Controls Non-secure access of the interrupt with ID793" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS792 ,Controls Non-secure access of the interrupt with ID792" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS791 ,Controls Non-secure access of the interrupt with ID791" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS790 ,Controls Non-secure access of the interrupt with ID790" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS789 ,Controls Non-secure access of the interrupt with ID789" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS788 ,Controls Non-secure access of the interrupt with ID788" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS787 ,Controls Non-secure access of the interrupt with ID787" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS786 ,Controls Non-secure access of the interrupt with ID786" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS785 ,Controls Non-secure access of the interrupt with ID785" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS784 ,Controls Non-secure access of the interrupt with ID784" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC4++0x03
hide.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC8)))
group.long 0xEC8++0x03
line.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
bitfld.long 0x00 30.--31. " NS_ACCESS815 ,Controls Non-secure access of the interrupt with ID815" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS814 ,Controls Non-secure access of the interrupt with ID814" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS813 ,Controls Non-secure access of the interrupt with ID813" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS812 ,Controls Non-secure access of the interrupt with ID812" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS811 ,Controls Non-secure access of the interrupt with ID811" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS810 ,Controls Non-secure access of the interrupt with ID810" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS809 ,Controls Non-secure access of the interrupt with ID809" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS808 ,Controls Non-secure access of the interrupt with ID808" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS807 ,Controls Non-secure access of the interrupt with ID807" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS806 ,Controls Non-secure access of the interrupt with ID806" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS805 ,Controls Non-secure access of the interrupt with ID805" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS804 ,Controls Non-secure access of the interrupt with ID804" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS803 ,Controls Non-secure access of the interrupt with ID803" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS802 ,Controls Non-secure access of the interrupt with ID802" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS801 ,Controls Non-secure access of the interrupt with ID801" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS800 ,Controls Non-secure access of the interrupt with ID800" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC8++0x03
hide.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xECC)))
group.long 0xECC++0x03
line.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
bitfld.long 0x00 30.--31. " NS_ACCESS831 ,Controls Non-secure access of the interrupt with ID831" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS830 ,Controls Non-secure access of the interrupt with ID830" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS829 ,Controls Non-secure access of the interrupt with ID829" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS828 ,Controls Non-secure access of the interrupt with ID828" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS827 ,Controls Non-secure access of the interrupt with ID827" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS826 ,Controls Non-secure access of the interrupt with ID826" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS825 ,Controls Non-secure access of the interrupt with ID825" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS824 ,Controls Non-secure access of the interrupt with ID824" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS823 ,Controls Non-secure access of the interrupt with ID823" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS822 ,Controls Non-secure access of the interrupt with ID822" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS821 ,Controls Non-secure access of the interrupt with ID821" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS820 ,Controls Non-secure access of the interrupt with ID820" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS819 ,Controls Non-secure access of the interrupt with ID819" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS818 ,Controls Non-secure access of the interrupt with ID818" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS817 ,Controls Non-secure access of the interrupt with ID817" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS816 ,Controls Non-secure access of the interrupt with ID816" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xECC++0x03
hide.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED0)))
group.long 0xED0++0x03
line.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
bitfld.long 0x00 30.--31. " NS_ACCESS847 ,Controls Non-secure access of the interrupt with ID847" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS846 ,Controls Non-secure access of the interrupt with ID846" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS845 ,Controls Non-secure access of the interrupt with ID845" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS844 ,Controls Non-secure access of the interrupt with ID844" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS843 ,Controls Non-secure access of the interrupt with ID843" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS842 ,Controls Non-secure access of the interrupt with ID842" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS841 ,Controls Non-secure access of the interrupt with ID841" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS840 ,Controls Non-secure access of the interrupt with ID840" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS839 ,Controls Non-secure access of the interrupt with ID839" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS838 ,Controls Non-secure access of the interrupt with ID838" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS837 ,Controls Non-secure access of the interrupt with ID837" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS836 ,Controls Non-secure access of the interrupt with ID836" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS835 ,Controls Non-secure access of the interrupt with ID835" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS834 ,Controls Non-secure access of the interrupt with ID834" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS833 ,Controls Non-secure access of the interrupt with ID833" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS832 ,Controls Non-secure access of the interrupt with ID832" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED0++0x03
hide.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED4)))
group.long 0xED4++0x03
line.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
bitfld.long 0x00 30.--31. " NS_ACCESS863 ,Controls Non-secure access of the interrupt with ID863" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS862 ,Controls Non-secure access of the interrupt with ID862" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS861 ,Controls Non-secure access of the interrupt with ID861" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS860 ,Controls Non-secure access of the interrupt with ID860" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS859 ,Controls Non-secure access of the interrupt with ID859" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS858 ,Controls Non-secure access of the interrupt with ID858" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS857 ,Controls Non-secure access of the interrupt with ID857" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS856 ,Controls Non-secure access of the interrupt with ID856" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS855 ,Controls Non-secure access of the interrupt with ID855" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS854 ,Controls Non-secure access of the interrupt with ID854" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS853 ,Controls Non-secure access of the interrupt with ID853" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS852 ,Controls Non-secure access of the interrupt with ID852" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS851 ,Controls Non-secure access of the interrupt with ID851" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS850 ,Controls Non-secure access of the interrupt with ID850" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS849 ,Controls Non-secure access of the interrupt with ID849" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS848 ,Controls Non-secure access of the interrupt with ID848" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED4++0x03
hide.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED8)))
group.long 0xED8++0x03
line.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
bitfld.long 0x00 30.--31. " NS_ACCESS879 ,Controls Non-secure access of the interrupt with ID879" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS878 ,Controls Non-secure access of the interrupt with ID878" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS877 ,Controls Non-secure access of the interrupt with ID877" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS876 ,Controls Non-secure access of the interrupt with ID876" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS875 ,Controls Non-secure access of the interrupt with ID875" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS874 ,Controls Non-secure access of the interrupt with ID874" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS873 ,Controls Non-secure access of the interrupt with ID873" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS872 ,Controls Non-secure access of the interrupt with ID872" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS871 ,Controls Non-secure access of the interrupt with ID871" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS870 ,Controls Non-secure access of the interrupt with ID870" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS869 ,Controls Non-secure access of the interrupt with ID869" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS868 ,Controls Non-secure access of the interrupt with ID868" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS867 ,Controls Non-secure access of the interrupt with ID867" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS866 ,Controls Non-secure access of the interrupt with ID866" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS865 ,Controls Non-secure access of the interrupt with ID865" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS864 ,Controls Non-secure access of the interrupt with ID864" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED8++0x03
hide.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEDC)))
group.long 0xEDC++0x03
line.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
bitfld.long 0x00 30.--31. " NS_ACCESS895 ,Controls Non-secure access of the interrupt with ID895" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS894 ,Controls Non-secure access of the interrupt with ID894" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS893 ,Controls Non-secure access of the interrupt with ID893" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS892 ,Controls Non-secure access of the interrupt with ID892" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS891 ,Controls Non-secure access of the interrupt with ID891" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS890 ,Controls Non-secure access of the interrupt with ID890" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS889 ,Controls Non-secure access of the interrupt with ID889" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS888 ,Controls Non-secure access of the interrupt with ID888" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS887 ,Controls Non-secure access of the interrupt with ID887" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS886 ,Controls Non-secure access of the interrupt with ID886" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS885 ,Controls Non-secure access of the interrupt with ID885" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS884 ,Controls Non-secure access of the interrupt with ID884" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS883 ,Controls Non-secure access of the interrupt with ID883" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS882 ,Controls Non-secure access of the interrupt with ID882" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS881 ,Controls Non-secure access of the interrupt with ID881" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS880 ,Controls Non-secure access of the interrupt with ID880" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEDC++0x03
hide.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE0)))
group.long 0xEE0++0x03
line.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
bitfld.long 0x00 30.--31. " NS_ACCESS911 ,Controls Non-secure access of the interrupt with ID911" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS910 ,Controls Non-secure access of the interrupt with ID910" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS909 ,Controls Non-secure access of the interrupt with ID909" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS908 ,Controls Non-secure access of the interrupt with ID908" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS907 ,Controls Non-secure access of the interrupt with ID907" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS906 ,Controls Non-secure access of the interrupt with ID906" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS905 ,Controls Non-secure access of the interrupt with ID905" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS904 ,Controls Non-secure access of the interrupt with ID904" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS903 ,Controls Non-secure access of the interrupt with ID903" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS902 ,Controls Non-secure access of the interrupt with ID902" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS901 ,Controls Non-secure access of the interrupt with ID901" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS900 ,Controls Non-secure access of the interrupt with ID900" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS899 ,Controls Non-secure access of the interrupt with ID899" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS898 ,Controls Non-secure access of the interrupt with ID898" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS897 ,Controls Non-secure access of the interrupt with ID897" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS896 ,Controls Non-secure access of the interrupt with ID896" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE0++0x03
hide.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE4)))
group.long 0xEE4++0x03
line.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
bitfld.long 0x00 30.--31. " NS_ACCESS927 ,Controls Non-secure access of the interrupt with ID927" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS926 ,Controls Non-secure access of the interrupt with ID926" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS925 ,Controls Non-secure access of the interrupt with ID925" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS924 ,Controls Non-secure access of the interrupt with ID924" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS923 ,Controls Non-secure access of the interrupt with ID923" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS922 ,Controls Non-secure access of the interrupt with ID922" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS921 ,Controls Non-secure access of the interrupt with ID921" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS920 ,Controls Non-secure access of the interrupt with ID920" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS919 ,Controls Non-secure access of the interrupt with ID919" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS918 ,Controls Non-secure access of the interrupt with ID918" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS917 ,Controls Non-secure access of the interrupt with ID917" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS916 ,Controls Non-secure access of the interrupt with ID916" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS915 ,Controls Non-secure access of the interrupt with ID915" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS914 ,Controls Non-secure access of the interrupt with ID914" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS913 ,Controls Non-secure access of the interrupt with ID913" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS912 ,Controls Non-secure access of the interrupt with ID912" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE4++0x03
hide.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE8)))
group.long 0xEE8++0x03
line.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
bitfld.long 0x00 30.--31. " NS_ACCESS943 ,Controls Non-secure access of the interrupt with ID943" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS942 ,Controls Non-secure access of the interrupt with ID942" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS941 ,Controls Non-secure access of the interrupt with ID941" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS940 ,Controls Non-secure access of the interrupt with ID940" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS939 ,Controls Non-secure access of the interrupt with ID939" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS938 ,Controls Non-secure access of the interrupt with ID938" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS937 ,Controls Non-secure access of the interrupt with ID937" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS936 ,Controls Non-secure access of the interrupt with ID936" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS935 ,Controls Non-secure access of the interrupt with ID935" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS934 ,Controls Non-secure access of the interrupt with ID934" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS933 ,Controls Non-secure access of the interrupt with ID933" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS932 ,Controls Non-secure access of the interrupt with ID932" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS931 ,Controls Non-secure access of the interrupt with ID931" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS930 ,Controls Non-secure access of the interrupt with ID930" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS929 ,Controls Non-secure access of the interrupt with ID929" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS928 ,Controls Non-secure access of the interrupt with ID928" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE8++0x03
hide.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEEC)))
group.long 0xEEC++0x03
line.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
bitfld.long 0x00 30.--31. " NS_ACCESS959 ,Controls Non-secure access of the interrupt with ID959" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS958 ,Controls Non-secure access of the interrupt with ID958" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS957 ,Controls Non-secure access of the interrupt with ID957" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS956 ,Controls Non-secure access of the interrupt with ID956" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS955 ,Controls Non-secure access of the interrupt with ID955" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS954 ,Controls Non-secure access of the interrupt with ID954" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS953 ,Controls Non-secure access of the interrupt with ID953" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS952 ,Controls Non-secure access of the interrupt with ID952" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS951 ,Controls Non-secure access of the interrupt with ID951" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS950 ,Controls Non-secure access of the interrupt with ID950" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS949 ,Controls Non-secure access of the interrupt with ID949" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS948 ,Controls Non-secure access of the interrupt with ID948" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS947 ,Controls Non-secure access of the interrupt with ID947" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS946 ,Controls Non-secure access of the interrupt with ID946" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS945 ,Controls Non-secure access of the interrupt with ID945" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS944 ,Controls Non-secure access of the interrupt with ID944" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEEC++0x03
hide.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF0)))
group.long 0xEF0++0x03
line.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
bitfld.long 0x00 30.--31. " NS_ACCESS975 ,Controls Non-secure access of the interrupt with ID975" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS974 ,Controls Non-secure access of the interrupt with ID974" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS973 ,Controls Non-secure access of the interrupt with ID973" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS972 ,Controls Non-secure access of the interrupt with ID972" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS971 ,Controls Non-secure access of the interrupt with ID971" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS970 ,Controls Non-secure access of the interrupt with ID970" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS969 ,Controls Non-secure access of the interrupt with ID969" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS968 ,Controls Non-secure access of the interrupt with ID968" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS967 ,Controls Non-secure access of the interrupt with ID967" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS966 ,Controls Non-secure access of the interrupt with ID966" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS965 ,Controls Non-secure access of the interrupt with ID965" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS964 ,Controls Non-secure access of the interrupt with ID964" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS963 ,Controls Non-secure access of the interrupt with ID963" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS962 ,Controls Non-secure access of the interrupt with ID962" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS961 ,Controls Non-secure access of the interrupt with ID961" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS960 ,Controls Non-secure access of the interrupt with ID960" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF0++0x03
hide.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF4)))
group.long 0xEF4++0x03
line.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
bitfld.long 0x00 30.--31. " NS_ACCESS991 ,Controls Non-secure access of the interrupt with ID991" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS990 ,Controls Non-secure access of the interrupt with ID990" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS989 ,Controls Non-secure access of the interrupt with ID989" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS988 ,Controls Non-secure access of the interrupt with ID988" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS987 ,Controls Non-secure access of the interrupt with ID987" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS986 ,Controls Non-secure access of the interrupt with ID986" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS985 ,Controls Non-secure access of the interrupt with ID985" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS984 ,Controls Non-secure access of the interrupt with ID984" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS983 ,Controls Non-secure access of the interrupt with ID983" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS982 ,Controls Non-secure access of the interrupt with ID982" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS981 ,Controls Non-secure access of the interrupt with ID981" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS980 ,Controls Non-secure access of the interrupt with ID980" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS979 ,Controls Non-secure access of the interrupt with ID979" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS978 ,Controls Non-secure access of the interrupt with ID978" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS977 ,Controls Non-secure access of the interrupt with ID977" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS976 ,Controls Non-secure access of the interrupt with ID976" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF4++0x03
hide.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
endif
tree.end
width 25.
tree "Software Generated Interrupt"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0F00++0x03
hide.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
hgroup.long 0xF10++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
hgroup.long 0xF14++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
hgroup.long 0xF18++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
hgroup.long 0xF1C++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
hgroup.long 0xF20++0x03
hide.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
hgroup.long 0xF24++0x03
hide.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
hgroup.long 0xF28++0x03
hide.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
hgroup.long 0xF2C++0x03
hide.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
else
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
group.long 0xF10++0x03
line.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
group.long 0xF14++0x03
line.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
group.long 0xF18++0x03
line.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
group.long 0xF1C++0x03
line.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
group.long 0xF20++0x03
line.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
group.long 0xF24++0x03
line.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
group.long 0xF28++0x03
line.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
group.long 0xF2C++0x03
line.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
endif
tree.end
width 24.
tree "Interrupt Routing Registers"
group.quad 0x6100++0x07
line.quad 0x00 "GICD_IROUTER32 ,Interrupt Routing Register 32 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6108++0x07
line.quad 0x00 "GICD_IROUTER33 ,Interrupt Routing Register 33 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6110++0x07
line.quad 0x00 "GICD_IROUTER34 ,Interrupt Routing Register 34 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6118++0x07
line.quad 0x00 "GICD_IROUTER35 ,Interrupt Routing Register 35 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6120++0x07
line.quad 0x00 "GICD_IROUTER36 ,Interrupt Routing Register 36 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6128++0x07
line.quad 0x00 "GICD_IROUTER37 ,Interrupt Routing Register 37 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6130++0x07
line.quad 0x00 "GICD_IROUTER38 ,Interrupt Routing Register 38 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6138++0x07
line.quad 0x00 "GICD_IROUTER39 ,Interrupt Routing Register 39 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6140++0x07
line.quad 0x00 "GICD_IROUTER40 ,Interrupt Routing Register 40 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6148++0x07
line.quad 0x00 "GICD_IROUTER41 ,Interrupt Routing Register 41 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6150++0x07
line.quad 0x00 "GICD_IROUTER42 ,Interrupt Routing Register 42 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6158++0x07
line.quad 0x00 "GICD_IROUTER43 ,Interrupt Routing Register 43 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6160++0x07
line.quad 0x00 "GICD_IROUTER44 ,Interrupt Routing Register 44 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6168++0x07
line.quad 0x00 "GICD_IROUTER45 ,Interrupt Routing Register 45 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6170++0x07
line.quad 0x00 "GICD_IROUTER46 ,Interrupt Routing Register 46 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6178++0x07
line.quad 0x00 "GICD_IROUTER47 ,Interrupt Routing Register 47 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6180++0x07
line.quad 0x00 "GICD_IROUTER48 ,Interrupt Routing Register 48 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6188++0x07
line.quad 0x00 "GICD_IROUTER49 ,Interrupt Routing Register 49 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6190++0x07
line.quad 0x00 "GICD_IROUTER50 ,Interrupt Routing Register 50 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6198++0x07
line.quad 0x00 "GICD_IROUTER51 ,Interrupt Routing Register 51 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A0++0x07
line.quad 0x00 "GICD_IROUTER52 ,Interrupt Routing Register 52 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A8++0x07
line.quad 0x00 "GICD_IROUTER53 ,Interrupt Routing Register 53 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B0++0x07
line.quad 0x00 "GICD_IROUTER54 ,Interrupt Routing Register 54 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B8++0x07
line.quad 0x00 "GICD_IROUTER55 ,Interrupt Routing Register 55 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C0++0x07
line.quad 0x00 "GICD_IROUTER56 ,Interrupt Routing Register 56 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C8++0x07
line.quad 0x00 "GICD_IROUTER57 ,Interrupt Routing Register 57 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D0++0x07
line.quad 0x00 "GICD_IROUTER58 ,Interrupt Routing Register 58 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D8++0x07
line.quad 0x00 "GICD_IROUTER59 ,Interrupt Routing Register 59 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E0++0x07
line.quad 0x00 "GICD_IROUTER60 ,Interrupt Routing Register 60 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E8++0x07
line.quad 0x00 "GICD_IROUTER61 ,Interrupt Routing Register 61 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F0++0x07
line.quad 0x00 "GICD_IROUTER62 ,Interrupt Routing Register 62 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F8++0x07
line.quad 0x00 "GICD_IROUTER63 ,Interrupt Routing Register 63 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6200++0x07
line.quad 0x00 "GICD_IROUTER64 ,Interrupt Routing Register 64 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6208++0x07
line.quad 0x00 "GICD_IROUTER65 ,Interrupt Routing Register 65 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6210++0x07
line.quad 0x00 "GICD_IROUTER66 ,Interrupt Routing Register 66 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6218++0x07
line.quad 0x00 "GICD_IROUTER67 ,Interrupt Routing Register 67 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6220++0x07
line.quad 0x00 "GICD_IROUTER68 ,Interrupt Routing Register 68 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6228++0x07
line.quad 0x00 "GICD_IROUTER69 ,Interrupt Routing Register 69 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6230++0x07
line.quad 0x00 "GICD_IROUTER70 ,Interrupt Routing Register 70 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6238++0x07
line.quad 0x00 "GICD_IROUTER71 ,Interrupt Routing Register 71 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6240++0x07
line.quad 0x00 "GICD_IROUTER72 ,Interrupt Routing Register 72 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6248++0x07
line.quad 0x00 "GICD_IROUTER73 ,Interrupt Routing Register 73 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6250++0x07
line.quad 0x00 "GICD_IROUTER74 ,Interrupt Routing Register 74 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6258++0x07
line.quad 0x00 "GICD_IROUTER75 ,Interrupt Routing Register 75 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6260++0x07
line.quad 0x00 "GICD_IROUTER76 ,Interrupt Routing Register 76 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6268++0x07
line.quad 0x00 "GICD_IROUTER77 ,Interrupt Routing Register 77 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6270++0x07
line.quad 0x00 "GICD_IROUTER78 ,Interrupt Routing Register 78 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6278++0x07
line.quad 0x00 "GICD_IROUTER79 ,Interrupt Routing Register 79 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6280++0x07
line.quad 0x00 "GICD_IROUTER80 ,Interrupt Routing Register 80 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6288++0x07
line.quad 0x00 "GICD_IROUTER81 ,Interrupt Routing Register 81 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6290++0x07
line.quad 0x00 "GICD_IROUTER82 ,Interrupt Routing Register 82 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6298++0x07
line.quad 0x00 "GICD_IROUTER83 ,Interrupt Routing Register 83 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A0++0x07
line.quad 0x00 "GICD_IROUTER84 ,Interrupt Routing Register 84 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A8++0x07
line.quad 0x00 "GICD_IROUTER85 ,Interrupt Routing Register 85 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B0++0x07
line.quad 0x00 "GICD_IROUTER86 ,Interrupt Routing Register 86 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B8++0x07
line.quad 0x00 "GICD_IROUTER87 ,Interrupt Routing Register 87 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C0++0x07
line.quad 0x00 "GICD_IROUTER88 ,Interrupt Routing Register 88 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C8++0x07
line.quad 0x00 "GICD_IROUTER89 ,Interrupt Routing Register 89 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D0++0x07
line.quad 0x00 "GICD_IROUTER90 ,Interrupt Routing Register 90 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D8++0x07
line.quad 0x00 "GICD_IROUTER91 ,Interrupt Routing Register 91 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E0++0x07
line.quad 0x00 "GICD_IROUTER92 ,Interrupt Routing Register 92 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E8++0x07
line.quad 0x00 "GICD_IROUTER93 ,Interrupt Routing Register 93 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F0++0x07
line.quad 0x00 "GICD_IROUTER94 ,Interrupt Routing Register 94 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F8++0x07
line.quad 0x00 "GICD_IROUTER95 ,Interrupt Routing Register 95 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6300++0x07
line.quad 0x00 "GICD_IROUTER96 ,Interrupt Routing Register 96 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6308++0x07
line.quad 0x00 "GICD_IROUTER97 ,Interrupt Routing Register 97 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6310++0x07
line.quad 0x00 "GICD_IROUTER98 ,Interrupt Routing Register 98 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6318++0x07
line.quad 0x00 "GICD_IROUTER99 ,Interrupt Routing Register 99 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6320++0x07
line.quad 0x00 "GICD_IROUTER100,Interrupt Routing Register 100"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6328++0x07
line.quad 0x00 "GICD_IROUTER101,Interrupt Routing Register 101"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6330++0x07
line.quad 0x00 "GICD_IROUTER102,Interrupt Routing Register 102"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6338++0x07
line.quad 0x00 "GICD_IROUTER103,Interrupt Routing Register 103"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6340++0x07
line.quad 0x00 "GICD_IROUTER104,Interrupt Routing Register 104"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6348++0x07
line.quad 0x00 "GICD_IROUTER105,Interrupt Routing Register 105"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6350++0x07
line.quad 0x00 "GICD_IROUTER106,Interrupt Routing Register 106"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6358++0x07
line.quad 0x00 "GICD_IROUTER107,Interrupt Routing Register 107"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6360++0x07
line.quad 0x00 "GICD_IROUTER108,Interrupt Routing Register 108"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6368++0x07
line.quad 0x00 "GICD_IROUTER109,Interrupt Routing Register 109"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6370++0x07
line.quad 0x00 "GICD_IROUTER110,Interrupt Routing Register 110"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6378++0x07
line.quad 0x00 "GICD_IROUTER111,Interrupt Routing Register 111"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6380++0x07
line.quad 0x00 "GICD_IROUTER112,Interrupt Routing Register 112"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6388++0x07
line.quad 0x00 "GICD_IROUTER113,Interrupt Routing Register 113"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6390++0x07
line.quad 0x00 "GICD_IROUTER114,Interrupt Routing Register 114"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6398++0x07
line.quad 0x00 "GICD_IROUTER115,Interrupt Routing Register 115"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A0++0x07
line.quad 0x00 "GICD_IROUTER116,Interrupt Routing Register 116"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A8++0x07
line.quad 0x00 "GICD_IROUTER117,Interrupt Routing Register 117"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B0++0x07
line.quad 0x00 "GICD_IROUTER118,Interrupt Routing Register 118"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B8++0x07
line.quad 0x00 "GICD_IROUTER119,Interrupt Routing Register 119"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C0++0x07
line.quad 0x00 "GICD_IROUTER120,Interrupt Routing Register 120"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C8++0x07
line.quad 0x00 "GICD_IROUTER121,Interrupt Routing Register 121"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D0++0x07
line.quad 0x00 "GICD_IROUTER122,Interrupt Routing Register 122"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D8++0x07
line.quad 0x00 "GICD_IROUTER123,Interrupt Routing Register 123"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E0++0x07
line.quad 0x00 "GICD_IROUTER124,Interrupt Routing Register 124"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E8++0x07
line.quad 0x00 "GICD_IROUTER125,Interrupt Routing Register 125"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F0++0x07
line.quad 0x00 "GICD_IROUTER126,Interrupt Routing Register 126"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F8++0x07
line.quad 0x00 "GICD_IROUTER127,Interrupt Routing Register 127"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6400++0x07
line.quad 0x00 "GICD_IROUTER128,Interrupt Routing Register 128"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6408++0x07
line.quad 0x00 "GICD_IROUTER129,Interrupt Routing Register 129"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6410++0x07
line.quad 0x00 "GICD_IROUTER130,Interrupt Routing Register 130"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6418++0x07
line.quad 0x00 "GICD_IROUTER131,Interrupt Routing Register 131"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6420++0x07
line.quad 0x00 "GICD_IROUTER132,Interrupt Routing Register 132"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6428++0x07
line.quad 0x00 "GICD_IROUTER133,Interrupt Routing Register 133"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6430++0x07
line.quad 0x00 "GICD_IROUTER134,Interrupt Routing Register 134"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6438++0x07
line.quad 0x00 "GICD_IROUTER135,Interrupt Routing Register 135"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6440++0x07
line.quad 0x00 "GICD_IROUTER136,Interrupt Routing Register 136"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6448++0x07
line.quad 0x00 "GICD_IROUTER137,Interrupt Routing Register 137"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6450++0x07
line.quad 0x00 "GICD_IROUTER138,Interrupt Routing Register 138"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6458++0x07
line.quad 0x00 "GICD_IROUTER139,Interrupt Routing Register 139"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6460++0x07
line.quad 0x00 "GICD_IROUTER140,Interrupt Routing Register 140"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6468++0x07
line.quad 0x00 "GICD_IROUTER141,Interrupt Routing Register 141"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6470++0x07
line.quad 0x00 "GICD_IROUTER142,Interrupt Routing Register 142"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6478++0x07
line.quad 0x00 "GICD_IROUTER143,Interrupt Routing Register 143"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6480++0x07
line.quad 0x00 "GICD_IROUTER144,Interrupt Routing Register 144"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6488++0x07
line.quad 0x00 "GICD_IROUTER145,Interrupt Routing Register 145"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6490++0x07
line.quad 0x00 "GICD_IROUTER146,Interrupt Routing Register 146"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6498++0x07
line.quad 0x00 "GICD_IROUTER147,Interrupt Routing Register 147"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A0++0x07
line.quad 0x00 "GICD_IROUTER148,Interrupt Routing Register 148"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A8++0x07
line.quad 0x00 "GICD_IROUTER149,Interrupt Routing Register 149"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B0++0x07
line.quad 0x00 "GICD_IROUTER150,Interrupt Routing Register 150"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B8++0x07
line.quad 0x00 "GICD_IROUTER151,Interrupt Routing Register 151"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C0++0x07
line.quad 0x00 "GICD_IROUTER152,Interrupt Routing Register 152"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C8++0x07
line.quad 0x00 "GICD_IROUTER153,Interrupt Routing Register 153"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D0++0x07
line.quad 0x00 "GICD_IROUTER154,Interrupt Routing Register 154"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D8++0x07
line.quad 0x00 "GICD_IROUTER155,Interrupt Routing Register 155"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E0++0x07
line.quad 0x00 "GICD_IROUTER156,Interrupt Routing Register 156"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E8++0x07
line.quad 0x00 "GICD_IROUTER157,Interrupt Routing Register 157"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F0++0x07
line.quad 0x00 "GICD_IROUTER158,Interrupt Routing Register 158"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F8++0x07
line.quad 0x00 "GICD_IROUTER159,Interrupt Routing Register 159"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6500++0x07
line.quad 0x00 "GICD_IROUTER160,Interrupt Routing Register 160"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6508++0x07
line.quad 0x00 "GICD_IROUTER161,Interrupt Routing Register 161"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6510++0x07
line.quad 0x00 "GICD_IROUTER162,Interrupt Routing Register 162"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6518++0x07
line.quad 0x00 "GICD_IROUTER163,Interrupt Routing Register 163"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6520++0x07
line.quad 0x00 "GICD_IROUTER164,Interrupt Routing Register 164"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6528++0x07
line.quad 0x00 "GICD_IROUTER165,Interrupt Routing Register 165"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6530++0x07
line.quad 0x00 "GICD_IROUTER166,Interrupt Routing Register 166"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6538++0x07
line.quad 0x00 "GICD_IROUTER167,Interrupt Routing Register 167"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6540++0x07
line.quad 0x00 "GICD_IROUTER168,Interrupt Routing Register 168"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6548++0x07
line.quad 0x00 "GICD_IROUTER169,Interrupt Routing Register 169"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6550++0x07
line.quad 0x00 "GICD_IROUTER170,Interrupt Routing Register 170"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6558++0x07
line.quad 0x00 "GICD_IROUTER171,Interrupt Routing Register 171"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6560++0x07
line.quad 0x00 "GICD_IROUTER172,Interrupt Routing Register 172"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6568++0x07
line.quad 0x00 "GICD_IROUTER173,Interrupt Routing Register 173"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6570++0x07
line.quad 0x00 "GICD_IROUTER174,Interrupt Routing Register 174"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6578++0x07
line.quad 0x00 "GICD_IROUTER175,Interrupt Routing Register 175"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6580++0x07
line.quad 0x00 "GICD_IROUTER176,Interrupt Routing Register 176"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6588++0x07
line.quad 0x00 "GICD_IROUTER177,Interrupt Routing Register 177"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6590++0x07
line.quad 0x00 "GICD_IROUTER178,Interrupt Routing Register 178"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6598++0x07
line.quad 0x00 "GICD_IROUTER179,Interrupt Routing Register 179"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A0++0x07
line.quad 0x00 "GICD_IROUTER180,Interrupt Routing Register 180"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A8++0x07
line.quad 0x00 "GICD_IROUTER181,Interrupt Routing Register 181"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B0++0x07
line.quad 0x00 "GICD_IROUTER182,Interrupt Routing Register 182"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B8++0x07
line.quad 0x00 "GICD_IROUTER183,Interrupt Routing Register 183"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C0++0x07
line.quad 0x00 "GICD_IROUTER184,Interrupt Routing Register 184"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C8++0x07
line.quad 0x00 "GICD_IROUTER185,Interrupt Routing Register 185"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D0++0x07
line.quad 0x00 "GICD_IROUTER186,Interrupt Routing Register 186"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D8++0x07
line.quad 0x00 "GICD_IROUTER187,Interrupt Routing Register 187"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E0++0x07
line.quad 0x00 "GICD_IROUTER188,Interrupt Routing Register 188"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E8++0x07
line.quad 0x00 "GICD_IROUTER189,Interrupt Routing Register 189"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F0++0x07
line.quad 0x00 "GICD_IROUTER190,Interrupt Routing Register 190"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F8++0x07
line.quad 0x00 "GICD_IROUTER191,Interrupt Routing Register 191"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6600++0x07
line.quad 0x00 "GICD_IROUTER192,Interrupt Routing Register 192"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6608++0x07
line.quad 0x00 "GICD_IROUTER193,Interrupt Routing Register 193"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6610++0x07
line.quad 0x00 "GICD_IROUTER194,Interrupt Routing Register 194"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6618++0x07
line.quad 0x00 "GICD_IROUTER195,Interrupt Routing Register 195"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6620++0x07
line.quad 0x00 "GICD_IROUTER196,Interrupt Routing Register 196"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6628++0x07
line.quad 0x00 "GICD_IROUTER197,Interrupt Routing Register 197"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6630++0x07
line.quad 0x00 "GICD_IROUTER198,Interrupt Routing Register 198"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6638++0x07
line.quad 0x00 "GICD_IROUTER199,Interrupt Routing Register 199"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6640++0x07
line.quad 0x00 "GICD_IROUTER200,Interrupt Routing Register 200"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6648++0x07
line.quad 0x00 "GICD_IROUTER201,Interrupt Routing Register 201"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6650++0x07
line.quad 0x00 "GICD_IROUTER202,Interrupt Routing Register 202"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6658++0x07
line.quad 0x00 "GICD_IROUTER203,Interrupt Routing Register 203"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6660++0x07
line.quad 0x00 "GICD_IROUTER204,Interrupt Routing Register 204"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6668++0x07
line.quad 0x00 "GICD_IROUTER205,Interrupt Routing Register 205"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6670++0x07
line.quad 0x00 "GICD_IROUTER206,Interrupt Routing Register 206"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6678++0x07
line.quad 0x00 "GICD_IROUTER207,Interrupt Routing Register 207"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6680++0x07
line.quad 0x00 "GICD_IROUTER208,Interrupt Routing Register 208"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6688++0x07
line.quad 0x00 "GICD_IROUTER209,Interrupt Routing Register 209"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6690++0x07
line.quad 0x00 "GICD_IROUTER210,Interrupt Routing Register 210"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6698++0x07
line.quad 0x00 "GICD_IROUTER211,Interrupt Routing Register 211"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A0++0x07
line.quad 0x00 "GICD_IROUTER212,Interrupt Routing Register 212"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A8++0x07
line.quad 0x00 "GICD_IROUTER213,Interrupt Routing Register 213"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B0++0x07
line.quad 0x00 "GICD_IROUTER214,Interrupt Routing Register 214"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B8++0x07
line.quad 0x00 "GICD_IROUTER215,Interrupt Routing Register 215"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C0++0x07
line.quad 0x00 "GICD_IROUTER216,Interrupt Routing Register 216"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C8++0x07
line.quad 0x00 "GICD_IROUTER217,Interrupt Routing Register 217"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D0++0x07
line.quad 0x00 "GICD_IROUTER218,Interrupt Routing Register 218"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D8++0x07
line.quad 0x00 "GICD_IROUTER219,Interrupt Routing Register 219"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E0++0x07
line.quad 0x00 "GICD_IROUTER220,Interrupt Routing Register 220"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E8++0x07
line.quad 0x00 "GICD_IROUTER221,Interrupt Routing Register 221"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F0++0x07
line.quad 0x00 "GICD_IROUTER222,Interrupt Routing Register 222"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F8++0x07
line.quad 0x00 "GICD_IROUTER223,Interrupt Routing Register 223"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6700++0x07
line.quad 0x00 "GICD_IROUTER224,Interrupt Routing Register 224"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6708++0x07
line.quad 0x00 "GICD_IROUTER225,Interrupt Routing Register 225"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6710++0x07
line.quad 0x00 "GICD_IROUTER226,Interrupt Routing Register 226"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6718++0x07
line.quad 0x00 "GICD_IROUTER227,Interrupt Routing Register 227"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6720++0x07
line.quad 0x00 "GICD_IROUTER228,Interrupt Routing Register 228"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6728++0x07
line.quad 0x00 "GICD_IROUTER229,Interrupt Routing Register 229"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6730++0x07
line.quad 0x00 "GICD_IROUTER230,Interrupt Routing Register 230"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6738++0x07
line.quad 0x00 "GICD_IROUTER231,Interrupt Routing Register 231"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6740++0x07
line.quad 0x00 "GICD_IROUTER232,Interrupt Routing Register 232"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6748++0x07
line.quad 0x00 "GICD_IROUTER233,Interrupt Routing Register 233"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6750++0x07
line.quad 0x00 "GICD_IROUTER234,Interrupt Routing Register 234"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6758++0x07
line.quad 0x00 "GICD_IROUTER235,Interrupt Routing Register 235"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6760++0x07
line.quad 0x00 "GICD_IROUTER236,Interrupt Routing Register 236"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6768++0x07
line.quad 0x00 "GICD_IROUTER237,Interrupt Routing Register 237"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6770++0x07
line.quad 0x00 "GICD_IROUTER238,Interrupt Routing Register 238"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6778++0x07
line.quad 0x00 "GICD_IROUTER239,Interrupt Routing Register 239"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6780++0x07
line.quad 0x00 "GICD_IROUTER240,Interrupt Routing Register 240"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6788++0x07
line.quad 0x00 "GICD_IROUTER241,Interrupt Routing Register 241"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6790++0x07
line.quad 0x00 "GICD_IROUTER242,Interrupt Routing Register 242"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6798++0x07
line.quad 0x00 "GICD_IROUTER243,Interrupt Routing Register 243"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A0++0x07
line.quad 0x00 "GICD_IROUTER244,Interrupt Routing Register 244"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A8++0x07
line.quad 0x00 "GICD_IROUTER245,Interrupt Routing Register 245"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B0++0x07
line.quad 0x00 "GICD_IROUTER246,Interrupt Routing Register 246"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B8++0x07
line.quad 0x00 "GICD_IROUTER247,Interrupt Routing Register 247"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C0++0x07
line.quad 0x00 "GICD_IROUTER248,Interrupt Routing Register 248"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C8++0x07
line.quad 0x00 "GICD_IROUTER249,Interrupt Routing Register 249"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D0++0x07
line.quad 0x00 "GICD_IROUTER250,Interrupt Routing Register 250"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D8++0x07
line.quad 0x00 "GICD_IROUTER251,Interrupt Routing Register 251"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E0++0x07
line.quad 0x00 "GICD_IROUTER252,Interrupt Routing Register 252"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E8++0x07
line.quad 0x00 "GICD_IROUTER253,Interrupt Routing Register 253"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F0++0x07
line.quad 0x00 "GICD_IROUTER254,Interrupt Routing Register 254"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F8++0x07
line.quad 0x00 "GICD_IROUTER255,Interrupt Routing Register 255"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6800++0x07
line.quad 0x00 "GICD_IROUTER256,Interrupt Routing Register 256"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6808++0x07
line.quad 0x00 "GICD_IROUTER257,Interrupt Routing Register 257"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6810++0x07
line.quad 0x00 "GICD_IROUTER258,Interrupt Routing Register 258"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6818++0x07
line.quad 0x00 "GICD_IROUTER259,Interrupt Routing Register 259"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6820++0x07
line.quad 0x00 "GICD_IROUTER260,Interrupt Routing Register 260"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6828++0x07
line.quad 0x00 "GICD_IROUTER261,Interrupt Routing Register 261"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6830++0x07
line.quad 0x00 "GICD_IROUTER262,Interrupt Routing Register 262"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6838++0x07
line.quad 0x00 "GICD_IROUTER263,Interrupt Routing Register 263"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6840++0x07
line.quad 0x00 "GICD_IROUTER264,Interrupt Routing Register 264"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6848++0x07
line.quad 0x00 "GICD_IROUTER265,Interrupt Routing Register 265"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6850++0x07
line.quad 0x00 "GICD_IROUTER266,Interrupt Routing Register 266"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6858++0x07
line.quad 0x00 "GICD_IROUTER267,Interrupt Routing Register 267"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6860++0x07
line.quad 0x00 "GICD_IROUTER268,Interrupt Routing Register 268"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6868++0x07
line.quad 0x00 "GICD_IROUTER269,Interrupt Routing Register 269"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6870++0x07
line.quad 0x00 "GICD_IROUTER270,Interrupt Routing Register 270"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6878++0x07
line.quad 0x00 "GICD_IROUTER271,Interrupt Routing Register 271"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6880++0x07
line.quad 0x00 "GICD_IROUTER272,Interrupt Routing Register 272"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6888++0x07
line.quad 0x00 "GICD_IROUTER273,Interrupt Routing Register 273"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6890++0x07
line.quad 0x00 "GICD_IROUTER274,Interrupt Routing Register 274"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6898++0x07
line.quad 0x00 "GICD_IROUTER275,Interrupt Routing Register 275"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A0++0x07
line.quad 0x00 "GICD_IROUTER276,Interrupt Routing Register 276"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A8++0x07
line.quad 0x00 "GICD_IROUTER277,Interrupt Routing Register 277"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B0++0x07
line.quad 0x00 "GICD_IROUTER278,Interrupt Routing Register 278"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B8++0x07
line.quad 0x00 "GICD_IROUTER279,Interrupt Routing Register 279"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C0++0x07
line.quad 0x00 "GICD_IROUTER280,Interrupt Routing Register 280"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C8++0x07
line.quad 0x00 "GICD_IROUTER281,Interrupt Routing Register 281"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D0++0x07
line.quad 0x00 "GICD_IROUTER282,Interrupt Routing Register 282"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D8++0x07
line.quad 0x00 "GICD_IROUTER283,Interrupt Routing Register 283"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E0++0x07
line.quad 0x00 "GICD_IROUTER284,Interrupt Routing Register 284"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E8++0x07
line.quad 0x00 "GICD_IROUTER285,Interrupt Routing Register 285"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F0++0x07
line.quad 0x00 "GICD_IROUTER286,Interrupt Routing Register 286"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F8++0x07
line.quad 0x00 "GICD_IROUTER287,Interrupt Routing Register 287"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6900++0x07
line.quad 0x00 "GICD_IROUTER288,Interrupt Routing Register 288"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6908++0x07
line.quad 0x00 "GICD_IROUTER289,Interrupt Routing Register 289"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6910++0x07
line.quad 0x00 "GICD_IROUTER290,Interrupt Routing Register 290"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6918++0x07
line.quad 0x00 "GICD_IROUTER291,Interrupt Routing Register 291"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6920++0x07
line.quad 0x00 "GICD_IROUTER292,Interrupt Routing Register 292"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6928++0x07
line.quad 0x00 "GICD_IROUTER293,Interrupt Routing Register 293"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6930++0x07
line.quad 0x00 "GICD_IROUTER294,Interrupt Routing Register 294"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6938++0x07
line.quad 0x00 "GICD_IROUTER295,Interrupt Routing Register 295"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6940++0x07
line.quad 0x00 "GICD_IROUTER296,Interrupt Routing Register 296"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6948++0x07
line.quad 0x00 "GICD_IROUTER297,Interrupt Routing Register 297"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6950++0x07
line.quad 0x00 "GICD_IROUTER298,Interrupt Routing Register 298"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6958++0x07
line.quad 0x00 "GICD_IROUTER299,Interrupt Routing Register 299"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6960++0x07
line.quad 0x00 "GICD_IROUTER300,Interrupt Routing Register 300"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6968++0x07
line.quad 0x00 "GICD_IROUTER301,Interrupt Routing Register 301"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6970++0x07
line.quad 0x00 "GICD_IROUTER302,Interrupt Routing Register 302"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6978++0x07
line.quad 0x00 "GICD_IROUTER303,Interrupt Routing Register 303"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6980++0x07
line.quad 0x00 "GICD_IROUTER304,Interrupt Routing Register 304"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6988++0x07
line.quad 0x00 "GICD_IROUTER305,Interrupt Routing Register 305"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6990++0x07
line.quad 0x00 "GICD_IROUTER306,Interrupt Routing Register 306"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6998++0x07
line.quad 0x00 "GICD_IROUTER307,Interrupt Routing Register 307"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A0++0x07
line.quad 0x00 "GICD_IROUTER308,Interrupt Routing Register 308"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A8++0x07
line.quad 0x00 "GICD_IROUTER309,Interrupt Routing Register 309"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B0++0x07
line.quad 0x00 "GICD_IROUTER310,Interrupt Routing Register 310"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B8++0x07
line.quad 0x00 "GICD_IROUTER311,Interrupt Routing Register 311"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C0++0x07
line.quad 0x00 "GICD_IROUTER312,Interrupt Routing Register 312"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C8++0x07
line.quad 0x00 "GICD_IROUTER313,Interrupt Routing Register 313"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D0++0x07
line.quad 0x00 "GICD_IROUTER314,Interrupt Routing Register 314"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D8++0x07
line.quad 0x00 "GICD_IROUTER315,Interrupt Routing Register 315"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E0++0x07
line.quad 0x00 "GICD_IROUTER316,Interrupt Routing Register 316"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E8++0x07
line.quad 0x00 "GICD_IROUTER317,Interrupt Routing Register 317"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F0++0x07
line.quad 0x00 "GICD_IROUTER318,Interrupt Routing Register 318"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F8++0x07
line.quad 0x00 "GICD_IROUTER319,Interrupt Routing Register 319"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A00++0x07
line.quad 0x00 "GICD_IROUTER320,Interrupt Routing Register 320"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A08++0x07
line.quad 0x00 "GICD_IROUTER321,Interrupt Routing Register 321"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A10++0x07
line.quad 0x00 "GICD_IROUTER322,Interrupt Routing Register 322"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A18++0x07
line.quad 0x00 "GICD_IROUTER323,Interrupt Routing Register 323"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A20++0x07
line.quad 0x00 "GICD_IROUTER324,Interrupt Routing Register 324"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A28++0x07
line.quad 0x00 "GICD_IROUTER325,Interrupt Routing Register 325"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A30++0x07
line.quad 0x00 "GICD_IROUTER326,Interrupt Routing Register 326"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A38++0x07
line.quad 0x00 "GICD_IROUTER327,Interrupt Routing Register 327"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A40++0x07
line.quad 0x00 "GICD_IROUTER328,Interrupt Routing Register 328"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A48++0x07
line.quad 0x00 "GICD_IROUTER329,Interrupt Routing Register 329"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A50++0x07
line.quad 0x00 "GICD_IROUTER330,Interrupt Routing Register 330"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A58++0x07
line.quad 0x00 "GICD_IROUTER331,Interrupt Routing Register 331"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A60++0x07
line.quad 0x00 "GICD_IROUTER332,Interrupt Routing Register 332"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A68++0x07
line.quad 0x00 "GICD_IROUTER333,Interrupt Routing Register 333"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A70++0x07
line.quad 0x00 "GICD_IROUTER334,Interrupt Routing Register 334"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A78++0x07
line.quad 0x00 "GICD_IROUTER335,Interrupt Routing Register 335"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A80++0x07
line.quad 0x00 "GICD_IROUTER336,Interrupt Routing Register 336"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A88++0x07
line.quad 0x00 "GICD_IROUTER337,Interrupt Routing Register 337"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A90++0x07
line.quad 0x00 "GICD_IROUTER338,Interrupt Routing Register 338"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A98++0x07
line.quad 0x00 "GICD_IROUTER339,Interrupt Routing Register 339"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA0++0x07
line.quad 0x00 "GICD_IROUTER340,Interrupt Routing Register 340"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA8++0x07
line.quad 0x00 "GICD_IROUTER341,Interrupt Routing Register 341"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB0++0x07
line.quad 0x00 "GICD_IROUTER342,Interrupt Routing Register 342"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB8++0x07
line.quad 0x00 "GICD_IROUTER343,Interrupt Routing Register 343"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC0++0x07
line.quad 0x00 "GICD_IROUTER344,Interrupt Routing Register 344"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC8++0x07
line.quad 0x00 "GICD_IROUTER345,Interrupt Routing Register 345"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD0++0x07
line.quad 0x00 "GICD_IROUTER346,Interrupt Routing Register 346"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD8++0x07
line.quad 0x00 "GICD_IROUTER347,Interrupt Routing Register 347"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE0++0x07
line.quad 0x00 "GICD_IROUTER348,Interrupt Routing Register 348"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE8++0x07
line.quad 0x00 "GICD_IROUTER349,Interrupt Routing Register 349"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF0++0x07
line.quad 0x00 "GICD_IROUTER350,Interrupt Routing Register 350"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF8++0x07
line.quad 0x00 "GICD_IROUTER351,Interrupt Routing Register 351"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B00++0x07
line.quad 0x00 "GICD_IROUTER352,Interrupt Routing Register 352"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B08++0x07
line.quad 0x00 "GICD_IROUTER353,Interrupt Routing Register 353"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B10++0x07
line.quad 0x00 "GICD_IROUTER354,Interrupt Routing Register 354"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B18++0x07
line.quad 0x00 "GICD_IROUTER355,Interrupt Routing Register 355"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B20++0x07
line.quad 0x00 "GICD_IROUTER356,Interrupt Routing Register 356"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B28++0x07
line.quad 0x00 "GICD_IROUTER357,Interrupt Routing Register 357"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B30++0x07
line.quad 0x00 "GICD_IROUTER358,Interrupt Routing Register 358"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B38++0x07
line.quad 0x00 "GICD_IROUTER359,Interrupt Routing Register 359"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B40++0x07
line.quad 0x00 "GICD_IROUTER360,Interrupt Routing Register 360"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B48++0x07
line.quad 0x00 "GICD_IROUTER361,Interrupt Routing Register 361"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B50++0x07
line.quad 0x00 "GICD_IROUTER362,Interrupt Routing Register 362"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B58++0x07
line.quad 0x00 "GICD_IROUTER363,Interrupt Routing Register 363"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B60++0x07
line.quad 0x00 "GICD_IROUTER364,Interrupt Routing Register 364"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B68++0x07
line.quad 0x00 "GICD_IROUTER365,Interrupt Routing Register 365"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B70++0x07
line.quad 0x00 "GICD_IROUTER366,Interrupt Routing Register 366"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B78++0x07
line.quad 0x00 "GICD_IROUTER367,Interrupt Routing Register 367"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B80++0x07
line.quad 0x00 "GICD_IROUTER368,Interrupt Routing Register 368"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B88++0x07
line.quad 0x00 "GICD_IROUTER369,Interrupt Routing Register 369"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B90++0x07
line.quad 0x00 "GICD_IROUTER370,Interrupt Routing Register 370"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B98++0x07
line.quad 0x00 "GICD_IROUTER371,Interrupt Routing Register 371"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA0++0x07
line.quad 0x00 "GICD_IROUTER372,Interrupt Routing Register 372"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA8++0x07
line.quad 0x00 "GICD_IROUTER373,Interrupt Routing Register 373"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB0++0x07
line.quad 0x00 "GICD_IROUTER374,Interrupt Routing Register 374"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB8++0x07
line.quad 0x00 "GICD_IROUTER375,Interrupt Routing Register 375"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC0++0x07
line.quad 0x00 "GICD_IROUTER376,Interrupt Routing Register 376"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC8++0x07
line.quad 0x00 "GICD_IROUTER377,Interrupt Routing Register 377"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD0++0x07
line.quad 0x00 "GICD_IROUTER378,Interrupt Routing Register 378"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD8++0x07
line.quad 0x00 "GICD_IROUTER379,Interrupt Routing Register 379"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE0++0x07
line.quad 0x00 "GICD_IROUTER380,Interrupt Routing Register 380"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE8++0x07
line.quad 0x00 "GICD_IROUTER381,Interrupt Routing Register 381"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF0++0x07
line.quad 0x00 "GICD_IROUTER382,Interrupt Routing Register 382"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF8++0x07
line.quad 0x00 "GICD_IROUTER383,Interrupt Routing Register 383"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C00++0x07
line.quad 0x00 "GICD_IROUTER384,Interrupt Routing Register 384"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C08++0x07
line.quad 0x00 "GICD_IROUTER385,Interrupt Routing Register 385"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C10++0x07
line.quad 0x00 "GICD_IROUTER386,Interrupt Routing Register 386"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C18++0x07
line.quad 0x00 "GICD_IROUTER387,Interrupt Routing Register 387"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C20++0x07
line.quad 0x00 "GICD_IROUTER388,Interrupt Routing Register 388"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C28++0x07
line.quad 0x00 "GICD_IROUTER389,Interrupt Routing Register 389"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C30++0x07
line.quad 0x00 "GICD_IROUTER390,Interrupt Routing Register 390"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C38++0x07
line.quad 0x00 "GICD_IROUTER391,Interrupt Routing Register 391"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C40++0x07
line.quad 0x00 "GICD_IROUTER392,Interrupt Routing Register 392"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C48++0x07
line.quad 0x00 "GICD_IROUTER393,Interrupt Routing Register 393"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C50++0x07
line.quad 0x00 "GICD_IROUTER394,Interrupt Routing Register 394"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C58++0x07
line.quad 0x00 "GICD_IROUTER395,Interrupt Routing Register 395"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C60++0x07
line.quad 0x00 "GICD_IROUTER396,Interrupt Routing Register 396"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C68++0x07
line.quad 0x00 "GICD_IROUTER397,Interrupt Routing Register 397"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C70++0x07
line.quad 0x00 "GICD_IROUTER398,Interrupt Routing Register 398"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C78++0x07
line.quad 0x00 "GICD_IROUTER399,Interrupt Routing Register 399"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C80++0x07
line.quad 0x00 "GICD_IROUTER400,Interrupt Routing Register 400"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C88++0x07
line.quad 0x00 "GICD_IROUTER401,Interrupt Routing Register 401"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C90++0x07
line.quad 0x00 "GICD_IROUTER402,Interrupt Routing Register 402"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C98++0x07
line.quad 0x00 "GICD_IROUTER403,Interrupt Routing Register 403"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA0++0x07
line.quad 0x00 "GICD_IROUTER404,Interrupt Routing Register 404"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA8++0x07
line.quad 0x00 "GICD_IROUTER405,Interrupt Routing Register 405"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB0++0x07
line.quad 0x00 "GICD_IROUTER406,Interrupt Routing Register 406"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB8++0x07
line.quad 0x00 "GICD_IROUTER407,Interrupt Routing Register 407"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC0++0x07
line.quad 0x00 "GICD_IROUTER408,Interrupt Routing Register 408"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC8++0x07
line.quad 0x00 "GICD_IROUTER409,Interrupt Routing Register 409"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD0++0x07
line.quad 0x00 "GICD_IROUTER410,Interrupt Routing Register 410"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD8++0x07
line.quad 0x00 "GICD_IROUTER411,Interrupt Routing Register 411"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE0++0x07
line.quad 0x00 "GICD_IROUTER412,Interrupt Routing Register 412"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE8++0x07
line.quad 0x00 "GICD_IROUTER413,Interrupt Routing Register 413"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF0++0x07
line.quad 0x00 "GICD_IROUTER414,Interrupt Routing Register 414"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF8++0x07
line.quad 0x00 "GICD_IROUTER415,Interrupt Routing Register 415"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D00++0x07
line.quad 0x00 "GICD_IROUTER416,Interrupt Routing Register 416"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D08++0x07
line.quad 0x00 "GICD_IROUTER417,Interrupt Routing Register 417"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D10++0x07
line.quad 0x00 "GICD_IROUTER418,Interrupt Routing Register 418"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D18++0x07
line.quad 0x00 "GICD_IROUTER419,Interrupt Routing Register 419"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D20++0x07
line.quad 0x00 "GICD_IROUTER420,Interrupt Routing Register 420"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D28++0x07
line.quad 0x00 "GICD_IROUTER421,Interrupt Routing Register 421"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D30++0x07
line.quad 0x00 "GICD_IROUTER422,Interrupt Routing Register 422"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D38++0x07
line.quad 0x00 "GICD_IROUTER423,Interrupt Routing Register 423"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D40++0x07
line.quad 0x00 "GICD_IROUTER424,Interrupt Routing Register 424"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D48++0x07
line.quad 0x00 "GICD_IROUTER425,Interrupt Routing Register 425"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D50++0x07
line.quad 0x00 "GICD_IROUTER426,Interrupt Routing Register 426"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D58++0x07
line.quad 0x00 "GICD_IROUTER427,Interrupt Routing Register 427"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D60++0x07
line.quad 0x00 "GICD_IROUTER428,Interrupt Routing Register 428"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D68++0x07
line.quad 0x00 "GICD_IROUTER429,Interrupt Routing Register 429"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D70++0x07
line.quad 0x00 "GICD_IROUTER430,Interrupt Routing Register 430"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D78++0x07
line.quad 0x00 "GICD_IROUTER431,Interrupt Routing Register 431"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D80++0x07
line.quad 0x00 "GICD_IROUTER432,Interrupt Routing Register 432"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D88++0x07
line.quad 0x00 "GICD_IROUTER433,Interrupt Routing Register 433"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D90++0x07
line.quad 0x00 "GICD_IROUTER434,Interrupt Routing Register 434"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D98++0x07
line.quad 0x00 "GICD_IROUTER435,Interrupt Routing Register 435"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA0++0x07
line.quad 0x00 "GICD_IROUTER436,Interrupt Routing Register 436"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA8++0x07
line.quad 0x00 "GICD_IROUTER437,Interrupt Routing Register 437"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB0++0x07
line.quad 0x00 "GICD_IROUTER438,Interrupt Routing Register 438"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB8++0x07
line.quad 0x00 "GICD_IROUTER439,Interrupt Routing Register 439"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC0++0x07
line.quad 0x00 "GICD_IROUTER440,Interrupt Routing Register 440"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC8++0x07
line.quad 0x00 "GICD_IROUTER441,Interrupt Routing Register 441"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD0++0x07
line.quad 0x00 "GICD_IROUTER442,Interrupt Routing Register 442"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD8++0x07
line.quad 0x00 "GICD_IROUTER443,Interrupt Routing Register 443"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE0++0x07
line.quad 0x00 "GICD_IROUTER444,Interrupt Routing Register 444"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE8++0x07
line.quad 0x00 "GICD_IROUTER445,Interrupt Routing Register 445"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF0++0x07
line.quad 0x00 "GICD_IROUTER446,Interrupt Routing Register 446"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF8++0x07
line.quad 0x00 "GICD_IROUTER447,Interrupt Routing Register 447"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E00++0x07
line.quad 0x00 "GICD_IROUTER448,Interrupt Routing Register 448"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E08++0x07
line.quad 0x00 "GICD_IROUTER449,Interrupt Routing Register 449"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E10++0x07
line.quad 0x00 "GICD_IROUTER450,Interrupt Routing Register 450"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E18++0x07
line.quad 0x00 "GICD_IROUTER451,Interrupt Routing Register 451"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E20++0x07
line.quad 0x00 "GICD_IROUTER452,Interrupt Routing Register 452"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E28++0x07
line.quad 0x00 "GICD_IROUTER453,Interrupt Routing Register 453"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E30++0x07
line.quad 0x00 "GICD_IROUTER454,Interrupt Routing Register 454"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E38++0x07
line.quad 0x00 "GICD_IROUTER455,Interrupt Routing Register 455"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E40++0x07
line.quad 0x00 "GICD_IROUTER456,Interrupt Routing Register 456"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E48++0x07
line.quad 0x00 "GICD_IROUTER457,Interrupt Routing Register 457"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E50++0x07
line.quad 0x00 "GICD_IROUTER458,Interrupt Routing Register 458"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E58++0x07
line.quad 0x00 "GICD_IROUTER459,Interrupt Routing Register 459"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E60++0x07
line.quad 0x00 "GICD_IROUTER460,Interrupt Routing Register 460"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E68++0x07
line.quad 0x00 "GICD_IROUTER461,Interrupt Routing Register 461"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E70++0x07
line.quad 0x00 "GICD_IROUTER462,Interrupt Routing Register 462"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E78++0x07
line.quad 0x00 "GICD_IROUTER463,Interrupt Routing Register 463"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E80++0x07
line.quad 0x00 "GICD_IROUTER464,Interrupt Routing Register 464"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E88++0x07
line.quad 0x00 "GICD_IROUTER465,Interrupt Routing Register 465"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E90++0x07
line.quad 0x00 "GICD_IROUTER466,Interrupt Routing Register 466"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E98++0x07
line.quad 0x00 "GICD_IROUTER467,Interrupt Routing Register 467"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA0++0x07
line.quad 0x00 "GICD_IROUTER468,Interrupt Routing Register 468"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA8++0x07
line.quad 0x00 "GICD_IROUTER469,Interrupt Routing Register 469"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB0++0x07
line.quad 0x00 "GICD_IROUTER470,Interrupt Routing Register 470"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB8++0x07
line.quad 0x00 "GICD_IROUTER471,Interrupt Routing Register 471"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC0++0x07
line.quad 0x00 "GICD_IROUTER472,Interrupt Routing Register 472"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC8++0x07
line.quad 0x00 "GICD_IROUTER473,Interrupt Routing Register 473"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED0++0x07
line.quad 0x00 "GICD_IROUTER474,Interrupt Routing Register 474"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED8++0x07
line.quad 0x00 "GICD_IROUTER475,Interrupt Routing Register 475"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE0++0x07
line.quad 0x00 "GICD_IROUTER476,Interrupt Routing Register 476"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE8++0x07
line.quad 0x00 "GICD_IROUTER477,Interrupt Routing Register 477"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF0++0x07
line.quad 0x00 "GICD_IROUTER478,Interrupt Routing Register 478"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF8++0x07
line.quad 0x00 "GICD_IROUTER479,Interrupt Routing Register 479"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F00++0x07
line.quad 0x00 "GICD_IROUTER480,Interrupt Routing Register 480"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F08++0x07
line.quad 0x00 "GICD_IROUTER481,Interrupt Routing Register 481"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F10++0x07
line.quad 0x00 "GICD_IROUTER482,Interrupt Routing Register 482"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F18++0x07
line.quad 0x00 "GICD_IROUTER483,Interrupt Routing Register 483"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F20++0x07
line.quad 0x00 "GICD_IROUTER484,Interrupt Routing Register 484"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F28++0x07
line.quad 0x00 "GICD_IROUTER485,Interrupt Routing Register 485"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F30++0x07
line.quad 0x00 "GICD_IROUTER486,Interrupt Routing Register 486"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F38++0x07
line.quad 0x00 "GICD_IROUTER487,Interrupt Routing Register 487"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F40++0x07
line.quad 0x00 "GICD_IROUTER488,Interrupt Routing Register 488"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F48++0x07
line.quad 0x00 "GICD_IROUTER489,Interrupt Routing Register 489"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F50++0x07
line.quad 0x00 "GICD_IROUTER490,Interrupt Routing Register 490"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F58++0x07
line.quad 0x00 "GICD_IROUTER491,Interrupt Routing Register 491"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F60++0x07
line.quad 0x00 "GICD_IROUTER492,Interrupt Routing Register 492"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F68++0x07
line.quad 0x00 "GICD_IROUTER493,Interrupt Routing Register 493"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F70++0x07
line.quad 0x00 "GICD_IROUTER494,Interrupt Routing Register 494"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F78++0x07
line.quad 0x00 "GICD_IROUTER495,Interrupt Routing Register 495"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F80++0x07
line.quad 0x00 "GICD_IROUTER496,Interrupt Routing Register 496"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F88++0x07
line.quad 0x00 "GICD_IROUTER497,Interrupt Routing Register 497"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F90++0x07
line.quad 0x00 "GICD_IROUTER498,Interrupt Routing Register 498"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F98++0x07
line.quad 0x00 "GICD_IROUTER499,Interrupt Routing Register 499"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA0++0x07
line.quad 0x00 "GICD_IROUTER500,Interrupt Routing Register 500"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA8++0x07
line.quad 0x00 "GICD_IROUTER501,Interrupt Routing Register 501"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB0++0x07
line.quad 0x00 "GICD_IROUTER502,Interrupt Routing Register 502"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB8++0x07
line.quad 0x00 "GICD_IROUTER503,Interrupt Routing Register 503"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC0++0x07
line.quad 0x00 "GICD_IROUTER504,Interrupt Routing Register 504"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC8++0x07
line.quad 0x00 "GICD_IROUTER505,Interrupt Routing Register 505"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD0++0x07
line.quad 0x00 "GICD_IROUTER506,Interrupt Routing Register 506"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD8++0x07
line.quad 0x00 "GICD_IROUTER507,Interrupt Routing Register 507"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE0++0x07
line.quad 0x00 "GICD_IROUTER508,Interrupt Routing Register 508"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE8++0x07
line.quad 0x00 "GICD_IROUTER509,Interrupt Routing Register 509"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF0++0x07
line.quad 0x00 "GICD_IROUTER510,Interrupt Routing Register 510"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF8++0x07
line.quad 0x00 "GICD_IROUTER511,Interrupt Routing Register 511"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7000++0x07
line.quad 0x00 "GICD_IROUTER512,Interrupt Routing Register 512"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7008++0x07
line.quad 0x00 "GICD_IROUTER513,Interrupt Routing Register 513"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7010++0x07
line.quad 0x00 "GICD_IROUTER514,Interrupt Routing Register 514"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7018++0x07
line.quad 0x00 "GICD_IROUTER515,Interrupt Routing Register 515"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7020++0x07
line.quad 0x00 "GICD_IROUTER516,Interrupt Routing Register 516"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7028++0x07
line.quad 0x00 "GICD_IROUTER517,Interrupt Routing Register 517"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7030++0x07
line.quad 0x00 "GICD_IROUTER518,Interrupt Routing Register 518"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7038++0x07
line.quad 0x00 "GICD_IROUTER519,Interrupt Routing Register 519"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7040++0x07
line.quad 0x00 "GICD_IROUTER520,Interrupt Routing Register 520"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7048++0x07
line.quad 0x00 "GICD_IROUTER521,Interrupt Routing Register 521"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7050++0x07
line.quad 0x00 "GICD_IROUTER522,Interrupt Routing Register 522"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7058++0x07
line.quad 0x00 "GICD_IROUTER523,Interrupt Routing Register 523"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7060++0x07
line.quad 0x00 "GICD_IROUTER524,Interrupt Routing Register 524"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7068++0x07
line.quad 0x00 "GICD_IROUTER525,Interrupt Routing Register 525"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7070++0x07
line.quad 0x00 "GICD_IROUTER526,Interrupt Routing Register 526"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7078++0x07
line.quad 0x00 "GICD_IROUTER527,Interrupt Routing Register 527"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7080++0x07
line.quad 0x00 "GICD_IROUTER528,Interrupt Routing Register 528"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7088++0x07
line.quad 0x00 "GICD_IROUTER529,Interrupt Routing Register 529"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7090++0x07
line.quad 0x00 "GICD_IROUTER530,Interrupt Routing Register 530"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7098++0x07
line.quad 0x00 "GICD_IROUTER531,Interrupt Routing Register 531"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A0++0x07
line.quad 0x00 "GICD_IROUTER532,Interrupt Routing Register 532"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A8++0x07
line.quad 0x00 "GICD_IROUTER533,Interrupt Routing Register 533"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B0++0x07
line.quad 0x00 "GICD_IROUTER534,Interrupt Routing Register 534"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B8++0x07
line.quad 0x00 "GICD_IROUTER535,Interrupt Routing Register 535"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C0++0x07
line.quad 0x00 "GICD_IROUTER536,Interrupt Routing Register 536"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C8++0x07
line.quad 0x00 "GICD_IROUTER537,Interrupt Routing Register 537"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D0++0x07
line.quad 0x00 "GICD_IROUTER538,Interrupt Routing Register 538"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D8++0x07
line.quad 0x00 "GICD_IROUTER539,Interrupt Routing Register 539"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E0++0x07
line.quad 0x00 "GICD_IROUTER540,Interrupt Routing Register 540"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E8++0x07
line.quad 0x00 "GICD_IROUTER541,Interrupt Routing Register 541"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F0++0x07
line.quad 0x00 "GICD_IROUTER542,Interrupt Routing Register 542"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F8++0x07
line.quad 0x00 "GICD_IROUTER543,Interrupt Routing Register 543"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7100++0x07
line.quad 0x00 "GICD_IROUTER544,Interrupt Routing Register 544"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7108++0x07
line.quad 0x00 "GICD_IROUTER545,Interrupt Routing Register 545"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7110++0x07
line.quad 0x00 "GICD_IROUTER546,Interrupt Routing Register 546"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7118++0x07
line.quad 0x00 "GICD_IROUTER547,Interrupt Routing Register 547"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7120++0x07
line.quad 0x00 "GICD_IROUTER548,Interrupt Routing Register 548"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7128++0x07
line.quad 0x00 "GICD_IROUTER549,Interrupt Routing Register 549"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7130++0x07
line.quad 0x00 "GICD_IROUTER550,Interrupt Routing Register 550"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7138++0x07
line.quad 0x00 "GICD_IROUTER551,Interrupt Routing Register 551"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7140++0x07
line.quad 0x00 "GICD_IROUTER552,Interrupt Routing Register 552"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7148++0x07
line.quad 0x00 "GICD_IROUTER553,Interrupt Routing Register 553"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7150++0x07
line.quad 0x00 "GICD_IROUTER554,Interrupt Routing Register 554"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7158++0x07
line.quad 0x00 "GICD_IROUTER555,Interrupt Routing Register 555"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7160++0x07
line.quad 0x00 "GICD_IROUTER556,Interrupt Routing Register 556"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7168++0x07
line.quad 0x00 "GICD_IROUTER557,Interrupt Routing Register 557"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7170++0x07
line.quad 0x00 "GICD_IROUTER558,Interrupt Routing Register 558"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7178++0x07
line.quad 0x00 "GICD_IROUTER559,Interrupt Routing Register 559"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7180++0x07
line.quad 0x00 "GICD_IROUTER560,Interrupt Routing Register 560"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7188++0x07
line.quad 0x00 "GICD_IROUTER561,Interrupt Routing Register 561"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7190++0x07
line.quad 0x00 "GICD_IROUTER562,Interrupt Routing Register 562"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7198++0x07
line.quad 0x00 "GICD_IROUTER563,Interrupt Routing Register 563"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A0++0x07
line.quad 0x00 "GICD_IROUTER564,Interrupt Routing Register 564"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A8++0x07
line.quad 0x00 "GICD_IROUTER565,Interrupt Routing Register 565"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B0++0x07
line.quad 0x00 "GICD_IROUTER566,Interrupt Routing Register 566"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B8++0x07
line.quad 0x00 "GICD_IROUTER567,Interrupt Routing Register 567"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C0++0x07
line.quad 0x00 "GICD_IROUTER568,Interrupt Routing Register 568"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C8++0x07
line.quad 0x00 "GICD_IROUTER569,Interrupt Routing Register 569"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D0++0x07
line.quad 0x00 "GICD_IROUTER570,Interrupt Routing Register 570"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D8++0x07
line.quad 0x00 "GICD_IROUTER571,Interrupt Routing Register 571"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E0++0x07
line.quad 0x00 "GICD_IROUTER572,Interrupt Routing Register 572"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E8++0x07
line.quad 0x00 "GICD_IROUTER573,Interrupt Routing Register 573"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F0++0x07
line.quad 0x00 "GICD_IROUTER574,Interrupt Routing Register 574"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F8++0x07
line.quad 0x00 "GICD_IROUTER575,Interrupt Routing Register 575"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7200++0x07
line.quad 0x00 "GICD_IROUTER576,Interrupt Routing Register 576"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7208++0x07
line.quad 0x00 "GICD_IROUTER577,Interrupt Routing Register 577"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7210++0x07
line.quad 0x00 "GICD_IROUTER578,Interrupt Routing Register 578"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7218++0x07
line.quad 0x00 "GICD_IROUTER579,Interrupt Routing Register 579"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7220++0x07
line.quad 0x00 "GICD_IROUTER580,Interrupt Routing Register 580"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7228++0x07
line.quad 0x00 "GICD_IROUTER581,Interrupt Routing Register 581"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7230++0x07
line.quad 0x00 "GICD_IROUTER582,Interrupt Routing Register 582"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7238++0x07
line.quad 0x00 "GICD_IROUTER583,Interrupt Routing Register 583"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7240++0x07
line.quad 0x00 "GICD_IROUTER584,Interrupt Routing Register 584"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7248++0x07
line.quad 0x00 "GICD_IROUTER585,Interrupt Routing Register 585"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7250++0x07
line.quad 0x00 "GICD_IROUTER586,Interrupt Routing Register 586"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7258++0x07
line.quad 0x00 "GICD_IROUTER587,Interrupt Routing Register 587"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7260++0x07
line.quad 0x00 "GICD_IROUTER588,Interrupt Routing Register 588"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7268++0x07
line.quad 0x00 "GICD_IROUTER589,Interrupt Routing Register 589"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7270++0x07
line.quad 0x00 "GICD_IROUTER590,Interrupt Routing Register 590"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7278++0x07
line.quad 0x00 "GICD_IROUTER591,Interrupt Routing Register 591"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7280++0x07
line.quad 0x00 "GICD_IROUTER592,Interrupt Routing Register 592"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7288++0x07
line.quad 0x00 "GICD_IROUTER593,Interrupt Routing Register 593"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7290++0x07
line.quad 0x00 "GICD_IROUTER594,Interrupt Routing Register 594"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7298++0x07
line.quad 0x00 "GICD_IROUTER595,Interrupt Routing Register 595"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A0++0x07
line.quad 0x00 "GICD_IROUTER596,Interrupt Routing Register 596"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A8++0x07
line.quad 0x00 "GICD_IROUTER597,Interrupt Routing Register 597"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B0++0x07
line.quad 0x00 "GICD_IROUTER598,Interrupt Routing Register 598"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B8++0x07
line.quad 0x00 "GICD_IROUTER599,Interrupt Routing Register 599"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C0++0x07
line.quad 0x00 "GICD_IROUTER600,Interrupt Routing Register 600"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C8++0x07
line.quad 0x00 "GICD_IROUTER601,Interrupt Routing Register 601"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D0++0x07
line.quad 0x00 "GICD_IROUTER602,Interrupt Routing Register 602"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D8++0x07
line.quad 0x00 "GICD_IROUTER603,Interrupt Routing Register 603"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E0++0x07
line.quad 0x00 "GICD_IROUTER604,Interrupt Routing Register 604"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E8++0x07
line.quad 0x00 "GICD_IROUTER605,Interrupt Routing Register 605"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F0++0x07
line.quad 0x00 "GICD_IROUTER606,Interrupt Routing Register 606"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F8++0x07
line.quad 0x00 "GICD_IROUTER607,Interrupt Routing Register 607"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7300++0x07
line.quad 0x00 "GICD_IROUTER608,Interrupt Routing Register 608"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7308++0x07
line.quad 0x00 "GICD_IROUTER609,Interrupt Routing Register 609"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7310++0x07
line.quad 0x00 "GICD_IROUTER610,Interrupt Routing Register 610"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7318++0x07
line.quad 0x00 "GICD_IROUTER611,Interrupt Routing Register 611"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7320++0x07
line.quad 0x00 "GICD_IROUTER612,Interrupt Routing Register 612"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7328++0x07
line.quad 0x00 "GICD_IROUTER613,Interrupt Routing Register 613"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7330++0x07
line.quad 0x00 "GICD_IROUTER614,Interrupt Routing Register 614"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7338++0x07
line.quad 0x00 "GICD_IROUTER615,Interrupt Routing Register 615"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7340++0x07
line.quad 0x00 "GICD_IROUTER616,Interrupt Routing Register 616"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7348++0x07
line.quad 0x00 "GICD_IROUTER617,Interrupt Routing Register 617"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7350++0x07
line.quad 0x00 "GICD_IROUTER618,Interrupt Routing Register 618"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7358++0x07
line.quad 0x00 "GICD_IROUTER619,Interrupt Routing Register 619"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7360++0x07
line.quad 0x00 "GICD_IROUTER620,Interrupt Routing Register 620"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7368++0x07
line.quad 0x00 "GICD_IROUTER621,Interrupt Routing Register 621"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7370++0x07
line.quad 0x00 "GICD_IROUTER622,Interrupt Routing Register 622"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7378++0x07
line.quad 0x00 "GICD_IROUTER623,Interrupt Routing Register 623"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7380++0x07
line.quad 0x00 "GICD_IROUTER624,Interrupt Routing Register 624"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7388++0x07
line.quad 0x00 "GICD_IROUTER625,Interrupt Routing Register 625"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7390++0x07
line.quad 0x00 "GICD_IROUTER626,Interrupt Routing Register 626"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7398++0x07
line.quad 0x00 "GICD_IROUTER627,Interrupt Routing Register 627"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A0++0x07
line.quad 0x00 "GICD_IROUTER628,Interrupt Routing Register 628"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A8++0x07
line.quad 0x00 "GICD_IROUTER629,Interrupt Routing Register 629"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B0++0x07
line.quad 0x00 "GICD_IROUTER630,Interrupt Routing Register 630"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B8++0x07
line.quad 0x00 "GICD_IROUTER631,Interrupt Routing Register 631"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C0++0x07
line.quad 0x00 "GICD_IROUTER632,Interrupt Routing Register 632"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C8++0x07
line.quad 0x00 "GICD_IROUTER633,Interrupt Routing Register 633"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D0++0x07
line.quad 0x00 "GICD_IROUTER634,Interrupt Routing Register 634"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D8++0x07
line.quad 0x00 "GICD_IROUTER635,Interrupt Routing Register 635"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E0++0x07
line.quad 0x00 "GICD_IROUTER636,Interrupt Routing Register 636"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E8++0x07
line.quad 0x00 "GICD_IROUTER637,Interrupt Routing Register 637"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F0++0x07
line.quad 0x00 "GICD_IROUTER638,Interrupt Routing Register 638"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F8++0x07
line.quad 0x00 "GICD_IROUTER639,Interrupt Routing Register 639"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7400++0x07
line.quad 0x00 "GICD_IROUTER640,Interrupt Routing Register 640"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7408++0x07
line.quad 0x00 "GICD_IROUTER641,Interrupt Routing Register 641"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7410++0x07
line.quad 0x00 "GICD_IROUTER642,Interrupt Routing Register 642"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7418++0x07
line.quad 0x00 "GICD_IROUTER643,Interrupt Routing Register 643"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7420++0x07
line.quad 0x00 "GICD_IROUTER644,Interrupt Routing Register 644"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7428++0x07
line.quad 0x00 "GICD_IROUTER645,Interrupt Routing Register 645"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7430++0x07
line.quad 0x00 "GICD_IROUTER646,Interrupt Routing Register 646"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7438++0x07
line.quad 0x00 "GICD_IROUTER647,Interrupt Routing Register 647"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7440++0x07
line.quad 0x00 "GICD_IROUTER648,Interrupt Routing Register 648"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7448++0x07
line.quad 0x00 "GICD_IROUTER649,Interrupt Routing Register 649"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7450++0x07
line.quad 0x00 "GICD_IROUTER650,Interrupt Routing Register 650"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7458++0x07
line.quad 0x00 "GICD_IROUTER651,Interrupt Routing Register 651"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7460++0x07
line.quad 0x00 "GICD_IROUTER652,Interrupt Routing Register 652"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7468++0x07
line.quad 0x00 "GICD_IROUTER653,Interrupt Routing Register 653"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7470++0x07
line.quad 0x00 "GICD_IROUTER654,Interrupt Routing Register 654"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7478++0x07
line.quad 0x00 "GICD_IROUTER655,Interrupt Routing Register 655"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7480++0x07
line.quad 0x00 "GICD_IROUTER656,Interrupt Routing Register 656"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7488++0x07
line.quad 0x00 "GICD_IROUTER657,Interrupt Routing Register 657"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7490++0x07
line.quad 0x00 "GICD_IROUTER658,Interrupt Routing Register 658"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7498++0x07
line.quad 0x00 "GICD_IROUTER659,Interrupt Routing Register 659"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A0++0x07
line.quad 0x00 "GICD_IROUTER660,Interrupt Routing Register 660"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A8++0x07
line.quad 0x00 "GICD_IROUTER661,Interrupt Routing Register 661"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B0++0x07
line.quad 0x00 "GICD_IROUTER662,Interrupt Routing Register 662"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B8++0x07
line.quad 0x00 "GICD_IROUTER663,Interrupt Routing Register 663"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C0++0x07
line.quad 0x00 "GICD_IROUTER664,Interrupt Routing Register 664"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C8++0x07
line.quad 0x00 "GICD_IROUTER665,Interrupt Routing Register 665"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D0++0x07
line.quad 0x00 "GICD_IROUTER666,Interrupt Routing Register 666"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D8++0x07
line.quad 0x00 "GICD_IROUTER667,Interrupt Routing Register 667"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E0++0x07
line.quad 0x00 "GICD_IROUTER668,Interrupt Routing Register 668"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E8++0x07
line.quad 0x00 "GICD_IROUTER669,Interrupt Routing Register 669"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F0++0x07
line.quad 0x00 "GICD_IROUTER670,Interrupt Routing Register 670"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F8++0x07
line.quad 0x00 "GICD_IROUTER671,Interrupt Routing Register 671"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7500++0x07
line.quad 0x00 "GICD_IROUTER672,Interrupt Routing Register 672"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7508++0x07
line.quad 0x00 "GICD_IROUTER673,Interrupt Routing Register 673"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7510++0x07
line.quad 0x00 "GICD_IROUTER674,Interrupt Routing Register 674"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7518++0x07
line.quad 0x00 "GICD_IROUTER675,Interrupt Routing Register 675"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7520++0x07
line.quad 0x00 "GICD_IROUTER676,Interrupt Routing Register 676"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7528++0x07
line.quad 0x00 "GICD_IROUTER677,Interrupt Routing Register 677"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7530++0x07
line.quad 0x00 "GICD_IROUTER678,Interrupt Routing Register 678"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7538++0x07
line.quad 0x00 "GICD_IROUTER679,Interrupt Routing Register 679"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7540++0x07
line.quad 0x00 "GICD_IROUTER680,Interrupt Routing Register 680"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7548++0x07
line.quad 0x00 "GICD_IROUTER681,Interrupt Routing Register 681"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7550++0x07
line.quad 0x00 "GICD_IROUTER682,Interrupt Routing Register 682"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7558++0x07
line.quad 0x00 "GICD_IROUTER683,Interrupt Routing Register 683"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7560++0x07
line.quad 0x00 "GICD_IROUTER684,Interrupt Routing Register 684"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7568++0x07
line.quad 0x00 "GICD_IROUTER685,Interrupt Routing Register 685"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7570++0x07
line.quad 0x00 "GICD_IROUTER686,Interrupt Routing Register 686"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7578++0x07
line.quad 0x00 "GICD_IROUTER687,Interrupt Routing Register 687"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7580++0x07
line.quad 0x00 "GICD_IROUTER688,Interrupt Routing Register 688"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7588++0x07
line.quad 0x00 "GICD_IROUTER689,Interrupt Routing Register 689"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7590++0x07
line.quad 0x00 "GICD_IROUTER690,Interrupt Routing Register 690"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7598++0x07
line.quad 0x00 "GICD_IROUTER691,Interrupt Routing Register 691"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A0++0x07
line.quad 0x00 "GICD_IROUTER692,Interrupt Routing Register 692"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A8++0x07
line.quad 0x00 "GICD_IROUTER693,Interrupt Routing Register 693"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B0++0x07
line.quad 0x00 "GICD_IROUTER694,Interrupt Routing Register 694"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B8++0x07
line.quad 0x00 "GICD_IROUTER695,Interrupt Routing Register 695"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C0++0x07
line.quad 0x00 "GICD_IROUTER696,Interrupt Routing Register 696"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C8++0x07
line.quad 0x00 "GICD_IROUTER697,Interrupt Routing Register 697"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D0++0x07
line.quad 0x00 "GICD_IROUTER698,Interrupt Routing Register 698"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D8++0x07
line.quad 0x00 "GICD_IROUTER699,Interrupt Routing Register 699"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E0++0x07
line.quad 0x00 "GICD_IROUTER700,Interrupt Routing Register 700"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E8++0x07
line.quad 0x00 "GICD_IROUTER701,Interrupt Routing Register 701"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F0++0x07
line.quad 0x00 "GICD_IROUTER702,Interrupt Routing Register 702"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F8++0x07
line.quad 0x00 "GICD_IROUTER703,Interrupt Routing Register 703"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7600++0x07
line.quad 0x00 "GICD_IROUTER704,Interrupt Routing Register 704"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7608++0x07
line.quad 0x00 "GICD_IROUTER705,Interrupt Routing Register 705"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7610++0x07
line.quad 0x00 "GICD_IROUTER706,Interrupt Routing Register 706"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7618++0x07
line.quad 0x00 "GICD_IROUTER707,Interrupt Routing Register 707"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7620++0x07
line.quad 0x00 "GICD_IROUTER708,Interrupt Routing Register 708"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7628++0x07
line.quad 0x00 "GICD_IROUTER709,Interrupt Routing Register 709"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7630++0x07
line.quad 0x00 "GICD_IROUTER710,Interrupt Routing Register 710"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7638++0x07
line.quad 0x00 "GICD_IROUTER711,Interrupt Routing Register 711"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7640++0x07
line.quad 0x00 "GICD_IROUTER712,Interrupt Routing Register 712"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7648++0x07
line.quad 0x00 "GICD_IROUTER713,Interrupt Routing Register 713"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7650++0x07
line.quad 0x00 "GICD_IROUTER714,Interrupt Routing Register 714"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7658++0x07
line.quad 0x00 "GICD_IROUTER715,Interrupt Routing Register 715"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7660++0x07
line.quad 0x00 "GICD_IROUTER716,Interrupt Routing Register 716"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7668++0x07
line.quad 0x00 "GICD_IROUTER717,Interrupt Routing Register 717"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7670++0x07
line.quad 0x00 "GICD_IROUTER718,Interrupt Routing Register 718"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7678++0x07
line.quad 0x00 "GICD_IROUTER719,Interrupt Routing Register 719"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7680++0x07
line.quad 0x00 "GICD_IROUTER720,Interrupt Routing Register 720"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7688++0x07
line.quad 0x00 "GICD_IROUTER721,Interrupt Routing Register 721"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7690++0x07
line.quad 0x00 "GICD_IROUTER722,Interrupt Routing Register 722"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7698++0x07
line.quad 0x00 "GICD_IROUTER723,Interrupt Routing Register 723"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A0++0x07
line.quad 0x00 "GICD_IROUTER724,Interrupt Routing Register 724"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A8++0x07
line.quad 0x00 "GICD_IROUTER725,Interrupt Routing Register 725"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B0++0x07
line.quad 0x00 "GICD_IROUTER726,Interrupt Routing Register 726"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B8++0x07
line.quad 0x00 "GICD_IROUTER727,Interrupt Routing Register 727"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C0++0x07
line.quad 0x00 "GICD_IROUTER728,Interrupt Routing Register 728"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C8++0x07
line.quad 0x00 "GICD_IROUTER729,Interrupt Routing Register 729"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D0++0x07
line.quad 0x00 "GICD_IROUTER730,Interrupt Routing Register 730"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D8++0x07
line.quad 0x00 "GICD_IROUTER731,Interrupt Routing Register 731"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E0++0x07
line.quad 0x00 "GICD_IROUTER732,Interrupt Routing Register 732"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E8++0x07
line.quad 0x00 "GICD_IROUTER733,Interrupt Routing Register 733"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F0++0x07
line.quad 0x00 "GICD_IROUTER734,Interrupt Routing Register 734"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F8++0x07
line.quad 0x00 "GICD_IROUTER735,Interrupt Routing Register 735"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7700++0x07
line.quad 0x00 "GICD_IROUTER736,Interrupt Routing Register 736"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7708++0x07
line.quad 0x00 "GICD_IROUTER737,Interrupt Routing Register 737"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7710++0x07
line.quad 0x00 "GICD_IROUTER738,Interrupt Routing Register 738"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7718++0x07
line.quad 0x00 "GICD_IROUTER739,Interrupt Routing Register 739"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7720++0x07
line.quad 0x00 "GICD_IROUTER740,Interrupt Routing Register 740"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7728++0x07
line.quad 0x00 "GICD_IROUTER741,Interrupt Routing Register 741"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7730++0x07
line.quad 0x00 "GICD_IROUTER742,Interrupt Routing Register 742"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7738++0x07
line.quad 0x00 "GICD_IROUTER743,Interrupt Routing Register 743"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7740++0x07
line.quad 0x00 "GICD_IROUTER744,Interrupt Routing Register 744"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7748++0x07
line.quad 0x00 "GICD_IROUTER745,Interrupt Routing Register 745"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7750++0x07
line.quad 0x00 "GICD_IROUTER746,Interrupt Routing Register 746"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7758++0x07
line.quad 0x00 "GICD_IROUTER747,Interrupt Routing Register 747"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7760++0x07
line.quad 0x00 "GICD_IROUTER748,Interrupt Routing Register 748"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7768++0x07
line.quad 0x00 "GICD_IROUTER749,Interrupt Routing Register 749"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7770++0x07
line.quad 0x00 "GICD_IROUTER750,Interrupt Routing Register 750"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7778++0x07
line.quad 0x00 "GICD_IROUTER751,Interrupt Routing Register 751"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7780++0x07
line.quad 0x00 "GICD_IROUTER752,Interrupt Routing Register 752"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7788++0x07
line.quad 0x00 "GICD_IROUTER753,Interrupt Routing Register 753"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7790++0x07
line.quad 0x00 "GICD_IROUTER754,Interrupt Routing Register 754"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7798++0x07
line.quad 0x00 "GICD_IROUTER755,Interrupt Routing Register 755"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A0++0x07
line.quad 0x00 "GICD_IROUTER756,Interrupt Routing Register 756"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A8++0x07
line.quad 0x00 "GICD_IROUTER757,Interrupt Routing Register 757"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B0++0x07
line.quad 0x00 "GICD_IROUTER758,Interrupt Routing Register 758"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B8++0x07
line.quad 0x00 "GICD_IROUTER759,Interrupt Routing Register 759"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C0++0x07
line.quad 0x00 "GICD_IROUTER760,Interrupt Routing Register 760"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C8++0x07
line.quad 0x00 "GICD_IROUTER761,Interrupt Routing Register 761"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D0++0x07
line.quad 0x00 "GICD_IROUTER762,Interrupt Routing Register 762"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D8++0x07
line.quad 0x00 "GICD_IROUTER763,Interrupt Routing Register 763"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E0++0x07
line.quad 0x00 "GICD_IROUTER764,Interrupt Routing Register 764"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E8++0x07
line.quad 0x00 "GICD_IROUTER765,Interrupt Routing Register 765"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F0++0x07
line.quad 0x00 "GICD_IROUTER766,Interrupt Routing Register 766"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F8++0x07
line.quad 0x00 "GICD_IROUTER767,Interrupt Routing Register 767"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7800++0x07
line.quad 0x00 "GICD_IROUTER768,Interrupt Routing Register 768"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7808++0x07
line.quad 0x00 "GICD_IROUTER769,Interrupt Routing Register 769"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7810++0x07
line.quad 0x00 "GICD_IROUTER770,Interrupt Routing Register 770"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7818++0x07
line.quad 0x00 "GICD_IROUTER771,Interrupt Routing Register 771"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7820++0x07
line.quad 0x00 "GICD_IROUTER772,Interrupt Routing Register 772"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7828++0x07
line.quad 0x00 "GICD_IROUTER773,Interrupt Routing Register 773"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7830++0x07
line.quad 0x00 "GICD_IROUTER774,Interrupt Routing Register 774"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7838++0x07
line.quad 0x00 "GICD_IROUTER775,Interrupt Routing Register 775"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7840++0x07
line.quad 0x00 "GICD_IROUTER776,Interrupt Routing Register 776"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7848++0x07
line.quad 0x00 "GICD_IROUTER777,Interrupt Routing Register 777"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7850++0x07
line.quad 0x00 "GICD_IROUTER778,Interrupt Routing Register 778"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7858++0x07
line.quad 0x00 "GICD_IROUTER779,Interrupt Routing Register 779"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7860++0x07
line.quad 0x00 "GICD_IROUTER780,Interrupt Routing Register 780"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7868++0x07
line.quad 0x00 "GICD_IROUTER781,Interrupt Routing Register 781"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7870++0x07
line.quad 0x00 "GICD_IROUTER782,Interrupt Routing Register 782"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7878++0x07
line.quad 0x00 "GICD_IROUTER783,Interrupt Routing Register 783"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7880++0x07
line.quad 0x00 "GICD_IROUTER784,Interrupt Routing Register 784"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7888++0x07
line.quad 0x00 "GICD_IROUTER785,Interrupt Routing Register 785"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7890++0x07
line.quad 0x00 "GICD_IROUTER786,Interrupt Routing Register 786"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7898++0x07
line.quad 0x00 "GICD_IROUTER787,Interrupt Routing Register 787"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A0++0x07
line.quad 0x00 "GICD_IROUTER788,Interrupt Routing Register 788"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A8++0x07
line.quad 0x00 "GICD_IROUTER789,Interrupt Routing Register 789"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B0++0x07
line.quad 0x00 "GICD_IROUTER790,Interrupt Routing Register 790"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B8++0x07
line.quad 0x00 "GICD_IROUTER791,Interrupt Routing Register 791"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C0++0x07
line.quad 0x00 "GICD_IROUTER792,Interrupt Routing Register 792"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C8++0x07
line.quad 0x00 "GICD_IROUTER793,Interrupt Routing Register 793"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D0++0x07
line.quad 0x00 "GICD_IROUTER794,Interrupt Routing Register 794"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D8++0x07
line.quad 0x00 "GICD_IROUTER795,Interrupt Routing Register 795"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E0++0x07
line.quad 0x00 "GICD_IROUTER796,Interrupt Routing Register 796"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E8++0x07
line.quad 0x00 "GICD_IROUTER797,Interrupt Routing Register 797"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F0++0x07
line.quad 0x00 "GICD_IROUTER798,Interrupt Routing Register 798"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F8++0x07
line.quad 0x00 "GICD_IROUTER799,Interrupt Routing Register 799"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7900++0x07
line.quad 0x00 "GICD_IROUTER800,Interrupt Routing Register 800"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7908++0x07
line.quad 0x00 "GICD_IROUTER801,Interrupt Routing Register 801"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7910++0x07
line.quad 0x00 "GICD_IROUTER802,Interrupt Routing Register 802"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7918++0x07
line.quad 0x00 "GICD_IROUTER803,Interrupt Routing Register 803"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7920++0x07
line.quad 0x00 "GICD_IROUTER804,Interrupt Routing Register 804"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7928++0x07
line.quad 0x00 "GICD_IROUTER805,Interrupt Routing Register 805"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7930++0x07
line.quad 0x00 "GICD_IROUTER806,Interrupt Routing Register 806"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7938++0x07
line.quad 0x00 "GICD_IROUTER807,Interrupt Routing Register 807"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7940++0x07
line.quad 0x00 "GICD_IROUTER808,Interrupt Routing Register 808"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7948++0x07
line.quad 0x00 "GICD_IROUTER809,Interrupt Routing Register 809"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7950++0x07
line.quad 0x00 "GICD_IROUTER810,Interrupt Routing Register 810"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7958++0x07
line.quad 0x00 "GICD_IROUTER811,Interrupt Routing Register 811"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7960++0x07
line.quad 0x00 "GICD_IROUTER812,Interrupt Routing Register 812"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7968++0x07
line.quad 0x00 "GICD_IROUTER813,Interrupt Routing Register 813"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7970++0x07
line.quad 0x00 "GICD_IROUTER814,Interrupt Routing Register 814"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7978++0x07
line.quad 0x00 "GICD_IROUTER815,Interrupt Routing Register 815"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7980++0x07
line.quad 0x00 "GICD_IROUTER816,Interrupt Routing Register 816"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7988++0x07
line.quad 0x00 "GICD_IROUTER817,Interrupt Routing Register 817"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7990++0x07
line.quad 0x00 "GICD_IROUTER818,Interrupt Routing Register 818"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7998++0x07
line.quad 0x00 "GICD_IROUTER819,Interrupt Routing Register 819"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A0++0x07
line.quad 0x00 "GICD_IROUTER820,Interrupt Routing Register 820"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A8++0x07
line.quad 0x00 "GICD_IROUTER821,Interrupt Routing Register 821"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B0++0x07
line.quad 0x00 "GICD_IROUTER822,Interrupt Routing Register 822"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B8++0x07
line.quad 0x00 "GICD_IROUTER823,Interrupt Routing Register 823"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C0++0x07
line.quad 0x00 "GICD_IROUTER824,Interrupt Routing Register 824"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C8++0x07
line.quad 0x00 "GICD_IROUTER825,Interrupt Routing Register 825"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D0++0x07
line.quad 0x00 "GICD_IROUTER826,Interrupt Routing Register 826"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D8++0x07
line.quad 0x00 "GICD_IROUTER827,Interrupt Routing Register 827"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E0++0x07
line.quad 0x00 "GICD_IROUTER828,Interrupt Routing Register 828"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E8++0x07
line.quad 0x00 "GICD_IROUTER829,Interrupt Routing Register 829"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F0++0x07
line.quad 0x00 "GICD_IROUTER830,Interrupt Routing Register 830"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F8++0x07
line.quad 0x00 "GICD_IROUTER831,Interrupt Routing Register 831"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A00++0x07
line.quad 0x00 "GICD_IROUTER832,Interrupt Routing Register 832"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A08++0x07
line.quad 0x00 "GICD_IROUTER833,Interrupt Routing Register 833"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A10++0x07
line.quad 0x00 "GICD_IROUTER834,Interrupt Routing Register 834"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A18++0x07
line.quad 0x00 "GICD_IROUTER835,Interrupt Routing Register 835"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A20++0x07
line.quad 0x00 "GICD_IROUTER836,Interrupt Routing Register 836"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A28++0x07
line.quad 0x00 "GICD_IROUTER837,Interrupt Routing Register 837"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A30++0x07
line.quad 0x00 "GICD_IROUTER838,Interrupt Routing Register 838"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A38++0x07
line.quad 0x00 "GICD_IROUTER839,Interrupt Routing Register 839"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A40++0x07
line.quad 0x00 "GICD_IROUTER840,Interrupt Routing Register 840"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A48++0x07
line.quad 0x00 "GICD_IROUTER841,Interrupt Routing Register 841"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A50++0x07
line.quad 0x00 "GICD_IROUTER842,Interrupt Routing Register 842"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A58++0x07
line.quad 0x00 "GICD_IROUTER843,Interrupt Routing Register 843"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A60++0x07
line.quad 0x00 "GICD_IROUTER844,Interrupt Routing Register 844"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A68++0x07
line.quad 0x00 "GICD_IROUTER845,Interrupt Routing Register 845"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A70++0x07
line.quad 0x00 "GICD_IROUTER846,Interrupt Routing Register 846"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A78++0x07
line.quad 0x00 "GICD_IROUTER847,Interrupt Routing Register 847"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A80++0x07
line.quad 0x00 "GICD_IROUTER848,Interrupt Routing Register 848"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A88++0x07
line.quad 0x00 "GICD_IROUTER849,Interrupt Routing Register 849"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A90++0x07
line.quad 0x00 "GICD_IROUTER850,Interrupt Routing Register 850"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A98++0x07
line.quad 0x00 "GICD_IROUTER851,Interrupt Routing Register 851"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA0++0x07
line.quad 0x00 "GICD_IROUTER852,Interrupt Routing Register 852"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA8++0x07
line.quad 0x00 "GICD_IROUTER853,Interrupt Routing Register 853"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB0++0x07
line.quad 0x00 "GICD_IROUTER854,Interrupt Routing Register 854"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB8++0x07
line.quad 0x00 "GICD_IROUTER855,Interrupt Routing Register 855"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC0++0x07
line.quad 0x00 "GICD_IROUTER856,Interrupt Routing Register 856"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC8++0x07
line.quad 0x00 "GICD_IROUTER857,Interrupt Routing Register 857"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD0++0x07
line.quad 0x00 "GICD_IROUTER858,Interrupt Routing Register 858"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD8++0x07
line.quad 0x00 "GICD_IROUTER859,Interrupt Routing Register 859"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE0++0x07
line.quad 0x00 "GICD_IROUTER860,Interrupt Routing Register 860"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE8++0x07
line.quad 0x00 "GICD_IROUTER861,Interrupt Routing Register 861"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF0++0x07
line.quad 0x00 "GICD_IROUTER862,Interrupt Routing Register 862"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF8++0x07
line.quad 0x00 "GICD_IROUTER863,Interrupt Routing Register 863"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B00++0x07
line.quad 0x00 "GICD_IROUTER864,Interrupt Routing Register 864"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B08++0x07
line.quad 0x00 "GICD_IROUTER865,Interrupt Routing Register 865"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B10++0x07
line.quad 0x00 "GICD_IROUTER866,Interrupt Routing Register 866"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B18++0x07
line.quad 0x00 "GICD_IROUTER867,Interrupt Routing Register 867"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B20++0x07
line.quad 0x00 "GICD_IROUTER868,Interrupt Routing Register 868"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B28++0x07
line.quad 0x00 "GICD_IROUTER869,Interrupt Routing Register 869"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B30++0x07
line.quad 0x00 "GICD_IROUTER870,Interrupt Routing Register 870"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B38++0x07
line.quad 0x00 "GICD_IROUTER871,Interrupt Routing Register 871"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B40++0x07
line.quad 0x00 "GICD_IROUTER872,Interrupt Routing Register 872"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B48++0x07
line.quad 0x00 "GICD_IROUTER873,Interrupt Routing Register 873"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B50++0x07
line.quad 0x00 "GICD_IROUTER874,Interrupt Routing Register 874"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B58++0x07
line.quad 0x00 "GICD_IROUTER875,Interrupt Routing Register 875"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B60++0x07
line.quad 0x00 "GICD_IROUTER876,Interrupt Routing Register 876"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B68++0x07
line.quad 0x00 "GICD_IROUTER877,Interrupt Routing Register 877"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B70++0x07
line.quad 0x00 "GICD_IROUTER878,Interrupt Routing Register 878"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B78++0x07
line.quad 0x00 "GICD_IROUTER879,Interrupt Routing Register 879"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B80++0x07
line.quad 0x00 "GICD_IROUTER880,Interrupt Routing Register 880"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B88++0x07
line.quad 0x00 "GICD_IROUTER881,Interrupt Routing Register 881"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B90++0x07
line.quad 0x00 "GICD_IROUTER882,Interrupt Routing Register 882"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B98++0x07
line.quad 0x00 "GICD_IROUTER883,Interrupt Routing Register 883"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA0++0x07
line.quad 0x00 "GICD_IROUTER884,Interrupt Routing Register 884"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA8++0x07
line.quad 0x00 "GICD_IROUTER885,Interrupt Routing Register 885"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB0++0x07
line.quad 0x00 "GICD_IROUTER886,Interrupt Routing Register 886"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB8++0x07
line.quad 0x00 "GICD_IROUTER887,Interrupt Routing Register 887"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC0++0x07
line.quad 0x00 "GICD_IROUTER888,Interrupt Routing Register 888"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC8++0x07
line.quad 0x00 "GICD_IROUTER889,Interrupt Routing Register 889"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD0++0x07
line.quad 0x00 "GICD_IROUTER890,Interrupt Routing Register 890"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD8++0x07
line.quad 0x00 "GICD_IROUTER891,Interrupt Routing Register 891"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE0++0x07
line.quad 0x00 "GICD_IROUTER892,Interrupt Routing Register 892"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE8++0x07
line.quad 0x00 "GICD_IROUTER893,Interrupt Routing Register 893"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF0++0x07
line.quad 0x00 "GICD_IROUTER894,Interrupt Routing Register 894"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF8++0x07
line.quad 0x00 "GICD_IROUTER895,Interrupt Routing Register 895"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C00++0x07
line.quad 0x00 "GICD_IROUTER896,Interrupt Routing Register 896"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C08++0x07
line.quad 0x00 "GICD_IROUTER897,Interrupt Routing Register 897"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C10++0x07
line.quad 0x00 "GICD_IROUTER898,Interrupt Routing Register 898"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C18++0x07
line.quad 0x00 "GICD_IROUTER899,Interrupt Routing Register 899"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C20++0x07
line.quad 0x00 "GICD_IROUTER900,Interrupt Routing Register 900"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C28++0x07
line.quad 0x00 "GICD_IROUTER901,Interrupt Routing Register 901"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C30++0x07
line.quad 0x00 "GICD_IROUTER902,Interrupt Routing Register 902"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C38++0x07
line.quad 0x00 "GICD_IROUTER903,Interrupt Routing Register 903"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C40++0x07
line.quad 0x00 "GICD_IROUTER904,Interrupt Routing Register 904"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C48++0x07
line.quad 0x00 "GICD_IROUTER905,Interrupt Routing Register 905"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C50++0x07
line.quad 0x00 "GICD_IROUTER906,Interrupt Routing Register 906"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C58++0x07
line.quad 0x00 "GICD_IROUTER907,Interrupt Routing Register 907"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C60++0x07
line.quad 0x00 "GICD_IROUTER908,Interrupt Routing Register 908"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C68++0x07
line.quad 0x00 "GICD_IROUTER909,Interrupt Routing Register 909"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C70++0x07
line.quad 0x00 "GICD_IROUTER910,Interrupt Routing Register 910"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C78++0x07
line.quad 0x00 "GICD_IROUTER911,Interrupt Routing Register 911"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C80++0x07
line.quad 0x00 "GICD_IROUTER912,Interrupt Routing Register 912"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C88++0x07
line.quad 0x00 "GICD_IROUTER913,Interrupt Routing Register 913"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C90++0x07
line.quad 0x00 "GICD_IROUTER914,Interrupt Routing Register 914"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C98++0x07
line.quad 0x00 "GICD_IROUTER915,Interrupt Routing Register 915"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA0++0x07
line.quad 0x00 "GICD_IROUTER916,Interrupt Routing Register 916"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA8++0x07
line.quad 0x00 "GICD_IROUTER917,Interrupt Routing Register 917"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB0++0x07
line.quad 0x00 "GICD_IROUTER918,Interrupt Routing Register 918"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB8++0x07
line.quad 0x00 "GICD_IROUTER919,Interrupt Routing Register 919"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC0++0x07
line.quad 0x00 "GICD_IROUTER920,Interrupt Routing Register 920"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC8++0x07
line.quad 0x00 "GICD_IROUTER921,Interrupt Routing Register 921"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD0++0x07
line.quad 0x00 "GICD_IROUTER922,Interrupt Routing Register 922"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD8++0x07
line.quad 0x00 "GICD_IROUTER923,Interrupt Routing Register 923"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE0++0x07
line.quad 0x00 "GICD_IROUTER924,Interrupt Routing Register 924"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE8++0x07
line.quad 0x00 "GICD_IROUTER925,Interrupt Routing Register 925"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF0++0x07
line.quad 0x00 "GICD_IROUTER926,Interrupt Routing Register 926"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF8++0x07
line.quad 0x00 "GICD_IROUTER927,Interrupt Routing Register 927"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D00++0x07
line.quad 0x00 "GICD_IROUTER928,Interrupt Routing Register 928"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D08++0x07
line.quad 0x00 "GICD_IROUTER929,Interrupt Routing Register 929"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D10++0x07
line.quad 0x00 "GICD_IROUTER930,Interrupt Routing Register 930"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D18++0x07
line.quad 0x00 "GICD_IROUTER931,Interrupt Routing Register 931"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D20++0x07
line.quad 0x00 "GICD_IROUTER932,Interrupt Routing Register 932"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D28++0x07
line.quad 0x00 "GICD_IROUTER933,Interrupt Routing Register 933"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D30++0x07
line.quad 0x00 "GICD_IROUTER934,Interrupt Routing Register 934"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D38++0x07
line.quad 0x00 "GICD_IROUTER935,Interrupt Routing Register 935"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D40++0x07
line.quad 0x00 "GICD_IROUTER936,Interrupt Routing Register 936"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D48++0x07
line.quad 0x00 "GICD_IROUTER937,Interrupt Routing Register 937"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D50++0x07
line.quad 0x00 "GICD_IROUTER938,Interrupt Routing Register 938"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D58++0x07
line.quad 0x00 "GICD_IROUTER939,Interrupt Routing Register 939"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D60++0x07
line.quad 0x00 "GICD_IROUTER940,Interrupt Routing Register 940"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D68++0x07
line.quad 0x00 "GICD_IROUTER941,Interrupt Routing Register 941"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D70++0x07
line.quad 0x00 "GICD_IROUTER942,Interrupt Routing Register 942"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D78++0x07
line.quad 0x00 "GICD_IROUTER943,Interrupt Routing Register 943"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D80++0x07
line.quad 0x00 "GICD_IROUTER944,Interrupt Routing Register 944"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D88++0x07
line.quad 0x00 "GICD_IROUTER945,Interrupt Routing Register 945"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D90++0x07
line.quad 0x00 "GICD_IROUTER946,Interrupt Routing Register 946"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D98++0x07
line.quad 0x00 "GICD_IROUTER947,Interrupt Routing Register 947"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA0++0x07
line.quad 0x00 "GICD_IROUTER948,Interrupt Routing Register 948"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA8++0x07
line.quad 0x00 "GICD_IROUTER949,Interrupt Routing Register 949"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB0++0x07
line.quad 0x00 "GICD_IROUTER950,Interrupt Routing Register 950"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB8++0x07
line.quad 0x00 "GICD_IROUTER951,Interrupt Routing Register 951"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC0++0x07
line.quad 0x00 "GICD_IROUTER952,Interrupt Routing Register 952"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC8++0x07
line.quad 0x00 "GICD_IROUTER953,Interrupt Routing Register 953"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD0++0x07
line.quad 0x00 "GICD_IROUTER954,Interrupt Routing Register 954"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD8++0x07
line.quad 0x00 "GICD_IROUTER955,Interrupt Routing Register 955"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE0++0x07
line.quad 0x00 "GICD_IROUTER956,Interrupt Routing Register 956"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE8++0x07
line.quad 0x00 "GICD_IROUTER957,Interrupt Routing Register 957"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF0++0x07
line.quad 0x00 "GICD_IROUTER958,Interrupt Routing Register 958"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF8++0x07
line.quad 0x00 "GICD_IROUTER959,Interrupt Routing Register 959"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E00++0x07
line.quad 0x00 "GICD_IROUTER960,Interrupt Routing Register 960"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E08++0x07
line.quad 0x00 "GICD_IROUTER961,Interrupt Routing Register 961"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E10++0x07
line.quad 0x00 "GICD_IROUTER962,Interrupt Routing Register 962"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E18++0x07
line.quad 0x00 "GICD_IROUTER963,Interrupt Routing Register 963"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E20++0x07
line.quad 0x00 "GICD_IROUTER964,Interrupt Routing Register 964"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E28++0x07
line.quad 0x00 "GICD_IROUTER965,Interrupt Routing Register 965"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E30++0x07
line.quad 0x00 "GICD_IROUTER966,Interrupt Routing Register 966"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E38++0x07
line.quad 0x00 "GICD_IROUTER967,Interrupt Routing Register 967"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E40++0x07
line.quad 0x00 "GICD_IROUTER968,Interrupt Routing Register 968"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E48++0x07
line.quad 0x00 "GICD_IROUTER969,Interrupt Routing Register 969"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E50++0x07
line.quad 0x00 "GICD_IROUTER970,Interrupt Routing Register 970"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E58++0x07
line.quad 0x00 "GICD_IROUTER971,Interrupt Routing Register 971"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E60++0x07
line.quad 0x00 "GICD_IROUTER972,Interrupt Routing Register 972"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E68++0x07
line.quad 0x00 "GICD_IROUTER973,Interrupt Routing Register 973"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E70++0x07
line.quad 0x00 "GICD_IROUTER974,Interrupt Routing Register 974"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E78++0x07
line.quad 0x00 "GICD_IROUTER975,Interrupt Routing Register 975"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E80++0x07
line.quad 0x00 "GICD_IROUTER976,Interrupt Routing Register 976"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E88++0x07
line.quad 0x00 "GICD_IROUTER977,Interrupt Routing Register 977"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E90++0x07
line.quad 0x00 "GICD_IROUTER978,Interrupt Routing Register 978"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E98++0x07
line.quad 0x00 "GICD_IROUTER979,Interrupt Routing Register 979"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA0++0x07
line.quad 0x00 "GICD_IROUTER980,Interrupt Routing Register 980"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA8++0x07
line.quad 0x00 "GICD_IROUTER981,Interrupt Routing Register 981"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB0++0x07
line.quad 0x00 "GICD_IROUTER982,Interrupt Routing Register 982"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB8++0x07
line.quad 0x00 "GICD_IROUTER983,Interrupt Routing Register 983"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC0++0x07
line.quad 0x00 "GICD_IROUTER984,Interrupt Routing Register 984"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC8++0x07
line.quad 0x00 "GICD_IROUTER985,Interrupt Routing Register 985"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED0++0x07
line.quad 0x00 "GICD_IROUTER986,Interrupt Routing Register 986"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED8++0x07
line.quad 0x00 "GICD_IROUTER987,Interrupt Routing Register 987"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE0++0x07
line.quad 0x00 "GICD_IROUTER988,Interrupt Routing Register 988"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE8++0x07
line.quad 0x00 "GICD_IROUTER989,Interrupt Routing Register 989"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF0++0x07
line.quad 0x00 "GICD_IROUTER990,Interrupt Routing Register 990"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF8++0x07
line.quad 0x00 "GICD_IROUTER991,Interrupt Routing Register 991"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
tree.end
width 22.
tree "Implementation Defined Test Registers"
rgroup.long 0xC000++0x03
line.long 0x00 "GICD_ESTATUSR,GICD_ESTATUSR"
bitfld.long 0x00 31. " SRWP     ,Super Register Write Pending" "Not pending,Pending"
wgroup.long 0xC004++0x03
line.long 0x00 "GICD_ERRTESTR,Error Test Register"
bitfld.long 0x00 1. " AXIM_ERR ,Drives the axim_err pin to 0b1 for 1 cycle" "Low,High"
bitfld.long 0x00 0. "         ECC_FATAL ,Drives the ecc_fatal pin to 0b1 for 1 cycle" "Low,High"
textline "                               "
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
rgroup.long 0xC084++0x03
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
bitfld.long 0x00 31. " SPIS63  ,SPI Status Bit 63" "Low,High"
bitfld.long 0x00 30. "  SPIS62  ,SPI Status Bit 62" "Low,High"
bitfld.long 0x00 29. "  SPIS61  ,SPI Status Bit 61" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS60  ,SPI Status Bit 60" "Low,High"
bitfld.long 0x00 27. "  SPIS59  ,SPI Status Bit 59" "Low,High"
bitfld.long 0x00 26. "  SPIS58  ,SPI Status Bit 58" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS57  ,SPI Status Bit 57" "Low,High"
bitfld.long 0x00 24. "  SPIS56  ,SPI Status Bit 56" "Low,High"
bitfld.long 0x00 23. "  SPIS55  ,SPI Status Bit 55" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS54  ,SPI Status Bit 54" "Low,High"
bitfld.long 0x00 21. "  SPIS53  ,SPI Status Bit 53" "Low,High"
bitfld.long 0x00 20. "  SPIS52  ,SPI Status Bit 52" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS51  ,SPI Status Bit 51" "Low,High"
bitfld.long 0x00 18. "  SPIS50  ,SPI Status Bit 50" "Low,High"
bitfld.long 0x00 17. "  SPIS49  ,SPI Status Bit 49" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS48  ,SPI Status Bit 48" "Low,High"
bitfld.long 0x00 15. "  SPIS47  ,SPI Status Bit 47" "Low,High"
bitfld.long 0x00 14. "  SPIS46  ,SPI Status Bit 46" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS45  ,SPI Status Bit 45" "Low,High"
bitfld.long 0x00 12. "  SPIS44  ,SPI Status Bit 44" "Low,High"
bitfld.long 0x00 11. "  SPIS43  ,SPI Status Bit 43" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS42  ,SPI Status Bit 42" "Low,High"
bitfld.long 0x00 9. "  SPIS41  ,SPI Status Bit 41" "Low,High"
bitfld.long 0x00 8. "  SPIS40  ,SPI Status Bit 40" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS39  ,SPI Status Bit 39" "Low,High"
bitfld.long 0x00 6. "  SPIS38  ,SPI Status Bit 38" "Low,High"
bitfld.long 0x00 5. "  SPIS37  ,SPI Status Bit 37" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS36  ,SPI Status Bit 36" "Low,High"
bitfld.long 0x00 3. "  SPIS35  ,SPI Status Bit 35" "Low,High"
bitfld.long 0x00 2. "  SPIS34  ,SPI Status Bit 34" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS33  ,SPI Status Bit 33" "Low,High"
bitfld.long 0x00 0. "  SPIS32  ,SPI Status Bit 32" "Low,High"
else
hgroup.long 0xC084++0x03
hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
rgroup.long 0xC088++0x03
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
bitfld.long 0x00 31. " SPIS95  ,SPI Status Bit 95" "Low,High"
bitfld.long 0x00 30. "  SPIS94  ,SPI Status Bit 94" "Low,High"
bitfld.long 0x00 29. "  SPIS93  ,SPI Status Bit 93" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS92  ,SPI Status Bit 92" "Low,High"
bitfld.long 0x00 27. "  SPIS91  ,SPI Status Bit 91" "Low,High"
bitfld.long 0x00 26. "  SPIS90  ,SPI Status Bit 90" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS89  ,SPI Status Bit 89" "Low,High"
bitfld.long 0x00 24. "  SPIS88  ,SPI Status Bit 88" "Low,High"
bitfld.long 0x00 23. "  SPIS87  ,SPI Status Bit 87" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS86  ,SPI Status Bit 86" "Low,High"
bitfld.long 0x00 21. "  SPIS85  ,SPI Status Bit 85" "Low,High"
bitfld.long 0x00 20. "  SPIS84  ,SPI Status Bit 84" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS83  ,SPI Status Bit 83" "Low,High"
bitfld.long 0x00 18. "  SPIS82  ,SPI Status Bit 82" "Low,High"
bitfld.long 0x00 17. "  SPIS81  ,SPI Status Bit 81" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS80  ,SPI Status Bit 80" "Low,High"
bitfld.long 0x00 15. "  SPIS79  ,SPI Status Bit 79" "Low,High"
bitfld.long 0x00 14. "  SPIS78  ,SPI Status Bit 78" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS77  ,SPI Status Bit 77" "Low,High"
bitfld.long 0x00 12. "  SPIS76  ,SPI Status Bit 76" "Low,High"
bitfld.long 0x00 11. "  SPIS75  ,SPI Status Bit 75" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS74  ,SPI Status Bit 74" "Low,High"
bitfld.long 0x00 9. "  SPIS73  ,SPI Status Bit 73" "Low,High"
bitfld.long 0x00 8. "  SPIS72  ,SPI Status Bit 72" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS71  ,SPI Status Bit 71" "Low,High"
bitfld.long 0x00 6. "  SPIS70  ,SPI Status Bit 70" "Low,High"
bitfld.long 0x00 5. "  SPIS69  ,SPI Status Bit 69" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS68  ,SPI Status Bit 68" "Low,High"
bitfld.long 0x00 3. "  SPIS67  ,SPI Status Bit 67" "Low,High"
bitfld.long 0x00 2. "  SPIS66  ,SPI Status Bit 66" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS65  ,SPI Status Bit 65" "Low,High"
bitfld.long 0x00 0. "  SPIS64  ,SPI Status Bit 64" "Low,High"
else
hgroup.long 0xC088++0x03
hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
rgroup.long 0xC08C++0x03
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
bitfld.long 0x00 31. " SPIS127 ,SPI Status Bit 127" "Low,High"
bitfld.long 0x00 30. "  SPIS126 ,SPI Status Bit 126" "Low,High"
bitfld.long 0x00 29. "  SPIS125 ,SPI Status Bit 125" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS124 ,SPI Status Bit 124" "Low,High"
bitfld.long 0x00 27. "  SPIS123 ,SPI Status Bit 123" "Low,High"
bitfld.long 0x00 26. "  SPIS122 ,SPI Status Bit 122" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS121 ,SPI Status Bit 121" "Low,High"
bitfld.long 0x00 24. "  SPIS120 ,SPI Status Bit 120" "Low,High"
bitfld.long 0x00 23. "  SPIS119 ,SPI Status Bit 119" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS118 ,SPI Status Bit 118" "Low,High"
bitfld.long 0x00 21. "  SPIS117 ,SPI Status Bit 117" "Low,High"
bitfld.long 0x00 20. "  SPIS116 ,SPI Status Bit 116" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS115 ,SPI Status Bit 115" "Low,High"
bitfld.long 0x00 18. "  SPIS114 ,SPI Status Bit 114" "Low,High"
bitfld.long 0x00 17. "  SPIS113 ,SPI Status Bit 113" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS112 ,SPI Status Bit 112" "Low,High"
bitfld.long 0x00 15. "  SPIS111 ,SPI Status Bit 111" "Low,High"
bitfld.long 0x00 14. "  SPIS110 ,SPI Status Bit 110" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS109 ,SPI Status Bit 109" "Low,High"
bitfld.long 0x00 12. "  SPIS108 ,SPI Status Bit 108" "Low,High"
bitfld.long 0x00 11. "  SPIS107 ,SPI Status Bit 107" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS106 ,SPI Status Bit 106" "Low,High"
bitfld.long 0x00 9. "  SPIS105 ,SPI Status Bit 105" "Low,High"
bitfld.long 0x00 8. "  SPIS104 ,SPI Status Bit 104" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS103 ,SPI Status Bit 103" "Low,High"
bitfld.long 0x00 6. "  SPIS102 ,SPI Status Bit 102" "Low,High"
bitfld.long 0x00 5. "  SPIS101 ,SPI Status Bit 101" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS100 ,SPI Status Bit 100" "Low,High"
bitfld.long 0x00 3. "  SPIS99  ,SPI Status Bit 99" "Low,High"
bitfld.long 0x00 2. "  SPIS98  ,SPI Status Bit 98" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS97  ,SPI Status Bit 97" "Low,High"
bitfld.long 0x00 0. "  SPIS96  ,SPI Status Bit 96" "Low,High"
else
hgroup.long 0xC08C++0x03
hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
rgroup.long 0xC090++0x03
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
bitfld.long 0x00 31. " SPIS159 ,SPI Status Bit 159" "Low,High"
bitfld.long 0x00 30. "  SPIS158 ,SPI Status Bit 158" "Low,High"
bitfld.long 0x00 29. "  SPIS157 ,SPI Status Bit 157" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS156 ,SPI Status Bit 156" "Low,High"
bitfld.long 0x00 27. "  SPIS155 ,SPI Status Bit 155" "Low,High"
bitfld.long 0x00 26. "  SPIS154 ,SPI Status Bit 154" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS153 ,SPI Status Bit 153" "Low,High"
bitfld.long 0x00 24. "  SPIS152 ,SPI Status Bit 152" "Low,High"
bitfld.long 0x00 23. "  SPIS151 ,SPI Status Bit 151" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS150 ,SPI Status Bit 150" "Low,High"
bitfld.long 0x00 21. "  SPIS149 ,SPI Status Bit 149" "Low,High"
bitfld.long 0x00 20. "  SPIS148 ,SPI Status Bit 148" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS147 ,SPI Status Bit 147" "Low,High"
bitfld.long 0x00 18. "  SPIS146 ,SPI Status Bit 146" "Low,High"
bitfld.long 0x00 17. "  SPIS145 ,SPI Status Bit 145" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS144 ,SPI Status Bit 144" "Low,High"
bitfld.long 0x00 15. "  SPIS143 ,SPI Status Bit 143" "Low,High"
bitfld.long 0x00 14. "  SPIS142 ,SPI Status Bit 142" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS141 ,SPI Status Bit 141" "Low,High"
bitfld.long 0x00 12. "  SPIS140 ,SPI Status Bit 140" "Low,High"
bitfld.long 0x00 11. "  SPIS139 ,SPI Status Bit 139" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS138 ,SPI Status Bit 138" "Low,High"
bitfld.long 0x00 9. "  SPIS137 ,SPI Status Bit 137" "Low,High"
bitfld.long 0x00 8. "  SPIS136 ,SPI Status Bit 136" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS135 ,SPI Status Bit 135" "Low,High"
bitfld.long 0x00 6. "  SPIS134 ,SPI Status Bit 134" "Low,High"
bitfld.long 0x00 5. "  SPIS133 ,SPI Status Bit 133" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS132 ,SPI Status Bit 132" "Low,High"
bitfld.long 0x00 3. "  SPIS131 ,SPI Status Bit 131" "Low,High"
bitfld.long 0x00 2. "  SPIS130 ,SPI Status Bit 130" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS129 ,SPI Status Bit 129" "Low,High"
bitfld.long 0x00 0. "  SPIS128 ,SPI Status Bit 128" "Low,High"
else
hgroup.long 0xC090++0x03
hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
rgroup.long 0xC094++0x03
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
bitfld.long 0x00 31. " SPIS191 ,SPI Status Bit 191" "Low,High"
bitfld.long 0x00 30. "  SPIS190 ,SPI Status Bit 190" "Low,High"
bitfld.long 0x00 29. "  SPIS189 ,SPI Status Bit 189" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS188 ,SPI Status Bit 188" "Low,High"
bitfld.long 0x00 27. "  SPIS187 ,SPI Status Bit 187" "Low,High"
bitfld.long 0x00 26. "  SPIS186 ,SPI Status Bit 186" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS185 ,SPI Status Bit 185" "Low,High"
bitfld.long 0x00 24. "  SPIS184 ,SPI Status Bit 184" "Low,High"
bitfld.long 0x00 23. "  SPIS183 ,SPI Status Bit 183" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS182 ,SPI Status Bit 182" "Low,High"
bitfld.long 0x00 21. "  SPIS181 ,SPI Status Bit 181" "Low,High"
bitfld.long 0x00 20. "  SPIS180 ,SPI Status Bit 180" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS179 ,SPI Status Bit 179" "Low,High"
bitfld.long 0x00 18. "  SPIS178 ,SPI Status Bit 178" "Low,High"
bitfld.long 0x00 17. "  SPIS177 ,SPI Status Bit 177" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS176 ,SPI Status Bit 176" "Low,High"
bitfld.long 0x00 15. "  SPIS175 ,SPI Status Bit 175" "Low,High"
bitfld.long 0x00 14. "  SPIS174 ,SPI Status Bit 174" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS173 ,SPI Status Bit 173" "Low,High"
bitfld.long 0x00 12. "  SPIS172 ,SPI Status Bit 172" "Low,High"
bitfld.long 0x00 11. "  SPIS171 ,SPI Status Bit 171" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS170 ,SPI Status Bit 170" "Low,High"
bitfld.long 0x00 9. "  SPIS169 ,SPI Status Bit 169" "Low,High"
bitfld.long 0x00 8. "  SPIS168 ,SPI Status Bit 168" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS167 ,SPI Status Bit 167" "Low,High"
bitfld.long 0x00 6. "  SPIS166 ,SPI Status Bit 166" "Low,High"
bitfld.long 0x00 5. "  SPIS165 ,SPI Status Bit 165" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS164 ,SPI Status Bit 164" "Low,High"
bitfld.long 0x00 3. "  SPIS163 ,SPI Status Bit 163" "Low,High"
bitfld.long 0x00 2. "  SPIS162 ,SPI Status Bit 162" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS161 ,SPI Status Bit 161" "Low,High"
bitfld.long 0x00 0. "  SPIS160 ,SPI Status Bit 160" "Low,High"
else
hgroup.long 0xC094++0x03
hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
rgroup.long 0xC098++0x03
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
bitfld.long 0x00 31. " SPIS223 ,SPI Status Bit 223" "Low,High"
bitfld.long 0x00 30. "  SPIS222 ,SPI Status Bit 222" "Low,High"
bitfld.long 0x00 29. "  SPIS221 ,SPI Status Bit 221" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS220 ,SPI Status Bit 220" "Low,High"
bitfld.long 0x00 27. "  SPIS219 ,SPI Status Bit 219" "Low,High"
bitfld.long 0x00 26. "  SPIS218 ,SPI Status Bit 218" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS217 ,SPI Status Bit 217" "Low,High"
bitfld.long 0x00 24. "  SPIS216 ,SPI Status Bit 216" "Low,High"
bitfld.long 0x00 23. "  SPIS215 ,SPI Status Bit 215" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS214 ,SPI Status Bit 214" "Low,High"
bitfld.long 0x00 21. "  SPIS213 ,SPI Status Bit 213" "Low,High"
bitfld.long 0x00 20. "  SPIS212 ,SPI Status Bit 212" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS211 ,SPI Status Bit 211" "Low,High"
bitfld.long 0x00 18. "  SPIS210 ,SPI Status Bit 210" "Low,High"
bitfld.long 0x00 17. "  SPIS209 ,SPI Status Bit 209" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS208 ,SPI Status Bit 208" "Low,High"
bitfld.long 0x00 15. "  SPIS207 ,SPI Status Bit 207" "Low,High"
bitfld.long 0x00 14. "  SPIS206 ,SPI Status Bit 206" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS205 ,SPI Status Bit 205" "Low,High"
bitfld.long 0x00 12. "  SPIS204 ,SPI Status Bit 204" "Low,High"
bitfld.long 0x00 11. "  SPIS203 ,SPI Status Bit 203" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS202 ,SPI Status Bit 202" "Low,High"
bitfld.long 0x00 9. "  SPIS201 ,SPI Status Bit 201" "Low,High"
bitfld.long 0x00 8. "  SPIS200 ,SPI Status Bit 200" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS199 ,SPI Status Bit 199" "Low,High"
bitfld.long 0x00 6. "  SPIS198 ,SPI Status Bit 198" "Low,High"
bitfld.long 0x00 5. "  SPIS197 ,SPI Status Bit 197" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS196 ,SPI Status Bit 196" "Low,High"
bitfld.long 0x00 3. "  SPIS195 ,SPI Status Bit 195" "Low,High"
bitfld.long 0x00 2. "  SPIS194 ,SPI Status Bit 194" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS193 ,SPI Status Bit 193" "Low,High"
bitfld.long 0x00 0. "  SPIS192 ,SPI Status Bit 192" "Low,High"
else
hgroup.long 0xC098++0x03
hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
rgroup.long 0xC09C++0x03
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
bitfld.long 0x00 31. " SPIS255 ,SPI Status Bit 255" "Low,High"
bitfld.long 0x00 30. "  SPIS254 ,SPI Status Bit 254" "Low,High"
bitfld.long 0x00 29. "  SPIS253 ,SPI Status Bit 253" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS252 ,SPI Status Bit 252" "Low,High"
bitfld.long 0x00 27. "  SPIS251 ,SPI Status Bit 251" "Low,High"
bitfld.long 0x00 26. "  SPIS250 ,SPI Status Bit 250" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS249 ,SPI Status Bit 249" "Low,High"
bitfld.long 0x00 24. "  SPIS248 ,SPI Status Bit 248" "Low,High"
bitfld.long 0x00 23. "  SPIS247 ,SPI Status Bit 247" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS246 ,SPI Status Bit 246" "Low,High"
bitfld.long 0x00 21. "  SPIS245 ,SPI Status Bit 245" "Low,High"
bitfld.long 0x00 20. "  SPIS244 ,SPI Status Bit 244" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS243 ,SPI Status Bit 243" "Low,High"
bitfld.long 0x00 18. "  SPIS242 ,SPI Status Bit 242" "Low,High"
bitfld.long 0x00 17. "  SPIS241 ,SPI Status Bit 241" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS240 ,SPI Status Bit 240" "Low,High"
bitfld.long 0x00 15. "  SPIS239 ,SPI Status Bit 239" "Low,High"
bitfld.long 0x00 14. "  SPIS238 ,SPI Status Bit 238" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS237 ,SPI Status Bit 237" "Low,High"
bitfld.long 0x00 12. "  SPIS236 ,SPI Status Bit 236" "Low,High"
bitfld.long 0x00 11. "  SPIS235 ,SPI Status Bit 235" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS234 ,SPI Status Bit 234" "Low,High"
bitfld.long 0x00 9. "  SPIS233 ,SPI Status Bit 233" "Low,High"
bitfld.long 0x00 8. "  SPIS232 ,SPI Status Bit 232" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS231 ,SPI Status Bit 231" "Low,High"
bitfld.long 0x00 6. "  SPIS230 ,SPI Status Bit 230" "Low,High"
bitfld.long 0x00 5. "  SPIS229 ,SPI Status Bit 229" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS228 ,SPI Status Bit 228" "Low,High"
bitfld.long 0x00 3. "  SPIS227 ,SPI Status Bit 227" "Low,High"
bitfld.long 0x00 2. "  SPIS226 ,SPI Status Bit 226" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS225 ,SPI Status Bit 225" "Low,High"
bitfld.long 0x00 0. "  SPIS224 ,SPI Status Bit 224" "Low,High"
else
hgroup.long 0xC09C++0x03
hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
rgroup.long 0xC0A0++0x03
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
bitfld.long 0x00 31. " SPIS287 ,SPI Status Bit 287" "Low,High"
bitfld.long 0x00 30. "  SPIS286 ,SPI Status Bit 286" "Low,High"
bitfld.long 0x00 29. "  SPIS285 ,SPI Status Bit 285" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS284 ,SPI Status Bit 284" "Low,High"
bitfld.long 0x00 27. "  SPIS283 ,SPI Status Bit 283" "Low,High"
bitfld.long 0x00 26. "  SPIS282 ,SPI Status Bit 282" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS281 ,SPI Status Bit 281" "Low,High"
bitfld.long 0x00 24. "  SPIS280 ,SPI Status Bit 280" "Low,High"
bitfld.long 0x00 23. "  SPIS279 ,SPI Status Bit 279" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS278 ,SPI Status Bit 278" "Low,High"
bitfld.long 0x00 21. "  SPIS277 ,SPI Status Bit 277" "Low,High"
bitfld.long 0x00 20. "  SPIS276 ,SPI Status Bit 276" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS275 ,SPI Status Bit 275" "Low,High"
bitfld.long 0x00 18. "  SPIS274 ,SPI Status Bit 274" "Low,High"
bitfld.long 0x00 17. "  SPIS273 ,SPI Status Bit 273" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS272 ,SPI Status Bit 272" "Low,High"
bitfld.long 0x00 15. "  SPIS271 ,SPI Status Bit 271" "Low,High"
bitfld.long 0x00 14. "  SPIS270 ,SPI Status Bit 270" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS269 ,SPI Status Bit 269" "Low,High"
bitfld.long 0x00 12. "  SPIS268 ,SPI Status Bit 268" "Low,High"
bitfld.long 0x00 11. "  SPIS267 ,SPI Status Bit 267" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS266 ,SPI Status Bit 266" "Low,High"
bitfld.long 0x00 9. "  SPIS265 ,SPI Status Bit 265" "Low,High"
bitfld.long 0x00 8. "  SPIS264 ,SPI Status Bit 264" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS263 ,SPI Status Bit 263" "Low,High"
bitfld.long 0x00 6. "  SPIS262 ,SPI Status Bit 262" "Low,High"
bitfld.long 0x00 5. "  SPIS261 ,SPI Status Bit 261" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS260 ,SPI Status Bit 260" "Low,High"
bitfld.long 0x00 3. "  SPIS259 ,SPI Status Bit 259" "Low,High"
bitfld.long 0x00 2. "  SPIS258 ,SPI Status Bit 258" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS257 ,SPI Status Bit 257" "Low,High"
bitfld.long 0x00 0. "  SPIS256 ,SPI Status Bit 256" "Low,High"
else
hgroup.long 0xC0A0++0x03
hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
rgroup.long 0xC0A4++0x03
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
bitfld.long 0x00 31. " SPIS319 ,SPI Status Bit 319" "Low,High"
bitfld.long 0x00 30. "  SPIS318 ,SPI Status Bit 318" "Low,High"
bitfld.long 0x00 29. "  SPIS317 ,SPI Status Bit 317" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS316 ,SPI Status Bit 316" "Low,High"
bitfld.long 0x00 27. "  SPIS315 ,SPI Status Bit 315" "Low,High"
bitfld.long 0x00 26. "  SPIS314 ,SPI Status Bit 314" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS313 ,SPI Status Bit 313" "Low,High"
bitfld.long 0x00 24. "  SPIS312 ,SPI Status Bit 312" "Low,High"
bitfld.long 0x00 23. "  SPIS311 ,SPI Status Bit 311" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS310 ,SPI Status Bit 310" "Low,High"
bitfld.long 0x00 21. "  SPIS309 ,SPI Status Bit 309" "Low,High"
bitfld.long 0x00 20. "  SPIS308 ,SPI Status Bit 308" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS307 ,SPI Status Bit 307" "Low,High"
bitfld.long 0x00 18. "  SPIS306 ,SPI Status Bit 306" "Low,High"
bitfld.long 0x00 17. "  SPIS305 ,SPI Status Bit 305" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS304 ,SPI Status Bit 304" "Low,High"
bitfld.long 0x00 15. "  SPIS303 ,SPI Status Bit 303" "Low,High"
bitfld.long 0x00 14. "  SPIS302 ,SPI Status Bit 302" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS301 ,SPI Status Bit 301" "Low,High"
bitfld.long 0x00 12. "  SPIS300 ,SPI Status Bit 300" "Low,High"
bitfld.long 0x00 11. "  SPIS299 ,SPI Status Bit 299" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS298 ,SPI Status Bit 298" "Low,High"
bitfld.long 0x00 9. "  SPIS297 ,SPI Status Bit 297" "Low,High"
bitfld.long 0x00 8. "  SPIS296 ,SPI Status Bit 296" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS295 ,SPI Status Bit 295" "Low,High"
bitfld.long 0x00 6. "  SPIS294 ,SPI Status Bit 294" "Low,High"
bitfld.long 0x00 5. "  SPIS293 ,SPI Status Bit 293" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS292 ,SPI Status Bit 292" "Low,High"
bitfld.long 0x00 3. "  SPIS291 ,SPI Status Bit 291" "Low,High"
bitfld.long 0x00 2. "  SPIS290 ,SPI Status Bit 290" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS289 ,SPI Status Bit 289" "Low,High"
bitfld.long 0x00 0. "  SPIS288 ,SPI Status Bit 288" "Low,High"
else
hgroup.long 0xC0A4++0x03
hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
rgroup.long 0xC0A8++0x03
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
bitfld.long 0x00 31. " SPIS351 ,SPI Status Bit 351" "Low,High"
bitfld.long 0x00 30. "  SPIS350 ,SPI Status Bit 350" "Low,High"
bitfld.long 0x00 29. "  SPIS349 ,SPI Status Bit 349" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS348 ,SPI Status Bit 348" "Low,High"
bitfld.long 0x00 27. "  SPIS347 ,SPI Status Bit 347" "Low,High"
bitfld.long 0x00 26. "  SPIS346 ,SPI Status Bit 346" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS345 ,SPI Status Bit 345" "Low,High"
bitfld.long 0x00 24. "  SPIS344 ,SPI Status Bit 344" "Low,High"
bitfld.long 0x00 23. "  SPIS343 ,SPI Status Bit 343" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS342 ,SPI Status Bit 342" "Low,High"
bitfld.long 0x00 21. "  SPIS341 ,SPI Status Bit 341" "Low,High"
bitfld.long 0x00 20. "  SPIS340 ,SPI Status Bit 340" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS339 ,SPI Status Bit 339" "Low,High"
bitfld.long 0x00 18. "  SPIS338 ,SPI Status Bit 338" "Low,High"
bitfld.long 0x00 17. "  SPIS337 ,SPI Status Bit 337" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS336 ,SPI Status Bit 336" "Low,High"
bitfld.long 0x00 15. "  SPIS335 ,SPI Status Bit 335" "Low,High"
bitfld.long 0x00 14. "  SPIS334 ,SPI Status Bit 334" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS333 ,SPI Status Bit 333" "Low,High"
bitfld.long 0x00 12. "  SPIS332 ,SPI Status Bit 332" "Low,High"
bitfld.long 0x00 11. "  SPIS331 ,SPI Status Bit 331" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS330 ,SPI Status Bit 330" "Low,High"
bitfld.long 0x00 9. "  SPIS329 ,SPI Status Bit 329" "Low,High"
bitfld.long 0x00 8. "  SPIS328 ,SPI Status Bit 328" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS327 ,SPI Status Bit 327" "Low,High"
bitfld.long 0x00 6. "  SPIS326 ,SPI Status Bit 326" "Low,High"
bitfld.long 0x00 5. "  SPIS325 ,SPI Status Bit 325" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS324 ,SPI Status Bit 324" "Low,High"
bitfld.long 0x00 3. "  SPIS323 ,SPI Status Bit 323" "Low,High"
bitfld.long 0x00 2. "  SPIS322 ,SPI Status Bit 322" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS321 ,SPI Status Bit 321" "Low,High"
bitfld.long 0x00 0. "  SPIS320 ,SPI Status Bit 320" "Low,High"
else
hgroup.long 0xC0A8++0x03
hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
rgroup.long 0xC0AC++0x03
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
bitfld.long 0x00 31. " SPIS383 ,SPI Status Bit 383" "Low,High"
bitfld.long 0x00 30. "  SPIS382 ,SPI Status Bit 382" "Low,High"
bitfld.long 0x00 29. "  SPIS381 ,SPI Status Bit 381" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS380 ,SPI Status Bit 380" "Low,High"
bitfld.long 0x00 27. "  SPIS379 ,SPI Status Bit 379" "Low,High"
bitfld.long 0x00 26. "  SPIS378 ,SPI Status Bit 378" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS377 ,SPI Status Bit 377" "Low,High"
bitfld.long 0x00 24. "  SPIS376 ,SPI Status Bit 376" "Low,High"
bitfld.long 0x00 23. "  SPIS375 ,SPI Status Bit 375" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS374 ,SPI Status Bit 374" "Low,High"
bitfld.long 0x00 21. "  SPIS373 ,SPI Status Bit 373" "Low,High"
bitfld.long 0x00 20. "  SPIS372 ,SPI Status Bit 372" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS371 ,SPI Status Bit 371" "Low,High"
bitfld.long 0x00 18. "  SPIS370 ,SPI Status Bit 370" "Low,High"
bitfld.long 0x00 17. "  SPIS369 ,SPI Status Bit 369" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS368 ,SPI Status Bit 368" "Low,High"
bitfld.long 0x00 15. "  SPIS367 ,SPI Status Bit 367" "Low,High"
bitfld.long 0x00 14. "  SPIS366 ,SPI Status Bit 366" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS365 ,SPI Status Bit 365" "Low,High"
bitfld.long 0x00 12. "  SPIS364 ,SPI Status Bit 364" "Low,High"
bitfld.long 0x00 11. "  SPIS363 ,SPI Status Bit 363" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS362 ,SPI Status Bit 362" "Low,High"
bitfld.long 0x00 9. "  SPIS361 ,SPI Status Bit 361" "Low,High"
bitfld.long 0x00 8. "  SPIS360 ,SPI Status Bit 360" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS359 ,SPI Status Bit 359" "Low,High"
bitfld.long 0x00 6. "  SPIS358 ,SPI Status Bit 358" "Low,High"
bitfld.long 0x00 5. "  SPIS357 ,SPI Status Bit 357" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS356 ,SPI Status Bit 356" "Low,High"
bitfld.long 0x00 3. "  SPIS355 ,SPI Status Bit 355" "Low,High"
bitfld.long 0x00 2. "  SPIS354 ,SPI Status Bit 354" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS353 ,SPI Status Bit 353" "Low,High"
bitfld.long 0x00 0. "  SPIS352 ,SPI Status Bit 352" "Low,High"
else
hgroup.long 0xC0AC++0x03
hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
rgroup.long 0xC0B0++0x03
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
bitfld.long 0x00 31. " SPIS415 ,SPI Status Bit 415" "Low,High"
bitfld.long 0x00 30. "  SPIS414 ,SPI Status Bit 414" "Low,High"
bitfld.long 0x00 29. "  SPIS413 ,SPI Status Bit 413" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS412 ,SPI Status Bit 412" "Low,High"
bitfld.long 0x00 27. "  SPIS411 ,SPI Status Bit 411" "Low,High"
bitfld.long 0x00 26. "  SPIS410 ,SPI Status Bit 410" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS409 ,SPI Status Bit 409" "Low,High"
bitfld.long 0x00 24. "  SPIS408 ,SPI Status Bit 408" "Low,High"
bitfld.long 0x00 23. "  SPIS407 ,SPI Status Bit 407" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS406 ,SPI Status Bit 406" "Low,High"
bitfld.long 0x00 21. "  SPIS405 ,SPI Status Bit 405" "Low,High"
bitfld.long 0x00 20. "  SPIS404 ,SPI Status Bit 404" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS403 ,SPI Status Bit 403" "Low,High"
bitfld.long 0x00 18. "  SPIS402 ,SPI Status Bit 402" "Low,High"
bitfld.long 0x00 17. "  SPIS401 ,SPI Status Bit 401" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS400 ,SPI Status Bit 400" "Low,High"
bitfld.long 0x00 15. "  SPIS399 ,SPI Status Bit 399" "Low,High"
bitfld.long 0x00 14. "  SPIS398 ,SPI Status Bit 398" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS397 ,SPI Status Bit 397" "Low,High"
bitfld.long 0x00 12. "  SPIS396 ,SPI Status Bit 396" "Low,High"
bitfld.long 0x00 11. "  SPIS395 ,SPI Status Bit 395" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS394 ,SPI Status Bit 394" "Low,High"
bitfld.long 0x00 9. "  SPIS393 ,SPI Status Bit 393" "Low,High"
bitfld.long 0x00 8. "  SPIS392 ,SPI Status Bit 392" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS391 ,SPI Status Bit 391" "Low,High"
bitfld.long 0x00 6. "  SPIS390 ,SPI Status Bit 390" "Low,High"
bitfld.long 0x00 5. "  SPIS389 ,SPI Status Bit 389" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS388 ,SPI Status Bit 388" "Low,High"
bitfld.long 0x00 3. "  SPIS387 ,SPI Status Bit 387" "Low,High"
bitfld.long 0x00 2. "  SPIS386 ,SPI Status Bit 386" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS385 ,SPI Status Bit 385" "Low,High"
bitfld.long 0x00 0. "  SPIS384 ,SPI Status Bit 384" "Low,High"
else
hgroup.long 0xC0B0++0x03
hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
rgroup.long 0xC0B4++0x03
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
bitfld.long 0x00 31. " SPIS447 ,SPI Status Bit 447" "Low,High"
bitfld.long 0x00 30. "  SPIS446 ,SPI Status Bit 446" "Low,High"
bitfld.long 0x00 29. "  SPIS445 ,SPI Status Bit 445" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS444 ,SPI Status Bit 444" "Low,High"
bitfld.long 0x00 27. "  SPIS443 ,SPI Status Bit 443" "Low,High"
bitfld.long 0x00 26. "  SPIS442 ,SPI Status Bit 442" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS441 ,SPI Status Bit 441" "Low,High"
bitfld.long 0x00 24. "  SPIS440 ,SPI Status Bit 440" "Low,High"
bitfld.long 0x00 23. "  SPIS439 ,SPI Status Bit 439" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS438 ,SPI Status Bit 438" "Low,High"
bitfld.long 0x00 21. "  SPIS437 ,SPI Status Bit 437" "Low,High"
bitfld.long 0x00 20. "  SPIS436 ,SPI Status Bit 436" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS435 ,SPI Status Bit 435" "Low,High"
bitfld.long 0x00 18. "  SPIS434 ,SPI Status Bit 434" "Low,High"
bitfld.long 0x00 17. "  SPIS433 ,SPI Status Bit 433" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS432 ,SPI Status Bit 432" "Low,High"
bitfld.long 0x00 15. "  SPIS431 ,SPI Status Bit 431" "Low,High"
bitfld.long 0x00 14. "  SPIS430 ,SPI Status Bit 430" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS429 ,SPI Status Bit 429" "Low,High"
bitfld.long 0x00 12. "  SPIS428 ,SPI Status Bit 428" "Low,High"
bitfld.long 0x00 11. "  SPIS427 ,SPI Status Bit 427" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS426 ,SPI Status Bit 426" "Low,High"
bitfld.long 0x00 9. "  SPIS425 ,SPI Status Bit 425" "Low,High"
bitfld.long 0x00 8. "  SPIS424 ,SPI Status Bit 424" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS423 ,SPI Status Bit 423" "Low,High"
bitfld.long 0x00 6. "  SPIS422 ,SPI Status Bit 422" "Low,High"
bitfld.long 0x00 5. "  SPIS421 ,SPI Status Bit 421" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS420 ,SPI Status Bit 420" "Low,High"
bitfld.long 0x00 3. "  SPIS419 ,SPI Status Bit 419" "Low,High"
bitfld.long 0x00 2. "  SPIS418 ,SPI Status Bit 418" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS417 ,SPI Status Bit 417" "Low,High"
bitfld.long 0x00 0. "  SPIS416 ,SPI Status Bit 416" "Low,High"
else
hgroup.long 0xC0B4++0x03
hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
rgroup.long 0xC0B8++0x03
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
bitfld.long 0x00 31. " SPIS479 ,SPI Status Bit 479" "Low,High"
bitfld.long 0x00 30. "  SPIS478 ,SPI Status Bit 478" "Low,High"
bitfld.long 0x00 29. "  SPIS477 ,SPI Status Bit 477" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS476 ,SPI Status Bit 476" "Low,High"
bitfld.long 0x00 27. "  SPIS475 ,SPI Status Bit 475" "Low,High"
bitfld.long 0x00 26. "  SPIS474 ,SPI Status Bit 474" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS473 ,SPI Status Bit 473" "Low,High"
bitfld.long 0x00 24. "  SPIS472 ,SPI Status Bit 472" "Low,High"
bitfld.long 0x00 23. "  SPIS471 ,SPI Status Bit 471" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS470 ,SPI Status Bit 470" "Low,High"
bitfld.long 0x00 21. "  SPIS469 ,SPI Status Bit 469" "Low,High"
bitfld.long 0x00 20. "  SPIS468 ,SPI Status Bit 468" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS467 ,SPI Status Bit 467" "Low,High"
bitfld.long 0x00 18. "  SPIS466 ,SPI Status Bit 466" "Low,High"
bitfld.long 0x00 17. "  SPIS465 ,SPI Status Bit 465" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS464 ,SPI Status Bit 464" "Low,High"
bitfld.long 0x00 15. "  SPIS463 ,SPI Status Bit 463" "Low,High"
bitfld.long 0x00 14. "  SPIS462 ,SPI Status Bit 462" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS461 ,SPI Status Bit 461" "Low,High"
bitfld.long 0x00 12. "  SPIS460 ,SPI Status Bit 460" "Low,High"
bitfld.long 0x00 11. "  SPIS459 ,SPI Status Bit 459" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS458 ,SPI Status Bit 458" "Low,High"
bitfld.long 0x00 9. "  SPIS457 ,SPI Status Bit 457" "Low,High"
bitfld.long 0x00 8. "  SPIS456 ,SPI Status Bit 456" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS455 ,SPI Status Bit 455" "Low,High"
bitfld.long 0x00 6. "  SPIS454 ,SPI Status Bit 454" "Low,High"
bitfld.long 0x00 5. "  SPIS453 ,SPI Status Bit 453" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS452 ,SPI Status Bit 452" "Low,High"
bitfld.long 0x00 3. "  SPIS451 ,SPI Status Bit 451" "Low,High"
bitfld.long 0x00 2. "  SPIS450 ,SPI Status Bit 450" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS449 ,SPI Status Bit 449" "Low,High"
bitfld.long 0x00 0. "  SPIS448 ,SPI Status Bit 448" "Low,High"
else
hgroup.long 0xC0B8++0x03
hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
rgroup.long 0xC0BC++0x03
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
bitfld.long 0x00 31. " SPIS511 ,SPI Status Bit 511" "Low,High"
bitfld.long 0x00 30. "  SPIS510 ,SPI Status Bit 510" "Low,High"
bitfld.long 0x00 29. "  SPIS509 ,SPI Status Bit 509" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS508 ,SPI Status Bit 508" "Low,High"
bitfld.long 0x00 27. "  SPIS507 ,SPI Status Bit 507" "Low,High"
bitfld.long 0x00 26. "  SPIS506 ,SPI Status Bit 506" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS505 ,SPI Status Bit 505" "Low,High"
bitfld.long 0x00 24. "  SPIS504 ,SPI Status Bit 504" "Low,High"
bitfld.long 0x00 23. "  SPIS503 ,SPI Status Bit 503" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS502 ,SPI Status Bit 502" "Low,High"
bitfld.long 0x00 21. "  SPIS501 ,SPI Status Bit 501" "Low,High"
bitfld.long 0x00 20. "  SPIS500 ,SPI Status Bit 500" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS499 ,SPI Status Bit 499" "Low,High"
bitfld.long 0x00 18. "  SPIS498 ,SPI Status Bit 498" "Low,High"
bitfld.long 0x00 17. "  SPIS497 ,SPI Status Bit 497" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS496 ,SPI Status Bit 496" "Low,High"
bitfld.long 0x00 15. "  SPIS495 ,SPI Status Bit 495" "Low,High"
bitfld.long 0x00 14. "  SPIS494 ,SPI Status Bit 494" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS493 ,SPI Status Bit 493" "Low,High"
bitfld.long 0x00 12. "  SPIS492 ,SPI Status Bit 492" "Low,High"
bitfld.long 0x00 11. "  SPIS491 ,SPI Status Bit 491" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS490 ,SPI Status Bit 490" "Low,High"
bitfld.long 0x00 9. "  SPIS489 ,SPI Status Bit 489" "Low,High"
bitfld.long 0x00 8. "  SPIS488 ,SPI Status Bit 488" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS487 ,SPI Status Bit 487" "Low,High"
bitfld.long 0x00 6. "  SPIS486 ,SPI Status Bit 486" "Low,High"
bitfld.long 0x00 5. "  SPIS485 ,SPI Status Bit 485" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS484 ,SPI Status Bit 484" "Low,High"
bitfld.long 0x00 3. "  SPIS483 ,SPI Status Bit 483" "Low,High"
bitfld.long 0x00 2. "  SPIS482 ,SPI Status Bit 482" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS481 ,SPI Status Bit 481" "Low,High"
bitfld.long 0x00 0. "  SPIS480 ,SPI Status Bit 480" "Low,High"
else
hgroup.long 0xC0BC++0x03
hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
rgroup.long 0xC0C0++0x03
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
bitfld.long 0x00 31. " SPIS543 ,SPI Status Bit 543" "Low,High"
bitfld.long 0x00 30. "  SPIS542 ,SPI Status Bit 542" "Low,High"
bitfld.long 0x00 29. "  SPIS541 ,SPI Status Bit 541" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS540 ,SPI Status Bit 540" "Low,High"
bitfld.long 0x00 27. "  SPIS539 ,SPI Status Bit 539" "Low,High"
bitfld.long 0x00 26. "  SPIS538 ,SPI Status Bit 538" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS537 ,SPI Status Bit 537" "Low,High"
bitfld.long 0x00 24. "  SPIS536 ,SPI Status Bit 536" "Low,High"
bitfld.long 0x00 23. "  SPIS535 ,SPI Status Bit 535" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS534 ,SPI Status Bit 534" "Low,High"
bitfld.long 0x00 21. "  SPIS533 ,SPI Status Bit 533" "Low,High"
bitfld.long 0x00 20. "  SPIS532 ,SPI Status Bit 532" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS531 ,SPI Status Bit 531" "Low,High"
bitfld.long 0x00 18. "  SPIS530 ,SPI Status Bit 530" "Low,High"
bitfld.long 0x00 17. "  SPIS529 ,SPI Status Bit 529" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS528 ,SPI Status Bit 528" "Low,High"
bitfld.long 0x00 15. "  SPIS527 ,SPI Status Bit 527" "Low,High"
bitfld.long 0x00 14. "  SPIS526 ,SPI Status Bit 526" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS525 ,SPI Status Bit 525" "Low,High"
bitfld.long 0x00 12. "  SPIS524 ,SPI Status Bit 524" "Low,High"
bitfld.long 0x00 11. "  SPIS523 ,SPI Status Bit 523" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS522 ,SPI Status Bit 522" "Low,High"
bitfld.long 0x00 9. "  SPIS521 ,SPI Status Bit 521" "Low,High"
bitfld.long 0x00 8. "  SPIS520 ,SPI Status Bit 520" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS519 ,SPI Status Bit 519" "Low,High"
bitfld.long 0x00 6. "  SPIS518 ,SPI Status Bit 518" "Low,High"
bitfld.long 0x00 5. "  SPIS517 ,SPI Status Bit 517" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS516 ,SPI Status Bit 516" "Low,High"
bitfld.long 0x00 3. "  SPIS515 ,SPI Status Bit 515" "Low,High"
bitfld.long 0x00 2. "  SPIS514 ,SPI Status Bit 514" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS513 ,SPI Status Bit 513" "Low,High"
bitfld.long 0x00 0. "  SPIS512 ,SPI Status Bit 512" "Low,High"
else
hgroup.long 0xC0C0++0x03
hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
rgroup.long 0xC0C4++0x03
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
bitfld.long 0x00 31. " SPIS575 ,SPI Status Bit 575" "Low,High"
bitfld.long 0x00 30. "  SPIS574 ,SPI Status Bit 574" "Low,High"
bitfld.long 0x00 29. "  SPIS573 ,SPI Status Bit 573" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS572 ,SPI Status Bit 572" "Low,High"
bitfld.long 0x00 27. "  SPIS571 ,SPI Status Bit 571" "Low,High"
bitfld.long 0x00 26. "  SPIS570 ,SPI Status Bit 570" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS569 ,SPI Status Bit 569" "Low,High"
bitfld.long 0x00 24. "  SPIS568 ,SPI Status Bit 568" "Low,High"
bitfld.long 0x00 23. "  SPIS567 ,SPI Status Bit 567" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS566 ,SPI Status Bit 566" "Low,High"
bitfld.long 0x00 21. "  SPIS565 ,SPI Status Bit 565" "Low,High"
bitfld.long 0x00 20. "  SPIS564 ,SPI Status Bit 564" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS563 ,SPI Status Bit 563" "Low,High"
bitfld.long 0x00 18. "  SPIS562 ,SPI Status Bit 562" "Low,High"
bitfld.long 0x00 17. "  SPIS561 ,SPI Status Bit 561" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS560 ,SPI Status Bit 560" "Low,High"
bitfld.long 0x00 15. "  SPIS559 ,SPI Status Bit 559" "Low,High"
bitfld.long 0x00 14. "  SPIS558 ,SPI Status Bit 558" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS557 ,SPI Status Bit 557" "Low,High"
bitfld.long 0x00 12. "  SPIS556 ,SPI Status Bit 556" "Low,High"
bitfld.long 0x00 11. "  SPIS555 ,SPI Status Bit 555" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS554 ,SPI Status Bit 554" "Low,High"
bitfld.long 0x00 9. "  SPIS553 ,SPI Status Bit 553" "Low,High"
bitfld.long 0x00 8. "  SPIS552 ,SPI Status Bit 552" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS551 ,SPI Status Bit 551" "Low,High"
bitfld.long 0x00 6. "  SPIS550 ,SPI Status Bit 550" "Low,High"
bitfld.long 0x00 5. "  SPIS549 ,SPI Status Bit 549" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS548 ,SPI Status Bit 548" "Low,High"
bitfld.long 0x00 3. "  SPIS547 ,SPI Status Bit 547" "Low,High"
bitfld.long 0x00 2. "  SPIS546 ,SPI Status Bit 546" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS545 ,SPI Status Bit 545" "Low,High"
bitfld.long 0x00 0. "  SPIS544 ,SPI Status Bit 544" "Low,High"
else
hgroup.long 0xC0C4++0x03
hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
rgroup.long 0xC0C8++0x03
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
bitfld.long 0x00 31. " SPIS607 ,SPI Status Bit 607" "Low,High"
bitfld.long 0x00 30. "  SPIS606 ,SPI Status Bit 606" "Low,High"
bitfld.long 0x00 29. "  SPIS605 ,SPI Status Bit 605" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS604 ,SPI Status Bit 604" "Low,High"
bitfld.long 0x00 27. "  SPIS603 ,SPI Status Bit 603" "Low,High"
bitfld.long 0x00 26. "  SPIS602 ,SPI Status Bit 602" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS601 ,SPI Status Bit 601" "Low,High"
bitfld.long 0x00 24. "  SPIS600 ,SPI Status Bit 600" "Low,High"
bitfld.long 0x00 23. "  SPIS599 ,SPI Status Bit 599" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS598 ,SPI Status Bit 598" "Low,High"
bitfld.long 0x00 21. "  SPIS597 ,SPI Status Bit 597" "Low,High"
bitfld.long 0x00 20. "  SPIS596 ,SPI Status Bit 596" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS595 ,SPI Status Bit 595" "Low,High"
bitfld.long 0x00 18. "  SPIS594 ,SPI Status Bit 594" "Low,High"
bitfld.long 0x00 17. "  SPIS593 ,SPI Status Bit 593" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS592 ,SPI Status Bit 592" "Low,High"
bitfld.long 0x00 15. "  SPIS591 ,SPI Status Bit 591" "Low,High"
bitfld.long 0x00 14. "  SPIS590 ,SPI Status Bit 590" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS589 ,SPI Status Bit 589" "Low,High"
bitfld.long 0x00 12. "  SPIS588 ,SPI Status Bit 588" "Low,High"
bitfld.long 0x00 11. "  SPIS587 ,SPI Status Bit 587" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS586 ,SPI Status Bit 586" "Low,High"
bitfld.long 0x00 9. "  SPIS585 ,SPI Status Bit 585" "Low,High"
bitfld.long 0x00 8. "  SPIS584 ,SPI Status Bit 584" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS583 ,SPI Status Bit 583" "Low,High"
bitfld.long 0x00 6. "  SPIS582 ,SPI Status Bit 582" "Low,High"
bitfld.long 0x00 5. "  SPIS581 ,SPI Status Bit 581" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS580 ,SPI Status Bit 580" "Low,High"
bitfld.long 0x00 3. "  SPIS579 ,SPI Status Bit 579" "Low,High"
bitfld.long 0x00 2. "  SPIS578 ,SPI Status Bit 578" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS577 ,SPI Status Bit 577" "Low,High"
bitfld.long 0x00 0. "  SPIS576 ,SPI Status Bit 576" "Low,High"
else
hgroup.long 0xC0C8++0x03
hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
rgroup.long 0xC0CC++0x03
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
bitfld.long 0x00 31. " SPIS639 ,SPI Status Bit 639" "Low,High"
bitfld.long 0x00 30. "  SPIS638 ,SPI Status Bit 638" "Low,High"
bitfld.long 0x00 29. "  SPIS637 ,SPI Status Bit 637" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS636 ,SPI Status Bit 636" "Low,High"
bitfld.long 0x00 27. "  SPIS635 ,SPI Status Bit 635" "Low,High"
bitfld.long 0x00 26. "  SPIS634 ,SPI Status Bit 634" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS633 ,SPI Status Bit 633" "Low,High"
bitfld.long 0x00 24. "  SPIS632 ,SPI Status Bit 632" "Low,High"
bitfld.long 0x00 23. "  SPIS631 ,SPI Status Bit 631" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS630 ,SPI Status Bit 630" "Low,High"
bitfld.long 0x00 21. "  SPIS629 ,SPI Status Bit 629" "Low,High"
bitfld.long 0x00 20. "  SPIS628 ,SPI Status Bit 628" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS627 ,SPI Status Bit 627" "Low,High"
bitfld.long 0x00 18. "  SPIS626 ,SPI Status Bit 626" "Low,High"
bitfld.long 0x00 17. "  SPIS625 ,SPI Status Bit 625" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS624 ,SPI Status Bit 624" "Low,High"
bitfld.long 0x00 15. "  SPIS623 ,SPI Status Bit 623" "Low,High"
bitfld.long 0x00 14. "  SPIS622 ,SPI Status Bit 622" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS621 ,SPI Status Bit 621" "Low,High"
bitfld.long 0x00 12. "  SPIS620 ,SPI Status Bit 620" "Low,High"
bitfld.long 0x00 11. "  SPIS619 ,SPI Status Bit 619" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS618 ,SPI Status Bit 618" "Low,High"
bitfld.long 0x00 9. "  SPIS617 ,SPI Status Bit 617" "Low,High"
bitfld.long 0x00 8. "  SPIS616 ,SPI Status Bit 616" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS615 ,SPI Status Bit 615" "Low,High"
bitfld.long 0x00 6. "  SPIS614 ,SPI Status Bit 614" "Low,High"
bitfld.long 0x00 5. "  SPIS613 ,SPI Status Bit 613" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS612 ,SPI Status Bit 612" "Low,High"
bitfld.long 0x00 3. "  SPIS611 ,SPI Status Bit 611" "Low,High"
bitfld.long 0x00 2. "  SPIS610 ,SPI Status Bit 610" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS609 ,SPI Status Bit 609" "Low,High"
bitfld.long 0x00 0. "  SPIS608 ,SPI Status Bit 608" "Low,High"
else
hgroup.long 0xC0CC++0x03
hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
rgroup.long 0xC0D0++0x03
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
bitfld.long 0x00 31. " SPIS671 ,SPI Status Bit 671" "Low,High"
bitfld.long 0x00 30. "  SPIS670 ,SPI Status Bit 670" "Low,High"
bitfld.long 0x00 29. "  SPIS669 ,SPI Status Bit 669" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS668 ,SPI Status Bit 668" "Low,High"
bitfld.long 0x00 27. "  SPIS667 ,SPI Status Bit 667" "Low,High"
bitfld.long 0x00 26. "  SPIS666 ,SPI Status Bit 666" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS665 ,SPI Status Bit 665" "Low,High"
bitfld.long 0x00 24. "  SPIS664 ,SPI Status Bit 664" "Low,High"
bitfld.long 0x00 23. "  SPIS663 ,SPI Status Bit 663" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS662 ,SPI Status Bit 662" "Low,High"
bitfld.long 0x00 21. "  SPIS661 ,SPI Status Bit 661" "Low,High"
bitfld.long 0x00 20. "  SPIS660 ,SPI Status Bit 660" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS659 ,SPI Status Bit 659" "Low,High"
bitfld.long 0x00 18. "  SPIS658 ,SPI Status Bit 658" "Low,High"
bitfld.long 0x00 17. "  SPIS657 ,SPI Status Bit 657" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS656 ,SPI Status Bit 656" "Low,High"
bitfld.long 0x00 15. "  SPIS655 ,SPI Status Bit 655" "Low,High"
bitfld.long 0x00 14. "  SPIS654 ,SPI Status Bit 654" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS653 ,SPI Status Bit 653" "Low,High"
bitfld.long 0x00 12. "  SPIS652 ,SPI Status Bit 652" "Low,High"
bitfld.long 0x00 11. "  SPIS651 ,SPI Status Bit 651" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS650 ,SPI Status Bit 650" "Low,High"
bitfld.long 0x00 9. "  SPIS649 ,SPI Status Bit 649" "Low,High"
bitfld.long 0x00 8. "  SPIS648 ,SPI Status Bit 648" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS647 ,SPI Status Bit 647" "Low,High"
bitfld.long 0x00 6. "  SPIS646 ,SPI Status Bit 646" "Low,High"
bitfld.long 0x00 5. "  SPIS645 ,SPI Status Bit 645" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS644 ,SPI Status Bit 644" "Low,High"
bitfld.long 0x00 3. "  SPIS643 ,SPI Status Bit 643" "Low,High"
bitfld.long 0x00 2. "  SPIS642 ,SPI Status Bit 642" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS641 ,SPI Status Bit 641" "Low,High"
bitfld.long 0x00 0. "  SPIS640 ,SPI Status Bit 640" "Low,High"
else
hgroup.long 0xC0D0++0x03
hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
rgroup.long 0xC0D4++0x03
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
bitfld.long 0x00 31. " SPIS703 ,SPI Status Bit 703" "Low,High"
bitfld.long 0x00 30. "  SPIS702 ,SPI Status Bit 702" "Low,High"
bitfld.long 0x00 29. "  SPIS701 ,SPI Status Bit 701" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS700 ,SPI Status Bit 700" "Low,High"
bitfld.long 0x00 27. "  SPIS699 ,SPI Status Bit 699" "Low,High"
bitfld.long 0x00 26. "  SPIS698 ,SPI Status Bit 698" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS697 ,SPI Status Bit 697" "Low,High"
bitfld.long 0x00 24. "  SPIS696 ,SPI Status Bit 696" "Low,High"
bitfld.long 0x00 23. "  SPIS695 ,SPI Status Bit 695" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS694 ,SPI Status Bit 694" "Low,High"
bitfld.long 0x00 21. "  SPIS693 ,SPI Status Bit 693" "Low,High"
bitfld.long 0x00 20. "  SPIS692 ,SPI Status Bit 692" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS691 ,SPI Status Bit 691" "Low,High"
bitfld.long 0x00 18. "  SPIS690 ,SPI Status Bit 690" "Low,High"
bitfld.long 0x00 17. "  SPIS689 ,SPI Status Bit 689" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS688 ,SPI Status Bit 688" "Low,High"
bitfld.long 0x00 15. "  SPIS687 ,SPI Status Bit 687" "Low,High"
bitfld.long 0x00 14. "  SPIS686 ,SPI Status Bit 686" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS685 ,SPI Status Bit 685" "Low,High"
bitfld.long 0x00 12. "  SPIS684 ,SPI Status Bit 684" "Low,High"
bitfld.long 0x00 11. "  SPIS683 ,SPI Status Bit 683" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS682 ,SPI Status Bit 682" "Low,High"
bitfld.long 0x00 9. "  SPIS681 ,SPI Status Bit 681" "Low,High"
bitfld.long 0x00 8. "  SPIS680 ,SPI Status Bit 680" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS679 ,SPI Status Bit 679" "Low,High"
bitfld.long 0x00 6. "  SPIS678 ,SPI Status Bit 678" "Low,High"
bitfld.long 0x00 5. "  SPIS677 ,SPI Status Bit 677" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS676 ,SPI Status Bit 676" "Low,High"
bitfld.long 0x00 3. "  SPIS675 ,SPI Status Bit 675" "Low,High"
bitfld.long 0x00 2. "  SPIS674 ,SPI Status Bit 674" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS673 ,SPI Status Bit 673" "Low,High"
bitfld.long 0x00 0. "  SPIS672 ,SPI Status Bit 672" "Low,High"
else
hgroup.long 0xC0D4++0x03
hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
rgroup.long 0xC0D8++0x03
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
bitfld.long 0x00 31. " SPIS735 ,SPI Status Bit 735" "Low,High"
bitfld.long 0x00 30. "  SPIS734 ,SPI Status Bit 734" "Low,High"
bitfld.long 0x00 29. "  SPIS733 ,SPI Status Bit 733" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS732 ,SPI Status Bit 732" "Low,High"
bitfld.long 0x00 27. "  SPIS731 ,SPI Status Bit 731" "Low,High"
bitfld.long 0x00 26. "  SPIS730 ,SPI Status Bit 730" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS729 ,SPI Status Bit 729" "Low,High"
bitfld.long 0x00 24. "  SPIS728 ,SPI Status Bit 728" "Low,High"
bitfld.long 0x00 23. "  SPIS727 ,SPI Status Bit 727" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS726 ,SPI Status Bit 726" "Low,High"
bitfld.long 0x00 21. "  SPIS725 ,SPI Status Bit 725" "Low,High"
bitfld.long 0x00 20. "  SPIS724 ,SPI Status Bit 724" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS723 ,SPI Status Bit 723" "Low,High"
bitfld.long 0x00 18. "  SPIS722 ,SPI Status Bit 722" "Low,High"
bitfld.long 0x00 17. "  SPIS721 ,SPI Status Bit 721" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS720 ,SPI Status Bit 720" "Low,High"
bitfld.long 0x00 15. "  SPIS719 ,SPI Status Bit 719" "Low,High"
bitfld.long 0x00 14. "  SPIS718 ,SPI Status Bit 718" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS717 ,SPI Status Bit 717" "Low,High"
bitfld.long 0x00 12. "  SPIS716 ,SPI Status Bit 716" "Low,High"
bitfld.long 0x00 11. "  SPIS715 ,SPI Status Bit 715" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS714 ,SPI Status Bit 714" "Low,High"
bitfld.long 0x00 9. "  SPIS713 ,SPI Status Bit 713" "Low,High"
bitfld.long 0x00 8. "  SPIS712 ,SPI Status Bit 712" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS711 ,SPI Status Bit 711" "Low,High"
bitfld.long 0x00 6. "  SPIS710 ,SPI Status Bit 710" "Low,High"
bitfld.long 0x00 5. "  SPIS709 ,SPI Status Bit 709" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS708 ,SPI Status Bit 708" "Low,High"
bitfld.long 0x00 3. "  SPIS707 ,SPI Status Bit 707" "Low,High"
bitfld.long 0x00 2. "  SPIS706 ,SPI Status Bit 706" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS705 ,SPI Status Bit 705" "Low,High"
bitfld.long 0x00 0. "  SPIS704 ,SPI Status Bit 704" "Low,High"
else
hgroup.long 0xC0D8++0x03
hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
rgroup.long 0xC0DC++0x03
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
bitfld.long 0x00 31. " SPIS767 ,SPI Status Bit 767" "Low,High"
bitfld.long 0x00 30. "  SPIS766 ,SPI Status Bit 766" "Low,High"
bitfld.long 0x00 29. "  SPIS765 ,SPI Status Bit 765" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS764 ,SPI Status Bit 764" "Low,High"
bitfld.long 0x00 27. "  SPIS763 ,SPI Status Bit 763" "Low,High"
bitfld.long 0x00 26. "  SPIS762 ,SPI Status Bit 762" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS761 ,SPI Status Bit 761" "Low,High"
bitfld.long 0x00 24. "  SPIS760 ,SPI Status Bit 760" "Low,High"
bitfld.long 0x00 23. "  SPIS759 ,SPI Status Bit 759" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS758 ,SPI Status Bit 758" "Low,High"
bitfld.long 0x00 21. "  SPIS757 ,SPI Status Bit 757" "Low,High"
bitfld.long 0x00 20. "  SPIS756 ,SPI Status Bit 756" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS755 ,SPI Status Bit 755" "Low,High"
bitfld.long 0x00 18. "  SPIS754 ,SPI Status Bit 754" "Low,High"
bitfld.long 0x00 17. "  SPIS753 ,SPI Status Bit 753" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS752 ,SPI Status Bit 752" "Low,High"
bitfld.long 0x00 15. "  SPIS751 ,SPI Status Bit 751" "Low,High"
bitfld.long 0x00 14. "  SPIS750 ,SPI Status Bit 750" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS749 ,SPI Status Bit 749" "Low,High"
bitfld.long 0x00 12. "  SPIS748 ,SPI Status Bit 748" "Low,High"
bitfld.long 0x00 11. "  SPIS747 ,SPI Status Bit 747" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS746 ,SPI Status Bit 746" "Low,High"
bitfld.long 0x00 9. "  SPIS745 ,SPI Status Bit 745" "Low,High"
bitfld.long 0x00 8. "  SPIS744 ,SPI Status Bit 744" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS743 ,SPI Status Bit 743" "Low,High"
bitfld.long 0x00 6. "  SPIS742 ,SPI Status Bit 742" "Low,High"
bitfld.long 0x00 5. "  SPIS741 ,SPI Status Bit 741" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS740 ,SPI Status Bit 740" "Low,High"
bitfld.long 0x00 3. "  SPIS739 ,SPI Status Bit 739" "Low,High"
bitfld.long 0x00 2. "  SPIS738 ,SPI Status Bit 738" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS737 ,SPI Status Bit 737" "Low,High"
bitfld.long 0x00 0. "  SPIS736 ,SPI Status Bit 736" "Low,High"
else
hgroup.long 0xC0DC++0x03
hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
rgroup.long 0xC0E0++0x03
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
bitfld.long 0x00 31. " SPIS799 ,SPI Status Bit 799" "Low,High"
bitfld.long 0x00 30. "  SPIS798 ,SPI Status Bit 798" "Low,High"
bitfld.long 0x00 29. "  SPIS797 ,SPI Status Bit 797" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS796 ,SPI Status Bit 796" "Low,High"
bitfld.long 0x00 27. "  SPIS795 ,SPI Status Bit 795" "Low,High"
bitfld.long 0x00 26. "  SPIS794 ,SPI Status Bit 794" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS793 ,SPI Status Bit 793" "Low,High"
bitfld.long 0x00 24. "  SPIS792 ,SPI Status Bit 792" "Low,High"
bitfld.long 0x00 23. "  SPIS791 ,SPI Status Bit 791" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS790 ,SPI Status Bit 790" "Low,High"
bitfld.long 0x00 21. "  SPIS789 ,SPI Status Bit 789" "Low,High"
bitfld.long 0x00 20. "  SPIS788 ,SPI Status Bit 788" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS787 ,SPI Status Bit 787" "Low,High"
bitfld.long 0x00 18. "  SPIS786 ,SPI Status Bit 786" "Low,High"
bitfld.long 0x00 17. "  SPIS785 ,SPI Status Bit 785" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS784 ,SPI Status Bit 784" "Low,High"
bitfld.long 0x00 15. "  SPIS783 ,SPI Status Bit 783" "Low,High"
bitfld.long 0x00 14. "  SPIS782 ,SPI Status Bit 782" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS781 ,SPI Status Bit 781" "Low,High"
bitfld.long 0x00 12. "  SPIS780 ,SPI Status Bit 780" "Low,High"
bitfld.long 0x00 11. "  SPIS779 ,SPI Status Bit 779" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS778 ,SPI Status Bit 778" "Low,High"
bitfld.long 0x00 9. "  SPIS777 ,SPI Status Bit 777" "Low,High"
bitfld.long 0x00 8. "  SPIS776 ,SPI Status Bit 776" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS775 ,SPI Status Bit 775" "Low,High"
bitfld.long 0x00 6. "  SPIS774 ,SPI Status Bit 774" "Low,High"
bitfld.long 0x00 5. "  SPIS773 ,SPI Status Bit 773" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS772 ,SPI Status Bit 772" "Low,High"
bitfld.long 0x00 3. "  SPIS771 ,SPI Status Bit 771" "Low,High"
bitfld.long 0x00 2. "  SPIS770 ,SPI Status Bit 770" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS769 ,SPI Status Bit 769" "Low,High"
bitfld.long 0x00 0. "  SPIS768 ,SPI Status Bit 768" "Low,High"
else
hgroup.long 0xC0E0++0x03
hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
rgroup.long 0xC0E4++0x03
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
bitfld.long 0x00 31. " SPIS831 ,SPI Status Bit 831" "Low,High"
bitfld.long 0x00 30. "  SPIS830 ,SPI Status Bit 830" "Low,High"
bitfld.long 0x00 29. "  SPIS829 ,SPI Status Bit 829" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS828 ,SPI Status Bit 828" "Low,High"
bitfld.long 0x00 27. "  SPIS827 ,SPI Status Bit 827" "Low,High"
bitfld.long 0x00 26. "  SPIS826 ,SPI Status Bit 826" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS825 ,SPI Status Bit 825" "Low,High"
bitfld.long 0x00 24. "  SPIS824 ,SPI Status Bit 824" "Low,High"
bitfld.long 0x00 23. "  SPIS823 ,SPI Status Bit 823" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS822 ,SPI Status Bit 822" "Low,High"
bitfld.long 0x00 21. "  SPIS821 ,SPI Status Bit 821" "Low,High"
bitfld.long 0x00 20. "  SPIS820 ,SPI Status Bit 820" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS819 ,SPI Status Bit 819" "Low,High"
bitfld.long 0x00 18. "  SPIS818 ,SPI Status Bit 818" "Low,High"
bitfld.long 0x00 17. "  SPIS817 ,SPI Status Bit 817" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS816 ,SPI Status Bit 816" "Low,High"
bitfld.long 0x00 15. "  SPIS815 ,SPI Status Bit 815" "Low,High"
bitfld.long 0x00 14. "  SPIS814 ,SPI Status Bit 814" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS813 ,SPI Status Bit 813" "Low,High"
bitfld.long 0x00 12. "  SPIS812 ,SPI Status Bit 812" "Low,High"
bitfld.long 0x00 11. "  SPIS811 ,SPI Status Bit 811" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS810 ,SPI Status Bit 810" "Low,High"
bitfld.long 0x00 9. "  SPIS809 ,SPI Status Bit 809" "Low,High"
bitfld.long 0x00 8. "  SPIS808 ,SPI Status Bit 808" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS807 ,SPI Status Bit 807" "Low,High"
bitfld.long 0x00 6. "  SPIS806 ,SPI Status Bit 806" "Low,High"
bitfld.long 0x00 5. "  SPIS805 ,SPI Status Bit 805" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS804 ,SPI Status Bit 804" "Low,High"
bitfld.long 0x00 3. "  SPIS803 ,SPI Status Bit 803" "Low,High"
bitfld.long 0x00 2. "  SPIS802 ,SPI Status Bit 802" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS801 ,SPI Status Bit 801" "Low,High"
bitfld.long 0x00 0. "  SPIS800 ,SPI Status Bit 800" "Low,High"
else
hgroup.long 0xC0E4++0x03
hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
rgroup.long 0xC0E8++0x03
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
bitfld.long 0x00 31. " SPIS863 ,SPI Status Bit 863" "Low,High"
bitfld.long 0x00 30. "  SPIS862 ,SPI Status Bit 862" "Low,High"
bitfld.long 0x00 29. "  SPIS861 ,SPI Status Bit 861" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS860 ,SPI Status Bit 860" "Low,High"
bitfld.long 0x00 27. "  SPIS859 ,SPI Status Bit 859" "Low,High"
bitfld.long 0x00 26. "  SPIS858 ,SPI Status Bit 858" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS857 ,SPI Status Bit 857" "Low,High"
bitfld.long 0x00 24. "  SPIS856 ,SPI Status Bit 856" "Low,High"
bitfld.long 0x00 23. "  SPIS855 ,SPI Status Bit 855" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS854 ,SPI Status Bit 854" "Low,High"
bitfld.long 0x00 21. "  SPIS853 ,SPI Status Bit 853" "Low,High"
bitfld.long 0x00 20. "  SPIS852 ,SPI Status Bit 852" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS851 ,SPI Status Bit 851" "Low,High"
bitfld.long 0x00 18. "  SPIS850 ,SPI Status Bit 850" "Low,High"
bitfld.long 0x00 17. "  SPIS849 ,SPI Status Bit 849" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS848 ,SPI Status Bit 848" "Low,High"
bitfld.long 0x00 15. "  SPIS847 ,SPI Status Bit 847" "Low,High"
bitfld.long 0x00 14. "  SPIS846 ,SPI Status Bit 846" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS845 ,SPI Status Bit 845" "Low,High"
bitfld.long 0x00 12. "  SPIS844 ,SPI Status Bit 844" "Low,High"
bitfld.long 0x00 11. "  SPIS843 ,SPI Status Bit 843" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS842 ,SPI Status Bit 842" "Low,High"
bitfld.long 0x00 9. "  SPIS841 ,SPI Status Bit 841" "Low,High"
bitfld.long 0x00 8. "  SPIS840 ,SPI Status Bit 840" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS839 ,SPI Status Bit 839" "Low,High"
bitfld.long 0x00 6. "  SPIS838 ,SPI Status Bit 838" "Low,High"
bitfld.long 0x00 5. "  SPIS837 ,SPI Status Bit 837" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS836 ,SPI Status Bit 836" "Low,High"
bitfld.long 0x00 3. "  SPIS835 ,SPI Status Bit 835" "Low,High"
bitfld.long 0x00 2. "  SPIS834 ,SPI Status Bit 834" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS833 ,SPI Status Bit 833" "Low,High"
bitfld.long 0x00 0. "  SPIS832 ,SPI Status Bit 832" "Low,High"
else
hgroup.long 0xC0E8++0x03
hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
rgroup.long 0xC0EC++0x03
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
bitfld.long 0x00 31. " SPIS895 ,SPI Status Bit 895" "Low,High"
bitfld.long 0x00 30. "  SPIS894 ,SPI Status Bit 894" "Low,High"
bitfld.long 0x00 29. "  SPIS893 ,SPI Status Bit 893" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS892 ,SPI Status Bit 892" "Low,High"
bitfld.long 0x00 27. "  SPIS891 ,SPI Status Bit 891" "Low,High"
bitfld.long 0x00 26. "  SPIS890 ,SPI Status Bit 890" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS889 ,SPI Status Bit 889" "Low,High"
bitfld.long 0x00 24. "  SPIS888 ,SPI Status Bit 888" "Low,High"
bitfld.long 0x00 23. "  SPIS887 ,SPI Status Bit 887" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS886 ,SPI Status Bit 886" "Low,High"
bitfld.long 0x00 21. "  SPIS885 ,SPI Status Bit 885" "Low,High"
bitfld.long 0x00 20. "  SPIS884 ,SPI Status Bit 884" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS883 ,SPI Status Bit 883" "Low,High"
bitfld.long 0x00 18. "  SPIS882 ,SPI Status Bit 882" "Low,High"
bitfld.long 0x00 17. "  SPIS881 ,SPI Status Bit 881" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS880 ,SPI Status Bit 880" "Low,High"
bitfld.long 0x00 15. "  SPIS879 ,SPI Status Bit 879" "Low,High"
bitfld.long 0x00 14. "  SPIS878 ,SPI Status Bit 878" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS877 ,SPI Status Bit 877" "Low,High"
bitfld.long 0x00 12. "  SPIS876 ,SPI Status Bit 876" "Low,High"
bitfld.long 0x00 11. "  SPIS875 ,SPI Status Bit 875" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS874 ,SPI Status Bit 874" "Low,High"
bitfld.long 0x00 9. "  SPIS873 ,SPI Status Bit 873" "Low,High"
bitfld.long 0x00 8. "  SPIS872 ,SPI Status Bit 872" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS871 ,SPI Status Bit 871" "Low,High"
bitfld.long 0x00 6. "  SPIS870 ,SPI Status Bit 870" "Low,High"
bitfld.long 0x00 5. "  SPIS869 ,SPI Status Bit 869" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS868 ,SPI Status Bit 868" "Low,High"
bitfld.long 0x00 3. "  SPIS867 ,SPI Status Bit 867" "Low,High"
bitfld.long 0x00 2. "  SPIS866 ,SPI Status Bit 866" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS865 ,SPI Status Bit 865" "Low,High"
bitfld.long 0x00 0. "  SPIS864 ,SPI Status Bit 864" "Low,High"
else
hgroup.long 0xC0EC++0x03
hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
rgroup.long 0xC0F0++0x03
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
bitfld.long 0x00 31. " SPIS927 ,SPI Status Bit 927" "Low,High"
bitfld.long 0x00 30. "  SPIS926 ,SPI Status Bit 926" "Low,High"
bitfld.long 0x00 29. "  SPIS925 ,SPI Status Bit 925" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS924 ,SPI Status Bit 924" "Low,High"
bitfld.long 0x00 27. "  SPIS923 ,SPI Status Bit 923" "Low,High"
bitfld.long 0x00 26. "  SPIS922 ,SPI Status Bit 922" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS921 ,SPI Status Bit 921" "Low,High"
bitfld.long 0x00 24. "  SPIS920 ,SPI Status Bit 920" "Low,High"
bitfld.long 0x00 23. "  SPIS919 ,SPI Status Bit 919" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS918 ,SPI Status Bit 918" "Low,High"
bitfld.long 0x00 21. "  SPIS917 ,SPI Status Bit 917" "Low,High"
bitfld.long 0x00 20. "  SPIS916 ,SPI Status Bit 916" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS915 ,SPI Status Bit 915" "Low,High"
bitfld.long 0x00 18. "  SPIS914 ,SPI Status Bit 914" "Low,High"
bitfld.long 0x00 17. "  SPIS913 ,SPI Status Bit 913" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS912 ,SPI Status Bit 912" "Low,High"
bitfld.long 0x00 15. "  SPIS911 ,SPI Status Bit 911" "Low,High"
bitfld.long 0x00 14. "  SPIS910 ,SPI Status Bit 910" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS909 ,SPI Status Bit 909" "Low,High"
bitfld.long 0x00 12. "  SPIS908 ,SPI Status Bit 908" "Low,High"
bitfld.long 0x00 11. "  SPIS907 ,SPI Status Bit 907" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS906 ,SPI Status Bit 906" "Low,High"
bitfld.long 0x00 9. "  SPIS905 ,SPI Status Bit 905" "Low,High"
bitfld.long 0x00 8. "  SPIS904 ,SPI Status Bit 904" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS903 ,SPI Status Bit 903" "Low,High"
bitfld.long 0x00 6. "  SPIS902 ,SPI Status Bit 902" "Low,High"
bitfld.long 0x00 5. "  SPIS901 ,SPI Status Bit 901" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS900 ,SPI Status Bit 900" "Low,High"
bitfld.long 0x00 3. "  SPIS899 ,SPI Status Bit 899" "Low,High"
bitfld.long 0x00 2. "  SPIS898 ,SPI Status Bit 898" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS897 ,SPI Status Bit 897" "Low,High"
bitfld.long 0x00 0. "  SPIS896 ,SPI Status Bit 896" "Low,High"
else
hgroup.long 0xC0F0++0x03
hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
rgroup.long 0xC0F4++0x03
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
bitfld.long 0x00 31. " SPIS959 ,SPI Status Bit 959" "Low,High"
bitfld.long 0x00 30. "  SPIS958 ,SPI Status Bit 958" "Low,High"
bitfld.long 0x00 29. "  SPIS957 ,SPI Status Bit 957" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS956 ,SPI Status Bit 956" "Low,High"
bitfld.long 0x00 27. "  SPIS955 ,SPI Status Bit 955" "Low,High"
bitfld.long 0x00 26. "  SPIS954 ,SPI Status Bit 954" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS953 ,SPI Status Bit 953" "Low,High"
bitfld.long 0x00 24. "  SPIS952 ,SPI Status Bit 952" "Low,High"
bitfld.long 0x00 23. "  SPIS951 ,SPI Status Bit 951" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS950 ,SPI Status Bit 950" "Low,High"
bitfld.long 0x00 21. "  SPIS949 ,SPI Status Bit 949" "Low,High"
bitfld.long 0x00 20. "  SPIS948 ,SPI Status Bit 948" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS947 ,SPI Status Bit 947" "Low,High"
bitfld.long 0x00 18. "  SPIS946 ,SPI Status Bit 946" "Low,High"
bitfld.long 0x00 17. "  SPIS945 ,SPI Status Bit 945" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS944 ,SPI Status Bit 944" "Low,High"
bitfld.long 0x00 15. "  SPIS943 ,SPI Status Bit 943" "Low,High"
bitfld.long 0x00 14. "  SPIS942 ,SPI Status Bit 942" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS941 ,SPI Status Bit 941" "Low,High"
bitfld.long 0x00 12. "  SPIS940 ,SPI Status Bit 940" "Low,High"
bitfld.long 0x00 11. "  SPIS939 ,SPI Status Bit 939" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS938 ,SPI Status Bit 938" "Low,High"
bitfld.long 0x00 9. "  SPIS937 ,SPI Status Bit 937" "Low,High"
bitfld.long 0x00 8. "  SPIS936 ,SPI Status Bit 936" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS935 ,SPI Status Bit 935" "Low,High"
bitfld.long 0x00 6. "  SPIS934 ,SPI Status Bit 934" "Low,High"
bitfld.long 0x00 5. "  SPIS933 ,SPI Status Bit 933" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS932 ,SPI Status Bit 932" "Low,High"
bitfld.long 0x00 3. "  SPIS931 ,SPI Status Bit 931" "Low,High"
bitfld.long 0x00 2. "  SPIS930 ,SPI Status Bit 930" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS929 ,SPI Status Bit 929" "Low,High"
bitfld.long 0x00 0. "  SPIS928 ,SPI Status Bit 928" "Low,High"
else
hgroup.long 0xC0F4++0x03
hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
rgroup.long 0xC0F8++0x03
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
bitfld.long 0x00 31. " SPIS991 ,SPI Status Bit 991" "Low,High"
bitfld.long 0x00 30. "  SPIS990 ,SPI Status Bit 990" "Low,High"
bitfld.long 0x00 29. "  SPIS989 ,SPI Status Bit 989" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS988 ,SPI Status Bit 988" "Low,High"
bitfld.long 0x00 27. "  SPIS987 ,SPI Status Bit 987" "Low,High"
bitfld.long 0x00 26. "  SPIS986 ,SPI Status Bit 986" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS985 ,SPI Status Bit 985" "Low,High"
bitfld.long 0x00 24. "  SPIS984 ,SPI Status Bit 984" "Low,High"
bitfld.long 0x00 23. "  SPIS983 ,SPI Status Bit 983" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS982 ,SPI Status Bit 982" "Low,High"
bitfld.long 0x00 21. "  SPIS981 ,SPI Status Bit 981" "Low,High"
bitfld.long 0x00 20. "  SPIS980 ,SPI Status Bit 980" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS979 ,SPI Status Bit 979" "Low,High"
bitfld.long 0x00 18. "  SPIS978 ,SPI Status Bit 978" "Low,High"
bitfld.long 0x00 17. "  SPIS977 ,SPI Status Bit 977" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS976 ,SPI Status Bit 976" "Low,High"
bitfld.long 0x00 15. "  SPIS975 ,SPI Status Bit 975" "Low,High"
bitfld.long 0x00 14. "  SPIS974 ,SPI Status Bit 974" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS973 ,SPI Status Bit 973" "Low,High"
bitfld.long 0x00 12. "  SPIS972 ,SPI Status Bit 972" "Low,High"
bitfld.long 0x00 11. "  SPIS971 ,SPI Status Bit 971" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS970 ,SPI Status Bit 970" "Low,High"
bitfld.long 0x00 9. "  SPIS969 ,SPI Status Bit 969" "Low,High"
bitfld.long 0x00 8. "  SPIS968 ,SPI Status Bit 968" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS967 ,SPI Status Bit 967" "Low,High"
bitfld.long 0x00 6. "  SPIS966 ,SPI Status Bit 966" "Low,High"
bitfld.long 0x00 5. "  SPIS965 ,SPI Status Bit 965" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS964 ,SPI Status Bit 964" "Low,High"
bitfld.long 0x00 3. "  SPIS963 ,SPI Status Bit 963" "Low,High"
bitfld.long 0x00 2. "  SPIS962 ,SPI Status Bit 962" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS961 ,SPI Status Bit 961" "Low,High"
bitfld.long 0x00 0. "  SPIS960 ,SPI Status Bit 960" "Low,High"
else
hgroup.long 0xC0F8++0x03
hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
endif
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Not Used,Used"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICD_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICD_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICD_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICD_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
base (COMP.BASE("GICD",-1.)+0x20000)
width 24.
tree "Interrupt Translation Service"
group.long 0x00++0x03
line.long 0x00 "GITS_CTLR,ITS Control Register"
rbitfld.long 0x00 31. "         QUIESCENT              ,Indicates completion of all ITS operations" "Not quiescent,Quiescent"
bitfld.long 0x00 0. "                      ENABLED                ,Controls whether the ITS is enabled" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GITS_IIDR,ITS Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID                 ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "                            VAR                    ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 12.--15. " REV                    ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                                 IMP                    ,Implementer"
if (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0x1000000000)==0x1000000000)&&(((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
bitfld.quad 0x00 32.--35. " CIDBITS                ,Number of Collection ID bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "                                 HCC                    ,Hardware Collection Count"
textline "                                         "
bitfld.quad 0x00 19. " PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
bitfld.quad 0x00 18. "  SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
textline "                                         "
bitfld.quad 0x00 13.--17. " DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "                                 ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
rbitfld.quad 0x00 4.--7. " ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 2. "                                 CCT                    ,Cumulative Collection Tables" "0,1"
elif (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0x1000000000)==0x1000000000)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
bitfld.quad 0x00 32.--35. " CIDBITS                ,Number of Collection ID bits minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "                                 HCC                    ,Hardware Collection Count"
textline "                                         "
bitfld.quad 0x00 19. " PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
bitfld.quad 0x00 18. "  SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
textline "                                         "
bitfld.quad 0x00 13.--17. " DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "                                 ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
rbitfld.quad 0x00 4.--7. " ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
elif (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
hexmask.quad.byte 0x00 24.--31. 1. " HCC                    ,Hardware Collection Count"
bitfld.quad 0x00 19. "                                 PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
textline "                                         "
bitfld.quad 0x00 18. " SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "                     DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.quad 0x00 8.--12. " ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "                                 ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.quad 0x00 2. " CCT                    ,Cumulative Collection Tables" "0,1"
else
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
hexmask.quad.byte 0x00 24.--31. 1. " HCC                    ,Hardware Collection Count"
bitfld.quad 0x00 19. "                                 PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
textline "                                         "
bitfld.quad 0x00 18. " SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "                     DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.quad 0x00 8.--12. " ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "                                 ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.quad 0x80++0x07
line.quad 0x00 "GITS_CBASER,The command queue control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the command queue" "Not allocated,Allocated"
bitfld.quad 0x00 59.--61. "                      INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the command queue" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the command queue" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "    PHYSICAL_ADDRESS       ,Bits [51:12] of the base physical address of the command queue"
textline "                                         "
bitfld.quad 0x00 10.--11. " SHAREABILITY           ,Indicates the Shareability attributes of accesses to the command queue" "Non-shareable,Inner Shareable,Outer Shareable,?..."
hexmask.quad.byte 0x00 0.--7. 1. "                    SIZE                   ,The number of 4KB pages of physical memory allocated to the command queue minus one"
group.quad 0x88++0x7
line.quad 0x00 "GITS_CWRITER,The command queue write pointer"
hexmask.quad.word 0x00 5.--19. 0x20 " OFFSET                 ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "                               RETRY                  ,Restarts the processing of commands by the ITS if it stalled because of a command error" "No effect,Restarted"
group.quad 0x90++0x07
line.quad 0x00 "GITS_CREADR,The command queue read pointer"
hexmask.quad.word 0x00 5.--19. 0x20 " OFFSET                 ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "                               STALLED                ,Reports whether the processing of commands is stalled because of a command error" "Not stalled,Stalled"
if (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0100))&0x700000000000000)==0x00)
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "                      INDIRECT               ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
textline "                                         "
bitfld.quad 0x00 59.--61. " INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "    TYPE                   ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "    ENTRY_SIZE             ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
hexmask.quad 0x00 12.--47. 1. " PHYSICAL_ADDRESS       ,Physical Address"
bitfld.quad 0x00 10.--11. "                   SHAREABILITY           ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                         "
bitfld.quad 0x00 8.--9. " PAGE_SIZE              ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "                      INDIRECT               ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
textline "                                         "
bitfld.quad 0x00 59.--61. " INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "    TYPE                   ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "    ENTRY_SIZE             ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
hexmask.quad 0x00 12.--47. 0x10 " PHYSICAL_ADDRESS       ,Physical Address"
bitfld.quad 0x00 10.--11. "                   SHAREABILITY           ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                         "
bitfld.quad 0x00 8.--9. " PAGE_SIZE              ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "                               SIZE                   ,The number of pages of physical memory allocated to the table minus one"
endif
textline "                                         "
wgroup.long 0xC000++0x03
line.long 0x00 "GITS_TRKCTLR,Tracking Control Register"
bitfld.long 0x00 1. "         LPI_TRACK              ,Write 0b1 to capture information about the next interrupt that the ITS generated or failed to generate because of misprogramming" "No effect,Capture"
bitfld.long 0x00 0. "  CACHE_COUNT_RESET      ,Write 0b1 to reset the cache hit and miss counters in GITS_TRKICR and GITS_TRKLCR" "No effect,Reset"
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x1F)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 6. "         PID_OUT_OF_RANGE       ,Indicates that the LPI PID is larger than that allowed by the IDbits field in the GICR_PROPBASER" "0,1"
bitfld.long 0x00 5. "          TARGET_OUT_OF_RANGE    ,Indicates that target collection has not been successfully mapped using MAPC or that the target core does not have LPIs enabled in GICR_CTLR" "0,1"
textline "                                 "
bitfld.long 0x00 4. "         NO_TRANSLATION         ,Indicates that no valid MAPI or MAPVI has successfully been performed for this combination of input ID and Device ID" "0,1"
bitfld.long 0x00 3. "          INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
textline "                                 "
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0xF)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 4. "         NO_TRANSLATION         ,Indicates that no valid MAPI or MAPVI has successfully been performed for this combination of input ID and Device ID" "0,1"
bitfld.long 0x00 3. "          INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
textline "                                 "
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 3. "         INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
bitfld.long 0x00 2. "          DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
textline "                                 "
bitfld.long 0x00 1. "         DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
bitfld.long 0x00 0. "          LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x3)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
else
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 1. "         DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
bitfld.long 0x00 0. "          LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x01)==0x01)
rgroup.long 0xC008++0x03
line.long 0x00 "GITS_TRKDIDR,Debug Tracked DID Register"
hexmask.long.tbyte 0x00 0.--19. 1. "         LPI_DID                ,The Device ID for the interrupt that was tracked"
else
hgroup.long 0xC008++0x03
hide.long 0x00 "GITS_TRKDIDR,Debug Tracked DID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7F)==0x01)
rgroup.long 0xC00C++0x03
line.long 0x00 "GITS_TRKPIDR,Debug Tracked PID Register"
hexmask.long.word 0x00 0.--15. 1. "         LPI_PID                ,The ID after translation for an interrupt that was tracked and generated an LPI successfully"
else
hgroup.long 0xC00C++0x03
hide.long 0x00 "GITS_TRKPIDR,Debug Tracked PID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x01)==0x01)
rgroup.long 0xC010++0x03
line.long 0x00 "GITS_TRKVIDR,Debug Tracked ID Register"
hexmask.long.word 0x00 0.--15. 1. "         LPI_ID                 ,The ID before translation of the interrupt that was tracked"
else
hgroup.long 0xC010++0x03
hide.long 0x00 "GITS_TRKVIDR,Debug Tracked ID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7F)==0x01)
rgroup.long 0xC014++0x03
line.long 0x00 "GITS_TRKTGTR,Debug Tracked Target Register"
hexmask.long.byte 0x00 0.--6. 1. "         LPI_TARGET_CORE        ,The target core for an interrupt that was tracked and generated an LPI successfully"
else
hgroup.long 0xC014++0x03
hide.long 0x00 "GITS_TRKTGTR,Debug Tracked Target Register"
endif
rgroup.long 0xC018++0x03
line.long 0x00 "GITS_TRKICR,Debug ITE Cache Statistics"
hexmask.long.word 0x00 16.--31. 1. "         ITE_CACHE_HITS         ,Number of hits in the ITE cache"
hexmask.long.word 0x00 0.--15. 1. "       ITE_CACHE_MISSES       ,Number of misses in the ITE cache"
rgroup.long 0xC01C++0x03
line.long 0x00 "GITS_TRKLCR,Debug LPI Cache Statistics"
hexmask.long.word 0x00 16.--31. 1. "         LPI_CACHE_HITS         ,Number of hits in the LPI cache"
hexmask.long.word 0x00 0.--15. 1. "       LPI_CACHE_MISSES       ,Number of misses in the LPI cache"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "         PART_0                 ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GITS_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "         DES_1                  ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         PART_1                 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GITS_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "         ARCHREV                ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "   JEDEC                  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
textline "                                 "
bitfld.long 0x00 0.--2. "         DES_1                  ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GITS_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "         REVAND                 ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         CMOD                   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GITS_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "         SIZE                   ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         DES_2                  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GITS_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GITS_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GITS_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GITS_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GITS_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GITS_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GITS_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
textline "                                 "
base (COMP.BASE("GICD",-1.)+0x20000)+0x10000
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)))&0x01)==0x01)
wgroup.long 0x40++0x03
line.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
else
hgroup.long 0x40++0x03
hide.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
endif
tree.end
width 0x0B
base COMP.BASE("GICR",-1.)
width 17.
tree "Redistributor Interface"
tree "Control Registers"
if (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x21)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
textline "                                  "
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x20)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
textline "                                  "
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x01)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICR_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID    ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "           VAR            ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 12.--15. " REV       ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                IMP            ,Implementer"
rgroup.quad 0x0008++0x07
line.quad 0x00 "GICR_TYPER,Interrupt Controller Type Register"
hexmask.quad.byte 0x00 56.--63. 1. " AFF3      ,Affinity level 3 value for the Redistributor"
hexmask.quad.byte 0x00 48.--55. 1. "                AFF2           ,Affinity level 2 value for the Redistributor"
hexmask.quad.byte 0x00 40.--47. 1. "              AFF1             ,Affinity level 1 value for the Redistributor"
textline "                                  "
hexmask.quad.byte 0x00 32.--39. 1. " AFF0      ,Affinity level 0 value for the Redistributor"
bitfld.quad 0x00 24.--25. "                COMMONLPIAFF   ,The affinity level at which Redistributors share a LPI Configuration table" "All levels,AFF3,AFF3/AFF2,AFF3/AFF2/AFF1"
hexmask.quad.word 0x00 8.--23. 1. "  PROCESSOR_NUMBER ,A unique identifier for the PE"
textline "                                  "
bitfld.quad 0x00 5. " DPGS      ,Sets support for GICR_CTLR.DPG* bits" "Not supported,Supported"
bitfld.quad 0x00 4. "     LAST           ,Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages" "Not highest,Highest"
bitfld.quad 0x00 3. "     DIRECTLPI        ,Indicates whether this Redistributor supports direct injection of LPIs" "Not supported,Supported"
textline "                                  "
bitfld.quad 0x00 0. " PLPIS     ,Indicates whether the GIC implementation supports physical LPIs" "Not supported,Supported"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x0014))))
group.long 0x0014++0x03
line.long 0x00 "GICR_WAKER,Power Management Control Register"
bitfld.long 0x00 31. "         QUIESCENT ,This bit shows that the GIC-500 is idle and can be powered down if required" "Not quiescent,Quiescent"
bitfld.long 0x00 2. "     CHILDRENASLEEP ,Indicates the bus between the CPU interface and this Redistributor is quiescent" "Not quiescent,Quiescent"
bitfld.long 0x00 1. "   PROCESSORASLEEP  ,Indicates if this Redistributor must assert a WakeRequest if there is a pending interrupt targeted at the connected core" "No,Yes"
textline "                                  "
bitfld.long 0x00 0. " SLEEP     ,Indicates if GIC-500 ensures that all the caches are consistent with external memory and that it is safe to power off" "No,Yes"
textline "                                  "
else
hgroup.long 0x0014++0x03
hide.long 0x00 "GICR_WAKER,Power Management Control Register"
endif
group.quad 0x070++0x07
line.quad 0x00 "GICR_PROPBASER,Common LPI configuration table base register"
bitfld.quad 0x00 56.--58. " OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Configuration table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS ,Bits [51:12] of the physical address containing the LPI Configuration table"
textline "                                  "
bitfld.quad 0x00 10.--11. " SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Configuration table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
bitfld.quad 0x00 7.--9. "                  INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Configuration table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                  "
bitfld.quad 0x00 0.--4. " IDBITS           ,The number of bits of LPI INTID supported minus one by the LPI Configuration table starting at Physical_Address"
group.quad 0x78++0x07
line.quad 0x00 "GICR_PENDBASER,LPI pending table base register"
bitfld.quad 0x00 62. "         PTZ              ,Pending Table Zero" "Not zero,Zero" 
bitfld.quad 0x00 56.--58. "                         OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Pending table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
textline "                                  "
hexmask.quad 0x00 16.--51. 0x10 " PHYSICAL_ADDRESS ,Bits [51:16] of the physical address containing the LPI Pending table"
bitfld.quad 0x00 10.--11. "                 SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Pending table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                  "
bitfld.quad 0x00 7.--9. " INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Pending table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                 "
tree.end
tree "SGI and PPI Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10080))
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30 ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29 ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27 ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26 ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24 ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23 ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21 ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20 ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18 ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17 ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15 ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14 ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12 ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11 ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9  ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8  ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6  ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5  ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3  ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2  ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0  ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x000)
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30 ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29 ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27 ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26 ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24 ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23 ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21 ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20 ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18 ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17 ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15 ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14 ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12 ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11 ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9  ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8  ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6  ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5  ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3  ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2  ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0  ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x10080++0x03
hide.long 0x00 "GICR_IGROUPR0,Interrupt Group Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
textline "                          "
width 24.
group.long 0x10100++0x03
line.long 0x0 "GICR_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRENB31    ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRENB30    ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRENB29    ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRENB28    ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRENB27    ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRENB26    ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRENB25    ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRENB24    ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRENB23    ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRENB22    ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRENB21    ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRENB20    ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRENB19    ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRENB18    ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRENB17    ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRENB16    ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRENB15    ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRENB14    ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRENB13    ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRENB12    ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRENB11    ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRENB10    ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRENB9     ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRENB8     ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRENB7     ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRENB6     ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRENB5     ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRENB4     ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRENB3     ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRENB2     ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRENB1     ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRENB0     ,Set/Clear Enable Bit 0" "Disabled,Enabled"
group.long 0x10200++0x03
line.long 0x0 "GICR_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
group.long 0x10300++0x03
line.long 0x0 "GICR_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9  ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8  ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRACTIVE7  ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6  ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5  ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRACTIVE4  ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3  ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2  ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRACTIVE1  ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0  ,Set/Clear Active Bit 0" "Not active,Active"
textline "                                 "
width 18.
group.long 0x10400++0x03
line.long 0x00 "GICR_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID2    ,Interrupt ID2    Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "     INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID0    ,Interrupt ID0    Priority/Priority Byte Offset 0   "
group.long 0x10404++0x03
line.long 0x00 "GICR_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID6    ,Interrupt ID6    Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "     INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID4    ,Interrupt ID4    Priority/Priority Byte Offset 4   "
group.long 0x10408++0x03
line.long 0x00 "GICR_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID10   ,Interrupt ID10   Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID8    ,Interrupt ID8    Priority/Priority Byte Offset 8   "
group.long 0x1040C++0x03
line.long 0x00 "GICR_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID14   ,Interrupt ID14   Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID12   ,Interrupt ID12   Priority/Priority Byte Offset 12  "
group.long 0x10410++0x03
line.long 0x00 "GICR_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID18   ,Interrupt ID18   Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID16   ,Interrupt ID16   Priority/Priority Byte Offset 16  "
group.long 0x10414++0x03
line.long 0x00 "GICR_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID22   ,Interrupt ID22   Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID20   ,Interrupt ID20   Priority/Priority Byte Offset 20  "
group.long 0x10418++0x03
line.long 0x00 "GICR_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID26   ,Interrupt ID26   Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID24   ,Interrupt ID24   Priority/Priority Byte Offset 24  "
group.long 0x1041C++0x03
line.long 0x00 "GICR_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID30   ,Interrupt ID30   Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID28   ,Interrupt ID28   Priority/Priority Byte Offset 28  "
textline "                                 "
rgroup.long 0x10C00++0x03
line.long 0x00 "GICR_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (SGI)" "Level,Edge"
group.long 0x10C04++0x03
line.long 0x00 "GICR_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1    ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                           "
width 18.
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10D00))
group.long 0x10D00++0x03
line.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
bitfld.long 0x00 31. " GMB31 ,Group Modifier Bit 31" "0,1"
bitfld.long 0x00 30. "  GMB30 ,Group Modifier Bit 30" "0,1"
bitfld.long 0x00 29. "  GMB29 ,Group Modifier Bit 29" "0,1"
textline "                           "
bitfld.long 0x00 28. " GMB28 ,Group Modifier Bit 28" "0,1"
bitfld.long 0x00 27. "  GMB27 ,Group Modifier Bit 27" "0,1"
bitfld.long 0x00 26. "  GMB26 ,Group Modifier Bit 26" "0,1"
textline "                           "
bitfld.long 0x00 25. " GMB25 ,Group Modifier Bit 25" "0,1"
bitfld.long 0x00 24. "  GMB24 ,Group Modifier Bit 24" "0,1"
bitfld.long 0x00 23. "  GMB23 ,Group Modifier Bit 23" "0,1"
textline "                           "
bitfld.long 0x00 22. " GMB22 ,Group Modifier Bit 22" "0,1"
bitfld.long 0x00 21. "  GMB21 ,Group Modifier Bit 21" "0,1"
bitfld.long 0x00 20. "  GMB20 ,Group Modifier Bit 20" "0,1"
textline "                           "
bitfld.long 0x00 19. " GMB19 ,Group Modifier Bit 19" "0,1"
bitfld.long 0x00 18. "  GMB18 ,Group Modifier Bit 18" "0,1"
bitfld.long 0x00 17. "  GMB17 ,Group Modifier Bit 17" "0,1"
textline "                           "
bitfld.long 0x00 16. " GMB16 ,Group Modifier Bit 16" "0,1"
bitfld.long 0x00 15. "  GMB15 ,Group Modifier Bit 15" "0,1"
bitfld.long 0x00 14. "  GMB14 ,Group Modifier Bit 14" "0,1"
textline "                           "
bitfld.long 0x00 13. " GMB13 ,Group Modifier Bit 13" "0,1"
bitfld.long 0x00 12. "  GMB12 ,Group Modifier Bit 12" "0,1"
bitfld.long 0x00 11. "  GMB11 ,Group Modifier Bit 11" "0,1"
textline "                           "
bitfld.long 0x00 10. " GMB10 ,Group Modifier Bit 10" "0,1"
bitfld.long 0x00 9. "  GMB9  ,Group Modifier Bit 9" "0,1"
bitfld.long 0x00 8. "  GMB8  ,Group Modifier Bit 8" "0,1"
textline "                           "
bitfld.long 0x00 7. " GMB7  ,Group Modifier Bit 7" "0,1"
bitfld.long 0x00 6. "  GMB6  ,Group Modifier Bit 6" "0,1"
bitfld.long 0x00 5. "  GMB5  ,Group Modifier Bit 5" "0,1"
textline "                           "
bitfld.long 0x00 4. " GMB4  ,Group Modifier Bit 4" "0,1"
bitfld.long 0x00 3. "  GMB3  ,Group Modifier Bit 3" "0,1"
bitfld.long 0x00 2. "  GMB2  ,Group Modifier Bit 2" "0,1"
textline "                           "
bitfld.long 0x00 1. " GMB1  ,Group Modifier Bit 1" "0,1"
bitfld.long 0x00 0. "  GMB0  ,Group Modifier Bit 0" "0,1"
textline "                           "
else
hgroup.long 0x10D00++0x03
hide.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10E00))
group.long 0x10E00++0x03
line.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
bitfld.long 0x00 30.--31. " NS_ACCESS15 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID15" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 28.--29. "  NS_ACCESS14 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID14" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 26.--27. "  NS_ACCESS13 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID13" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 24.--25. " NS_ACCESS12 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID12" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 22.--23. "  NS_ACCESS11 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID11" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 20.--21. "  NS_ACCESS10 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID10" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 18.--19. " NS_ACCESS9  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID9" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 16.--17. "  NS_ACCESS8  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID8" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 14.--15. "  NS_ACCESS7  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID7" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 12.--13. " NS_ACCESS6  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID6" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 10.--11. "  NS_ACCESS5  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID5" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 8.--9. "  NS_ACCESS4  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID4" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 6.--7. " NS_ACCESS3  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID3" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 4.--5. "  NS_ACCESS2  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID2" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 2.--3. "  NS_ACCESS1  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID1" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 0.--1. " NS_ACCESS0  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID0" "No access,G0S,G0S/G1S,?..."
textline "                           "
else
hgroup.long 0x10E00++0x03
hide.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
rgroup.long 0x1C000++0x03
line.long 0x00 "GICR_MISCSTATUSR,Miscellaneous Status Register"
bitfld.long 0x00 31. " CPU_AS     ,CPU active state. This bit returns the actual status of the cpu_active signal for the core corresponding to the Redistributor whose register is being read" "Low,High"
bitfld.long 0x00 2. "  ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
bitfld.long 0x00 1. "     ENABLEGRP1_NS ,EnableGrp1 Non-secure" "0,1"
textline "                           "
bitfld.long 0x00 0. " ENABLEGRP0 ,EnableGrp0" "0,1"
rgroup.long 0x1C080++0x03
line.long 0x00 "GICR_PPISR,Private Peripheral Interrupt Status Register"
bitfld.long 0x00 31. " PPI31S     ,Actual status of the PPI31 input signal" "Low,High"
bitfld.long 0x00 30. "  PPI30S       ,Actual status of the PPI30 input signal" "Low,High"
bitfld.long 0x00 29. "  PPI29S        ,Actual status of the PPI29 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 28. " PPI28S     ,Actual status of the PPI28 input signal" "Low,High"
bitfld.long 0x00 27. "  PPI27S       ,Actual status of the PPI27 input signal" "Low,High"
bitfld.long 0x00 26. "  PPI26S        ,Actual status of the PPI26 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 25. " PPI25S     ,Actual status of the PPI25 input signal" "Low,High"
bitfld.long 0x00 24. "  PPI24S       ,Actual status of the PPI24 input signal" "Low,High"
bitfld.long 0x00 23. "  PPI23S        ,Actual status of the PPI23 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 22. " PPI22S     ,Actual status of the PPI22 input signal" "Low,High"
bitfld.long 0x00 21. "  PPI21S       ,Actual status of the PPI21 input signal" "Low,High"
bitfld.long 0x00 20. "  PPI20S        ,Actual status of the PPI20 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 19. " PPI19S     ,Actual status of the PPI19 input signal" "Low,High"
bitfld.long 0x00 18. "  PPI18S       ,Actual status of the PPI18 input signal" "Low,High"
bitfld.long 0x00 17. "  PPI17S        ,Actual status of the PPI17 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 16. " PPI16S     ,Actual status of the PPI16 input signal" "Low,High"
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICR_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICR_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICR_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICR_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICR_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICR_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICR_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICR_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICR_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICR_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICR_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICR_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
sif COMP.AVAILABLE("GICC")
base COMP.BASE("GICC",-1.)
width 14.
tree "CPU Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICC",-1.)))
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 10. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 9. "  EOIMODES      ,Controls the behavior of Secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 6. "          IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 4. " CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "               FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
else
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODE       ,Controls the behavior of accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 7. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 4. "          CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
textline "                       "
bitfld.long 0x00 3. " FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
endif
textline "                       "
group.long 0x04++0x03
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICC_BPR,Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x0C++0x03
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
in
wgroup.long 0x10++0x03
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICC_HPPIR,Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x20++0x03
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
in
wgroup.long 0x24++0x03
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x2C++0x03
line.long 0x00 "GICC_STATUSR,CPU Interface Status Register"
bitfld.long 0x00 4. " ASV      ,Attempted security violation" "Not detected,Detected"
bitfld.long 0x00 3. "  WROD    ,Write to an RO location" "Not detected,Detected"
bitfld.long 0x00 2. "  RWOD ,Read of a WO location" "Not detected,Detected"
textline "                       "
bitfld.long 0x00 1. " WRD      ,Write to a reserved location" "Not detected,Detected"
bitfld.long 0x00 0. "  RRD     ,Read of a reserved location" "Not detected,Detected"
group.long 0xD0++0x03
line.long 0x00 "GICC_APR0,Active Priorities Register 0"
group.long 0xD4++0x03
line.long 0x00 "GICC_APR1,Active Priorities Register 1"
group.long 0xD8++0x03
line.long 0x00 "GICC_APR2,Active Priorities Register 2"
group.long 0xDC++0x03
line.long 0x00 "GICC_APR3,Active Priorities Register 3"
group.long 0xE0++0x03
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register 0"
group.long 0xE4++0x03
line.long 0x00 "GICC_NSAPR1,Non-Secure Active Priorities Register 1"
group.long 0xE8++0x03
line.long 0x00 "GICC_NSAPR2,Non-Secure Active Priorities Register 2"
group.long 0xEC++0x03
line.long 0x00 "GICC_NSAPR3,Non-Secure Active Priorities Register 3"
rgroup.long 0xFC++0x03
line.long 0x00 "GICC_IIDR,CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID   ,Product ID"
bitfld.long 0x00 16.--19. "          ARCHVER ,The version of the GIC architecture that is implemented" ",,,GICv3,?..."
bitfld.long 0x00 12.--15. "         REV  ,Revision number for the CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "            IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICH")
base COMP.BASE("GICH",-1.)
width 13.
tree "Virtual CPU Control Interface"
group.long 0x00++0x03
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "             VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "      VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 4. " VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "       NPIE     ,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " EN       ,Virtual CPU interface Enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GICH_VTR,Virtual Type Register"
bitfld.long 0x00 29.--31. " PRIBITS  ,Number of priority bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 26.--28. "              PREBITS  ,Number of pre-emption bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 23.--25. "             IDBITS   ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
textline "                      "
bitfld.long 0x00 22. " SEIS     ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "  A3V      ,Affinity 3 valid" "Invalid,Valid"
bitfld.long 0x00 0.--4. "       LISTREGS ,List regs number" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
group.long 0x08++0x03
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. " VPMR     ,Virtual priority mask"
bitfld.long 0x00 21.--23. "             VBPR0    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 0)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "             VBPR1    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 1)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 9. "                    VEOIM    ,Virtual EOImode. DP - Drop the priority / ID - interrupt deactivate" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
textline "                      "
bitfld.long 0x00 4. " VCBPR    ,Virtual Common Binary Point Register" "ABPR,BPR"
bitfld.long 0x00 3. "           VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      VACKCTL  ,Virtual AckCtl" "INTID=1022,INTID=corresponding"
bitfld.long 0x00 1. "  VENG1    ,Virtual interrupt enable for group 1" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " VENG0    ,Virtual interrupt enable for group 0" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
bitfld.long 0x00 7. " VGRP1D   ,vPE Group 1 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 6. "   VGRP1E   ,vPE Group 1 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 5. "  VGRP0D   ,vPE Group 0 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 4. "         VGRP0E   ,vPE Group 0 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
textline "                      "
bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 2. "   LRENP    ,List Register Entry Not Present maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 1. "  U        ,Underflow maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 0. "         EOI      ,End Of Interrupt maintenance interrupt assertion" "Not asserted,Asserted"
rgroup.long 0x20++0x03
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
bitfld.long 0x00 15. " STATUS15 ,EOI maintenance interrupt status for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,EOI maintenance interrupt status for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,EOI maintenance interrupt status for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,EOI maintenance interrupt status for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,EOI maintenance interrupt status for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,EOI maintenance interrupt status for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,EOI maintenance interrupt status for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,EOI maintenance interrupt status for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,EOI maintenance interrupt status for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,EOI maintenance interrupt status for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,EOI maintenance interrupt status for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,EOI maintenance interrupt status for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "GICH_ELRSR0,Empty List register Status Register"
bitfld.long 0x00 15. " STATUS15 ,Status bit for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,Status bit for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,Status bit for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,Status bit for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,Status bit for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,Status bit for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,Status bit for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,Status bit for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,Status bit for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,Status bit for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,Status bit for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,Status bit for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,Status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,Status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,Status bit for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,Status bit for List register 0" "No interrupt,Interrupt"
textline "                      "
group.long 0xF0++0x03
line.long 0x00 "GICH_APR0,Active Priorities Register 0"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF4++0x03
line.long 0x00 "GICH_APR1,Active Priorities Register 1"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF8++0x03
line.long 0x00 "GICH_APR2,Active Priorities Register 2"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xFC++0x03
line.long 0x00 "GICH_APR3,Active Priorities Register 3"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
textline "                       "
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x110++0x03
line.long 0x00 "GICH_LR4,List Register 4"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x114++0x03
line.long 0x00 "GICH_LR5,List Register 5"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x118++0x03
line.long 0x00 "GICH_LR6,List Register 6"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x11C++0x03
line.long 0x00 "GICH_LR7,List Register 7"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x120++0x03
line.long 0x00 "GICH_LR8,List Register 8"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x124++0x03
line.long 0x00 "GICH_LR9,List Register 9"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x128++0x03
line.long 0x00 "GICH_LR10,List Register 10"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x12C++0x03
line.long 0x00 "GICH_LR11,List Register 11"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x130++0x03
line.long 0x00 "GICH_LR12,List Register 12"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x134++0x03
line.long 0x00 "GICH_LR13,List Register 13"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x138++0x03
line.long 0x00 "GICH_LR14,List Register 14"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICV")
base COMP.BASE("GICV",-1.)
width 14.
tree "Virtual CPU Interface"
group.long 0x00++0x03
line.long 0x00 "GICV_CTLR,VM Control Register"
bitfld.long 0x00 9. " EOIMODE    ,Controls the behaviour of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 4. "  CBPR       ,Controls whether GICV_BPR affects both Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "       FIQEN ,FIQ Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      ACKCTL ,Acknowledge control. Return ID of the corresponding interrupt" "1022,Corresponding"
textline "                      "
bitfld.long 0x00 1. "  ENABLEGRP1 ,Enables the signalling of Group 1 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0 ,Enables the signalling of Group 0 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority mask level for the virtual CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICV_BPR,VM Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x0C++0x03
line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x10++0x03
line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICV_RPR,VM Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x20++0x03
line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x24++0x03
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
textline ""
group.long 0xD0++0x03
line.long 0x00 "GICV_APR0,VM Active Priority Register 0"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD4++0x03
line.long 0x00 "GICV_APR1,VM Active Priority Register 1"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD8++0x03
line.long 0x00 "GICV_APR2,VM Active Priority Register 2"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xDC++0x03
line.long 0x00 "GICV_APR3,VM Active Priority Register 3"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
textline "                      "
rgroup.long 0xFC++0x03
line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
bitfld.long 0x00 16.--19. "    ARCHVER ,The version of the GIC architecture that is implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "  REV ,Revision number for the CPU interface" ",,,GICv3,?..."
hexmask.long.word 0x00 0.--11. 1. "  IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
tree.end
width 0x0b
endif
width 0x0B
tree.end
tree.end
else
tree "Core Registers (Cortex-A57)"
AUTOINDENT.ON center tree
tree.open "AArch64"
tree "ID Registers"
rgroup.quad spr:0x30000++0x0
line.long 0x0 "MIDR_EL1,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
bitfld.long 0x0 20.--23.  "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19.  "ARCH,Architecture" "Reserved,ARMv4,ARMv4T,ARMv5,ARMv5T,ARMv5TE,ARMv5TEJ,ARMv6,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,CPUID scheme"
newline
hexmask.long.word 0x0 4.--15. 0x1 "PART,Primary Part Number"
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x30005++0x00
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
newline
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
bitfld.quad 0x00 0.--1. "CPUID,CPU ID" "1,2,3,4"
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30005++0x00
line.quad 0x0 "MPIDR_EL1,Multiprocessor Affinity Register"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity level 3. Third highest level affinity field"
newline
bitfld.quad 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
bitfld.quad 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Largely independent,?..."
hexmask.quad.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
newline
hexmask.quad.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
hexmask.quad.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
endif
rgroup.quad SPR:0x30006++0x0
line.long 0x0 "REVIDR_EL1,Revision ID Register"
rgroup.quad SPR:0x30014++0x00
line.long 0x00 "ID_MMFR0_EL1,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30015++0x00
line.long 0x00 "ID_MMFR1_EL1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.quad SPR:0x30016++0x00
line.long 0x00 "ID_MMFR2_EL1,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.quad SPR:0x30017++0x00
line.long 0x00 "ID_MMFR3_EL1,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,Reserved,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30026++0x00
line.long 0x00 "ID_MMFR4_EL1,Memory Model Feature Register 4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented,Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
newline
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,Reserved,Reserved,44 bits/16 TB,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30070++0x00
line.quad 0x00 "ID_AA64MMFR0_EL1,AArch64 Memory Model Feature Register 0"
bitfld.quad 0x00 28.--31. "4KB,4KB granule supported" "Supported,?..."
bitfld.quad 0x00 24.--27. "64KB,64KB granule supported" "Supported,?..."
bitfld.quad 0x00 20.--23. "16KB,16KB granule supported" "Not supported,?..."
newline
bitfld.quad 0x00 12.--15. "SNSMEM,Secure versus Non-secure Memory distinction" "Reserved,Supported,?..."
bitfld.quad 0x00 8.--11. "BIGEND,Mixed-endian configuration support" "Reserved,Supported,?..."
bitfld.quad 0x00 4.--7. "ASIDBITS,Number of ASID bits" "Reserved,Reserved,16 bits,?..."
newline
bitfld.quad 0x00 0.--3. "PARANGE,Physical address range supported" "Reserved,Reserved,40 bits/1 TB,?..."
endif
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30071++0x00
line.quad 0x00 "ID_AA64MMFR1_EL1,AArch64 Memory Model Feature Register 1"
endif
rgroup.quad SPR:0x30020++0x00
line.long 0x00 "ID_ISAR0_EL1,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.quad SPR:0x30021++0x00
line.long 0x00 "ID_ISAR1_EL1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30022++0x00
line.long 0x00 "ID_ISAR2_EL1,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30023++0x00
line.long 0x00 "ID_ISAR3_EL1,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30024++0x00
line.long 0x00 "ID_ISAR4_EL1,Instruction Set Attribute Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.quad SPR:0x30025++0x00
line.long 0x00 "ID_ISAR5_EL1,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.quad spr:0x30060++0x00
line.quad 0x00 "ID_AA64ISAR0_EL1,AArch64 Instruction Set Attribute Register 0"
bitfld.quad 0x00 16.--19. "CRC32,CRC32" "Reserved,Implemented,?..."
bitfld.quad 0x00 12.--15. "SHA2,SHA2 instructions are implemented" "Not implemented,Implemented,?..."
bitfld.quad 0x00 8.--11. "SHA1,SHA1 instructions are implemented" "Not implemented,Implemented,?..."
newline
bitfld.quad 0x00 4.--7. "AES,AES instructions are implemented" "Not implemented,Reserved,Implemented,?..."
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30061++0x00
line.quad 0x00 "ID_AA64ISAR1_EL1,AArch64 Instruction Set Attribute Register 1"
endif
rgroup.quad SPR:0x30010++0x00
line.long 0x00 "ID_PFR0_EL1,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.quad SPR:0x30011++0x00
line.long 0x00 "ID_PFR1_EL1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,?..."
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,?..."
newline
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
newline
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30040++0x00
line.quad 0x00 "ID_AA64PFR0_EL1,AArch64 Processor Feature Register 0"
bitfld.quad 0x00 24.--27. "GIC,GIC CPU interface" "Disabled,Enabled,?..."
bitfld.quad 0x00 20.--23. "ADVSIMD,Advanced SIMD" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
bitfld.quad 0x00 16.--19. "FP,Floating-point" "Implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Not implemented"
newline
bitfld.quad 0x00 12.--15. "EL3H,EL3 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 8.--11. "EL2H,EL2 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
bitfld.quad 0x00 4.--7. "EL1H,EL1 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
newline
bitfld.quad 0x00 0.--3. "EL0H,EL0 exception handling" "Reserved,Reserved,AArch64/AArch32,?..."
endif
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30041++0x00
line.quad 0x00 "ID_AA64PFR1_EL1,AArch64 Processor Feature Register 1"
endif
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x30012++0x00
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x30012++0x00
line.long 0x00 "ID_DFR0_EL1,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
endif
rgroup.quad spr:0x30050++0x00
line.quad 0x00 "ID_AA64DFR0_EL1,AArch64 Debug Feature Register 0"
bitfld.quad 0x00 28.--31. "CTX_CMPS,Number of breakpoints that are context-aware minus 1" "Reserved,2,?..."
bitfld.quad 0x00 20.--23. "WRPS,The number of watchpoints minus 1" "Reserved,Reserved,Reserved,4,?..."
bitfld.quad 0x00 12.--15. "BRPS,The number of breakpoints minus 1" "Reserved,Reserved,Reserved,Reserved,Reserved,6,?..."
newline
bitfld.quad 0x00 8.--11. "PMUVER,Performance Monitors extension version" "Reserved,Implemented,?..."
bitfld.quad 0x00 4.--7. "TRACEVER,Trace extension" "Not implemented,?..."
bitfld.quad 0x00 0.--3. "DEBUGGER,Debug architecture version" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented,?..."
if (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x30051++0x00
line.quad 0x00 "ID_AA64DFR1_EL1,AArch64 Debug Feature Register 1"
rgroup.quad spr:0x30054++0x00
line.quad 0x00 "ID_AA64AFR0_EL1,AArch64 Auxiliary Feature Register 0"
rgroup.quad spr:0x30055++0x00
line.quad 0x00 "ID_AA64AFR1_EL1,AArch64 Auxiliary Feature Register 1"
endif
rgroup.quad SPR:0x30013++0x00
line.long 0x00 "ID_AFR0_EL1,Auxiliary Feature Register 0"
rgroup.quad SPR:0x31007++0x00
line.long 0x00 "AIDR_EL1,Auxiliary ID Register"
rgroup.quad SPR:0x33007++0x00
line.long 0x00 "DCZID_EL0,Data Cache Zero ID"
bitfld.long 0x00 4. "DZP,Prohibit the DC ZVA instruction" "Not prohibited,Prohibited"
bitfld.long 0x00 0.--3. "BS,Block Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
tree.end
tree "System Control and Configuration"
group.quad spr:0x36111++0x00
line.quad 0x00 "SDER32_EL3,Secure Debug Enable Register"
bitfld.quad 0x00 1. "SUNIDEN,Enable non-invasive debug features in Secure User mode" "Disabled,Enabled"
bitfld.quad 0x00 0. "SUIDEN,Enable debug exceptions in Secure User mode" "Disabled,Enabled"
group.quad SPR:0x30100++0x0
line.long 0x00 "SCTLR_EL1,System Control Register (EL1)"
bitfld.long 0x0 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.long 0x0 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.long 0x00 6. "THEE,Thumb EE enable" "Disabled,Enabled"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad SPR:0x34100++0x0
line.long 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad SPR:0x36100++0x0
line.long 0x00 "SCTLR_EL3,System Control Register (EL3)"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
rgroup.quad SPR:0x30101++0x0
line.long 0x00 "ACTLR_EL1,Auxiliary Control Register (EL1)"
group.quad SPR:0x34101++0x0
line.long 0x00 "ACTLR_EL2,Auxiliary Control Register (EL2)"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad SPR:0x36101++0x0
line.long 0x00 "ACTLR_EL3,Auxiliary Control Register (EL3)"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
group.quad SPR:0x30102++0x00
line.long 0x00 "CPACR_EL1,Architectural Feature Access Control Register"
bitfld.long 0x00 28. "TTA,Causes access to the Trace functionality to trap to EL1 when executed from EL0 or EL1" "Disabled,?..."
bitfld.long 0x00 20.--21. "FPEN,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution to trap to EL1 when executed from EL0 or EL1" "Trap all,Trap El0,Trap all,Not trapped"
group.quad SPR:0x36110++0x0
line.long 0x0 "SCR_EL3,Secure Configuration Register"
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.long 0x00 11. "ST,Enable secure EL1 access" "Disabled,Enabled"
bitfld.long 0x00 10. "RW,Register width control for lower exception levels" "AArch32,AArch64"
newline
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
newline
bitfld.long 0x00 7. "SMD,Secure Monitor Call disable" "No,Yes"
bitfld.long 0x00 3. "EA,External Abort  exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
newline
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.long 0x00 0. "NS,Secure mode" "Secure,Non-secure"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
group.quad spr:0x30510++0x00
line.quad 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
group.quad spr:0x30511++0x00
line.quad 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
group.quad spr:0x34510++0x00
line.quad 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
group.quad spr:0x34511++0x00
line.quad 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
group.quad spr:0x36510++0x00
line.quad 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
group.quad spr:0x36511++0x00
line.quad 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
tree.open "Exception Syndrome Registers"
if (CORENAME()=="CORTEXA57")
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 9. "EA,External abort type" "DECERR,SLVERR"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/TTBR[0/1],Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort,Reserved,Reserved,Reserved,Reserved,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity,Reserved,Reserved,Reserved,Reserved,Sync. parity/1st level,Sync. parity/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Debug,?..."
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
elif (CORENAME()=="CORTEXA53")
if (((d.l(spr:0x30520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x30520))&0xFC000000)==0x04000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x18000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==0x1C000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x44000000||0x54000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x30520))&0xFC000000)==0x60000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x30520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x30520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x30520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBD000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SES,System Error Source" "Processor,System,External,"
newline
hexmask.long.tbyte 0x00 0.--21. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x30520))&0xFD000000)==0xBC000000)
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC0000000||0xC4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x30520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x30520++0x00
line.long 0x00 "ESR_EL1,Exception Syndrome Register (EL1)"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,Reserved,Reserved,Reserved,SVC in AArch64,Reserved,Reserved,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x34520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x34520))&0xFC000000)==0x04000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x0C000000||0x14000000||0x20000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x18000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==0x1C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x44000000||0x48000000||0x54000000||0x58000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x5C000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x34520))&0xFC000000)==0x60000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x34520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x34520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0800000||0xB0800000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x34520))&0xFC800000)==(0xA0000000||0xB0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBD000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x34520))&0xFD000000)==0xBC000000)
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC0000000||0xC4000000||0xE8000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xC8000000||0xCC000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,EX bit valid" "Not valid,Valid"
bitfld.long 0x00 6. "EX,Exclusive operation" "No,Yes"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xD0000000||0xD4000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 8. "CM,Data came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
newline
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "0,1,2,3,%d..."
elif (((d.l(spr:0x34520))&0xFC000000)==(0xE0000000||0xF0000000))
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x34520++0x00
line.long 0x00 "ESR_EL2,Exception Syndrome Register (EL2)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,MCR/VMRS to CP10/AArch32,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,SVC in AArch32,HVC in AArch32,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Trapped Floating-point/AArch32,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Breakpoint/lower level,Breakpoint/current level,Software Step/lower level,Software Step/current level,Watchpoint debug/lower level,Watchpoint debug/current level,Reserved,Reserved,Software Breakpoint/AArch32,Reserved,Vector Catch,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
if (((d.l(spr:0x36520))&0xFC000000)==(0x00000000||0x38000000||0x88000000||0x98000000||0x4C000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
elif (((d.l(spr:0x36520))&0xFC000000)==0x04000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 0. "TI,Trapped instruction" "WFI,WFE"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x0C000000||0x14000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 17.--19. "Opc2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 14.--16. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x10000000||0x30000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 16.--19. "Opc1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 10.--14. "Rt2,Rt2 value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x18000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
hexmask.long.byte 0x00 12.--19. 1 "IMM8,The immediate value from the issued instruction"
bitfld.long 0x00 5.--9. "Rn,Rn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 4. "OFFSET,Indicates whether the offset is added or subtracted" "Subtracted,Added"
bitfld.long 0x00 1.--3. "AM,Addressing mode" "Immediate unindexed,Immediate post-indexed,Immediate offset,Immediate pre-indexed,Literal unindexed,Reserved,Literal offset,Reserved"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x1C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x54000000||0x58000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the HVC or SVC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x5C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. "IMM16,The value of the immediate field from the issued SMC instruction"
elif (((d.l(spr:0x36520))&0xFC000000)==0x60000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "CV,Condition code valid" "Not valid,Valid"
bitfld.long 0x00 20.--23. "COND,Condition code for the trapped instruction" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
newline
bitfld.long 0x00 20.--21. "Op0,Op0 value from the issued instruction" "0,1,2,3"
bitfld.long 0x00 17.--19. "Op2,Opc2 value from the issued instruction" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 14.--16. "Op1,Opc1 value from the issued instruction" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 10.--13. "CRn,CRn value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 5.--9. "Rt,Rt value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 1.--4. "CRm,CRm value from the issued instruction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0. "DIRECTION,Direction of the trapped instruction" "Write,Read"
elif (((d.l(spr:0x36520))&0xFC000000)==0x7C000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long 0x00 0.--24. 1 "IMPL_DEF,Implementation defined"
elif (((d.l(spr:0x36520))&0xFC000000)==(0x80000000||0x84000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
bitfld.long 0x00 0.--5. "IFSC,Instruction Fault Status Code" "Address size/0th level/base register,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1st level,Sync. external abort/2nd level,Sync. external abort/3rd level,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
elif (((d.l(spr:0x36520))&0xFD000000)==(0x91000000||0x95000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
bitfld.long 0x00 22.--23. "SAS,Syndrome Access Size" "Byte,Halfword,Word,Doubleword"
newline
bitfld.long 0x00 21. "SSE,Syndrome Sign Extend" "Not required,Required"
bitfld.long 0x00 16.--20. "SRT,Syndrome Register transfer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 15. "SF,Width of the register accessed by the instruction is Sixty-Four" "32-bit,64-bit"
bitfld.long 0x00 14. "AR,Acquire/Release" "No,Yes"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFD000000)==(0x90000000||0x94000000))
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 10. "FNV,FAR not Valid" "No,Yes"
bitfld.long 0x00 9. "EA,External abort type" "Not external,External"
newline
bitfld.long 0x00 8. "CM,Fault came from a Cache Maintenance Instruction other than DC ZVA" "No,Yes"
bitfld.long 0x00 7. "S1PTW,Fault on the stage 2 translation of an address accessed during a stage 1 translation table walk" "Not stage 2,Stage 2"
newline
bitfld.long 0x00 6. "WNR,Write not Read" "Read,Write"
bitfld.long 0x00 0.--5. "DFSC,Data Fault Status Code" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external abort/not table walk,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Sync. parity/ECC/not table walk,Reserved,Reserved,Reserved,Sync. parity/ECC/0th level,Sync. parity/ECC/1st level,Sync. parity/ECC/2nd level,Sync. parity/ECC/3rd level,Reserved,Alignment,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Lockdown,Unsupported Exclusive access,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Section Domain,Page Domain,Reserved"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0800000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 7. "IDF,Input Denormal floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 4. "IXF,Inexact floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 3. "UFF,Underflow floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 2. "OFF,Overflow floating-point exception trapped" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. "DZF,Divide-by-zero floating-point exception trapped" "Not occurred,Occurred"
bitfld.long 0x00 0. "IOF,Invalid Operation floating-point exception trapped" "Not occurred,Occurred"
elif (((d.l(spr:0x36520))&0xFC800000)==0xB0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 23. "TFV,Trapped Fault Valid" "Not valid,Valid"
bitfld.long 0x00 8.--10. "VECITR,Number of the element that is being reported" "0,1,2,3,4,5,6,7"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBD000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
hexmask.long.tbyte 0x00 0.--23. 1 "IS,Additional information about the SError interrupt"
elif (((d.l(spr:0x36520))&0xFD000000)==0xBC000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
bitfld.long 0x00 24. "ISV,Instruction syndrome valid" "Not valid,Valid"
elif (((d.l(spr:0x36520))&0xFC000000)==0xF0000000)
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
bitfld.long 0x00 25. "IL,Instruction Length for synchronous exceptions" "16-bit,32-bit"
newline
hexmask.long.word 0x00 0.--15. 1 "COMMENT,Set to the instruction comment field value"
else
group.quad SPR:0x36520++0x00
line.long 0x00 "ESR_EL3,Exception Syndrome Register (EL3)"
bitfld.long 0x00 26.--31. "EC,Exception class"  "Unknown reason,WFI/WFE instruction,Reserved,MCR/MRC to CP15/AArch32,MCRR/MRRC to CP15/AArch32,MCR/MRC to CP14/AArch32,LDC/STC to CP14/AArch32,SIMD/Floating point register,Reserved,Reserved,Reserved,Reserved,MCRR/MRRC to CP14/AArch32,Reserved,Illegal execution,Reserved,Reserved,Reserved,Reserved,SMC in AArch32,Reserved,SVC in AArch64,HVC in AArch64,SMC in AArch64,MSR/MRS/System in AArch64,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,IMPLEMENTATION DEFINED,Instruction abort,Instruction abort/AArch64,PC alignment fault,Reserved,Data abort,Data abort/Aarch64,SP alignment fault,Reserved,Reserved,Reserved,Reserved,Reserved,Trapped Floating-point/AArch64,Reserved,Reserved,SError interrupt,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Software Breakpoint/AArch64,Reserved,Reserved,Reserved"
endif
endif
tree.end
newline
if (CORENAME()=="CORTEXA57")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif (CORENAME()=="CORTEXA53")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
group.quad spr:0x30600++0x00
line.quad 0x00 "FAR_EL1,Fault Address Register"
group.quad spr:0x34600++0x00
line.quad 0x00 "FAR_EL2,Fault Address Register"
group.quad spr:0x36600++0x00
line.quad 0x00 "FAR_EL3,Fault Address Register"
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
group.quad spr:0x30C00++0x00
line.quad 0x00 "VBAR_EL1,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
group.quad spr:0x34C00++0x00
line.quad 0x00 "VBAR_EL2,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
group.quad spr:0x36C00++0x00
line.quad 0x00 "VBAR_EL3,Vector Base Address Register"
hexmask.quad 0x00 11.--63. 0x800 "VBA,Vector base address"
rgroup.quad spr:0x36C01++0x00
line.quad 0x00 "RVBAR_EL3,Reset Vector Base Address Register"
hexmask.quad 0x00 2.--43. 0x4 "RVBA,Reset Vector Base Address"
rgroup.quad SPR:0x30C10++0x00
line.long 0x00 "ISR_EL1,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
newline
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.quad SPR:0x36C02++0x00
line.long 0x00 "RMR_EL3,Reset Management Register"
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warmreset" "AArch32,AArch64"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x31F30++0x00
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
hexmask.quad.long 0x00 18.--43. 1. "PERIPHBASE[43:18],Periphbase[43:18]"
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x31F30++0x00
line.quad 0x00 "CBAR_EL1,Configuration Base Address Register"
hexmask.quad.tbyte 0x00 18.--39. 1. "PERIPHBASE[39:18],Periphbase[39:18]"
endif
group.quad spr:0x30D01++0x00
line.quad 0x00 "CONTEXTIDR_EL1,Context ID Register"
group.quad spr:0x33D02++0x00
line.quad 0x00 "TPIDR_EL0,Software Thread ID Register"
group.quad spr:0x33D03++0x00
line.quad 0x00 "TPIDRRO_EL0,Software Thread ID Register"
group.quad spr:0x30D04++0x00
line.quad 0x00 "TPIDR_EL1,Software Thread ID Register"
group.quad spr:0x34D02++0x00
line.quad 0x00 "TPIDR_EL2,Software Thread ID Register"
group.quad spr:0x36D02++0x00
line.quad 0x00 "TPIDR_EL3,Software Thread ID Register"
tree.end
tree "Memory Management Unit"
group.quad spr:0x30100++0x0
line.quad 0x00 "SCTLR_EL1,System Control Register (EL1)"
bitfld.quad 0x00 26. "UCI,EL0 access enable (DC CVAU|DC CIVAC|DC CVAC|IC IVAU)" "Disabled,Enabled"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.quad 0x00 24. "E0E,Endianness of explicit data access at EL0" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.quad 0x00 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.quad 0x00 15. "UCT,EL0 access enable (CTR_EL0)" "Disabled,Enabled"
bitfld.quad 0x00 14. "DZE,EL0 access enable (DC ZVA)" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 9. "UMA,User Mask Access" "Disabled,Enabled"
newline
bitfld.quad 0x00 8. "SED,SETEND Disable" "No,Yes"
bitfld.quad 0x00 7. "ITD,IT instruction disable" "No,Yes"
newline
bitfld.quad 0x00 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.quad 0x00 4. "SA0,EL0 stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x36100++0x0
line.quad 0x00 "SCTLR_EL3,System Control Register (EL3)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x30200++0x00
line.quad 0x00 "TTBR0_EL1,Translation Table Base Register 0 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad spr:0x30201++0x00
line.quad 0x00 "TTBR1_EL1,Translation Table Base Register 1 (EL1)"
hexmask.quad.word 0x00 48.--63. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 30. "TG1,TTBR1_EL1 granule size" "4 KByte,64 KByte"
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB"
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x30202++0x00
line.quad 0x00 "TCR_EL1,Translation Control Register (EL1)"
bitfld.quad 0x00 38. "TBI1,Top Byte Ignored 1" "Not ignored,Ignored"
bitfld.quad 0x00 37. "TBI0,Top Byte Ignored 0" "Not ignored,Ignored"
newline
bitfld.quad 0x00 36. "AS,ASID size" "8-bit,16-bit"
bitfld.quad 0x00 32.--34. "IPS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 30.--31. "TG1,TTBR1_EL1 granule size" "Reserved,Reserved,4 KB,64 KB"
bitfld.quad 0x00 28.--29. "SH1,Shareability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 26.--27. "ORGN1,Outer cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 24.--25. "IRGN1,Inner cacheability attribute for memory associated with translation table walks using TTBR1_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 23. "EPD1,Translation table walk disable for translations using TTBR1_EL1" "Enabled,Disabled"
bitfld.quad 0x00 22. "A1,Selects whether TTBR0_EL1 or TTBR1_EL1 defines the ASID" "TTBR0_EL1,TTBR1_EL1"
newline
bitfld.quad 0x00 16.--21. "T1SZ,Size offset of the memory region addressed by TTBR1_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL1 granule size" "4 KB,64 KB,?..."
newline
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-shareable,Reserved,Outer shareable,Inner shareable"
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL1" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 7. "EPD0,Translation table walk disable for translations using TTBR0" "Enabled,Disabled"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x34200++0x00
line.quad 0x00 "TTBR0_EL2,Translation Table Base Register 0 (EL2)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 14. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x34202++0x00
line.quad 0x00 "TCR_EL2,Translation Control Register (EL2)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL2 granule size" "4 KB,64 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL2" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x36200++0x00
line.quad 0x00 "TTBR0_EL3,Translation Table Base Register 0 (EL3)"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,42 bits/4 TB,44 bits/16 TB,48 bits/256 TB,?..."
newline
bitfld.quad 0x00 14. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB"
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x36202++0x00
line.quad 0x00 "TCR_EL3,Translation Control Register (EL3)"
bitfld.quad 0x00 20. "TBI,Top Byte Ignored" "Not ignored,Ignored"
bitfld.quad 0x00 16.--18. "PS,Intermediate Physical Address Size" "32 bits/4 GB,36 bits/64 GB,40 bits/1 TB,?..."
newline
bitfld.quad 0x00 14.--15. "TG0,TTBR0_EL3 granule size" "4 KB,64 KB,?..."
bitfld.quad 0x00 12.--13. "SH0,Shareability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-shareable,Reserved,Outer shareable,Inner shareable"
newline
bitfld.quad 0x00 10.--11. "ORGN0,Outer cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
bitfld.quad 0x00 8.--9. "IRGN0,Inner cacheability attribute for memory associated with translation table walks using TTBR0_EL3" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.quad 0x00 0.--5. "T0SZ,Size offset of the memory region addressed by TTBR0_EL3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad SPR:0x34300++0x00
line.long 0x00 "DACR32_EL2,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if (CORENAME()=="CORTEXA57")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/0th level/TTBR0/TTBR1,Reserved,Reserved,Reserved,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif (CORENAME()=="CORTEXA53")
if (((per.q(spr:0x34501))&0x200)==0x200)
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.quad spr:0x34501++0x00
line.quad 0x00 "IFSR32_EL2,Instruction Fault Status Register"
bitfld.quad 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.quad 0x00 9. "LPAE,Translation table formats on taking a Data Abort exception" "Short,Long"
newline
bitfld.quad 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
rgroup.quad SPR:0x30510++0x00
line.long 0x00 "AFSR0_EL1,Auxiliary Fault Status Register 0 (EL1)"
rgroup.quad SPR:0x34510++0x00
line.long 0x00 "AFSR0_EL2,Auxiliary Fault Status Register 0 (EL2)"
rgroup.quad SPR:0x36510++0x00
line.long 0x00 "AFSR0_EL3,Auxiliary Fault Status Register 0 (EL3)"
rgroup.quad SPR:0x30511++0x00
line.long 0x00 "AFSR1_EL1,Auxiliary Fault Status Register 1 (EL1)"
rgroup.quad SPR:0x34511++0x00
line.long 0x00 "AFSR1_EL2,Auxiliary Fault Status Register 1 (EL2)"
rgroup.quad SPR:0x36511++0x00
line.long 0x00 "AFSR1_EL3,Auxiliary Fault Status Register 1 (EL3)"
if (((per.q(spr:0x30740))&0xF000000000000001)==0x0000000000000000)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Device-nGnRnE,Reserved,Reserved,Reserved,Device-not nGnRnE,?..."
newline
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
elif (((per.q(spr:0x30740))&0x01)==0x00)
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
bitfld.quad 0x00 60.--63. "ATTRH,Device memory or Normal memory plus Outer cacheability [Type/Cacheable/Allocate]" "Device,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
bitfld.quad 0x00 56.--59. "ATTRL,Device memory or Normal memory plus Inner cacheability [Type/Cacheable/Allocate]" "Reserved,Reserved,Reserved,Reserved,Normal/Non-cacheable,Reserved,Reserved,Reserved,Normal/Write-Through,Normal/Write-Through/Write,Normal/Write-Through/Read,Normal/Write-Through/Write|Read,Normal/Write-Back,Normal/Write-Back/Write,Normal/Write-Back/Read,Normal/Write-Back/Write|Read"
newline
hexmask.quad 0x00 12.--47. 0x10 "PA[47:12],Physical Address"
bitfld.quad 0x00 9. "NS,The NS attribute for a translation table entry read from Secure state" "No,Yes"
newline
bitfld.quad 0x00 7.--8. "SHA,Shareable attribute" "Non-shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
else
group.quad spr:0x30740++0x00
line.quad 0x00 "PAR_EL1,Physical Address Register"
newline
bitfld.quad 0x00 9. "S,Indicates the translation stage at which the translation aborted" "Stage 1,Stage 2"
bitfld.quad 0x00 8. "PTW,Translation aborted because of a stage 2 fault during a stage 1 translation table walk" "No,Yes"
newline
bitfld.quad 0x00 1.--6. "FST,Fault status field" "Address size/0th level/TTBR,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3d level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Reserved,Reserved,Reserved,Reserved,Sync. external abort/0th level,Sync. external abort/1th level,Sync. external abort/2th level,Sync. external abort/3th level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Atomic/AArch64,?..."
newline
bitfld.quad 0x00 0. "F,Indicates whether the conversion completed successfully" "Successful,Aborted"
endif
tree.open "Memory Attribute Indirection Registers"
group.quad spr:0x30A20++0x00
line.quad 0x00 "MAIR_EL1,Memory Attribute Indirection Register (EL1)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
group.quad spr:0x34A20++0x00
line.quad 0x00 "MAIR_EL2,Memory Attribute Indirection Register (EL2)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
group.quad spr:0x36A20++0x00
line.quad 0x00 "MAIR_EL3,Memory Attribute Indirection Register (EL3)"
bitfld.quad 0x00 60.--63. "ATTR7H,Attribute 7 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 56.--59. "ATTR7L,Attribute 7 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 52.--55. "ATTR6H,Attribute 6 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 48.--51. "ATTR6L,Attribute 6 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 44.--47. "ATTR5H,Attribute 5 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 40.--43. "ATTR5L,Attribute 5 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 36.--39. "ATTR4H,Attribute 4 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 32.--35. "ATTR4L,Attribute 4 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 24.--27. "ATTR3L,Attribute 3 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 16.--19. "ATTR2L,Attribute 2 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 8.--11. "ATTR1L,Attribute 1 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
newline
bitfld.quad 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
bitfld.quad 0x00 0.--3. "ATTR0L,Attribute 0 Low" "Device memory,Write-through transient/Write-Allocate,Write-through transient/Read-Allocate,Write-through transient/Write-Allocate/Read-Allocate,Non-Cacheable,Write-back transient/Write-Allocate,Write-back transient/Read-Allocate,Write-back transient/Write-Allocate/Read-Allocate,Write-Through non-transient,Write-Through non-transient/Write-Allocate,Write-Through non-transient/Read-Allocate,Write-Through non-transient/Write-Allocate/Read-Allocate,Write-Back non-transient,Write-Back non-transient/Write-Allocate,Write-Back non-transient/Read-Allocate,Write-Back non-transient/Write-Allocate/Read-Allocate"
rgroup.quad spr:0x30A30++0x00
line.quad 0x00 "AMAIR_EL1,Memory Attribute Indirection Register (EL1)"
rgroup.quad spr:0x34A30++0x00
line.quad 0x00 "AMAIR_EL2,Memory Attribute Indirection Register (EL2)"
rgroup.quad spr:0x36A30++0x00
line.quad 0x00 "AMAIR_EL3,Memory Attribute Indirection Register (EL3)"
tree.end
newline
group.quad SPR:0x30D01++0x00
line.long 0x0 "CONTEXTIDR_EL1,Context ID Register"
tree.end
tree "Virtualization Extensions"
group.quad SPR:0x34000++0x0
line.long 0x0 "VPIDR_EL2,Virtualization Processor ID Register"
if (CORENAME()=="CORTEXA57")
group.quad spr:0x34005++0x00
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
hexmask.quad.long 0x00 0.--31. 1. "VMPIDR_EL2,MPIDR value returned by Non-secure EL1 reads of the MPIDR_EL1"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x34005++0x00
line.quad 0x0 "VMPIDR_EL2,Virtualization Multiprocessor ID Register"
endif
group.quad spr:0x34100++0x0
line.quad 0x00 "SCTLR_EL2,System Control Register (EL2)"
bitfld.quad 0x00 25. "EE,Exception endianness" "Little,Big"
bitfld.quad 0x00 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.quad 0x00 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.quad 0x00 3. "SA,SP stack alignment check enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.quad 0x00 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad spr:0x34110++0x00
line.quad 0x00 "HCR_EL2,Hypervisor Configuration Register"
bitfld.quad 0x00 33. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.quad 0x00 32. "CD,Stage 2 Data cache disable" "No,Yes"
newline
bitfld.quad 0x00 31. "RW,Register width control for lower exception levels" "AArch32,EL1 is 64-bit"
bitfld.quad 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
newline
bitfld.quad 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
bitfld.quad 0x00 28. "TDZ,Trap DC ZVA instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 27. "TGE,Trap General Exceptions has an enhanced role when EL2 is using AArch64" "Disabled,Enabled"
bitfld.quad 0x00 26. "TVM,Trap Virtual Memory controls to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 25. "TTLB,Trap TLB maintenance instructions to EL2" "Disabled,Enabled"
bitfld.quad 0x00 24. "TPU,Trap Cache maintenance instructions to Point of Unificiation to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "TPC,Trap Data/Unified Cache maintenance instructions to Point of Coherency tp EL2" "Disabled,Enabled"
bitfld.quad 0x00 22. "TSW,Trap Data/Unified Cache maintenance instructions by Set/Way to EL2" "Disabled,Enabled"
newline
bitfld.quad 0x00 21. "TACR,Trap Auxiliary Control Register" "Disabled,Enabled"
bitfld.quad 0x00 20. "TIDCP,Trap Implementation Dependent functionality" "Disabled,Enabled"
newline
bitfld.quad 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.quad 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.quad 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.quad 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.quad 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.quad 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.quad 0x00 10.--11. "BSU,Barrier Shareability upgrade. determines the minimum shareability domain that is applied to any barrier executed from EL1 or EL0" "No effect,Inner Shareable,Outer Shareable,Full System"
bitfld.quad 0x00 9. "FB,Force broadcast" "Not forced,Forced"
newline
bitfld.quad 0x00 8. "VSE,Virtual System Error/Asynchronous Abort:" "No pending,Pending"
bitfld.quad 0x00 7. "VI,Virtual IRQ Interrupt" "Not pending,Pending"
newline
bitfld.quad 0x00 6. "VF,Virtual FIQ Interrupt" "Not pending,Pending"
bitfld.quad 0x00 5. "AMO,asynchronous abort and error interrupt routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "IMO,Physical IRQ Routing" "Disabled,Enabled"
bitfld.quad 0x00 3. "FMO,Physical FIQ Routing" "Disabled,Enabled"
newline
bitfld.quad 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.quad 0x00 1. "SWIO,Set/Way Invalidation Override" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "VM,Second stage of Translation enable" "Disabled,Enabled"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x34111++0x00
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
newline
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x34111++0x00
line.long 0x00 "MDCR_EL2,Hypervisor Debug Control Register (EL2)"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
newline
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6,6"
endif
group.quad SPR:0x34112++0x00
line.long 0x00 "CPTR_EL2,Architectural Feature Trap Register (EL2)"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad SPR:0x36131++0x00
line.long 0x00 "MDCR_EL3,Hypervisor Debug Control Register (EL3)"
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "SDD,AArch64 secure debug disable" "No,Yes"
bitfld.long 0x00 14.--15. "SPD32,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
group.quad SPR:0x36112++0x00
line.long 0x00 "CPTR_EL3,Architectural Feature Trap Register (EL3)"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 10. "TFP,Traps instructions that access registers associated with Advanced SIMD and Floating-point execution from a lower exception level to EL2" "Not trapped,Trapped"
group.quad SPR:0x34113++0x00
line.long 0x00 "HSTR_EL2,Hypervisor System Trap Register"
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Not supported,?..."
bitfld.long 0x00 15. "T15,Trap coprocessor primary register CRn = 15" "No effect,Trapped"
bitfld.long 0x00 13. "T13,Trap coprocessor primary register CRn = 13" "No effect,Trapped"
newline
bitfld.long 0x00 12. "T12,Trap coprocessor primary register CRn = 12" "No effect,Trapped"
bitfld.long 0x00 11. "T11,Trap coprocessor primary register CRn = 11" "No effect,Trapped"
bitfld.long 0x00 10. "T10,Trap coprocessor primary register CRn = 10" "No effect,Trapped"
newline
bitfld.long 0x00 9. "T9,Trap coprocessor primary register CRn = 9" "No effect,Trapped"
bitfld.long 0x00 8. "T8,Trap coprocessor primary register CRn = 8" "No effect,Trapped"
bitfld.long 0x00 7. "T7,Trap coprocessor primary register CRn = 7" "No effect,Trapped"
newline
bitfld.long 0x00 6. "T6,Trap coprocessor primary register CRn = 6" "No effect,Trapped"
bitfld.long 0x00 5. "T5,Trap coprocessor primary register CRn = 5" "No effect,Trapped"
bitfld.long 0x00 3. "T3,Trap coprocessor primary register CRn = 3" "No effect,Trapped"
newline
bitfld.long 0x00 2. "T2,Trap coprocessor primary register CRn = 2" "No effect,Trapped"
bitfld.long 0x00 1. "T1,Trap coprocessor primary register CRn = 1" "No effect,Trapped"
bitfld.long 0x00 0. "T0,Trap coprocessor primary register CRn = 0" "No effect,Trapped"
rgroup.quad SPR:0x34117++0x00
line.long 0x00 "HACR_EL2,Hypervisor Auxiliary Configuration Register"
group.quad spr:0x34210++0x00
line.quad 0x00 "VTTBR_EL2,Virtualization Translation Table Base Register"
hexmask.quad.byte 0x00 48.--55. 1. "VMID,VMID for the translation table"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x34212++0x00
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,42 bits/4TB,44 bits/16TB,48 bits/256TB,?..."
bitfld.long 0x00 14. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x34212++0x00
line.long 0x00 "VTCR_EL2,Virtualization Translation Control Register"
bitfld.long 0x00 16.--18. "PS,Physical Address Size" "32 bits/4GB,36 bits/64GB,40 bits/1TB,?..."
bitfld.long 0x00 14.--15. "TG0,Granule size for the corresponding translation table base address register" "4 KB,64 KB,?..."
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.quad spr:0x34604++0x00
line.quad 0x00 "HPFAR_EL2,Hypervisor IPA Fault Address Register"
hexmask.quad 0x00 4.--39. 0x10 "FIPA,Faulting IPA bits"
tree.end
tree "Cache Control and Configuration"
if (CORENAME()=="CORTEXA57")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad spr:0x33001++0x0
line.long 0x0 "CTR_EL0,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
group.quad SPR:0x32000++0x0
line.long 0x0 "CSSELR_EL1,Cache Size Selection Register"
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x31001++0x0
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
newline
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
rgroup.quad SPR:0x31000++0x0
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
bitfld.long 0x00 29. "RA,Read-Allocate" "Reserved,Supported"
newline
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "Reserved,Reserved,64 bytes,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x31001++0x0
line.long 0x0 "CLIDR_EL1,Cache Level ID Register"
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
rgroup.quad SPR:0x31000++0x0
line.long 0x0 "CCSIDR_EL1,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,?..."
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
newline
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
hexmask.long.word 0x00 13.--27. 1. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "1Reserved,Reserved,64 bytes,?..."
endif
tree "Level 1 memory system"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x30F10++0x00
line.long 0x00 "DL1DATA0_EL1,Data L1 Data 0 Register"
group.quad SPR:0x30F11++0x00
line.long 0x00 "DL1DATA1_EL1,Data L1 Data 1 Register"
group.quad SPR:0x30F12++0x00
line.long 0x00 "DL1DATA2_EL1,Data L1 Data 2 Register"
group.quad SPR:0x30F13++0x00
line.long 0x00 "DL1DATA3_EL1,Data L1 Data 3 Register"
group.quad SPR:0x30F00++0x00
line.long 0x00 "IL1DATA0_EL1,Instruction L1 Data 0 Register"
group.quad SPR:0x30F01++0x00
line.long 0x00 "IL1DATA1_EL1,Instruction L1 Data 1 Register"
group.quad SPR:0x30F02++0x00
line.long 0x00 "IL1DATA2_EL1,Instruction L1 Data 2 Register"
group.quad SPR:0x30F03++0x00
line.long 0x00 "IL1DATA3_EL1,Instruction L1 Data 3 Register"
group.quad spr:0x31F20++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
newline
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
newline
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
newline
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
newline
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
newline
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
newline
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
newline
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
newline
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad spr:0x31F21++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
newline
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks,?..."
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x31F20++0x00
line.quad 0x00 "CPUACTLR_EL1,CPU Auxiliary Control Register"
bitfld.quad 0x00 44. "ENDCCASCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
newline
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
newline
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
newline
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
newline
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,8"
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
bitfld.quad 0x00 6. "L1DEIEN,L1 D-cache data RAM error injection enable" "Disabled,Enabled"
group.quad spr:0x31F21++0x00
line.quad 0x00 "CPUECTLR_EL1,CPU Extended Control Register"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
endif
if (CORENAME()=="CORTEXA57")
group.quad spr:0x31F22++0x00
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
elif (CORENAME()=="CORTEXA53")
group.quad spr:0x31F22++0x00
line.quad 0x00 "CPUMERRSR_EL1,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
newline
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
endif
tree.end
tree "Level 2 memory system"
if (CORENAME()=="CORTEXA57")
group.quad SPR:0x31B02++0x0
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
bitfld.long 0x00 20. "DIECCE,Data inline ECC enable" "Disabled,Enabled"
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not presented,Presented"
newline
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not presented,Presented"
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not presented,1,2,?..."
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
newline
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
group.quad SPR:0x31B03++0x0
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad SPR:0x31F00++0x00
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
newline
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
newline
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
newline
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
newline
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
newline
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad spr:0x31F23++0x00
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
elif (CORENAME()=="CORTEXA53")
group.quad SPR:0x31B02++0x0
line.long 0x00 "L2CTLR_EL1,L2 Control Register"
bitfld.long 0x00 24.--25. "NCPU,Number of CPU" "1,2,3,4"
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
newline
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
group.quad SPR:0x31B03++0x0
line.long 0x00 "L2ECTLR_EL1,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad SPR:0x31F00++0x00
line.long 0x00 "L2ACTLR_EL1,L2 Auxiliary Control Register"
bitfld.long 0x00 30.--31. "L2VC,L2 Victim Control" "0,1,2,3"
bitfld.long 0x00 29. "L2DEIEN,L2 cache data RAM error injection enable" "Disabled,Enabled"
bitfld.long 0x00 24. "L2TEIEN,L2 cache tag RAM error injection enable." "Disabled,Enabled"
newline
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
group.quad spr:0x31F23++0x00
line.quad 0x00 "L2MERRSR_EL1,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
newline
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
endif
tree.end
tree.end
tree "System Performance Monitor"
group.quad SPR:0x339C0++0x00
line.long 0x0 "PMCR_EL0,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
bitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
group.quad SPR:0x339C1++0x00
line.long 0x00 "PMCNTENSET_EL0,Count Enable Set Register"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00  30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
bitfld.long 0x00  29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
bitfld.long 0x00  28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
bitfld.long 0x00  26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
bitfld.long 0x00  25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
bitfld.long 0x00  24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
bitfld.long 0x00  22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
bitfld.long 0x00  21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
bitfld.long 0x00  20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
bitfld.long 0x00  18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
bitfld.long 0x00  17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
bitfld.long 0x00  16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
bitfld.long 0x00  14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
bitfld.long 0x00  13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
bitfld.long 0x00  12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
bitfld.long 0x00  10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
bitfld.long 0x00  9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
bitfld.long 0x00  8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
bitfld.long 0x00  6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
bitfld.long 0x00  5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.long 0x00  4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00  3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00  2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
bitfld.long 0x00  1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00  0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.quad SPR:0x339C2++0x00
line.long 0x00 "PMCNTENCLR_EL0,Count Enable Clear Register"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00  30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Event Counter 28 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Event Counter 27 clear bit" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Event Counter 26 clear bit" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Event Counter 25 clear bit" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Event Counter 24 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Event Counter 23 clear bit" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Event Counter 22 clear bit" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Event Counter 21 clear bit" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Event Counter 20 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Event Counter 19 clear bit" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Event Counter 18 clear bit" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Event Counter 17 clear bit" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Event Counter 16 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
group.quad SPR:0x339C3++0x00
line.long 0x00 "PMOVSCLR_EL0,Performance Monitors Overflow Flag Status Clear Register"
bitfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
eventfld.long 0x00  30. "P30,Event Counter 30 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Event Counter 29 clear bit" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Event Counter 28 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Event Counter 27 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Event Counter 26 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Event Counter 25 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Event Counter 24 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Event Counter 23 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Event Counter 22 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Event Counter 21 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Event Counter 20 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Event Counter 19 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Event Counter 18 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Event Counter 17 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Event Counter 16 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Event Counter 15 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Event Counter 14 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Event Counter 13 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Event Counter 12 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Event Counter 11 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Event Counter 10 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Event Counter 9 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Event Counter 8 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Event Counter 7 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Event Counter 6 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Event Counter 5 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Event Counter 4 overflow clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Event Counter 3 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Event Counter 2 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Event Counter 1 overflow clear bit" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Event Counter 0 overflow clear bit" "Disabled,Enabled"
wgroup.quad SPR:0x339C4++0x00
line.long 0x00 "PMSWINC_EL0,Performance Monitor Software Increment"
bitfld.long 0x00  30. "P30,Increment PMN30" "No action,Increment"
bitfld.long 0x00  29. "P29,Increment PMN29" "No action,Increment"
bitfld.long 0x00  28. "P28,Increment PMN28" "No action,Increment"
bitfld.long 0x00  27. "P27,Increment PMN27" "No action,Increment"
newline
bitfld.long 0x00  26. "P26,Increment PMN26" "No action,Increment"
bitfld.long 0x00  25. "P25,Increment PMN25" "No action,Increment"
bitfld.long 0x00  24. "P24,Increment PMN24" "No action,Increment"
bitfld.long 0x00  23. "P23,Increment PMN23" "No action,Increment"
newline
bitfld.long 0x00  22. "P22,Increment PMN22" "No action,Increment"
bitfld.long 0x00  21. "P21,Increment PMN21" "No action,Increment"
bitfld.long 0x00  20. "P20,Increment PMN20" "No action,Increment"
bitfld.long 0x00  19. "P19,Increment PMN19" "No action,Increment"
newline
bitfld.long 0x00  18. "P18,Increment PMN18" "No action,Increment"
bitfld.long 0x00  17. "P17,Increment PMN17" "No action,Increment"
bitfld.long 0x00  16. "P16,Increment PMN16" "No action,Increment"
bitfld.long 0x00  15. "P15,Increment PMN15" "No action,Increment"
newline
bitfld.long 0x00  14. "P14,Increment PMN14" "No action,Increment"
bitfld.long 0x00  13. "P13,Increment PMN13" "No action,Increment"
bitfld.long 0x00  12. "P12,Increment PMN12" "No action,Increment"
bitfld.long 0x00  11. "P11,Increment PMN11" "No action,Increment"
newline
bitfld.long 0x00  10. "P10,Increment PMN10" "No action,Increment"
bitfld.long 0x00  9. "P9,Increment PMN9" "No action,Increment"
bitfld.long 0x00  8. "P8,Increment PMN8" "No action,Increment"
bitfld.long 0x00  7. "P7,Increment PMN7" "No action,Increment"
newline
bitfld.long 0x00  6. "P6,Increment PMN6" "No action,Increment"
bitfld.long 0x00  5. "P5,Increment PMN5" "No action,Increment"
bitfld.long 0x00  4. "P4,Increment PMN4" "No action,Increment"
bitfld.long 0x00  3. "P3,Increment PMN3" "No action,Increment"
newline
bitfld.long 0x00  2. "P2,Increment PMN2" "No action,Increment"
bitfld.long 0x00  1. "P1,Increment PMN1" "No action,Increment"
bitfld.long 0x00  0. "P0,Increment PMN0" "No action,Increment"
group.quad SPR:0x339C5++0x00
line.long 0x00 "PMSELR_EL0,Performance Monitor Select Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.open "Common Event Identification Registers"
if (CORENAME()=="CORTEXA57")
rgroup.quad SPR:0x339C6++0x0
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
newline
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
newline
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
newline
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
newline
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
newline
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
newline
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
elif (CORENAME()=="CORTEXA53")
rgroup.quad SPR:0x339C6++0x0
line.long 0x00 "PMCEID0_EL0,Common Event Identification Register 0"
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
newline
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
newline
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
newline
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
newline
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
newline
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
newline
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
endif
rgroup.quad SPR:0x339C7++0x0
line.long 0x00 "PMCEID1_EL0,Common Event Identification Register 1"
bitfld.long 0x00 0. "EVENT32,Level 2 cache allocate" "Not implemented,Implemented"
tree.end
newline
group.quad spr:0x339D0++0x00
line.quad 0x00 "PMCCNTR_EL0,Performance Monitor Cycle Count Register"
group.quad SPR:0x339D1++0x00
line.long 0x00 "PMXEVTYPER_EL0,Performance Monitor Event Type Register"
group.quad SPR:0x339D2++0x00
line.long 0x00 "PMXEVCNTR_EL0,Performance Monitor Event Count Register"
group.quad SPR:0x339E0++0x00
line.long 0x00 "PMUSERENR_EL0,Performance Monitor User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "EC,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.quad SPR:0x309E1++0x00
line.long 0x00 "PMINTENSET_EL1,Performance Monitor Interrupt Enable Set"
bitfld.long 0x00 31. "C,Cycle counter Overflow Interrupt clear" "Disabled,Enabled"
bitfld.long 0x00  30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00  3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00  0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.quad SPR:0x309E2++0x00
line.long 0x00 "PMINTENCLR_EL1,Performance Monitor Interrupt Enable Clear"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00  30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00  3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00  0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
group.quad SPR:0x339E3++0x00
line.long 0x00 "PMOVSSET_EL0,Performance Monitor Overflow Flag Status Set Register"
group.quad SPR:(0x33E80+0x0)++0x00
line.long 0x00 "PMEVCNTR0_EL0,Performance Monitors Event Count Register 0"
group.quad SPR:(0x33EC0+0x0)++0x00
line.long 0x00 "PMEVTYPER0_EL0,Performance Monitors Selected Event Type Register 0"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x1)++0x00
line.long 0x00 "PMEVCNTR1_EL0,Performance Monitors Event Count Register 1"
group.quad SPR:(0x33EC0+0x1)++0x00
line.long 0x00 "PMEVTYPER1_EL0,Performance Monitors Selected Event Type Register 1"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x2)++0x00
line.long 0x00 "PMEVCNTR2_EL0,Performance Monitors Event Count Register 2"
group.quad SPR:(0x33EC0+0x2)++0x00
line.long 0x00 "PMEVTYPER2_EL0,Performance Monitors Selected Event Type Register 2"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x3)++0x00
line.long 0x00 "PMEVCNTR3_EL0,Performance Monitors Event Count Register 3"
group.quad SPR:(0x33EC0+0x3)++0x00
line.long 0x00 "PMEVTYPER3_EL0,Performance Monitors Selected Event Type Register 3"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x4)++0x00
line.long 0x00 "PMEVCNTR4_EL0,Performance Monitors Event Count Register 4"
group.quad SPR:(0x33EC0+0x4)++0x00
line.long 0x00 "PMEVTYPER4_EL0,Performance Monitors Selected Event Type Register 4"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:(0x33E80+0x5)++0x00
line.long 0x00 "PMEVCNTR5_EL0,Performance Monitors Event Count Register 5"
group.quad SPR:(0x33EC0+0x5)++0x00
line.long 0x00 "PMEVTYPER5_EL0,Performance Monitors Selected Event Type Register 5"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.quad SPR:0x33EF7++0x00
line.long 0x00 "PMCCFILTR_EL0,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
bitfld.long 0x00 26. "M,Secure EL3 filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.quad SPR:0x33E00++0x00
line.long 0x00 "CNTFRQ_EL0,Counter Frequency Register"
rgroup.quad spr:0x33E01++0x00
line.quad 0x00 "CNTPCT_EL0,Counter Physical Count Register"
group.quad SPR:0x30E10++0x00
line.long 0x00 "CNTKCTL_EL1,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad SPR:0x33E20++0x00
line.long 0x00 "CNTP_TVAL_EL0,Counter-timer Physical Timer TimerValue register"
group.quad SPR:0x33E21++0x00
line.long 0x00 "CNTP_CTL_EL0,Counter PL1 Physical Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad SPR:0x33E30++0x00
line.long 0x00 "CNTV_TVAL_EL0,Counter PL1 Virtual Timer Value Register"
group.quad SPR:0x33E31++0x00
line.long 0x00 "CNTV_CTL_EL0,Counter PL1 Virtual Timer Control Register"
bitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x33E02++0x00
line.quad 0x00 "CNTVCT_EL0,Counter Virtual Count Register"
group.quad spr:0x33E22++0x00
line.quad 0x00 "CNTP_CVAL_EL0,Counter PL1 Physical Compare Value Register"
group.quad spr:0x33E32++0x00
line.quad 0x00 "CNTV_CVAL_EL0,Counter PL1 Virtual Compare Value Register"
group.quad spr:0x34E03++0x00
line.quad 0x00 "CNTVOFF_EL2,Counter Virtual Offset Register"
group.quad SPR:0x34E10++0x00
line.long 0x00 "CNTHCTL_EL2,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit is the trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.quad SPR:0x34E20++0x00
line.long 0x00 "CNTHP_TVAL_EL2,Counter Non-secure PL2 Physical Timer Value Register"
group.quad SPR:0x34E21++0x00
line.long 0x00 "CNTHP_CTL_EL2,Counter Non-secure PL2 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x34E22++0x00
line.quad 0x00 "CNTHP_CVAL_EL2,Counter Non-secure PL2 Physical Compare Value Register"
group.quad SPR:0x37E20++0x00
line.long 0x00 "CNTPS_TVAL_EL1,Counter-timer Physical SecureTimer TimerValue register"
group.quad SPR:0x37E21++0x00
line.long 0x00 "CNTPS_CTL_EL1,Counter-timer Physical Secure Timer Control register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad spr:0x37E22++0x00
line.quad 0x00 "CNTPS_CVAL_EL1,Counter-timer Physical Secure Timer CompareValue register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch64 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.quad spr:0x30C84++0x00
line.quad 0x00 "ICC_AP0R0_EL1,Interrupt Controller Active Priorities Group 0 Register 0 (EL1)"
bitfld.quad 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.quad spr:0x30C90++0x00
line.quad 0x00 "ICC_AP1R0_EL1,Interrupt Controller Active Priorities Group 1 Register 0 (EL1)"
bitfld.quad 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.quad 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.quad 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
bitfld.quad 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.quad 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
bitfld.quad 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.quad 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.quad 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
bitfld.quad 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.quad 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
bitfld.quad 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.quad 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.quad 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.quad 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.quad 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
bitfld.quad 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.quad 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
bitfld.quad 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.quad 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.quad 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
bitfld.quad 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.quad 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
bitfld.quad 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.quad 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.quad 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.quad 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.quad 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
if (((per.q(spr:0x30CB6))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB6++0x00
line.quad 0x00 "ICC_ASGI1R_EL1,Interrupt Controller Alias Software Generated Interrupt Group 1 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
group.quad spr:0x30C83++0x00
line.quad 0x00 "ICC_BPR0_EL1,Interrupt Controller Binary Point Register 0"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
group.quad spr:0x30CC3++0x00
line.quad 0x00 "ICC_BPR1_EL1,Interrupt Controller Binary Point Register 1"
bitfld.quad 0x00 0.--2. "BINARYPOINT,Interrupt Priority Field Control and Interrupt Preemption Control" "Reserved,[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
group.quad spr:0x30CC4++0x00
line.quad 0x00 "ICC_CTLR_EL1,Interrupt Controller Control Register (EL1)"
rbitfld.quad 0x00 19. "EXTRANGE,Extended INTID range" "Reserved,Supported"
rbitfld.quad 0x00 18. "RSS,Range selector support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Zero,Non-zero"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Controls whether the priority mask Register is used as a hint for interrupt distribution" "Disabled,Enabled"
bitfld.quad 0x00 1. "EOIMODE,Controls whether a write to an End of Interrupt Register also deactivates the interrupt" "Disabled,Enabled"
newline
bitfld.quad 0x00 0. "CBPR,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 interrupts" "Separate registers,Same Register"
group.quad spr:0x36CC4++0x00
line.quad 0x00 "ICC_CTLR_EL3,Interrupt Controller Control Register (EL3)"
rbitfld.quad 0x00 19. "ExtRange,Extended INTID range" "Not supported,Supported"
rbitfld.quad 0x00 18. "RSS,Range Selector Support" "0 - 15,0 - 255"
newline
rbitfld.quad 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
rbitfld.quad 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.quad 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
newline
rbitfld.quad 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
rbitfld.quad 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Non-secure EL1 and EL2)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (Secure EL1)" "Priority drop/Deactivation,Priority drop"
bitfld.quad 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt Register also deactivates the interrupt (EL3)" "Enabled,Disabled"
newline
bitfld.quad 0x00 1. "CBPR_EL1NS,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same Register"
bitfld.quad 0x00 0. "CBPR_EL1S,Controls whether the same Register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same Register"
if (((per.q(spr:0x30CC4))&0x3800)==0x00)
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.quad.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
elif (((per.q(spr:0x30CC4))&0x3800)==0x800)
wgroup.quad spr:0x30CB1++0x00
line.quad 0x00 "ICC_DIR_EL1,Interrupt Controller Deactivate Interrupt Register"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.quad spr:0x30C81++0x00
line.quad 0x00 "ICC_EOIR0_EL1,Interrupt Controller End Of Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.quad spr:0x30CC1++0x00
line.quad 0x00 "ICC_EOIR1_EL1,Interrupt Controller End Of Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.quad spr:0x30C82++0x00
line.quad 0x00 "ICC_HPPIR0_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
rgroup.quad spr:0x30CC2++0x00
line.quad 0x00 "ICC_HPPIR1_EL1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.quad.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the currentSecurity state and Exception level"
endif
hgroup.quad spr:0x30C80++0x00
hide.long 0x00 "ICC_IAR0_EL1,Interrupt Acknowledge Register 0"
in
hgroup.quad spr:0x30CC0++0x00
hide.long 0x00 "ICC_IAR1_EL1,Interrupt Acknowledge Register 1"
in
newline
group.quad SPR:0x30CC6++0x00
line.long 0x00 "ICC_IGRPEN0_EL1,Interrupt Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad SPR:0x30CC7++0x00
line.long 0x00 "ICC_IGRPEN1_EL1,Interrupt Group Enable Register 1 (EL1)"
bitfld.long 0x00 0. "ENABLE,Enable" "Disabled,Enabled"
group.quad SPR:0x36CC7++0x00
line.long 0x00 "ICC_IGRPEN1_EL3,Interrupt Group Enable Register 1 (EL3)"
bitfld.long 0x00 1. "ENABLEGRP1S,Enable Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEGRP1NS,Enable Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
group.quad SPR:0x30460++0x00
line.long 0x00 "ICC_PMR_EL1,Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.quad SPR:0x30CB3++0x00
line.long 0x00 "ICC_RPR_EL1,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
if (((per.q(spr:0x30CB7))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated."
else
wgroup.quad spr:0x30CB7++0x00
line.quad 0x00 "ICC_SGI0R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
if (((per.q(spr:0x30CB5))&0x10000000000)==0x00)
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,The set of PEs for which SGI interrupts will be generated"
else
wgroup.quad spr:0x30CB5++0x00
line.quad 0x00 "ICC_SGI1R_EL1,Interrupt Controller Software Generated Interrupt Group 0 Register"
newline
bitfld.quad 0x00 44.--47. "RS,Range selector" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 40. "IRM,Interrupt routing mode" "Target list,All PEs excluding self"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
endif
group.quad SPR:0x30CC5++0x00
line.long 0x00 "ICC_SRE_EL1,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad SPR:0x34C95++0x00
line.long 0x00 "ICC_SRE_EL2,System Register Enable Register for EL2"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.quad SPR:0x36CC5++0x00
line.long 0x00 "ICC_SRE_EL3,System Register Enable Register for EL3"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
tree.end
tree "AArch64 Virtual Interface Control System Registers"
tree.open "Hypervisor Active Priorities Registers"
group.quad SPR:0x34C80++0x00
line.long 0x00 "ICH_AP0R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
if (CORENAME()=="CORTEXA53")
group.quad SPR:0x34C90++0x00
line.long 0x00 "ICH_AP1R0_EL2,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
endif
tree.end
newline
rgroup.quad SPR:0x34CB3++0x00
line.long 0x00 "ICH_EISR_EL2,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.quad SPR:0x34CB5++0x00
line.long 0x00 "ICH_ELRSR_EL2,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.quad SPR:0x34CB0++0x00
line.long 0x00 "ICH_HCR_EL2,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,?..."
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
if (((d.q(spr:(0x34CC0+0x0)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x0)++0x00
line.quad 0x00 "ICH_LR0_EL2,Interrupt Controller List Register 0"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x1)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x1)++0x00
line.quad 0x00 "ICH_LR1_EL2,Interrupt Controller List Register 1"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x2)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x2)++0x00
line.quad 0x00 "ICH_LR2_EL2,Interrupt Controller List Register 2"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
if (((d.q(spr:(0x34CC0+0x3)))&0x2000000000000000)==0x00)
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
bitfld.quad 0x00 41. "PINTID_EOI,End of Interrupt" "Interrupt,No interrupt"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
else
group.quad spr:(0x34CC0+0x3)++0x00
line.quad 0x00 "ICH_LR3_EL2,Interrupt Controller List Register 3"
bitfld.quad 0x00 62.--63. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.quad 0x00 61. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt" "Software,Hardware"
bitfld.quad 0x00 60. "GROUP,Indicates the group for this virtual interrupt" "Group 0,Group 1"
newline
hexmask.quad.byte 0x00 48.--55. 1. "PRIORITY,The priority of this interrupt"
hexmask.quad.word 0x00 32.--41. 1. "PINTID,Physical INTID, for hardware interrupts"
hexmask.quad.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
endif
rgroup.quad SPR:0x34CB2++0x00
line.long 0x00 "ICH_MISR_EL2,Interrupt Controller Maintenance Interrupt State Register"
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.quad SPR:0x34CB7++0x00
line.long 0x00 "ICH_VMCR_EL2,Interrupt Controller Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.quad SPR:0x34C94++0x00
line.long 0x00 "ICH_VSEIR_EL2,Interrupt Controller Virtual System Error Interrupt Register"
rgroup.quad SPR:0x34CB1++0x00
line.long 0x00 "ICH_VTR_EL2,Interrupt Controller VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
rgroup.quad SPR:0x23010++0x00
line.long 0x00 "MDCCSR_EL0,Debug Comms Channel Status Register"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
group.quad SPR:0x20020++0x00
line.long 0x00 "MDCCINT_EL1,Debug Comms Channel Interrupt Enable register"
bitfld.long 0x00 30. "RX,DCC interrupt enable controls" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt enable controls" "Disabled,Enabled"
group.quad spr:0x23040++0x00
line.quad 0x00 "DBGDTR_EL0,Half Duplex Data Transfer Register"
rgroup.quad SPR:0x23050++0x00
line.long 0x00 "DBGDTRRX_EL0,Full Duplex Receive Data Transfer Register"
wgroup.quad SPR:0x23050++0x00
line.long 0x00 "DBGDTRTX_EL0,Full Duplex Transmit Data Transfer Register"
group.quad SPR:0x24070++0x00
line.long 0x00 "DBGVCR32_EL2,Vector Catch Register"
bitfld.long 0x00 31. "NSF,FIQ vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 30. "NSI,IRQ vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 28. "NSD,Data Abort vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 27. "NSP,Prefetch Abort vector catch enable in Non-secure state" "Low,High"
newline
bitfld.long 0x00 26. "NSS,Supervisor Call (SVC) vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 25. "NSU,Undefined Instruction vector catch enable in Non-secure state" "Low,High"
bitfld.long 0x00 7. "SF,FIQ vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 6. "SI,IRQ vector catch enable in Secure state" "Low,High"
newline
bitfld.long 0x00 4. "SD,Data Abort vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 3. "SP,Prefetch Abort vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 2. "SS,Supervisor Call (SVC) vector catch enable in Secure state" "Low,High"
bitfld.long 0x00 1. "SU,Undefined Instruction vector catch enable in Secure state" "Low,High"
group.quad SPR:0x20002++0x00
line.long 0x00 "OSDTRRX_EL1,OS Lock Data Transfer Register"
group.quad SPR:0x20022++0x00
line.long 0x00 "MDSCR_EL1,Monitor Debug System Control Register"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 27. "RXO,Save/restore bit" "Low,High"
bitfld.long 0x00 26. "TXU,Save/restore bit" "Low,High"
newline
bitfld.long 0x00 22.--23. "INTDIS,Save/restore bits" "0,1,2,3"
bitfld.long 0x00 21. "TDA,Save/restore bit" "Low,High"
bitfld.long 0x00 15. "MDE,Monitor debug events" "Disabled,Enabled"
bitfld.long 0x00 14. "HDE,Save/restore bit" "Low,High"
newline
bitfld.long 0x00 13. "KDE,Local (kernel) debug enable" "Disabled,Enabled"
bitfld.long 0x00 12. "TDCC,Trap accesses to the debug comms channel in EL0" "Disabled,Enabled"
bitfld.long 0x00 6. "ERR,Save/restore bit" "Low,High"
bitfld.long 0x00 0. "SS,Software step control" "Disabled,Enabled"
group.quad SPR:0x20032++0x00
line.long 0x00 "OSDTRTX_EL1,OS Lock Data Transfer Register"
group.quad SPR:0x20062++0x00
line.long 0x00 "OSECCR_EL1,OS Lock Exception Catch Control Register"
rgroup.quad spr:0x20100++0x00
line.quad 0x00 "MDRAR_EL1,Debug ROM Address Register"
hexmask.quad 0x00 12.--47. 0x1000 "ROMADDR,ROM base physical address"
bitfld.quad 0x00 0.--1. "VALID,ROM address valid" "Invalid,Reserved,Reserved,Valid"
wgroup.quad SPR:0x20104++0x00
line.long 0x00 "OSLAR_EL1,OS Lock Access Register"
bitfld.long 0x00 0. "OSLK,OS lock" "Unlock,Lock"
rgroup.quad SPR:0x20114++0x00
line.long 0x00 "OSLSR_EL1,OS Lock Status Register"
bitfld.long 0x00 2. "NTT,Not 32-bit access" "Low,High"
bitfld.long 0x00 1. "OSLK,OS lock status" "Not locked,Locked"
bitfld.long 0x00 0. 3. "OSLM,OS lock model implemented field" "Reserved,Reserved,Impelemented,?..."
group.quad SPR:0x20134++0x00
line.long 0x00 "OSDLR_EL1,OS Double-lock Register"
bitfld.long 0x00 0. "DLK,OS double-lock control" "Not locked,Locked"
group.quad SPR:0x20144++0x00
line.long 0x00 "DBGPRCR_EL1,Debug Power/Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core no powerdown request" "No,Yes"
group.quad SPR:0x20786++0x00
line.long 0x00 "DBGCLAIMSET_EL1,Claim Tag register Set"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
newline
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.quad SPR:0x20796++0x00
line.long 0x00 "DBGCLAIMCLR_EL1,Claim Tag register Clear"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.quad SPR:0x207E6++0x00
line.long 0x00 "DBGAUTHSTATUS_EL1,Authentication Status register"
bitfld.long 0x00 7. "SNI,Secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 6. "SNE,Secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "SI,Secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 4. "SE,Secure invasive debug enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "NSNI,Non-secure non-invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNE,Non-secure non-invasive debug enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "NSI,Non-secure invasive debug implemented" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSE,Non-secure invasive debug enabled" "Disabled,Enabled"
group.quad SPR:0x33450++0x00
line.long 0x00 "DSPSR_EL0,Debug Saved Processor Status Register"
group.quad spr:0x33451++0x00
line.quad 0x00 "DLR_EL0,Debug Link Register"
tree.end
tree "Breakpoint Registers"
if (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x0)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x0)++0x00 "Breakpoint 0"
line.quad 0x00 "DBGBVR0_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x0)++0x0
line.long 0x00 "DBGBCR0_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x10)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x10)++0x00 "Breakpoint 1"
line.quad 0x00 "DBGBVR1_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x10)++0x0
line.long 0x00 "DBGBCR1_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x20)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x20)++0x00 "Breakpoint 2"
line.quad 0x00 "DBGBVR2_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x20)++0x0
line.long 0x00 "DBGBCR2_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x30)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x30)++0x00 "Breakpoint 3"
line.quad 0x00 "DBGBVR3_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x30)++0x0
line.long 0x00 "DBGBCR3_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x40)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x40)++0x00 "Breakpoint 4"
line.quad 0x00 "DBGBVR4_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x40)++0x0
line.long 0x00 "DBGBCR4_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad 0x00 2.--48. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0x800000||0x900000||0xC00000||0xD00000))
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
elif (((d.l(spr:(0x20005+0x50)))&0xF00000)==(0xA00000||0xB00000||0xE00000||0xF00000))
else
group.quad spr:(0x20004+0x50)++0x00 "Breakpoint 5"
line.quad 0x00 "DBGBVR5_EL1,Breakpoint Value Register"
hexmask.quad.byte 0x00 32.--39. 1. "VMID,VMID value for comparison"
hexmask.quad.long 0x00 0.--31. 1. "CONTEXTID,Context ID"
endif
group.quad SPR:(0x20005+0x50)++0x0
line.long 0x00 "DBGBCR5_EL1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMC,Higher mode control" "Disabled,Enabled"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
tree.end
tree "Watchpoint Control Registers"
group.quad spr:(0x20006+0x0)++0x00 "Watchpoint 0"
line.quad 0x00 "DBGWVR0_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x0)++0x00
line.quad 0x00 "DBGWCR0_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x10)++0x00 "Watchpoint 1"
line.quad 0x00 "DBGWVR1_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x10)++0x00
line.quad 0x00 "DBGWCR1_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x20)++0x00 "Watchpoint 2"
line.quad 0x00 "DBGWVR2_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x20)++0x00
line.quad 0x00 "DBGWCR2_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
group.quad spr:(0x20006+0x30)++0x00 "Watchpoint 3"
line.quad 0x00 "DBGWVR3_EL1,Watchpoint Value Register (AArch64)"
hexmask.quad 0x00 2.--48. 0x4 "ADDRESS,Data address"
group.quad spr:(0x20007+0x30)++0x00
line.quad 0x00 "DBGWCR3_EL1,Watchpoint Control Register"
bitfld.quad 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.quad 0x00 20. "WT,Watchpoint type" "Unlinked,Linked"
bitfld.quad 0x00 16.--19. "LBN,Linked breakpoint number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.quad 0x00 13. "HMC,Hypervisor mode control" "Disabled,Enabled"
hexmask.quad.byte 0x00 5.--12. 1. "BAS,Byte address select"
newline
bitfld.quad 0x00 3.--4. "LSC,Load/store control" "Reserved,Load,Store,Both"
bitfld.quad 0x00 1.--2. "PAC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.quad 0x00 0. "E,Enable" "Disabled,Enabled"
tree.end
tree.end
tree.open "AArch32"
tree "ID Registers"
rgroup.long c15:0x0000++0x0
line.long 0x0 "MIDR,Main ID Register"
hexmask.long.byte 0x0 24.--31. 0x1 "IMPL,Implementer code"
bitfld.long 0x0 20.--23. "VAR,Variant" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0 16.--19. "ARCH, Architecture" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,ARMv8"
newline
hexmask.long.word 0x0 4.--15. 0x10 "PART,Primary Part Number"
bitfld.long 0x0 0.--3. "REV,Revision Number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
if (CORENAME()=="CORTEXA57")
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,Reserved,PIPT"
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
elif (CORENAME()=="CORTEXA53")
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,?..."
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
endif
if corename()=="CORTEXA57"
rgroup.long c15:0x0300++0x0
line.long 0x0 "TLBTR,TLB Type Register"
endif
if corename()=="CORTEXA57"
rgroup.long c15:0x0500++0x0
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
newline
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,Implemented"
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
bitfld.long 0x00 0.--1. "CPUID,Indicates the core number in the device" "1,2,3,4"
elif corename()=="CORTEXA53"
rgroup.long c15:0x0500++0x0
line.long 0x0 "MPIDR,Multiprocessor Affinity Register"
bitfld.long 0x00 30. "U,Processor is part of a multiprocessor or uniprocessor system" "Multiprocessor,?..."
newline
bitfld.long 0x00 24. "MT,Lowest level of affinity consist of logical processors" "Not implemented,?..."
hexmask.long.byte 0x00 16.--23. 1. "AFF2,Affinity level 2. Second highest level affinity field"
hexmask.long.byte 0x00 8.--15. 1. "AFF1,Affinity level 1. Third highest level affinity field"
newline
hexmask.long.byte 0x00 0.--7. 1. "AFF0,Affinity level 0. Lowest level affinity field"
endif
rgroup.long c15:0x0600++0x0
line.long 0x0 "REVIDR,Revision ID Register"
rgroup.long c15:0x0410++0x00
line.long 0x00 "ID_MMFR0,Memory Model Feature Register 0"
bitfld.long 0x00 28.--31. "IS,Indicates innermost shareability domain implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 24.--27. "FCSE,Fast Context Switch Memory Mappings Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "AR,Auxiliary Register Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TCM,TCM and Associated DMA Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "SL,Shareability levels" "Reserved,Implemented 2 levels,?..."
bitfld.long 0x00 8.--11. "OSS,Outer Shareable Support" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 4.--7. "PMSA,Physical Memory System Architecture (PMSA) Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "VMSA,Virtual Memory System Architecture (VMSA) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0510++0x00
line.long 0x00 "ID_MMFR1,Memory Model Feature Register 1"
bitfld.long 0x00 28.--31. "BTB,Branch Predictor" "Reserved,Reserved,Required,?..."
bitfld.long 0x00 24.--27. "L1TCO,Test and Clean Operations on Data Cache/Harvard/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "L1UCMO,L1 Cache/All Maintenance Operations/Unified Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 16.--19. "L1HCMO,L1 Cache/All Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 12.--15. "L1UCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "L1HCLMOSW,L1 Cache Line Maintenance Operations by Set and Way/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "L1UCLMOMVA,L1 Cache Line Maintenance Operations by VA/Unified Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "L1HCLMOMVA,L1 Cache Line Maintenance Operations by VA/Harvard Architecture" "Not supported,?..."
rgroup.long c15:0x0610++0x00
line.long 0x00 "ID_MMFR2,Memory Model Feature Register 2"
bitfld.long 0x00 28.--31. "HAF,Hardware Access Flag Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "WFI,Wait for Interrupt Stalling Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MBF,Memory Barrier Operations Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "UTLBMO,TLB Maintenance Operations/Unified Architecture Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "HTLBMO,TLB Maintenance Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "HL1CMRO,Cache Maintenance Range Operations/Harvard Architecture Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "HL1BPCRO,Background Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
bitfld.long 0x00 0.--3. "HL1FPCRO,Foreground Prefetch Cache Range Operations/Harvard Architecture Support" "Not supported,?..."
rgroup.long c15:0x0710++0x00
line.long 0x00 "ID_MMFR3,Memory Model Feature Register 3"
bitfld.long 0x00 28.--31. "SS,Supersection support" "Supported,?..."
bitfld.long 0x00 24.--27. "CMEMSZ,Cache memory size" "Reserved,Reserved,1TByte,?..."
bitfld.long 0x00 20.--23. "CW,Coherent walk" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "MB,Maintenance broadcast Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BPM,Invalidate Branch predictor Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "HCMOSW,Invalidate Cache by Set and Way/Clean by Set and Way/Invalidate and Clean by Set and Way Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "HCMOMVA,Invalidate Cache MVA Support" "Reserved,Supported,?..."
rgroup.long c15:0x0620++0x00
line.long 0x00 "ID_MMFR4,ID_MMFR4"
bitfld.long 0x00 4.--7. "AC2,Extension of ACTLR and HACTLR by ACTLR2 and HACTLR2" "Not implemented, implemented,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved"
rgroup.long c15:0x0020++0x00
line.long 0x00 "ID_ISAR0,Instruction Set Attribute Register 0"
bitfld.long 0x00 24.--27. "DIVI,Divide Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "DEBI,Debug Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 16.--19. "CI,Coprocessor Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 12.--15. "CBI,Combined Compare and Branch Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "BI,Bitfield Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "BCI,Bit Counting Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "SI,Swap Instructions Support" "Not supported,?..."
rgroup.long c15:0x0120++0x00
line.long 0x00 "ID_ISAR1,Instruction Set Attribute Register 1"
bitfld.long 0x00 28.--31. "JI,Jazelle Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "INTI,Interwork Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "IMMI,Immediate Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "ITEI,If Then Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "EXTI,Extend Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "EARI,Exception A and R Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "EXIN,Exception in ARM Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "ENDI,Endian Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0220++0x00
line.long 0x00 "ID_ISAR2,Instruction Set Attribute Register 2"
bitfld.long 0x00 28.--31. "RI,Reversal Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 24.--27. "PSRI,PSR Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "UMI,Advanced Unsigned Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "SMI,Advanced Signed Multiply Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "MI,Multiply Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "II,Multi-Access Interruptible Instructions Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "MHI,Memory Hint Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "LSI,Load and Store Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0320++0x00
line.long 0x00 "ID_ISAR3,Instruction Set Attribute Register 3"
bitfld.long 0x00 28.--31. "TEEEI,Thumb-EE Extensions Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "NOPI,True NOP Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "TCI,Thumb Copy Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 16.--19. "TBI,Table Branch Instructions Support" "Reserved,Supported,Reserved,?..."
bitfld.long 0x00 12.--15. "SPI,Synchronization Primitive Instructions Support" "Reserved,Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "SVCI,SVC Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "SIMDI,Single Instruction Multiple Data (SIMD) Instructions Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SI,Saturate Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0420++0x00
line.long 0x00 "ID_ISAR4,Instruction Set Attribute Register 4"
bitfld.long 0x00 28.--31. "SWP_FRAC,Memory System Locking Support" "Not supported,?..."
bitfld.long 0x00 24.--27. "PSR_M_I,PSR_M Instructions Support" "Not supported,?..."
bitfld.long 0x00 20.--23. "SPRI,Synchronization Primitive instructions" "Supported,?..."
newline
bitfld.long 0x00 16.--19. "BI,Barrier Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SMCI,SMC Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "WBI,Write-Back Instructions Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 4.--7. "WSI,With-Shift Instructions Support" "Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "UI,Unprivileged Instructions Support" "Reserved,Reserved,Supported,?..."
rgroup.long c15:0x0520++0x00
line.long 0x00 "ID_ISAR5,Instruction Set Attribute Register 5"
bitfld.long 0x00 16.--19. "CRC32,CRC32 Instructions Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "SHA2,SHA2 Instructions Support" "Not supported,Supported,?..."
bitfld.long 0x00 8.--11. "SHA1,SHA1 Instructions Support" "Not supported,Supported,?..."
newline
bitfld.long 0x00 4.--7. "AES,AES Instructions Support" "Not supported,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "SEVL,SEVL Instructions Support" "Reserved,Supported,?..."
rgroup.long c15:0x0010++0x00
line.long 0x00 "ID_PFR0,Processor Feature Register 0"
bitfld.long 0x00 12.--15. "STATE3,Thumb Execution Environment (Thumb-EE) Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "STATE2,Support for Jazelle extension" "Reserved,Supported,?..."
bitfld.long 0x00 4.--7. "STATE1,Thumb Encoding Supported by the Processor Type" "Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "STATE0,ARM Instruction Set Support" "Reserved,Supported,?..."
rgroup.long c15:0x0110++0x00
line.long 0x00 "ID_PFR1,Processor Feature Register 1"
bitfld.long 0x00 28.--31. "GIC_CPU,GIC CPU Support" "Disabled,Enabled,?..."
newline
bitfld.long 0x00 16.--19. "GT,Generic Timer Support" "Reserved,Supported,?..."
bitfld.long 0x00 12.--15. "VE,Virtualization Extensions Support" "Reserved,Supported,?..."
bitfld.long 0x00 8.--11. "MPM,Microcontroller Programmer's Model Support" "Not supported,?..."
newline
bitfld.long 0x00 4.--7. "SE,Security Extensions Architecture v1 Support" "Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "PM,Standard ARMv4 Programmer's Model Support" "Reserved,Supported,?..."
if corename()=="CORTEXA57"
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 8.--11. "CDM_MM,Memory-Mapped Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
newline
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
elif corename()=="CORTEXA53"
rgroup.long c15:0x0210++0x00
line.long 0x00 "ID_DFR0,Debug Feature Register 0"
bitfld.long 0x00 24.--27. "PMM,Performance Monitor Model Support" "Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 20.--23. "MDM_MM,Memory-mapped Debug Model for M profile processors Support" "Not supported,?..."
bitfld.long 0x00 16.--19. "TM_MM,Trace Model (Memory-Mapped) Support" "Reserved,Supported,?..."
newline
bitfld.long 0x00 12.--15. "CTM_CB,Coprocessor-Based Trace Debug Model Support" "Not supported,?..."
bitfld.long 0x00 4.--7. "SDM_CB,Secure Debug Model (Coprocessor) Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
bitfld.long 0x00 0.--3. "CDM_CB,Coprocessor Debug Model Support" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Supported,?..."
endif
group.long c15:0x0310++0x00
line.long 0x00 "ID_AFR0,Auxiliary Feature Register 0"
if corename()=="CORTEXA57"
rgroup.long c15:0x6C9++0x0
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
newline
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
newline
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
newline
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
newline
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
newline
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
rgroup.long c15:0x7C9++0x0
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
elif corename()=="CORTEXA53"
rgroup.long c15:0x6C9++0x0
line.long 0x00 "PMCEID0,Common Event Identification Register 0"
bitfld.long 0x00 31. "EVENT31,L1 Data cache allocate" "Not implemented,Implemented"
bitfld.long 0x00 30. "EVENT30,Chain" "Not implemented,Implemented"
newline
bitfld.long 0x00 29. "EVENT29,Bus cycle" "Not implemented,Implemented"
bitfld.long 0x00 28. "EVENT28,Instruction architecturally executed condition check pass" "Not implemented,Implemented"
bitfld.long 0x00 27. "EVENT27,Instruction speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 26. "EVENT26,Local memory error" "Not implemented,Implemented"
bitfld.long 0x00 25. "EVENT25,Bus access" "Not implemented,Implemented"
bitfld.long 0x00 24. "EVENT24,Level 2 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 23. "EVENT23,Level 2 data cache refill" "Not implemented,Implemented"
bitfld.long 0x00 22. "EVENT22,Level 2 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 21. "EVENT21,Level 1 data cache write-back" "Not implemented,Implemented"
newline
bitfld.long 0x00 20. "EVENT20,Level 1 instruction cache access" "Not implemented,Implemented"
bitfld.long 0x00 19. "EVENT19,Data memory access" "Not implemented,Implemented"
bitfld.long 0x00 18. "EVENT18,Predictable branch speculatively executed" "Not implemented,Implemented"
newline
bitfld.long 0x00 17. "EVENT17,Cycle" "Not implemented,Implemented"
bitfld.long 0x00 16. "EVENT16,Mispredicted or not predicted branch speculatively executed" "Not implemented,Implemented"
bitfld.long 0x00 15. "EVENT15,Instruction architecturally executed condition check pass  unaligned load or store" "Not implemented,Implemented"
newline
bitfld.long 0x00 14. "EVENT14,Instruction architecturally executed condition check pass procedure return" "Not implemented,Implemented"
bitfld.long 0x00 13. "EVENT13,Instruction architecturally executed  immediate branch" "Not implemented,Implemented"
bitfld.long 0x00 12. "EVENT12,Instruction architecturally executed condition check pass software change of the PC" "Not implemented,Implemented"
newline
bitfld.long 0x00 11. "EVENT11,Instruction architecturally executed condition check pass write to CONTEXTIDR" "Not implemented,Implemented"
bitfld.long 0x00 10. "EVENT10,Instruction architecturally executed condition check pass exception return" "Not implemented,Implemented"
bitfld.long 0x00 9. "EVENT9,Exception taken" "Not implemented,Implemented"
newline
bitfld.long 0x00 8. "EVENT8,Instruction architecturally executed" "Not implemented,Implemented"
bitfld.long 0x00 7. "EVENT7,Instruction architecturally executed condition check pass  store" "Not implemented,Implemented"
bitfld.long 0x00 6. "EVENT6,Instruction architecturally executed condition check pass  load" "Not implemented,Implemented"
newline
bitfld.long 0x00 5. "EVENT5,Level 1 data TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 4. "EVENT4,Level 1 data cache access" "Not implemented,Implemented"
bitfld.long 0x00 3. "EVENT3,Level 1 data cache refill" "Not implemented,Implemented"
newline
bitfld.long 0x00 2. "EVENT2,Level 1 instruction TLB refill" "Not implemented,Implemented"
bitfld.long 0x00 1. "EVENT1,Level 1 instruction cache refill" "Not implemented,Implemented"
bitfld.long 0x00 0. "EVENT0,Instruction architecturally executed condition check pass software increment" "Not implemented,Implemented"
rgroup.long c15:0x7C9++0x0
line.long 0x00 "PMCEID1,Common Event Identification Register 1"
bitfld.long 0x00 0. "EVENT32,L2D Cache Allocate" "Not implemented,Implemented"
endif
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,User Read/Write Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,User Read-Only Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,EL1 only Thread ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
tree.end
tree "System Control and Configuration"
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,System Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
else
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
endif
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 63. "FPRCGEC,Force processor RCG enables active" "Not forced,Forced"
bitfld.quad 0x00 59. "DLPDMB,Disable load pass DMB" "No,Yes"
newline
bitfld.quad 0x00 58. "DDMBN,Disable DMB nullification" "No,Yes"
bitfld.quad 0x00 57. "TA,Treat DMB st/stand DMB ld/allas DMB all/all" "Disabled,Enabled"
newline
bitfld.quad 0x00 56. "DL1DCHP,Disable L1 Data Cache hardware prefetcher" "No,Yes"
bitfld.quad 0x00 55. "DLPS,Disable load pass store" "No,Yes"
newline
bitfld.quad 0x00 54. "TGRE,Treat GRE/nGRE as nGnRE" "Disabled,Enabled"
bitfld.quad 0x00 53. "TDMBADSB,Treat DMBand DSBas if their domain field is SY" "Disabled,Enabled"
newline
bitfld.quad 0x00 52. "DORFLDNPI,Disable over-read from LDNP instruction" "No,Yes"
bitfld.quad 0x00 51. "DCDAFEMP,Disable contention detection and fast exclusive monitor path" "No,Yes"
newline
bitfld.quad 0x00 50. "DSSONNCGREEMT,Disable store streaming on NC/GRE memory type" "No,Yes"
bitfld.quad 0x00 49. "DNHOWBNAMT,Disable non-allocate hint of Write-Back No-Allocate (WBNA) memory type" "No,Yes"
newline
bitfld.quad 0x00 48. "DESRAFLSTL2,Disable early speculative read access from LS to L2" "No,Yes"
bitfld.quad 0x00 47. "DL1L2HP,Disable L1/L2 hardware prefetch across 4KB page boundary even if page is 64KB or larger" "No,Yes"
newline
bitfld.quad 0x00 44. "EDCCADCCI,Enable data cache clean as data cache clean/invalidate" "Disabled,Enabled"
bitfld.quad 0x00 39. "DIM,Disable instruction merging" "No,Yes"
newline
bitfld.quad 0x00 38. "FFPSCRWF,Force FPSCR write flush" "Not forced,Forced"
bitfld.quad 0x00 37. "DIGS,Disable instruction group split" "No,Yes"
newline
bitfld.quad 0x00 36. "FIDSBONASBE,Force implicit DSB on an ISB event" "Not forced,Forced"
bitfld.quad 0x00 34. "DSBP,Disable Static Branch Predictor" "No,Yes"
newline
bitfld.quad 0x00 33. "DL1ICWPIMBTB,Disable L1 Instruction Cache way prediction in micro-BTB" "No,Yes"
bitfld.quad 0x00 32. "DL1ICP,Disable L1 Instruction Cache prefetch" "No,Yes"
newline
bitfld.quad 0x00 31. "SDEH,Snoop-delayed exclusive handling" "Disabled,Enabled"
bitfld.quad 0x00 30. "FMCEA,Force main clock enable active" "Not forced,Forced"
newline
bitfld.quad 0x00 29. "FASIMDFPCEA,Force Advanced SIMD and floating-point clock enable active" "Disabled,Enabled"
bitfld.quad 0x00 27.--28. "WSNAT,Write streaming no-allocate threshold" "12th,128th,512th,Disabled"
newline
bitfld.quad 0x00 25.--26. "WSNL1AT,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
bitfld.quad 0x00 24. "NCSE,Non-cacheable streaming enhancement" "Disabled,Enabled"
newline
bitfld.quad 0x00 23. "FIORTTSSAW,Force in-order requests to the same set and way" "Not forced,Forced"
bitfld.quad 0x00 22. "FIOLI,Force in-order load issue" "Not forced,Forced"
newline
bitfld.quad 0x00 21. "DL2TLBP,Disable L2 TLB prefetching" "No,Yes"
bitfld.quad 0x00 20. "DL2TTWIPAPAC,Disable L2 translation table walk IPA PA cache" "No,Yes"
newline
bitfld.quad 0x00 19. "DL2S1TTWC,Disable L2 stage 1 translation table walk cache" "No,Yes"
bitfld.quad 0x00 18. "DL2S1TTWL2PAC,Disable L2 stage 1 translation table walk L2 PA cache" "No,Yes"
newline
bitfld.quad 0x00 17. "DL2TLBPO,Disable L2 TLB performance optimization" "No,Yes"
bitfld.quad 0x00 16. "EFSOADLR,Enable full Strongly-ordered and Device load replay" "Disabled,Enabled"
newline
bitfld.quad 0x00 15. "FIOIIBEU,Force in-order issue in branch execute unit" "Not forced,Forced"
bitfld.quad 0x00 14. "FLOFOIGCDAPC,Force limit of one instruction group commit/de-allocate per cycle" "Not forced,Forced"
newline
bitfld.quad 0x00 13. "FASPRW,Flush after Special Purpose Register (SPR) writes" "Disabled,Enabled"
bitfld.quad 0x00 12. "FPOSPRS,Force push of SPRs" "Disabled,Enabled"
newline
bitfld.quad 0x00 11. "LTOIPIG,Limit to one instruction per instruction group" "Disabled,Enabled"
bitfld.quad 0x00 10. "FSAEIG,Force serialization after each instruction group" "Not forced,Forced"
newline
bitfld.quad 0x00 9. "DFRO,Disable flag renaming optimization" "No,Yes"
bitfld.quad 0x00 8. "EWFIIAANOPI,Execute WFI instruction as a NOP instruction" "Disabled,Enabled"
newline
bitfld.quad 0x00 7. "EWFEIAANOPI,Execute WFE instruction as a NOP instruction" "Disabled,Enabled"
bitfld.quad 0x00 5. "EPLDPLDWIASNOP,Execute PLDand PLDWinstructions as a NOP" "Disabled,Enabled"
newline
bitfld.quad 0x00 4. "DIP,Disable indirect predictor" "No,Yes"
bitfld.quad 0x00 3. "DMBTB,Disable micro-BTB" "No,Yes"
newline
bitfld.quad 0x00 1. "DICMS,Disable Instruction Cache miss streaming" "No,Yes"
bitfld.quad 0x00 0. "EIOBTB,Enable invalidates of BTB" "Disabled,Enabled"
group.quad c15:0x110F0++0x01
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
bitfld.quad 0x00 38. "DTWDAP,Disable table walk descriptor access prefetch" "No,Yes"
bitfld.quad 0x00 35.--36. "L2IFPD,L2 instruction fetch prefetch distance" "0 lines,1 line,2 lines,3 lines"
newline
bitfld.quad 0x00 32.--33. "L2LSDPD,L2 load/store data prefetch distance" "0 line,2 lines,4 lines,8 lines"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad c15:0x120F0++0x01
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--22. "B/W,Bank/Way" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "INDEX,RAM address"
group.long c15:0x0101++0x0
line.long 0x0 "ACTLR,Auxiliary Control Register"
elif corename()=="CORTEXA53"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.quad c15:0x100F0++0x01
line.quad 0x00 "CPUACTLR,CPU Auxiliary Control Register"
bitfld.quad 0x00 30. "FPDIDIS,Disable floating-point dual issue" "No,Yes"
bitfld.quad 0x00 29. "DIDIS,Disable Dual Issue" "No,Yes"
newline
bitfld.quad 0x00 27.--28. "RADIS,Write streaming no-allocate threshold" "16th,128th,512th,Disabled"
bitfld.quad 0x00 25.--26. "L1RADIS,Write streaming no-L1-allocate threshold" "4th,64th,128th,Disabled"
newline
bitfld.quad 0x00 24. "DTAH,Disable Transient allocation hint" "No,Yes"
bitfld.quad 0x00 23. "STBPFRS,Disable ReadUnique request for prefetch streams initiated by STB accesses" "No,Yes"
newline
bitfld.quad 0x00 22. "STBPFDIS,Disable prefetch streams initiated from STB accesses" "No,Yes"
bitfld.quad 0x00 21. "IFUTHDIS,IFU fetch throttle disabled" "No,Yes"
newline
bitfld.quad 0x00 19.--20. "NPFSTRM,Number of independent data prefetch streams" "1 stream,2 streams,3 streams,4 streams"
bitfld.quad 0x00 18. "DSTDIS,Enable device split throttle" "Disabled,Enabled"
newline
bitfld.quad 0x00 17. "STRIDE,Enable stride detection" "Disabled,Enabled"
bitfld.quad 0x00 13.--15. "L1PCTL,L1 Data prefetch control" "Disabled,1,2,3,4,5,6,7"
newline
bitfld.quad 0x00 10. "DODMBS,Disable optimized Data Memory Barrier behavior" "No,Yes"
group.quad c15:0x110F0++0x01
line.quad 0x00 "CPUECTLR,CPU Extended Control Register"
bitfld.quad 0x00 6. "SMPEN,Enable hardware management of data coherency with other processors in the multiprocessor" "Disabled,Enabled"
bitfld.quad 0x00 3.--5. "FPRETCTL,Advanced SIMD and Floating-point retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
newline
bitfld.quad 0x00 0.--2. "CPURETCTL,CPU retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.quad c15:0x120F0++0x01
line.quad 0x00 "CPUMERRSR,CPU Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--20. "C/W,CPUID/Way" "0,1,2,3,4,5,6,7"
newline
hexmask.quad.word 0x00 0.--11. 1. "RAD,RAM address"
group.long c15:0x0101++0x0
line.long 0x0 "ACTLR,Auxiliary Control Register"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
endif
if corename()=="CORTEXA57"
group.long c15:0x0201++0x00
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x0 28. "TRCDIS,Disable CP14 access to trace registers" "No,Yes"
newline
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 or higher,Reserved,Full"
elif corename()=="CORTEXA53"
group.long c15:0x201++0x00
line.long 0x0 "CPACR,Coprocessor Access Control Register"
bitfld.long 0x0 31. "ASEDIS,Disable Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x0 22.--23. "CP11,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
newline
bitfld.long 0x0 20.--21. "CP10,Coprocessor access control" "Denied,EL1 only,Reserved,Full"
endif
group.long c15:0x0011++0x0
line.long 0x00 "SCR,Secure Configuration Register"
bitfld.long 0x00 13. "TWE,Trap WFE Instructions" "Not trapped,Trapped"
bitfld.long 0x00 12. "TWI,Trap WFI Instructions" "Not trapped,Trapped"
newline
bitfld.long 0x00 9. "SIF,Secure Instruction Fetch" "Permitted,Not permitted"
bitfld.long 0x00 8. "HCE,Hypervisor Call enable" "No,Yes"
newline
bitfld.long 0x00 7. "SCD,Secure Monitor Call disable" "No,Yes"
bitfld.long 0x00 5. "AW,Controls whether the Non-secure world can modify the A-bit in the CPSR" "Not allowed,Allowed"
newline
bitfld.long 0x00 4. "FW,Controls whether the Non-secure world can modify the F-bit in the CPSR" "Not allowed,Allowed"
bitfld.long 0x00 3. "EA,External Abort  exceptions handled in Abort mode or Monitor mode" "Abort,Monitor"
newline
bitfld.long 0x00 2. "FIQ,FIQ exceptions handled in Abort mode or Monitor mode" "FIQ,Monitor"
bitfld.long 0x00 1. "IRQ,IRQ exceptions handled in Abort mode or Monitor mode" "IRQ,Monitor"
newline
bitfld.long 0x00 0. "NS,Secure mode " "Secure,Non-secure"
group.long c15:0x0111++0x00
line.long 0x00 "SDER,Secure Debug Enable Register"
bitfld.long 0x00 1. "SUNIDEN,Non-Invasive Secure User Debug Enable bit" "Denied,Permitted"
bitfld.long 0x00 0. "SUIDEN,Invasive Secure User Debug Enable bit" "Denied,Permitted"
group.long c15:0x0131++0x00
line.long 0x00 "SDCR,Secure Debug Control Register"
bitfld.long 0x00 21. "EPMAD,External debugger access to Performance Monitors registers disabled" "No,Yes"
bitfld.long 0x00 20. "EDAD,External debugger access to breakpoint and watchpoint registers disabled" "No,Yes"
newline
bitfld.long 0x00 17. "SPME,Secure performance monitors enable" "Disabled,Enabled"
bitfld.long 0x00 14.--15. "SPD,AArch32 secure privileged debug" "Legacy,Reserved,Disabled,Enabled"
group.long c15:0x0211++0x00
line.long 0x00 "NSACR,Non-Secure Access Control Register"
bitfld.long 0x00 15. "NSASEDIS,Disable Non-secure Advanced SIMD Extension functionality" "No,Yes"
bitfld.long 0x00 11. "CP11,Coprocessor 11 in the Non-secure World Access Permission" "Denied,Permitted"
newline
bitfld.long 0x00 10. "CP10,Coprocessor 10 in the Non-secure World Access Permission" "Denied,Permitted"
if corename()=="CORTEXA57"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
group.long c15:0x010C++0x00
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "VBA,Vector Base Address"
elif corename()=="CORTEXA53"
group.long c15:0x000C++0x00
line.long 0x00 "VBAR,Vector Base Address Register"
group.long c15:0x010C++0x00
line.long 0x00 "MVBAR,Monitor Vector Base Address Register"
endif
rgroup.long c15:0x001C++0x00
line.long 0x00 "ISR,Interrupt Status Register"
bitfld.long 0x00 8. "A,External abort pending flag" "Not pending,Pending"
bitfld.long 0x00 7. "I,Interrupt pending flag" "Not pending,Pending"
newline
bitfld.long 0x00 6. "F,Fast interrupt pending flag" "Not pending,Pending"
group.long c15:0x020C++0x00
line.long 0x00 "RMR,Reset Management Register"
bitfld.long 0x00 1. "RR,Reset Request" "Not requested,Requested"
bitfld.long 0x00 0. "AA64,Determines which execution state the processor boots into after a warm reset" "AArch32,AArch64"
group.long c15:0x0015++0x00
line.long 0x00 "ADFSR,Auxiliary Data Fault Status Register"
group.long c15:0x0115++0x00
line.long 0x00 "AIFSR,Auxiliary Instruction Fault Status Register"
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Async. external,Reserved,Reserved,Sync. external/on TTW/0th level,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Async. parity/on memory access,Reserved,Reserved,Sync. parity/on memory access/on TTW/0th level,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 15. "UA,Unattributable fault" "Attributable,Unattributable"
bitfld.long 0x00 14. "UC,Uncontainable fault" "Containable,Uncontainable"
newline
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/1st level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/1st level,Permission/1nd level,Sync. external/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
endif
elif corename()=="CORTEXA53"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Reserved,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX/STREX,?..."
else
group.long c15:0x0005++0x00
line.long 0x00 "DFSR,Data Fault Status Register"
bitfld.long 0x00 13. "CM,Cache maintenance fault" "Not aborted,Aborted"
bitfld.long 0x00 12. "EXT,External Abort Qualifier" "DECERR,SLVERR"
newline
bitfld.long 0x00 11. "WNR,Access Caused an Abort Type" "Read,Write"
bitfld.long 0x00 4.--7. "DOMAIN,Domain Accessed When a Data Fault Occurs" "D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/section,Instruction cache maintenance,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/1st level,Permission/section,Sync. external/2nd level,Permission/2nd level,TLB conflict,Reserved,Reserved,Reserved,Reserved,LDREX or STREX,Async. external,Reserved,Async. parity,Sync. parity,Reserved,Reserved,Sync. parity/1st level,Reserved,Sync. parity/2nd level,?..."
endif
endif
if corename()=="CORTEXA57"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Address size/1st level,Address size/2nd level,Address size/3rd level,Translation/0th level,Translation/1st level,Translation/2nd level,Translation/3rd level,Access flag/0th level,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Permission/0th level,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,?..."
else
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Alignment,Debug event,Access flag/1st level,Reserved,Translation/1st level,Access flag/2nd level,Translation/2nd level,Sync. external/non-translation,Domain/1st level,Reserved,Domain/2nd level,Sync. external/on TTW/1st level,Permission/1st level,Sync. external/on TTW/2nd level,Permission/2nd level,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
elif corename()=="CORTEXA53"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--5. "STATUS,Fault Status" "Address size/TTBR0/TTBR1,Reserved,Reserved,Reserved,Reserved,Translation/1st level,Translation/2nd level,Translation/3rd level,Reserved,Access flag/1st level,Access flag/2nd level,Access flag/3rd level,Reserved,Permission/1st level,Permission/2nd level,Permission/3rd level,Sync. external,Reserved,Reserved,Reserved,Reserved,Sync. external/on TTW/1st level,Sync. external/on TTW/2nd level,Sync. external/on TTW/3rd level,Sync. parity/on memory access,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access/on TTW/1st level,Sync. parity/on memory access/on TTW/2nd level,Sync. parity/on memory access/on TTW/3rd level,Reserved,Alignment,Debug event,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,TLB conflict,?..."
else
group.long c15:0x0105++0x00
line.long 0x00 "IFSR,Instruction Fault Status Register"
bitfld.long 0x00 12. "EXT,External Abort Type" "DECERR,SLVERR"
bitfld.long 0x00 9. "LPAE,Large physical address extension" "Disabled,Enabled"
newline
bitfld.long 0x00 0.--3. 10. "FS,Fault Status" "Reserved,Reserved,Debug event,Access flag/section,Reserved,Translation/section,Access flag/page,Translation/page,Sync. external/non-translation,Domain/section,Reserved,Domain/page,Sync. external/on TTW/1st level,Permission/section,Sync. external/on TTW/2nd level,Permission/page,TLB conflict,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Sync. parity/on memory access,Reserved,Reserved,Sync. parity/on TTW/1st level,Reserved,Sync. parity/on TTW/2nd level,?..."
endif
endif
group.long c15:0x0006++0x00
line.long 0x00 "DFAR,Data Fault Address Register"
group.long c15:0x0206++0x00
line.long 0x00 "IFAR,Instruction Fault Address Register"
if corename()=="CORTEXA57"
rgroup.long c15:0x103F++0x00
line.long 0x00 "CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
hexmask.long.word 0x00 0.--11. 1. "PERIPHBASE[42:32],Periphbase[42:32]"
elif corename()=="CORTEXA53"
rgroup.long c15:0x103F++0x00
line.long 0x00 "CBAR,Configuration Base Address Register"
hexmask.long.word 0x00 18.--31. 1. "PERIPHBASE[31:18],Periphbase[31:18]"
hexmask.long.byte 0x00 0.--7. 1. "PERIPHBASE[39:32],Periphbase[39:32]"
endif
group.long c15:0x000D++0x00
line.long 0x00 "FCSEIDR,FCSE Process ID register"
group.long c15:0x020D++0x00
line.long 0x00 "TPIDRURW,PL0 Read/Write Software Thread ID Register"
group.long c15:0x030D++0x00
line.long 0x00 "TPIDRURO,PL0 Read-Only Software Thread ID Register"
group.long c15:0x040D++0x00
line.long 0x00 "TPIDRPRW,PL1 Software Thread ID Register"
tree.end
tree "Memory Management Unit"
if corename()=="CORTEXA57"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 6. "THEE,ThumbEE Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
// MPIDR[31]==1 case is missing here for TTBR0 and TTBR1
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTB1,Translation table base address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base Registers"
hexmask.long 0x00 6.--31. 0x40 "TTBA,Translation table base address"
bitfld.long 0x00 5. "NOS,Not outer shareable bit" "Outer,Inner"
newline
bitfld.long 0x00 3.--4. "RGN,Region" "Normal,Outer Write-Back Write-Allocate Cacheable,Outer Write-Through Cacheable,Outer Write-Back no Write-Allocate Cacheable"
bitfld.long 0x00 2. "IMP,Implementation" "Low,High"
newline
bitfld.long 0x00 1. "S,Shareable" "Non-shareable,Shareable"
bitfld.long 0x00 0. "C,Cacheable" "Non-cacheable,Cacheable"
else
group.quad c15:0x10020++0x01
line.quad 0x00 "TTBR0,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad c15:0x11020++0x01
line.quad 0x00 "TTBR1,Translation Table Base Registers"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
endif
if (((per.l(c15:0x0202))&0x80000000)==0x00000000)
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
newline
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
else
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
newline
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
newline
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
newline
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Non-Shareable,Inner Shareable"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
endif
elif corename()=="CORTEXA53"
group.long c15:0x0001++0x0
line.long 0x0 "SCTLR,Control Register"
bitfld.long 0x0 30. "TE,T32 exception enable" "A32,T32"
bitfld.long 0x0 29. "AFE,Access Flag Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 28. "TRE,TEX remap enable" "Disabled,Enabled"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 20. "UWXN,Unprivileged write permission implies PL1 Execute Never" "Not forced,Forced"
bitfld.long 0x0 19. "WXN,Write permission implies PL1 Execute Never" "Not forced,Forced"
newline
bitfld.long 0x0 18. "NTWE,Not trap WFE" "No,Yes"
bitfld.long 0x0 16. "NTWI,Not trap WFI" "No,Yes"
newline
bitfld.long 0x0 13. "V,Base Location of Exception Registers" "0x00000000,0xFFFF0000"
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
newline
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
bitfld.long 0x0 6. "ITD,IT Disable" "No,Yes"
newline
bitfld.long 0x0 5. "CP15BEN,c15 barrier enable" "Disabled,Enabled"
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
newline
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
bitfld.long 0x0 0. "M,MMU or Protection Unit" "Disabled,Enabled"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.quad c15:0x10020++0x01
line.quad 0x00 "TTBR0,Translation Table Base Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.quad c15:0x11020++0x01
line.quad 0x00 "TTBR1,Translation Table Base Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "ASID,ASID for the translation table base address"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 28.--29. "SH1,Shareability attributes for the memory associated with the translation table walks using TTBR1" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 26.--27. "ORGN1,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
bitfld.long 0x00 24.--25. "IRGN1,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR1" "0,1,2,3"
newline
bitfld.long 0x00 23. "EPD1,Translation Walk Disable for TTBR1" "No,Yes"
bitfld.long 0x00 22. "A1,Select ASID from TTBR1 ASID field" "Selected,Not selected"
newline
bitfld.long 0x00 16.--18. "T1SZ,The Size offset of the TTBR1 addressed region" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
newline
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 7. "EPD0,Translation Walk Disable for TTBR0 region" "No,Yes"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
else
group.long c15:0x0002++0x00
line.long 0x00 "TTBR0,Translation Table Base Register 0"
hexmask.long 0x00 7.--31. 0x80 "TTB0,Translation table base 0 address"
bitfld.long 0x00 6. 0. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
group.long c15:0x0102++0x00
line.long 0x00 "TTBR1,Translation Table Base Register 1"
hexmask.long 0x00 7.--31. 0x80 "TTB1,Translation table base 1 address"
bitfld.long 0x00 0. 6. "IRGN,Inner region bits" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 5. "NOS,Not Outer Shareable bit" "Outer,Inner"
bitfld.long 0x00 3.--4. "RGN,RGN" "Non-cacheable,Write-Back Write-Allocate Cacheable,Write-Through Cacheable,Write-Back no Write-Allocate Cacheable"
newline
bitfld.long 0x00 1. "S,Shareable bit" "Non-shareable,Shareable"
group.long c15:0x0202++0x00
line.long 0x00 "TTBCR,Translation Table Base Control Register"
bitfld.long 0x00 31. "EAE,Extended Address Enable" "32-bit,40-bit"
bitfld.long 0x00 5. "PD1,Translation table walk disable for translations using TTBR1" "No,Yes"
newline
bitfld.long 0x00 4. "PD0,Translation table walk disable for translations using TTBR0" "No,Yes"
bitfld.long 0x00 0.--2. "N,Width of the base address held in TTBR0" "0,1,2,3,4,5,6,7"
endif
endif
if corename()=="CORTEXA57"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
elif corename()=="CORTEXA53"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
group.long c15:0x0003++0x00
line.long 0x00 "DACR,Domain Access Control Register"
bitfld.long 0x0 30.--31. "D15,Domain Access 15" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 28.--29. "D14,Domain Access 14" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 26.--27. "D13,Domain Access 13" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 24.--25. "D12,Domain Access 12" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 22.--23. "D11,Domain Access 11" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 20.--21. "D10,Domain Access 10" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 18.--19. "D9,Domain Access 9" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 16.--17. "D8,Domain Access 8" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 14.--15. "D7,Domain Access 7" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 12.--13. "D6,Domain Access 6" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 10.--11. "D5,Domain Access 5" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 8.--9. "D4,Domain Access 4" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 6.--7. "D3,Domain Access 3" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 4.--5. "D2,Domain Access 2" "Denied,Client,Reserved,Manager"
newline
bitfld.long 0x0 2.--3. "D1,Domain Access 1" "Denied,Client,Reserved,Manager"
bitfld.long 0x0 0.--1. "D0,Domain Access 0" "Denied,Client,Reserved,Manager"
if (((per.l(c15:0x202))&0x80000000)==0x80000000)
group.quad c15:0x10070++0x01
line.quad 0x00 "PAR,Physical Address Register"
else
group.long c15:0x0047++0x00
line.long 0x00 "PAR,Physical Address Register"
endif
tree.open "Memory Attribute Indirection Registers"
group.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
group.long c15:0x002A++0x00
line.long 0x00 "MAIR0,Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x012A++0x00
line.long 0x00 "MAIR1,Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x003A++0x00
line.long 0x00 "AMAIR0,Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x013A++0x00
line.long 0x00 "AMAIR1,Auxiliary Memory Attribute Indirection Register 1"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x002A++0x0
line.long 0x00 "PRRR,Primary Region Remap Register"
bitfld.long 0x00 31. "NOS7,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 30. "NOS6,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 29. "NOS5,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 28. "NOS4,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 27. "NOS3,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 26. "NOS2,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 25. "NOS1,Outer Shareable property mapping for memory attributes" "Outer,Inner"
bitfld.long 0x00 24. "NOS0,Outer Shareable property mapping for memory attributes" "Outer,Inner"
newline
bitfld.long 0x00 19. "NS1,Shareable Attribute Remap when S=1 for Normal Regions" "Remapped,Not remapped"
bitfld.long 0x00 18. "NS0,Shareable Attribute Remap when S=0 for Normal Regions" "Not remapped,Remapped"
newline
bitfld.long 0x00 17. "DS1,Shareable Attribute Remap when S=1 for Device regions" "Remapped,Not remapped"
bitfld.long 0x00 16. "DS0,Shareable Attribute Remap when S=0 for Device regions" "Not remapped,Remapped"
newline
bitfld.long 0x00 14.--15. "TR7,{TEX[0] C B} = b111 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 12.--13. "TR6,{TEX[0] C B} = b110 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 10.--11. "TR5,{TEX[0] C B} = b101 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 8.--9. "TR4,{TEX[0] C B} = b100 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 6.--7. "TR3,{TEX[0] C B} = b011 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 4.--5. "TR2,{TEX[0] C B} = b010 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
newline
bitfld.long 0x00 2.--3. "TR1,{TEX[0] C B} = b001 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
bitfld.long 0x00 0.--1. "TR0,{TEX[0] C B} = b000 Remap" "Device-nGnRnE,Device-nGnRE,Normal,?..."
group.long c15:0x012A++0x0
line.long 0x00 "NMRR,Normal Memory Remap Register"
bitfld.long 0x00 30.--31. "OR7,Outer Attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 28.--29. "OR6,Outer Attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 26.--27. "OR5,Outer Attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 24.--25. "OR4,Outer Attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 22.--23. "OR3,Outer Attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 20.--21. "OR2,Outer Attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 18.--19. "OR1,Outer Attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 16.--17. "OR0,Outer Attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 14.--15. "IR7,Inner attribute for {TEX[0] C B} = b111 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 12.--13. "IR6,Inner attribute for {TEX[0] C B} = b110 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 10.--11. "IR5,Inner attribute for {TEX[0] C B} = b101 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 8.--9. "IR4,Inner attribute for {TEX[0] C B} = b100 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 6.--7. "IR3,Inner attribute for {TEX[0] C B} = b011 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 4.--5. "IR2,Inner attribute for {TEX[0] C B} = b010 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
bitfld.long 0x00 2.--3. "IR1,Inner attribute for {TEX[0] C B} = b001 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
bitfld.long 0x00 0.--1. "IR0,Inner attribute for {TEX[0] C B} = b000 Remap" "Noncacheable,Write-back allocate,Write-through,Write-back no allocate"
newline
endif
tree.end
newline
if (((per.l(c15:0x202))&0x80000000)==0x00000000)
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
else
group.long c15:0x10d++0x00
line.long 0x00 "CONTEXTIDR,Context ID Register"
hexmask.long.tbyte 0x00 8.--31. 1. "PROCID,Process identifier"
hexmask.long.byte 0x00 0.--7. 1. "ASID,Address space identifier"
endif
tree.end
tree "Virtualization Extensions"
group.long c15:0x4000++0x0
line.long 0x00 "VPIDR,Virtualization Processor ID Register"
group.long c15:0x4500++0x00
line.long 0x00 "VMPIDR,Virtualization Multiprocessor ID Register"
group.long c15:0x420D++0x00
line.long 0x00 "HTPIDR,Hypervisor Software Thread ID Register"
group.long c15:0x4001++0x0
line.long 0x00 "HSCTLR,System Control Register"
bitfld.long 0x0 30. "TE,Thumb exception enable" "ARM,Thumb"
bitfld.long 0x0 25. "EE,Exception endianness" "Little,Big"
newline
bitfld.long 0x0 21. "FI,Fast Interrupts configuration enable" "Disabled,Enabled"
bitfld.long 0x0 19. "WXN,Write permission implies XN" "Not forced,Forced"
newline
bitfld.long 0x0 12. "I,Instruction Cache Enable" "Disabled,Enabled"
bitfld.long 0x0 8. "SED,SETEND Disable" "No,Yes"
newline
bitfld.long 0x0 7. "ITD,IT Disable" "No,Yes"
bitfld.long 0x0 5. "CP15BEN,CP15 barrier enable" "Disabled,Enabled"
newline
bitfld.long 0x0 2. "C,Enable unified cache or data cache" "Disabled,Enabled"
bitfld.long 0x0 1. "A,Strict Alignment" "Disabled,Enabled"
newline
bitfld.long 0x0 0. "M,Enable address translation" "Disabled,Enabled"
group.long c15:0x4101++0x00
line.long 0x00 "HACTLR,Hypervisor Auxiliary Control Register"
bitfld.long 0x00 6. "L2ACTLRAC,L2ACTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 5. "L2ECTLRAC,L2ECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "L2CTLRAC,L2CTLR write access control" "Disabled,Enabled"
bitfld.long 0x00 1. "CPUECTLRAC,CPUECTLR write access control" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "CPUACTLRAC,CPUACTLR write access control" "Disabled,Enabled"
if corename()=="CORTEXA57"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
newline
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
newline
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
newline
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "Not aborted,Aborted"
newline
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "Not routed,Routed"
newline
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "Not routed,Routed"
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
elif corename()=="CORTEXA53"
group.long c15:0x4011++0x00
line.long 0x00 "HCR,Hypervisor Configuration Register"
bitfld.long 0x00 30. "TRVM,Trap Read of Virtual Memory controls" "Disabled,Enabled"
bitfld.long 0x00 29. "HCD,Hypervisor Call Disable" "No,Yes"
newline
bitfld.long 0x00 27. "TGE,Trap General Exceptions" "Disabled,Enabled"
bitfld.long 0x00 26. "TVM,Trap Virtual Memory Controls" "Disabled,Enabled"
newline
bitfld.long 0x00 25. "TTLB,Trap TLB maintenance instructions" "Disabled,Enabled"
bitfld.long 0x00 24. "TPU,Trap Cache maintenance instructions to point of unification" "Disabled,Enabled"
newline
bitfld.long 0x00 23. "TPC,Trap Data/Unified cache maintenance instructions to point of coherency" "Disabled,Enabled"
bitfld.long 0x00 22. "TSW,Trap Data/Unified cache Set/Way instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "TAC,Trap Auxiliary Control Register Accesses" "Disabled,Enabled"
bitfld.long 0x00 20. "TIDCP,Trap Lockdown" "Disabled,Enabled"
newline
bitfld.long 0x00 19. "TSC,Trap SMC" "Disabled,Enabled"
bitfld.long 0x00 18. "TID3,Trap ID Group 3" "Disabled,Enabled"
newline
bitfld.long 0x00 17. "TID2,Trap ID Group 2" "Disabled,Enabled"
bitfld.long 0x00 16. "TID1,Trap ID Group 1" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "TID0,Trap ID Group 0" "Disabled,Enabled"
bitfld.long 0x00 14. "TWE,Trap WFE" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "TWI,Trap WFI" "Disabled,Enabled"
bitfld.long 0x00 12. "DC,Default Cacheable" "Disabled,Enabled"
newline
bitfld.long 0x00 10.--11. "BSU,Barrier Shareability Upgrade" "0,1,2,3"
bitfld.long 0x00 9. "FB,Force Broadcast of TLB maintenance BPIALL and ICIALLU instructions" "Disabled,Enabled"
newline
bitfld.long 0x00 8. "VA,Virtual External Asynchronous Abort" "No aborted,Aborted"
bitfld.long 0x00 7. "VI,Virtual IRQ interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x00 6. "VF,Virtual FIQ interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 5. "AMO,A-bit Mask Override" "No override,Override"
newline
bitfld.long 0x00 4. "IMO,I-bit Mask Override" "No override,Override"
bitfld.long 0x00 3. "FMO,F-bit Mask Override" "No override,Override"
newline
bitfld.long 0x00 2. "PTW,Protected Table Walk" "Disabled,Enabled"
bitfld.long 0x00 1. "SWIO,Set/Way Invalidation Override" "No override,Override"
newline
bitfld.long 0x00 0. "VM,Second Stage of Translation Enable" "Disabled,Enabled"
endif
group.long c15:0x4411++0x00
line.long 0x00 "HCR2,Hypervisor Configuration Register 2"
bitfld.long 0x00 1. "ID,Stage 2 Instruction cache disable" "No,Yes"
bitfld.long 0x00 0. "CD,Stage 2 Data cache disable" "No,Yes"
group.long c15:0x4111++0x00
line.long 0x00 "HDCR,Hypervisor Debug Control Register"
bitfld.long 0x00 11. "TDRA,Trap Debug ROM Access" "No effect,Valid"
bitfld.long 0x00 10. "TDOSA,Trap Debug OS-related register Access" "No effect,Valid"
newline
bitfld.long 0x00 9. "TDA,Trap Debug Access" "No effect,Valid"
bitfld.long 0x00 8. "TDE,Trap Debug Exceptions" "No effect,Valid"
newline
bitfld.long 0x00 7. "HPME,Hypervisor Performance Monitors Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "TPM,Trap Performance Monitors accesses" "No effect,Valid"
newline
bitfld.long 0x00 5. "TPMCR,Trap Performance Monitor Control Register accesses" "No effect,Valid"
bitfld.long 0x00 0.--4. "HPMN,Defines the number of Performance Monitors counters" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long c15:0x4211++0x00
line.long 0x00 "HCPTR,Hypervisor Architectural Feature Trap Register"
bitfld.long 0x0 31. "TCPAC,Trap Coprocessor Access Control" "Not trapped,Trapped"
bitfld.long 0x0 20. "TTA,Trap Trace Access" "Not trapped,?..."
newline
bitfld.long 0x0 15. "TASE,Trap Advanced SIMD extensions" "Not trapped,Trapped"
bitfld.long 0x0 11. "TCP11,Trap coprocessor 11" "Not trapped,Trapped"
newline
bitfld.long 0x0 10. "TCP10,Trap coprocessor 10" "Not trapped,Trapped"
group.long c15:0x4311++0x00
line.long 0x00 "HSTR,Hypervisor System Trap Register"
bitfld.long 0x00 16. "TTEE,Trap ThumbEE" "Disabled,Enabled"
bitfld.long 0x00 15. "T15,Trap to Hypervisor mode Non-secure priv 15" "Reserved,?..."
newline
hexmask.long.word 0x00 5.--13. 1. "T4_15,Trap to Hypervisor mode Non-secure priv 5 - 13"
bitfld.long 0x00 0.--3. "T0_13,Trap to Hypervisor mode Non-secure priv 0 - 3," "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x4711++0x00
line.long 0x00 "HACR,Hypervisor Auxiliary Configuration Register"
if corename()=="CORTEXA57"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
hexmask.quad 0x00 0.--47. 1. "BADDR,Translation table base address"
elif corename()=="CORTEXA53"
group.quad c15:0x14020++0x01
line.quad 0x00 "HTTBR,Hypervisor Translation Table Base Register"
endif
group.long c15:0x4202++0x00
line.long 0x00 "HTCR,Hypervisor Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "Non-Shareable,Reserved,Outer Shareable,Inner Shareable"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks using TTBR0/HTTBR" "0,1,2,3"
bitfld.long 0x00 0.--2. "T0SZ,The Size offset of the TTBR0/HTTBR addressed region" "0,1,2,3,4,5,6,7"
group.quad c15:0x16020++0x01
line.quad 0x00 "VTTBR,Virtualization Translation Table Base Register"
group.long c15:0x4212++0x00
line.long 0x00 "VTCR,Virtualization Translation Control Register"
bitfld.long 0x00 12.--13. "SH0,Shareability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
bitfld.long 0x00 10.--11. "ORGN0,Outer Cacheability attributes for the memory associated with the translation table walks using VTTBR" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. "IRGN0,Inner Cacheability attributes for the memory associated with the translation table walks VTTBR" "0,1,2,3"
bitfld.long 0x00 6.--7. "SL0,Starting Level for VTCR addressed region" "0,1,2,3"
newline
bitfld.long 0x00 4. "S,Sign-extension of the T0SZ field" "Low,High"
bitfld.long 0x00 0.--3. "T0SZ,The Size offset of the VTCR addressed region" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long c15:0x4015++0x00
line.long 0x00 "HADFSR,Hypervisor Auxiliary Data Fault Status Syndrome Register"
group.long c15:0x4115++0x00
line.long 0x00 "HAIFSR,Hypervisor Auxiliary Instruction Fault Status Syndrome Register"
group.long c15:0x4006++0x00
line.long 0x00 "HDFAR,Hypervisor Data Fault Address Register"
group.long c15:0x4025++0x00
line.long 0x00 "HSR,Hypervisor Syndrome Register"
bitfld.long 0x00 26.--31. "EC,Exception class" "Unknown reason,Trapped WFI/WFE,Reserved,Trapped MCR/MRC to c15,Trapped MCRR/MRRC to c15,Trapped MCR/MRC to CP14,Trapped LDC/STC to CP14,Trapped Coprocessor Usage,Trapped MRC,Trapped Jazelle instruction,Trapped BXJ,Reserved,Trapped MRRC,Reserved,Reserved,Reserved,Reserved,SVC,HVC,Trapped SMC,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Entry into Hypervisor mode Instruction Abort,Executing within Hypervisor mode Instruction Abort,Reserved,Reserved,Entry into Hypervisor mode Data Abort,Executing within Hypervisor mode Data Abort,?..."
bitfld.long 0x00 25. "IL,Instruction length" "16-bit,32-bit"
newline
hexmask.long 0x00 0.--24. 1. "ISS,Instruction specific syndrome"
group.long c15:0x4206++0x00
line.long 0x00 "HIFAR,Hypervisor Instruction Fault Address Register"
group.long c15:0x4406++0x00
line.long 0x00 "HPFAR,Hypervisor IPA Fault Address Register"
hexmask.long 0x00 4.--31. 1. "FIPA[39:12],Bits [39:12] of the faulting intermediate physical address"
tree.open "Hypervisor Memory Attribute Indirection Registers"
group.long c15:0x402A++0x00
line.long 0x00 "HMAIR0,Hypervisor Memory Attribute Indirection Register 0"
bitfld.long 0x00 28.--31. "ATTR3H,Attribute 3 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR3L,Attribute 3 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR2H,Attribute 2 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR2L,Attribute 2 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR1H,Attribute 1 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR1L,Attribute 1 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR0H,Attribute 0 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR0L,Attribute 0 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x412A++0x00
line.long 0x00 "HMAIR1,Hypervisor Memory Attribute Indirection Register 1"
bitfld.long 0x00 28.--31. "ATTR7H,Attribute 7 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 24.--27. "ATTR7L,Attribute 7 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 20.--23. "ATTR6H,Attribute 6 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 16.--19. "ATTR6L,Attribute 6 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 12.--15. "ATTR5H,Attribute 5 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 8.--11. "ATTR5L,Attribute 5 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
newline
bitfld.long 0x00 4.--7. "ATTR4H,Attribute 4 High" "Device memory,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Write-through transient,Normal Memory/Outer Non-Cacheable,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-back transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-through non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient,Normal Memory/Outer Write-back non-transient"
bitfld.long 0x00 0.--3. "ATTR4L,Attribute 4 Low (Device mem/Normal mem)" "Device-nGnRnE/---,---/Inner Write-through transient,---/Inner Write-through transient,---/Inner Write-through transient,Device-nGnRE/Inner Non-Cacheable,---/Inner Write-back transient,---/Inner Write-back transient,---/Inner Write-back transient,Device-nGRE memory/Inner Write-through,---/Inner Write-through non-transient,---/Inner Write-through non-transient,---/Inner Write-through non-transient,Device-GRE memory/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient,---/Inner Write-back non-transient"
group.long c15:0x403A++0x00
line.long 0x00 "HAMAIR0,Hypervisor Auxiliary Memory Attribute Indirection Register 0"
group.long c15:0x413A++0x00
line.long 0x00 "HAMAIR1,Hypervisor Auxiliary Memory Attribute Indirection Register 1"
tree.end
newline
group.long c15:0x400C++0x00
line.long 0x00 "HVBAR,Hypervisor Vector Base Address Register"
hexmask.long 0x00 5.--31. 0x20 "HVBADDR,Hypervisor Vector Base Address"
tree.end
tree "Cache Control and Configuration"
rgroup.long c15:0x0100++0x0
line.long 0x0 "CTR,Cache Type Register"
bitfld.long 0x0 24.--27. "CWG,Cache writeback granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 20.--23. "ERG,Exclusives reservation granule size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
newline
bitfld.long 0x0 16.--19. "DMINLINE,Smallest data cache line size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
bitfld.long 0x0 14.--15. "L1POLICY,L1 Instruction cache policy" "Reserved,Reserved,VIPT,PIPT"
newline
bitfld.long 0x0 0.--3. "IMINLINE,I-Cache Minimum Line Size" "Reserved,Reserved,Reserved,Reserved,16 words,?..."
if corename()=="CORTEXA57"
rgroup.long c15:0x1100++0x0
line.long 0x0 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,Reserved,Level 3,?..."
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 2,?..."
newline
bitfld.long 0x00 18.--20. "CTYPE7,Cache type for levels 7" "No cache,?..."
bitfld.long 0x00 15.--17. "CTYPE6,Cache type for levels 6" "No cache,?..."
bitfld.long 0x00 12.--14. "CTYPE5,Cache type for levels 5" "No cache,?..."
newline
bitfld.long 0x00 9.--11. "CTYPE4,Cache type for levels 4" "No cache,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "Reserved,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
elif corename()=="CORTEXA53"
rgroup.long c15:0x1100++0x0
line.long 0x0 "CLIDR,Cache Level ID Register"
bitfld.long 0x00 30.--31. "ICB,Inner cache boundary" "Not disclosed,?..."
bitfld.long 0x00 27.--29. "LOUU,Level of Unification Uniprocessor" "Reserved,Level 1,?..."
bitfld.long 0x00 24.--26. "LOC,Level of Coherency" "Reserved,L1,L1/L2,?..."
newline
bitfld.long 0x00 21.--23. "LOUIS,Level of Unification Inner Shareable" "Reserved,Level 1,?..."
bitfld.long 0x00 6.--8. "CTYPE3,Cache type for levels 3" "No cache,?..."
bitfld.long 0x00 3.--5. "CTYPE2,Cache type for levels 2" "No cache,Reserved,Reserved,Reserved,Unified,?..."
newline
bitfld.long 0x00 0.--2. "CTYPE1,Cache type for levels 1" "Reserved,Reserved,Reserved,Separate Inst/Data,?..."
endif
rgroup.long c15:0x1700++0x0
line.long 0x00 "AIDR,Auxiliary ID Register"
rgroup.long c15:0x1000++0x0
line.long 0x0 "CCSIDR,Current Cache Size ID Register"
bitfld.long 0x00 31. "WT,Write-Through" "Not Supported,Supported"
bitfld.long 0x00 30. "WB,Write-Back" "Not Supported,Supported"
newline
bitfld.long 0x00 29. "RA,Read-Allocate" "Not Supported,Supported"
bitfld.long 0x00 28. "WA,Write-Allocate" "Not Supported,Supported"
newline
hexmask.long.word 0x00 13.--27. 1. "SETS,Number of Sets"
hexmask.long.word 0x00 3.--12. 1. "ASSOC,Associativity"
newline
bitfld.long 0x00 0.--2. "LSIZE,Line Size" "16 bytes,32 bytes,64 bytes,128 bytes,?..."
group.long c15:0x2000++0x0
line.long 0x0 "CSSELR,Cache Size Selection Register"
bitfld.long 0x00 1.--3. "LEVEL,Cache level of required cache" "Level 1,Level 2,?..."
bitfld.long 0x00 0. "IND,Instruction/Not Data" "Data/Unified,Instruction"
tree "Level 1 memory system"
if corename()=="CORTEXA57"
group.long c15:0x001F++0x00
line.long 0x00 "DL1DATA0,Data L1 Data 0 Register"
group.long c15:0x011F++0x00
line.long 0x00 "DL1DATA1,Data L1 Data 1 Register"
group.long c15:0x021F++0x00
line.long 0x00 "DL1DATA2,Data L1 Data 2 Register"
group.long c15:0x031F++0x00
line.long 0x00 "DL1DATA3,Data L1 Data 3 Register"
group.long c15:0x000F++0x00
line.long 0x00 "IL1DATA0,Instruction L1 Data 0 Register"
group.long c15:0x010F++0x00
line.long 0x00 "IL1DATA1,Instruction L1 Data 1 Register"
group.long c15:0x020F++0x00
line.long 0x00 "IL1DATA2,Instruction L1 Data 2 Register"
group.long c15:0x030F++0x00
line.long 0x00 "IL1DATA3,Instruction L1 Data 3 Register"
wgroup.long c15:0x04F++0x00
line.long 0x00 "RAMINDEX,RAM Index Operation Register"
elif corename()=="CORTEXA53"
rgroup.long c15:0x300F++0x00
line.long 0x00 "CDBGDR0,Cache Debug Data Register 0"
rgroup.long c15:0x310F++0x00
line.long 0x00 "CDBGDR1,Cache Debug Data Register 1"
rgroup.long c15:0x320F++0x00
line.long 0x00 "CDBGDR2,Cache Debug Data Register 2"
rgroup.long c15:0x330F++0x00
line.long 0x00 "CDBGDR3,Cache Debug Data Register 3"
wgroup.long c15:0x302F++0x00
line.long 0x00 "CDBGDCT,Cache Debug Data Cache Tag Read Operation Register"
wgroup.long c15:0x312F++0x00
line.long 0x00 "CDBGICT,Cache Debug Instruction Cache Tag Read Operation Register"
wgroup.long c15:0x304F++0x00
line.long 0x00 "CDBGDCD,Cache Debug Cache Debug Data Cache Data Read Operation Register"
wgroup.long c15:0x314F++0x00
line.long 0x00 "CDBGICD,Cache Debug Instruction Cache Data Read Operation Register"
wgroup.long c15:0x324F++0x00
line.long 0x00 "CDBGTD,Cache Debug TLB Data Read Operation Register"
endif
tree.end
tree "Level 2 memory system"
if corename()=="CORTEXA57"
group.long c15:0x1209++0x0
line.long 0x00 "L2CTLR,L2 Control Register"
bitfld.long 0x00 31. "L2RSTDM,L2RSTDISABLE monitor" "No,Yes"
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
newline
rbitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Not supported,Supported"
bitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
newline
bitfld.long 0x00 20. "DIECCE,Data in-line ECC enable" "Disabled,Enabled"
rbitfld.long 0x00 13. "L2AS,L2 arbitration slice" "Not present,Present"
newline
rbitfld.long 0x00 12. "L2TRAMS,L2 Tag RAM slice" "Not present,Present"
rbitfld.long 0x00 10.--11. "L2DRAMS,L2 Data RAM slice" "Not present,1,2,Present"
newline
bitfld.long 0x00 9. "L2TRAMS,L2 Tag RAM setup" "0 cycle,1 cycle"
bitfld.long 0x00 6.--8. "L2TRAML,L2 Tag RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,5 cycles,5 cycles,5 cycles"
newline
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "0 cycle,1 cycle"
bitfld.long 0x00 0.--2. "DRAML,L2 data RAM latency" "2 cycles,2 cycles,3 cycles,4 cycles,5 cycles,6 cycles,7 cycles,8 cycles"
group.long c15:0x1309++0x0
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
newline
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.long c15:0x100F++0x00
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
bitfld.long 0x00 28. "FL2TBCEA,Force L2 tag bank clock enable active" "Disabled,Enabled"
bitfld.long 0x00 27. "FL2LCEA,Force L2 logic clock enable active" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "FL2GICRCGEA,Forces L2, GIC CPU interface, and Timer Regional Clock Gate(RCG) enables active" "Not forced,Forced"
bitfld.long 0x00 25. "ESIAA,Enables single issue across all tag banks when the L2 arbitration replay threshold is reached" "Disabled,Enabled"
newline
bitfld.long 0x00 23. "DPRFRUT,Disables prefetch requests from ReadUnique transactions" "No,Yes"
bitfld.long 0x00 22. "DDTLSPR,Disable dynamic throttling of load/store prefetch requests" "No,Yes"
newline
bitfld.long 0x00 20.--21. "DTL2PRFEQOC,Disable throttling of L2 prefetch requests based on Fill/Evict Queue(FEQ) occupancy count" "12,10,8,Disabled"
bitfld.long 0x00 18.--19. "DLASQ,Disable limit on NC/SO/Dev stores in Address Sequence Queue" "12 entries,10 entries,8 entries,No limit"
newline
bitfld.long 0x00 17. "DL2RRA,Disable L2 round-robin arbitration that only clocks through paths with an active requestor waiting to be arbitrated" "No,Yes"
bitfld.long 0x00 16. "ERTSI,Enable replay threshold single issue" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "DFFD,Disable fast forwarding of data from ACE or CHI to LS and IF" "No,Yes"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 13. "DCEO,Disable clean evict optimization" "No,Yes"
bitfld.long 0x00 11. "DDSB,Disable DSB with no DVM synchronization" "No,Yes"
newline
bitfld.long 0x00 10. "DNSDAR,Disable Non-secure debug array read" "No,Yes"
bitfld.long 0x00 8. "DDVMCMOMB,Disable DVM and cache maintenance operation message broadcast" "No,Yes"
newline
bitfld.long 0x00 7. "EHDT,Enable hazard detect timeout" "Disabled,Enabled"
bitfld.long 0x00 6. "DACESCHIST,Disable ACE shareable or CHI snoopable transactions from master" "No,Yes"
newline
bitfld.long 0x00 4. "DWUWLUTFM,Disable WriteUnique and WriteLineUnique transactions from master" "Disabled,Enabled"
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
newline
bitfld.long 0x00 2. "LTORPTB,Limit to one request per tag bank" "Normal,Limited"
bitfld.long 0x00 1. "EARTT,Enable arbitration replay threshold timeout" "Disabled,Enabled"
newline
bitfld.long 0x00 0. "DHPF,Disable hardware prefetch forwarding" "No,Yes"
group.quad c15:0x130F0++0x01
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.tbyte 0x00 0.--17. 1. "IND,Index"
elif corename()=="CORTEXA53"
group.long c15:0x1209++0x0
line.long 0x00 "L2CTLR,L2 Control Register"
bitfld.long 0x00 24.--25. "NCPU, Number of CPU" "1,2,3,4"
bitfld.long 0x00 22. "CPUCP,CPU Cache Protection" "Disabled,Enabled"
newline
rbitfld.long 0x00 21. "SCUL2CP,SCU-L2 Cache Protection" "Disabled,Enabled"
rbitfld.long 0x00 5. "DRAMIL,L2 data RAM input latency" "1 cycle,2 cycle"
newline
rbitfld.long 0x00 0. "DRAMOL,L2 data RAM output latency" "2 cycles,3 cycles"
group.long c15:0x1309++0x0
line.long 0x00 "L2ECTLR,L2 Extended Control Register"
bitfld.long 0x00 30. "L2INTASYNCERR,L2 internal asynchronous error" "No error,Error"
bitfld.long 0x00 29. "AXIASYNCERR,AXI asynchronous error" "No error,Error"
newline
bitfld.long 0x00 0.--2. "L2DRC,L2 dynamic retention control" "Disabled,2 ticks,8 ticks,32 ticks,64 ticks,128 ticks,256 ticks,512 ticks"
group.long c15:0x100F++0x00
line.long 0x00 "L2ACTLR,L2 Auxiliary Control Register"
bitfld.long 0x00 30.--31. "L2VC,L2 victim Control" "0,1,2,3"
bitfld.long 0x00 14. "EUCE,Enables UniqueClean evictions with data" "Disabled,Enabled"
newline
bitfld.long 0x00 3. "DCEPTE,Disables clean/evict push to external" "No,Yes"
group.quad c15:0x110F0++0x01
line.quad 0x00 "L2MERRSR,L2 Memory Error Syndrome Register"
bitfld.quad 0x00 63. "FATAL,Fatal bit" "0,1"
hexmask.quad.byte 0x00 40.--47. 1. "OEC,Other error count"
newline
hexmask.quad.byte 0x00 32.--39. 1. "REC,Repeat error count"
bitfld.quad 0x00 31. "VALID,Valid bit" "Not valid,Valid"
newline
hexmask.quad.byte 0x00 24.--30. 1. "RAMID,RAM Identifier"
bitfld.quad 0x00 18.--21. "C/W,CPUID/Way" "CPU0 tag way 0,CPU0 tag way 1,CPU1 tag way 0,CPU1 tag way 1,CPU2 tag way 0,CPU2 tag way 1,CPU3 tag way 0,CPU3 tag way 1,?..."
newline
hexmask.quad.word 0x00 3.--16. 1. "RAD,RAM index address"
endif
tree.end
tree.end
tree "System Performance Monitor"
group.long c15:0xc9++0x00
line.long 0x0 "PMCR,Performance Monitor Control Register"
hexmask.long.byte 0x00 24.--31. 1. "IMP,Implementer code"
hexmask.long.byte 0x00 16.--23. 1. "IDCODE,Identification code"
rbitfld.long 0x00 11.--15. "N,Number of counters implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 6. "LC,Long cycle count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. "DP,Disable CCNT when prohibited" "No,Yes"
bitfld.long 0x00 4. "X,Export Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "D,Clock Divider" "Every cycle,64th cycle"
bitfld.long 0x00 2. "C,Clock Counter Reset" "No reset,Reset"
newline
bitfld.long 0x00 1. "P,Performance Counter Reset" "No reset,Reset"
bitfld.long 0x00 0. "E,All Counters Enable" "Disabled,Enabled"
newline
group.long c15:0x1c9++0x00
line.long 0x00 "PMNCNTENSET,Count Enable Set Register "
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00 30. "P30,Event Counter 30 enable bit" "Disabled,Enabled"
bitfld.long 0x00 29. "P29,Event Counter 29 enable bit" "Disabled,Enabled"
bitfld.long 0x00 28. "P28,Event Counter 28 enable bit" "Disabled,Enabled"
bitfld.long 0x00 27. "P27,Event Counter 27 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "P26,Event Counter 26 enable bit" "Disabled,Enabled"
bitfld.long 0x00 25. "P25,Event Counter 25 enable bit" "Disabled,Enabled"
bitfld.long 0x00 24. "P24,Event Counter 24 enable bit" "Disabled,Enabled"
bitfld.long 0x00 23. "P23,Event Counter 23 enable bit" "Disabled,Enabled"
bitfld.long 0x00 22. "P22,Event Counter 22 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "P21,Event Counter 21 enable bit" "Disabled,Enabled"
bitfld.long 0x00 20. "P20,Event Counter 20 enable bit" "Disabled,Enabled"
bitfld.long 0x00 19. "P19,Event Counter 19 enable bit" "Disabled,Enabled"
bitfld.long 0x00 18. "P18,Event Counter 18 enable bit" "Disabled,Enabled"
bitfld.long 0x00 17. "P17,Event Counter 17 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "P16,Event Counter 16 enable bit" "Disabled,Enabled"
bitfld.long 0x00 15. "P15,Event Counter 15 enable bit" "Disabled,Enabled"
bitfld.long 0x00 14. "P14,Event Counter 14 enable bit" "Disabled,Enabled"
bitfld.long 0x00 13. "P13,Event Counter 13 enable bit" "Disabled,Enabled"
bitfld.long 0x00 12. "P12,Event Counter 12 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "P11,Event Counter 11 enable bit" "Disabled,Enabled"
bitfld.long 0x00 10. "P10,Event Counter 10 enable bit" "Disabled,Enabled"
bitfld.long 0x00 9. "P9,Event Counter 9 enable bit" "Disabled,Enabled"
bitfld.long 0x00 8. "P8,Event Counter 8 enable bit" "Disabled,Enabled"
bitfld.long 0x00 7. "P7,Event Counter 7 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "P6,Event Counter 6 enable bit" "Disabled,Enabled"
bitfld.long 0x00 5. "P5,Event Counter 5 enable bit" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,Event Counter 4 enable bit" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,Event Counter 3 enable bit" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,Event Counter 2 enable bit" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "P1,Event Counter 1 enable bit" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,Event Counter 0 enable bit" "Disabled,Enabled"
group.long c15:0x2c9++0x00
line.long 0x00 "PMCNTENCLR,Count Enable Clear Register"
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00 30. "P30,Event Counter 30 clear bit" "Disabled,Enabled"
eventfld.long 0x00 29. "P29,Event Counter 29 clear bit " "Disabled,Enabled"
eventfld.long 0x00 28. "P28,Event Counter 28 clear bit " "Disabled,Enabled"
eventfld.long 0x00 27. "P27,Event Counter 27 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 26. "P26,Event Counter 26 clear bit " "Disabled,Enabled"
eventfld.long 0x00 25. "P25,Event Counter 25 clear bit " "Disabled,Enabled"
eventfld.long 0x00 24. "P24,Event Counter 24 clear bit " "Disabled,Enabled"
eventfld.long 0x00 23. "P23,Event Counter 23 clear bit " "Disabled,Enabled"
eventfld.long 0x00 22. "P22,Event Counter 22 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 21. "P21,Event Counter 21 clear bit " "Disabled,Enabled"
eventfld.long 0x00 20. "P20,Event Counter 20 clear bit " "Disabled,Enabled"
eventfld.long 0x00 19. "P19,Event Counter 19 clear bit " "Disabled,Enabled"
eventfld.long 0x00 18. "P18,Event Counter 18 clear bit " "Disabled,Enabled"
eventfld.long 0x00 17. "P17,Event Counter 17 clear bit " "Disabled,Enabled"
newline
eventfld.long 0x00 16. "P16,Event Counter 16 clear bit " "Disabled,Enabled"
eventfld.long 0x00 15. "P15,Event Counter 15 clear bit" "Disabled,Enabled"
eventfld.long 0x00 14. "P14,Event Counter 14 clear bit" "Disabled,Enabled"
eventfld.long 0x00 13. "P13,Event Counter 13 clear bit" "Disabled,Enabled"
eventfld.long 0x00 12. "P12,Event Counter 12 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 11. "P11,Event Counter 11 clear bit" "Disabled,Enabled"
eventfld.long 0x00 10. "P10,Event Counter 10 clear bit" "Disabled,Enabled"
eventfld.long 0x00 9. "P9,Event Counter 9 clear bit" "Disabled,Enabled"
eventfld.long 0x00 8. "P8,Event Counter 8 clear bit" "Disabled,Enabled"
eventfld.long 0x00 7. "P7,Event Counter 7 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 6. "P6,Event Counter 6 clear bit" "Disabled,Enabled"
eventfld.long 0x00 5. "P5,Event Counter 5 clear bit" "Disabled,Enabled"
eventfld.long 0x00 4. "P4,Event Counter 4 clear bit" "Disabled,Enabled"
eventfld.long 0x00 3. "P3,Event Counter 3 clear bit" "Disabled,Enabled"
eventfld.long 0x00 2. "P2,Event Counter 2 clear bit" "Disabled,Enabled"
newline
eventfld.long 0x00 1. "P1,Event Counter 1 clear bit" "Disabled,Enabled"
eventfld.long 0x00 0. "P0,Event Counter 0 clear bit" "Disabled,Enabled"
group.long c15:0x3c9++0x00
line.long 0x00 "PMOVSR,Performance Monitor Overflow Status Register"
eventfld.long 0x00 31. "C,PMCCNTR overflow" "No overflow,Overflow"
eventfld.long 0x00 30. "P30,PMN30 overflow" "No overflow,Overflow"
eventfld.long 0x00 29. "P29,PMN29 overflow" "No overflow,Overflow"
eventfld.long 0x00 28. "P28,PMN28 overflow" "No overflow,Overflow"
eventfld.long 0x00 27. "P27,PMN27 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 26. "P26,PMN26 overflow" "No overflow,Overflow"
eventfld.long 0x00 25. "P25,PMN25 overflow" "No overflow,Overflow"
eventfld.long 0x00 24. "P24,PMN24 overflow" "No overflow,Overflow"
eventfld.long 0x00 23. "P23,PMN23 overflow" "No overflow,Overflow"
eventfld.long 0x00 22. "P22,PMN22 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 21. "P21,PMN21 overflow" "No overflow,Overflow"
eventfld.long 0x00 20. "P20,PMN20 overflow" "No overflow,Overflow"
eventfld.long 0x00 19. "P19,PMN19 overflow" "No overflow,Overflow"
eventfld.long 0x00 18. "P18,PMN18 overflow" "No overflow,Overflow"
eventfld.long 0x00 17. "P17,PMN17 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 16. "P16,PMN16 overflow" "No overflow,Overflow"
eventfld.long 0x00 15. "P15,PMN15 overflow" "No overflow,Overflow"
eventfld.long 0x00 14. "P14,PMN14 overflow" "No overflow,Overflow"
eventfld.long 0x00 13. "P13,PMN13 overflow" "No overflow,Overflow"
eventfld.long 0x00 12. "P12,PMN12 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 11. "P11,PMN11 overflow" "No overflow,Overflow"
eventfld.long 0x00 10. "P10,PMN10 overflow" "No overflow,Overflow"
eventfld.long 0x00 9. "P9,PMN9 overflow" "No overflow,Overflow"
eventfld.long 0x00 8. "P8,PMN8 overflow" "No overflow,Overflow"
eventfld.long 0x00 7. "P7,PMN7 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 6. "P6,PMN6 overflow" "No overflow,Overflow"
eventfld.long 0x00 5. "P5,PMN5 overflow" "No overflow,Overflow"
eventfld.long 0x00 4. "P4,PMN4 overflow" "No overflow,Overflow"
eventfld.long 0x00 3. "P3,PMN3 overflow" "No overflow,Overflow"
eventfld.long 0x00 2. "P2,PMN2 overflow" "No overflow,Overflow"
newline
eventfld.long 0x00 1. "P1,PMN1 overflow" "No overflow,Overflow"
eventfld.long 0x00 0. "P0,PMN0 overflow" "No overflow,Overflow"
group.long c15:0x4c9++0x00
line.long 0x00 "PMSWINC,Performance Monitor Software Increment"
bitfld.long 0x00 30. "P30,Increment PMN30" "No action,Increment"
bitfld.long 0x00 29. "P29,Increment PMN29" "No action,Increment"
bitfld.long 0x00 28. "P28,Increment PMN28" "No action,Increment"
bitfld.long 0x00 27. "P27,Increment PMN27" "No action,Increment"
bitfld.long 0x00 26. "P26,Increment PMN26" "No action,Increment"
newline
bitfld.long 0x00 25. "P25,Increment PMN25" "No action,Increment"
bitfld.long 0x00 24. "P24,Increment PMN24" "No action,Increment"
bitfld.long 0x00 23. "P23,Increment PMN23" "No action,Increment"
bitfld.long 0x00 22. "P22,Increment PMN22" "No action,Increment"
bitfld.long 0x00 21. "P21,Increment PMN21" "No action,Increment"
newline
bitfld.long 0x00 20. "P20,Increment PMN20" "No action,Increment"
bitfld.long 0x00 19. "P19,Increment PMN19" "No action,Increment"
bitfld.long 0x00 18. "P18,Increment PMN18" "No action,Increment"
bitfld.long 0x00 17. "P17,Increment PMN17" "No action,Increment"
bitfld.long 0x00 16. "P16,Increment PMN16" "No action,Increment"
newline
bitfld.long 0x00 15. "P15,Increment PMN15" "No action,Increment"
bitfld.long 0x00 14. "P14,Increment PMN14" "No action,Increment"
bitfld.long 0x00 13. "P13,Increment PMN13" "No action,Increment"
bitfld.long 0x00 12. "P12,Increment PMN12" "No action,Increment"
bitfld.long 0x00 11. "P11,Increment PMN11" "No action,Increment"
newline
bitfld.long 0x00 10. "P10,Increment PMN10" "No action,Increment"
bitfld.long 0x00 9. "P9,Increment PMN9" "No action,Increment"
bitfld.long 0x00 8. "P8,Increment PMN8" "No action,Increment"
bitfld.long 0x00 7. "P7,Increment PMN7" "No action,Increment"
bitfld.long 0x00 6. "P6,Increment PMN6" "No action,Increment"
newline
bitfld.long 0x00 5. "P5,Increment PMN5" "No action,Increment"
bitfld.long 0x00 4. "P4,Increment PMN4" "No action,Increment"
bitfld.long 0x00 3. "P3,Increment PMN3" "No action,Increment"
bitfld.long 0x00 2. "P2,Increment PMN2" "No action,Increment"
bitfld.long 0x00 1. "P1,Increment PMN1" "No action,Increment"
newline
bitfld.long 0x00 0. "P0,Increment PMN0" "No action,Increment"
group.long c15:0x5c9++0x00
line.long 0x00 "PMSELR,Performance Monitor Select Register"
bitfld.long 0x00 0.--4. "SEL,Current event counter select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
group.long c15:0xd9++0x00
line.long 0x00 "PMCCNTR,Performance Monitor Cycle Count Register"
group.long c15:0x1d9++0x00
line.long 0x00 "PMXEVTYPER,Performance Monitor Event Type Register"
group.long c15:0x2d9++0x00
line.long 0x00 "PMXEVCNTR,Performance Monitor Event Count Register"
group.long c15:0xe9++0x00
line.long 0x00 "PMUSERENR,Performance Monitor User Enable Register"
bitfld.long 0x00 3. "ER,Event counter read enable" "Disabled,Enabled"
bitfld.long 0x00 2. "CR,Cycle counter read enable" "Disabled,Enabled"
bitfld.long 0x00 1. "SW,Software Increment write enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,User mode access enable" "Disabled,Enabled"
group.long c15:0x1e9++0x00
line.long 0x00 "PMINTENSET,Performance Monitor Interrupt Enable Set"
bitfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
bitfld.long 0x00 30. "P30,PMCNT30 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 29. "P29,PMCNT29 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 28. "P28,PMCNT28 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 27. "P27,PMCNT27 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "P26,PMCNT26 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 25. "P25,PMCNT25 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 24. "P24,PMCNT24 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 23. "P23,PMCNT23 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 22. "P22,PMCNT22 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21. "P21,PMCNT21 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 20. "P20,PMCNT20 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 19. "P19,PMCNT19 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 18. "P18,PMCNT18 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 17. "P17,PMCNT17 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. "P16,PMCNT16 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 15. "P15,PMCNT15 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 14. "P14,PMCNT14 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 13. "P13,PMCNT13 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 12. "P12,PMCNT12 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "P11,PMCNT11 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 10. "P10,PMCNT10 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 9. "P9,PMCNT9 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 8. "P8,PMCNT8 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 7. "P7,PMCNT7 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "P6,PMCNT6 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "P5,PMCNT5 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "P4,PMCNT4 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "P3,PMCNT3 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "P2,PMCNT2 Overflow Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "P1,PMCNT1 Overflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "P0,PMCNT0 Overflow Interrupt Enable" "Disabled,Enabled"
group.long c15:0x2e9++0x00
line.long 0x00 "PMINTENCLR,Performance Monitor Interrupt Enable Clear"
eventfld.long 0x00 31. "C,PMCCNTR enable" "Disabled,Enabled"
eventfld.long 0x00 30. "P30,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 29. "P29,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 28. "P28,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 27. "P27,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 26. "P26,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 25. "P25,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 24. "P24,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 23. "P23,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 22. "P22,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 21. "P21,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 20. "P20,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 19. "P19,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 18. "P18,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 17. "P17,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 16. "P16,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 15. "P15,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 14. "P14,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 13. "P13,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 12. "P12,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 11. "P11,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 10. "P10,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 9. "P9,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 8. "P8,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 7. "P7,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 6. "P6,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 5. "P5,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 4. "P4,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 3. "P3,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 2. "P2,Overflow Interrupt Clear" "Disabled,Enabled"
newline
eventfld.long 0x00 1. "P1,Overflow Interrupt Clear" "Disabled,Enabled"
eventfld.long 0x00 0. "P0,Overflow Interrupt Clear" "Disabled,Enabled"
group.long c15:0x3e9++0x00
line.long 0x00 "PMOVSSET,Performance Monitor Overflow Flag Status Set Register"
group.long c15:0x8E++0x00
line.long 0x00 "PMEVCNTR0,Performance Monitors Event Count Register 0"
group.long c15:(0x8E+0x40)++0x00
line.long 0x00 "PMEVTYPER0,Performance Monitors Selected Event Type Register 0"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x18E++0x00
line.long 0x00 "PMEVCNTR1,Performance Monitors Event Count Register 1"
group.long c15:(0x18E+0x40)++0x00
line.long 0x00 "PMEVTYPER1,Performance Monitors Selected Event Type Register 1"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x28E++0x00
line.long 0x00 "PMEVCNTR2,Performance Monitors Event Count Register 2"
group.long c15:(0x28E+0x40)++0x00
line.long 0x00 "PMEVTYPER2,Performance Monitors Selected Event Type Register 2"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x38E++0x00
line.long 0x00 "PMEVCNTR3,Performance Monitors Event Count Register 3"
group.long c15:(0x38E+0x40)++0x00
line.long 0x00 "PMEVTYPER3,Performance Monitors Selected Event Type Register 3"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x48E++0x00
line.long 0x00 "PMEVCNTR4,Performance Monitors Event Count Register 4"
group.long c15:(0x48E+0x40)++0x00
line.long 0x00 "PMEVTYPER4,Performance Monitors Selected Event Type Register 4"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x58E++0x00
line.long 0x00 "PMEVCNTR5,Performance Monitors Event Count Register 5"
group.long c15:(0x58E+0x40)++0x00
line.long 0x00 "PMEVTYPER5,Performance Monitors Selected Event Type Register 5"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "EVTCOUNT,Event to count"
group.long c15:0x07FE++0x00
line.long 0x00 "PMCCFILTR,Performance Monitors Cycle Count Filter Register"
bitfld.long 0x00 31. "P,EL1 modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 30. "U,EL0 filtering bit" "Enabled,Disabled"
bitfld.long 0x00 29. "NSK,Non-secure kernel modes filtering bit" "Enabled,Disabled"
newline
bitfld.long 0x00 28. "NSU,Non-secure user modes filtering bit" "Enabled,Disabled"
bitfld.long 0x00 27. "NSH,Non-secure Hypervisor modes filtering bit" "Disabled,Enabled"
tree.end
tree "System Timer Registers"
group.long c15:0x000E++0x00
line.long 0x00 "CNTFRQ,Counter Frequency Register"
rgroup.quad c15:0x100E0++0x01
line.quad 0x00 "CNTPCT,Counter Physical Count Register"
group.long c15:0x001E++0x00
line.long 0x00 "CNTKCTL,Timer PL1 Control Register"
bitfld.long 0x00 9. "EL0PTEN,Controls whether the physical timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 8. "EL0VTEN,Controls whether the virtual timer registers are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 4.--7. "EVNTI,Selects which bit of CNTVCT is the trigger for the event stream generated from the virtual counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
newline
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
bitfld.long 0x00 1. "EL0VCTEN,Controls whether the virtual counter, CNTVCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL0PCTEN,Controls whether the physical counter, CNTPCT, and the frequency register CNTFRQ, are accessible from EL0 modes" "Not accessible,Accessible"
group.long c15:0x002E++0x00
line.long 0x00 "CNTP_TVAL,Counter PL1 Physical Compare Value Register"
group.long c15:0x012E++0x00
line.long 0x00 "CNTP_CTL,Counter PL1 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.long c15:0x003E++0x00
line.long 0x00 "CNTV_TVAL,Counter PL1 Virtual Timer Value Register"
group.long c15:0x013E++0x00
line.long 0x00 "CNTV_CTL,Counter PL1 Virtual Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x110E0++0x01
line.quad 0x00 "CNTVCT,Counter Virtual Count Register"
group.quad c15:0x120E0++0x01
line.quad 0x00 "CNTP_CVAL,Counter PL1 Physical Compare Value Register"
group.quad c15:0x130E0++0x01
line.quad 0x00 "CNTV_CVAL,Counter PL1 Virtual Compare Value Register"
group.quad c15:0x140E0++0x01
line.quad 0x00 "CNTVOFF,Counter Virtual Offset Register"
group.long c15:0x401E++0x00
line.long 0x00 "CNTHCTL,Counter Non-secure PL2 Control Register"
bitfld.long 0x00 4.--7. "EVNTI,Select trigger for the event stream generated from counter" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. "EVNTDIR,Controls which transition of the CNTVCT trigger bit" "0 to 1,1 to 0"
bitfld.long 0x00 2. "EVNTEN,Enables the generation of an event stream from the virtual counter" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "EL1VCTEN,Controls whether the Non-secure copies of the physical timer registers are accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
bitfld.long 0x00 0. "EL1PCTEN,Controls whether the physical counter, CNTPCT, is accessible from Non-secure EL1 and EL0 modes" "Not accessible,Accessible"
group.long c15:0x402E++0x00
line.long 0x00 "CNTHP_TVAL,Counter Non-secure PL2 Physical Timer Value Register"
group.long c15:0x412E++0x00
line.long 0x00 "CNTHP_CTL,Counter Non-secure PL2 Physical Timer Control Register"
rbitfld.long 0x00 2. "ISTATUS,The status of the timer interrupt" "No interrupt,Interrupt"
bitfld.long 0x00 1. "IMASK,Timer interrupt mask bit" "Not masked,Masked"
bitfld.long 0x00 0. "ENABLE,Enables the timer" "Disabled,Enabled"
group.quad c15:0x160E0++0x01
line.quad 0x00 "CNTHP_CVAL,Counter Non-secure PL2 Physical Compare Value Register"
tree.end
tree "Generic Interrupt Controller CPU Interface"
tree "AArch32 GIC Physical CPU Interface System Registers"
tree.open "Interrupt Controller Active Priorities Registers"
group.long c15:0x048C++0x00
line.long 0x00 "ICC_AP0R0,Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x009C++0x00
line.long 0x00 "ICC_AP1R0,Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
wgroup.quad c15:0x110C0++0x01
line.quad 0x00 "ICC_ASGI1R,Alternate SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "SGIID,SGI Interrupt ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x038C++0x00
line.long 0x00 "ICC_BPR0,Binary Point Register 0"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x03CC++0x00
line.long 0x00 "ICC_BPR1,Binary Point Register 1"
bitfld.long 0x00 0.--2. "BINARYPOINT,Binary point" "0,1,2,3,4,5,6,7"
group.long c15:0x04CC++0x00
line.long 0x00 "ICC_CTLR,Interrupt Control Registers for EL1"
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,SEI Support" "Not supported,Supported"
rbitfld.long 0x00 11.--13. "IDBITS,Number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
rbitfld.long 0x00 8.--10. "PRIBITS,Number of priority bits implemented" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "EOIMODE,Alias of ICC_MCTLR.EOImode_EL1" "0,1"
newline
bitfld.long 0x00 0. "CBPR,Common Binary Point Register" "0,1"
group.long c15:0x64CC++0x00
line.long 0x00 "ICC_MCTLR,Interrupt Control Registers for EL3"
rbitfld.long 0x00 17. "NDS,Disable Security not supported" "Supported,Not supported"
rbitfld.long 0x00 15. "A3V,Affinity 3 Valid" "Not supported,Supported"
rbitfld.long 0x00 14. "SEIS,Indicates whether the CPU interface supports generation of SEIs" "Not supported,Supported"
newline
rbitfld.long 0x00 11.--13. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
rbitfld.long 0x00 8.--10. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6. "PMHE,Priority Mask Hint Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "EOIMODE_EL1NS,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Non-secure EL1 and EL2)" "Enabled,Disabled"
bitfld.long 0x00 3. "EOIMODE_EL1S,Controls whether a write to an End of Interrupt register also deactivates the interrupt(Secure EL1)" "Enabled,Disabled"
bitfld.long 0x00 2. "EOIMODE_EL3,Controls whether a write to an End of Interrupt register also deactivates the interrupt(EL3)" "Enabled,Disabled"
newline
bitfld.long 0x00 1. "CBPR_EL1NS,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Non-secure interrupts at EL1" "Separate registers,Same register"
bitfld.long 0x00 0. "CBPR_EL1S,Controls whether the same register is used for interrupt preemption of both Group 0 and Group 1 Secure interrupts in Secure non-Monitor modes" "Separate registers,Same register"
if (((per.l(c15:0x4CC))&0x3800)==0x00)
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.long c15:0x018C++0x00
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.long c15:0x01CC++0x00
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.long c15:0x028C++0x00
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.long c15:0x02CC++0x00
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.long.word 0x00 0.--15. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
elif (((per.l(c15:0x4CC))&0x3800)==0x800)
wgroup.long c15:0x01BC++0x00
line.long 0x00 "ICC_DIR,Interrupt Controller Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the interrupt to be deactivated"
wgroup.long c15:0x018C++0x00
line.long 0x00 "ICC_EOIR0,Interrupt Controller End Of Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR0 access"
wgroup.long c15:0x01CC++0x00
line.long 0x00 "ICC_EOIR1,Interrupt Controller End Of Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID from the corresponding ICC_IAR1 access"
rgroup.long c15:0x028C++0x00
line.long 0x00 "ICC_HPPIR0,Interrupt Controller Highest Priority Pending Interrupt Register 0"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
rgroup.long c15:0x02CC++0x00
line.long 0x00 "ICC_HPPIR1,Interrupt Controller Highest Priority Pending Interrupt Register 1"
hexmask.long.tbyte 0x00 0.--23. 1. "INTID,The INTID of the highest priority pending interrupt if that interrupt is observable at the current security state and exception level"
endif
hgroup.long c15:0x008C++0x00
hide.long 0x00 "ICC_IAR0,Interrupt Acknowledge Register 0"
in
hgroup.long c15:0x00CC++0x00
hide.long 0x00 "ICC_IAR1,Interrupt Acknowledge Register 1"
in
group.long c15:0x06CC++0x00
line.long 0x00 "ICC_IGRPEN0,Interrupt Group Enable Register 0"
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
group.long c15:0x07CC++0x00
line.long 0x00 "ICC_IGRPEN1,Interrupt Group Enable Register 1"
bitfld.long 0x00 0. "ENABLE,Enables Group 0 interrupts" "Disabled,Enabled"
group.long c15:0x0064++0x00
line.long 0x00 "ICC_PMR,Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Priority mask level for the CPU interface"
rgroup.long c15:0x03BC++0x00
line.long 0x00 "ICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. "PRIORITY,Current running priority on the CPU interface"
wgroup.quad c15:0x120C0++0x01
line.quad 0x00 "ICC_SGI0R,SGI Generation Register 0"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
wgroup.quad c15:0x100C0++0x01
line.quad 0x00 "ICC_SGI1R,SGI Generation Register 1"
hexmask.quad.byte 0x00 48.--55. 1. "AFF3,Affinity 3"
bitfld.quad 0x00 40. "IRM,Interrupt Routing Mode" "Disabled,Enabled"
hexmask.quad.byte 0x00 32.--39. 1. "AFF2,Affinity 2"
newline
bitfld.quad 0x00 24.--27. "INTID,The INTID of the SGI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 16.--23. 1. "AFF1,Affinity 1"
hexmask.quad.word 0x00 0.--15. 1. "TARGETLIST,Target List"
group.long c15:0x05CC++0x00
line.long 0x00 "ICC_SRE,System Register Enable Register for EL1"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
if corename()=="CORTEXA53"
group.long c15:0x459C++0x00
line.long 0x00 "ICC_HSRE,System Register Enable Register for EL2"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
endif
group.long c15:0x65CC++0x00
line.long 0x00 "ICC_MSRE,System Register Enable Register for EL3"
bitfld.long 0x00 3. "ENABLE,Enable lower exception level access to ICC_SRE_EL1 and ICC_SRE_EL2" "Disabled,Enabled"
bitfld.long 0x00 2. "DIB,Disable IRQ bypass" "No,Yes"
bitfld.long 0x00 1. "DFB,Disable FIQ bypass" "No,Yes"
newline
bitfld.long 0x00 0. "SRE,System Register Enable" "Disabled,Enabled"
group.long c15:0x67CC++0x00
line.long 0x00 "ICC_MGRPEN1,Monitor Group1 Interrupt Group Enable"
bitfld.long 0x00 1. "ENABLEGRP1S,Enables Group 1 interrupts for the Secure state" "Disabled,Enabled"
bitfld.long 0x00 0. "ENABLEGRP1NS,Enables Group 1 interrupts for the Non-secure state" "Disabled,Enabled"
tree.end
tree "AArch32 Virtual Interface Control System Registers"
tree.open "Hypervisor Active Priorities Registers"
group.long c15:0x408C++0x00
line.long 0x00 "ICH_AP0R0,Interrupt Controller Hypervisor Active Priorities Group 0 Register 0"
bitfld.long 0x00 31. "P31,Group 0 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 0 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 0 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 0 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 0 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 0 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 0 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 0 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 0 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 0 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 0 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 0 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 0 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 0 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 0 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 0 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 0 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 0 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 0 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 0 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 0 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 0 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 0 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 0 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 0 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 0 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 0 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 0 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 0 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 0 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 0 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 0 interrupt active with priority level 0" "No interrupt,Interrupt"
group.long c15:0x409C++0x00
line.long 0x00 "ICH_AP1R0,Interrupt Controller Hypervisor Active Priorities Group 1 Register 0"
bitfld.long 0x00 31. "P31,Group 1 interrupt active with priority level 31" "No interrupt,Interrupt"
bitfld.long 0x00 30. "P30,Group 1 interrupt active with priority level 30" "No interrupt,Interrupt"
bitfld.long 0x00 29. "P29,Group 1 interrupt active with priority level 29" "No interrupt,Interrupt"
newline
bitfld.long 0x00 28. "P28,Group 1 interrupt active with priority level 28" "No interrupt,Interrupt"
bitfld.long 0x00 27. "P27,Group 1 interrupt active with priority level 27" "No interrupt,Interrupt"
bitfld.long 0x00 26. "P26,Group 1 interrupt active with priority level 26" "No interrupt,Interrupt"
newline
bitfld.long 0x00 25. "P25,Group 1 interrupt active with priority level 25" "No interrupt,Interrupt"
bitfld.long 0x00 24. "P24,Group 1 interrupt active with priority level 24" "No interrupt,Interrupt"
bitfld.long 0x00 23. "P23,Group 1 interrupt active with priority level 23" "No interrupt,Interrupt"
newline
bitfld.long 0x00 22. "P22,Group 1 interrupt active with priority level 22" "No interrupt,Interrupt"
bitfld.long 0x00 21. "P21,Group 1 interrupt active with priority level 21" "No interrupt,Interrupt"
bitfld.long 0x00 20. "P20,Group 1 interrupt active with priority level 20" "No interrupt,Interrupt"
newline
bitfld.long 0x00 19. "P19,Group 1 interrupt active with priority level 19" "No interrupt,Interrupt"
bitfld.long 0x00 18. "P18,Group 1 interrupt active with priority level 18" "No interrupt,Interrupt"
bitfld.long 0x00 17. "P17,Group 1 interrupt active with priority level 17" "No interrupt,Interrupt"
newline
bitfld.long 0x00 16. "P16,Group 1 interrupt active with priority level 16" "No interrupt,Interrupt"
bitfld.long 0x00 15. "P15,Group 1 interrupt active with priority level 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "P14,Group 1 interrupt active with priority level 14" "No interrupt,Interrupt"
newline
bitfld.long 0x00 13. "P13,Group 1 interrupt active with priority level 13" "No interrupt,Interrupt"
bitfld.long 0x00 12. "P12,Group 1 interrupt active with priority level 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "P11,Group 1 interrupt active with priority level 11" "No interrupt,Interrupt"
newline
bitfld.long 0x00 10. "P10,Group 1 interrupt active with priority level 10" "No interrupt,Interrupt"
bitfld.long 0x00 9. "P9,Group 1 interrupt active with priority level 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "P8,Group 1 interrupt active with priority level 8" "No interrupt,Interrupt"
newline
bitfld.long 0x00 7. "P7,Group 1 interrupt active with priority level 7" "No interrupt,Interrupt"
bitfld.long 0x00 6. "P6,Group 1 interrupt active with priority level 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "P5,Group 1 interrupt active with priority level 5" "No interrupt,Interrupt"
newline
bitfld.long 0x00 4. "P4,Group 1 interrupt active with priority level 4" "No interrupt,Interrupt"
bitfld.long 0x00 3. "P3,Group 1 interrupt active with priority level 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "P2,Group 1 interrupt active with priority level 2" "No interrupt,Interrupt"
newline
bitfld.long 0x00 1. "P1,Group 1 interrupt active with priority level 1" "No interrupt,Interrupt"
bitfld.long 0x00 0. "P0,Group 1 interrupt active with priority level 0" "No interrupt,Interrupt"
tree.end
newline
rgroup.long c15:0x43BC++0x00
line.long 0x00 "ICH_EISR,Interrupt Controller End of Interrupt Status Register"
bitfld.long 0x00 3. "STATUS3,EOI maintenance interrupt status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "STATUS2,EOI maintenance interrupt status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "STATUS1,EOI maintenance interrupt status bit for List register 1" "No interrupt,Interrupt"
newline
bitfld.long 0x00 0. "STATUS0,EOI maintenance interrupt status bit for List register 0" "No interrupt,Interrupt"
rgroup.long c15:0x45BC++0x00
line.long 0x00 "ICH_ELRSR,Interrupt Controller Empty List Register Status Register"
bitfld.long 0x00 3. "STATUS3,Status bit for List register 3" "Interrupt,No interrupt"
bitfld.long 0x00 2. "STATUS2,Status bit for List register 2" "Interrupt,No interrupt"
bitfld.long 0x00 1. "STATUS1,Status bit for List register 1" "Interrupt,No interrupt"
newline
bitfld.long 0x00 0. "STATUS0,Status bit for List register 0" "Interrupt,No interrupt"
group.long c15:0x40BC++0x00
line.long 0x00 "ICH_HCR,Interrupt Controller Hypervisor Control Register"
bitfld.long 0x00 27.--31. "EOICOUNT,This field is incremented whenever a successful write to a virtual EOIR or DIR register would have resulted in a virtual interrupt deactivation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 14. "TDIR,Trap Non-secure EL1 writes to ICC_DIR" "Not trapped,Trapped"
bitfld.long 0x00 13. "TSEI,Trap all locally generated SEIs" "Not trapped,Trapped"
newline
bitfld.long 0x00 12. "TALL1,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 1 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 11. "TALL0,Trap all Non-secure EL1 accesses to ICC_* System registers for Group 0 interrupts to EL2" "Not trapped,Trapped"
bitfld.long 0x00 10. "TC,Trap all Non-secure EL1 accesses to System registers that are common to Group 0 and Group 1 to EL2" "Not trapped,Trapped"
newline
bitfld.long 0x00 7. "VGRP1DIE,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "VGRP1EIE,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "VGRP0DIE,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. "VGRP0EIE,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NPIE,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "LRENPIE,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. "UIE,Underflow Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 0. "EN,Global enable bit for the virtual CPU interface" "Disabled,Enabled"
group.long c15:(0x40CC+0x0)++0x00
line.long 0x00 "ICH_LR0,Interrupt Controller List Register 0"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x100)++0x00
line.long 0x00 "ICH_LR1,Interrupt Controller List Register 1"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x200)++0x00
line.long 0x00 "ICH_LR2,Interrupt Controller List Register 2"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40CC+0x300)++0x00
line.long 0x00 "ICH_LR3,Interrupt Controller List Register 3"
hexmask.long 0x00 0.--31. 1. "vINTID,Virtual INTID of the interrupt"
group.long c15:(0x40EC+0x0)++0x00
line.long 0x00 "ICH_LRC0,Interrupt Controller List Register Extension 0"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x100)++0x00
line.long 0x00 "ICH_LRC1,Interrupt Controller List Register Extension 1"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x200)++0x00
line.long 0x00 "ICH_LRC2,Interrupt Controller List Register Extension 2"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
group.long c15:(0x40EC+0x300)++0x00
line.long 0x00 "ICH_LRC3,Interrupt Controller List Register Extension 3"
bitfld.long 0x00 30.--31. "STATE,The state of the interrupt" "Inactive,Pending,Active,Pending and active"
bitfld.long 0x00 29. "HW,Indicates whether this virtual interrupt maps directly to a hardware interrupt, meaning that it corresponds to a physical interrupt." "Triggered by Software,Hardware interrupt"
bitfld.long 0x00 28. "GROUP,Indicates the group for this virtual interrupt" "Group 1,Group 0"
newline
hexmask.long.byte 0x00 16.--23. 1. "PRIORITY,The priority of this interrupt"
hexmask.long.word 0x00 0.--9. 1. "PINTID,Physical INTID for hardware interrupts"
rgroup.long c15:0x42BC++0x00
line.long 0x00 "ICH_MISR,Interrupt Controller Maintenance Interrupt State Register"
bitfld.long 0x00 7. "VGRP1D,VPE Group 1 Disabled" "Not asserted,Asserted"
bitfld.long 0x00 6. "VGRP1E,VPE Group 1 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 5. "VGRP0D,VPE Group 0 Disabled" "Not asserted,Asserted"
newline
bitfld.long 0x00 4. "VGRP0E,VPE Group 0 Enabled" "Not asserted,Asserted"
bitfld.long 0x00 3. "NP,No Pending" "Not asserted,Asserted"
bitfld.long 0x00 2. "LRENP,List Register Entry Not Present" "Not asserted,Asserted"
newline
bitfld.long 0x00 1. "U,Underflow" "Not asserted,Asserted"
bitfld.long 0x00 0. "EOI,End Of Interrupt" "Not asserted,Asserted"
group.long c15:0x459C++0x00
line.long 0x00 "ICH_SRE,Hypervisor System Register"
group.long c15:0x47BC++0x00
line.long 0x00 "ICH_VMCR,Interrupt Controller Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. "VPMR,The priority mask level for the virtual CPU interface"
bitfld.long 0x00 21.--23. "VBPR0,Virtual Binary Point Register Group 0" "[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0],No preemption-[7:0]"
bitfld.long 0x00 18.--20. "VBPR1,Virtual Binary Point Register, Group 1" ",[7:1]-[0],[7:2]-[1:0],[7:3]-[2:0],[7:4]-[3:0],[7:5]-[4:0],[7:6]-[5:0],[7]-[6:0]"
newline
bitfld.long 0x00 9. "VEOIM,Controls whether a write to an End of Interrupt register also deactivates the virtual interrupt" "Disabled,Enabled"
bitfld.long 0x00 4. "VCBPR,Virtual Common Binary Point Register" "Separate registers,Same register"
bitfld.long 0x00 3. "VFIQEN,Virtual FIQ enable" "Virtual IRQs,Virtual FIQs"
newline
bitfld.long 0x00 2. "VACKCTL,Virtual FIQ enable" "1022,Corresponding interrupt"
bitfld.long 0x00 1. "VENG1,Virtual Group 1 interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "VENG0,Virtual Group 0 interrupt enable" "Disabled,Enabled"
group.long c15:0x449C++0x00
line.long 0x00 "ICH_VSEIR,Virtual System Error Interrupt Register"
rgroup.long c15:0x41BC++0x00
line.long 0x00 "ICH_VTR,Interrupt Controller VGIC Type Register"
bitfld.long 0x00 29.--31. "PRIBITS,The number of priority bits implemented minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 26.--28. "PREBITS,The number of virtual preemption bits implemented, minus one" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 23.--25. "IDBITS,The number of physical interrupt identifier bits supported" "16 bits,24 bits,?..."
newline
bitfld.long 0x00 22. "SEIS,Indicates whether the CPU interface supports local generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "A3V,Affinity 3 Valid" "Only zero values supported,Non-zero values supported"
bitfld.long 0x00 20. "NV4,GICv4 direct injection of virtual interrupts not supported" "Supported,Not supported"
newline
bitfld.long 0x00 19. "TDS,Separate trapping of Non-secure EL1 writes to ICV_DIR_EL1 supported" "Not supported,Supported"
bitfld.long 0x00 0.--4. "LISTREGS,The number of implemented List registers, minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
tree.end
tree.end
tree "Debug Registers"
tree "Coresight Management Registers"
if corename()=="CORTEXA57"
rgroup.long c14:0x0000++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
elif corename()=="CORTEXA53"
rgroup.long c14:0x0000++0x0
line.long 0x0 "DBGDIDR,Debug ID Register"
bitfld.long 0x0 28.--31. "WRP,Number of Watchpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 24.--27. "BRP,Number of Breakpoint Register Pairs" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x0 20.--23. "CTX_CMP,Number of BRPs with Context ID Comparison Capability" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
hexmask.long.byte 0x0 16.--19. 1. "VERSION,Debug Architecture Version"
bitfld.long 0x0 15. "DEVID,Debug Device ID" "Low,High"
bitfld.long 0x0 14. "NSUHD,Secure User halting debug-mode" "Supported,Not supported"
newline
bitfld.long 0x0 13. "PCSR,PC Sample register implemented" "Not implemented,Implemented"
bitfld.long 0x0 12. "SE,Security Extensions implemented" "Not implemented,Implemented"
hexmask.long.byte 0x0 4.--7. 1. "VARIANT,Implementation-defined Variant Number"
newline
hexmask.long.byte 0x0 0.--3. 1. "REVISION,Implementation-defined Revision Number"
endif
rgroup.long c14:0x0060++0x0
line.long 0x00 "DBGWFAR,Watchpoint Fault Address Register"
group.long c14:0x0070++0x0
line.long 0x00 "DBGVCR,Debug Vector Catch register"
bitfld.long 0x00 31. "FIQVCE_NS,FIQ vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 30. "IRQVCE_NS,IRG vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 28. "DAVCE_NS,Data Abort vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 27. "PAVCE_NS,Prefetch Abort vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 26. "SVCVCE_NS,SVC vector catch in Non-secure state" "Disabled,Enabled"
bitfld.long 0x00 25. "UIVCE_NS,Undefined instruction vector catch in Non-secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 15. "FIQVCE_SM,FIQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 14. "IRQVCE_SM,IRQ vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 12. "DAVCE_SM,Data Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "PAVCE_SM,Prefetch Abort vector catch enable in Secure state on Monitor mode vector" "Disabled,Enabled"
bitfld.long 0x00 10. "SMCVCE_S,SMC vector catch enable in Secure state" "Disabled,Enabled"
bitfld.long 0x00 7. "FIQVCE_S,FIQ vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 6. "IRQVCE_S,IRG vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 4. "DAVCE_S,Data Abort vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 3. "PAVCE_S,Prefetch Abort vector catch in Secure state" "Disabled,Enabled"
newline
bitfld.long 0x00 2. "SVCVCE_S,SVC vector catch in Secure state" "Disabled,Enabled"
bitfld.long 0x00 1. "UIVCE_S,Undefined instruction vector catch in Secure state" "Disabled,Enabled"
group.long c14:0x0020++0x00
line.long 0x00 "DBGDCCINT,DCC Interrupt Enable Register"
bitfld.long 0x00 30. "RX,DCC interrupt request enable control for DTRRX" "Disabled,Enabled"
bitfld.long 0x00 29. "TX,DCC interrupt request enable control for DTRTX" "Disabled,Enabled"
group.long c14:0x0200++0x0
line.long 0x00 "DBGDTRRXEXT,Debug Receive Register (External View)"
group.long c14:0x0220++0x0
line.long 0x00 "DBGDSCREXT,Debug Status and Control Register (External View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 27. "RXO,Used for save/restore of EDSCR.RXO" "Disabled,Enabled"
newline
bitfld.long 0x00 26. "TXU,Used for save/restore of EDSCR.TXU" "Disabled,Enabled"
bitfld.long 0x00 21. "TDA,Used for save/restore of EDSCR.TDA" "Disabled,Enabled"
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
newline
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "HDE,Used for save/restore of EDSCR.HDE" "Disabled,Enabled"
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
bitfld.long 0x00 6. "ERR,Used for save/restore of EDSCR.ERR" "Disabled,Enabled"
newline
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
rgroup.long c14:0x0010++0x0
line.long 0x00 "DBGDSCRINT,Debug Status and Control Register (Internal View)"
bitfld.long 0x00 30. "RXFULL,DBGDTRRX Register full" "Empty,Full"
bitfld.long 0x00 29. "TXFULL,DBGDTRTX Register full" "Empty,Full"
bitfld.long 0x00 18. "NS,Non-secure status bit" "Secure,Non-secure"
newline
bitfld.long 0x00 17. "SPNIDDIS,Secure Privileged Non-Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 16. "SPIDDIS,Secure Privileged Invasive Debug Disable" "No,Yes"
bitfld.long 0x00 15. "MDBGEN,Monitor debug-mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. "UDCCDIS,User mode access to Communications Channel disable" "No,Yes"
bitfld.long 0x00 2.--5. "MOE,Method of debug entry field" "Reserved,Breakpoint,Reserved,BKPT Instruction,Reserved,Vector Catch,Reserved,Reserved,Reserved,Reserved,Synchronous Watchpoint,?..."
wgroup.long c14:0x0230++0x0
line.long 0x00 "DBGDTRTXEXT,Debug Transmit Register (External View)"
group.long c14:0x0050++0x0
line.long 0x00 "DBGDTRTXINT,Debug Transmit/Receive Register (Internal View)"
group.long c14:0x0687++0x0
line.long 0x0 "DBGCLAIMSET,Claim Tag Set Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Set" "Not set,Set"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Set" "Not set,Set"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Set" "Not set,Set"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Set" "Not set,Set"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Set" "Not set,Set"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Set" "Not set,Set"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Set" "Not set,Set"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Set" "Not set,Set"
group.long c14:0x0697++0x0
line.long 0x0 "DBGCLAIMCLR,Claim Tag Clear Register"
bitfld.long 0x0 7. "CT7,Claim Tag 7 Clear" "Not cleared,Cleared"
bitfld.long 0x0 6. "CT6,Claim Tag 6 Clear" "Not cleared,Cleared"
bitfld.long 0x0 5. "CT5,Claim Tag 5 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 4. "CT4,Claim Tag 4 Clear" "Not cleared,Cleared"
bitfld.long 0x0 3. "CT3,Claim Tag 3 Clear" "Not cleared,Cleared"
bitfld.long 0x0 2. "CT2,Claim Tag 2 Clear" "Not cleared,Cleared"
newline
bitfld.long 0x0 1. "CT1,Claim Tag 1 Clear" "Not cleared,Cleared"
bitfld.long 0x0 0. "CT0,Claim Tag 0 Clear" "Not cleared,Cleared"
rgroup.long c14:0x06E7++0x0
line.long 0x0 "DBGAUTHSTATUS,Debug Authentication Status Register"
bitfld.long 0x00 7. "SNDFI,Secure non-invasive debug features implementation" "No effect,Implemented"
bitfld.long 0x00 6. "SNDE,Secure non-invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 5. "SIDFI,Secure invasive debug features implementation" "No effect,Implemented"
newline
bitfld.long 0x00 4. "SIDE,Secure invasive debug enable" "Disabled,Enabled"
bitfld.long 0x00 3. "NSNDFI,Non-secure non-invasive debug features implementation" "Not implemented,Implemented"
bitfld.long 0x00 2. "NSNDE,Non-secure non-invasive debug enable" "0,1"
newline
bitfld.long 0x00 1. "NSIDFI,Non-secure invasive debug features implementation" "Not implemented,Implemented"
bitfld.long 0x00 0. "NSIDE,Non-secure invasive debug enable" "0,1"
rgroup.long c14:0x0707++0x0
line.long 0x0 "DBGDEVID2,Debug Device ID Register 2"
rgroup.long c14:0x0717++0x0
line.long 0x0 "DBGDEVID1,Debug Device ID Register 1"
bitfld.long 0x00 0.--3. "PCSROFFSET,This field defines the offset applied to DBGPCSR samples" "0,1,No offset,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long c14:0x0727++0x00
line.long 0x00 "DBGDEVID,Debug Device ID Register 0"
bitfld.long 0x00 28.--31. "CIDMASK,Specifies the level of support for the Context ID matching breakpoint masking capability" "Not implemented,?..."
bitfld.long 0x00 24.--27. "AUXREGS,Specifies support for the Debug External Auxiliary Control Register" "Not implemented,?..."
bitfld.long 0x00 20.--23. "DOUBLELOCK,Specifies support for the Debug OS Double Lock Register" "Reserved,Implemented,?..."
newline
bitfld.long 0x00 16.--19. "VIREXTNS,Specifies whether EL2 is implemented" "Reserved,Implemented,?..."
bitfld.long 0x00 12.--15. "VECTORCATCH,Defines the form of the vector catch event implemented" "Implemented,?..."
bitfld.long 0x00 8.--11. "BPADDRMASK,Indicates the level of support for the Immediate Virtual Address(IVA) matching breakpoint masking capability" "Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Reserved,Implemented"
newline
bitfld.long 0x00 4.--7. "WPADDRMASK,Indicates the level of support for the DVA matching watchpoint masking capability" "Reserved,Implemented,?..."
bitfld.long 0x00 0.--3. "PCSAMPLE,Indicates the level of support for Program Counter sampling using debug registers 40 and 41" "Reserved,Reserved,Reserved,Implemented,?..."
tree.end
newline
rgroup.quad c14:0x10010++0x1
line.quad 0x0 "DBGDRAR,Debug ROM Address Register"
hexmask.quad.word 0x0 32.--47. 0x1 "ROMADDR,ROM physical address"
hexmask.quad.tbyte 0x0 12.--31. 0x10 "ROMADDR,ROM physical address"
bitfld.quad 0x0 1. "VALID1,ROM table address valid" "Not valid,Valid"
newline
bitfld.quad 0x0 0. "VALID0,ROM table address valid" "Not valid,Valid"
rgroup.quad c14:0x10020++0x1
line.quad 0x0 "DBGDSAR,Debug Self Address Offset Register"
wgroup.long c14:0x0401++0x00
line.long 0x00 "DBGOSLAR,Operating System Lock Access Register"
rgroup.long c14:0x0411++0x00
line.long 0x00 "DBGOSLSR,Operating System Lock Status Register"
bitfld.long 0x00 2. "NTT,32-Bit Access" "Not required,Required"
bitfld.long 0x00 1. "OSLK,Status of the OS Lock" "Not locked,Locked"
bitfld.long 0x00 0. 3. "OSLM,OS Lock Model implemented Bit" "Reserved,Reserved,Implemented,?..."
if (((per.l(c14:0x0411))&0x2)==0x2)
group.long c14:0x0260++0x00
line.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
else
hgroup.long c14:0x0260++0x00
hide.long 0x00 "DBGOSECCR,Debug OS Lock Exception Catch Control Register"
endif
group.long c14:0x0431++0x00
line.long 0x00 "DBGOSDLR,Debug OS Double Lock Register"
bitfld.long 0x00 0. "DLK,OS Double Lock control bit" "Not locked,Locked"
group.long c14:0x0441++0x00
line.long 0x00 "DBGPRCR,Device Power-Down and Reset Control Register"
bitfld.long 0x00 0. "CORENPDRQ,Core No Power down Request" "Low,High"
tree.end
tree "Breakpoint Registers"
if (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x0)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
hide.long 0x00 "DBGBVR0,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x0)++0x0 "Breakpoint 0"
line.long 0x00 "DBGBVR0,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x0)++0x0
line.long 0x00 "DBGBCR0,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x10)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
hide.long 0x00 "DBGBVR1,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x10)++0x0 "Breakpoint 1"
line.long 0x00 "DBGBVR1,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x10)++0x0
line.long 0x00 "DBGBCR1,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x20)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
hide.long 0x00 "DBGBVR2,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x20)++0x0 "Breakpoint 2"
line.long 0x00 "DBGBVR2,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x20)++0x0
line.long 0x00 "DBGBCR2,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x30)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
hide.long 0x00 "DBGBVR3,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x30)++0x0 "Breakpoint 3"
line.long 0x00 "DBGBVR3,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x30)++0x0
line.long 0x00 "DBGBCR3,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x40)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
hide.long 0x00 "DBGBVR4,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x40)++0x0 "Breakpoint 4"
line.long 0x00 "DBGBVR4,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x40)++0x0
line.long 0x00 "DBGBCR4,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
if (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x000000||0x100000||0x400000||0x500000))
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Instruction address)"
hexmask.long 0x00 2.--31. 0x4 "VA,Bits[31:2] of the address value for comparison"
elif (((per.l(c14:(0x500+0x50)))&0xF00000)==(0x800000||0x900000||0xA00000||0xB00000))
hgroup.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
hide.long 0x00 "DBGBVR5,Breakpoint Value Register (VMID)"
else
group.long c14:(0x0400+0x50)++0x0 "Breakpoint 5"
line.long 0x00 "DBGBVR5,Breakpoint Value Register (Context ID)"
endif
group.long c14:(0x0500+0x50)++0x0
line.long 0x00 "DBGBCR5,Breakpoint Control Register"
bitfld.long 0x00 22. "BT[2],Mismatch" "Match,Mismatch"
bitfld.long 0x00 21. 23. "BT[31],Base type" "Address,Context ID,VMID,VMID and context ID"
bitfld.long 0x00 20. "BT[0],Enable linking" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. "LBRPN,Linked BRP number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 14.--15. "SSC,Security state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x00 13. "HMM,Hypervisor mode match" "Not matched,Matched"
newline
bitfld.long 0x0 5.--8. "BAS,Byte address select" "0b0000,0b0001,0b0010,0b0011,0b0100,0b0101,0b0110,0b0111,0b1000,0b1001,0b1010,0b1011,0b1100,0b1101,0b1110,0b1111"
bitfld.long 0x00 1.--2. "PMC,Privileged mode control" "User/System/Supervisor,Privileged,User only,Any mode"
bitfld.long 0x00 0. "BE,Breakpoint enable" "Disabled,Enabled"
group.long c14:0x0141++0x0
line.long 0x00 "DBGBXVR4,Debug Breakpoint Extended Value Register 4"
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
group.long c14:0x0151++0x0
line.long 0x00 "DBGBXVR5,Debug Breakpoint Extended Value Register 5"
hexmask.long.byte 0x00 0.--7. 1. "VMID, VMID value"
tree.end
tree "Watchpoint Control Registers"
group.long c14:(0x0600+0x0)++0x00 "Breakpoint 0"
line.long 0x00 "DBGWVR0,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x0)++0x00
line.long 0x00 "DBGWCR0,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x10)++0x00 "Breakpoint 1"
line.long 0x00 "DBGWVR1,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x10)++0x00
line.long 0x00 "DBGWCR1,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x20)++0x00 "Breakpoint 2"
line.long 0x00 "DBGWVR2,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x20)++0x00
line.long 0x00 "DBGWCR2,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
group.long c14:(0x0600+0x30)++0x00 "Breakpoint 3"
line.long 0x00 "DBGWVR3,Watchpoint Value Register"
hexmask.long 0x00 2.--31. 0x4 "DA,Data address"
group.long c14:(0x0700+0x30)++0x00
line.long 0x00 "DBGWCR3,Watchpoint Control Register"
bitfld.long 0x0 24.--28. "MASK,Watchpoint address mask" "Not masked,Reserved,Reserved,0x7,0xF,0x1F,0x3F,0x7F,0xFF,0x1FF,0x3FF,0x7FF,0xFFF,0x1FFF,0x3FFF,0x7FFF,0xFFFF,0x1FFFF,0x3FFFF,0x7FFFF,0xFFFFF,0x1FFFFF,0x3FFFFF,0x7FFFFF,0xFFFFFF,0x1FFFFFF,0x3FFFFFF,0x7FFFFFF,0xFFFFFFF,0x1FFFFFFF,0x3FFFFFFF,0x7FFFFFFF"
bitfld.long 0x0 20. "WT,Watchpoint Type" "Unlinked data address match,Linked data address match"
bitfld.long 0x0 16.--19. "LBN,Linked BRP number" "BRP,BRP1,BRP2,BRP3,BRP4,BRP5,BRP6,BRP7,BRP8,BRP9,BRP10,BRP11,BRP12,BRP13,BRP14,BRP15"
newline
bitfld.long 0x0 14.--15. "SSC,Secure state control" "Both,Non-secure,Secure,?..."
bitfld.long 0x0 13. "HMC,Hypervisor Mode Control" "Disabled,Enabled"
hexmask.long.byte 0x0 5.--12. "BAS,Byte address select"
newline
bitfld.long 0x0 3.--4. "LSC,Load/Store access control" "Reserved,Load,Store,Any"
bitfld.long 0x0 1.--2. "PAC,Privileged Access control" "Reserved,Match privileged accesses,Match unprivileged accesses,Match all accesses"
bitfld.long 0x0 0. "WE,Watchpoint enable" "Disabled,Enabled"
tree.end
tree.end
AUTOINDENT.OFF
tree.open "Interrupt Controller (GIC-500)"
base COMP.BASE("GICD",-1.)
width 17.
tree "Distributor Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)))
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 6. "       DS            ,Disable Security" "No,Yes"
textline "                          "
bitfld.long 0x00 5. " ARE_NS       ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_S      ,Affinity Routing Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       ENABLEGRP1S   ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1NS ,Enable Secure Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0 ,Enable Group 0 interrupts" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register (Non-secure access)"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
bitfld.long 0x00 4. "       ARE_NS        ,Affinity Routing Enable" "Reserved,Enabled"
textline "                          "
bitfld.long 0x00 1. " ENABLEGRP1A  ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICD_CTLR,Distributor Control Register"
rbitfld.long 0x00 31. " RWP          ,Register Write Pending. Indicates whether a register write is in progress or not" "Not pending,Pending"
bitfld.long 0x00 7. "    E1NWF      ,Enable 1 of N Wakeup Functionality" "Disabled,Enabled"
rbitfld.long 0x00 6. "       DS            ,Disable Security" "Reserved,Yes"
textline "                          "
bitfld.long 0x00 4. " ARE          ,Affinity Routing Enable" "Reserved,Enabled"
bitfld.long 0x00 1. "       ENABLEGRP1 ,Enable Group 1 interrupts" "Disabled,Enabled"
bitfld.long 0x00 0. "       ENABLEGRP0    ,Enable Group 0 interrupts" "Disabled,Enabled"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICD_TYPER,Interrupt Controller Type Register"
bitfld.long 0x00 25. " NO1N         ,Indicates whether 1 of N SPI interrupts are supported" "Supported,Not supported"
bitfld.long 0x00 24. "  A3V        ,Indicates whether the Distributor supports nonzero values of Affinity level 3" "Not supported,Supported"
bitfld.long 0x00 19.--23. "  IDBITS        ,The number of interrupt identifier bits supported" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                          "
bitfld.long 0x00 17. " LPIS         ,Indicates whether the implementation supports LPIs" "Not supported,Supported"
bitfld.long 0x00 16. "  MBIS       ,Indicates whether the implementation supports message-based interrupts by writing to Distributor registers" "Not supported,Supported"
bitfld.long 0x00 10. "  SECURITYEXTN  ,Indicates whether interrupt controller implements the security extensions" "Not implemented,Implemented"
textline "                          "
bitfld.long 0x00 5.--7. " CPUNUMBER    ,Reports the number of PEs that can be used when affinity routing is not enabled" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--4. "              ITLN       ,Indicates the maximum SPI INTID that the GIC implementation supports" "Up to 32,Up to 64,Up to 96,Up to 128,Up to 160,Up to 192,Up to 224,Up to 256,Up to 288,Up to 320,Up to 352,Up to 384,Up to 416,Up to 448,Up to 480,Up to 512,Up to 544,Up to 576,Up to 608,Up to 640,Up to 672,Up to 704,Up to 736,Up to 768,Up to 800,Up to 832,Up to 864,Up to 896,Up to 928,Up to 960,Up to 992,Reserved"
rgroup.long 0x0008++0x03
line.long 0x00 "GICD_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. " PRODID       ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "        VAR        ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                          "
bitfld.long 0x00 12.--15. " REV          ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "             IMP        ,Implementer"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x10000)==0x10000)
wgroup.long 0x40++0x03
line.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
wgroup.long 0x48++0x03
line.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x50))
wgroup.long 0x50++0x03
line.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register (Non-secure access)"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x58))
wgroup.long 0x58++0x03
line.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Secure access)"
hexmask.long.word 0x00 0.--9. 1. " INTID        ,The INTID of the SPI"
else
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register (Non-secure access)"
endif
else
hgroup.long 0x40++0x03
hide.long 0x00 "GICD_SETSPI_NSR,Non-secure SPI Set Register"
hgroup.long 0x48++0x03
hide.long 0x00 "GICD_CLRSPI_NSR,Non-secure SPI Clear Register"
hgroup.long 0x50++0x03
hide.long 0x00 "GICD_SETSPI_SR,Secure SPI Set Register"
hgroup.long 0x58++0x03
hide.long 0x00 "GICD_CLRSPI_SR,Secure SPI Clear Register"
endif
width 17.
tree "Group Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0080))
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Secure Access)"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30  ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29  ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27  ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26  ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24  ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23  ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21  ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20  ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18  ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17  ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15  ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14  ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12  ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11  ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9   ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8   ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6   ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5   ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3   ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2   ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0   ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)
group.long 0x0080++0x03
line.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. " GSB31  ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30  ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29  ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB28  ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27  ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26  ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB25  ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24  ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23  ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB22  ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21  ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20  ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB19  ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18  ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17  ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB16  ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15  ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14  ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB13  ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12  ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11  ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB10  ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9   ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8   ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB7   ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6   ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5   ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB4   ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3   ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2   ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB1   ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0   ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x0080++0x03
hide.long 0x0 "GICD_IGROUPR0,Interrupt Group Register 0 (Non-secure access)"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x84))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 (Secure Access)"
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB62  ,Group Status Bit 62" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB61  ,Group Status Bit 61" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB59  ,Group Status Bit 59" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB58  ,Group Status Bit 58" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB56  ,Group Status Bit 56" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB55  ,Group Status Bit 55" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB53  ,Group Status Bit 53" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB52  ,Group Status Bit 52" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB50  ,Group Status Bit 50" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB49  ,Group Status Bit 49" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB47  ,Group Status Bit 47" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB46  ,Group Status Bit 46" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB44  ,Group Status Bit 44" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB43  ,Group Status Bit 43" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB41  ,Group Status Bit 41" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB40  ,Group Status Bit 40" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB38  ,Group Status Bit 38" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB37  ,Group Status Bit 37" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB35  ,Group Status Bit 35" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB34  ,Group Status Bit 34" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB32  ,Group Status Bit 32" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1))
group.long 0x0084++0x03
line.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
bitfld.long 0x00 31. " GSB63  ,Group Status Bit 63" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB62  ,Group Status Bit 62" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB61  ,Group Status Bit 61" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB60  ,Group Status Bit 60" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB59  ,Group Status Bit 59" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB58  ,Group Status Bit 58" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB57  ,Group Status Bit 57" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB56  ,Group Status Bit 56" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB55  ,Group Status Bit 55" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB54  ,Group Status Bit 54" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB53  ,Group Status Bit 53" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB52  ,Group Status Bit 52" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB51  ,Group Status Bit 51" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB50  ,Group Status Bit 50" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB49  ,Group Status Bit 49" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB48  ,Group Status Bit 48" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB47  ,Group Status Bit 47" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB46  ,Group Status Bit 46" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB45  ,Group Status Bit 45" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB44  ,Group Status Bit 44" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB43  ,Group Status Bit 43" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB42  ,Group Status Bit 42" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB41  ,Group Status Bit 41" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB40  ,Group Status Bit 40" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB39  ,Group Status Bit 39" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB38  ,Group Status Bit 38" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB37  ,Group Status Bit 37" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB36  ,Group Status Bit 36" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB35  ,Group Status Bit 35" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB34  ,Group Status Bit 34" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB33  ,Group Status Bit 33" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB32  ,Group Status Bit 32" "Group 0,Group 1"
else
hgroup.long 0x0084++0x03
hide.long 0x0 "GICD_IGROUPR1 ,Interrupt Group Register 1 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x88))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 (Secure Access)"
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB94  ,Group Status Bit 94" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB93  ,Group Status Bit 93" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB91  ,Group Status Bit 91" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB90  ,Group Status Bit 90" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB88  ,Group Status Bit 88" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB87  ,Group Status Bit 87" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB85  ,Group Status Bit 85" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB84  ,Group Status Bit 84" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB82  ,Group Status Bit 82" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB81  ,Group Status Bit 81" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB79  ,Group Status Bit 79" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB78  ,Group Status Bit 78" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB76  ,Group Status Bit 76" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB75  ,Group Status Bit 75" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB73  ,Group Status Bit 73" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB72  ,Group Status Bit 72" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB70  ,Group Status Bit 70" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB69  ,Group Status Bit 69" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB67  ,Group Status Bit 67" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB66  ,Group Status Bit 66" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB64  ,Group Status Bit 64" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2))
group.long 0x0088++0x03
line.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
bitfld.long 0x00 31. " GSB95  ,Group Status Bit 95" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB94  ,Group Status Bit 94" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB93  ,Group Status Bit 93" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB92  ,Group Status Bit 92" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB91  ,Group Status Bit 91" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB90  ,Group Status Bit 90" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB89  ,Group Status Bit 89" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB88  ,Group Status Bit 88" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB87  ,Group Status Bit 87" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB86  ,Group Status Bit 86" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB85  ,Group Status Bit 85" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB84  ,Group Status Bit 84" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB83  ,Group Status Bit 83" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB82  ,Group Status Bit 82" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB81  ,Group Status Bit 81" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB80  ,Group Status Bit 80" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB79  ,Group Status Bit 79" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB78  ,Group Status Bit 78" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB77  ,Group Status Bit 77" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB76  ,Group Status Bit 76" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB75  ,Group Status Bit 75" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB74  ,Group Status Bit 74" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB73  ,Group Status Bit 73" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB72  ,Group Status Bit 72" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB71  ,Group Status Bit 71" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB70  ,Group Status Bit 70" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB69  ,Group Status Bit 69" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB68  ,Group Status Bit 68" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB67  ,Group Status Bit 67" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB66  ,Group Status Bit 66" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB65  ,Group Status Bit 65" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB64  ,Group Status Bit 64" "Group 0,Group 1"
else
hgroup.long 0x0088++0x03
hide.long 0x0 "GICD_IGROUPR2 ,Interrupt Group Register 2 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x8C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 (Secure Access)"
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB126 ,Group Status Bit 126" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB125 ,Group Status Bit 125" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB123 ,Group Status Bit 123" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB122 ,Group Status Bit 122" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB120 ,Group Status Bit 120" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB119 ,Group Status Bit 119" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB117 ,Group Status Bit 117" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB116 ,Group Status Bit 116" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB114 ,Group Status Bit 114" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB113 ,Group Status Bit 113" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB111 ,Group Status Bit 111" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB110 ,Group Status Bit 110" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB108 ,Group Status Bit 108" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB107 ,Group Status Bit 107" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB105 ,Group Status Bit 105" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB104 ,Group Status Bit 104" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB102 ,Group Status Bit 102" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB101 ,Group Status Bit 101" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB99  ,Group Status Bit 99" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB98  ,Group Status Bit 98" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB96  ,Group Status Bit 96" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3))
group.long 0x008C++0x03
line.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
bitfld.long 0x00 31. " GSB127 ,Group Status Bit 127" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB126 ,Group Status Bit 126" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB125 ,Group Status Bit 125" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB124 ,Group Status Bit 124" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB123 ,Group Status Bit 123" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB122 ,Group Status Bit 122" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB121 ,Group Status Bit 121" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB120 ,Group Status Bit 120" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB119 ,Group Status Bit 119" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB118 ,Group Status Bit 118" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB117 ,Group Status Bit 117" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB116 ,Group Status Bit 116" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB115 ,Group Status Bit 115" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB114 ,Group Status Bit 114" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB113 ,Group Status Bit 113" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB112 ,Group Status Bit 112" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB111 ,Group Status Bit 111" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB110 ,Group Status Bit 110" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB109 ,Group Status Bit 109" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB108 ,Group Status Bit 108" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB107 ,Group Status Bit 107" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB106 ,Group Status Bit 106" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB105 ,Group Status Bit 105" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB104 ,Group Status Bit 104" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB103 ,Group Status Bit 103" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB102 ,Group Status Bit 102" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB101 ,Group Status Bit 101" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB100 ,Group Status Bit 100" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB99  ,Group Status Bit 99" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB98  ,Group Status Bit 98" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB97  ,Group Status Bit 97" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB96  ,Group Status Bit 96" "Group 0,Group 1"
else
hgroup.long 0x008C++0x03
hide.long 0x0 "GICD_IGROUPR3 ,Interrupt Group Register 3 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x90))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 (Secure Access)"
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB158 ,Group Status Bit 158" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB157 ,Group Status Bit 157" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB155 ,Group Status Bit 155" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB154 ,Group Status Bit 154" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB152 ,Group Status Bit 152" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB151 ,Group Status Bit 151" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB149 ,Group Status Bit 149" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB148 ,Group Status Bit 148" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB146 ,Group Status Bit 146" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB145 ,Group Status Bit 145" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB143 ,Group Status Bit 143" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB142 ,Group Status Bit 142" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB140 ,Group Status Bit 140" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB139 ,Group Status Bit 139" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB137 ,Group Status Bit 137" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB136 ,Group Status Bit 136" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB134 ,Group Status Bit 134" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB133 ,Group Status Bit 133" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB131 ,Group Status Bit 131" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB130 ,Group Status Bit 130" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB128 ,Group Status Bit 128" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4))
group.long 0x0090++0x03
line.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
bitfld.long 0x00 31. " GSB159 ,Group Status Bit 159" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB158 ,Group Status Bit 158" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB157 ,Group Status Bit 157" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB156 ,Group Status Bit 156" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB155 ,Group Status Bit 155" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB154 ,Group Status Bit 154" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB153 ,Group Status Bit 153" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB152 ,Group Status Bit 152" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB151 ,Group Status Bit 151" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB150 ,Group Status Bit 150" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB149 ,Group Status Bit 149" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB148 ,Group Status Bit 148" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB147 ,Group Status Bit 147" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB146 ,Group Status Bit 146" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB145 ,Group Status Bit 145" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB144 ,Group Status Bit 144" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB143 ,Group Status Bit 143" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB142 ,Group Status Bit 142" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB141 ,Group Status Bit 141" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB140 ,Group Status Bit 140" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB139 ,Group Status Bit 139" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB138 ,Group Status Bit 138" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB137 ,Group Status Bit 137" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB136 ,Group Status Bit 136" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB135 ,Group Status Bit 135" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB134 ,Group Status Bit 134" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB133 ,Group Status Bit 133" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB132 ,Group Status Bit 132" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB131 ,Group Status Bit 131" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB130 ,Group Status Bit 130" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB129 ,Group Status Bit 129" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB128 ,Group Status Bit 128" "Group 0,Group 1"
else
hgroup.long 0x0090++0x03
hide.long 0x0 "GICD_IGROUPR4 ,Interrupt Group Register 4 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x94))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 (Secure Access)"
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB190 ,Group Status Bit 190" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB189 ,Group Status Bit 189" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB187 ,Group Status Bit 187" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB186 ,Group Status Bit 186" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB184 ,Group Status Bit 184" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB183 ,Group Status Bit 183" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB181 ,Group Status Bit 181" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB180 ,Group Status Bit 180" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB178 ,Group Status Bit 178" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB177 ,Group Status Bit 177" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB175 ,Group Status Bit 175" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB174 ,Group Status Bit 174" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB172 ,Group Status Bit 172" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB171 ,Group Status Bit 171" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB169 ,Group Status Bit 169" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB168 ,Group Status Bit 168" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB166 ,Group Status Bit 166" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB165 ,Group Status Bit 165" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB163 ,Group Status Bit 163" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB162 ,Group Status Bit 162" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB160 ,Group Status Bit 160" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5))
group.long 0x0094++0x03
line.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
bitfld.long 0x00 31. " GSB191 ,Group Status Bit 191" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB190 ,Group Status Bit 190" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB189 ,Group Status Bit 189" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB188 ,Group Status Bit 188" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB187 ,Group Status Bit 187" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB186 ,Group Status Bit 186" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB185 ,Group Status Bit 185" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB184 ,Group Status Bit 184" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB183 ,Group Status Bit 183" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB182 ,Group Status Bit 182" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB181 ,Group Status Bit 181" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB180 ,Group Status Bit 180" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB179 ,Group Status Bit 179" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB178 ,Group Status Bit 178" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB177 ,Group Status Bit 177" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB176 ,Group Status Bit 176" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB175 ,Group Status Bit 175" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB174 ,Group Status Bit 174" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB173 ,Group Status Bit 173" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB172 ,Group Status Bit 172" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB171 ,Group Status Bit 171" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB170 ,Group Status Bit 170" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB169 ,Group Status Bit 169" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB168 ,Group Status Bit 168" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB167 ,Group Status Bit 167" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB166 ,Group Status Bit 166" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB165 ,Group Status Bit 165" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB164 ,Group Status Bit 164" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB163 ,Group Status Bit 163" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB162 ,Group Status Bit 162" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB161 ,Group Status Bit 161" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB160 ,Group Status Bit 160" "Group 0,Group 1"
else
hgroup.long 0x0094++0x03
hide.long 0x0 "GICD_IGROUPR5 ,Interrupt Group Register 5 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x98))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 (Secure Access)"
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB222 ,Group Status Bit 222" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB221 ,Group Status Bit 221" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB219 ,Group Status Bit 219" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB218 ,Group Status Bit 218" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB216 ,Group Status Bit 216" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB215 ,Group Status Bit 215" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB213 ,Group Status Bit 213" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB212 ,Group Status Bit 212" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB210 ,Group Status Bit 210" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB209 ,Group Status Bit 209" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB207 ,Group Status Bit 207" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB206 ,Group Status Bit 206" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB204 ,Group Status Bit 204" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB203 ,Group Status Bit 203" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB201 ,Group Status Bit 201" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB200 ,Group Status Bit 200" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB198 ,Group Status Bit 198" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB197 ,Group Status Bit 197" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB195 ,Group Status Bit 195" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB194 ,Group Status Bit 194" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB192 ,Group Status Bit 192" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6))
group.long 0x0098++0x03
line.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
bitfld.long 0x00 31. " GSB223 ,Group Status Bit 223" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB222 ,Group Status Bit 222" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB221 ,Group Status Bit 221" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB220 ,Group Status Bit 220" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB219 ,Group Status Bit 219" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB218 ,Group Status Bit 218" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB217 ,Group Status Bit 217" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB216 ,Group Status Bit 216" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB215 ,Group Status Bit 215" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB214 ,Group Status Bit 214" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB213 ,Group Status Bit 213" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB212 ,Group Status Bit 212" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB211 ,Group Status Bit 211" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB210 ,Group Status Bit 210" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB209 ,Group Status Bit 209" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB208 ,Group Status Bit 208" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB207 ,Group Status Bit 207" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB206 ,Group Status Bit 206" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB205 ,Group Status Bit 205" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB204 ,Group Status Bit 204" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB203 ,Group Status Bit 203" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB202 ,Group Status Bit 202" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB201 ,Group Status Bit 201" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB200 ,Group Status Bit 200" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB199 ,Group Status Bit 199" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB198 ,Group Status Bit 198" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB197 ,Group Status Bit 197" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB196 ,Group Status Bit 196" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB195 ,Group Status Bit 195" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB194 ,Group Status Bit 194" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB193 ,Group Status Bit 193" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB192 ,Group Status Bit 192" "Group 0,Group 1"
else
hgroup.long 0x0098++0x03
hide.long 0x0 "GICD_IGROUPR6 ,Interrupt Group Register 6 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x9C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 (Secure Access)"
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB254 ,Group Status Bit 254" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB253 ,Group Status Bit 253" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB251 ,Group Status Bit 251" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB250 ,Group Status Bit 250" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB248 ,Group Status Bit 248" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB247 ,Group Status Bit 247" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB245 ,Group Status Bit 245" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB244 ,Group Status Bit 244" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB242 ,Group Status Bit 242" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB241 ,Group Status Bit 241" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB239 ,Group Status Bit 239" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB238 ,Group Status Bit 238" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB236 ,Group Status Bit 236" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB235 ,Group Status Bit 235" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB233 ,Group Status Bit 233" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB232 ,Group Status Bit 232" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB230 ,Group Status Bit 230" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB229 ,Group Status Bit 229" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB227 ,Group Status Bit 227" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB226 ,Group Status Bit 226" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB224 ,Group Status Bit 224" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7))
group.long 0x009C++0x03
line.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
bitfld.long 0x00 31. " GSB255 ,Group Status Bit 255" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB254 ,Group Status Bit 254" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB253 ,Group Status Bit 253" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB252 ,Group Status Bit 252" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB251 ,Group Status Bit 251" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB250 ,Group Status Bit 250" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB249 ,Group Status Bit 249" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB248 ,Group Status Bit 248" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB247 ,Group Status Bit 247" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB246 ,Group Status Bit 246" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB245 ,Group Status Bit 245" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB244 ,Group Status Bit 244" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB243 ,Group Status Bit 243" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB242 ,Group Status Bit 242" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB241 ,Group Status Bit 241" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB240 ,Group Status Bit 240" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB239 ,Group Status Bit 239" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB238 ,Group Status Bit 238" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB237 ,Group Status Bit 237" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB236 ,Group Status Bit 236" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB235 ,Group Status Bit 235" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB234 ,Group Status Bit 234" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB233 ,Group Status Bit 233" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB232 ,Group Status Bit 232" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB231 ,Group Status Bit 231" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB230 ,Group Status Bit 230" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB229 ,Group Status Bit 229" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB228 ,Group Status Bit 228" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB227 ,Group Status Bit 227" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB226 ,Group Status Bit 226" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB225 ,Group Status Bit 225" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB224 ,Group Status Bit 224" "Group 0,Group 1"
else
hgroup.long 0x009C++0x03
hide.long 0x0 "GICD_IGROUPR7 ,Interrupt Group Register 7 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 (Secure Access)"
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB286 ,Group Status Bit 286" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB285 ,Group Status Bit 285" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB283 ,Group Status Bit 283" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB282 ,Group Status Bit 282" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB280 ,Group Status Bit 280" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB279 ,Group Status Bit 279" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB277 ,Group Status Bit 277" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB276 ,Group Status Bit 276" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB274 ,Group Status Bit 274" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB273 ,Group Status Bit 273" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB271 ,Group Status Bit 271" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB270 ,Group Status Bit 270" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB268 ,Group Status Bit 268" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB267 ,Group Status Bit 267" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB265 ,Group Status Bit 265" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB264 ,Group Status Bit 264" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB262 ,Group Status Bit 262" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB261 ,Group Status Bit 261" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB259 ,Group Status Bit 259" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB258 ,Group Status Bit 258" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB256 ,Group Status Bit 256" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8))
group.long 0x00A0++0x03
line.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
bitfld.long 0x00 31. " GSB287 ,Group Status Bit 287" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB286 ,Group Status Bit 286" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB285 ,Group Status Bit 285" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB284 ,Group Status Bit 284" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB283 ,Group Status Bit 283" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB282 ,Group Status Bit 282" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB281 ,Group Status Bit 281" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB280 ,Group Status Bit 280" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB279 ,Group Status Bit 279" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB278 ,Group Status Bit 278" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB277 ,Group Status Bit 277" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB276 ,Group Status Bit 276" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB275 ,Group Status Bit 275" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB274 ,Group Status Bit 274" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB273 ,Group Status Bit 273" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB272 ,Group Status Bit 272" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB271 ,Group Status Bit 271" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB270 ,Group Status Bit 270" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB269 ,Group Status Bit 269" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB268 ,Group Status Bit 268" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB267 ,Group Status Bit 267" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB266 ,Group Status Bit 266" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB265 ,Group Status Bit 265" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB264 ,Group Status Bit 264" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB263 ,Group Status Bit 263" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB262 ,Group Status Bit 262" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB261 ,Group Status Bit 261" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB260 ,Group Status Bit 260" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB259 ,Group Status Bit 259" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB258 ,Group Status Bit 258" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB257 ,Group Status Bit 257" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB256 ,Group Status Bit 256" "Group 0,Group 1"
else
hgroup.long 0x00A0++0x03
hide.long 0x0 "GICD_IGROUPR8 ,Interrupt Group Register 8 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 (Secure Access)"
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB318 ,Group Status Bit 318" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB317 ,Group Status Bit 317" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB315 ,Group Status Bit 315" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB314 ,Group Status Bit 314" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB312 ,Group Status Bit 312" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB311 ,Group Status Bit 311" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB309 ,Group Status Bit 309" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB308 ,Group Status Bit 308" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB306 ,Group Status Bit 306" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB305 ,Group Status Bit 305" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB303 ,Group Status Bit 303" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB302 ,Group Status Bit 302" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB300 ,Group Status Bit 300" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB299 ,Group Status Bit 299" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB297 ,Group Status Bit 297" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB296 ,Group Status Bit 296" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB294 ,Group Status Bit 294" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB293 ,Group Status Bit 293" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB291 ,Group Status Bit 291" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB290 ,Group Status Bit 290" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB288 ,Group Status Bit 288" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9))
group.long 0x00A4++0x03
line.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
bitfld.long 0x00 31. " GSB319 ,Group Status Bit 319" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB318 ,Group Status Bit 318" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB317 ,Group Status Bit 317" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB316 ,Group Status Bit 316" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB315 ,Group Status Bit 315" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB314 ,Group Status Bit 314" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB313 ,Group Status Bit 313" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB312 ,Group Status Bit 312" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB311 ,Group Status Bit 311" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB310 ,Group Status Bit 310" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB309 ,Group Status Bit 309" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB308 ,Group Status Bit 308" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB307 ,Group Status Bit 307" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB306 ,Group Status Bit 306" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB305 ,Group Status Bit 305" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB304 ,Group Status Bit 304" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB303 ,Group Status Bit 303" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB302 ,Group Status Bit 302" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB301 ,Group Status Bit 301" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB300 ,Group Status Bit 300" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB299 ,Group Status Bit 299" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB298 ,Group Status Bit 298" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB297 ,Group Status Bit 297" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB296 ,Group Status Bit 296" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB295 ,Group Status Bit 295" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB294 ,Group Status Bit 294" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB293 ,Group Status Bit 293" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB292 ,Group Status Bit 292" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB291 ,Group Status Bit 291" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB290 ,Group Status Bit 290" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB289 ,Group Status Bit 289" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB288 ,Group Status Bit 288" "Group 0,Group 1"
else
hgroup.long 0x00A4++0x03
hide.long 0x0 "GICD_IGROUPR9 ,Interrupt Group Register 9 "
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xA8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10 (Secure Access)"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB350 ,Group Status Bit 350" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB349 ,Group Status Bit 349" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB347 ,Group Status Bit 347" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB346 ,Group Status Bit 346" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB344 ,Group Status Bit 344" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB343 ,Group Status Bit 343" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB341 ,Group Status Bit 341" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB340 ,Group Status Bit 340" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB338 ,Group Status Bit 338" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB337 ,Group Status Bit 337" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB335 ,Group Status Bit 335" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB334 ,Group Status Bit 334" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB332 ,Group Status Bit 332" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB331 ,Group Status Bit 331" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB329 ,Group Status Bit 329" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB328 ,Group Status Bit 328" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB326 ,Group Status Bit 326" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB325 ,Group Status Bit 325" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB323 ,Group Status Bit 323" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB322 ,Group Status Bit 322" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB320 ,Group Status Bit 320" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA))
group.long 0x00A8++0x03
line.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
bitfld.long 0x00 31. " GSB351 ,Group Status Bit 351" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB350 ,Group Status Bit 350" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB349 ,Group Status Bit 349" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB348 ,Group Status Bit 348" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB347 ,Group Status Bit 347" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB346 ,Group Status Bit 346" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB345 ,Group Status Bit 345" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB344 ,Group Status Bit 344" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB343 ,Group Status Bit 343" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB342 ,Group Status Bit 342" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB341 ,Group Status Bit 341" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB340 ,Group Status Bit 340" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB339 ,Group Status Bit 339" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB338 ,Group Status Bit 338" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB337 ,Group Status Bit 337" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB336 ,Group Status Bit 336" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB335 ,Group Status Bit 335" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB334 ,Group Status Bit 334" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB333 ,Group Status Bit 333" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB332 ,Group Status Bit 332" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB331 ,Group Status Bit 331" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB330 ,Group Status Bit 330" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB329 ,Group Status Bit 329" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB328 ,Group Status Bit 328" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB327 ,Group Status Bit 327" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB326 ,Group Status Bit 326" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB325 ,Group Status Bit 325" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB324 ,Group Status Bit 324" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB323 ,Group Status Bit 323" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB322 ,Group Status Bit 322" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB321 ,Group Status Bit 321" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB320 ,Group Status Bit 320" "Group 0,Group 1"
else
hgroup.long 0x00A8++0x03
hide.long 0x0 "GICD_IGROUPR10,Interrupt Group Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xAC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11 (Secure Access)"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB382 ,Group Status Bit 382" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB381 ,Group Status Bit 381" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB379 ,Group Status Bit 379" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB378 ,Group Status Bit 378" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB376 ,Group Status Bit 376" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB375 ,Group Status Bit 375" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB373 ,Group Status Bit 373" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB372 ,Group Status Bit 372" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB370 ,Group Status Bit 370" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB369 ,Group Status Bit 369" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB367 ,Group Status Bit 367" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB366 ,Group Status Bit 366" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB364 ,Group Status Bit 364" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB363 ,Group Status Bit 363" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB361 ,Group Status Bit 361" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB360 ,Group Status Bit 360" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB358 ,Group Status Bit 358" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB357 ,Group Status Bit 357" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB355 ,Group Status Bit 355" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB354 ,Group Status Bit 354" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB352 ,Group Status Bit 352" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB))
group.long 0x00AC++0x03
line.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
bitfld.long 0x00 31. " GSB383 ,Group Status Bit 383" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB382 ,Group Status Bit 382" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB381 ,Group Status Bit 381" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB380 ,Group Status Bit 380" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB379 ,Group Status Bit 379" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB378 ,Group Status Bit 378" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB377 ,Group Status Bit 377" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB376 ,Group Status Bit 376" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB375 ,Group Status Bit 375" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB374 ,Group Status Bit 374" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB373 ,Group Status Bit 373" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB372 ,Group Status Bit 372" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB371 ,Group Status Bit 371" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB370 ,Group Status Bit 370" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB369 ,Group Status Bit 369" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB368 ,Group Status Bit 368" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB367 ,Group Status Bit 367" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB366 ,Group Status Bit 366" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB365 ,Group Status Bit 365" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB364 ,Group Status Bit 364" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB363 ,Group Status Bit 363" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB362 ,Group Status Bit 362" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB361 ,Group Status Bit 361" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB360 ,Group Status Bit 360" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB359 ,Group Status Bit 359" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB358 ,Group Status Bit 358" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB357 ,Group Status Bit 357" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB356 ,Group Status Bit 356" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB355 ,Group Status Bit 355" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB354 ,Group Status Bit 354" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB353 ,Group Status Bit 353" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB352 ,Group Status Bit 352" "Group 0,Group 1"
else
hgroup.long 0x00AC++0x03
hide.long 0x0 "GICD_IGROUPR11,Interrupt Group Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12 (Secure Access)"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB414 ,Group Status Bit 414" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB413 ,Group Status Bit 413" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB411 ,Group Status Bit 411" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB410 ,Group Status Bit 410" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB408 ,Group Status Bit 408" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB407 ,Group Status Bit 407" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB405 ,Group Status Bit 405" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB404 ,Group Status Bit 404" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB402 ,Group Status Bit 402" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB401 ,Group Status Bit 401" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB399 ,Group Status Bit 399" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB398 ,Group Status Bit 398" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB396 ,Group Status Bit 396" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB395 ,Group Status Bit 395" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB393 ,Group Status Bit 393" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB392 ,Group Status Bit 392" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB390 ,Group Status Bit 390" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB389 ,Group Status Bit 389" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB387 ,Group Status Bit 387" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB386 ,Group Status Bit 386" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB384 ,Group Status Bit 384" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC))
group.long 0x00B0++0x03
line.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
bitfld.long 0x00 31. " GSB415 ,Group Status Bit 415" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB414 ,Group Status Bit 414" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB413 ,Group Status Bit 413" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB412 ,Group Status Bit 412" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB411 ,Group Status Bit 411" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB410 ,Group Status Bit 410" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB409 ,Group Status Bit 409" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB408 ,Group Status Bit 408" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB407 ,Group Status Bit 407" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB406 ,Group Status Bit 406" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB405 ,Group Status Bit 405" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB404 ,Group Status Bit 404" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB403 ,Group Status Bit 403" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB402 ,Group Status Bit 402" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB401 ,Group Status Bit 401" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB400 ,Group Status Bit 400" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB399 ,Group Status Bit 399" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB398 ,Group Status Bit 398" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB397 ,Group Status Bit 397" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB396 ,Group Status Bit 396" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB395 ,Group Status Bit 395" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB394 ,Group Status Bit 394" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB393 ,Group Status Bit 393" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB392 ,Group Status Bit 392" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB391 ,Group Status Bit 391" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB390 ,Group Status Bit 390" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB389 ,Group Status Bit 389" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB388 ,Group Status Bit 388" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB387 ,Group Status Bit 387" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB386 ,Group Status Bit 386" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB385 ,Group Status Bit 385" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB384 ,Group Status Bit 384" "Group 0,Group 1"
else
hgroup.long 0x00B0++0x03
hide.long 0x0 "GICD_IGROUPR12,Interrupt Group Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13 (Secure Access)"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB446 ,Group Status Bit 446" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB445 ,Group Status Bit 445" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB443 ,Group Status Bit 443" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB442 ,Group Status Bit 442" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB440 ,Group Status Bit 440" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB439 ,Group Status Bit 439" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB437 ,Group Status Bit 437" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB436 ,Group Status Bit 436" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB434 ,Group Status Bit 434" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB433 ,Group Status Bit 433" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB431 ,Group Status Bit 431" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB430 ,Group Status Bit 430" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB428 ,Group Status Bit 428" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB427 ,Group Status Bit 427" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB425 ,Group Status Bit 425" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB424 ,Group Status Bit 424" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB422 ,Group Status Bit 422" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB421 ,Group Status Bit 421" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB419 ,Group Status Bit 419" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB418 ,Group Status Bit 418" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB416 ,Group Status Bit 416" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD))
group.long 0x00B4++0x03
line.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
bitfld.long 0x00 31. " GSB447 ,Group Status Bit 447" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB446 ,Group Status Bit 446" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB445 ,Group Status Bit 445" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB444 ,Group Status Bit 444" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB443 ,Group Status Bit 443" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB442 ,Group Status Bit 442" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB441 ,Group Status Bit 441" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB440 ,Group Status Bit 440" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB439 ,Group Status Bit 439" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB438 ,Group Status Bit 438" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB437 ,Group Status Bit 437" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB436 ,Group Status Bit 436" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB435 ,Group Status Bit 435" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB434 ,Group Status Bit 434" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB433 ,Group Status Bit 433" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB432 ,Group Status Bit 432" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB431 ,Group Status Bit 431" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB430 ,Group Status Bit 430" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB429 ,Group Status Bit 429" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB428 ,Group Status Bit 428" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB427 ,Group Status Bit 427" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB426 ,Group Status Bit 426" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB425 ,Group Status Bit 425" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB424 ,Group Status Bit 424" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB423 ,Group Status Bit 423" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB422 ,Group Status Bit 422" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB421 ,Group Status Bit 421" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB420 ,Group Status Bit 420" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB419 ,Group Status Bit 419" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB418 ,Group Status Bit 418" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB417 ,Group Status Bit 417" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB416 ,Group Status Bit 416" "Group 0,Group 1"
else
hgroup.long 0x00B4++0x03
hide.long 0x0 "GICD_IGROUPR13,Interrupt Group Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xB8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14 (Secure Access)"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB478 ,Group Status Bit 478" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB477 ,Group Status Bit 477" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB475 ,Group Status Bit 475" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB474 ,Group Status Bit 474" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB472 ,Group Status Bit 472" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB471 ,Group Status Bit 471" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB469 ,Group Status Bit 469" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB468 ,Group Status Bit 468" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB466 ,Group Status Bit 466" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB465 ,Group Status Bit 465" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB463 ,Group Status Bit 463" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB462 ,Group Status Bit 462" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB460 ,Group Status Bit 460" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB459 ,Group Status Bit 459" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB457 ,Group Status Bit 457" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB456 ,Group Status Bit 456" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB454 ,Group Status Bit 454" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB453 ,Group Status Bit 453" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB451 ,Group Status Bit 451" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB450 ,Group Status Bit 450" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB448 ,Group Status Bit 448" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE))
group.long 0x00B8++0x03
line.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
bitfld.long 0x00 31. " GSB479 ,Group Status Bit 479" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB478 ,Group Status Bit 478" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB477 ,Group Status Bit 477" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB476 ,Group Status Bit 476" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB475 ,Group Status Bit 475" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB474 ,Group Status Bit 474" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB473 ,Group Status Bit 473" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB472 ,Group Status Bit 472" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB471 ,Group Status Bit 471" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB470 ,Group Status Bit 470" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB469 ,Group Status Bit 469" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB468 ,Group Status Bit 468" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB467 ,Group Status Bit 467" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB466 ,Group Status Bit 466" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB465 ,Group Status Bit 465" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB464 ,Group Status Bit 464" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB463 ,Group Status Bit 463" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB462 ,Group Status Bit 462" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB461 ,Group Status Bit 461" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB460 ,Group Status Bit 460" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB459 ,Group Status Bit 459" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB458 ,Group Status Bit 458" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB457 ,Group Status Bit 457" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB456 ,Group Status Bit 456" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB455 ,Group Status Bit 455" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB454 ,Group Status Bit 454" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB453 ,Group Status Bit 453" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB452 ,Group Status Bit 452" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB451 ,Group Status Bit 451" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB450 ,Group Status Bit 450" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB449 ,Group Status Bit 449" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB448 ,Group Status Bit 448" "Group 0,Group 1"
else
hgroup.long 0x00B8++0x03
hide.long 0x0 "GICD_IGROUPR14,Interrupt Group Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xBC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15 (Secure Access)"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB510 ,Group Status Bit 510" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB509 ,Group Status Bit 509" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB507 ,Group Status Bit 507" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB506 ,Group Status Bit 506" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB504 ,Group Status Bit 504" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB503 ,Group Status Bit 503" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB501 ,Group Status Bit 501" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB500 ,Group Status Bit 500" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB498 ,Group Status Bit 498" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB497 ,Group Status Bit 497" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB495 ,Group Status Bit 495" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB494 ,Group Status Bit 494" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB492 ,Group Status Bit 492" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB491 ,Group Status Bit 491" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB489 ,Group Status Bit 489" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB488 ,Group Status Bit 488" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB486 ,Group Status Bit 486" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB485 ,Group Status Bit 485" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB483 ,Group Status Bit 483" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB482 ,Group Status Bit 482" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB480 ,Group Status Bit 480" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF))
group.long 0x00BC++0x03
line.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
bitfld.long 0x00 31. " GSB511 ,Group Status Bit 511" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB510 ,Group Status Bit 510" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB509 ,Group Status Bit 509" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB508 ,Group Status Bit 508" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB507 ,Group Status Bit 507" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB506 ,Group Status Bit 506" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB505 ,Group Status Bit 505" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB504 ,Group Status Bit 504" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB503 ,Group Status Bit 503" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB502 ,Group Status Bit 502" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB501 ,Group Status Bit 501" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB500 ,Group Status Bit 500" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB499 ,Group Status Bit 499" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB498 ,Group Status Bit 498" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB497 ,Group Status Bit 497" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB496 ,Group Status Bit 496" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB495 ,Group Status Bit 495" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB494 ,Group Status Bit 494" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB493 ,Group Status Bit 493" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB492 ,Group Status Bit 492" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB491 ,Group Status Bit 491" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB490 ,Group Status Bit 490" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB489 ,Group Status Bit 489" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB488 ,Group Status Bit 488" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB487 ,Group Status Bit 487" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB486 ,Group Status Bit 486" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB485 ,Group Status Bit 485" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB484 ,Group Status Bit 484" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB483 ,Group Status Bit 483" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB482 ,Group Status Bit 482" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB481 ,Group Status Bit 481" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB480 ,Group Status Bit 480" "Group 0,Group 1"
else
hgroup.long 0x00BC++0x03
hide.long 0x0 "GICD_IGROUPR15,Interrupt Group Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16 (Secure Access)"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB542 ,Group Status Bit 542" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB541 ,Group Status Bit 541" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB539 ,Group Status Bit 539" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB538 ,Group Status Bit 538" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB536 ,Group Status Bit 536" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB535 ,Group Status Bit 535" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB533 ,Group Status Bit 533" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB532 ,Group Status Bit 532" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB530 ,Group Status Bit 530" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB529 ,Group Status Bit 529" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB527 ,Group Status Bit 527" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB526 ,Group Status Bit 526" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB524 ,Group Status Bit 524" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB523 ,Group Status Bit 523" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB521 ,Group Status Bit 521" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB520 ,Group Status Bit 520" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB518 ,Group Status Bit 518" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB517 ,Group Status Bit 517" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB515 ,Group Status Bit 515" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB514 ,Group Status Bit 514" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB512 ,Group Status Bit 512" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x00C0++0x03
line.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
bitfld.long 0x00 31. " GSB543 ,Group Status Bit 543" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB542 ,Group Status Bit 542" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB541 ,Group Status Bit 541" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB540 ,Group Status Bit 540" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB539 ,Group Status Bit 539" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB538 ,Group Status Bit 538" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB537 ,Group Status Bit 537" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB536 ,Group Status Bit 536" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB535 ,Group Status Bit 535" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB534 ,Group Status Bit 534" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB533 ,Group Status Bit 533" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB532 ,Group Status Bit 532" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB531 ,Group Status Bit 531" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB530 ,Group Status Bit 530" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB529 ,Group Status Bit 529" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB528 ,Group Status Bit 528" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB527 ,Group Status Bit 527" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB526 ,Group Status Bit 526" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB525 ,Group Status Bit 525" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB524 ,Group Status Bit 524" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB523 ,Group Status Bit 523" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB522 ,Group Status Bit 522" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB521 ,Group Status Bit 521" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB520 ,Group Status Bit 520" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB519 ,Group Status Bit 519" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB518 ,Group Status Bit 518" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB517 ,Group Status Bit 517" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB516 ,Group Status Bit 516" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB515 ,Group Status Bit 515" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB514 ,Group Status Bit 514" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB513 ,Group Status Bit 513" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB512 ,Group Status Bit 512" "Group 0,Group 1"
else
hgroup.long 0x00C0++0x03
hide.long 0x0 "GICD_IGROUPR16,Interrupt Group Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17 (Secure Access)"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB574 ,Group Status Bit 574" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB573 ,Group Status Bit 573" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB571 ,Group Status Bit 571" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB570 ,Group Status Bit 570" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB568 ,Group Status Bit 568" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB567 ,Group Status Bit 567" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB565 ,Group Status Bit 565" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB564 ,Group Status Bit 564" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB562 ,Group Status Bit 562" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB561 ,Group Status Bit 561" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB559 ,Group Status Bit 559" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB558 ,Group Status Bit 558" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB556 ,Group Status Bit 556" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB555 ,Group Status Bit 555" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB553 ,Group Status Bit 553" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB552 ,Group Status Bit 552" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB550 ,Group Status Bit 550" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB549 ,Group Status Bit 549" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB547 ,Group Status Bit 547" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB546 ,Group Status Bit 546" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB544 ,Group Status Bit 544" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x00C4++0x03
line.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
bitfld.long 0x00 31. " GSB575 ,Group Status Bit 575" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB574 ,Group Status Bit 574" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB573 ,Group Status Bit 573" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB572 ,Group Status Bit 572" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB571 ,Group Status Bit 571" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB570 ,Group Status Bit 570" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB569 ,Group Status Bit 569" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB568 ,Group Status Bit 568" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB567 ,Group Status Bit 567" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB566 ,Group Status Bit 566" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB565 ,Group Status Bit 565" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB564 ,Group Status Bit 564" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB563 ,Group Status Bit 563" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB562 ,Group Status Bit 562" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB561 ,Group Status Bit 561" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB560 ,Group Status Bit 560" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB559 ,Group Status Bit 559" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB558 ,Group Status Bit 558" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB557 ,Group Status Bit 557" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB556 ,Group Status Bit 556" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB555 ,Group Status Bit 555" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB554 ,Group Status Bit 554" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB553 ,Group Status Bit 553" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB552 ,Group Status Bit 552" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB551 ,Group Status Bit 551" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB550 ,Group Status Bit 550" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB549 ,Group Status Bit 549" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB548 ,Group Status Bit 548" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB547 ,Group Status Bit 547" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB546 ,Group Status Bit 546" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB545 ,Group Status Bit 545" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB544 ,Group Status Bit 544" "Group 0,Group 1"
else
hgroup.long 0x00C4++0x03
hide.long 0x0 "GICD_IGROUPR17,Interrupt Group Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xC8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18 (Secure Access)"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB606 ,Group Status Bit 606" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB605 ,Group Status Bit 605" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB603 ,Group Status Bit 603" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB602 ,Group Status Bit 602" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB600 ,Group Status Bit 600" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB599 ,Group Status Bit 599" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB597 ,Group Status Bit 597" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB596 ,Group Status Bit 596" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB594 ,Group Status Bit 594" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB593 ,Group Status Bit 593" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB591 ,Group Status Bit 591" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB590 ,Group Status Bit 590" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB588 ,Group Status Bit 588" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB587 ,Group Status Bit 587" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB585 ,Group Status Bit 585" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB584 ,Group Status Bit 584" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB582 ,Group Status Bit 582" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB581 ,Group Status Bit 581" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB579 ,Group Status Bit 579" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB578 ,Group Status Bit 578" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB576 ,Group Status Bit 576" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x00C8++0x03
line.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
bitfld.long 0x00 31. " GSB607 ,Group Status Bit 607" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB606 ,Group Status Bit 606" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB605 ,Group Status Bit 605" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB604 ,Group Status Bit 604" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB603 ,Group Status Bit 603" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB602 ,Group Status Bit 602" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB601 ,Group Status Bit 601" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB600 ,Group Status Bit 600" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB599 ,Group Status Bit 599" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB598 ,Group Status Bit 598" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB597 ,Group Status Bit 597" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB596 ,Group Status Bit 596" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB595 ,Group Status Bit 595" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB594 ,Group Status Bit 594" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB593 ,Group Status Bit 593" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB592 ,Group Status Bit 592" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB591 ,Group Status Bit 591" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB590 ,Group Status Bit 590" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB589 ,Group Status Bit 589" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB588 ,Group Status Bit 588" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB587 ,Group Status Bit 587" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB586 ,Group Status Bit 586" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB585 ,Group Status Bit 585" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB584 ,Group Status Bit 584" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB583 ,Group Status Bit 583" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB582 ,Group Status Bit 582" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB581 ,Group Status Bit 581" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB580 ,Group Status Bit 580" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB579 ,Group Status Bit 579" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB578 ,Group Status Bit 578" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB577 ,Group Status Bit 577" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB576 ,Group Status Bit 576" "Group 0,Group 1"
else
hgroup.long 0x00C8++0x03
hide.long 0x0 "GICD_IGROUPR18,Interrupt Group Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xCC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19 (Secure Access)"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB638 ,Group Status Bit 638" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB637 ,Group Status Bit 637" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB635 ,Group Status Bit 635" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB634 ,Group Status Bit 634" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB632 ,Group Status Bit 632" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB631 ,Group Status Bit 631" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB629 ,Group Status Bit 629" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB628 ,Group Status Bit 628" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB626 ,Group Status Bit 626" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB625 ,Group Status Bit 625" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB623 ,Group Status Bit 623" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB622 ,Group Status Bit 622" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB620 ,Group Status Bit 620" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB619 ,Group Status Bit 619" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB617 ,Group Status Bit 617" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB616 ,Group Status Bit 616" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB614 ,Group Status Bit 614" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB613 ,Group Status Bit 613" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB611 ,Group Status Bit 611" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB610 ,Group Status Bit 610" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB608 ,Group Status Bit 608" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x00CC++0x03
line.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
bitfld.long 0x00 31. " GSB639 ,Group Status Bit 639" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB638 ,Group Status Bit 638" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB637 ,Group Status Bit 637" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB636 ,Group Status Bit 636" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB635 ,Group Status Bit 635" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB634 ,Group Status Bit 634" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB633 ,Group Status Bit 633" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB632 ,Group Status Bit 632" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB631 ,Group Status Bit 631" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB630 ,Group Status Bit 630" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB629 ,Group Status Bit 629" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB628 ,Group Status Bit 628" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB627 ,Group Status Bit 627" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB626 ,Group Status Bit 626" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB625 ,Group Status Bit 625" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB624 ,Group Status Bit 624" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB623 ,Group Status Bit 623" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB622 ,Group Status Bit 622" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB621 ,Group Status Bit 621" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB620 ,Group Status Bit 620" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB619 ,Group Status Bit 619" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB618 ,Group Status Bit 618" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB617 ,Group Status Bit 617" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB616 ,Group Status Bit 616" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB615 ,Group Status Bit 615" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB614 ,Group Status Bit 614" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB613 ,Group Status Bit 613" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB612 ,Group Status Bit 612" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB611 ,Group Status Bit 611" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB610 ,Group Status Bit 610" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB609 ,Group Status Bit 609" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB608 ,Group Status Bit 608" "Group 0,Group 1"
else
hgroup.long 0x00CC++0x03
hide.long 0x0 "GICD_IGROUPR19,Interrupt Group Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20 (Secure Access)"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB670 ,Group Status Bit 670" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB669 ,Group Status Bit 669" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB667 ,Group Status Bit 667" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB666 ,Group Status Bit 666" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB664 ,Group Status Bit 664" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB663 ,Group Status Bit 663" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB661 ,Group Status Bit 661" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB660 ,Group Status Bit 660" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB658 ,Group Status Bit 658" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB657 ,Group Status Bit 657" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB655 ,Group Status Bit 655" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB654 ,Group Status Bit 654" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB652 ,Group Status Bit 652" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB651 ,Group Status Bit 651" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB649 ,Group Status Bit 649" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB648 ,Group Status Bit 648" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB646 ,Group Status Bit 646" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB645 ,Group Status Bit 645" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB643 ,Group Status Bit 643" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB642 ,Group Status Bit 642" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB640 ,Group Status Bit 640" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x00D0++0x03
line.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
bitfld.long 0x00 31. " GSB671 ,Group Status Bit 671" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB670 ,Group Status Bit 670" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB669 ,Group Status Bit 669" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB668 ,Group Status Bit 668" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB667 ,Group Status Bit 667" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB666 ,Group Status Bit 666" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB665 ,Group Status Bit 665" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB664 ,Group Status Bit 664" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB663 ,Group Status Bit 663" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB662 ,Group Status Bit 662" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB661 ,Group Status Bit 661" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB660 ,Group Status Bit 660" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB659 ,Group Status Bit 659" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB658 ,Group Status Bit 658" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB657 ,Group Status Bit 657" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB656 ,Group Status Bit 656" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB655 ,Group Status Bit 655" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB654 ,Group Status Bit 654" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB653 ,Group Status Bit 653" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB652 ,Group Status Bit 652" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB651 ,Group Status Bit 651" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB650 ,Group Status Bit 650" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB649 ,Group Status Bit 649" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB648 ,Group Status Bit 648" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB647 ,Group Status Bit 647" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB646 ,Group Status Bit 646" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB645 ,Group Status Bit 645" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB644 ,Group Status Bit 644" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB643 ,Group Status Bit 643" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB642 ,Group Status Bit 642" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB641 ,Group Status Bit 641" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB640 ,Group Status Bit 640" "Group 0,Group 1"
else
hgroup.long 0x00D0++0x03
hide.long 0x0 "GICD_IGROUPR20,Interrupt Group Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21 (Secure Access)"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB702 ,Group Status Bit 702" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB701 ,Group Status Bit 701" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB699 ,Group Status Bit 699" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB698 ,Group Status Bit 698" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB696 ,Group Status Bit 696" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB695 ,Group Status Bit 695" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB693 ,Group Status Bit 693" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB692 ,Group Status Bit 692" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB690 ,Group Status Bit 690" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB689 ,Group Status Bit 689" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB687 ,Group Status Bit 687" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB686 ,Group Status Bit 686" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB684 ,Group Status Bit 684" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB683 ,Group Status Bit 683" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB681 ,Group Status Bit 681" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB680 ,Group Status Bit 680" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB678 ,Group Status Bit 678" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB677 ,Group Status Bit 677" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB675 ,Group Status Bit 675" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB674 ,Group Status Bit 674" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB672 ,Group Status Bit 672" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x00D4++0x03
line.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
bitfld.long 0x00 31. " GSB703 ,Group Status Bit 703" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB702 ,Group Status Bit 702" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB701 ,Group Status Bit 701" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB700 ,Group Status Bit 700" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB699 ,Group Status Bit 699" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB698 ,Group Status Bit 698" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB697 ,Group Status Bit 697" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB696 ,Group Status Bit 696" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB695 ,Group Status Bit 695" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB694 ,Group Status Bit 694" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB693 ,Group Status Bit 693" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB692 ,Group Status Bit 692" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB691 ,Group Status Bit 691" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB690 ,Group Status Bit 690" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB689 ,Group Status Bit 689" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB688 ,Group Status Bit 688" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB687 ,Group Status Bit 687" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB686 ,Group Status Bit 686" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB685 ,Group Status Bit 685" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB684 ,Group Status Bit 684" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB683 ,Group Status Bit 683" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB682 ,Group Status Bit 682" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB681 ,Group Status Bit 681" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB680 ,Group Status Bit 680" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB679 ,Group Status Bit 679" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB678 ,Group Status Bit 678" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB677 ,Group Status Bit 677" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB676 ,Group Status Bit 676" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB675 ,Group Status Bit 675" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB674 ,Group Status Bit 674" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB673 ,Group Status Bit 673" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB672 ,Group Status Bit 672" "Group 0,Group 1"
else
hgroup.long 0x00D4++0x03
hide.long 0x0 "GICD_IGROUPR21,Interrupt Group Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xD8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22 (Secure Access)"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB734 ,Group Status Bit 734" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB733 ,Group Status Bit 733" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB731 ,Group Status Bit 731" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB730 ,Group Status Bit 730" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB728 ,Group Status Bit 728" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB727 ,Group Status Bit 727" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB725 ,Group Status Bit 725" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB724 ,Group Status Bit 724" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB722 ,Group Status Bit 722" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB721 ,Group Status Bit 721" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB719 ,Group Status Bit 719" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB718 ,Group Status Bit 718" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB716 ,Group Status Bit 716" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB715 ,Group Status Bit 715" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB713 ,Group Status Bit 713" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB712 ,Group Status Bit 712" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB710 ,Group Status Bit 710" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB709 ,Group Status Bit 709" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB707 ,Group Status Bit 707" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB706 ,Group Status Bit 706" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB704 ,Group Status Bit 704" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x00D8++0x03
line.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
bitfld.long 0x00 31. " GSB735 ,Group Status Bit 735" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB734 ,Group Status Bit 734" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB733 ,Group Status Bit 733" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB732 ,Group Status Bit 732" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB731 ,Group Status Bit 731" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB730 ,Group Status Bit 730" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB729 ,Group Status Bit 729" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB728 ,Group Status Bit 728" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB727 ,Group Status Bit 727" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB726 ,Group Status Bit 726" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB725 ,Group Status Bit 725" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB724 ,Group Status Bit 724" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB723 ,Group Status Bit 723" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB722 ,Group Status Bit 722" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB721 ,Group Status Bit 721" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB720 ,Group Status Bit 720" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB719 ,Group Status Bit 719" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB718 ,Group Status Bit 718" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB717 ,Group Status Bit 717" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB716 ,Group Status Bit 716" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB715 ,Group Status Bit 715" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB714 ,Group Status Bit 714" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB713 ,Group Status Bit 713" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB712 ,Group Status Bit 712" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB711 ,Group Status Bit 711" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB710 ,Group Status Bit 710" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB709 ,Group Status Bit 709" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB708 ,Group Status Bit 708" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB707 ,Group Status Bit 707" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB706 ,Group Status Bit 706" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB705 ,Group Status Bit 705" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB704 ,Group Status Bit 704" "Group 0,Group 1"
else
hgroup.long 0x00D8++0x03
hide.long 0x0 "GICD_IGROUPR22,Interrupt Group Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xDC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23 (Secure Access)"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB766 ,Group Status Bit 766" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB765 ,Group Status Bit 765" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB763 ,Group Status Bit 763" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB762 ,Group Status Bit 762" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB760 ,Group Status Bit 760" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB759 ,Group Status Bit 759" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB757 ,Group Status Bit 757" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB756 ,Group Status Bit 756" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB754 ,Group Status Bit 754" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB753 ,Group Status Bit 753" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB751 ,Group Status Bit 751" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB750 ,Group Status Bit 750" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB748 ,Group Status Bit 748" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB747 ,Group Status Bit 747" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB745 ,Group Status Bit 745" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB744 ,Group Status Bit 744" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB742 ,Group Status Bit 742" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB741 ,Group Status Bit 741" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB739 ,Group Status Bit 739" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB738 ,Group Status Bit 738" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB736 ,Group Status Bit 736" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x00DC++0x03
line.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
bitfld.long 0x00 31. " GSB767 ,Group Status Bit 767" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB766 ,Group Status Bit 766" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB765 ,Group Status Bit 765" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB764 ,Group Status Bit 764" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB763 ,Group Status Bit 763" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB762 ,Group Status Bit 762" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB761 ,Group Status Bit 761" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB760 ,Group Status Bit 760" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB759 ,Group Status Bit 759" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB758 ,Group Status Bit 758" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB757 ,Group Status Bit 757" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB756 ,Group Status Bit 756" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB755 ,Group Status Bit 755" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB754 ,Group Status Bit 754" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB753 ,Group Status Bit 753" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB752 ,Group Status Bit 752" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB751 ,Group Status Bit 751" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB750 ,Group Status Bit 750" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB749 ,Group Status Bit 749" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB748 ,Group Status Bit 748" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB747 ,Group Status Bit 747" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB746 ,Group Status Bit 746" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB745 ,Group Status Bit 745" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB744 ,Group Status Bit 744" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB743 ,Group Status Bit 743" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB742 ,Group Status Bit 742" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB741 ,Group Status Bit 741" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB740 ,Group Status Bit 740" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB739 ,Group Status Bit 739" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB738 ,Group Status Bit 738" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB737 ,Group Status Bit 737" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB736 ,Group Status Bit 736" "Group 0,Group 1"
else
hgroup.long 0x00DC++0x03
hide.long 0x0 "GICD_IGROUPR23,Interrupt Group Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24 (Secure Access)"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB798 ,Group Status Bit 798" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB797 ,Group Status Bit 797" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB795 ,Group Status Bit 795" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB794 ,Group Status Bit 794" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB792 ,Group Status Bit 792" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB791 ,Group Status Bit 791" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB789 ,Group Status Bit 789" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB788 ,Group Status Bit 788" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB786 ,Group Status Bit 786" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB785 ,Group Status Bit 785" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB783 ,Group Status Bit 783" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB782 ,Group Status Bit 782" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB780 ,Group Status Bit 780" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB779 ,Group Status Bit 779" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB777 ,Group Status Bit 777" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB776 ,Group Status Bit 776" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB774 ,Group Status Bit 774" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB773 ,Group Status Bit 773" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB771 ,Group Status Bit 771" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB770 ,Group Status Bit 770" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB768 ,Group Status Bit 768" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x00E0++0x03
line.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
bitfld.long 0x00 31. " GSB799 ,Group Status Bit 799" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB798 ,Group Status Bit 798" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB797 ,Group Status Bit 797" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB796 ,Group Status Bit 796" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB795 ,Group Status Bit 795" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB794 ,Group Status Bit 794" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB793 ,Group Status Bit 793" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB792 ,Group Status Bit 792" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB791 ,Group Status Bit 791" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB790 ,Group Status Bit 790" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB789 ,Group Status Bit 789" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB788 ,Group Status Bit 788" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB787 ,Group Status Bit 787" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB786 ,Group Status Bit 786" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB785 ,Group Status Bit 785" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB784 ,Group Status Bit 784" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB783 ,Group Status Bit 783" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB782 ,Group Status Bit 782" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB781 ,Group Status Bit 781" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB780 ,Group Status Bit 780" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB779 ,Group Status Bit 779" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB778 ,Group Status Bit 778" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB777 ,Group Status Bit 777" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB776 ,Group Status Bit 776" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB775 ,Group Status Bit 775" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB774 ,Group Status Bit 774" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB773 ,Group Status Bit 773" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB772 ,Group Status Bit 772" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB771 ,Group Status Bit 771" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB770 ,Group Status Bit 770" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB769 ,Group Status Bit 769" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB768 ,Group Status Bit 768" "Group 0,Group 1"
else
hgroup.long 0x00E0++0x03
hide.long 0x0 "GICD_IGROUPR24,Interrupt Group Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25 (Secure Access)"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB830 ,Group Status Bit 830" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB829 ,Group Status Bit 829" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB827 ,Group Status Bit 827" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB826 ,Group Status Bit 826" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB824 ,Group Status Bit 824" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB823 ,Group Status Bit 823" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB821 ,Group Status Bit 821" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB820 ,Group Status Bit 820" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB818 ,Group Status Bit 818" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB817 ,Group Status Bit 817" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB815 ,Group Status Bit 815" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB814 ,Group Status Bit 814" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB812 ,Group Status Bit 812" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB811 ,Group Status Bit 811" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB809 ,Group Status Bit 809" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB808 ,Group Status Bit 808" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB806 ,Group Status Bit 806" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB805 ,Group Status Bit 805" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB803 ,Group Status Bit 803" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB802 ,Group Status Bit 802" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB800 ,Group Status Bit 800" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x00E4++0x03
line.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
bitfld.long 0x00 31. " GSB831 ,Group Status Bit 831" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB830 ,Group Status Bit 830" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB829 ,Group Status Bit 829" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB828 ,Group Status Bit 828" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB827 ,Group Status Bit 827" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB826 ,Group Status Bit 826" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB825 ,Group Status Bit 825" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB824 ,Group Status Bit 824" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB823 ,Group Status Bit 823" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB822 ,Group Status Bit 822" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB821 ,Group Status Bit 821" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB820 ,Group Status Bit 820" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB819 ,Group Status Bit 819" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB818 ,Group Status Bit 818" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB817 ,Group Status Bit 817" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB816 ,Group Status Bit 816" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB815 ,Group Status Bit 815" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB814 ,Group Status Bit 814" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB813 ,Group Status Bit 813" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB812 ,Group Status Bit 812" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB811 ,Group Status Bit 811" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB810 ,Group Status Bit 810" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB809 ,Group Status Bit 809" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB808 ,Group Status Bit 808" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB807 ,Group Status Bit 807" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB806 ,Group Status Bit 806" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB805 ,Group Status Bit 805" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB804 ,Group Status Bit 804" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB803 ,Group Status Bit 803" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB802 ,Group Status Bit 802" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB801 ,Group Status Bit 801" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB800 ,Group Status Bit 800" "Group 0,Group 1"
else
hgroup.long 0x00E4++0x03
hide.long 0x0 "GICD_IGROUPR25,Interrupt Group Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26 (Secure Access)"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB862 ,Group Status Bit 862" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB861 ,Group Status Bit 861" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB859 ,Group Status Bit 859" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB858 ,Group Status Bit 858" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB856 ,Group Status Bit 856" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB855 ,Group Status Bit 855" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB853 ,Group Status Bit 853" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB852 ,Group Status Bit 852" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB850 ,Group Status Bit 850" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB849 ,Group Status Bit 849" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB847 ,Group Status Bit 847" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB846 ,Group Status Bit 846" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB844 ,Group Status Bit 844" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB843 ,Group Status Bit 843" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB841 ,Group Status Bit 841" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB840 ,Group Status Bit 840" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB838 ,Group Status Bit 838" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB837 ,Group Status Bit 837" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB835 ,Group Status Bit 835" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB834 ,Group Status Bit 834" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB832 ,Group Status Bit 832" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A))
group.long 0x00E8++0x03
line.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
bitfld.long 0x00 31. " GSB863 ,Group Status Bit 863" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB862 ,Group Status Bit 862" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB861 ,Group Status Bit 861" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB860 ,Group Status Bit 860" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB859 ,Group Status Bit 859" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB858 ,Group Status Bit 858" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB857 ,Group Status Bit 857" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB856 ,Group Status Bit 856" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB855 ,Group Status Bit 855" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB854 ,Group Status Bit 854" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB853 ,Group Status Bit 853" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB852 ,Group Status Bit 852" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB851 ,Group Status Bit 851" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB850 ,Group Status Bit 850" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB849 ,Group Status Bit 849" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB848 ,Group Status Bit 848" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB847 ,Group Status Bit 847" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB846 ,Group Status Bit 846" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB845 ,Group Status Bit 845" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB844 ,Group Status Bit 844" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB843 ,Group Status Bit 843" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB842 ,Group Status Bit 842" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB841 ,Group Status Bit 841" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB840 ,Group Status Bit 840" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB839 ,Group Status Bit 839" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB838 ,Group Status Bit 838" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB837 ,Group Status Bit 837" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB836 ,Group Status Bit 836" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB835 ,Group Status Bit 835" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB834 ,Group Status Bit 834" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB833 ,Group Status Bit 833" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB832 ,Group Status Bit 832" "Group 0,Group 1"
else
hgroup.long 0x00E8++0x03
hide.long 0x0 "GICD_IGROUPR26,Interrupt Group Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27 (Secure Access)"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB894 ,Group Status Bit 894" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB893 ,Group Status Bit 893" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB891 ,Group Status Bit 891" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB890 ,Group Status Bit 890" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB888 ,Group Status Bit 888" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB887 ,Group Status Bit 887" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB885 ,Group Status Bit 885" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB884 ,Group Status Bit 884" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB882 ,Group Status Bit 882" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB881 ,Group Status Bit 881" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB879 ,Group Status Bit 879" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB878 ,Group Status Bit 878" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB876 ,Group Status Bit 876" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB875 ,Group Status Bit 875" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB873 ,Group Status Bit 873" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB872 ,Group Status Bit 872" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB870 ,Group Status Bit 870" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB869 ,Group Status Bit 869" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB867 ,Group Status Bit 867" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB866 ,Group Status Bit 866" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB864 ,Group Status Bit 864" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x00EC++0x03
line.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
bitfld.long 0x00 31. " GSB895 ,Group Status Bit 895" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB894 ,Group Status Bit 894" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB893 ,Group Status Bit 893" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB892 ,Group Status Bit 892" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB891 ,Group Status Bit 891" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB890 ,Group Status Bit 890" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB889 ,Group Status Bit 889" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB888 ,Group Status Bit 888" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB887 ,Group Status Bit 887" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB886 ,Group Status Bit 886" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB885 ,Group Status Bit 885" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB884 ,Group Status Bit 884" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB883 ,Group Status Bit 883" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB882 ,Group Status Bit 882" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB881 ,Group Status Bit 881" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB880 ,Group Status Bit 880" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB879 ,Group Status Bit 879" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB878 ,Group Status Bit 878" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB877 ,Group Status Bit 877" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB876 ,Group Status Bit 876" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB875 ,Group Status Bit 875" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB874 ,Group Status Bit 874" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB873 ,Group Status Bit 873" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB872 ,Group Status Bit 872" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB871 ,Group Status Bit 871" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB870 ,Group Status Bit 870" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB869 ,Group Status Bit 869" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB868 ,Group Status Bit 868" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB867 ,Group Status Bit 867" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB866 ,Group Status Bit 866" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB865 ,Group Status Bit 865" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB864 ,Group Status Bit 864" "Group 0,Group 1"
else
hgroup.long 0x00EC++0x03
hide.long 0x0 "GICD_IGROUPR27,Interrupt Group Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF0))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28 (Secure Access)"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB926 ,Group Status Bit 926" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB925 ,Group Status Bit 925" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB923 ,Group Status Bit 923" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB922 ,Group Status Bit 922" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB920 ,Group Status Bit 920" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB919 ,Group Status Bit 919" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB917 ,Group Status Bit 917" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB916 ,Group Status Bit 916" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB914 ,Group Status Bit 914" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB913 ,Group Status Bit 913" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB911 ,Group Status Bit 911" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB910 ,Group Status Bit 910" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB908 ,Group Status Bit 908" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB907 ,Group Status Bit 907" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB905 ,Group Status Bit 905" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB904 ,Group Status Bit 904" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB902 ,Group Status Bit 902" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB901 ,Group Status Bit 901" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB899 ,Group Status Bit 899" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB898 ,Group Status Bit 898" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB896 ,Group Status Bit 896" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x00F0++0x03
line.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
bitfld.long 0x00 31. " GSB927 ,Group Status Bit 927" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB926 ,Group Status Bit 926" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB925 ,Group Status Bit 925" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB924 ,Group Status Bit 924" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB923 ,Group Status Bit 923" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB922 ,Group Status Bit 922" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB921 ,Group Status Bit 921" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB920 ,Group Status Bit 920" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB919 ,Group Status Bit 919" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB918 ,Group Status Bit 918" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB917 ,Group Status Bit 917" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB916 ,Group Status Bit 916" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB915 ,Group Status Bit 915" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB914 ,Group Status Bit 914" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB913 ,Group Status Bit 913" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB912 ,Group Status Bit 912" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB911 ,Group Status Bit 911" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB910 ,Group Status Bit 910" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB909 ,Group Status Bit 909" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB908 ,Group Status Bit 908" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB907 ,Group Status Bit 907" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB906 ,Group Status Bit 906" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB905 ,Group Status Bit 905" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB904 ,Group Status Bit 904" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB903 ,Group Status Bit 903" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB902 ,Group Status Bit 902" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB901 ,Group Status Bit 901" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB900 ,Group Status Bit 900" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB899 ,Group Status Bit 899" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB898 ,Group Status Bit 898" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB897 ,Group Status Bit 897" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB896 ,Group Status Bit 896" "Group 0,Group 1"
else
hgroup.long 0x00F0++0x03
hide.long 0x0 "GICD_IGROUPR28,Interrupt Group Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF4))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29 (Secure Access)"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB958 ,Group Status Bit 958" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB957 ,Group Status Bit 957" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB955 ,Group Status Bit 955" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB954 ,Group Status Bit 954" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB952 ,Group Status Bit 952" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB951 ,Group Status Bit 951" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB949 ,Group Status Bit 949" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB948 ,Group Status Bit 948" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB946 ,Group Status Bit 946" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB945 ,Group Status Bit 945" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB943 ,Group Status Bit 943" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB942 ,Group Status Bit 942" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB940 ,Group Status Bit 940" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB939 ,Group Status Bit 939" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB937 ,Group Status Bit 937" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB936 ,Group Status Bit 936" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB934 ,Group Status Bit 934" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB933 ,Group Status Bit 933" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB931 ,Group Status Bit 931" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB930 ,Group Status Bit 930" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB928 ,Group Status Bit 928" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x00F4++0x03
line.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
bitfld.long 0x00 31. " GSB959 ,Group Status Bit 959" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB958 ,Group Status Bit 958" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB957 ,Group Status Bit 957" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB956 ,Group Status Bit 956" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB955 ,Group Status Bit 955" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB954 ,Group Status Bit 954" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB953 ,Group Status Bit 953" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB952 ,Group Status Bit 952" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB951 ,Group Status Bit 951" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB950 ,Group Status Bit 950" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB949 ,Group Status Bit 949" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB948 ,Group Status Bit 948" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB947 ,Group Status Bit 947" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB946 ,Group Status Bit 946" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB945 ,Group Status Bit 945" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB944 ,Group Status Bit 944" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB943 ,Group Status Bit 943" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB942 ,Group Status Bit 942" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB941 ,Group Status Bit 941" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB940 ,Group Status Bit 940" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB939 ,Group Status Bit 939" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB938 ,Group Status Bit 938" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB937 ,Group Status Bit 937" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB936 ,Group Status Bit 936" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB935 ,Group Status Bit 935" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB934 ,Group Status Bit 934" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB933 ,Group Status Bit 933" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB932 ,Group Status Bit 932" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB931 ,Group Status Bit 931" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB930 ,Group Status Bit 930" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB929 ,Group Status Bit 929" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB928 ,Group Status Bit 928" "Group 0,Group 1"
else
hgroup.long 0x00F4++0x03
hide.long 0x0 "GICD_IGROUPR29,Interrupt Group Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xF8))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30 (Secure Access)"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB990 ,Group Status Bit 990" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB989 ,Group Status Bit 989" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB987 ,Group Status Bit 987" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB986 ,Group Status Bit 986" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB984 ,Group Status Bit 984" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB983 ,Group Status Bit 983" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB981 ,Group Status Bit 981" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB980 ,Group Status Bit 980" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB978 ,Group Status Bit 978" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB977 ,Group Status Bit 977" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB975 ,Group Status Bit 975" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB974 ,Group Status Bit 974" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB972 ,Group Status Bit 972" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB971 ,Group Status Bit 971" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB969 ,Group Status Bit 969" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB968 ,Group Status Bit 968" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB966 ,Group Status Bit 966" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB965 ,Group Status Bit 965" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB963 ,Group Status Bit 963" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB962 ,Group Status Bit 962" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB960 ,Group Status Bit 960" "Secure,Non-secure Group 1"
elif ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x00F8++0x03
line.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
bitfld.long 0x00 31. " GSB991 ,Group Status Bit 991" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB990 ,Group Status Bit 990" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB989 ,Group Status Bit 989" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. " GSB988 ,Group Status Bit 988" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB987 ,Group Status Bit 987" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB986 ,Group Status Bit 986" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. " GSB985 ,Group Status Bit 985" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB984 ,Group Status Bit 984" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB983 ,Group Status Bit 983" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. " GSB982 ,Group Status Bit 982" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB981 ,Group Status Bit 981" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB980 ,Group Status Bit 980" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. " GSB979 ,Group Status Bit 979" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB978 ,Group Status Bit 978" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB977 ,Group Status Bit 977" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. " GSB976 ,Group Status Bit 976" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB975 ,Group Status Bit 975" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB974 ,Group Status Bit 974" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. " GSB973 ,Group Status Bit 973" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB972 ,Group Status Bit 972" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB971 ,Group Status Bit 971" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. " GSB970 ,Group Status Bit 970" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB969 ,Group Status Bit 969" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB968 ,Group Status Bit 968" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. " GSB967 ,Group Status Bit 967" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB966 ,Group Status Bit 966" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB965 ,Group Status Bit 965" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. " GSB964 ,Group Status Bit 964" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB963 ,Group Status Bit 963" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB962 ,Group Status Bit 962" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. " GSB961 ,Group Status Bit 961" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB960 ,Group Status Bit 960" "Group 0,Group 1"
else
hgroup.long 0x00F8++0x03
hide.long 0x0 "GICD_IGROUPR30,Interrupt Group Register 30"
endif
tree.end
width 24.
tree "Set/Clear Enable Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0100++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0100++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB31   ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB30   ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB29   ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB28   ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB27   ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB26   ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB25   ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB24   ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB23   ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB22   ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB21   ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB20   ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB19   ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB18   ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB17   ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB16   ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB15   ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB14   ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB13   ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB12   ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB11   ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB10   ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB9    ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB8    ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB7    ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB6    ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB5    ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB4    ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB3    ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB2    ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB1    ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB0    ,Set/Clear Enable Bit 0" "Disabled,Enabled"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0104++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB63   ,Set/Clear Enable Bit 63" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB62   ,Set/Clear Enable Bit 62" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB61   ,Set/Clear Enable Bit 61" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB60   ,Set/Clear Enable Bit 60" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB59   ,Set/Clear Enable Bit 59" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB58   ,Set/Clear Enable Bit 58" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB57   ,Set/Clear Enable Bit 57" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB56   ,Set/Clear Enable Bit 56" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB55   ,Set/Clear Enable Bit 55" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB54   ,Set/Clear Enable Bit 54" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB53   ,Set/Clear Enable Bit 53" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB52   ,Set/Clear Enable Bit 52" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB51   ,Set/Clear Enable Bit 51" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB50   ,Set/Clear Enable Bit 50" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB49   ,Set/Clear Enable Bit 49" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB48   ,Set/Clear Enable Bit 48" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB47   ,Set/Clear Enable Bit 47" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB46   ,Set/Clear Enable Bit 46" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB45   ,Set/Clear Enable Bit 45" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB44   ,Set/Clear Enable Bit 44" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB43   ,Set/Clear Enable Bit 43" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB42   ,Set/Clear Enable Bit 42" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB41   ,Set/Clear Enable Bit 41" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB40   ,Set/Clear Enable Bit 40" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB39   ,Set/Clear Enable Bit 39" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB38   ,Set/Clear Enable Bit 38" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB37   ,Set/Clear Enable Bit 37" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB36   ,Set/Clear Enable Bit 36" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB35   ,Set/Clear Enable Bit 35" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB34   ,Set/Clear Enable Bit 34" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB33   ,Set/Clear Enable Bit 33" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB32   ,Set/Clear Enable Bit 32" "Disabled,Enabled"
else
hgroup.long 0x0104++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER1,Interrupt Set/Clear Enable Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0108++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB95   ,Set/Clear Enable Bit 95" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB94   ,Set/Clear Enable Bit 94" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB93   ,Set/Clear Enable Bit 93" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB92   ,Set/Clear Enable Bit 92" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB91   ,Set/Clear Enable Bit 91" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB90   ,Set/Clear Enable Bit 90" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB89   ,Set/Clear Enable Bit 89" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB88   ,Set/Clear Enable Bit 88" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB87   ,Set/Clear Enable Bit 87" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB86   ,Set/Clear Enable Bit 86" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB85   ,Set/Clear Enable Bit 85" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB84   ,Set/Clear Enable Bit 84" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB83   ,Set/Clear Enable Bit 83" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB82   ,Set/Clear Enable Bit 82" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB81   ,Set/Clear Enable Bit 81" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB80   ,Set/Clear Enable Bit 80" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB79   ,Set/Clear Enable Bit 79" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB78   ,Set/Clear Enable Bit 78" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB77   ,Set/Clear Enable Bit 77" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB76   ,Set/Clear Enable Bit 76" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB75   ,Set/Clear Enable Bit 75" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB74   ,Set/Clear Enable Bit 74" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB73   ,Set/Clear Enable Bit 73" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB72   ,Set/Clear Enable Bit 72" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB71   ,Set/Clear Enable Bit 71" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB70   ,Set/Clear Enable Bit 70" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB69   ,Set/Clear Enable Bit 69" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB68   ,Set/Clear Enable Bit 68" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB67   ,Set/Clear Enable Bit 67" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB66   ,Set/Clear Enable Bit 66" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB65   ,Set/Clear Enable Bit 65" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB64   ,Set/Clear Enable Bit 64" "Disabled,Enabled"
else
hgroup.long 0x0108++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER2,Interrupt Set/Clear Enable Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x010C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB127  ,Set/Clear Enable Bit 127" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB126  ,Set/Clear Enable Bit 126" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB125  ,Set/Clear Enable Bit 125" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB124  ,Set/Clear Enable Bit 124" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB123  ,Set/Clear Enable Bit 123" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB122  ,Set/Clear Enable Bit 122" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB121  ,Set/Clear Enable Bit 121" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB120  ,Set/Clear Enable Bit 120" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB119  ,Set/Clear Enable Bit 119" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB118  ,Set/Clear Enable Bit 118" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB117  ,Set/Clear Enable Bit 117" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB116  ,Set/Clear Enable Bit 116" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB115  ,Set/Clear Enable Bit 115" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB114  ,Set/Clear Enable Bit 114" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB113  ,Set/Clear Enable Bit 113" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB112  ,Set/Clear Enable Bit 112" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB111  ,Set/Clear Enable Bit 111" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB110  ,Set/Clear Enable Bit 110" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB109  ,Set/Clear Enable Bit 109" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB108  ,Set/Clear Enable Bit 108" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB107  ,Set/Clear Enable Bit 107" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB106  ,Set/Clear Enable Bit 106" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB105  ,Set/Clear Enable Bit 105" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB104  ,Set/Clear Enable Bit 104" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB103  ,Set/Clear Enable Bit 103" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB102  ,Set/Clear Enable Bit 102" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB101  ,Set/Clear Enable Bit 101" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB100  ,Set/Clear Enable Bit 100" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB99   ,Set/Clear Enable Bit 99" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB98   ,Set/Clear Enable Bit 98" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB97   ,Set/Clear Enable Bit 97" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB96   ,Set/Clear Enable Bit 96" "Disabled,Enabled"
else
hgroup.long 0x010C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER3,Interrupt Set/Clear Enable Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0110++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB159  ,Set/Clear Enable Bit 159" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB158  ,Set/Clear Enable Bit 158" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB157  ,Set/Clear Enable Bit 157" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB156  ,Set/Clear Enable Bit 156" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB155  ,Set/Clear Enable Bit 155" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB154  ,Set/Clear Enable Bit 154" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB153  ,Set/Clear Enable Bit 153" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB152  ,Set/Clear Enable Bit 152" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB151  ,Set/Clear Enable Bit 151" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB150  ,Set/Clear Enable Bit 150" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB149  ,Set/Clear Enable Bit 149" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB148  ,Set/Clear Enable Bit 148" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB147  ,Set/Clear Enable Bit 147" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB146  ,Set/Clear Enable Bit 146" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB145  ,Set/Clear Enable Bit 145" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB144  ,Set/Clear Enable Bit 144" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB143  ,Set/Clear Enable Bit 143" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB142  ,Set/Clear Enable Bit 142" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB141  ,Set/Clear Enable Bit 141" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB140  ,Set/Clear Enable Bit 140" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB139  ,Set/Clear Enable Bit 139" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB138  ,Set/Clear Enable Bit 138" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB137  ,Set/Clear Enable Bit 137" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB136  ,Set/Clear Enable Bit 136" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB135  ,Set/Clear Enable Bit 135" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB134  ,Set/Clear Enable Bit 134" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB133  ,Set/Clear Enable Bit 133" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB132  ,Set/Clear Enable Bit 132" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB131  ,Set/Clear Enable Bit 131" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB130  ,Set/Clear Enable Bit 130" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB129  ,Set/Clear Enable Bit 129" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB128  ,Set/Clear Enable Bit 128" "Disabled,Enabled"
else
hgroup.long 0x0110++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER4,Interrupt Set/Clear Enable Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0114++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB191  ,Set/Clear Enable Bit 191" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB190  ,Set/Clear Enable Bit 190" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB189  ,Set/Clear Enable Bit 189" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB188  ,Set/Clear Enable Bit 188" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB187  ,Set/Clear Enable Bit 187" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB186  ,Set/Clear Enable Bit 186" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB185  ,Set/Clear Enable Bit 185" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB184  ,Set/Clear Enable Bit 184" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB183  ,Set/Clear Enable Bit 183" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB182  ,Set/Clear Enable Bit 182" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB181  ,Set/Clear Enable Bit 181" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB180  ,Set/Clear Enable Bit 180" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB179  ,Set/Clear Enable Bit 179" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB178  ,Set/Clear Enable Bit 178" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB177  ,Set/Clear Enable Bit 177" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB176  ,Set/Clear Enable Bit 176" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB175  ,Set/Clear Enable Bit 175" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB174  ,Set/Clear Enable Bit 174" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB173  ,Set/Clear Enable Bit 173" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB172  ,Set/Clear Enable Bit 172" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB171  ,Set/Clear Enable Bit 171" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB170  ,Set/Clear Enable Bit 170" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB169  ,Set/Clear Enable Bit 169" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB168  ,Set/Clear Enable Bit 168" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB167  ,Set/Clear Enable Bit 167" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB166  ,Set/Clear Enable Bit 166" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB165  ,Set/Clear Enable Bit 165" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB164  ,Set/Clear Enable Bit 164" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB163  ,Set/Clear Enable Bit 163" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB162  ,Set/Clear Enable Bit 162" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB161  ,Set/Clear Enable Bit 161" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB160  ,Set/Clear Enable Bit 160" "Disabled,Enabled"
else
hgroup.long 0x0114++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER5,Interrupt Set/Clear Enable Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0118++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB223  ,Set/Clear Enable Bit 223" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB222  ,Set/Clear Enable Bit 222" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB221  ,Set/Clear Enable Bit 221" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB220  ,Set/Clear Enable Bit 220" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB219  ,Set/Clear Enable Bit 219" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB218  ,Set/Clear Enable Bit 218" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB217  ,Set/Clear Enable Bit 217" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB216  ,Set/Clear Enable Bit 216" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB215  ,Set/Clear Enable Bit 215" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB214  ,Set/Clear Enable Bit 214" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB213  ,Set/Clear Enable Bit 213" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB212  ,Set/Clear Enable Bit 212" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB211  ,Set/Clear Enable Bit 211" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB210  ,Set/Clear Enable Bit 210" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB209  ,Set/Clear Enable Bit 209" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB208  ,Set/Clear Enable Bit 208" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB207  ,Set/Clear Enable Bit 207" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB206  ,Set/Clear Enable Bit 206" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB205  ,Set/Clear Enable Bit 205" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB204  ,Set/Clear Enable Bit 204" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB203  ,Set/Clear Enable Bit 203" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB202  ,Set/Clear Enable Bit 202" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB201  ,Set/Clear Enable Bit 201" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB200  ,Set/Clear Enable Bit 200" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB199  ,Set/Clear Enable Bit 199" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB198  ,Set/Clear Enable Bit 198" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB197  ,Set/Clear Enable Bit 197" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB196  ,Set/Clear Enable Bit 196" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB195  ,Set/Clear Enable Bit 195" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB194  ,Set/Clear Enable Bit 194" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB193  ,Set/Clear Enable Bit 193" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB192  ,Set/Clear Enable Bit 192" "Disabled,Enabled"
else
hgroup.long 0x0118++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER6,Interrupt Set/Clear Enable Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x011C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB255  ,Set/Clear Enable Bit 255" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB254  ,Set/Clear Enable Bit 254" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB253  ,Set/Clear Enable Bit 253" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB252  ,Set/Clear Enable Bit 252" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB251  ,Set/Clear Enable Bit 251" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB250  ,Set/Clear Enable Bit 250" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB249  ,Set/Clear Enable Bit 249" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB248  ,Set/Clear Enable Bit 248" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB247  ,Set/Clear Enable Bit 247" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB246  ,Set/Clear Enable Bit 246" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB245  ,Set/Clear Enable Bit 245" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB244  ,Set/Clear Enable Bit 244" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB243  ,Set/Clear Enable Bit 243" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB242  ,Set/Clear Enable Bit 242" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB241  ,Set/Clear Enable Bit 241" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB240  ,Set/Clear Enable Bit 240" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB239  ,Set/Clear Enable Bit 239" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB238  ,Set/Clear Enable Bit 238" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB237  ,Set/Clear Enable Bit 237" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB236  ,Set/Clear Enable Bit 236" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB235  ,Set/Clear Enable Bit 235" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB234  ,Set/Clear Enable Bit 234" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB233  ,Set/Clear Enable Bit 233" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB232  ,Set/Clear Enable Bit 232" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB231  ,Set/Clear Enable Bit 231" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB230  ,Set/Clear Enable Bit 230" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB229  ,Set/Clear Enable Bit 229" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB228  ,Set/Clear Enable Bit 228" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB227  ,Set/Clear Enable Bit 227" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB226  ,Set/Clear Enable Bit 226" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB225  ,Set/Clear Enable Bit 225" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB224  ,Set/Clear Enable Bit 224" "Disabled,Enabled"
else
hgroup.long 0x011C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER7,Interrupt Set/Clear Enable Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0120++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB287  ,Set/Clear Enable Bit 287" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB286  ,Set/Clear Enable Bit 286" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB285  ,Set/Clear Enable Bit 285" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB284  ,Set/Clear Enable Bit 284" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB283  ,Set/Clear Enable Bit 283" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB282  ,Set/Clear Enable Bit 282" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB281  ,Set/Clear Enable Bit 281" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB280  ,Set/Clear Enable Bit 280" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB279  ,Set/Clear Enable Bit 279" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB278  ,Set/Clear Enable Bit 278" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB277  ,Set/Clear Enable Bit 277" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB276  ,Set/Clear Enable Bit 276" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB275  ,Set/Clear Enable Bit 275" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB274  ,Set/Clear Enable Bit 274" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB273  ,Set/Clear Enable Bit 273" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB272  ,Set/Clear Enable Bit 272" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB271  ,Set/Clear Enable Bit 271" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB270  ,Set/Clear Enable Bit 270" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB269  ,Set/Clear Enable Bit 269" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB268  ,Set/Clear Enable Bit 268" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB267  ,Set/Clear Enable Bit 267" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB266  ,Set/Clear Enable Bit 266" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB265  ,Set/Clear Enable Bit 265" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB264  ,Set/Clear Enable Bit 264" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB263  ,Set/Clear Enable Bit 263" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB262  ,Set/Clear Enable Bit 262" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB261  ,Set/Clear Enable Bit 261" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB260  ,Set/Clear Enable Bit 260" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB259  ,Set/Clear Enable Bit 259" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB258  ,Set/Clear Enable Bit 258" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB257  ,Set/Clear Enable Bit 257" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB256  ,Set/Clear Enable Bit 256" "Disabled,Enabled"
else
hgroup.long 0x0120++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER8,Interrupt Set/Clear Enable Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0124++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB319  ,Set/Clear Enable Bit 319" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB318  ,Set/Clear Enable Bit 318" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB317  ,Set/Clear Enable Bit 317" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB316  ,Set/Clear Enable Bit 316" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB315  ,Set/Clear Enable Bit 315" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB314  ,Set/Clear Enable Bit 314" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB313  ,Set/Clear Enable Bit 313" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB312  ,Set/Clear Enable Bit 312" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB311  ,Set/Clear Enable Bit 311" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB310  ,Set/Clear Enable Bit 310" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB309  ,Set/Clear Enable Bit 309" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB308  ,Set/Clear Enable Bit 308" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB307  ,Set/Clear Enable Bit 307" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB306  ,Set/Clear Enable Bit 306" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB305  ,Set/Clear Enable Bit 305" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB304  ,Set/Clear Enable Bit 304" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB303  ,Set/Clear Enable Bit 303" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB302  ,Set/Clear Enable Bit 302" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB301  ,Set/Clear Enable Bit 301" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB300  ,Set/Clear Enable Bit 300" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB299  ,Set/Clear Enable Bit 299" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB298  ,Set/Clear Enable Bit 298" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB297  ,Set/Clear Enable Bit 297" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB296  ,Set/Clear Enable Bit 296" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB295  ,Set/Clear Enable Bit 295" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB294  ,Set/Clear Enable Bit 294" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB293  ,Set/Clear Enable Bit 293" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB292  ,Set/Clear Enable Bit 292" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB291  ,Set/Clear Enable Bit 291" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB290  ,Set/Clear Enable Bit 290" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB289  ,Set/Clear Enable Bit 289" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB288  ,Set/Clear Enable Bit 288" "Disabled,Enabled"
else
hgroup.long 0x0124++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER9,Interrupt Set/Clear Enable Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0128++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB351  ,Set/Clear Enable Bit 351" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB350  ,Set/Clear Enable Bit 350" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB349  ,Set/Clear Enable Bit 349" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB348  ,Set/Clear Enable Bit 348" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB347  ,Set/Clear Enable Bit 347" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB346  ,Set/Clear Enable Bit 346" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB345  ,Set/Clear Enable Bit 345" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB344  ,Set/Clear Enable Bit 344" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB343  ,Set/Clear Enable Bit 343" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB342  ,Set/Clear Enable Bit 342" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB341  ,Set/Clear Enable Bit 341" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB340  ,Set/Clear Enable Bit 340" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB339  ,Set/Clear Enable Bit 339" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB338  ,Set/Clear Enable Bit 338" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB337  ,Set/Clear Enable Bit 337" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB336  ,Set/Clear Enable Bit 336" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB335  ,Set/Clear Enable Bit 335" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB334  ,Set/Clear Enable Bit 334" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB333  ,Set/Clear Enable Bit 333" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB332  ,Set/Clear Enable Bit 332" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB331  ,Set/Clear Enable Bit 331" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB330  ,Set/Clear Enable Bit 330" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB329  ,Set/Clear Enable Bit 329" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB328  ,Set/Clear Enable Bit 328" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB327  ,Set/Clear Enable Bit 327" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB326  ,Set/Clear Enable Bit 326" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB325  ,Set/Clear Enable Bit 325" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB324  ,Set/Clear Enable Bit 324" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB323  ,Set/Clear Enable Bit 323" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB322  ,Set/Clear Enable Bit 322" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB321  ,Set/Clear Enable Bit 321" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB320  ,Set/Clear Enable Bit 320" "Disabled,Enabled"
else
hgroup.long 0x0128++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER10,Interrupt Set/Clear Enable Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x012C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB383  ,Set/Clear Enable Bit 383" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB382  ,Set/Clear Enable Bit 382" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB381  ,Set/Clear Enable Bit 381" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB380  ,Set/Clear Enable Bit 380" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB379  ,Set/Clear Enable Bit 379" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB378  ,Set/Clear Enable Bit 378" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB377  ,Set/Clear Enable Bit 377" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB376  ,Set/Clear Enable Bit 376" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB375  ,Set/Clear Enable Bit 375" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB374  ,Set/Clear Enable Bit 374" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB373  ,Set/Clear Enable Bit 373" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB372  ,Set/Clear Enable Bit 372" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB371  ,Set/Clear Enable Bit 371" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB370  ,Set/Clear Enable Bit 370" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB369  ,Set/Clear Enable Bit 369" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB368  ,Set/Clear Enable Bit 368" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB367  ,Set/Clear Enable Bit 367" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB366  ,Set/Clear Enable Bit 366" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB365  ,Set/Clear Enable Bit 365" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB364  ,Set/Clear Enable Bit 364" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB363  ,Set/Clear Enable Bit 363" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB362  ,Set/Clear Enable Bit 362" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB361  ,Set/Clear Enable Bit 361" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB360  ,Set/Clear Enable Bit 360" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB359  ,Set/Clear Enable Bit 359" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB358  ,Set/Clear Enable Bit 358" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB357  ,Set/Clear Enable Bit 357" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB356  ,Set/Clear Enable Bit 356" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB355  ,Set/Clear Enable Bit 355" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB354  ,Set/Clear Enable Bit 354" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB353  ,Set/Clear Enable Bit 353" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB352  ,Set/Clear Enable Bit 352" "Disabled,Enabled"
else
hgroup.long 0x012C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER11,Interrupt Set/Clear Enable Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0130++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB415  ,Set/Clear Enable Bit 415" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB414  ,Set/Clear Enable Bit 414" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB413  ,Set/Clear Enable Bit 413" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB412  ,Set/Clear Enable Bit 412" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB411  ,Set/Clear Enable Bit 411" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB410  ,Set/Clear Enable Bit 410" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB409  ,Set/Clear Enable Bit 409" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB408  ,Set/Clear Enable Bit 408" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB407  ,Set/Clear Enable Bit 407" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB406  ,Set/Clear Enable Bit 406" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB405  ,Set/Clear Enable Bit 405" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB404  ,Set/Clear Enable Bit 404" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB403  ,Set/Clear Enable Bit 403" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB402  ,Set/Clear Enable Bit 402" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB401  ,Set/Clear Enable Bit 401" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB400  ,Set/Clear Enable Bit 400" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB399  ,Set/Clear Enable Bit 399" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB398  ,Set/Clear Enable Bit 398" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB397  ,Set/Clear Enable Bit 397" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB396  ,Set/Clear Enable Bit 396" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB395  ,Set/Clear Enable Bit 395" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB394  ,Set/Clear Enable Bit 394" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB393  ,Set/Clear Enable Bit 393" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB392  ,Set/Clear Enable Bit 392" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB391  ,Set/Clear Enable Bit 391" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB390  ,Set/Clear Enable Bit 390" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB389  ,Set/Clear Enable Bit 389" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB388  ,Set/Clear Enable Bit 388" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB387  ,Set/Clear Enable Bit 387" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB386  ,Set/Clear Enable Bit 386" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB385  ,Set/Clear Enable Bit 385" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB384  ,Set/Clear Enable Bit 384" "Disabled,Enabled"
else
hgroup.long 0x0130++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER12,Interrupt Set/Clear Enable Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0134++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB447  ,Set/Clear Enable Bit 447" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB446  ,Set/Clear Enable Bit 446" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB445  ,Set/Clear Enable Bit 445" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB444  ,Set/Clear Enable Bit 444" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB443  ,Set/Clear Enable Bit 443" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB442  ,Set/Clear Enable Bit 442" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB441  ,Set/Clear Enable Bit 441" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB440  ,Set/Clear Enable Bit 440" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB439  ,Set/Clear Enable Bit 439" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB438  ,Set/Clear Enable Bit 438" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB437  ,Set/Clear Enable Bit 437" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB436  ,Set/Clear Enable Bit 436" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB435  ,Set/Clear Enable Bit 435" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB434  ,Set/Clear Enable Bit 434" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB433  ,Set/Clear Enable Bit 433" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB432  ,Set/Clear Enable Bit 432" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB431  ,Set/Clear Enable Bit 431" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB430  ,Set/Clear Enable Bit 430" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB429  ,Set/Clear Enable Bit 429" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB428  ,Set/Clear Enable Bit 428" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB427  ,Set/Clear Enable Bit 427" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB426  ,Set/Clear Enable Bit 426" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB425  ,Set/Clear Enable Bit 425" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB424  ,Set/Clear Enable Bit 424" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB423  ,Set/Clear Enable Bit 423" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB422  ,Set/Clear Enable Bit 422" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB421  ,Set/Clear Enable Bit 421" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB420  ,Set/Clear Enable Bit 420" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB419  ,Set/Clear Enable Bit 419" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB418  ,Set/Clear Enable Bit 418" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB417  ,Set/Clear Enable Bit 417" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB416  ,Set/Clear Enable Bit 416" "Disabled,Enabled"
else
hgroup.long 0x0134++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER13,Interrupt Set/Clear Enable Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0138++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB479  ,Set/Clear Enable Bit 479" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB478  ,Set/Clear Enable Bit 478" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB477  ,Set/Clear Enable Bit 477" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB476  ,Set/Clear Enable Bit 476" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB475  ,Set/Clear Enable Bit 475" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB474  ,Set/Clear Enable Bit 474" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB473  ,Set/Clear Enable Bit 473" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB472  ,Set/Clear Enable Bit 472" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB471  ,Set/Clear Enable Bit 471" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB470  ,Set/Clear Enable Bit 470" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB469  ,Set/Clear Enable Bit 469" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB468  ,Set/Clear Enable Bit 468" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB467  ,Set/Clear Enable Bit 467" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB466  ,Set/Clear Enable Bit 466" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB465  ,Set/Clear Enable Bit 465" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB464  ,Set/Clear Enable Bit 464" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB463  ,Set/Clear Enable Bit 463" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB462  ,Set/Clear Enable Bit 462" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB461  ,Set/Clear Enable Bit 461" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB460  ,Set/Clear Enable Bit 460" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB459  ,Set/Clear Enable Bit 459" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB458  ,Set/Clear Enable Bit 458" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB457  ,Set/Clear Enable Bit 457" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB456  ,Set/Clear Enable Bit 456" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB455  ,Set/Clear Enable Bit 455" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB454  ,Set/Clear Enable Bit 454" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB453  ,Set/Clear Enable Bit 453" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB452  ,Set/Clear Enable Bit 452" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB451  ,Set/Clear Enable Bit 451" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB450  ,Set/Clear Enable Bit 450" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB449  ,Set/Clear Enable Bit 449" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB448  ,Set/Clear Enable Bit 448" "Disabled,Enabled"
else
hgroup.long 0x0138++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER14,Interrupt Set/Clear Enable Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x013C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB511  ,Set/Clear Enable Bit 511" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB510  ,Set/Clear Enable Bit 510" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB509  ,Set/Clear Enable Bit 509" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB508  ,Set/Clear Enable Bit 508" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB507  ,Set/Clear Enable Bit 507" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB506  ,Set/Clear Enable Bit 506" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB505  ,Set/Clear Enable Bit 505" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB504  ,Set/Clear Enable Bit 504" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB503  ,Set/Clear Enable Bit 503" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB502  ,Set/Clear Enable Bit 502" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB501  ,Set/Clear Enable Bit 501" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB500  ,Set/Clear Enable Bit 500" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB499  ,Set/Clear Enable Bit 499" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB498  ,Set/Clear Enable Bit 498" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB497  ,Set/Clear Enable Bit 497" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB496  ,Set/Clear Enable Bit 496" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB495  ,Set/Clear Enable Bit 495" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB494  ,Set/Clear Enable Bit 494" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB493  ,Set/Clear Enable Bit 493" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB492  ,Set/Clear Enable Bit 492" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB491  ,Set/Clear Enable Bit 491" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB490  ,Set/Clear Enable Bit 490" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB489  ,Set/Clear Enable Bit 489" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB488  ,Set/Clear Enable Bit 488" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB487  ,Set/Clear Enable Bit 487" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB486  ,Set/Clear Enable Bit 486" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB485  ,Set/Clear Enable Bit 485" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB484  ,Set/Clear Enable Bit 484" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB483  ,Set/Clear Enable Bit 483" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB482  ,Set/Clear Enable Bit 482" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB481  ,Set/Clear Enable Bit 481" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB480  ,Set/Clear Enable Bit 480" "Disabled,Enabled"
else
hgroup.long 0x013C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER15,Interrupt Set/Clear Enable Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0140++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB543  ,Set/Clear Enable Bit 543" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB542  ,Set/Clear Enable Bit 542" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB541  ,Set/Clear Enable Bit 541" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB540  ,Set/Clear Enable Bit 540" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB539  ,Set/Clear Enable Bit 539" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB538  ,Set/Clear Enable Bit 538" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB537  ,Set/Clear Enable Bit 537" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB536  ,Set/Clear Enable Bit 536" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB535  ,Set/Clear Enable Bit 535" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB534  ,Set/Clear Enable Bit 534" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB533  ,Set/Clear Enable Bit 533" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB532  ,Set/Clear Enable Bit 532" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB531  ,Set/Clear Enable Bit 531" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB530  ,Set/Clear Enable Bit 530" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB529  ,Set/Clear Enable Bit 529" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB528  ,Set/Clear Enable Bit 528" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB527  ,Set/Clear Enable Bit 527" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB526  ,Set/Clear Enable Bit 526" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB525  ,Set/Clear Enable Bit 525" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB524  ,Set/Clear Enable Bit 524" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB523  ,Set/Clear Enable Bit 523" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB522  ,Set/Clear Enable Bit 522" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB521  ,Set/Clear Enable Bit 521" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB520  ,Set/Clear Enable Bit 520" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB519  ,Set/Clear Enable Bit 519" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB518  ,Set/Clear Enable Bit 518" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB517  ,Set/Clear Enable Bit 517" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB516  ,Set/Clear Enable Bit 516" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB515  ,Set/Clear Enable Bit 515" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB514  ,Set/Clear Enable Bit 514" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB513  ,Set/Clear Enable Bit 513" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB512  ,Set/Clear Enable Bit 512" "Disabled,Enabled"
else
hgroup.long 0x0140++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER16,Interrupt Set/Clear Enable Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0144++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB575  ,Set/Clear Enable Bit 575" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB574  ,Set/Clear Enable Bit 574" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB573  ,Set/Clear Enable Bit 573" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB572  ,Set/Clear Enable Bit 572" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB571  ,Set/Clear Enable Bit 571" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB570  ,Set/Clear Enable Bit 570" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB569  ,Set/Clear Enable Bit 569" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB568  ,Set/Clear Enable Bit 568" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB567  ,Set/Clear Enable Bit 567" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB566  ,Set/Clear Enable Bit 566" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB565  ,Set/Clear Enable Bit 565" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB564  ,Set/Clear Enable Bit 564" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB563  ,Set/Clear Enable Bit 563" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB562  ,Set/Clear Enable Bit 562" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB561  ,Set/Clear Enable Bit 561" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB560  ,Set/Clear Enable Bit 560" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB559  ,Set/Clear Enable Bit 559" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB558  ,Set/Clear Enable Bit 558" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB557  ,Set/Clear Enable Bit 557" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB556  ,Set/Clear Enable Bit 556" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB555  ,Set/Clear Enable Bit 555" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB554  ,Set/Clear Enable Bit 554" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB553  ,Set/Clear Enable Bit 553" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB552  ,Set/Clear Enable Bit 552" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB551  ,Set/Clear Enable Bit 551" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB550  ,Set/Clear Enable Bit 550" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB549  ,Set/Clear Enable Bit 549" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB548  ,Set/Clear Enable Bit 548" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB547  ,Set/Clear Enable Bit 547" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB546  ,Set/Clear Enable Bit 546" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB545  ,Set/Clear Enable Bit 545" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB544  ,Set/Clear Enable Bit 544" "Disabled,Enabled"
else
hgroup.long 0x0144++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER17,Interrupt Set/Clear Enable Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0148++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB607  ,Set/Clear Enable Bit 607" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB606  ,Set/Clear Enable Bit 606" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB605  ,Set/Clear Enable Bit 605" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB604  ,Set/Clear Enable Bit 604" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB603  ,Set/Clear Enable Bit 603" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB602  ,Set/Clear Enable Bit 602" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB601  ,Set/Clear Enable Bit 601" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB600  ,Set/Clear Enable Bit 600" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB599  ,Set/Clear Enable Bit 599" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB598  ,Set/Clear Enable Bit 598" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB597  ,Set/Clear Enable Bit 597" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB596  ,Set/Clear Enable Bit 596" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB595  ,Set/Clear Enable Bit 595" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB594  ,Set/Clear Enable Bit 594" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB593  ,Set/Clear Enable Bit 593" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB592  ,Set/Clear Enable Bit 592" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB591  ,Set/Clear Enable Bit 591" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB590  ,Set/Clear Enable Bit 590" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB589  ,Set/Clear Enable Bit 589" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB588  ,Set/Clear Enable Bit 588" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB587  ,Set/Clear Enable Bit 587" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB586  ,Set/Clear Enable Bit 586" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB585  ,Set/Clear Enable Bit 585" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB584  ,Set/Clear Enable Bit 584" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB583  ,Set/Clear Enable Bit 583" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB582  ,Set/Clear Enable Bit 582" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB581  ,Set/Clear Enable Bit 581" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB580  ,Set/Clear Enable Bit 580" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB579  ,Set/Clear Enable Bit 579" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB578  ,Set/Clear Enable Bit 578" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB577  ,Set/Clear Enable Bit 577" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB576  ,Set/Clear Enable Bit 576" "Disabled,Enabled"
else
hgroup.long 0x0148++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER18,Interrupt Set/Clear Enable Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x014C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB639  ,Set/Clear Enable Bit 639" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB638  ,Set/Clear Enable Bit 638" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB637  ,Set/Clear Enable Bit 637" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB636  ,Set/Clear Enable Bit 636" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB635  ,Set/Clear Enable Bit 635" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB634  ,Set/Clear Enable Bit 634" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB633  ,Set/Clear Enable Bit 633" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB632  ,Set/Clear Enable Bit 632" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB631  ,Set/Clear Enable Bit 631" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB630  ,Set/Clear Enable Bit 630" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB629  ,Set/Clear Enable Bit 629" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB628  ,Set/Clear Enable Bit 628" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB627  ,Set/Clear Enable Bit 627" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB626  ,Set/Clear Enable Bit 626" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB625  ,Set/Clear Enable Bit 625" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB624  ,Set/Clear Enable Bit 624" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB623  ,Set/Clear Enable Bit 623" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB622  ,Set/Clear Enable Bit 622" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB621  ,Set/Clear Enable Bit 621" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB620  ,Set/Clear Enable Bit 620" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB619  ,Set/Clear Enable Bit 619" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB618  ,Set/Clear Enable Bit 618" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB617  ,Set/Clear Enable Bit 617" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB616  ,Set/Clear Enable Bit 616" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB615  ,Set/Clear Enable Bit 615" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB614  ,Set/Clear Enable Bit 614" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB613  ,Set/Clear Enable Bit 613" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB612  ,Set/Clear Enable Bit 612" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB611  ,Set/Clear Enable Bit 611" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB610  ,Set/Clear Enable Bit 610" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB609  ,Set/Clear Enable Bit 609" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB608  ,Set/Clear Enable Bit 608" "Disabled,Enabled"
else
hgroup.long 0x014C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER19,Interrupt Set/Clear Enable Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0150++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB671  ,Set/Clear Enable Bit 671" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB670  ,Set/Clear Enable Bit 670" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB669  ,Set/Clear Enable Bit 669" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB668  ,Set/Clear Enable Bit 668" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB667  ,Set/Clear Enable Bit 667" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB666  ,Set/Clear Enable Bit 666" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB665  ,Set/Clear Enable Bit 665" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB664  ,Set/Clear Enable Bit 664" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB663  ,Set/Clear Enable Bit 663" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB662  ,Set/Clear Enable Bit 662" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB661  ,Set/Clear Enable Bit 661" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB660  ,Set/Clear Enable Bit 660" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB659  ,Set/Clear Enable Bit 659" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB658  ,Set/Clear Enable Bit 658" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB657  ,Set/Clear Enable Bit 657" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB656  ,Set/Clear Enable Bit 656" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB655  ,Set/Clear Enable Bit 655" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB654  ,Set/Clear Enable Bit 654" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB653  ,Set/Clear Enable Bit 653" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB652  ,Set/Clear Enable Bit 652" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB651  ,Set/Clear Enable Bit 651" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB650  ,Set/Clear Enable Bit 650" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB649  ,Set/Clear Enable Bit 649" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB648  ,Set/Clear Enable Bit 648" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB647  ,Set/Clear Enable Bit 647" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB646  ,Set/Clear Enable Bit 646" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB645  ,Set/Clear Enable Bit 645" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB644  ,Set/Clear Enable Bit 644" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB643  ,Set/Clear Enable Bit 643" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB642  ,Set/Clear Enable Bit 642" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB641  ,Set/Clear Enable Bit 641" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB640  ,Set/Clear Enable Bit 640" "Disabled,Enabled"
else
hgroup.long 0x0150++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER20,Interrupt Set/Clear Enable Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0154++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB703  ,Set/Clear Enable Bit 703" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB702  ,Set/Clear Enable Bit 702" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB701  ,Set/Clear Enable Bit 701" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB700  ,Set/Clear Enable Bit 700" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB699  ,Set/Clear Enable Bit 699" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB698  ,Set/Clear Enable Bit 698" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB697  ,Set/Clear Enable Bit 697" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB696  ,Set/Clear Enable Bit 696" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB695  ,Set/Clear Enable Bit 695" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB694  ,Set/Clear Enable Bit 694" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB693  ,Set/Clear Enable Bit 693" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB692  ,Set/Clear Enable Bit 692" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB691  ,Set/Clear Enable Bit 691" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB690  ,Set/Clear Enable Bit 690" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB689  ,Set/Clear Enable Bit 689" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB688  ,Set/Clear Enable Bit 688" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB687  ,Set/Clear Enable Bit 687" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB686  ,Set/Clear Enable Bit 686" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB685  ,Set/Clear Enable Bit 685" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB684  ,Set/Clear Enable Bit 684" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB683  ,Set/Clear Enable Bit 683" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB682  ,Set/Clear Enable Bit 682" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB681  ,Set/Clear Enable Bit 681" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB680  ,Set/Clear Enable Bit 680" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB679  ,Set/Clear Enable Bit 679" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB678  ,Set/Clear Enable Bit 678" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB677  ,Set/Clear Enable Bit 677" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB676  ,Set/Clear Enable Bit 676" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB675  ,Set/Clear Enable Bit 675" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB674  ,Set/Clear Enable Bit 674" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB673  ,Set/Clear Enable Bit 673" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB672  ,Set/Clear Enable Bit 672" "Disabled,Enabled"
else
hgroup.long 0x0154++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER21,Interrupt Set/Clear Enable Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0158++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB735  ,Set/Clear Enable Bit 735" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB734  ,Set/Clear Enable Bit 734" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB733  ,Set/Clear Enable Bit 733" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB732  ,Set/Clear Enable Bit 732" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB731  ,Set/Clear Enable Bit 731" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB730  ,Set/Clear Enable Bit 730" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB729  ,Set/Clear Enable Bit 729" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB728  ,Set/Clear Enable Bit 728" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB727  ,Set/Clear Enable Bit 727" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB726  ,Set/Clear Enable Bit 726" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB725  ,Set/Clear Enable Bit 725" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB724  ,Set/Clear Enable Bit 724" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB723  ,Set/Clear Enable Bit 723" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB722  ,Set/Clear Enable Bit 722" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB721  ,Set/Clear Enable Bit 721" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB720  ,Set/Clear Enable Bit 720" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB719  ,Set/Clear Enable Bit 719" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB718  ,Set/Clear Enable Bit 718" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB717  ,Set/Clear Enable Bit 717" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB716  ,Set/Clear Enable Bit 716" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB715  ,Set/Clear Enable Bit 715" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB714  ,Set/Clear Enable Bit 714" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB713  ,Set/Clear Enable Bit 713" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB712  ,Set/Clear Enable Bit 712" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB711  ,Set/Clear Enable Bit 711" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB710  ,Set/Clear Enable Bit 710" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB709  ,Set/Clear Enable Bit 709" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB708  ,Set/Clear Enable Bit 708" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB707  ,Set/Clear Enable Bit 707" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB706  ,Set/Clear Enable Bit 706" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB705  ,Set/Clear Enable Bit 705" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB704  ,Set/Clear Enable Bit 704" "Disabled,Enabled"
else
hgroup.long 0x0158++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER22,Interrupt Set/Clear Enable Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x015C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB767  ,Set/Clear Enable Bit 767" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB766  ,Set/Clear Enable Bit 766" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB765  ,Set/Clear Enable Bit 765" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB764  ,Set/Clear Enable Bit 764" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB763  ,Set/Clear Enable Bit 763" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB762  ,Set/Clear Enable Bit 762" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB761  ,Set/Clear Enable Bit 761" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB760  ,Set/Clear Enable Bit 760" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB759  ,Set/Clear Enable Bit 759" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB758  ,Set/Clear Enable Bit 758" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB757  ,Set/Clear Enable Bit 757" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB756  ,Set/Clear Enable Bit 756" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB755  ,Set/Clear Enable Bit 755" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB754  ,Set/Clear Enable Bit 754" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB753  ,Set/Clear Enable Bit 753" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB752  ,Set/Clear Enable Bit 752" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB751  ,Set/Clear Enable Bit 751" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB750  ,Set/Clear Enable Bit 750" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB749  ,Set/Clear Enable Bit 749" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB748  ,Set/Clear Enable Bit 748" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB747  ,Set/Clear Enable Bit 747" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB746  ,Set/Clear Enable Bit 746" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB745  ,Set/Clear Enable Bit 745" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB744  ,Set/Clear Enable Bit 744" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB743  ,Set/Clear Enable Bit 743" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB742  ,Set/Clear Enable Bit 742" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB741  ,Set/Clear Enable Bit 741" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB740  ,Set/Clear Enable Bit 740" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB739  ,Set/Clear Enable Bit 739" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB738  ,Set/Clear Enable Bit 738" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB737  ,Set/Clear Enable Bit 737" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB736  ,Set/Clear Enable Bit 736" "Disabled,Enabled"
else
hgroup.long 0x015C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER23,Interrupt Set/Clear Enable Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0160++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB799  ,Set/Clear Enable Bit 799" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB798  ,Set/Clear Enable Bit 798" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB797  ,Set/Clear Enable Bit 797" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB796  ,Set/Clear Enable Bit 796" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB795  ,Set/Clear Enable Bit 795" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB794  ,Set/Clear Enable Bit 794" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB793  ,Set/Clear Enable Bit 793" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB792  ,Set/Clear Enable Bit 792" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB791  ,Set/Clear Enable Bit 791" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB790  ,Set/Clear Enable Bit 790" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB789  ,Set/Clear Enable Bit 789" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB788  ,Set/Clear Enable Bit 788" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB787  ,Set/Clear Enable Bit 787" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB786  ,Set/Clear Enable Bit 786" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB785  ,Set/Clear Enable Bit 785" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB784  ,Set/Clear Enable Bit 784" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB783  ,Set/Clear Enable Bit 783" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB782  ,Set/Clear Enable Bit 782" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB781  ,Set/Clear Enable Bit 781" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB780  ,Set/Clear Enable Bit 780" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB779  ,Set/Clear Enable Bit 779" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB778  ,Set/Clear Enable Bit 778" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB777  ,Set/Clear Enable Bit 777" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB776  ,Set/Clear Enable Bit 776" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB775  ,Set/Clear Enable Bit 775" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB774  ,Set/Clear Enable Bit 774" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB773  ,Set/Clear Enable Bit 773" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB772  ,Set/Clear Enable Bit 772" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB771  ,Set/Clear Enable Bit 771" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB770  ,Set/Clear Enable Bit 770" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB769  ,Set/Clear Enable Bit 769" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB768  ,Set/Clear Enable Bit 768" "Disabled,Enabled"
else
hgroup.long 0x0160++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER24,Interrupt Set/Clear Enable Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0164++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB831  ,Set/Clear Enable Bit 831" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB830  ,Set/Clear Enable Bit 830" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB829  ,Set/Clear Enable Bit 829" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB828  ,Set/Clear Enable Bit 828" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB827  ,Set/Clear Enable Bit 827" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB826  ,Set/Clear Enable Bit 826" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB825  ,Set/Clear Enable Bit 825" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB824  ,Set/Clear Enable Bit 824" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB823  ,Set/Clear Enable Bit 823" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB822  ,Set/Clear Enable Bit 822" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB821  ,Set/Clear Enable Bit 821" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB820  ,Set/Clear Enable Bit 820" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB819  ,Set/Clear Enable Bit 819" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB818  ,Set/Clear Enable Bit 818" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB817  ,Set/Clear Enable Bit 817" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB816  ,Set/Clear Enable Bit 816" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB815  ,Set/Clear Enable Bit 815" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB814  ,Set/Clear Enable Bit 814" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB813  ,Set/Clear Enable Bit 813" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB812  ,Set/Clear Enable Bit 812" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB811  ,Set/Clear Enable Bit 811" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB810  ,Set/Clear Enable Bit 810" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB809  ,Set/Clear Enable Bit 809" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB808  ,Set/Clear Enable Bit 808" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB807  ,Set/Clear Enable Bit 807" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB806  ,Set/Clear Enable Bit 806" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB805  ,Set/Clear Enable Bit 805" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB804  ,Set/Clear Enable Bit 804" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB803  ,Set/Clear Enable Bit 803" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB802  ,Set/Clear Enable Bit 802" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB801  ,Set/Clear Enable Bit 801" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB800  ,Set/Clear Enable Bit 800" "Disabled,Enabled"
else
hgroup.long 0x0164++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER25,Interrupt Set/Clear Enable Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0168++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB863  ,Set/Clear Enable Bit 863" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB862  ,Set/Clear Enable Bit 862" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB861  ,Set/Clear Enable Bit 861" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB860  ,Set/Clear Enable Bit 860" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB859  ,Set/Clear Enable Bit 859" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB858  ,Set/Clear Enable Bit 858" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB857  ,Set/Clear Enable Bit 857" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB856  ,Set/Clear Enable Bit 856" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB855  ,Set/Clear Enable Bit 855" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB854  ,Set/Clear Enable Bit 854" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB853  ,Set/Clear Enable Bit 853" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB852  ,Set/Clear Enable Bit 852" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB851  ,Set/Clear Enable Bit 851" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB850  ,Set/Clear Enable Bit 850" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB849  ,Set/Clear Enable Bit 849" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB848  ,Set/Clear Enable Bit 848" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB847  ,Set/Clear Enable Bit 847" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB846  ,Set/Clear Enable Bit 846" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB845  ,Set/Clear Enable Bit 845" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB844  ,Set/Clear Enable Bit 844" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB843  ,Set/Clear Enable Bit 843" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB842  ,Set/Clear Enable Bit 842" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB841  ,Set/Clear Enable Bit 841" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB840  ,Set/Clear Enable Bit 840" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB839  ,Set/Clear Enable Bit 839" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB838  ,Set/Clear Enable Bit 838" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB837  ,Set/Clear Enable Bit 837" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB836  ,Set/Clear Enable Bit 836" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB835  ,Set/Clear Enable Bit 835" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB834  ,Set/Clear Enable Bit 834" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB833  ,Set/Clear Enable Bit 833" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB832  ,Set/Clear Enable Bit 832" "Disabled,Enabled"
else
hgroup.long 0x0168++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER26,Interrupt Set/Clear Enable Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x016C++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB895  ,Set/Clear Enable Bit 895" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB894  ,Set/Clear Enable Bit 894" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB893  ,Set/Clear Enable Bit 893" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB892  ,Set/Clear Enable Bit 892" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB891  ,Set/Clear Enable Bit 891" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB890  ,Set/Clear Enable Bit 890" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB889  ,Set/Clear Enable Bit 889" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB888  ,Set/Clear Enable Bit 888" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB887  ,Set/Clear Enable Bit 887" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB886  ,Set/Clear Enable Bit 886" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB885  ,Set/Clear Enable Bit 885" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB884  ,Set/Clear Enable Bit 884" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB883  ,Set/Clear Enable Bit 883" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB882  ,Set/Clear Enable Bit 882" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB881  ,Set/Clear Enable Bit 881" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB880  ,Set/Clear Enable Bit 880" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB879  ,Set/Clear Enable Bit 879" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB878  ,Set/Clear Enable Bit 878" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB877  ,Set/Clear Enable Bit 877" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB876  ,Set/Clear Enable Bit 876" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB875  ,Set/Clear Enable Bit 875" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB874  ,Set/Clear Enable Bit 874" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB873  ,Set/Clear Enable Bit 873" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB872  ,Set/Clear Enable Bit 872" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB871  ,Set/Clear Enable Bit 871" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB870  ,Set/Clear Enable Bit 870" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB869  ,Set/Clear Enable Bit 869" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB868  ,Set/Clear Enable Bit 868" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB867  ,Set/Clear Enable Bit 867" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB866  ,Set/Clear Enable Bit 866" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB865  ,Set/Clear Enable Bit 865" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB864  ,Set/Clear Enable Bit 864" "Disabled,Enabled"
else
hgroup.long 0x016C++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER27,Interrupt Set/Clear Enable Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0170++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB927  ,Set/Clear Enable Bit 927" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB926  ,Set/Clear Enable Bit 926" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB925  ,Set/Clear Enable Bit 925" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB924  ,Set/Clear Enable Bit 924" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB923  ,Set/Clear Enable Bit 923" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB922  ,Set/Clear Enable Bit 922" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB921  ,Set/Clear Enable Bit 921" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB920  ,Set/Clear Enable Bit 920" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB919  ,Set/Clear Enable Bit 919" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB918  ,Set/Clear Enable Bit 918" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB917  ,Set/Clear Enable Bit 917" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB916  ,Set/Clear Enable Bit 916" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB915  ,Set/Clear Enable Bit 915" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB914  ,Set/Clear Enable Bit 914" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB913  ,Set/Clear Enable Bit 913" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB912  ,Set/Clear Enable Bit 912" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB911  ,Set/Clear Enable Bit 911" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB910  ,Set/Clear Enable Bit 910" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB909  ,Set/Clear Enable Bit 909" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB908  ,Set/Clear Enable Bit 908" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB907  ,Set/Clear Enable Bit 907" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB906  ,Set/Clear Enable Bit 906" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB905  ,Set/Clear Enable Bit 905" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB904  ,Set/Clear Enable Bit 904" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB903  ,Set/Clear Enable Bit 903" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB902  ,Set/Clear Enable Bit 902" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB901  ,Set/Clear Enable Bit 901" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB900  ,Set/Clear Enable Bit 900" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB899  ,Set/Clear Enable Bit 899" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB898  ,Set/Clear Enable Bit 898" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB897  ,Set/Clear Enable Bit 897" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB896  ,Set/Clear Enable Bit 896" "Disabled,Enabled"
else
hgroup.long 0x0170++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER28,Interrupt Set/Clear Enable Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0174++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB959  ,Set/Clear Enable Bit 959" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB958  ,Set/Clear Enable Bit 958" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB957  ,Set/Clear Enable Bit 957" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB956  ,Set/Clear Enable Bit 956" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB955  ,Set/Clear Enable Bit 955" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB954  ,Set/Clear Enable Bit 954" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB953  ,Set/Clear Enable Bit 953" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB952  ,Set/Clear Enable Bit 952" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB951  ,Set/Clear Enable Bit 951" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB950  ,Set/Clear Enable Bit 950" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB949  ,Set/Clear Enable Bit 949" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB948  ,Set/Clear Enable Bit 948" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB947  ,Set/Clear Enable Bit 947" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB946  ,Set/Clear Enable Bit 946" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB945  ,Set/Clear Enable Bit 945" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB944  ,Set/Clear Enable Bit 944" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB943  ,Set/Clear Enable Bit 943" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB942  ,Set/Clear Enable Bit 942" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB941  ,Set/Clear Enable Bit 941" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB940  ,Set/Clear Enable Bit 940" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB939  ,Set/Clear Enable Bit 939" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB938  ,Set/Clear Enable Bit 938" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB937  ,Set/Clear Enable Bit 937" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB936  ,Set/Clear Enable Bit 936" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB935  ,Set/Clear Enable Bit 935" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB934  ,Set/Clear Enable Bit 934" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB933  ,Set/Clear Enable Bit 933" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB932  ,Set/Clear Enable Bit 932" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB931  ,Set/Clear Enable Bit 931" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB930  ,Set/Clear Enable Bit 930" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB929  ,Set/Clear Enable Bit 929" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB928  ,Set/Clear Enable Bit 928" "Disabled,Enabled"
else
hgroup.long 0x0174++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER29,Interrupt Set/Clear Enable Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0178++0x03
line.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRENB991  ,Set/Clear Enable Bit 991" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRENB990  ,Set/Clear Enable Bit 990" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRENB989  ,Set/Clear Enable Bit 989" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRENB988  ,Set/Clear Enable Bit 988" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRENB987  ,Set/Clear Enable Bit 987" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRENB986  ,Set/Clear Enable Bit 986" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRENB985  ,Set/Clear Enable Bit 985" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRENB984  ,Set/Clear Enable Bit 984" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRENB983  ,Set/Clear Enable Bit 983" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRENB982  ,Set/Clear Enable Bit 982" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRENB981  ,Set/Clear Enable Bit 981" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRENB980  ,Set/Clear Enable Bit 980" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRENB979  ,Set/Clear Enable Bit 979" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRENB978  ,Set/Clear Enable Bit 978" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRENB977  ,Set/Clear Enable Bit 977" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRENB976  ,Set/Clear Enable Bit 976" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRENB975  ,Set/Clear Enable Bit 975" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRENB974  ,Set/Clear Enable Bit 974" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRENB973  ,Set/Clear Enable Bit 973" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRENB972  ,Set/Clear Enable Bit 972" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRENB971  ,Set/Clear Enable Bit 971" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRENB970  ,Set/Clear Enable Bit 970" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRENB969  ,Set/Clear Enable Bit 969" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRENB968  ,Set/Clear Enable Bit 968" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRENB967  ,Set/Clear Enable Bit 967" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRENB966  ,Set/Clear Enable Bit 966" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRENB965  ,Set/Clear Enable Bit 965" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRENB964  ,Set/Clear Enable Bit 964" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRENB963  ,Set/Clear Enable Bit 963" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRENB962  ,Set/Clear Enable Bit 962" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRENB961  ,Set/Clear Enable Bit 961" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRENB960  ,Set/Clear Enable Bit 960" "Disabled,Enabled"
else
hgroup.long 0x0178++0x03
hide.long 0x0 "GICD_SET/CLR_ENABLER30,Interrupt Set/Clear Enable Register 30"
endif
tree.end
width 22.
tree "Set/Clear Pending Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0200++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0200++0x03
line.long 0x0 "GICD_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0204++0x03
line.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND63   ,Set/Clear Pending Bit 63" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND62   ,Set/Clear Pending Bit 62" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND61   ,Set/Clear Pending Bit 61" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND60   ,Set/Clear Pending Bit 60" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND59   ,Set/Clear Pending Bit 59" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND58   ,Set/Clear Pending Bit 58" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND57   ,Set/Clear Pending Bit 57" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND56   ,Set/Clear Pending Bit 56" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND55   ,Set/Clear Pending Bit 55" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND54   ,Set/Clear Pending Bit 54" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND53   ,Set/Clear Pending Bit 53" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND52   ,Set/Clear Pending Bit 52" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND51   ,Set/Clear Pending Bit 51" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND50   ,Set/Clear Pending Bit 50" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND49   ,Set/Clear Pending Bit 49" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND48   ,Set/Clear Pending Bit 48" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND47   ,Set/Clear Pending Bit 47" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND46   ,Set/Clear Pending Bit 46" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND45   ,Set/Clear Pending Bit 45" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND44   ,Set/Clear Pending Bit 44" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND43   ,Set/Clear Pending Bit 43" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND42   ,Set/Clear Pending Bit 42" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND41   ,Set/Clear Pending Bit 41" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND40   ,Set/Clear Pending Bit 40" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND39   ,Set/Clear Pending Bit 39" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND38   ,Set/Clear Pending Bit 38" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND37   ,Set/Clear Pending Bit 37" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND36   ,Set/Clear Pending Bit 36" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND35   ,Set/Clear Pending Bit 35" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND34   ,Set/Clear Pending Bit 34" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND33   ,Set/Clear Pending Bit 33" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND32   ,Set/Clear Pending Bit 32" "Not pending,Pending"
else
hgroup.long 0x0204++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR1,Interrupt Set/Clear Pending Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0208++0x03
line.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND95   ,Set/Clear Pending Bit 95" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND94   ,Set/Clear Pending Bit 94" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND93   ,Set/Clear Pending Bit 93" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND92   ,Set/Clear Pending Bit 92" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND91   ,Set/Clear Pending Bit 91" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND90   ,Set/Clear Pending Bit 90" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND89   ,Set/Clear Pending Bit 89" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND88   ,Set/Clear Pending Bit 88" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND87   ,Set/Clear Pending Bit 87" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND86   ,Set/Clear Pending Bit 86" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND85   ,Set/Clear Pending Bit 85" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND84   ,Set/Clear Pending Bit 84" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND83   ,Set/Clear Pending Bit 83" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND82   ,Set/Clear Pending Bit 82" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND81   ,Set/Clear Pending Bit 81" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND80   ,Set/Clear Pending Bit 80" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND79   ,Set/Clear Pending Bit 79" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND78   ,Set/Clear Pending Bit 78" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND77   ,Set/Clear Pending Bit 77" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND76   ,Set/Clear Pending Bit 76" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND75   ,Set/Clear Pending Bit 75" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND74   ,Set/Clear Pending Bit 74" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND73   ,Set/Clear Pending Bit 73" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND72   ,Set/Clear Pending Bit 72" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND71   ,Set/Clear Pending Bit 71" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND70   ,Set/Clear Pending Bit 70" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND69   ,Set/Clear Pending Bit 69" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND68   ,Set/Clear Pending Bit 68" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND67   ,Set/Clear Pending Bit 67" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND66   ,Set/Clear Pending Bit 66" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND65   ,Set/Clear Pending Bit 65" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND64   ,Set/Clear Pending Bit 64" "Not pending,Pending"
else
hgroup.long 0x0208++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR2,Interrupt Set/Clear Pending Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x020C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND127  ,Set/Clear Pending Bit 127" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND126  ,Set/Clear Pending Bit 126" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND125  ,Set/Clear Pending Bit 125" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND124  ,Set/Clear Pending Bit 124" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND123  ,Set/Clear Pending Bit 123" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND122  ,Set/Clear Pending Bit 122" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND121  ,Set/Clear Pending Bit 121" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND120  ,Set/Clear Pending Bit 120" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND119  ,Set/Clear Pending Bit 119" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND118  ,Set/Clear Pending Bit 118" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND117  ,Set/Clear Pending Bit 117" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND116  ,Set/Clear Pending Bit 116" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND115  ,Set/Clear Pending Bit 115" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND114  ,Set/Clear Pending Bit 114" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND113  ,Set/Clear Pending Bit 113" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND112  ,Set/Clear Pending Bit 112" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND111  ,Set/Clear Pending Bit 111" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND110  ,Set/Clear Pending Bit 110" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND109  ,Set/Clear Pending Bit 109" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND108  ,Set/Clear Pending Bit 108" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND107  ,Set/Clear Pending Bit 107" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND106  ,Set/Clear Pending Bit 106" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND105  ,Set/Clear Pending Bit 105" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND104  ,Set/Clear Pending Bit 104" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND103  ,Set/Clear Pending Bit 103" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND102  ,Set/Clear Pending Bit 102" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND101  ,Set/Clear Pending Bit 101" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND100  ,Set/Clear Pending Bit 100" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND99   ,Set/Clear Pending Bit 99" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND98   ,Set/Clear Pending Bit 98" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND97   ,Set/Clear Pending Bit 97" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND96   ,Set/Clear Pending Bit 96" "Not pending,Pending"
else
hgroup.long 0x020C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR3,Interrupt Set/Clear Pending Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0210++0x03
line.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND159  ,Set/Clear Pending Bit 159" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND158  ,Set/Clear Pending Bit 158" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND157  ,Set/Clear Pending Bit 157" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND156  ,Set/Clear Pending Bit 156" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND155  ,Set/Clear Pending Bit 155" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND154  ,Set/Clear Pending Bit 154" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND153  ,Set/Clear Pending Bit 153" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND152  ,Set/Clear Pending Bit 152" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND151  ,Set/Clear Pending Bit 151" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND150  ,Set/Clear Pending Bit 150" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND149  ,Set/Clear Pending Bit 149" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND148  ,Set/Clear Pending Bit 148" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND147  ,Set/Clear Pending Bit 147" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND146  ,Set/Clear Pending Bit 146" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND145  ,Set/Clear Pending Bit 145" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND144  ,Set/Clear Pending Bit 144" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND143  ,Set/Clear Pending Bit 143" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND142  ,Set/Clear Pending Bit 142" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND141  ,Set/Clear Pending Bit 141" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND140  ,Set/Clear Pending Bit 140" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND139  ,Set/Clear Pending Bit 139" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND138  ,Set/Clear Pending Bit 138" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND137  ,Set/Clear Pending Bit 137" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND136  ,Set/Clear Pending Bit 136" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND135  ,Set/Clear Pending Bit 135" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND134  ,Set/Clear Pending Bit 134" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND133  ,Set/Clear Pending Bit 133" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND132  ,Set/Clear Pending Bit 132" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND131  ,Set/Clear Pending Bit 131" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND130  ,Set/Clear Pending Bit 130" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND129  ,Set/Clear Pending Bit 129" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND128  ,Set/Clear Pending Bit 128" "Not pending,Pending"
else
hgroup.long 0x0210++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR4,Interrupt Set/Clear Pending Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0214++0x03
line.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND191  ,Set/Clear Pending Bit 191" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND190  ,Set/Clear Pending Bit 190" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND189  ,Set/Clear Pending Bit 189" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND188  ,Set/Clear Pending Bit 188" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND187  ,Set/Clear Pending Bit 187" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND186  ,Set/Clear Pending Bit 186" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND185  ,Set/Clear Pending Bit 185" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND184  ,Set/Clear Pending Bit 184" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND183  ,Set/Clear Pending Bit 183" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND182  ,Set/Clear Pending Bit 182" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND181  ,Set/Clear Pending Bit 181" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND180  ,Set/Clear Pending Bit 180" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND179  ,Set/Clear Pending Bit 179" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND178  ,Set/Clear Pending Bit 178" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND177  ,Set/Clear Pending Bit 177" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND176  ,Set/Clear Pending Bit 176" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND175  ,Set/Clear Pending Bit 175" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND174  ,Set/Clear Pending Bit 174" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND173  ,Set/Clear Pending Bit 173" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND172  ,Set/Clear Pending Bit 172" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND171  ,Set/Clear Pending Bit 171" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND170  ,Set/Clear Pending Bit 170" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND169  ,Set/Clear Pending Bit 169" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND168  ,Set/Clear Pending Bit 168" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND167  ,Set/Clear Pending Bit 167" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND166  ,Set/Clear Pending Bit 166" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND165  ,Set/Clear Pending Bit 165" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND164  ,Set/Clear Pending Bit 164" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND163  ,Set/Clear Pending Bit 163" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND162  ,Set/Clear Pending Bit 162" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND161  ,Set/Clear Pending Bit 161" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND160  ,Set/Clear Pending Bit 160" "Not pending,Pending"
else
hgroup.long 0x0214++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR5,Interrupt Set/Clear Pending Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0218++0x03
line.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND223  ,Set/Clear Pending Bit 223" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND222  ,Set/Clear Pending Bit 222" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND221  ,Set/Clear Pending Bit 221" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND220  ,Set/Clear Pending Bit 220" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND219  ,Set/Clear Pending Bit 219" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND218  ,Set/Clear Pending Bit 218" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND217  ,Set/Clear Pending Bit 217" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND216  ,Set/Clear Pending Bit 216" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND215  ,Set/Clear Pending Bit 215" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND214  ,Set/Clear Pending Bit 214" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND213  ,Set/Clear Pending Bit 213" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND212  ,Set/Clear Pending Bit 212" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND211  ,Set/Clear Pending Bit 211" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND210  ,Set/Clear Pending Bit 210" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND209  ,Set/Clear Pending Bit 209" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND208  ,Set/Clear Pending Bit 208" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND207  ,Set/Clear Pending Bit 207" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND206  ,Set/Clear Pending Bit 206" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND205  ,Set/Clear Pending Bit 205" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND204  ,Set/Clear Pending Bit 204" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND203  ,Set/Clear Pending Bit 203" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND202  ,Set/Clear Pending Bit 202" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND201  ,Set/Clear Pending Bit 201" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND200  ,Set/Clear Pending Bit 200" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND199  ,Set/Clear Pending Bit 199" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND198  ,Set/Clear Pending Bit 198" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND197  ,Set/Clear Pending Bit 197" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND196  ,Set/Clear Pending Bit 196" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND195  ,Set/Clear Pending Bit 195" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND194  ,Set/Clear Pending Bit 194" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND193  ,Set/Clear Pending Bit 193" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND192  ,Set/Clear Pending Bit 192" "Not pending,Pending"
else
hgroup.long 0x0218++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR6,Interrupt Set/Clear Pending Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x021C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND255  ,Set/Clear Pending Bit 255" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND254  ,Set/Clear Pending Bit 254" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND253  ,Set/Clear Pending Bit 253" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND252  ,Set/Clear Pending Bit 252" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND251  ,Set/Clear Pending Bit 251" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND250  ,Set/Clear Pending Bit 250" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND249  ,Set/Clear Pending Bit 249" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND248  ,Set/Clear Pending Bit 248" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND247  ,Set/Clear Pending Bit 247" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND246  ,Set/Clear Pending Bit 246" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND245  ,Set/Clear Pending Bit 245" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND244  ,Set/Clear Pending Bit 244" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND243  ,Set/Clear Pending Bit 243" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND242  ,Set/Clear Pending Bit 242" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND241  ,Set/Clear Pending Bit 241" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND240  ,Set/Clear Pending Bit 240" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND239  ,Set/Clear Pending Bit 239" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND238  ,Set/Clear Pending Bit 238" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND237  ,Set/Clear Pending Bit 237" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND236  ,Set/Clear Pending Bit 236" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND235  ,Set/Clear Pending Bit 235" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND234  ,Set/Clear Pending Bit 234" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND233  ,Set/Clear Pending Bit 233" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND232  ,Set/Clear Pending Bit 232" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND231  ,Set/Clear Pending Bit 231" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND230  ,Set/Clear Pending Bit 230" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND229  ,Set/Clear Pending Bit 229" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND228  ,Set/Clear Pending Bit 228" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND227  ,Set/Clear Pending Bit 227" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND226  ,Set/Clear Pending Bit 226" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND225  ,Set/Clear Pending Bit 225" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND224  ,Set/Clear Pending Bit 224" "Not pending,Pending"
else
hgroup.long 0x021C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR7,Interrupt Set/Clear Pending Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0220++0x03
line.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND287  ,Set/Clear Pending Bit 287" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND286  ,Set/Clear Pending Bit 286" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND285  ,Set/Clear Pending Bit 285" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND284  ,Set/Clear Pending Bit 284" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND283  ,Set/Clear Pending Bit 283" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND282  ,Set/Clear Pending Bit 282" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND281  ,Set/Clear Pending Bit 281" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND280  ,Set/Clear Pending Bit 280" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND279  ,Set/Clear Pending Bit 279" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND278  ,Set/Clear Pending Bit 278" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND277  ,Set/Clear Pending Bit 277" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND276  ,Set/Clear Pending Bit 276" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND275  ,Set/Clear Pending Bit 275" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND274  ,Set/Clear Pending Bit 274" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND273  ,Set/Clear Pending Bit 273" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND272  ,Set/Clear Pending Bit 272" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND271  ,Set/Clear Pending Bit 271" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND270  ,Set/Clear Pending Bit 270" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND269  ,Set/Clear Pending Bit 269" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND268  ,Set/Clear Pending Bit 268" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND267  ,Set/Clear Pending Bit 267" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND266  ,Set/Clear Pending Bit 266" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND265  ,Set/Clear Pending Bit 265" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND264  ,Set/Clear Pending Bit 264" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND263  ,Set/Clear Pending Bit 263" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND262  ,Set/Clear Pending Bit 262" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND261  ,Set/Clear Pending Bit 261" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND260  ,Set/Clear Pending Bit 260" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND259  ,Set/Clear Pending Bit 259" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND258  ,Set/Clear Pending Bit 258" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND257  ,Set/Clear Pending Bit 257" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND256  ,Set/Clear Pending Bit 256" "Not pending,Pending"
else
hgroup.long 0x0220++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR8,Interrupt Set/Clear Pending Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0224++0x03
line.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND319  ,Set/Clear Pending Bit 319" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND318  ,Set/Clear Pending Bit 318" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND317  ,Set/Clear Pending Bit 317" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND316  ,Set/Clear Pending Bit 316" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND315  ,Set/Clear Pending Bit 315" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND314  ,Set/Clear Pending Bit 314" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND313  ,Set/Clear Pending Bit 313" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND312  ,Set/Clear Pending Bit 312" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND311  ,Set/Clear Pending Bit 311" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND310  ,Set/Clear Pending Bit 310" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND309  ,Set/Clear Pending Bit 309" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND308  ,Set/Clear Pending Bit 308" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND307  ,Set/Clear Pending Bit 307" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND306  ,Set/Clear Pending Bit 306" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND305  ,Set/Clear Pending Bit 305" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND304  ,Set/Clear Pending Bit 304" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND303  ,Set/Clear Pending Bit 303" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND302  ,Set/Clear Pending Bit 302" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND301  ,Set/Clear Pending Bit 301" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND300  ,Set/Clear Pending Bit 300" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND299  ,Set/Clear Pending Bit 299" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND298  ,Set/Clear Pending Bit 298" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND297  ,Set/Clear Pending Bit 297" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND296  ,Set/Clear Pending Bit 296" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND295  ,Set/Clear Pending Bit 295" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND294  ,Set/Clear Pending Bit 294" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND293  ,Set/Clear Pending Bit 293" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND292  ,Set/Clear Pending Bit 292" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND291  ,Set/Clear Pending Bit 291" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND290  ,Set/Clear Pending Bit 290" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND289  ,Set/Clear Pending Bit 289" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND288  ,Set/Clear Pending Bit 288" "Not pending,Pending"
else
hgroup.long 0x0224++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR9,Interrupt Set/Clear Pending Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0228++0x03
line.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND351  ,Set/Clear Pending Bit 351" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND350  ,Set/Clear Pending Bit 350" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND349  ,Set/Clear Pending Bit 349" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND348  ,Set/Clear Pending Bit 348" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND347  ,Set/Clear Pending Bit 347" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND346  ,Set/Clear Pending Bit 346" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND345  ,Set/Clear Pending Bit 345" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND344  ,Set/Clear Pending Bit 344" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND343  ,Set/Clear Pending Bit 343" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND342  ,Set/Clear Pending Bit 342" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND341  ,Set/Clear Pending Bit 341" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND340  ,Set/Clear Pending Bit 340" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND339  ,Set/Clear Pending Bit 339" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND338  ,Set/Clear Pending Bit 338" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND337  ,Set/Clear Pending Bit 337" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND336  ,Set/Clear Pending Bit 336" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND335  ,Set/Clear Pending Bit 335" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND334  ,Set/Clear Pending Bit 334" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND333  ,Set/Clear Pending Bit 333" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND332  ,Set/Clear Pending Bit 332" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND331  ,Set/Clear Pending Bit 331" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND330  ,Set/Clear Pending Bit 330" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND329  ,Set/Clear Pending Bit 329" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND328  ,Set/Clear Pending Bit 328" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND327  ,Set/Clear Pending Bit 327" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND326  ,Set/Clear Pending Bit 326" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND325  ,Set/Clear Pending Bit 325" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND324  ,Set/Clear Pending Bit 324" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND323  ,Set/Clear Pending Bit 323" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND322  ,Set/Clear Pending Bit 322" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND321  ,Set/Clear Pending Bit 321" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND320  ,Set/Clear Pending Bit 320" "Not pending,Pending"
else
hgroup.long 0x0228++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR10,Interrupt Set/Clear Pending Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x022C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND383  ,Set/Clear Pending Bit 383" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND382  ,Set/Clear Pending Bit 382" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND381  ,Set/Clear Pending Bit 381" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND380  ,Set/Clear Pending Bit 380" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND379  ,Set/Clear Pending Bit 379" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND378  ,Set/Clear Pending Bit 378" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND377  ,Set/Clear Pending Bit 377" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND376  ,Set/Clear Pending Bit 376" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND375  ,Set/Clear Pending Bit 375" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND374  ,Set/Clear Pending Bit 374" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND373  ,Set/Clear Pending Bit 373" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND372  ,Set/Clear Pending Bit 372" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND371  ,Set/Clear Pending Bit 371" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND370  ,Set/Clear Pending Bit 370" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND369  ,Set/Clear Pending Bit 369" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND368  ,Set/Clear Pending Bit 368" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND367  ,Set/Clear Pending Bit 367" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND366  ,Set/Clear Pending Bit 366" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND365  ,Set/Clear Pending Bit 365" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND364  ,Set/Clear Pending Bit 364" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND363  ,Set/Clear Pending Bit 363" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND362  ,Set/Clear Pending Bit 362" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND361  ,Set/Clear Pending Bit 361" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND360  ,Set/Clear Pending Bit 360" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND359  ,Set/Clear Pending Bit 359" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND358  ,Set/Clear Pending Bit 358" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND357  ,Set/Clear Pending Bit 357" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND356  ,Set/Clear Pending Bit 356" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND355  ,Set/Clear Pending Bit 355" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND354  ,Set/Clear Pending Bit 354" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND353  ,Set/Clear Pending Bit 353" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND352  ,Set/Clear Pending Bit 352" "Not pending,Pending"
else
hgroup.long 0x022C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR11,Interrupt Set/Clear Pending Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0230++0x03
line.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND415  ,Set/Clear Pending Bit 415" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND414  ,Set/Clear Pending Bit 414" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND413  ,Set/Clear Pending Bit 413" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND412  ,Set/Clear Pending Bit 412" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND411  ,Set/Clear Pending Bit 411" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND410  ,Set/Clear Pending Bit 410" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND409  ,Set/Clear Pending Bit 409" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND408  ,Set/Clear Pending Bit 408" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND407  ,Set/Clear Pending Bit 407" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND406  ,Set/Clear Pending Bit 406" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND405  ,Set/Clear Pending Bit 405" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND404  ,Set/Clear Pending Bit 404" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND403  ,Set/Clear Pending Bit 403" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND402  ,Set/Clear Pending Bit 402" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND401  ,Set/Clear Pending Bit 401" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND400  ,Set/Clear Pending Bit 400" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND399  ,Set/Clear Pending Bit 399" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND398  ,Set/Clear Pending Bit 398" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND397  ,Set/Clear Pending Bit 397" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND396  ,Set/Clear Pending Bit 396" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND395  ,Set/Clear Pending Bit 395" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND394  ,Set/Clear Pending Bit 394" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND393  ,Set/Clear Pending Bit 393" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND392  ,Set/Clear Pending Bit 392" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND391  ,Set/Clear Pending Bit 391" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND390  ,Set/Clear Pending Bit 390" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND389  ,Set/Clear Pending Bit 389" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND388  ,Set/Clear Pending Bit 388" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND387  ,Set/Clear Pending Bit 387" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND386  ,Set/Clear Pending Bit 386" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND385  ,Set/Clear Pending Bit 385" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND384  ,Set/Clear Pending Bit 384" "Not pending,Pending"
else
hgroup.long 0x0230++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR12,Interrupt Set/Clear Pending Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0234++0x03
line.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND447  ,Set/Clear Pending Bit 447" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND446  ,Set/Clear Pending Bit 446" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND445  ,Set/Clear Pending Bit 445" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND444  ,Set/Clear Pending Bit 444" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND443  ,Set/Clear Pending Bit 443" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND442  ,Set/Clear Pending Bit 442" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND441  ,Set/Clear Pending Bit 441" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND440  ,Set/Clear Pending Bit 440" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND439  ,Set/Clear Pending Bit 439" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND438  ,Set/Clear Pending Bit 438" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND437  ,Set/Clear Pending Bit 437" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND436  ,Set/Clear Pending Bit 436" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND435  ,Set/Clear Pending Bit 435" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND434  ,Set/Clear Pending Bit 434" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND433  ,Set/Clear Pending Bit 433" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND432  ,Set/Clear Pending Bit 432" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND431  ,Set/Clear Pending Bit 431" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND430  ,Set/Clear Pending Bit 430" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND429  ,Set/Clear Pending Bit 429" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND428  ,Set/Clear Pending Bit 428" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND427  ,Set/Clear Pending Bit 427" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND426  ,Set/Clear Pending Bit 426" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND425  ,Set/Clear Pending Bit 425" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND424  ,Set/Clear Pending Bit 424" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND423  ,Set/Clear Pending Bit 423" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND422  ,Set/Clear Pending Bit 422" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND421  ,Set/Clear Pending Bit 421" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND420  ,Set/Clear Pending Bit 420" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND419  ,Set/Clear Pending Bit 419" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND418  ,Set/Clear Pending Bit 418" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND417  ,Set/Clear Pending Bit 417" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND416  ,Set/Clear Pending Bit 416" "Not pending,Pending"
else
hgroup.long 0x0234++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR13,Interrupt Set/Clear Pending Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0238++0x03
line.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND479  ,Set/Clear Pending Bit 479" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND478  ,Set/Clear Pending Bit 478" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND477  ,Set/Clear Pending Bit 477" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND476  ,Set/Clear Pending Bit 476" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND475  ,Set/Clear Pending Bit 475" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND474  ,Set/Clear Pending Bit 474" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND473  ,Set/Clear Pending Bit 473" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND472  ,Set/Clear Pending Bit 472" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND471  ,Set/Clear Pending Bit 471" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND470  ,Set/Clear Pending Bit 470" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND469  ,Set/Clear Pending Bit 469" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND468  ,Set/Clear Pending Bit 468" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND467  ,Set/Clear Pending Bit 467" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND466  ,Set/Clear Pending Bit 466" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND465  ,Set/Clear Pending Bit 465" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND464  ,Set/Clear Pending Bit 464" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND463  ,Set/Clear Pending Bit 463" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND462  ,Set/Clear Pending Bit 462" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND461  ,Set/Clear Pending Bit 461" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND460  ,Set/Clear Pending Bit 460" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND459  ,Set/Clear Pending Bit 459" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND458  ,Set/Clear Pending Bit 458" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND457  ,Set/Clear Pending Bit 457" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND456  ,Set/Clear Pending Bit 456" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND455  ,Set/Clear Pending Bit 455" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND454  ,Set/Clear Pending Bit 454" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND453  ,Set/Clear Pending Bit 453" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND452  ,Set/Clear Pending Bit 452" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND451  ,Set/Clear Pending Bit 451" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND450  ,Set/Clear Pending Bit 450" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND449  ,Set/Clear Pending Bit 449" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND448  ,Set/Clear Pending Bit 448" "Not pending,Pending"
else
hgroup.long 0x0238++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR14,Interrupt Set/Clear Pending Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x023C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND511  ,Set/Clear Pending Bit 511" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND510  ,Set/Clear Pending Bit 510" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND509  ,Set/Clear Pending Bit 509" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND508  ,Set/Clear Pending Bit 508" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND507  ,Set/Clear Pending Bit 507" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND506  ,Set/Clear Pending Bit 506" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND505  ,Set/Clear Pending Bit 505" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND504  ,Set/Clear Pending Bit 504" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND503  ,Set/Clear Pending Bit 503" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND502  ,Set/Clear Pending Bit 502" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND501  ,Set/Clear Pending Bit 501" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND500  ,Set/Clear Pending Bit 500" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND499  ,Set/Clear Pending Bit 499" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND498  ,Set/Clear Pending Bit 498" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND497  ,Set/Clear Pending Bit 497" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND496  ,Set/Clear Pending Bit 496" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND495  ,Set/Clear Pending Bit 495" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND494  ,Set/Clear Pending Bit 494" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND493  ,Set/Clear Pending Bit 493" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND492  ,Set/Clear Pending Bit 492" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND491  ,Set/Clear Pending Bit 491" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND490  ,Set/Clear Pending Bit 490" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND489  ,Set/Clear Pending Bit 489" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND488  ,Set/Clear Pending Bit 488" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND487  ,Set/Clear Pending Bit 487" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND486  ,Set/Clear Pending Bit 486" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND485  ,Set/Clear Pending Bit 485" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND484  ,Set/Clear Pending Bit 484" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND483  ,Set/Clear Pending Bit 483" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND482  ,Set/Clear Pending Bit 482" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND481  ,Set/Clear Pending Bit 481" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND480  ,Set/Clear Pending Bit 480" "Not pending,Pending"
else
hgroup.long 0x023C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR15,Interrupt Set/Clear Pending Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0240++0x03
line.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND543  ,Set/Clear Pending Bit 543" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND542  ,Set/Clear Pending Bit 542" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND541  ,Set/Clear Pending Bit 541" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND540  ,Set/Clear Pending Bit 540" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND539  ,Set/Clear Pending Bit 539" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND538  ,Set/Clear Pending Bit 538" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND537  ,Set/Clear Pending Bit 537" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND536  ,Set/Clear Pending Bit 536" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND535  ,Set/Clear Pending Bit 535" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND534  ,Set/Clear Pending Bit 534" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND533  ,Set/Clear Pending Bit 533" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND532  ,Set/Clear Pending Bit 532" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND531  ,Set/Clear Pending Bit 531" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND530  ,Set/Clear Pending Bit 530" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND529  ,Set/Clear Pending Bit 529" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND528  ,Set/Clear Pending Bit 528" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND527  ,Set/Clear Pending Bit 527" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND526  ,Set/Clear Pending Bit 526" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND525  ,Set/Clear Pending Bit 525" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND524  ,Set/Clear Pending Bit 524" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND523  ,Set/Clear Pending Bit 523" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND522  ,Set/Clear Pending Bit 522" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND521  ,Set/Clear Pending Bit 521" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND520  ,Set/Clear Pending Bit 520" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND519  ,Set/Clear Pending Bit 519" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND518  ,Set/Clear Pending Bit 518" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND517  ,Set/Clear Pending Bit 517" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND516  ,Set/Clear Pending Bit 516" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND515  ,Set/Clear Pending Bit 515" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND514  ,Set/Clear Pending Bit 514" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND513  ,Set/Clear Pending Bit 513" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND512  ,Set/Clear Pending Bit 512" "Not pending,Pending"
else
hgroup.long 0x0240++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR16,Interrupt Set/Clear Pending Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0244++0x03
line.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND575  ,Set/Clear Pending Bit 575" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND574  ,Set/Clear Pending Bit 574" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND573  ,Set/Clear Pending Bit 573" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND572  ,Set/Clear Pending Bit 572" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND571  ,Set/Clear Pending Bit 571" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND570  ,Set/Clear Pending Bit 570" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND569  ,Set/Clear Pending Bit 569" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND568  ,Set/Clear Pending Bit 568" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND567  ,Set/Clear Pending Bit 567" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND566  ,Set/Clear Pending Bit 566" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND565  ,Set/Clear Pending Bit 565" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND564  ,Set/Clear Pending Bit 564" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND563  ,Set/Clear Pending Bit 563" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND562  ,Set/Clear Pending Bit 562" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND561  ,Set/Clear Pending Bit 561" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND560  ,Set/Clear Pending Bit 560" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND559  ,Set/Clear Pending Bit 559" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND558  ,Set/Clear Pending Bit 558" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND557  ,Set/Clear Pending Bit 557" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND556  ,Set/Clear Pending Bit 556" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND555  ,Set/Clear Pending Bit 555" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND554  ,Set/Clear Pending Bit 554" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND553  ,Set/Clear Pending Bit 553" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND552  ,Set/Clear Pending Bit 552" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND551  ,Set/Clear Pending Bit 551" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND550  ,Set/Clear Pending Bit 550" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND549  ,Set/Clear Pending Bit 549" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND548  ,Set/Clear Pending Bit 548" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND547  ,Set/Clear Pending Bit 547" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND546  ,Set/Clear Pending Bit 546" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND545  ,Set/Clear Pending Bit 545" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND544  ,Set/Clear Pending Bit 544" "Not pending,Pending"
else
hgroup.long 0x0244++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR17,Interrupt Set/Clear Pending Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0248++0x03
line.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND607  ,Set/Clear Pending Bit 607" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND606  ,Set/Clear Pending Bit 606" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND605  ,Set/Clear Pending Bit 605" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND604  ,Set/Clear Pending Bit 604" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND603  ,Set/Clear Pending Bit 603" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND602  ,Set/Clear Pending Bit 602" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND601  ,Set/Clear Pending Bit 601" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND600  ,Set/Clear Pending Bit 600" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND599  ,Set/Clear Pending Bit 599" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND598  ,Set/Clear Pending Bit 598" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND597  ,Set/Clear Pending Bit 597" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND596  ,Set/Clear Pending Bit 596" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND595  ,Set/Clear Pending Bit 595" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND594  ,Set/Clear Pending Bit 594" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND593  ,Set/Clear Pending Bit 593" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND592  ,Set/Clear Pending Bit 592" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND591  ,Set/Clear Pending Bit 591" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND590  ,Set/Clear Pending Bit 590" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND589  ,Set/Clear Pending Bit 589" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND588  ,Set/Clear Pending Bit 588" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND587  ,Set/Clear Pending Bit 587" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND586  ,Set/Clear Pending Bit 586" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND585  ,Set/Clear Pending Bit 585" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND584  ,Set/Clear Pending Bit 584" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND583  ,Set/Clear Pending Bit 583" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND582  ,Set/Clear Pending Bit 582" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND581  ,Set/Clear Pending Bit 581" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND580  ,Set/Clear Pending Bit 580" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND579  ,Set/Clear Pending Bit 579" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND578  ,Set/Clear Pending Bit 578" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND577  ,Set/Clear Pending Bit 577" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND576  ,Set/Clear Pending Bit 576" "Not pending,Pending"
else
hgroup.long 0x0248++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR18,Interrupt Set/Clear Pending Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x024C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND639  ,Set/Clear Pending Bit 639" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND638  ,Set/Clear Pending Bit 638" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND637  ,Set/Clear Pending Bit 637" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND636  ,Set/Clear Pending Bit 636" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND635  ,Set/Clear Pending Bit 635" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND634  ,Set/Clear Pending Bit 634" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND633  ,Set/Clear Pending Bit 633" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND632  ,Set/Clear Pending Bit 632" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND631  ,Set/Clear Pending Bit 631" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND630  ,Set/Clear Pending Bit 630" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND629  ,Set/Clear Pending Bit 629" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND628  ,Set/Clear Pending Bit 628" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND627  ,Set/Clear Pending Bit 627" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND626  ,Set/Clear Pending Bit 626" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND625  ,Set/Clear Pending Bit 625" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND624  ,Set/Clear Pending Bit 624" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND623  ,Set/Clear Pending Bit 623" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND622  ,Set/Clear Pending Bit 622" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND621  ,Set/Clear Pending Bit 621" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND620  ,Set/Clear Pending Bit 620" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND619  ,Set/Clear Pending Bit 619" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND618  ,Set/Clear Pending Bit 618" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND617  ,Set/Clear Pending Bit 617" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND616  ,Set/Clear Pending Bit 616" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND615  ,Set/Clear Pending Bit 615" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND614  ,Set/Clear Pending Bit 614" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND613  ,Set/Clear Pending Bit 613" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND612  ,Set/Clear Pending Bit 612" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND611  ,Set/Clear Pending Bit 611" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND610  ,Set/Clear Pending Bit 610" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND609  ,Set/Clear Pending Bit 609" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND608  ,Set/Clear Pending Bit 608" "Not pending,Pending"
else
hgroup.long 0x024C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR19,Interrupt Set/Clear Pending Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0250++0x03
line.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND671  ,Set/Clear Pending Bit 671" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND670  ,Set/Clear Pending Bit 670" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND669  ,Set/Clear Pending Bit 669" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND668  ,Set/Clear Pending Bit 668" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND667  ,Set/Clear Pending Bit 667" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND666  ,Set/Clear Pending Bit 666" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND665  ,Set/Clear Pending Bit 665" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND664  ,Set/Clear Pending Bit 664" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND663  ,Set/Clear Pending Bit 663" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND662  ,Set/Clear Pending Bit 662" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND661  ,Set/Clear Pending Bit 661" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND660  ,Set/Clear Pending Bit 660" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND659  ,Set/Clear Pending Bit 659" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND658  ,Set/Clear Pending Bit 658" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND657  ,Set/Clear Pending Bit 657" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND656  ,Set/Clear Pending Bit 656" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND655  ,Set/Clear Pending Bit 655" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND654  ,Set/Clear Pending Bit 654" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND653  ,Set/Clear Pending Bit 653" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND652  ,Set/Clear Pending Bit 652" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND651  ,Set/Clear Pending Bit 651" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND650  ,Set/Clear Pending Bit 650" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND649  ,Set/Clear Pending Bit 649" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND648  ,Set/Clear Pending Bit 648" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND647  ,Set/Clear Pending Bit 647" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND646  ,Set/Clear Pending Bit 646" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND645  ,Set/Clear Pending Bit 645" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND644  ,Set/Clear Pending Bit 644" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND643  ,Set/Clear Pending Bit 643" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND642  ,Set/Clear Pending Bit 642" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND641  ,Set/Clear Pending Bit 641" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND640  ,Set/Clear Pending Bit 640" "Not pending,Pending"
else
hgroup.long 0x0250++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR20,Interrupt Set/Clear Pending Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0254++0x03
line.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND703  ,Set/Clear Pending Bit 703" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND702  ,Set/Clear Pending Bit 702" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND701  ,Set/Clear Pending Bit 701" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND700  ,Set/Clear Pending Bit 700" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND699  ,Set/Clear Pending Bit 699" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND698  ,Set/Clear Pending Bit 698" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND697  ,Set/Clear Pending Bit 697" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND696  ,Set/Clear Pending Bit 696" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND695  ,Set/Clear Pending Bit 695" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND694  ,Set/Clear Pending Bit 694" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND693  ,Set/Clear Pending Bit 693" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND692  ,Set/Clear Pending Bit 692" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND691  ,Set/Clear Pending Bit 691" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND690  ,Set/Clear Pending Bit 690" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND689  ,Set/Clear Pending Bit 689" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND688  ,Set/Clear Pending Bit 688" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND687  ,Set/Clear Pending Bit 687" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND686  ,Set/Clear Pending Bit 686" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND685  ,Set/Clear Pending Bit 685" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND684  ,Set/Clear Pending Bit 684" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND683  ,Set/Clear Pending Bit 683" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND682  ,Set/Clear Pending Bit 682" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND681  ,Set/Clear Pending Bit 681" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND680  ,Set/Clear Pending Bit 680" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND679  ,Set/Clear Pending Bit 679" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND678  ,Set/Clear Pending Bit 678" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND677  ,Set/Clear Pending Bit 677" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND676  ,Set/Clear Pending Bit 676" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND675  ,Set/Clear Pending Bit 675" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND674  ,Set/Clear Pending Bit 674" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND673  ,Set/Clear Pending Bit 673" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND672  ,Set/Clear Pending Bit 672" "Not pending,Pending"
else
hgroup.long 0x0254++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR21,Interrupt Set/Clear Pending Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0258++0x03
line.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND735  ,Set/Clear Pending Bit 735" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND734  ,Set/Clear Pending Bit 734" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND733  ,Set/Clear Pending Bit 733" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND732  ,Set/Clear Pending Bit 732" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND731  ,Set/Clear Pending Bit 731" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND730  ,Set/Clear Pending Bit 730" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND729  ,Set/Clear Pending Bit 729" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND728  ,Set/Clear Pending Bit 728" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND727  ,Set/Clear Pending Bit 727" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND726  ,Set/Clear Pending Bit 726" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND725  ,Set/Clear Pending Bit 725" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND724  ,Set/Clear Pending Bit 724" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND723  ,Set/Clear Pending Bit 723" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND722  ,Set/Clear Pending Bit 722" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND721  ,Set/Clear Pending Bit 721" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND720  ,Set/Clear Pending Bit 720" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND719  ,Set/Clear Pending Bit 719" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND718  ,Set/Clear Pending Bit 718" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND717  ,Set/Clear Pending Bit 717" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND716  ,Set/Clear Pending Bit 716" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND715  ,Set/Clear Pending Bit 715" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND714  ,Set/Clear Pending Bit 714" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND713  ,Set/Clear Pending Bit 713" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND712  ,Set/Clear Pending Bit 712" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND711  ,Set/Clear Pending Bit 711" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND710  ,Set/Clear Pending Bit 710" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND709  ,Set/Clear Pending Bit 709" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND708  ,Set/Clear Pending Bit 708" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND707  ,Set/Clear Pending Bit 707" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND706  ,Set/Clear Pending Bit 706" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND705  ,Set/Clear Pending Bit 705" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND704  ,Set/Clear Pending Bit 704" "Not pending,Pending"
else
hgroup.long 0x0258++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR22,Interrupt Set/Clear Pending Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x025C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND767  ,Set/Clear Pending Bit 767" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND766  ,Set/Clear Pending Bit 766" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND765  ,Set/Clear Pending Bit 765" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND764  ,Set/Clear Pending Bit 764" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND763  ,Set/Clear Pending Bit 763" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND762  ,Set/Clear Pending Bit 762" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND761  ,Set/Clear Pending Bit 761" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND760  ,Set/Clear Pending Bit 760" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND759  ,Set/Clear Pending Bit 759" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND758  ,Set/Clear Pending Bit 758" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND757  ,Set/Clear Pending Bit 757" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND756  ,Set/Clear Pending Bit 756" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND755  ,Set/Clear Pending Bit 755" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND754  ,Set/Clear Pending Bit 754" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND753  ,Set/Clear Pending Bit 753" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND752  ,Set/Clear Pending Bit 752" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND751  ,Set/Clear Pending Bit 751" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND750  ,Set/Clear Pending Bit 750" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND749  ,Set/Clear Pending Bit 749" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND748  ,Set/Clear Pending Bit 748" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND747  ,Set/Clear Pending Bit 747" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND746  ,Set/Clear Pending Bit 746" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND745  ,Set/Clear Pending Bit 745" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND744  ,Set/Clear Pending Bit 744" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND743  ,Set/Clear Pending Bit 743" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND742  ,Set/Clear Pending Bit 742" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND741  ,Set/Clear Pending Bit 741" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND740  ,Set/Clear Pending Bit 740" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND739  ,Set/Clear Pending Bit 739" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND738  ,Set/Clear Pending Bit 738" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND737  ,Set/Clear Pending Bit 737" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND736  ,Set/Clear Pending Bit 736" "Not pending,Pending"
else
hgroup.long 0x025C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR23,Interrupt Set/Clear Pending Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0260++0x03
line.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND799  ,Set/Clear Pending Bit 799" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND798  ,Set/Clear Pending Bit 798" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND797  ,Set/Clear Pending Bit 797" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND796  ,Set/Clear Pending Bit 796" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND795  ,Set/Clear Pending Bit 795" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND794  ,Set/Clear Pending Bit 794" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND793  ,Set/Clear Pending Bit 793" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND792  ,Set/Clear Pending Bit 792" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND791  ,Set/Clear Pending Bit 791" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND790  ,Set/Clear Pending Bit 790" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND789  ,Set/Clear Pending Bit 789" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND788  ,Set/Clear Pending Bit 788" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND787  ,Set/Clear Pending Bit 787" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND786  ,Set/Clear Pending Bit 786" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND785  ,Set/Clear Pending Bit 785" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND784  ,Set/Clear Pending Bit 784" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND783  ,Set/Clear Pending Bit 783" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND782  ,Set/Clear Pending Bit 782" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND781  ,Set/Clear Pending Bit 781" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND780  ,Set/Clear Pending Bit 780" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND779  ,Set/Clear Pending Bit 779" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND778  ,Set/Clear Pending Bit 778" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND777  ,Set/Clear Pending Bit 777" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND776  ,Set/Clear Pending Bit 776" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND775  ,Set/Clear Pending Bit 775" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND774  ,Set/Clear Pending Bit 774" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND773  ,Set/Clear Pending Bit 773" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND772  ,Set/Clear Pending Bit 772" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND771  ,Set/Clear Pending Bit 771" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND770  ,Set/Clear Pending Bit 770" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND769  ,Set/Clear Pending Bit 769" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND768  ,Set/Clear Pending Bit 768" "Not pending,Pending"
else
hgroup.long 0x0260++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR24,Interrupt Set/Clear Pending Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0264++0x03
line.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND831  ,Set/Clear Pending Bit 831" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND830  ,Set/Clear Pending Bit 830" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND829  ,Set/Clear Pending Bit 829" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND828  ,Set/Clear Pending Bit 828" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND827  ,Set/Clear Pending Bit 827" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND826  ,Set/Clear Pending Bit 826" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND825  ,Set/Clear Pending Bit 825" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND824  ,Set/Clear Pending Bit 824" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND823  ,Set/Clear Pending Bit 823" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND822  ,Set/Clear Pending Bit 822" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND821  ,Set/Clear Pending Bit 821" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND820  ,Set/Clear Pending Bit 820" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND819  ,Set/Clear Pending Bit 819" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND818  ,Set/Clear Pending Bit 818" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND817  ,Set/Clear Pending Bit 817" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND816  ,Set/Clear Pending Bit 816" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND815  ,Set/Clear Pending Bit 815" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND814  ,Set/Clear Pending Bit 814" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND813  ,Set/Clear Pending Bit 813" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND812  ,Set/Clear Pending Bit 812" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND811  ,Set/Clear Pending Bit 811" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND810  ,Set/Clear Pending Bit 810" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND809  ,Set/Clear Pending Bit 809" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND808  ,Set/Clear Pending Bit 808" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND807  ,Set/Clear Pending Bit 807" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND806  ,Set/Clear Pending Bit 806" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND805  ,Set/Clear Pending Bit 805" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND804  ,Set/Clear Pending Bit 804" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND803  ,Set/Clear Pending Bit 803" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND802  ,Set/Clear Pending Bit 802" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND801  ,Set/Clear Pending Bit 801" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND800  ,Set/Clear Pending Bit 800" "Not pending,Pending"
else
hgroup.long 0x0264++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR25,Interrupt Set/Clear Pending Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0268++0x03
line.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND863  ,Set/Clear Pending Bit 863" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND862  ,Set/Clear Pending Bit 862" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND861  ,Set/Clear Pending Bit 861" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND860  ,Set/Clear Pending Bit 860" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND859  ,Set/Clear Pending Bit 859" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND858  ,Set/Clear Pending Bit 858" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND857  ,Set/Clear Pending Bit 857" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND856  ,Set/Clear Pending Bit 856" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND855  ,Set/Clear Pending Bit 855" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND854  ,Set/Clear Pending Bit 854" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND853  ,Set/Clear Pending Bit 853" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND852  ,Set/Clear Pending Bit 852" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND851  ,Set/Clear Pending Bit 851" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND850  ,Set/Clear Pending Bit 850" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND849  ,Set/Clear Pending Bit 849" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND848  ,Set/Clear Pending Bit 848" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND847  ,Set/Clear Pending Bit 847" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND846  ,Set/Clear Pending Bit 846" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND845  ,Set/Clear Pending Bit 845" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND844  ,Set/Clear Pending Bit 844" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND843  ,Set/Clear Pending Bit 843" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND842  ,Set/Clear Pending Bit 842" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND841  ,Set/Clear Pending Bit 841" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND840  ,Set/Clear Pending Bit 840" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND839  ,Set/Clear Pending Bit 839" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND838  ,Set/Clear Pending Bit 838" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND837  ,Set/Clear Pending Bit 837" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND836  ,Set/Clear Pending Bit 836" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND835  ,Set/Clear Pending Bit 835" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND834  ,Set/Clear Pending Bit 834" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND833  ,Set/Clear Pending Bit 833" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND832  ,Set/Clear Pending Bit 832" "Not pending,Pending"
else
hgroup.long 0x0268++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR26,Interrupt Set/Clear Pending Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x026C++0x03
line.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND895  ,Set/Clear Pending Bit 895" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND894  ,Set/Clear Pending Bit 894" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND893  ,Set/Clear Pending Bit 893" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND892  ,Set/Clear Pending Bit 892" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND891  ,Set/Clear Pending Bit 891" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND890  ,Set/Clear Pending Bit 890" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND889  ,Set/Clear Pending Bit 889" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND888  ,Set/Clear Pending Bit 888" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND887  ,Set/Clear Pending Bit 887" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND886  ,Set/Clear Pending Bit 886" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND885  ,Set/Clear Pending Bit 885" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND884  ,Set/Clear Pending Bit 884" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND883  ,Set/Clear Pending Bit 883" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND882  ,Set/Clear Pending Bit 882" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND881  ,Set/Clear Pending Bit 881" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND880  ,Set/Clear Pending Bit 880" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND879  ,Set/Clear Pending Bit 879" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND878  ,Set/Clear Pending Bit 878" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND877  ,Set/Clear Pending Bit 877" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND876  ,Set/Clear Pending Bit 876" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND875  ,Set/Clear Pending Bit 875" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND874  ,Set/Clear Pending Bit 874" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND873  ,Set/Clear Pending Bit 873" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND872  ,Set/Clear Pending Bit 872" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND871  ,Set/Clear Pending Bit 871" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND870  ,Set/Clear Pending Bit 870" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND869  ,Set/Clear Pending Bit 869" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND868  ,Set/Clear Pending Bit 868" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND867  ,Set/Clear Pending Bit 867" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND866  ,Set/Clear Pending Bit 866" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND865  ,Set/Clear Pending Bit 865" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND864  ,Set/Clear Pending Bit 864" "Not pending,Pending"
else
hgroup.long 0x026C++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR27,Interrupt Set/Clear Pending Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0270++0x03
line.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND927  ,Set/Clear Pending Bit 927" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND926  ,Set/Clear Pending Bit 926" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND925  ,Set/Clear Pending Bit 925" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND924  ,Set/Clear Pending Bit 924" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND923  ,Set/Clear Pending Bit 923" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND922  ,Set/Clear Pending Bit 922" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND921  ,Set/Clear Pending Bit 921" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND920  ,Set/Clear Pending Bit 920" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND919  ,Set/Clear Pending Bit 919" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND918  ,Set/Clear Pending Bit 918" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND917  ,Set/Clear Pending Bit 917" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND916  ,Set/Clear Pending Bit 916" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND915  ,Set/Clear Pending Bit 915" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND914  ,Set/Clear Pending Bit 914" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND913  ,Set/Clear Pending Bit 913" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND912  ,Set/Clear Pending Bit 912" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND911  ,Set/Clear Pending Bit 911" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND910  ,Set/Clear Pending Bit 910" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND909  ,Set/Clear Pending Bit 909" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND908  ,Set/Clear Pending Bit 908" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND907  ,Set/Clear Pending Bit 907" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND906  ,Set/Clear Pending Bit 906" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND905  ,Set/Clear Pending Bit 905" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND904  ,Set/Clear Pending Bit 904" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND903  ,Set/Clear Pending Bit 903" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND902  ,Set/Clear Pending Bit 902" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND901  ,Set/Clear Pending Bit 901" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND900  ,Set/Clear Pending Bit 900" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND899  ,Set/Clear Pending Bit 899" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND898  ,Set/Clear Pending Bit 898" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND897  ,Set/Clear Pending Bit 897" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND896  ,Set/Clear Pending Bit 896" "Not pending,Pending"
else
hgroup.long 0x0270++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR28,Interrupt Set/Clear Pending Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0274++0x03
line.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND959  ,Set/Clear Pending Bit 959" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND958  ,Set/Clear Pending Bit 958" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND957  ,Set/Clear Pending Bit 957" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND956  ,Set/Clear Pending Bit 956" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND955  ,Set/Clear Pending Bit 955" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND954  ,Set/Clear Pending Bit 954" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND953  ,Set/Clear Pending Bit 953" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND952  ,Set/Clear Pending Bit 952" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND951  ,Set/Clear Pending Bit 951" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND950  ,Set/Clear Pending Bit 950" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND949  ,Set/Clear Pending Bit 949" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND948  ,Set/Clear Pending Bit 948" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND947  ,Set/Clear Pending Bit 947" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND946  ,Set/Clear Pending Bit 946" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND945  ,Set/Clear Pending Bit 945" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND944  ,Set/Clear Pending Bit 944" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND943  ,Set/Clear Pending Bit 943" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND942  ,Set/Clear Pending Bit 942" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND941  ,Set/Clear Pending Bit 941" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND940  ,Set/Clear Pending Bit 940" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND939  ,Set/Clear Pending Bit 939" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND938  ,Set/Clear Pending Bit 938" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND937  ,Set/Clear Pending Bit 937" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND936  ,Set/Clear Pending Bit 936" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND935  ,Set/Clear Pending Bit 935" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND934  ,Set/Clear Pending Bit 934" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND933  ,Set/Clear Pending Bit 933" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND932  ,Set/Clear Pending Bit 932" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND931  ,Set/Clear Pending Bit 931" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND930  ,Set/Clear Pending Bit 930" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND929  ,Set/Clear Pending Bit 929" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND928  ,Set/Clear Pending Bit 928" "Not pending,Pending"
else
hgroup.long 0x0274++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR29,Interrupt Set/Clear Pending Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0278++0x03
line.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRPEND991  ,Set/Clear Pending Bit 991" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRPEND990  ,Set/Clear Pending Bit 990" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRPEND989  ,Set/Clear Pending Bit 989" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRPEND988  ,Set/Clear Pending Bit 988" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRPEND987  ,Set/Clear Pending Bit 987" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRPEND986  ,Set/Clear Pending Bit 986" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRPEND985  ,Set/Clear Pending Bit 985" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRPEND984  ,Set/Clear Pending Bit 984" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRPEND983  ,Set/Clear Pending Bit 983" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRPEND982  ,Set/Clear Pending Bit 982" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRPEND981  ,Set/Clear Pending Bit 981" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRPEND980  ,Set/Clear Pending Bit 980" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRPEND979  ,Set/Clear Pending Bit 979" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRPEND978  ,Set/Clear Pending Bit 978" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRPEND977  ,Set/Clear Pending Bit 977" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRPEND976  ,Set/Clear Pending Bit 976" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRPEND975  ,Set/Clear Pending Bit 975" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRPEND974  ,Set/Clear Pending Bit 974" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRPEND973  ,Set/Clear Pending Bit 973" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRPEND972  ,Set/Clear Pending Bit 972" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRPEND971  ,Set/Clear Pending Bit 971" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRPEND970  ,Set/Clear Pending Bit 970" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRPEND969  ,Set/Clear Pending Bit 969" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRPEND968  ,Set/Clear Pending Bit 968" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRPEND967  ,Set/Clear Pending Bit 967" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRPEND966  ,Set/Clear Pending Bit 966" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRPEND965  ,Set/Clear Pending Bit 965" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRPEND964  ,Set/Clear Pending Bit 964" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRPEND963  ,Set/Clear Pending Bit 963" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRPEND962  ,Set/Clear Pending Bit 962" "Not pending,Pending"
textline "                               "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRPEND961  ,Set/Clear Pending Bit 961" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRPEND960  ,Set/Clear Pending Bit 960" "Not pending,Pending"
else
hgroup.long 0x0278++0x03
hide.long 0x0 "GICD_SET/CLR_PENDR30,Interrupt Set/Clear Pending Register 30"
endif
tree.end
width 24.
tree "Set/Clear Active Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0300++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
else
group.long 0x0300++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE31  ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30  ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29  ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE28  ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27  ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26  ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE25  ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24  ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23  ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE22  ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21  ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20  ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE19  ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18  ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17  ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE16  ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15  ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14  ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE13  ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12  ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11  ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE10  ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9   ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8   ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE7   ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6   ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5   ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE4   ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3   ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2   ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE1   ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0   ,Set/Clear Active Bit 0" "Not active,Active"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x0304++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE63  ,Set/Clear Active Bit 63" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE62  ,Set/Clear Active Bit 62" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE61  ,Set/Clear Active Bit 61" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE60  ,Set/Clear Active Bit 60" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE59  ,Set/Clear Active Bit 59" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE58  ,Set/Clear Active Bit 58" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE57  ,Set/Clear Active Bit 57" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE56  ,Set/Clear Active Bit 56" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE55  ,Set/Clear Active Bit 55" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE54  ,Set/Clear Active Bit 54" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE53  ,Set/Clear Active Bit 53" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE52  ,Set/Clear Active Bit 52" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE51  ,Set/Clear Active Bit 51" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE50  ,Set/Clear Active Bit 50" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE49  ,Set/Clear Active Bit 49" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE48  ,Set/Clear Active Bit 48" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE47  ,Set/Clear Active Bit 47" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE46  ,Set/Clear Active Bit 46" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE45  ,Set/Clear Active Bit 45" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE44  ,Set/Clear Active Bit 44" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE43  ,Set/Clear Active Bit 43" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE42  ,Set/Clear Active Bit 42" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE41  ,Set/Clear Active Bit 41" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE40  ,Set/Clear Active Bit 40" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE39  ,Set/Clear Active Bit 39" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE38  ,Set/Clear Active Bit 38" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE37  ,Set/Clear Active Bit 37" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE36  ,Set/Clear Active Bit 36" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE35  ,Set/Clear Active Bit 35" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE34  ,Set/Clear Active Bit 34" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE33  ,Set/Clear Active Bit 33" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE32  ,Set/Clear Active Bit 32" "Not active,Active"
else
hgroup.long 0x0304++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER1,Interrupt Set/Clear Active Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x0308++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE95  ,Set/Clear Active Bit 95" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE94  ,Set/Clear Active Bit 94" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE93  ,Set/Clear Active Bit 93" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE92  ,Set/Clear Active Bit 92" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE91  ,Set/Clear Active Bit 91" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE90  ,Set/Clear Active Bit 90" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE89  ,Set/Clear Active Bit 89" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE88  ,Set/Clear Active Bit 88" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE87  ,Set/Clear Active Bit 87" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE86  ,Set/Clear Active Bit 86" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE85  ,Set/Clear Active Bit 85" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE84  ,Set/Clear Active Bit 84" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE83  ,Set/Clear Active Bit 83" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE82  ,Set/Clear Active Bit 82" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE81  ,Set/Clear Active Bit 81" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE80  ,Set/Clear Active Bit 80" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE79  ,Set/Clear Active Bit 79" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE78  ,Set/Clear Active Bit 78" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE77  ,Set/Clear Active Bit 77" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE76  ,Set/Clear Active Bit 76" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE75  ,Set/Clear Active Bit 75" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE74  ,Set/Clear Active Bit 74" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE73  ,Set/Clear Active Bit 73" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE72  ,Set/Clear Active Bit 72" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE71  ,Set/Clear Active Bit 71" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE70  ,Set/Clear Active Bit 70" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE69  ,Set/Clear Active Bit 69" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE68  ,Set/Clear Active Bit 68" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE67  ,Set/Clear Active Bit 67" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE66  ,Set/Clear Active Bit 66" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE65  ,Set/Clear Active Bit 65" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE64  ,Set/Clear Active Bit 64" "Not active,Active"
else
hgroup.long 0x0308++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER2,Interrupt Set/Clear Active Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x030C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE127 ,Set/Clear Active Bit 127" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE126 ,Set/Clear Active Bit 126" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE125 ,Set/Clear Active Bit 125" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE124 ,Set/Clear Active Bit 124" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE123 ,Set/Clear Active Bit 123" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE122 ,Set/Clear Active Bit 122" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE121 ,Set/Clear Active Bit 121" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE120 ,Set/Clear Active Bit 120" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE119 ,Set/Clear Active Bit 119" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE118 ,Set/Clear Active Bit 118" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE117 ,Set/Clear Active Bit 117" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE116 ,Set/Clear Active Bit 116" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE115 ,Set/Clear Active Bit 115" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE114 ,Set/Clear Active Bit 114" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE113 ,Set/Clear Active Bit 113" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE112 ,Set/Clear Active Bit 112" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE111 ,Set/Clear Active Bit 111" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE110 ,Set/Clear Active Bit 110" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE109 ,Set/Clear Active Bit 109" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE108 ,Set/Clear Active Bit 108" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE107 ,Set/Clear Active Bit 107" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE106 ,Set/Clear Active Bit 106" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE105 ,Set/Clear Active Bit 105" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE104 ,Set/Clear Active Bit 104" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE103 ,Set/Clear Active Bit 103" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE102 ,Set/Clear Active Bit 102" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE101 ,Set/Clear Active Bit 101" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE100 ,Set/Clear Active Bit 100" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE99  ,Set/Clear Active Bit 99" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE98  ,Set/Clear Active Bit 98" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE97  ,Set/Clear Active Bit 97" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE96  ,Set/Clear Active Bit 96" "Not active,Active"
else
hgroup.long 0x030C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER3,Interrupt Set/Clear Active Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x0310++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE159 ,Set/Clear Active Bit 159" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE158 ,Set/Clear Active Bit 158" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE157 ,Set/Clear Active Bit 157" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE156 ,Set/Clear Active Bit 156" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE155 ,Set/Clear Active Bit 155" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE154 ,Set/Clear Active Bit 154" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE153 ,Set/Clear Active Bit 153" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE152 ,Set/Clear Active Bit 152" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE151 ,Set/Clear Active Bit 151" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE150 ,Set/Clear Active Bit 150" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE149 ,Set/Clear Active Bit 149" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE148 ,Set/Clear Active Bit 148" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE147 ,Set/Clear Active Bit 147" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE146 ,Set/Clear Active Bit 146" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE145 ,Set/Clear Active Bit 145" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE144 ,Set/Clear Active Bit 144" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE143 ,Set/Clear Active Bit 143" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE142 ,Set/Clear Active Bit 142" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE141 ,Set/Clear Active Bit 141" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE140 ,Set/Clear Active Bit 140" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE139 ,Set/Clear Active Bit 139" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE138 ,Set/Clear Active Bit 138" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE137 ,Set/Clear Active Bit 137" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE136 ,Set/Clear Active Bit 136" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE135 ,Set/Clear Active Bit 135" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE134 ,Set/Clear Active Bit 134" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE133 ,Set/Clear Active Bit 133" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE132 ,Set/Clear Active Bit 132" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE131 ,Set/Clear Active Bit 131" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE130 ,Set/Clear Active Bit 130" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE129 ,Set/Clear Active Bit 129" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE128 ,Set/Clear Active Bit 128" "Not active,Active"
else
hgroup.long 0x0310++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER4,Interrupt Set/Clear Active Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x0314++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE191 ,Set/Clear Active Bit 191" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE190 ,Set/Clear Active Bit 190" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE189 ,Set/Clear Active Bit 189" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE188 ,Set/Clear Active Bit 188" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE187 ,Set/Clear Active Bit 187" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE186 ,Set/Clear Active Bit 186" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE185 ,Set/Clear Active Bit 185" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE184 ,Set/Clear Active Bit 184" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE183 ,Set/Clear Active Bit 183" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE182 ,Set/Clear Active Bit 182" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE181 ,Set/Clear Active Bit 181" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE180 ,Set/Clear Active Bit 180" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE179 ,Set/Clear Active Bit 179" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE178 ,Set/Clear Active Bit 178" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE177 ,Set/Clear Active Bit 177" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE176 ,Set/Clear Active Bit 176" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE175 ,Set/Clear Active Bit 175" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE174 ,Set/Clear Active Bit 174" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE173 ,Set/Clear Active Bit 173" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE172 ,Set/Clear Active Bit 172" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE171 ,Set/Clear Active Bit 171" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE170 ,Set/Clear Active Bit 170" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE169 ,Set/Clear Active Bit 169" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE168 ,Set/Clear Active Bit 168" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE167 ,Set/Clear Active Bit 167" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE166 ,Set/Clear Active Bit 166" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE165 ,Set/Clear Active Bit 165" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE164 ,Set/Clear Active Bit 164" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE163 ,Set/Clear Active Bit 163" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE162 ,Set/Clear Active Bit 162" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE161 ,Set/Clear Active Bit 161" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE160 ,Set/Clear Active Bit 160" "Not active,Active"
else
hgroup.long 0x0314++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER5,Interrupt Set/Clear Active Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x0318++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE223 ,Set/Clear Active Bit 223" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE222 ,Set/Clear Active Bit 222" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE221 ,Set/Clear Active Bit 221" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE220 ,Set/Clear Active Bit 220" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE219 ,Set/Clear Active Bit 219" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE218 ,Set/Clear Active Bit 218" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE217 ,Set/Clear Active Bit 217" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE216 ,Set/Clear Active Bit 216" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE215 ,Set/Clear Active Bit 215" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE214 ,Set/Clear Active Bit 214" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE213 ,Set/Clear Active Bit 213" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE212 ,Set/Clear Active Bit 212" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE211 ,Set/Clear Active Bit 211" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE210 ,Set/Clear Active Bit 210" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE209 ,Set/Clear Active Bit 209" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE208 ,Set/Clear Active Bit 208" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE207 ,Set/Clear Active Bit 207" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE206 ,Set/Clear Active Bit 206" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE205 ,Set/Clear Active Bit 205" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE204 ,Set/Clear Active Bit 204" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE203 ,Set/Clear Active Bit 203" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE202 ,Set/Clear Active Bit 202" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE201 ,Set/Clear Active Bit 201" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE200 ,Set/Clear Active Bit 200" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE199 ,Set/Clear Active Bit 199" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE198 ,Set/Clear Active Bit 198" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE197 ,Set/Clear Active Bit 197" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE196 ,Set/Clear Active Bit 196" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE195 ,Set/Clear Active Bit 195" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE194 ,Set/Clear Active Bit 194" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE193 ,Set/Clear Active Bit 193" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE192 ,Set/Clear Active Bit 192" "Not active,Active"
else
hgroup.long 0x0318++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER6,Interrupt Set/Clear Active Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x031C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE255 ,Set/Clear Active Bit 255" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE254 ,Set/Clear Active Bit 254" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE253 ,Set/Clear Active Bit 253" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE252 ,Set/Clear Active Bit 252" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE251 ,Set/Clear Active Bit 251" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE250 ,Set/Clear Active Bit 250" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE249 ,Set/Clear Active Bit 249" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE248 ,Set/Clear Active Bit 248" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE247 ,Set/Clear Active Bit 247" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE246 ,Set/Clear Active Bit 246" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE245 ,Set/Clear Active Bit 245" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE244 ,Set/Clear Active Bit 244" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE243 ,Set/Clear Active Bit 243" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE242 ,Set/Clear Active Bit 242" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE241 ,Set/Clear Active Bit 241" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE240 ,Set/Clear Active Bit 240" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE239 ,Set/Clear Active Bit 239" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE238 ,Set/Clear Active Bit 238" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE237 ,Set/Clear Active Bit 237" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE236 ,Set/Clear Active Bit 236" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE235 ,Set/Clear Active Bit 235" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE234 ,Set/Clear Active Bit 234" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE233 ,Set/Clear Active Bit 233" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE232 ,Set/Clear Active Bit 232" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE231 ,Set/Clear Active Bit 231" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE230 ,Set/Clear Active Bit 230" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE229 ,Set/Clear Active Bit 229" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE228 ,Set/Clear Active Bit 228" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE227 ,Set/Clear Active Bit 227" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE226 ,Set/Clear Active Bit 226" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE225 ,Set/Clear Active Bit 225" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE224 ,Set/Clear Active Bit 224" "Not active,Active"
else
hgroup.long 0x031C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER7,Interrupt Set/Clear Active Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x0320++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE287 ,Set/Clear Active Bit 287" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE286 ,Set/Clear Active Bit 286" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE285 ,Set/Clear Active Bit 285" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE284 ,Set/Clear Active Bit 284" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE283 ,Set/Clear Active Bit 283" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE282 ,Set/Clear Active Bit 282" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE281 ,Set/Clear Active Bit 281" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE280 ,Set/Clear Active Bit 280" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE279 ,Set/Clear Active Bit 279" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE278 ,Set/Clear Active Bit 278" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE277 ,Set/Clear Active Bit 277" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE276 ,Set/Clear Active Bit 276" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE275 ,Set/Clear Active Bit 275" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE274 ,Set/Clear Active Bit 274" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE273 ,Set/Clear Active Bit 273" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE272 ,Set/Clear Active Bit 272" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE271 ,Set/Clear Active Bit 271" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE270 ,Set/Clear Active Bit 270" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE269 ,Set/Clear Active Bit 269" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE268 ,Set/Clear Active Bit 268" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE267 ,Set/Clear Active Bit 267" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE266 ,Set/Clear Active Bit 266" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE265 ,Set/Clear Active Bit 265" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE264 ,Set/Clear Active Bit 264" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE263 ,Set/Clear Active Bit 263" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE262 ,Set/Clear Active Bit 262" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE261 ,Set/Clear Active Bit 261" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE260 ,Set/Clear Active Bit 260" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE259 ,Set/Clear Active Bit 259" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE258 ,Set/Clear Active Bit 258" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE257 ,Set/Clear Active Bit 257" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE256 ,Set/Clear Active Bit 256" "Not active,Active"
else
hgroup.long 0x0320++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER8,Interrupt Set/Clear Active Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x0324++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE319 ,Set/Clear Active Bit 319" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE318 ,Set/Clear Active Bit 318" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE317 ,Set/Clear Active Bit 317" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE316 ,Set/Clear Active Bit 316" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE315 ,Set/Clear Active Bit 315" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE314 ,Set/Clear Active Bit 314" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE313 ,Set/Clear Active Bit 313" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE312 ,Set/Clear Active Bit 312" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE311 ,Set/Clear Active Bit 311" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE310 ,Set/Clear Active Bit 310" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE309 ,Set/Clear Active Bit 309" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE308 ,Set/Clear Active Bit 308" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE307 ,Set/Clear Active Bit 307" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE306 ,Set/Clear Active Bit 306" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE305 ,Set/Clear Active Bit 305" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE304 ,Set/Clear Active Bit 304" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE303 ,Set/Clear Active Bit 303" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE302 ,Set/Clear Active Bit 302" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE301 ,Set/Clear Active Bit 301" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE300 ,Set/Clear Active Bit 300" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE299 ,Set/Clear Active Bit 299" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE298 ,Set/Clear Active Bit 298" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE297 ,Set/Clear Active Bit 297" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE296 ,Set/Clear Active Bit 296" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE295 ,Set/Clear Active Bit 295" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE294 ,Set/Clear Active Bit 294" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE293 ,Set/Clear Active Bit 293" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE292 ,Set/Clear Active Bit 292" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE291 ,Set/Clear Active Bit 291" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE290 ,Set/Clear Active Bit 290" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE289 ,Set/Clear Active Bit 289" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE288 ,Set/Clear Active Bit 288" "Not active,Active"
else
hgroup.long 0x0324++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER9,Interrupt Set/Clear Active Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x0328++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE351 ,Set/Clear Active Bit 351" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE350 ,Set/Clear Active Bit 350" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE349 ,Set/Clear Active Bit 349" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE348 ,Set/Clear Active Bit 348" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE347 ,Set/Clear Active Bit 347" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE346 ,Set/Clear Active Bit 346" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE345 ,Set/Clear Active Bit 345" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE344 ,Set/Clear Active Bit 344" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE343 ,Set/Clear Active Bit 343" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE342 ,Set/Clear Active Bit 342" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE341 ,Set/Clear Active Bit 341" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE340 ,Set/Clear Active Bit 340" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE339 ,Set/Clear Active Bit 339" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE338 ,Set/Clear Active Bit 338" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE337 ,Set/Clear Active Bit 337" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE336 ,Set/Clear Active Bit 336" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE335 ,Set/Clear Active Bit 335" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE334 ,Set/Clear Active Bit 334" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE333 ,Set/Clear Active Bit 333" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE332 ,Set/Clear Active Bit 332" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE331 ,Set/Clear Active Bit 331" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE330 ,Set/Clear Active Bit 330" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE329 ,Set/Clear Active Bit 329" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE328 ,Set/Clear Active Bit 328" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE327 ,Set/Clear Active Bit 327" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE326 ,Set/Clear Active Bit 326" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE325 ,Set/Clear Active Bit 325" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE324 ,Set/Clear Active Bit 324" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE323 ,Set/Clear Active Bit 323" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE322 ,Set/Clear Active Bit 322" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE321 ,Set/Clear Active Bit 321" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE320 ,Set/Clear Active Bit 320" "Not active,Active"
else
hgroup.long 0x0328++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER10,Interrupt Set/Clear Active Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x032C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE383 ,Set/Clear Active Bit 383" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE382 ,Set/Clear Active Bit 382" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE381 ,Set/Clear Active Bit 381" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE380 ,Set/Clear Active Bit 380" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE379 ,Set/Clear Active Bit 379" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE378 ,Set/Clear Active Bit 378" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE377 ,Set/Clear Active Bit 377" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE376 ,Set/Clear Active Bit 376" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE375 ,Set/Clear Active Bit 375" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE374 ,Set/Clear Active Bit 374" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE373 ,Set/Clear Active Bit 373" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE372 ,Set/Clear Active Bit 372" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE371 ,Set/Clear Active Bit 371" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE370 ,Set/Clear Active Bit 370" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE369 ,Set/Clear Active Bit 369" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE368 ,Set/Clear Active Bit 368" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE367 ,Set/Clear Active Bit 367" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE366 ,Set/Clear Active Bit 366" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE365 ,Set/Clear Active Bit 365" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE364 ,Set/Clear Active Bit 364" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE363 ,Set/Clear Active Bit 363" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE362 ,Set/Clear Active Bit 362" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE361 ,Set/Clear Active Bit 361" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE360 ,Set/Clear Active Bit 360" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE359 ,Set/Clear Active Bit 359" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE358 ,Set/Clear Active Bit 358" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE357 ,Set/Clear Active Bit 357" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE356 ,Set/Clear Active Bit 356" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE355 ,Set/Clear Active Bit 355" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE354 ,Set/Clear Active Bit 354" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE353 ,Set/Clear Active Bit 353" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE352 ,Set/Clear Active Bit 352" "Not active,Active"
else
hgroup.long 0x032C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER11,Interrupt Set/Clear Active Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x0330++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE415 ,Set/Clear Active Bit 415" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE414 ,Set/Clear Active Bit 414" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE413 ,Set/Clear Active Bit 413" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE412 ,Set/Clear Active Bit 412" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE411 ,Set/Clear Active Bit 411" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE410 ,Set/Clear Active Bit 410" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE409 ,Set/Clear Active Bit 409" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE408 ,Set/Clear Active Bit 408" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE407 ,Set/Clear Active Bit 407" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE406 ,Set/Clear Active Bit 406" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE405 ,Set/Clear Active Bit 405" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE404 ,Set/Clear Active Bit 404" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE403 ,Set/Clear Active Bit 403" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE402 ,Set/Clear Active Bit 402" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE401 ,Set/Clear Active Bit 401" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE400 ,Set/Clear Active Bit 400" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE399 ,Set/Clear Active Bit 399" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE398 ,Set/Clear Active Bit 398" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE397 ,Set/Clear Active Bit 397" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE396 ,Set/Clear Active Bit 396" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE395 ,Set/Clear Active Bit 395" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE394 ,Set/Clear Active Bit 394" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE393 ,Set/Clear Active Bit 393" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE392 ,Set/Clear Active Bit 392" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE391 ,Set/Clear Active Bit 391" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE390 ,Set/Clear Active Bit 390" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE389 ,Set/Clear Active Bit 389" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE388 ,Set/Clear Active Bit 388" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE387 ,Set/Clear Active Bit 387" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE386 ,Set/Clear Active Bit 386" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE385 ,Set/Clear Active Bit 385" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE384 ,Set/Clear Active Bit 384" "Not active,Active"
else
hgroup.long 0x0330++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER12,Interrupt Set/Clear Active Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x0334++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE447 ,Set/Clear Active Bit 447" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE446 ,Set/Clear Active Bit 446" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE445 ,Set/Clear Active Bit 445" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE444 ,Set/Clear Active Bit 444" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE443 ,Set/Clear Active Bit 443" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE442 ,Set/Clear Active Bit 442" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE441 ,Set/Clear Active Bit 441" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE440 ,Set/Clear Active Bit 440" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE439 ,Set/Clear Active Bit 439" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE438 ,Set/Clear Active Bit 438" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE437 ,Set/Clear Active Bit 437" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE436 ,Set/Clear Active Bit 436" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE435 ,Set/Clear Active Bit 435" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE434 ,Set/Clear Active Bit 434" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE433 ,Set/Clear Active Bit 433" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE432 ,Set/Clear Active Bit 432" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE431 ,Set/Clear Active Bit 431" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE430 ,Set/Clear Active Bit 430" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE429 ,Set/Clear Active Bit 429" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE428 ,Set/Clear Active Bit 428" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE427 ,Set/Clear Active Bit 427" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE426 ,Set/Clear Active Bit 426" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE425 ,Set/Clear Active Bit 425" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE424 ,Set/Clear Active Bit 424" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE423 ,Set/Clear Active Bit 423" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE422 ,Set/Clear Active Bit 422" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE421 ,Set/Clear Active Bit 421" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE420 ,Set/Clear Active Bit 420" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE419 ,Set/Clear Active Bit 419" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE418 ,Set/Clear Active Bit 418" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE417 ,Set/Clear Active Bit 417" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE416 ,Set/Clear Active Bit 416" "Not active,Active"
else
hgroup.long 0x0334++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER13,Interrupt Set/Clear Active Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x0338++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE479 ,Set/Clear Active Bit 479" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE478 ,Set/Clear Active Bit 478" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE477 ,Set/Clear Active Bit 477" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE476 ,Set/Clear Active Bit 476" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE475 ,Set/Clear Active Bit 475" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE474 ,Set/Clear Active Bit 474" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE473 ,Set/Clear Active Bit 473" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE472 ,Set/Clear Active Bit 472" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE471 ,Set/Clear Active Bit 471" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE470 ,Set/Clear Active Bit 470" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE469 ,Set/Clear Active Bit 469" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE468 ,Set/Clear Active Bit 468" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE467 ,Set/Clear Active Bit 467" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE466 ,Set/Clear Active Bit 466" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE465 ,Set/Clear Active Bit 465" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE464 ,Set/Clear Active Bit 464" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE463 ,Set/Clear Active Bit 463" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE462 ,Set/Clear Active Bit 462" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE461 ,Set/Clear Active Bit 461" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE460 ,Set/Clear Active Bit 460" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE459 ,Set/Clear Active Bit 459" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE458 ,Set/Clear Active Bit 458" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE457 ,Set/Clear Active Bit 457" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE456 ,Set/Clear Active Bit 456" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE455 ,Set/Clear Active Bit 455" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE454 ,Set/Clear Active Bit 454" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE453 ,Set/Clear Active Bit 453" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE452 ,Set/Clear Active Bit 452" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE451 ,Set/Clear Active Bit 451" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE450 ,Set/Clear Active Bit 450" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE449 ,Set/Clear Active Bit 449" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE448 ,Set/Clear Active Bit 448" "Not active,Active"
else
hgroup.long 0x0338++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER14,Interrupt Set/Clear Active Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x033C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE511 ,Set/Clear Active Bit 511" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE510 ,Set/Clear Active Bit 510" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE509 ,Set/Clear Active Bit 509" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE508 ,Set/Clear Active Bit 508" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE507 ,Set/Clear Active Bit 507" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE506 ,Set/Clear Active Bit 506" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE505 ,Set/Clear Active Bit 505" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE504 ,Set/Clear Active Bit 504" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE503 ,Set/Clear Active Bit 503" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE502 ,Set/Clear Active Bit 502" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE501 ,Set/Clear Active Bit 501" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE500 ,Set/Clear Active Bit 500" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE499 ,Set/Clear Active Bit 499" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE498 ,Set/Clear Active Bit 498" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE497 ,Set/Clear Active Bit 497" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE496 ,Set/Clear Active Bit 496" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE495 ,Set/Clear Active Bit 495" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE494 ,Set/Clear Active Bit 494" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE493 ,Set/Clear Active Bit 493" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE492 ,Set/Clear Active Bit 492" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE491 ,Set/Clear Active Bit 491" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE490 ,Set/Clear Active Bit 490" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE489 ,Set/Clear Active Bit 489" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE488 ,Set/Clear Active Bit 488" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE487 ,Set/Clear Active Bit 487" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE486 ,Set/Clear Active Bit 486" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE485 ,Set/Clear Active Bit 485" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE484 ,Set/Clear Active Bit 484" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE483 ,Set/Clear Active Bit 483" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE482 ,Set/Clear Active Bit 482" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE481 ,Set/Clear Active Bit 481" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE480 ,Set/Clear Active Bit 480" "Not active,Active"
else
hgroup.long 0x033C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER15,Interrupt Set/Clear Active Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x0340++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE543 ,Set/Clear Active Bit 543" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE542 ,Set/Clear Active Bit 542" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE541 ,Set/Clear Active Bit 541" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE540 ,Set/Clear Active Bit 540" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE539 ,Set/Clear Active Bit 539" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE538 ,Set/Clear Active Bit 538" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE537 ,Set/Clear Active Bit 537" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE536 ,Set/Clear Active Bit 536" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE535 ,Set/Clear Active Bit 535" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE534 ,Set/Clear Active Bit 534" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE533 ,Set/Clear Active Bit 533" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE532 ,Set/Clear Active Bit 532" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE531 ,Set/Clear Active Bit 531" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE530 ,Set/Clear Active Bit 530" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE529 ,Set/Clear Active Bit 529" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE528 ,Set/Clear Active Bit 528" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE527 ,Set/Clear Active Bit 527" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE526 ,Set/Clear Active Bit 526" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE525 ,Set/Clear Active Bit 525" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE524 ,Set/Clear Active Bit 524" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE523 ,Set/Clear Active Bit 523" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE522 ,Set/Clear Active Bit 522" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE521 ,Set/Clear Active Bit 521" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE520 ,Set/Clear Active Bit 520" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE519 ,Set/Clear Active Bit 519" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE518 ,Set/Clear Active Bit 518" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE517 ,Set/Clear Active Bit 517" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE516 ,Set/Clear Active Bit 516" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE515 ,Set/Clear Active Bit 515" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE514 ,Set/Clear Active Bit 514" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE513 ,Set/Clear Active Bit 513" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE512 ,Set/Clear Active Bit 512" "Not active,Active"
else
hgroup.long 0x0340++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER16,Interrupt Set/Clear Active Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x0344++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE575 ,Set/Clear Active Bit 575" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE574 ,Set/Clear Active Bit 574" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE573 ,Set/Clear Active Bit 573" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE572 ,Set/Clear Active Bit 572" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE571 ,Set/Clear Active Bit 571" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE570 ,Set/Clear Active Bit 570" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE569 ,Set/Clear Active Bit 569" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE568 ,Set/Clear Active Bit 568" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE567 ,Set/Clear Active Bit 567" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE566 ,Set/Clear Active Bit 566" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE565 ,Set/Clear Active Bit 565" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE564 ,Set/Clear Active Bit 564" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE563 ,Set/Clear Active Bit 563" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE562 ,Set/Clear Active Bit 562" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE561 ,Set/Clear Active Bit 561" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE560 ,Set/Clear Active Bit 560" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE559 ,Set/Clear Active Bit 559" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE558 ,Set/Clear Active Bit 558" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE557 ,Set/Clear Active Bit 557" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE556 ,Set/Clear Active Bit 556" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE555 ,Set/Clear Active Bit 555" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE554 ,Set/Clear Active Bit 554" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE553 ,Set/Clear Active Bit 553" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE552 ,Set/Clear Active Bit 552" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE551 ,Set/Clear Active Bit 551" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE550 ,Set/Clear Active Bit 550" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE549 ,Set/Clear Active Bit 549" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE548 ,Set/Clear Active Bit 548" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE547 ,Set/Clear Active Bit 547" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE546 ,Set/Clear Active Bit 546" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE545 ,Set/Clear Active Bit 545" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE544 ,Set/Clear Active Bit 544" "Not active,Active"
else
hgroup.long 0x0344++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER17,Interrupt Set/Clear Active Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x0348++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE607 ,Set/Clear Active Bit 607" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE606 ,Set/Clear Active Bit 606" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE605 ,Set/Clear Active Bit 605" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE604 ,Set/Clear Active Bit 604" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE603 ,Set/Clear Active Bit 603" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE602 ,Set/Clear Active Bit 602" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE601 ,Set/Clear Active Bit 601" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE600 ,Set/Clear Active Bit 600" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE599 ,Set/Clear Active Bit 599" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE598 ,Set/Clear Active Bit 598" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE597 ,Set/Clear Active Bit 597" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE596 ,Set/Clear Active Bit 596" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE595 ,Set/Clear Active Bit 595" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE594 ,Set/Clear Active Bit 594" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE593 ,Set/Clear Active Bit 593" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE592 ,Set/Clear Active Bit 592" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE591 ,Set/Clear Active Bit 591" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE590 ,Set/Clear Active Bit 590" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE589 ,Set/Clear Active Bit 589" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE588 ,Set/Clear Active Bit 588" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE587 ,Set/Clear Active Bit 587" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE586 ,Set/Clear Active Bit 586" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE585 ,Set/Clear Active Bit 585" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE584 ,Set/Clear Active Bit 584" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE583 ,Set/Clear Active Bit 583" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE582 ,Set/Clear Active Bit 582" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE581 ,Set/Clear Active Bit 581" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE580 ,Set/Clear Active Bit 580" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE579 ,Set/Clear Active Bit 579" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE578 ,Set/Clear Active Bit 578" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE577 ,Set/Clear Active Bit 577" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE576 ,Set/Clear Active Bit 576" "Not active,Active"
else
hgroup.long 0x0348++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER18,Interrupt Set/Clear Active Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x034C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE639 ,Set/Clear Active Bit 639" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE638 ,Set/Clear Active Bit 638" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE637 ,Set/Clear Active Bit 637" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE636 ,Set/Clear Active Bit 636" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE635 ,Set/Clear Active Bit 635" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE634 ,Set/Clear Active Bit 634" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE633 ,Set/Clear Active Bit 633" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE632 ,Set/Clear Active Bit 632" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE631 ,Set/Clear Active Bit 631" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE630 ,Set/Clear Active Bit 630" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE629 ,Set/Clear Active Bit 629" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE628 ,Set/Clear Active Bit 628" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE627 ,Set/Clear Active Bit 627" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE626 ,Set/Clear Active Bit 626" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE625 ,Set/Clear Active Bit 625" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE624 ,Set/Clear Active Bit 624" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE623 ,Set/Clear Active Bit 623" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE622 ,Set/Clear Active Bit 622" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE621 ,Set/Clear Active Bit 621" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE620 ,Set/Clear Active Bit 620" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE619 ,Set/Clear Active Bit 619" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE618 ,Set/Clear Active Bit 618" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE617 ,Set/Clear Active Bit 617" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE616 ,Set/Clear Active Bit 616" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE615 ,Set/Clear Active Bit 615" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE614 ,Set/Clear Active Bit 614" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE613 ,Set/Clear Active Bit 613" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE612 ,Set/Clear Active Bit 612" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE611 ,Set/Clear Active Bit 611" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE610 ,Set/Clear Active Bit 610" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE609 ,Set/Clear Active Bit 609" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE608 ,Set/Clear Active Bit 608" "Not active,Active"
else
hgroup.long 0x034C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER19,Interrupt Set/Clear Active Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x0350++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE671 ,Set/Clear Active Bit 671" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE670 ,Set/Clear Active Bit 670" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE669 ,Set/Clear Active Bit 669" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE668 ,Set/Clear Active Bit 668" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE667 ,Set/Clear Active Bit 667" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE666 ,Set/Clear Active Bit 666" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE665 ,Set/Clear Active Bit 665" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE664 ,Set/Clear Active Bit 664" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE663 ,Set/Clear Active Bit 663" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE662 ,Set/Clear Active Bit 662" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE661 ,Set/Clear Active Bit 661" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE660 ,Set/Clear Active Bit 660" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE659 ,Set/Clear Active Bit 659" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE658 ,Set/Clear Active Bit 658" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE657 ,Set/Clear Active Bit 657" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE656 ,Set/Clear Active Bit 656" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE655 ,Set/Clear Active Bit 655" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE654 ,Set/Clear Active Bit 654" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE653 ,Set/Clear Active Bit 653" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE652 ,Set/Clear Active Bit 652" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE651 ,Set/Clear Active Bit 651" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE650 ,Set/Clear Active Bit 650" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE649 ,Set/Clear Active Bit 649" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE648 ,Set/Clear Active Bit 648" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE647 ,Set/Clear Active Bit 647" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE646 ,Set/Clear Active Bit 646" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE645 ,Set/Clear Active Bit 645" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE644 ,Set/Clear Active Bit 644" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE643 ,Set/Clear Active Bit 643" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE642 ,Set/Clear Active Bit 642" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE641 ,Set/Clear Active Bit 641" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE640 ,Set/Clear Active Bit 640" "Not active,Active"
else
hgroup.long 0x0350++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER20,Interrupt Set/Clear Active Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x0354++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE703 ,Set/Clear Active Bit 703" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE702 ,Set/Clear Active Bit 702" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE701 ,Set/Clear Active Bit 701" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE700 ,Set/Clear Active Bit 700" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE699 ,Set/Clear Active Bit 699" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE698 ,Set/Clear Active Bit 698" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE697 ,Set/Clear Active Bit 697" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE696 ,Set/Clear Active Bit 696" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE695 ,Set/Clear Active Bit 695" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE694 ,Set/Clear Active Bit 694" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE693 ,Set/Clear Active Bit 693" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE692 ,Set/Clear Active Bit 692" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE691 ,Set/Clear Active Bit 691" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE690 ,Set/Clear Active Bit 690" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE689 ,Set/Clear Active Bit 689" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE688 ,Set/Clear Active Bit 688" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE687 ,Set/Clear Active Bit 687" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE686 ,Set/Clear Active Bit 686" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE685 ,Set/Clear Active Bit 685" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE684 ,Set/Clear Active Bit 684" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE683 ,Set/Clear Active Bit 683" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE682 ,Set/Clear Active Bit 682" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE681 ,Set/Clear Active Bit 681" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE680 ,Set/Clear Active Bit 680" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE679 ,Set/Clear Active Bit 679" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE678 ,Set/Clear Active Bit 678" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE677 ,Set/Clear Active Bit 677" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE676 ,Set/Clear Active Bit 676" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE675 ,Set/Clear Active Bit 675" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE674 ,Set/Clear Active Bit 674" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE673 ,Set/Clear Active Bit 673" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE672 ,Set/Clear Active Bit 672" "Not active,Active"
else
hgroup.long 0x0354++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER21,Interrupt Set/Clear Active Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x0358++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE735 ,Set/Clear Active Bit 735" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE734 ,Set/Clear Active Bit 734" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE733 ,Set/Clear Active Bit 733" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE732 ,Set/Clear Active Bit 732" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE731 ,Set/Clear Active Bit 731" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE730 ,Set/Clear Active Bit 730" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE729 ,Set/Clear Active Bit 729" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE728 ,Set/Clear Active Bit 728" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE727 ,Set/Clear Active Bit 727" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE726 ,Set/Clear Active Bit 726" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE725 ,Set/Clear Active Bit 725" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE724 ,Set/Clear Active Bit 724" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE723 ,Set/Clear Active Bit 723" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE722 ,Set/Clear Active Bit 722" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE721 ,Set/Clear Active Bit 721" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE720 ,Set/Clear Active Bit 720" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE719 ,Set/Clear Active Bit 719" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE718 ,Set/Clear Active Bit 718" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE717 ,Set/Clear Active Bit 717" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE716 ,Set/Clear Active Bit 716" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE715 ,Set/Clear Active Bit 715" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE714 ,Set/Clear Active Bit 714" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE713 ,Set/Clear Active Bit 713" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE712 ,Set/Clear Active Bit 712" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE711 ,Set/Clear Active Bit 711" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE710 ,Set/Clear Active Bit 710" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE709 ,Set/Clear Active Bit 709" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE708 ,Set/Clear Active Bit 708" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE707 ,Set/Clear Active Bit 707" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE706 ,Set/Clear Active Bit 706" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE705 ,Set/Clear Active Bit 705" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE704 ,Set/Clear Active Bit 704" "Not active,Active"
else
hgroup.long 0x0358++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER22,Interrupt Set/Clear Active Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x035C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE767 ,Set/Clear Active Bit 767" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE766 ,Set/Clear Active Bit 766" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE765 ,Set/Clear Active Bit 765" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE764 ,Set/Clear Active Bit 764" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE763 ,Set/Clear Active Bit 763" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE762 ,Set/Clear Active Bit 762" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE761 ,Set/Clear Active Bit 761" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE760 ,Set/Clear Active Bit 760" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE759 ,Set/Clear Active Bit 759" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE758 ,Set/Clear Active Bit 758" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE757 ,Set/Clear Active Bit 757" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE756 ,Set/Clear Active Bit 756" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE755 ,Set/Clear Active Bit 755" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE754 ,Set/Clear Active Bit 754" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE753 ,Set/Clear Active Bit 753" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE752 ,Set/Clear Active Bit 752" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE751 ,Set/Clear Active Bit 751" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE750 ,Set/Clear Active Bit 750" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE749 ,Set/Clear Active Bit 749" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE748 ,Set/Clear Active Bit 748" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE747 ,Set/Clear Active Bit 747" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE746 ,Set/Clear Active Bit 746" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE745 ,Set/Clear Active Bit 745" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE744 ,Set/Clear Active Bit 744" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE743 ,Set/Clear Active Bit 743" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE742 ,Set/Clear Active Bit 742" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE741 ,Set/Clear Active Bit 741" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE740 ,Set/Clear Active Bit 740" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE739 ,Set/Clear Active Bit 739" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE738 ,Set/Clear Active Bit 738" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE737 ,Set/Clear Active Bit 737" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE736 ,Set/Clear Active Bit 736" "Not active,Active"
else
hgroup.long 0x035C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER23,Interrupt Set/Clear Active Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x0360++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE799 ,Set/Clear Active Bit 799" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE798 ,Set/Clear Active Bit 798" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE797 ,Set/Clear Active Bit 797" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE796 ,Set/Clear Active Bit 796" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE795 ,Set/Clear Active Bit 795" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE794 ,Set/Clear Active Bit 794" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE793 ,Set/Clear Active Bit 793" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE792 ,Set/Clear Active Bit 792" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE791 ,Set/Clear Active Bit 791" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE790 ,Set/Clear Active Bit 790" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE789 ,Set/Clear Active Bit 789" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE788 ,Set/Clear Active Bit 788" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE787 ,Set/Clear Active Bit 787" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE786 ,Set/Clear Active Bit 786" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE785 ,Set/Clear Active Bit 785" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE784 ,Set/Clear Active Bit 784" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE783 ,Set/Clear Active Bit 783" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE782 ,Set/Clear Active Bit 782" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE781 ,Set/Clear Active Bit 781" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE780 ,Set/Clear Active Bit 780" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE779 ,Set/Clear Active Bit 779" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE778 ,Set/Clear Active Bit 778" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE777 ,Set/Clear Active Bit 777" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE776 ,Set/Clear Active Bit 776" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE775 ,Set/Clear Active Bit 775" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE774 ,Set/Clear Active Bit 774" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE773 ,Set/Clear Active Bit 773" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE772 ,Set/Clear Active Bit 772" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE771 ,Set/Clear Active Bit 771" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE770 ,Set/Clear Active Bit 770" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE769 ,Set/Clear Active Bit 769" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE768 ,Set/Clear Active Bit 768" "Not active,Active"
else
hgroup.long 0x0360++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER24,Interrupt Set/Clear Active Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x0364++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE831 ,Set/Clear Active Bit 831" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE830 ,Set/Clear Active Bit 830" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE829 ,Set/Clear Active Bit 829" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE828 ,Set/Clear Active Bit 828" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE827 ,Set/Clear Active Bit 827" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE826 ,Set/Clear Active Bit 826" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE825 ,Set/Clear Active Bit 825" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE824 ,Set/Clear Active Bit 824" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE823 ,Set/Clear Active Bit 823" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE822 ,Set/Clear Active Bit 822" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE821 ,Set/Clear Active Bit 821" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE820 ,Set/Clear Active Bit 820" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE819 ,Set/Clear Active Bit 819" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE818 ,Set/Clear Active Bit 818" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE817 ,Set/Clear Active Bit 817" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE816 ,Set/Clear Active Bit 816" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE815 ,Set/Clear Active Bit 815" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE814 ,Set/Clear Active Bit 814" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE813 ,Set/Clear Active Bit 813" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE812 ,Set/Clear Active Bit 812" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE811 ,Set/Clear Active Bit 811" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE810 ,Set/Clear Active Bit 810" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE809 ,Set/Clear Active Bit 809" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE808 ,Set/Clear Active Bit 808" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE807 ,Set/Clear Active Bit 807" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE806 ,Set/Clear Active Bit 806" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE805 ,Set/Clear Active Bit 805" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE804 ,Set/Clear Active Bit 804" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE803 ,Set/Clear Active Bit 803" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE802 ,Set/Clear Active Bit 802" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE801 ,Set/Clear Active Bit 801" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE800 ,Set/Clear Active Bit 800" "Not active,Active"
else
hgroup.long 0x0364++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER25,Interrupt Set/Clear Active Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x0368++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE863 ,Set/Clear Active Bit 863" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE862 ,Set/Clear Active Bit 862" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE861 ,Set/Clear Active Bit 861" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE860 ,Set/Clear Active Bit 860" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE859 ,Set/Clear Active Bit 859" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE858 ,Set/Clear Active Bit 858" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE857 ,Set/Clear Active Bit 857" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE856 ,Set/Clear Active Bit 856" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE855 ,Set/Clear Active Bit 855" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE854 ,Set/Clear Active Bit 854" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE853 ,Set/Clear Active Bit 853" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE852 ,Set/Clear Active Bit 852" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE851 ,Set/Clear Active Bit 851" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE850 ,Set/Clear Active Bit 850" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE849 ,Set/Clear Active Bit 849" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE848 ,Set/Clear Active Bit 848" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE847 ,Set/Clear Active Bit 847" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE846 ,Set/Clear Active Bit 846" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE845 ,Set/Clear Active Bit 845" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE844 ,Set/Clear Active Bit 844" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE843 ,Set/Clear Active Bit 843" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE842 ,Set/Clear Active Bit 842" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE841 ,Set/Clear Active Bit 841" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE840 ,Set/Clear Active Bit 840" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE839 ,Set/Clear Active Bit 839" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE838 ,Set/Clear Active Bit 838" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE837 ,Set/Clear Active Bit 837" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE836 ,Set/Clear Active Bit 836" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE835 ,Set/Clear Active Bit 835" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE834 ,Set/Clear Active Bit 834" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE833 ,Set/Clear Active Bit 833" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE832 ,Set/Clear Active Bit 832" "Not active,Active"
else
hgroup.long 0x0368++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER26,Interrupt Set/Clear Active Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x036C++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE895 ,Set/Clear Active Bit 895" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE894 ,Set/Clear Active Bit 894" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE893 ,Set/Clear Active Bit 893" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE892 ,Set/Clear Active Bit 892" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE891 ,Set/Clear Active Bit 891" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE890 ,Set/Clear Active Bit 890" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE889 ,Set/Clear Active Bit 889" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE888 ,Set/Clear Active Bit 888" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE887 ,Set/Clear Active Bit 887" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE886 ,Set/Clear Active Bit 886" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE885 ,Set/Clear Active Bit 885" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE884 ,Set/Clear Active Bit 884" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE883 ,Set/Clear Active Bit 883" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE882 ,Set/Clear Active Bit 882" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE881 ,Set/Clear Active Bit 881" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE880 ,Set/Clear Active Bit 880" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE879 ,Set/Clear Active Bit 879" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE878 ,Set/Clear Active Bit 878" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE877 ,Set/Clear Active Bit 877" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE876 ,Set/Clear Active Bit 876" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE875 ,Set/Clear Active Bit 875" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE874 ,Set/Clear Active Bit 874" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE873 ,Set/Clear Active Bit 873" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE872 ,Set/Clear Active Bit 872" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE871 ,Set/Clear Active Bit 871" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE870 ,Set/Clear Active Bit 870" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE869 ,Set/Clear Active Bit 869" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE868 ,Set/Clear Active Bit 868" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE867 ,Set/Clear Active Bit 867" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE866 ,Set/Clear Active Bit 866" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE865 ,Set/Clear Active Bit 865" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE864 ,Set/Clear Active Bit 864" "Not active,Active"
else
hgroup.long 0x036C++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER27,Interrupt Set/Clear Active Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x0370++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE927 ,Set/Clear Active Bit 927" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE926 ,Set/Clear Active Bit 926" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE925 ,Set/Clear Active Bit 925" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE924 ,Set/Clear Active Bit 924" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE923 ,Set/Clear Active Bit 923" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE922 ,Set/Clear Active Bit 922" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE921 ,Set/Clear Active Bit 921" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE920 ,Set/Clear Active Bit 920" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE919 ,Set/Clear Active Bit 919" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE918 ,Set/Clear Active Bit 918" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE917 ,Set/Clear Active Bit 917" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE916 ,Set/Clear Active Bit 916" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE915 ,Set/Clear Active Bit 915" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE914 ,Set/Clear Active Bit 914" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE913 ,Set/Clear Active Bit 913" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE912 ,Set/Clear Active Bit 912" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE911 ,Set/Clear Active Bit 911" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE910 ,Set/Clear Active Bit 910" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE909 ,Set/Clear Active Bit 909" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE908 ,Set/Clear Active Bit 908" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE907 ,Set/Clear Active Bit 907" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE906 ,Set/Clear Active Bit 906" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE905 ,Set/Clear Active Bit 905" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE904 ,Set/Clear Active Bit 904" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE903 ,Set/Clear Active Bit 903" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE902 ,Set/Clear Active Bit 902" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE901 ,Set/Clear Active Bit 901" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE900 ,Set/Clear Active Bit 900" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE899 ,Set/Clear Active Bit 899" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE898 ,Set/Clear Active Bit 898" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE897 ,Set/Clear Active Bit 897" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE896 ,Set/Clear Active Bit 896" "Not active,Active"
else
hgroup.long 0x0370++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER28,Interrupt Set/Clear Active Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x0374++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE959 ,Set/Clear Active Bit 959" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE958 ,Set/Clear Active Bit 958" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE957 ,Set/Clear Active Bit 957" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE956 ,Set/Clear Active Bit 956" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE955 ,Set/Clear Active Bit 955" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE954 ,Set/Clear Active Bit 954" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE953 ,Set/Clear Active Bit 953" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE952 ,Set/Clear Active Bit 952" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE951 ,Set/Clear Active Bit 951" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE950 ,Set/Clear Active Bit 950" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE949 ,Set/Clear Active Bit 949" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE948 ,Set/Clear Active Bit 948" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE947 ,Set/Clear Active Bit 947" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE946 ,Set/Clear Active Bit 946" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE945 ,Set/Clear Active Bit 945" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE944 ,Set/Clear Active Bit 944" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE943 ,Set/Clear Active Bit 943" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE942 ,Set/Clear Active Bit 942" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE941 ,Set/Clear Active Bit 941" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE940 ,Set/Clear Active Bit 940" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE939 ,Set/Clear Active Bit 939" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE938 ,Set/Clear Active Bit 938" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE937 ,Set/Clear Active Bit 937" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE936 ,Set/Clear Active Bit 936" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE935 ,Set/Clear Active Bit 935" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE934 ,Set/Clear Active Bit 934" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE933 ,Set/Clear Active Bit 933" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE932 ,Set/Clear Active Bit 932" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE931 ,Set/Clear Active Bit 931" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE930 ,Set/Clear Active Bit 930" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE929 ,Set/Clear Active Bit 929" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE928 ,Set/Clear Active Bit 928" "Not active,Active"
else
hgroup.long 0x0374++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER29,Interrupt Set/Clear Active Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x0378++0x03
line.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. " SET/CLRACTIVE991 ,Set/Clear Active Bit 991" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE990 ,Set/Clear Active Bit 990" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE989 ,Set/Clear Active Bit 989" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. " SET/CLRACTIVE988 ,Set/Clear Active Bit 988" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE987 ,Set/Clear Active Bit 987" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE986 ,Set/Clear Active Bit 986" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. " SET/CLRACTIVE985 ,Set/Clear Active Bit 985" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE984 ,Set/Clear Active Bit 984" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE983 ,Set/Clear Active Bit 983" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. " SET/CLRACTIVE982 ,Set/Clear Active Bit 982" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE981 ,Set/Clear Active Bit 981" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE980 ,Set/Clear Active Bit 980" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. " SET/CLRACTIVE979 ,Set/Clear Active Bit 979" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE978 ,Set/Clear Active Bit 978" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE977 ,Set/Clear Active Bit 977" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. " SET/CLRACTIVE976 ,Set/Clear Active Bit 976" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE975 ,Set/Clear Active Bit 975" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE974 ,Set/Clear Active Bit 974" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. " SET/CLRACTIVE973 ,Set/Clear Active Bit 973" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE972 ,Set/Clear Active Bit 972" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE971 ,Set/Clear Active Bit 971" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. " SET/CLRACTIVE970 ,Set/Clear Active Bit 970" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE969 ,Set/Clear Active Bit 969" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE968 ,Set/Clear Active Bit 968" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. " SET/CLRACTIVE967 ,Set/Clear Active Bit 967" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE966 ,Set/Clear Active Bit 966" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE965 ,Set/Clear Active Bit 965" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. " SET/CLRACTIVE964 ,Set/Clear Active Bit 964" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE963 ,Set/Clear Active Bit 963" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE962 ,Set/Clear Active Bit 962" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. " SET/CLRACTIVE961 ,Set/Clear Active Bit 961" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE960 ,Set/Clear Active Bit 960" "Not active,Active"
else
hgroup.long 0x0378++0x03
hide.long 0x0 "GICD_SET/CLR_ACTIVER30,Interrupt Set/Clear Active Register 30"
endif
tree.end
width 20.
tree "Priority Registers"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x400++0x03
hide.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hgroup.long 0x404++0x03
hide.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hgroup.long 0x408++0x03
hide.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hgroup.long 0x40C++0x03
hide.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hgroup.long 0x410++0x03
hide.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hgroup.long 0x414++0x03
hide.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hgroup.long 0x418++0x03
hide.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hgroup.long 0x41C++0x03
hide.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
else
group.long 0x400++0x03
line.long 0x00 "GICD_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID2    ,Interrupt ID2     Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID0    ,Interrupt ID0     Priority/Priority Byte Offset 0   "
group.long 0x404++0x03
line.long 0x00 "GICD_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "  INTID6    ,Interrupt ID6     Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "  INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID4    ,Interrupt ID4     Priority/Priority Byte Offset 4   "
group.long 0x408++0x03
line.long 0x00 "GICD_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID10   ,Interrupt ID10    Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "  INTID8    ,Interrupt ID8     Priority/Priority Byte Offset 8   "
group.long 0x40C++0x03
line.long 0x00 "GICD_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID14   ,Interrupt ID14    Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID12   ,Interrupt ID12    Priority/Priority Byte Offset 12  "
group.long 0x410++0x03
line.long 0x00 "GICD_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID18   ,Interrupt ID18    Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID16   ,Interrupt ID16    Priority/Priority Byte Offset 16  "
group.long 0x414++0x03
line.long 0x00 "GICD_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID22   ,Interrupt ID22    Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID20   ,Interrupt ID20    Priority/Priority Byte Offset 20  "
group.long 0x418++0x03
line.long 0x00 "GICD_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID26   ,Interrupt ID26    Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID24   ,Interrupt ID24    Priority/Priority Byte Offset 24  "
group.long 0x41C++0x03
line.long 0x00 "GICD_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID30   ,Interrupt ID30    Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID28   ,Interrupt ID28    Priority/Priority Byte Offset 28  "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x420++0x03
line.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hexmask.long.byte 0x00 24.--31. 1. " INTID35   ,Interrupt ID35   Priority/Priority Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID34   ,Interrupt ID34    Priority/Priority Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID33   ,Interrupt ID33   Priority/Priority Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID32   ,Interrupt ID32    Priority/Priority Byte Offset 32  "
group.long 0x424++0x03
line.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hexmask.long.byte 0x00 24.--31. 1. " INTID39   ,Interrupt ID39   Priority/Priority Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID38   ,Interrupt ID38    Priority/Priority Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID37   ,Interrupt ID37   Priority/Priority Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID36   ,Interrupt ID36    Priority/Priority Byte Offset 36  "
group.long 0x428++0x03
line.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hexmask.long.byte 0x00 24.--31. 1. " INTID43   ,Interrupt ID43   Priority/Priority Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID42   ,Interrupt ID42    Priority/Priority Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID41   ,Interrupt ID41   Priority/Priority Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID40   ,Interrupt ID40    Priority/Priority Byte Offset 40  "
group.long 0x42C++0x03
line.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hexmask.long.byte 0x00 24.--31. 1. " INTID47   ,Interrupt ID47   Priority/Priority Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID46   ,Interrupt ID46    Priority/Priority Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID45   ,Interrupt ID45   Priority/Priority Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID44   ,Interrupt ID44    Priority/Priority Byte Offset 44  "
group.long 0x430++0x03
line.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hexmask.long.byte 0x00 24.--31. 1. " INTID51   ,Interrupt ID51   Priority/Priority Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID50   ,Interrupt ID50    Priority/Priority Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID49   ,Interrupt ID49   Priority/Priority Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID48   ,Interrupt ID48    Priority/Priority Byte Offset 48  "
group.long 0x434++0x03
line.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hexmask.long.byte 0x00 24.--31. 1. " INTID55   ,Interrupt ID55   Priority/Priority Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID54   ,Interrupt ID54    Priority/Priority Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID53   ,Interrupt ID53   Priority/Priority Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID52   ,Interrupt ID52    Priority/Priority Byte Offset 52  "
group.long 0x438++0x03
line.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hexmask.long.byte 0x00 24.--31. 1. " INTID59   ,Interrupt ID59   Priority/Priority Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID58   ,Interrupt ID58    Priority/Priority Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID57   ,Interrupt ID57   Priority/Priority Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID56   ,Interrupt ID56    Priority/Priority Byte Offset 56  "
group.long 0x43C++0x03
line.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
hexmask.long.byte 0x00 24.--31. 1. " INTID63   ,Interrupt ID63   Priority/Priority Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID62   ,Interrupt ID62    Priority/Priority Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID61   ,Interrupt ID61   Priority/Priority Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID60   ,Interrupt ID60    Priority/Priority Byte Offset 60  "
else
hgroup.long 0x420++0x03
hide.long 0x00 "GICD_IPRIORITYR8,Interrupt Priority Register 8"
hgroup.long 0x424++0x03
hide.long 0x00 "GICD_IPRIORITYR9,Interrupt Priority Register 9"
hgroup.long 0x428++0x03
hide.long 0x00 "GICD_IPRIORITYR10,Interrupt Priority Register 10"
hgroup.long 0x42C++0x03
hide.long 0x00 "GICD_IPRIORITYR11,Interrupt Priority Register 11"
hgroup.long 0x430++0x03
hide.long 0x00 "GICD_IPRIORITYR12,Interrupt Priority Register 12"
hgroup.long 0x434++0x03
hide.long 0x00 "GICD_IPRIORITYR13,Interrupt Priority Register 13"
hgroup.long 0x438++0x03
hide.long 0x00 "GICD_IPRIORITYR14,Interrupt Priority Register 14"
hgroup.long 0x43C++0x03
hide.long 0x00 "GICD_IPRIORITYR15,Interrupt Priority Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x440++0x03
line.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hexmask.long.byte 0x00 24.--31. 1. " INTID67   ,Interrupt ID67   Priority/Priority Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID66   ,Interrupt ID66    Priority/Priority Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID65   ,Interrupt ID65   Priority/Priority Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID64   ,Interrupt ID64    Priority/Priority Byte Offset 64  "
group.long 0x444++0x03
line.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hexmask.long.byte 0x00 24.--31. 1. " INTID71   ,Interrupt ID71   Priority/Priority Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID70   ,Interrupt ID70    Priority/Priority Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID69   ,Interrupt ID69   Priority/Priority Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID68   ,Interrupt ID68    Priority/Priority Byte Offset 68  "
group.long 0x448++0x03
line.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hexmask.long.byte 0x00 24.--31. 1. " INTID75   ,Interrupt ID75   Priority/Priority Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID74   ,Interrupt ID74    Priority/Priority Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID73   ,Interrupt ID73   Priority/Priority Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID72   ,Interrupt ID72    Priority/Priority Byte Offset 72  "
group.long 0x44C++0x03
line.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hexmask.long.byte 0x00 24.--31. 1. " INTID79   ,Interrupt ID79   Priority/Priority Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID78   ,Interrupt ID78    Priority/Priority Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID77   ,Interrupt ID77   Priority/Priority Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID76   ,Interrupt ID76    Priority/Priority Byte Offset 76  "
group.long 0x450++0x03
line.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hexmask.long.byte 0x00 24.--31. 1. " INTID83   ,Interrupt ID83   Priority/Priority Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID82   ,Interrupt ID82    Priority/Priority Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID81   ,Interrupt ID81   Priority/Priority Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID80   ,Interrupt ID80    Priority/Priority Byte Offset 80  "
group.long 0x454++0x03
line.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hexmask.long.byte 0x00 24.--31. 1. " INTID87   ,Interrupt ID87   Priority/Priority Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID86   ,Interrupt ID86    Priority/Priority Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID85   ,Interrupt ID85   Priority/Priority Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID84   ,Interrupt ID84    Priority/Priority Byte Offset 84  "
group.long 0x458++0x03
line.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hexmask.long.byte 0x00 24.--31. 1. " INTID91   ,Interrupt ID91   Priority/Priority Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID90   ,Interrupt ID90    Priority/Priority Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID89   ,Interrupt ID89   Priority/Priority Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID88   ,Interrupt ID88    Priority/Priority Byte Offset 88  "
group.long 0x45C++0x03
line.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
hexmask.long.byte 0x00 24.--31. 1. " INTID95   ,Interrupt ID95   Priority/Priority Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID94   ,Interrupt ID94    Priority/Priority Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID93   ,Interrupt ID93   Priority/Priority Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID92   ,Interrupt ID92    Priority/Priority Byte Offset 92  "
else
hgroup.long 0x440++0x03
hide.long 0x00 "GICD_IPRIORITYR16,Interrupt Priority Register 16"
hgroup.long 0x444++0x03
hide.long 0x00 "GICD_IPRIORITYR17,Interrupt Priority Register 17"
hgroup.long 0x448++0x03
hide.long 0x00 "GICD_IPRIORITYR18,Interrupt Priority Register 18"
hgroup.long 0x44C++0x03
hide.long 0x00 "GICD_IPRIORITYR19,Interrupt Priority Register 19"
hgroup.long 0x450++0x03
hide.long 0x00 "GICD_IPRIORITYR20,Interrupt Priority Register 20"
hgroup.long 0x454++0x03
hide.long 0x00 "GICD_IPRIORITYR21,Interrupt Priority Register 21"
hgroup.long 0x458++0x03
hide.long 0x00 "GICD_IPRIORITYR22,Interrupt Priority Register 22"
hgroup.long 0x45C++0x03
hide.long 0x00 "GICD_IPRIORITYR23,Interrupt Priority Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x460++0x03
line.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hexmask.long.byte 0x00 24.--31. 1. " INTID99   ,Interrupt ID99   Priority/Priority Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  INTID98   ,Interrupt ID98    Priority/Priority Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  INTID97   ,Interrupt ID97   Priority/Priority Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  INTID96   ,Interrupt ID96    Priority/Priority Byte Offset 96  "
group.long 0x464++0x03
line.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hexmask.long.byte 0x00 24.--31. 1. " INTID103  ,Interrupt ID103  Priority/Priority Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID102  ,Interrupt ID102   Priority/Priority Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID101  ,Interrupt ID101  Priority/Priority Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID100  ,Interrupt ID100   Priority/Priority Byte Offset 100 "
group.long 0x468++0x03
line.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hexmask.long.byte 0x00 24.--31. 1. " INTID107  ,Interrupt ID107  Priority/Priority Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID106  ,Interrupt ID106   Priority/Priority Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID105  ,Interrupt ID105  Priority/Priority Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID104  ,Interrupt ID104   Priority/Priority Byte Offset 104 "
group.long 0x46C++0x03
line.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hexmask.long.byte 0x00 24.--31. 1. " INTID111  ,Interrupt ID111  Priority/Priority Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID110  ,Interrupt ID110   Priority/Priority Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID109  ,Interrupt ID109  Priority/Priority Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID108  ,Interrupt ID108   Priority/Priority Byte Offset 108 "
group.long 0x470++0x03
line.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hexmask.long.byte 0x00 24.--31. 1. " INTID115  ,Interrupt ID115  Priority/Priority Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID114  ,Interrupt ID114   Priority/Priority Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID113  ,Interrupt ID113  Priority/Priority Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID112  ,Interrupt ID112   Priority/Priority Byte Offset 112 "
group.long 0x474++0x03
line.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hexmask.long.byte 0x00 24.--31. 1. " INTID119  ,Interrupt ID119  Priority/Priority Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID118  ,Interrupt ID118   Priority/Priority Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID117  ,Interrupt ID117  Priority/Priority Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID116  ,Interrupt ID116   Priority/Priority Byte Offset 116 "
group.long 0x478++0x03
line.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hexmask.long.byte 0x00 24.--31. 1. " INTID123  ,Interrupt ID123  Priority/Priority Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID122  ,Interrupt ID122   Priority/Priority Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID121  ,Interrupt ID121  Priority/Priority Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID120  ,Interrupt ID120   Priority/Priority Byte Offset 120 "
group.long 0x47C++0x03
line.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
hexmask.long.byte 0x00 24.--31. 1. " INTID127  ,Interrupt ID127  Priority/Priority Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID126  ,Interrupt ID126   Priority/Priority Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID125  ,Interrupt ID125  Priority/Priority Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID124  ,Interrupt ID124   Priority/Priority Byte Offset 124 "
else
hgroup.long 0x460++0x03
hide.long 0x00 "GICD_IPRIORITYR24,Interrupt Priority Register 24"
hgroup.long 0x464++0x03
hide.long 0x00 "GICD_IPRIORITYR25,Interrupt Priority Register 25"
hgroup.long 0x468++0x03
hide.long 0x00 "GICD_IPRIORITYR26,Interrupt Priority Register 26"
hgroup.long 0x46C++0x03
hide.long 0x00 "GICD_IPRIORITYR27,Interrupt Priority Register 27"
hgroup.long 0x470++0x03
hide.long 0x00 "GICD_IPRIORITYR28,Interrupt Priority Register 28"
hgroup.long 0x474++0x03
hide.long 0x00 "GICD_IPRIORITYR29,Interrupt Priority Register 29"
hgroup.long 0x478++0x03
hide.long 0x00 "GICD_IPRIORITYR30,Interrupt Priority Register 30"
hgroup.long 0x47C++0x03
hide.long 0x00 "GICD_IPRIORITYR31,Interrupt Priority Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x480++0x03
line.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hexmask.long.byte 0x00 24.--31. 1. " INTID131  ,Interrupt ID131  Priority/Priority Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID130  ,Interrupt ID130   Priority/Priority Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID129  ,Interrupt ID129  Priority/Priority Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID128  ,Interrupt ID128   Priority/Priority Byte Offset 128 "
group.long 0x484++0x03
line.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hexmask.long.byte 0x00 24.--31. 1. " INTID135  ,Interrupt ID135  Priority/Priority Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID134  ,Interrupt ID134   Priority/Priority Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID133  ,Interrupt ID133  Priority/Priority Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID132  ,Interrupt ID132   Priority/Priority Byte Offset 132 "
group.long 0x488++0x03
line.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hexmask.long.byte 0x00 24.--31. 1. " INTID139  ,Interrupt ID139  Priority/Priority Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID138  ,Interrupt ID138   Priority/Priority Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID137  ,Interrupt ID137  Priority/Priority Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID136  ,Interrupt ID136   Priority/Priority Byte Offset 136 "
group.long 0x48C++0x03
line.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hexmask.long.byte 0x00 24.--31. 1. " INTID143  ,Interrupt ID143  Priority/Priority Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID142  ,Interrupt ID142   Priority/Priority Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID141  ,Interrupt ID141  Priority/Priority Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID140  ,Interrupt ID140   Priority/Priority Byte Offset 140 "
group.long 0x490++0x03
line.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hexmask.long.byte 0x00 24.--31. 1. " INTID147  ,Interrupt ID147  Priority/Priority Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID146  ,Interrupt ID146   Priority/Priority Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID145  ,Interrupt ID145  Priority/Priority Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID144  ,Interrupt ID144   Priority/Priority Byte Offset 144 "
group.long 0x494++0x03
line.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hexmask.long.byte 0x00 24.--31. 1. " INTID151  ,Interrupt ID151  Priority/Priority Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID150  ,Interrupt ID150   Priority/Priority Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID149  ,Interrupt ID149  Priority/Priority Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID148  ,Interrupt ID148   Priority/Priority Byte Offset 148 "
group.long 0x498++0x03
line.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hexmask.long.byte 0x00 24.--31. 1. " INTID155  ,Interrupt ID155  Priority/Priority Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID154  ,Interrupt ID154   Priority/Priority Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID153  ,Interrupt ID153  Priority/Priority Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID152  ,Interrupt ID152   Priority/Priority Byte Offset 152 "
group.long 0x49C++0x03
line.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
hexmask.long.byte 0x00 24.--31. 1. " INTID159  ,Interrupt ID159  Priority/Priority Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID158  ,Interrupt ID158   Priority/Priority Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID157  ,Interrupt ID157  Priority/Priority Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID156  ,Interrupt ID156   Priority/Priority Byte Offset 156 "
else
hgroup.long 0x480++0x03
hide.long 0x00 "GICD_IPRIORITYR32,Interrupt Priority Register 32"
hgroup.long 0x484++0x03
hide.long 0x00 "GICD_IPRIORITYR33,Interrupt Priority Register 33"
hgroup.long 0x488++0x03
hide.long 0x00 "GICD_IPRIORITYR34,Interrupt Priority Register 34"
hgroup.long 0x48C++0x03
hide.long 0x00 "GICD_IPRIORITYR35,Interrupt Priority Register 35"
hgroup.long 0x490++0x03
hide.long 0x00 "GICD_IPRIORITYR36,Interrupt Priority Register 36"
hgroup.long 0x494++0x03
hide.long 0x00 "GICD_IPRIORITYR37,Interrupt Priority Register 37"
hgroup.long 0x498++0x03
hide.long 0x00 "GICD_IPRIORITYR38,Interrupt Priority Register 38"
hgroup.long 0x49C++0x03
hide.long 0x00 "GICD_IPRIORITYR39,Interrupt Priority Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x4A0++0x03
line.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hexmask.long.byte 0x00 24.--31. 1. " INTID163  ,Interrupt ID163  Priority/Priority Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID162  ,Interrupt ID162   Priority/Priority Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID161  ,Interrupt ID161  Priority/Priority Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID160  ,Interrupt ID160   Priority/Priority Byte Offset 160 "
group.long 0x4A4++0x03
line.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hexmask.long.byte 0x00 24.--31. 1. " INTID167  ,Interrupt ID167  Priority/Priority Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID166  ,Interrupt ID166   Priority/Priority Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID165  ,Interrupt ID165  Priority/Priority Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID164  ,Interrupt ID164   Priority/Priority Byte Offset 164 "
group.long 0x4A8++0x03
line.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hexmask.long.byte 0x00 24.--31. 1. " INTID171  ,Interrupt ID171  Priority/Priority Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID170  ,Interrupt ID170   Priority/Priority Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID169  ,Interrupt ID169  Priority/Priority Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID168  ,Interrupt ID168   Priority/Priority Byte Offset 168 "
group.long 0x4AC++0x03
line.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hexmask.long.byte 0x00 24.--31. 1. " INTID175  ,Interrupt ID175  Priority/Priority Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID174  ,Interrupt ID174   Priority/Priority Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID173  ,Interrupt ID173  Priority/Priority Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID172  ,Interrupt ID172   Priority/Priority Byte Offset 172 "
group.long 0x4B0++0x03
line.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hexmask.long.byte 0x00 24.--31. 1. " INTID179  ,Interrupt ID179  Priority/Priority Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID178  ,Interrupt ID178   Priority/Priority Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID177  ,Interrupt ID177  Priority/Priority Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID176  ,Interrupt ID176   Priority/Priority Byte Offset 176 "
group.long 0x4B4++0x03
line.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hexmask.long.byte 0x00 24.--31. 1. " INTID183  ,Interrupt ID183  Priority/Priority Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID182  ,Interrupt ID182   Priority/Priority Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID181  ,Interrupt ID181  Priority/Priority Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID180  ,Interrupt ID180   Priority/Priority Byte Offset 180 "
group.long 0x4B8++0x03
line.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hexmask.long.byte 0x00 24.--31. 1. " INTID187  ,Interrupt ID187  Priority/Priority Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID186  ,Interrupt ID186   Priority/Priority Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID185  ,Interrupt ID185  Priority/Priority Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID184  ,Interrupt ID184   Priority/Priority Byte Offset 184 "
group.long 0x4BC++0x03
line.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
hexmask.long.byte 0x00 24.--31. 1. " INTID191  ,Interrupt ID191  Priority/Priority Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID190  ,Interrupt ID190   Priority/Priority Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID189  ,Interrupt ID189  Priority/Priority Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID188  ,Interrupt ID188   Priority/Priority Byte Offset 188 "
else
hgroup.long 0x4A0++0x03
hide.long 0x00 "GICD_IPRIORITYR40,Interrupt Priority Register 40"
hgroup.long 0x4A4++0x03
hide.long 0x00 "GICD_IPRIORITYR41,Interrupt Priority Register 41"
hgroup.long 0x4A8++0x03
hide.long 0x00 "GICD_IPRIORITYR42,Interrupt Priority Register 42"
hgroup.long 0x4AC++0x03
hide.long 0x00 "GICD_IPRIORITYR43,Interrupt Priority Register 43"
hgroup.long 0x4B0++0x03
hide.long 0x00 "GICD_IPRIORITYR44,Interrupt Priority Register 44"
hgroup.long 0x4B4++0x03
hide.long 0x00 "GICD_IPRIORITYR45,Interrupt Priority Register 45"
hgroup.long 0x4B8++0x03
hide.long 0x00 "GICD_IPRIORITYR46,Interrupt Priority Register 46"
hgroup.long 0x4BC++0x03
hide.long 0x00 "GICD_IPRIORITYR47,Interrupt Priority Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x4C0++0x03
line.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hexmask.long.byte 0x00 24.--31. 1. " INTID195  ,Interrupt ID195  Priority/Priority Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID194  ,Interrupt ID194   Priority/Priority Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID193  ,Interrupt ID193  Priority/Priority Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID192  ,Interrupt ID192   Priority/Priority Byte Offset 192 "
group.long 0x4C4++0x03
line.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hexmask.long.byte 0x00 24.--31. 1. " INTID199  ,Interrupt ID199  Priority/Priority Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID198  ,Interrupt ID198   Priority/Priority Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID197  ,Interrupt ID197  Priority/Priority Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID196  ,Interrupt ID196   Priority/Priority Byte Offset 196 "
group.long 0x4C8++0x03
line.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hexmask.long.byte 0x00 24.--31. 1. " INTID203  ,Interrupt ID203  Priority/Priority Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID202  ,Interrupt ID202   Priority/Priority Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID201  ,Interrupt ID201  Priority/Priority Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID200  ,Interrupt ID200   Priority/Priority Byte Offset 200 "
group.long 0x4CC++0x03
line.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hexmask.long.byte 0x00 24.--31. 1. " INTID207  ,Interrupt ID207  Priority/Priority Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID206  ,Interrupt ID206   Priority/Priority Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID205  ,Interrupt ID205  Priority/Priority Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID204  ,Interrupt ID204   Priority/Priority Byte Offset 204 "
group.long 0x4D0++0x03
line.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hexmask.long.byte 0x00 24.--31. 1. " INTID211  ,Interrupt ID211  Priority/Priority Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID210  ,Interrupt ID210   Priority/Priority Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID209  ,Interrupt ID209  Priority/Priority Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID208  ,Interrupt ID208   Priority/Priority Byte Offset 208 "
group.long 0x4D4++0x03
line.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hexmask.long.byte 0x00 24.--31. 1. " INTID215  ,Interrupt ID215  Priority/Priority Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID214  ,Interrupt ID214   Priority/Priority Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID213  ,Interrupt ID213  Priority/Priority Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID212  ,Interrupt ID212   Priority/Priority Byte Offset 212 "
group.long 0x4D8++0x03
line.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hexmask.long.byte 0x00 24.--31. 1. " INTID219  ,Interrupt ID219  Priority/Priority Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID218  ,Interrupt ID218   Priority/Priority Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID217  ,Interrupt ID217  Priority/Priority Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID216  ,Interrupt ID216   Priority/Priority Byte Offset 216 "
group.long 0x4DC++0x03
line.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
hexmask.long.byte 0x00 24.--31. 1. " INTID223  ,Interrupt ID223  Priority/Priority Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID222  ,Interrupt ID222   Priority/Priority Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID221  ,Interrupt ID221  Priority/Priority Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID220  ,Interrupt ID220   Priority/Priority Byte Offset 220 "
else
hgroup.long 0x4C0++0x03
hide.long 0x00 "GICD_IPRIORITYR48,Interrupt Priority Register 48"
hgroup.long 0x4C4++0x03
hide.long 0x00 "GICD_IPRIORITYR49,Interrupt Priority Register 49"
hgroup.long 0x4C8++0x03
hide.long 0x00 "GICD_IPRIORITYR50,Interrupt Priority Register 50"
hgroup.long 0x4CC++0x03
hide.long 0x00 "GICD_IPRIORITYR51,Interrupt Priority Register 51"
hgroup.long 0x4D0++0x03
hide.long 0x00 "GICD_IPRIORITYR52,Interrupt Priority Register 52"
hgroup.long 0x4D4++0x03
hide.long 0x00 "GICD_IPRIORITYR53,Interrupt Priority Register 53"
hgroup.long 0x4D8++0x03
hide.long 0x00 "GICD_IPRIORITYR54,Interrupt Priority Register 54"
hgroup.long 0x4DC++0x03
hide.long 0x00 "GICD_IPRIORITYR55,Interrupt Priority Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x4E0++0x03
line.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hexmask.long.byte 0x00 24.--31. 1. " INTID227  ,Interrupt ID227  Priority/Priority Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID226  ,Interrupt ID226   Priority/Priority Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID225  ,Interrupt ID225  Priority/Priority Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID224  ,Interrupt ID224   Priority/Priority Byte Offset 224 "
group.long 0x4E4++0x03
line.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hexmask.long.byte 0x00 24.--31. 1. " INTID231  ,Interrupt ID231  Priority/Priority Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID230  ,Interrupt ID230   Priority/Priority Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID229  ,Interrupt ID229  Priority/Priority Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID228  ,Interrupt ID228   Priority/Priority Byte Offset 228 "
group.long 0x4E8++0x03
line.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hexmask.long.byte 0x00 24.--31. 1. " INTID235  ,Interrupt ID235  Priority/Priority Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID234  ,Interrupt ID234   Priority/Priority Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID233  ,Interrupt ID233  Priority/Priority Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID232  ,Interrupt ID232   Priority/Priority Byte Offset 232 "
group.long 0x4EC++0x03
line.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hexmask.long.byte 0x00 24.--31. 1. " INTID239  ,Interrupt ID239  Priority/Priority Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID238  ,Interrupt ID238   Priority/Priority Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID237  ,Interrupt ID237  Priority/Priority Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID236  ,Interrupt ID236   Priority/Priority Byte Offset 236 "
group.long 0x4F0++0x03
line.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hexmask.long.byte 0x00 24.--31. 1. " INTID243  ,Interrupt ID243  Priority/Priority Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID242  ,Interrupt ID242   Priority/Priority Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID241  ,Interrupt ID241  Priority/Priority Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID240  ,Interrupt ID240   Priority/Priority Byte Offset 240 "
group.long 0x4F4++0x03
line.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hexmask.long.byte 0x00 24.--31. 1. " INTID247  ,Interrupt ID247  Priority/Priority Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID246  ,Interrupt ID246   Priority/Priority Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID245  ,Interrupt ID245  Priority/Priority Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID244  ,Interrupt ID244   Priority/Priority Byte Offset 244 "
group.long 0x4F8++0x03
line.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hexmask.long.byte 0x00 24.--31. 1. " INTID251  ,Interrupt ID251  Priority/Priority Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID250  ,Interrupt ID250   Priority/Priority Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID249  ,Interrupt ID249  Priority/Priority Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID248  ,Interrupt ID248   Priority/Priority Byte Offset 248 "
group.long 0x4FC++0x03
line.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
hexmask.long.byte 0x00 24.--31. 1. " INTID255  ,Interrupt ID255  Priority/Priority Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID254  ,Interrupt ID254   Priority/Priority Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID253  ,Interrupt ID253  Priority/Priority Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID252  ,Interrupt ID252   Priority/Priority Byte Offset 252 "
else
hgroup.long 0x4E0++0x03
hide.long 0x00 "GICD_IPRIORITYR56,Interrupt Priority Register 56"
hgroup.long 0x4E4++0x03
hide.long 0x00 "GICD_IPRIORITYR57,Interrupt Priority Register 57"
hgroup.long 0x4E8++0x03
hide.long 0x00 "GICD_IPRIORITYR58,Interrupt Priority Register 58"
hgroup.long 0x4EC++0x03
hide.long 0x00 "GICD_IPRIORITYR59,Interrupt Priority Register 59"
hgroup.long 0x4F0++0x03
hide.long 0x00 "GICD_IPRIORITYR60,Interrupt Priority Register 60"
hgroup.long 0x4F4++0x03
hide.long 0x00 "GICD_IPRIORITYR61,Interrupt Priority Register 61"
hgroup.long 0x4F8++0x03
hide.long 0x00 "GICD_IPRIORITYR62,Interrupt Priority Register 62"
hgroup.long 0x4FC++0x03
hide.long 0x00 "GICD_IPRIORITYR63,Interrupt Priority Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x500++0x03
line.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hexmask.long.byte 0x00 24.--31. 1. " INTID259  ,Interrupt ID259  Priority/Priority Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID258  ,Interrupt ID258   Priority/Priority Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID257  ,Interrupt ID257  Priority/Priority Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID256  ,Interrupt ID256   Priority/Priority Byte Offset 256 "
group.long 0x504++0x03
line.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hexmask.long.byte 0x00 24.--31. 1. " INTID263  ,Interrupt ID263  Priority/Priority Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID262  ,Interrupt ID262   Priority/Priority Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID261  ,Interrupt ID261  Priority/Priority Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID260  ,Interrupt ID260   Priority/Priority Byte Offset 260 "
group.long 0x508++0x03
line.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hexmask.long.byte 0x00 24.--31. 1. " INTID267  ,Interrupt ID267  Priority/Priority Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID266  ,Interrupt ID266   Priority/Priority Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID265  ,Interrupt ID265  Priority/Priority Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID264  ,Interrupt ID264   Priority/Priority Byte Offset 264 "
group.long 0x50C++0x03
line.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hexmask.long.byte 0x00 24.--31. 1. " INTID271  ,Interrupt ID271  Priority/Priority Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID270  ,Interrupt ID270   Priority/Priority Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID269  ,Interrupt ID269  Priority/Priority Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID268  ,Interrupt ID268   Priority/Priority Byte Offset 268 "
group.long 0x510++0x03
line.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hexmask.long.byte 0x00 24.--31. 1. " INTID275  ,Interrupt ID275  Priority/Priority Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID274  ,Interrupt ID274   Priority/Priority Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID273  ,Interrupt ID273  Priority/Priority Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID272  ,Interrupt ID272   Priority/Priority Byte Offset 272 "
group.long 0x514++0x03
line.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hexmask.long.byte 0x00 24.--31. 1. " INTID279  ,Interrupt ID279  Priority/Priority Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID278  ,Interrupt ID278   Priority/Priority Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID277  ,Interrupt ID277  Priority/Priority Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID276  ,Interrupt ID276   Priority/Priority Byte Offset 276 "
group.long 0x518++0x03
line.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hexmask.long.byte 0x00 24.--31. 1. " INTID283  ,Interrupt ID283  Priority/Priority Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID282  ,Interrupt ID282   Priority/Priority Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID281  ,Interrupt ID281  Priority/Priority Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID280  ,Interrupt ID280   Priority/Priority Byte Offset 280 "
group.long 0x51C++0x03
line.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
hexmask.long.byte 0x00 24.--31. 1. " INTID287  ,Interrupt ID287  Priority/Priority Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID286  ,Interrupt ID286   Priority/Priority Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID285  ,Interrupt ID285  Priority/Priority Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID284  ,Interrupt ID284   Priority/Priority Byte Offset 284 "
else
hgroup.long 0x500++0x03
hide.long 0x00 "GICD_IPRIORITYR64,Interrupt Priority Register 64"
hgroup.long 0x504++0x03
hide.long 0x00 "GICD_IPRIORITYR65,Interrupt Priority Register 65"
hgroup.long 0x508++0x03
hide.long 0x00 "GICD_IPRIORITYR66,Interrupt Priority Register 66"
hgroup.long 0x50C++0x03
hide.long 0x00 "GICD_IPRIORITYR67,Interrupt Priority Register 67"
hgroup.long 0x510++0x03
hide.long 0x00 "GICD_IPRIORITYR68,Interrupt Priority Register 68"
hgroup.long 0x514++0x03
hide.long 0x00 "GICD_IPRIORITYR69,Interrupt Priority Register 69"
hgroup.long 0x518++0x03
hide.long 0x00 "GICD_IPRIORITYR70,Interrupt Priority Register 70"
hgroup.long 0x51C++0x03
hide.long 0x00 "GICD_IPRIORITYR71,Interrupt Priority Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x520++0x03
line.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hexmask.long.byte 0x00 24.--31. 1. " INTID291  ,Interrupt ID291  Priority/Priority Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID290  ,Interrupt ID290   Priority/Priority Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID289  ,Interrupt ID289  Priority/Priority Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID288  ,Interrupt ID288   Priority/Priority Byte Offset 288 "
group.long 0x524++0x03
line.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hexmask.long.byte 0x00 24.--31. 1. " INTID295  ,Interrupt ID295  Priority/Priority Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID294  ,Interrupt ID294   Priority/Priority Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID293  ,Interrupt ID293  Priority/Priority Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID292  ,Interrupt ID292   Priority/Priority Byte Offset 292 "
group.long 0x528++0x03
line.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hexmask.long.byte 0x00 24.--31. 1. " INTID299  ,Interrupt ID299  Priority/Priority Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID298  ,Interrupt ID298   Priority/Priority Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID297  ,Interrupt ID297  Priority/Priority Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID296  ,Interrupt ID296   Priority/Priority Byte Offset 296 "
group.long 0x52C++0x03
line.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hexmask.long.byte 0x00 24.--31. 1. " INTID303  ,Interrupt ID303  Priority/Priority Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID302  ,Interrupt ID302   Priority/Priority Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID301  ,Interrupt ID301  Priority/Priority Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID300  ,Interrupt ID300   Priority/Priority Byte Offset 300 "
group.long 0x530++0x03
line.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hexmask.long.byte 0x00 24.--31. 1. " INTID307  ,Interrupt ID307  Priority/Priority Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID306  ,Interrupt ID306   Priority/Priority Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID305  ,Interrupt ID305  Priority/Priority Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID304  ,Interrupt ID304   Priority/Priority Byte Offset 304 "
group.long 0x534++0x03
line.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hexmask.long.byte 0x00 24.--31. 1. " INTID311  ,Interrupt ID311  Priority/Priority Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID310  ,Interrupt ID310   Priority/Priority Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID309  ,Interrupt ID309  Priority/Priority Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID308  ,Interrupt ID308   Priority/Priority Byte Offset 308 "
group.long 0x538++0x03
line.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hexmask.long.byte 0x00 24.--31. 1. " INTID315  ,Interrupt ID315  Priority/Priority Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID314  ,Interrupt ID314   Priority/Priority Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID313  ,Interrupt ID313  Priority/Priority Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID312  ,Interrupt ID312   Priority/Priority Byte Offset 312 "
group.long 0x53C++0x03
line.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
hexmask.long.byte 0x00 24.--31. 1. " INTID319  ,Interrupt ID319  Priority/Priority Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID318  ,Interrupt ID318   Priority/Priority Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID317  ,Interrupt ID317  Priority/Priority Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID316  ,Interrupt ID316   Priority/Priority Byte Offset 316 "
else
hgroup.long 0x520++0x03
hide.long 0x00 "GICD_IPRIORITYR72,Interrupt Priority Register 72"
hgroup.long 0x524++0x03
hide.long 0x00 "GICD_IPRIORITYR73,Interrupt Priority Register 73"
hgroup.long 0x528++0x03
hide.long 0x00 "GICD_IPRIORITYR74,Interrupt Priority Register 74"
hgroup.long 0x52C++0x03
hide.long 0x00 "GICD_IPRIORITYR75,Interrupt Priority Register 75"
hgroup.long 0x530++0x03
hide.long 0x00 "GICD_IPRIORITYR76,Interrupt Priority Register 76"
hgroup.long 0x534++0x03
hide.long 0x00 "GICD_IPRIORITYR77,Interrupt Priority Register 77"
hgroup.long 0x538++0x03
hide.long 0x00 "GICD_IPRIORITYR78,Interrupt Priority Register 78"
hgroup.long 0x53C++0x03
hide.long 0x00 "GICD_IPRIORITYR79,Interrupt Priority Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x540++0x03
line.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hexmask.long.byte 0x00 24.--31. 1. " INTID323  ,Interrupt ID323  Priority/Priority Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID322  ,Interrupt ID322   Priority/Priority Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID321  ,Interrupt ID321  Priority/Priority Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID320  ,Interrupt ID320   Priority/Priority Byte Offset 320 "
group.long 0x544++0x03
line.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hexmask.long.byte 0x00 24.--31. 1. " INTID327  ,Interrupt ID327  Priority/Priority Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID326  ,Interrupt ID326   Priority/Priority Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID325  ,Interrupt ID325  Priority/Priority Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID324  ,Interrupt ID324   Priority/Priority Byte Offset 324 "
group.long 0x548++0x03
line.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hexmask.long.byte 0x00 24.--31. 1. " INTID331  ,Interrupt ID331  Priority/Priority Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID330  ,Interrupt ID330   Priority/Priority Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID329  ,Interrupt ID329  Priority/Priority Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID328  ,Interrupt ID328   Priority/Priority Byte Offset 328 "
group.long 0x54C++0x03
line.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hexmask.long.byte 0x00 24.--31. 1. " INTID335  ,Interrupt ID335  Priority/Priority Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID334  ,Interrupt ID334   Priority/Priority Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID333  ,Interrupt ID333  Priority/Priority Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID332  ,Interrupt ID332   Priority/Priority Byte Offset 332 "
group.long 0x550++0x03
line.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hexmask.long.byte 0x00 24.--31. 1. " INTID339  ,Interrupt ID339  Priority/Priority Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID338  ,Interrupt ID338   Priority/Priority Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID337  ,Interrupt ID337  Priority/Priority Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID336  ,Interrupt ID336   Priority/Priority Byte Offset 336 "
group.long 0x554++0x03
line.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hexmask.long.byte 0x00 24.--31. 1. " INTID343  ,Interrupt ID343  Priority/Priority Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID342  ,Interrupt ID342   Priority/Priority Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID341  ,Interrupt ID341  Priority/Priority Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID340  ,Interrupt ID340   Priority/Priority Byte Offset 340 "
group.long 0x558++0x03
line.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hexmask.long.byte 0x00 24.--31. 1. " INTID347  ,Interrupt ID347  Priority/Priority Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID346  ,Interrupt ID346   Priority/Priority Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID345  ,Interrupt ID345  Priority/Priority Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID344  ,Interrupt ID344   Priority/Priority Byte Offset 344 "
group.long 0x55C++0x03
line.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
hexmask.long.byte 0x00 24.--31. 1. " INTID351  ,Interrupt ID351  Priority/Priority Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID350  ,Interrupt ID350   Priority/Priority Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID349  ,Interrupt ID349  Priority/Priority Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID348  ,Interrupt ID348   Priority/Priority Byte Offset 348 "
else
hgroup.long 0x540++0x03
hide.long 0x00 "GICD_IPRIORITYR80,Interrupt Priority Register 80"
hgroup.long 0x544++0x03
hide.long 0x00 "GICD_IPRIORITYR81,Interrupt Priority Register 81"
hgroup.long 0x548++0x03
hide.long 0x00 "GICD_IPRIORITYR82,Interrupt Priority Register 82"
hgroup.long 0x54C++0x03
hide.long 0x00 "GICD_IPRIORITYR83,Interrupt Priority Register 83"
hgroup.long 0x550++0x03
hide.long 0x00 "GICD_IPRIORITYR84,Interrupt Priority Register 84"
hgroup.long 0x554++0x03
hide.long 0x00 "GICD_IPRIORITYR85,Interrupt Priority Register 85"
hgroup.long 0x558++0x03
hide.long 0x00 "GICD_IPRIORITYR86,Interrupt Priority Register 86"
hgroup.long 0x55C++0x03
hide.long 0x00 "GICD_IPRIORITYR87,Interrupt Priority Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x560++0x03
line.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hexmask.long.byte 0x00 24.--31. 1. " INTID355  ,Interrupt ID355  Priority/Priority Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID354  ,Interrupt ID354   Priority/Priority Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID353  ,Interrupt ID353  Priority/Priority Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID352  ,Interrupt ID352   Priority/Priority Byte Offset 352 "
group.long 0x564++0x03
line.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hexmask.long.byte 0x00 24.--31. 1. " INTID359  ,Interrupt ID359  Priority/Priority Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID358  ,Interrupt ID358   Priority/Priority Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID357  ,Interrupt ID357  Priority/Priority Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID356  ,Interrupt ID356   Priority/Priority Byte Offset 356 "
group.long 0x568++0x03
line.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hexmask.long.byte 0x00 24.--31. 1. " INTID363  ,Interrupt ID363  Priority/Priority Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID362  ,Interrupt ID362   Priority/Priority Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID361  ,Interrupt ID361  Priority/Priority Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID360  ,Interrupt ID360   Priority/Priority Byte Offset 360 "
group.long 0x56C++0x03
line.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hexmask.long.byte 0x00 24.--31. 1. " INTID367  ,Interrupt ID367  Priority/Priority Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID366  ,Interrupt ID366   Priority/Priority Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID365  ,Interrupt ID365  Priority/Priority Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID364  ,Interrupt ID364   Priority/Priority Byte Offset 364 "
group.long 0x570++0x03
line.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hexmask.long.byte 0x00 24.--31. 1. " INTID371  ,Interrupt ID371  Priority/Priority Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID370  ,Interrupt ID370   Priority/Priority Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID369  ,Interrupt ID369  Priority/Priority Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID368  ,Interrupt ID368   Priority/Priority Byte Offset 368 "
group.long 0x574++0x03
line.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hexmask.long.byte 0x00 24.--31. 1. " INTID375  ,Interrupt ID375  Priority/Priority Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID374  ,Interrupt ID374   Priority/Priority Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID373  ,Interrupt ID373  Priority/Priority Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID372  ,Interrupt ID372   Priority/Priority Byte Offset 372 "
group.long 0x578++0x03
line.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hexmask.long.byte 0x00 24.--31. 1. " INTID379  ,Interrupt ID379  Priority/Priority Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID378  ,Interrupt ID378   Priority/Priority Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID377  ,Interrupt ID377  Priority/Priority Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID376  ,Interrupt ID376   Priority/Priority Byte Offset 376 "
group.long 0x57C++0x03
line.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
hexmask.long.byte 0x00 24.--31. 1. " INTID383  ,Interrupt ID383  Priority/Priority Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID382  ,Interrupt ID382   Priority/Priority Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID381  ,Interrupt ID381  Priority/Priority Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID380  ,Interrupt ID380   Priority/Priority Byte Offset 380 "
else
hgroup.long 0x560++0x03
hide.long 0x00 "GICD_IPRIORITYR88,Interrupt Priority Register 88"
hgroup.long 0x564++0x03
hide.long 0x00 "GICD_IPRIORITYR89,Interrupt Priority Register 89"
hgroup.long 0x568++0x03
hide.long 0x00 "GICD_IPRIORITYR90,Interrupt Priority Register 90"
hgroup.long 0x56C++0x03
hide.long 0x00 "GICD_IPRIORITYR91,Interrupt Priority Register 91"
hgroup.long 0x570++0x03
hide.long 0x00 "GICD_IPRIORITYR92,Interrupt Priority Register 92"
hgroup.long 0x574++0x03
hide.long 0x00 "GICD_IPRIORITYR93,Interrupt Priority Register 93"
hgroup.long 0x578++0x03
hide.long 0x00 "GICD_IPRIORITYR94,Interrupt Priority Register 94"
hgroup.long 0x57C++0x03
hide.long 0x00 "GICD_IPRIORITYR95,Interrupt Priority Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x580++0x03
line.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hexmask.long.byte 0x00 24.--31. 1. " INTID387  ,Interrupt ID387  Priority/Priority Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID386  ,Interrupt ID386   Priority/Priority Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID385  ,Interrupt ID385  Priority/Priority Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID384  ,Interrupt ID384   Priority/Priority Byte Offset 384 "
group.long 0x584++0x03
line.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hexmask.long.byte 0x00 24.--31. 1. " INTID391  ,Interrupt ID391  Priority/Priority Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID390  ,Interrupt ID390   Priority/Priority Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID389  ,Interrupt ID389  Priority/Priority Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID388  ,Interrupt ID388   Priority/Priority Byte Offset 388 "
group.long 0x588++0x03
line.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hexmask.long.byte 0x00 24.--31. 1. " INTID395  ,Interrupt ID395  Priority/Priority Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID394  ,Interrupt ID394   Priority/Priority Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID393  ,Interrupt ID393  Priority/Priority Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID392  ,Interrupt ID392   Priority/Priority Byte Offset 392 "
group.long 0x58C++0x03
line.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hexmask.long.byte 0x00 24.--31. 1. " INTID399  ,Interrupt ID399  Priority/Priority Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID398  ,Interrupt ID398   Priority/Priority Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID397  ,Interrupt ID397  Priority/Priority Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID396  ,Interrupt ID396   Priority/Priority Byte Offset 396 "
group.long 0x590++0x03
line.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hexmask.long.byte 0x00 24.--31. 1. " INTID403  ,Interrupt ID403  Priority/Priority Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID402  ,Interrupt ID402   Priority/Priority Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID401  ,Interrupt ID401  Priority/Priority Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID400  ,Interrupt ID400   Priority/Priority Byte Offset 400 "
group.long 0x594++0x03
line.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hexmask.long.byte 0x00 24.--31. 1. " INTID407  ,Interrupt ID407  Priority/Priority Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID406  ,Interrupt ID406   Priority/Priority Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID405  ,Interrupt ID405  Priority/Priority Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID404  ,Interrupt ID404   Priority/Priority Byte Offset 404 "
group.long 0x598++0x03
line.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hexmask.long.byte 0x00 24.--31. 1. " INTID411  ,Interrupt ID411  Priority/Priority Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID410  ,Interrupt ID410   Priority/Priority Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID409  ,Interrupt ID409  Priority/Priority Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID408  ,Interrupt ID408   Priority/Priority Byte Offset 408 "
group.long 0x59C++0x03
line.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
hexmask.long.byte 0x00 24.--31. 1. " INTID415  ,Interrupt ID415  Priority/Priority Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID414  ,Interrupt ID414   Priority/Priority Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID413  ,Interrupt ID413  Priority/Priority Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID412  ,Interrupt ID412   Priority/Priority Byte Offset 412 "
else
hgroup.long 0x580++0x03
hide.long 0x00 "GICD_IPRIORITYR96,Interrupt Priority Register 96"
hgroup.long 0x584++0x03
hide.long 0x00 "GICD_IPRIORITYR97,Interrupt Priority Register 97"
hgroup.long 0x588++0x03
hide.long 0x00 "GICD_IPRIORITYR98,Interrupt Priority Register 98"
hgroup.long 0x58C++0x03
hide.long 0x00 "GICD_IPRIORITYR99,Interrupt Priority Register 99"
hgroup.long 0x590++0x03
hide.long 0x00 "GICD_IPRIORITYR100,Interrupt Priority Register 100"
hgroup.long 0x594++0x03
hide.long 0x00 "GICD_IPRIORITYR101,Interrupt Priority Register 101"
hgroup.long 0x598++0x03
hide.long 0x00 "GICD_IPRIORITYR102,Interrupt Priority Register 102"
hgroup.long 0x59C++0x03
hide.long 0x00 "GICD_IPRIORITYR103,Interrupt Priority Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x5A0++0x03
line.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hexmask.long.byte 0x00 24.--31. 1. " INTID419  ,Interrupt ID419  Priority/Priority Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID418  ,Interrupt ID418   Priority/Priority Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID417  ,Interrupt ID417  Priority/Priority Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID416  ,Interrupt ID416   Priority/Priority Byte Offset 416 "
group.long 0x5A4++0x03
line.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hexmask.long.byte 0x00 24.--31. 1. " INTID423  ,Interrupt ID423  Priority/Priority Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID422  ,Interrupt ID422   Priority/Priority Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID421  ,Interrupt ID421  Priority/Priority Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID420  ,Interrupt ID420   Priority/Priority Byte Offset 420 "
group.long 0x5A8++0x03
line.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hexmask.long.byte 0x00 24.--31. 1. " INTID427  ,Interrupt ID427  Priority/Priority Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID426  ,Interrupt ID426   Priority/Priority Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID425  ,Interrupt ID425  Priority/Priority Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID424  ,Interrupt ID424   Priority/Priority Byte Offset 424 "
group.long 0x5AC++0x03
line.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hexmask.long.byte 0x00 24.--31. 1. " INTID431  ,Interrupt ID431  Priority/Priority Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID430  ,Interrupt ID430   Priority/Priority Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID429  ,Interrupt ID429  Priority/Priority Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID428  ,Interrupt ID428   Priority/Priority Byte Offset 428 "
group.long 0x5B0++0x03
line.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hexmask.long.byte 0x00 24.--31. 1. " INTID435  ,Interrupt ID435  Priority/Priority Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID434  ,Interrupt ID434   Priority/Priority Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID433  ,Interrupt ID433  Priority/Priority Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID432  ,Interrupt ID432   Priority/Priority Byte Offset 432 "
group.long 0x5B4++0x03
line.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hexmask.long.byte 0x00 24.--31. 1. " INTID439  ,Interrupt ID439  Priority/Priority Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID438  ,Interrupt ID438   Priority/Priority Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID437  ,Interrupt ID437  Priority/Priority Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID436  ,Interrupt ID436   Priority/Priority Byte Offset 436 "
group.long 0x5B8++0x03
line.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hexmask.long.byte 0x00 24.--31. 1. " INTID443  ,Interrupt ID443  Priority/Priority Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID442  ,Interrupt ID442   Priority/Priority Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID441  ,Interrupt ID441  Priority/Priority Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID440  ,Interrupt ID440   Priority/Priority Byte Offset 440 "
group.long 0x5BC++0x03
line.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
hexmask.long.byte 0x00 24.--31. 1. " INTID447  ,Interrupt ID447  Priority/Priority Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID446  ,Interrupt ID446   Priority/Priority Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID445  ,Interrupt ID445  Priority/Priority Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID444  ,Interrupt ID444   Priority/Priority Byte Offset 444 "
else
hgroup.long 0x5A0++0x03
hide.long 0x00 "GICD_IPRIORITYR104,Interrupt Priority Register 104"
hgroup.long 0x5A4++0x03
hide.long 0x00 "GICD_IPRIORITYR105,Interrupt Priority Register 105"
hgroup.long 0x5A8++0x03
hide.long 0x00 "GICD_IPRIORITYR106,Interrupt Priority Register 106"
hgroup.long 0x5AC++0x03
hide.long 0x00 "GICD_IPRIORITYR107,Interrupt Priority Register 107"
hgroup.long 0x5B0++0x03
hide.long 0x00 "GICD_IPRIORITYR108,Interrupt Priority Register 108"
hgroup.long 0x5B4++0x03
hide.long 0x00 "GICD_IPRIORITYR109,Interrupt Priority Register 109"
hgroup.long 0x5B8++0x03
hide.long 0x00 "GICD_IPRIORITYR110,Interrupt Priority Register 110"
hgroup.long 0x5BC++0x03
hide.long 0x00 "GICD_IPRIORITYR111,Interrupt Priority Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x5C0++0x03
line.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hexmask.long.byte 0x00 24.--31. 1. " INTID451  ,Interrupt ID451  Priority/Priority Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID450  ,Interrupt ID450   Priority/Priority Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID449  ,Interrupt ID449  Priority/Priority Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID448  ,Interrupt ID448   Priority/Priority Byte Offset 448 "
group.long 0x5C4++0x03
line.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hexmask.long.byte 0x00 24.--31. 1. " INTID455  ,Interrupt ID455  Priority/Priority Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID454  ,Interrupt ID454   Priority/Priority Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID453  ,Interrupt ID453  Priority/Priority Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID452  ,Interrupt ID452   Priority/Priority Byte Offset 452 "
group.long 0x5C8++0x03
line.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hexmask.long.byte 0x00 24.--31. 1. " INTID459  ,Interrupt ID459  Priority/Priority Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID458  ,Interrupt ID458   Priority/Priority Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID457  ,Interrupt ID457  Priority/Priority Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID456  ,Interrupt ID456   Priority/Priority Byte Offset 456 "
group.long 0x5CC++0x03
line.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hexmask.long.byte 0x00 24.--31. 1. " INTID463  ,Interrupt ID463  Priority/Priority Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID462  ,Interrupt ID462   Priority/Priority Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID461  ,Interrupt ID461  Priority/Priority Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID460  ,Interrupt ID460   Priority/Priority Byte Offset 460 "
group.long 0x5D0++0x03
line.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hexmask.long.byte 0x00 24.--31. 1. " INTID467  ,Interrupt ID467  Priority/Priority Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID466  ,Interrupt ID466   Priority/Priority Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID465  ,Interrupt ID465  Priority/Priority Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID464  ,Interrupt ID464   Priority/Priority Byte Offset 464 "
group.long 0x5D4++0x03
line.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hexmask.long.byte 0x00 24.--31. 1. " INTID471  ,Interrupt ID471  Priority/Priority Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID470  ,Interrupt ID470   Priority/Priority Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID469  ,Interrupt ID469  Priority/Priority Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID468  ,Interrupt ID468   Priority/Priority Byte Offset 468 "
group.long 0x5D8++0x03
line.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hexmask.long.byte 0x00 24.--31. 1. " INTID475  ,Interrupt ID475  Priority/Priority Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID474  ,Interrupt ID474   Priority/Priority Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID473  ,Interrupt ID473  Priority/Priority Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID472  ,Interrupt ID472   Priority/Priority Byte Offset 472 "
group.long 0x5DC++0x03
line.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
hexmask.long.byte 0x00 24.--31. 1. " INTID479  ,Interrupt ID479  Priority/Priority Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID478  ,Interrupt ID478   Priority/Priority Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID477  ,Interrupt ID477  Priority/Priority Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID476  ,Interrupt ID476   Priority/Priority Byte Offset 476 "
else
hgroup.long 0x5C0++0x03
hide.long 0x00 "GICD_IPRIORITYR112,Interrupt Priority Register 112"
hgroup.long 0x5C4++0x03
hide.long 0x00 "GICD_IPRIORITYR113,Interrupt Priority Register 113"
hgroup.long 0x5C8++0x03
hide.long 0x00 "GICD_IPRIORITYR114,Interrupt Priority Register 114"
hgroup.long 0x5CC++0x03
hide.long 0x00 "GICD_IPRIORITYR115,Interrupt Priority Register 115"
hgroup.long 0x5D0++0x03
hide.long 0x00 "GICD_IPRIORITYR116,Interrupt Priority Register 116"
hgroup.long 0x5D4++0x03
hide.long 0x00 "GICD_IPRIORITYR117,Interrupt Priority Register 117"
hgroup.long 0x5D8++0x03
hide.long 0x00 "GICD_IPRIORITYR118,Interrupt Priority Register 118"
hgroup.long 0x5DC++0x03
hide.long 0x00 "GICD_IPRIORITYR119,Interrupt Priority Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x5E0++0x03
line.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hexmask.long.byte 0x00 24.--31. 1. " INTID483  ,Interrupt ID483  Priority/Priority Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID482  ,Interrupt ID482   Priority/Priority Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID481  ,Interrupt ID481  Priority/Priority Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID480  ,Interrupt ID480   Priority/Priority Byte Offset 480 "
group.long 0x5E4++0x03
line.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hexmask.long.byte 0x00 24.--31. 1. " INTID487  ,Interrupt ID487  Priority/Priority Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID486  ,Interrupt ID486   Priority/Priority Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID485  ,Interrupt ID485  Priority/Priority Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID484  ,Interrupt ID484   Priority/Priority Byte Offset 484 "
group.long 0x5E8++0x03
line.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hexmask.long.byte 0x00 24.--31. 1. " INTID491  ,Interrupt ID491  Priority/Priority Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID490  ,Interrupt ID490   Priority/Priority Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID489  ,Interrupt ID489  Priority/Priority Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID488  ,Interrupt ID488   Priority/Priority Byte Offset 488 "
group.long 0x5EC++0x03
line.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hexmask.long.byte 0x00 24.--31. 1. " INTID495  ,Interrupt ID495  Priority/Priority Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID494  ,Interrupt ID494   Priority/Priority Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID493  ,Interrupt ID493  Priority/Priority Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID492  ,Interrupt ID492   Priority/Priority Byte Offset 492 "
group.long 0x5F0++0x03
line.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hexmask.long.byte 0x00 24.--31. 1. " INTID499  ,Interrupt ID499  Priority/Priority Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID498  ,Interrupt ID498   Priority/Priority Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID497  ,Interrupt ID497  Priority/Priority Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID496  ,Interrupt ID496   Priority/Priority Byte Offset 496 "
group.long 0x5F4++0x03
line.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hexmask.long.byte 0x00 24.--31. 1. " INTID503  ,Interrupt ID503  Priority/Priority Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID502  ,Interrupt ID502   Priority/Priority Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID501  ,Interrupt ID501  Priority/Priority Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID500  ,Interrupt ID500   Priority/Priority Byte Offset 500 "
group.long 0x5F8++0x03
line.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hexmask.long.byte 0x00 24.--31. 1. " INTID507  ,Interrupt ID507  Priority/Priority Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID506  ,Interrupt ID506   Priority/Priority Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID505  ,Interrupt ID505  Priority/Priority Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID504  ,Interrupt ID504   Priority/Priority Byte Offset 504 "
group.long 0x5FC++0x03
line.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
hexmask.long.byte 0x00 24.--31. 1. " INTID511  ,Interrupt ID511  Priority/Priority Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID510  ,Interrupt ID510   Priority/Priority Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID509  ,Interrupt ID509  Priority/Priority Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID508  ,Interrupt ID508   Priority/Priority Byte Offset 508 "
else
hgroup.long 0x5E0++0x03
hide.long 0x00 "GICD_IPRIORITYR120,Interrupt Priority Register 120"
hgroup.long 0x5E4++0x03
hide.long 0x00 "GICD_IPRIORITYR121,Interrupt Priority Register 121"
hgroup.long 0x5E8++0x03
hide.long 0x00 "GICD_IPRIORITYR122,Interrupt Priority Register 122"
hgroup.long 0x5EC++0x03
hide.long 0x00 "GICD_IPRIORITYR123,Interrupt Priority Register 123"
hgroup.long 0x5F0++0x03
hide.long 0x00 "GICD_IPRIORITYR124,Interrupt Priority Register 124"
hgroup.long 0x5F4++0x03
hide.long 0x00 "GICD_IPRIORITYR125,Interrupt Priority Register 125"
hgroup.long 0x5F8++0x03
hide.long 0x00 "GICD_IPRIORITYR126,Interrupt Priority Register 126"
hgroup.long 0x5FC++0x03
hide.long 0x00 "GICD_IPRIORITYR127,Interrupt Priority Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0x600++0x03
line.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hexmask.long.byte 0x00 24.--31. 1. " INTID515  ,Interrupt ID515  Priority/Priority Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID514  ,Interrupt ID514   Priority/Priority Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID513  ,Interrupt ID513  Priority/Priority Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID512  ,Interrupt ID512   Priority/Priority Byte Offset 512 "
group.long 0x604++0x03
line.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hexmask.long.byte 0x00 24.--31. 1. " INTID519  ,Interrupt ID519  Priority/Priority Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID518  ,Interrupt ID518   Priority/Priority Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID517  ,Interrupt ID517  Priority/Priority Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID516  ,Interrupt ID516   Priority/Priority Byte Offset 516 "
group.long 0x608++0x03
line.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hexmask.long.byte 0x00 24.--31. 1. " INTID523  ,Interrupt ID523  Priority/Priority Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID522  ,Interrupt ID522   Priority/Priority Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID521  ,Interrupt ID521  Priority/Priority Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID520  ,Interrupt ID520   Priority/Priority Byte Offset 520 "
group.long 0x60C++0x03
line.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hexmask.long.byte 0x00 24.--31. 1. " INTID527  ,Interrupt ID527  Priority/Priority Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID526  ,Interrupt ID526   Priority/Priority Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID525  ,Interrupt ID525  Priority/Priority Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID524  ,Interrupt ID524   Priority/Priority Byte Offset 524 "
group.long 0x610++0x03
line.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hexmask.long.byte 0x00 24.--31. 1. " INTID531  ,Interrupt ID531  Priority/Priority Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID530  ,Interrupt ID530   Priority/Priority Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID529  ,Interrupt ID529  Priority/Priority Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID528  ,Interrupt ID528   Priority/Priority Byte Offset 528 "
group.long 0x614++0x03
line.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hexmask.long.byte 0x00 24.--31. 1. " INTID535  ,Interrupt ID535  Priority/Priority Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID534  ,Interrupt ID534   Priority/Priority Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID533  ,Interrupt ID533  Priority/Priority Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID532  ,Interrupt ID532   Priority/Priority Byte Offset 532 "
group.long 0x618++0x03
line.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hexmask.long.byte 0x00 24.--31. 1. " INTID539  ,Interrupt ID539  Priority/Priority Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID538  ,Interrupt ID538   Priority/Priority Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID537  ,Interrupt ID537  Priority/Priority Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID536  ,Interrupt ID536   Priority/Priority Byte Offset 536 "
group.long 0x61C++0x03
line.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
hexmask.long.byte 0x00 24.--31. 1. " INTID543  ,Interrupt ID543  Priority/Priority Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID542  ,Interrupt ID542   Priority/Priority Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID541  ,Interrupt ID541  Priority/Priority Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID540  ,Interrupt ID540   Priority/Priority Byte Offset 540 "
else
hgroup.long 0x600++0x03
hide.long 0x00 "GICD_IPRIORITYR128,Interrupt Priority Register 128"
hgroup.long 0x604++0x03
hide.long 0x00 "GICD_IPRIORITYR129,Interrupt Priority Register 129"
hgroup.long 0x608++0x03
hide.long 0x00 "GICD_IPRIORITYR130,Interrupt Priority Register 130"
hgroup.long 0x60C++0x03
hide.long 0x00 "GICD_IPRIORITYR131,Interrupt Priority Register 131"
hgroup.long 0x610++0x03
hide.long 0x00 "GICD_IPRIORITYR132,Interrupt Priority Register 132"
hgroup.long 0x614++0x03
hide.long 0x00 "GICD_IPRIORITYR133,Interrupt Priority Register 133"
hgroup.long 0x618++0x03
hide.long 0x00 "GICD_IPRIORITYR134,Interrupt Priority Register 134"
hgroup.long 0x61C++0x03
hide.long 0x00 "GICD_IPRIORITYR135,Interrupt Priority Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0x620++0x03
line.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hexmask.long.byte 0x00 24.--31. 1. " INTID547  ,Interrupt ID547  Priority/Priority Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID546  ,Interrupt ID546   Priority/Priority Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID545  ,Interrupt ID545  Priority/Priority Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID544  ,Interrupt ID544   Priority/Priority Byte Offset 544 "
group.long 0x624++0x03
line.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hexmask.long.byte 0x00 24.--31. 1. " INTID551  ,Interrupt ID551  Priority/Priority Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID550  ,Interrupt ID550   Priority/Priority Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID549  ,Interrupt ID549  Priority/Priority Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID548  ,Interrupt ID548   Priority/Priority Byte Offset 548 "
group.long 0x628++0x03
line.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hexmask.long.byte 0x00 24.--31. 1. " INTID555  ,Interrupt ID555  Priority/Priority Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID554  ,Interrupt ID554   Priority/Priority Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID553  ,Interrupt ID553  Priority/Priority Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID552  ,Interrupt ID552   Priority/Priority Byte Offset 552 "
group.long 0x62C++0x03
line.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hexmask.long.byte 0x00 24.--31. 1. " INTID559  ,Interrupt ID559  Priority/Priority Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID558  ,Interrupt ID558   Priority/Priority Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID557  ,Interrupt ID557  Priority/Priority Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID556  ,Interrupt ID556   Priority/Priority Byte Offset 556 "
group.long 0x630++0x03
line.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hexmask.long.byte 0x00 24.--31. 1. " INTID563  ,Interrupt ID563  Priority/Priority Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID562  ,Interrupt ID562   Priority/Priority Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID561  ,Interrupt ID561  Priority/Priority Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID560  ,Interrupt ID560   Priority/Priority Byte Offset 560 "
group.long 0x634++0x03
line.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hexmask.long.byte 0x00 24.--31. 1. " INTID567  ,Interrupt ID567  Priority/Priority Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID566  ,Interrupt ID566   Priority/Priority Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID565  ,Interrupt ID565  Priority/Priority Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID564  ,Interrupt ID564   Priority/Priority Byte Offset 564 "
group.long 0x638++0x03
line.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hexmask.long.byte 0x00 24.--31. 1. " INTID571  ,Interrupt ID571  Priority/Priority Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID570  ,Interrupt ID570   Priority/Priority Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID569  ,Interrupt ID569  Priority/Priority Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID568  ,Interrupt ID568   Priority/Priority Byte Offset 568 "
group.long 0x63C++0x03
line.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
hexmask.long.byte 0x00 24.--31. 1. " INTID575  ,Interrupt ID575  Priority/Priority Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID574  ,Interrupt ID574   Priority/Priority Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID573  ,Interrupt ID573  Priority/Priority Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID572  ,Interrupt ID572   Priority/Priority Byte Offset 572 "
else
hgroup.long 0x620++0x03
hide.long 0x00 "GICD_IPRIORITYR136,Interrupt Priority Register 136"
hgroup.long 0x624++0x03
hide.long 0x00 "GICD_IPRIORITYR137,Interrupt Priority Register 137"
hgroup.long 0x628++0x03
hide.long 0x00 "GICD_IPRIORITYR138,Interrupt Priority Register 138"
hgroup.long 0x62C++0x03
hide.long 0x00 "GICD_IPRIORITYR139,Interrupt Priority Register 139"
hgroup.long 0x630++0x03
hide.long 0x00 "GICD_IPRIORITYR140,Interrupt Priority Register 140"
hgroup.long 0x634++0x03
hide.long 0x00 "GICD_IPRIORITYR141,Interrupt Priority Register 141"
hgroup.long 0x638++0x03
hide.long 0x00 "GICD_IPRIORITYR142,Interrupt Priority Register 142"
hgroup.long 0x63C++0x03
hide.long 0x00 "GICD_IPRIORITYR143,Interrupt Priority Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0x640++0x03
line.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hexmask.long.byte 0x00 24.--31. 1. " INTID579  ,Interrupt ID579  Priority/Priority Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID578  ,Interrupt ID578   Priority/Priority Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID577  ,Interrupt ID577  Priority/Priority Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID576  ,Interrupt ID576   Priority/Priority Byte Offset 576 "
group.long 0x644++0x03
line.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hexmask.long.byte 0x00 24.--31. 1. " INTID583  ,Interrupt ID583  Priority/Priority Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID582  ,Interrupt ID582   Priority/Priority Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID581  ,Interrupt ID581  Priority/Priority Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID580  ,Interrupt ID580   Priority/Priority Byte Offset 580 "
group.long 0x648++0x03
line.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hexmask.long.byte 0x00 24.--31. 1. " INTID587  ,Interrupt ID587  Priority/Priority Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID586  ,Interrupt ID586   Priority/Priority Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID585  ,Interrupt ID585  Priority/Priority Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID584  ,Interrupt ID584   Priority/Priority Byte Offset 584 "
group.long 0x64C++0x03
line.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hexmask.long.byte 0x00 24.--31. 1. " INTID591  ,Interrupt ID591  Priority/Priority Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID590  ,Interrupt ID590   Priority/Priority Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID589  ,Interrupt ID589  Priority/Priority Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID588  ,Interrupt ID588   Priority/Priority Byte Offset 588 "
group.long 0x650++0x03
line.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hexmask.long.byte 0x00 24.--31. 1. " INTID595  ,Interrupt ID595  Priority/Priority Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID594  ,Interrupt ID594   Priority/Priority Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID593  ,Interrupt ID593  Priority/Priority Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID592  ,Interrupt ID592   Priority/Priority Byte Offset 592 "
group.long 0x654++0x03
line.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hexmask.long.byte 0x00 24.--31. 1. " INTID599  ,Interrupt ID599  Priority/Priority Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID598  ,Interrupt ID598   Priority/Priority Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID597  ,Interrupt ID597  Priority/Priority Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID596  ,Interrupt ID596   Priority/Priority Byte Offset 596 "
group.long 0x658++0x03
line.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hexmask.long.byte 0x00 24.--31. 1. " INTID603  ,Interrupt ID603  Priority/Priority Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID602  ,Interrupt ID602   Priority/Priority Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID601  ,Interrupt ID601  Priority/Priority Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID600  ,Interrupt ID600   Priority/Priority Byte Offset 600 "
group.long 0x65C++0x03
line.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
hexmask.long.byte 0x00 24.--31. 1. " INTID607  ,Interrupt ID607  Priority/Priority Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID606  ,Interrupt ID606   Priority/Priority Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID605  ,Interrupt ID605  Priority/Priority Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID604  ,Interrupt ID604   Priority/Priority Byte Offset 604 "
else
hgroup.long 0x640++0x03
hide.long 0x00 "GICD_IPRIORITYR144,Interrupt Priority Register 144"
hgroup.long 0x644++0x03
hide.long 0x00 "GICD_IPRIORITYR145,Interrupt Priority Register 145"
hgroup.long 0x648++0x03
hide.long 0x00 "GICD_IPRIORITYR146,Interrupt Priority Register 146"
hgroup.long 0x64C++0x03
hide.long 0x00 "GICD_IPRIORITYR147,Interrupt Priority Register 147"
hgroup.long 0x650++0x03
hide.long 0x00 "GICD_IPRIORITYR148,Interrupt Priority Register 148"
hgroup.long 0x654++0x03
hide.long 0x00 "GICD_IPRIORITYR149,Interrupt Priority Register 149"
hgroup.long 0x658++0x03
hide.long 0x00 "GICD_IPRIORITYR150,Interrupt Priority Register 150"
hgroup.long 0x65C++0x03
hide.long 0x00 "GICD_IPRIORITYR151,Interrupt Priority Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0x660++0x03
line.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hexmask.long.byte 0x00 24.--31. 1. " INTID611  ,Interrupt ID611  Priority/Priority Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID610  ,Interrupt ID610   Priority/Priority Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID609  ,Interrupt ID609  Priority/Priority Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID608  ,Interrupt ID608   Priority/Priority Byte Offset 608 "
group.long 0x664++0x03
line.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hexmask.long.byte 0x00 24.--31. 1. " INTID615  ,Interrupt ID615  Priority/Priority Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID614  ,Interrupt ID614   Priority/Priority Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID613  ,Interrupt ID613  Priority/Priority Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID612  ,Interrupt ID612   Priority/Priority Byte Offset 612 "
group.long 0x668++0x03
line.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hexmask.long.byte 0x00 24.--31. 1. " INTID619  ,Interrupt ID619  Priority/Priority Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID618  ,Interrupt ID618   Priority/Priority Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID617  ,Interrupt ID617  Priority/Priority Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID616  ,Interrupt ID616   Priority/Priority Byte Offset 616 "
group.long 0x66C++0x03
line.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hexmask.long.byte 0x00 24.--31. 1. " INTID623  ,Interrupt ID623  Priority/Priority Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID622  ,Interrupt ID622   Priority/Priority Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID621  ,Interrupt ID621  Priority/Priority Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID620  ,Interrupt ID620   Priority/Priority Byte Offset 620 "
group.long 0x670++0x03
line.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hexmask.long.byte 0x00 24.--31. 1. " INTID627  ,Interrupt ID627  Priority/Priority Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID626  ,Interrupt ID626   Priority/Priority Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID625  ,Interrupt ID625  Priority/Priority Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID624  ,Interrupt ID624   Priority/Priority Byte Offset 624 "
group.long 0x674++0x03
line.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hexmask.long.byte 0x00 24.--31. 1. " INTID631  ,Interrupt ID631  Priority/Priority Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID630  ,Interrupt ID630   Priority/Priority Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID629  ,Interrupt ID629  Priority/Priority Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID628  ,Interrupt ID628   Priority/Priority Byte Offset 628 "
group.long 0x678++0x03
line.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hexmask.long.byte 0x00 24.--31. 1. " INTID635  ,Interrupt ID635  Priority/Priority Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID634  ,Interrupt ID634   Priority/Priority Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID633  ,Interrupt ID633  Priority/Priority Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID632  ,Interrupt ID632   Priority/Priority Byte Offset 632 "
group.long 0x67C++0x03
line.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
hexmask.long.byte 0x00 24.--31. 1. " INTID639  ,Interrupt ID639  Priority/Priority Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID638  ,Interrupt ID638   Priority/Priority Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID637  ,Interrupt ID637  Priority/Priority Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID636  ,Interrupt ID636   Priority/Priority Byte Offset 636 "
else
hgroup.long 0x660++0x03
hide.long 0x00 "GICD_IPRIORITYR152,Interrupt Priority Register 152"
hgroup.long 0x664++0x03
hide.long 0x00 "GICD_IPRIORITYR153,Interrupt Priority Register 153"
hgroup.long 0x668++0x03
hide.long 0x00 "GICD_IPRIORITYR154,Interrupt Priority Register 154"
hgroup.long 0x66C++0x03
hide.long 0x00 "GICD_IPRIORITYR155,Interrupt Priority Register 155"
hgroup.long 0x670++0x03
hide.long 0x00 "GICD_IPRIORITYR156,Interrupt Priority Register 156"
hgroup.long 0x674++0x03
hide.long 0x00 "GICD_IPRIORITYR157,Interrupt Priority Register 157"
hgroup.long 0x678++0x03
hide.long 0x00 "GICD_IPRIORITYR158,Interrupt Priority Register 158"
hgroup.long 0x67C++0x03
hide.long 0x00 "GICD_IPRIORITYR159,Interrupt Priority Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0x680++0x03
line.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hexmask.long.byte 0x00 24.--31. 1. " INTID643  ,Interrupt ID643  Priority/Priority Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID642  ,Interrupt ID642   Priority/Priority Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID641  ,Interrupt ID641  Priority/Priority Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID640  ,Interrupt ID640   Priority/Priority Byte Offset 640 "
group.long 0x684++0x03
line.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hexmask.long.byte 0x00 24.--31. 1. " INTID647  ,Interrupt ID647  Priority/Priority Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID646  ,Interrupt ID646   Priority/Priority Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID645  ,Interrupt ID645  Priority/Priority Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID644  ,Interrupt ID644   Priority/Priority Byte Offset 644 "
group.long 0x688++0x03
line.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hexmask.long.byte 0x00 24.--31. 1. " INTID651  ,Interrupt ID651  Priority/Priority Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID650  ,Interrupt ID650   Priority/Priority Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID649  ,Interrupt ID649  Priority/Priority Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID648  ,Interrupt ID648   Priority/Priority Byte Offset 648 "
group.long 0x68C++0x03
line.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hexmask.long.byte 0x00 24.--31. 1. " INTID655  ,Interrupt ID655  Priority/Priority Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID654  ,Interrupt ID654   Priority/Priority Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID653  ,Interrupt ID653  Priority/Priority Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID652  ,Interrupt ID652   Priority/Priority Byte Offset 652 "
group.long 0x690++0x03
line.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hexmask.long.byte 0x00 24.--31. 1. " INTID659  ,Interrupt ID659  Priority/Priority Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID658  ,Interrupt ID658   Priority/Priority Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID657  ,Interrupt ID657  Priority/Priority Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID656  ,Interrupt ID656   Priority/Priority Byte Offset 656 "
group.long 0x694++0x03
line.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hexmask.long.byte 0x00 24.--31. 1. " INTID663  ,Interrupt ID663  Priority/Priority Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID662  ,Interrupt ID662   Priority/Priority Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID661  ,Interrupt ID661  Priority/Priority Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID660  ,Interrupt ID660   Priority/Priority Byte Offset 660 "
group.long 0x698++0x03
line.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hexmask.long.byte 0x00 24.--31. 1. " INTID667  ,Interrupt ID667  Priority/Priority Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID666  ,Interrupt ID666   Priority/Priority Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID665  ,Interrupt ID665  Priority/Priority Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID664  ,Interrupt ID664   Priority/Priority Byte Offset 664 "
group.long 0x69C++0x03
line.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
hexmask.long.byte 0x00 24.--31. 1. " INTID671  ,Interrupt ID671  Priority/Priority Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID670  ,Interrupt ID670   Priority/Priority Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID669  ,Interrupt ID669  Priority/Priority Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID668  ,Interrupt ID668   Priority/Priority Byte Offset 668 "
else
hgroup.long 0x680++0x03
hide.long 0x00 "GICD_IPRIORITYR160,Interrupt Priority Register 160"
hgroup.long 0x684++0x03
hide.long 0x00 "GICD_IPRIORITYR161,Interrupt Priority Register 161"
hgroup.long 0x688++0x03
hide.long 0x00 "GICD_IPRIORITYR162,Interrupt Priority Register 162"
hgroup.long 0x68C++0x03
hide.long 0x00 "GICD_IPRIORITYR163,Interrupt Priority Register 163"
hgroup.long 0x690++0x03
hide.long 0x00 "GICD_IPRIORITYR164,Interrupt Priority Register 164"
hgroup.long 0x694++0x03
hide.long 0x00 "GICD_IPRIORITYR165,Interrupt Priority Register 165"
hgroup.long 0x698++0x03
hide.long 0x00 "GICD_IPRIORITYR166,Interrupt Priority Register 166"
hgroup.long 0x69C++0x03
hide.long 0x00 "GICD_IPRIORITYR167,Interrupt Priority Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0x6A0++0x03
line.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hexmask.long.byte 0x00 24.--31. 1. " INTID675  ,Interrupt ID675  Priority/Priority Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID674  ,Interrupt ID674   Priority/Priority Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID673  ,Interrupt ID673  Priority/Priority Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID672  ,Interrupt ID672   Priority/Priority Byte Offset 672 "
group.long 0x6A4++0x03
line.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hexmask.long.byte 0x00 24.--31. 1. " INTID679  ,Interrupt ID679  Priority/Priority Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID678  ,Interrupt ID678   Priority/Priority Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID677  ,Interrupt ID677  Priority/Priority Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID676  ,Interrupt ID676   Priority/Priority Byte Offset 676 "
group.long 0x6A8++0x03
line.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hexmask.long.byte 0x00 24.--31. 1. " INTID683  ,Interrupt ID683  Priority/Priority Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID682  ,Interrupt ID682   Priority/Priority Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID681  ,Interrupt ID681  Priority/Priority Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID680  ,Interrupt ID680   Priority/Priority Byte Offset 680 "
group.long 0x6AC++0x03
line.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hexmask.long.byte 0x00 24.--31. 1. " INTID687  ,Interrupt ID687  Priority/Priority Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID686  ,Interrupt ID686   Priority/Priority Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID685  ,Interrupt ID685  Priority/Priority Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID684  ,Interrupt ID684   Priority/Priority Byte Offset 684 "
group.long 0x6B0++0x03
line.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hexmask.long.byte 0x00 24.--31. 1. " INTID691  ,Interrupt ID691  Priority/Priority Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID690  ,Interrupt ID690   Priority/Priority Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID689  ,Interrupt ID689  Priority/Priority Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID688  ,Interrupt ID688   Priority/Priority Byte Offset 688 "
group.long 0x6B4++0x03
line.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hexmask.long.byte 0x00 24.--31. 1. " INTID695  ,Interrupt ID695  Priority/Priority Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID694  ,Interrupt ID694   Priority/Priority Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID693  ,Interrupt ID693  Priority/Priority Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID692  ,Interrupt ID692   Priority/Priority Byte Offset 692 "
group.long 0x6B8++0x03
line.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hexmask.long.byte 0x00 24.--31. 1. " INTID699  ,Interrupt ID699  Priority/Priority Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID698  ,Interrupt ID698   Priority/Priority Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID697  ,Interrupt ID697  Priority/Priority Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID696  ,Interrupt ID696   Priority/Priority Byte Offset 696 "
group.long 0x6BC++0x03
line.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
hexmask.long.byte 0x00 24.--31. 1. " INTID703  ,Interrupt ID703  Priority/Priority Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID702  ,Interrupt ID702   Priority/Priority Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID701  ,Interrupt ID701  Priority/Priority Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID700  ,Interrupt ID700   Priority/Priority Byte Offset 700 "
else
hgroup.long 0x6A0++0x03
hide.long 0x00 "GICD_IPRIORITYR168,Interrupt Priority Register 168"
hgroup.long 0x6A4++0x03
hide.long 0x00 "GICD_IPRIORITYR169,Interrupt Priority Register 169"
hgroup.long 0x6A8++0x03
hide.long 0x00 "GICD_IPRIORITYR170,Interrupt Priority Register 170"
hgroup.long 0x6AC++0x03
hide.long 0x00 "GICD_IPRIORITYR171,Interrupt Priority Register 171"
hgroup.long 0x6B0++0x03
hide.long 0x00 "GICD_IPRIORITYR172,Interrupt Priority Register 172"
hgroup.long 0x6B4++0x03
hide.long 0x00 "GICD_IPRIORITYR173,Interrupt Priority Register 173"
hgroup.long 0x6B8++0x03
hide.long 0x00 "GICD_IPRIORITYR174,Interrupt Priority Register 174"
hgroup.long 0x6BC++0x03
hide.long 0x00 "GICD_IPRIORITYR175,Interrupt Priority Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0x6C0++0x03
line.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hexmask.long.byte 0x00 24.--31. 1. " INTID707  ,Interrupt ID707  Priority/Priority Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID706  ,Interrupt ID706   Priority/Priority Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID705  ,Interrupt ID705  Priority/Priority Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID704  ,Interrupt ID704   Priority/Priority Byte Offset 704 "
group.long 0x6C4++0x03
line.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hexmask.long.byte 0x00 24.--31. 1. " INTID711  ,Interrupt ID711  Priority/Priority Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID710  ,Interrupt ID710   Priority/Priority Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID709  ,Interrupt ID709  Priority/Priority Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID708  ,Interrupt ID708   Priority/Priority Byte Offset 708 "
group.long 0x6C8++0x03
line.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hexmask.long.byte 0x00 24.--31. 1. " INTID715  ,Interrupt ID715  Priority/Priority Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID714  ,Interrupt ID714   Priority/Priority Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID713  ,Interrupt ID713  Priority/Priority Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID712  ,Interrupt ID712   Priority/Priority Byte Offset 712 "
group.long 0x6CC++0x03
line.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hexmask.long.byte 0x00 24.--31. 1. " INTID719  ,Interrupt ID719  Priority/Priority Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID718  ,Interrupt ID718   Priority/Priority Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID717  ,Interrupt ID717  Priority/Priority Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID716  ,Interrupt ID716   Priority/Priority Byte Offset 716 "
group.long 0x6D0++0x03
line.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hexmask.long.byte 0x00 24.--31. 1. " INTID723  ,Interrupt ID723  Priority/Priority Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID722  ,Interrupt ID722   Priority/Priority Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID721  ,Interrupt ID721  Priority/Priority Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID720  ,Interrupt ID720   Priority/Priority Byte Offset 720 "
group.long 0x6D4++0x03
line.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hexmask.long.byte 0x00 24.--31. 1. " INTID727  ,Interrupt ID727  Priority/Priority Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID726  ,Interrupt ID726   Priority/Priority Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID725  ,Interrupt ID725  Priority/Priority Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID724  ,Interrupt ID724   Priority/Priority Byte Offset 724 "
group.long 0x6D8++0x03
line.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hexmask.long.byte 0x00 24.--31. 1. " INTID731  ,Interrupt ID731  Priority/Priority Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID730  ,Interrupt ID730   Priority/Priority Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID729  ,Interrupt ID729  Priority/Priority Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID728  ,Interrupt ID728   Priority/Priority Byte Offset 728 "
group.long 0x6DC++0x03
line.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
hexmask.long.byte 0x00 24.--31. 1. " INTID735  ,Interrupt ID735  Priority/Priority Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID734  ,Interrupt ID734   Priority/Priority Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID733  ,Interrupt ID733  Priority/Priority Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID732  ,Interrupt ID732   Priority/Priority Byte Offset 732 "
else
hgroup.long 0x6C0++0x03
hide.long 0x00 "GICD_IPRIORITYR176,Interrupt Priority Register 176"
hgroup.long 0x6C4++0x03
hide.long 0x00 "GICD_IPRIORITYR177,Interrupt Priority Register 177"
hgroup.long 0x6C8++0x03
hide.long 0x00 "GICD_IPRIORITYR178,Interrupt Priority Register 178"
hgroup.long 0x6CC++0x03
hide.long 0x00 "GICD_IPRIORITYR179,Interrupt Priority Register 179"
hgroup.long 0x6D0++0x03
hide.long 0x00 "GICD_IPRIORITYR180,Interrupt Priority Register 180"
hgroup.long 0x6D4++0x03
hide.long 0x00 "GICD_IPRIORITYR181,Interrupt Priority Register 181"
hgroup.long 0x6D8++0x03
hide.long 0x00 "GICD_IPRIORITYR182,Interrupt Priority Register 182"
hgroup.long 0x6DC++0x03
hide.long 0x00 "GICD_IPRIORITYR183,Interrupt Priority Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0x6E0++0x03
line.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hexmask.long.byte 0x00 24.--31. 1. " INTID739  ,Interrupt ID739  Priority/Priority Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID738  ,Interrupt ID738   Priority/Priority Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID737  ,Interrupt ID737  Priority/Priority Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID736  ,Interrupt ID736   Priority/Priority Byte Offset 736 "
group.long 0x6E4++0x03
line.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hexmask.long.byte 0x00 24.--31. 1. " INTID743  ,Interrupt ID743  Priority/Priority Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID742  ,Interrupt ID742   Priority/Priority Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID741  ,Interrupt ID741  Priority/Priority Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID740  ,Interrupt ID740   Priority/Priority Byte Offset 740 "
group.long 0x6E8++0x03
line.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hexmask.long.byte 0x00 24.--31. 1. " INTID747  ,Interrupt ID747  Priority/Priority Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID746  ,Interrupt ID746   Priority/Priority Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID745  ,Interrupt ID745  Priority/Priority Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID744  ,Interrupt ID744   Priority/Priority Byte Offset 744 "
group.long 0x6EC++0x03
line.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hexmask.long.byte 0x00 24.--31. 1. " INTID751  ,Interrupt ID751  Priority/Priority Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID750  ,Interrupt ID750   Priority/Priority Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID749  ,Interrupt ID749  Priority/Priority Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID748  ,Interrupt ID748   Priority/Priority Byte Offset 748 "
group.long 0x6F0++0x03
line.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hexmask.long.byte 0x00 24.--31. 1. " INTID755  ,Interrupt ID755  Priority/Priority Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID754  ,Interrupt ID754   Priority/Priority Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID753  ,Interrupt ID753  Priority/Priority Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID752  ,Interrupt ID752   Priority/Priority Byte Offset 752 "
group.long 0x6F4++0x03
line.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hexmask.long.byte 0x00 24.--31. 1. " INTID759  ,Interrupt ID759  Priority/Priority Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID758  ,Interrupt ID758   Priority/Priority Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID757  ,Interrupt ID757  Priority/Priority Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID756  ,Interrupt ID756   Priority/Priority Byte Offset 756 "
group.long 0x6F8++0x03
line.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hexmask.long.byte 0x00 24.--31. 1. " INTID763  ,Interrupt ID763  Priority/Priority Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID762  ,Interrupt ID762   Priority/Priority Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID761  ,Interrupt ID761  Priority/Priority Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID760  ,Interrupt ID760   Priority/Priority Byte Offset 760 "
group.long 0x6FC++0x03
line.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
hexmask.long.byte 0x00 24.--31. 1. " INTID767  ,Interrupt ID767  Priority/Priority Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID766  ,Interrupt ID766   Priority/Priority Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID765  ,Interrupt ID765  Priority/Priority Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID764  ,Interrupt ID764   Priority/Priority Byte Offset 764 "
else
hgroup.long 0x6E0++0x03
hide.long 0x00 "GICD_IPRIORITYR184,Interrupt Priority Register 184"
hgroup.long 0x6E4++0x03
hide.long 0x00 "GICD_IPRIORITYR185,Interrupt Priority Register 185"
hgroup.long 0x6E8++0x03
hide.long 0x00 "GICD_IPRIORITYR186,Interrupt Priority Register 186"
hgroup.long 0x6EC++0x03
hide.long 0x00 "GICD_IPRIORITYR187,Interrupt Priority Register 187"
hgroup.long 0x6F0++0x03
hide.long 0x00 "GICD_IPRIORITYR188,Interrupt Priority Register 188"
hgroup.long 0x6F4++0x03
hide.long 0x00 "GICD_IPRIORITYR189,Interrupt Priority Register 189"
hgroup.long 0x6F8++0x03
hide.long 0x00 "GICD_IPRIORITYR190,Interrupt Priority Register 190"
hgroup.long 0x6FC++0x03
hide.long 0x00 "GICD_IPRIORITYR191,Interrupt Priority Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0x700++0x03
line.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hexmask.long.byte 0x00 24.--31. 1. " INTID771  ,Interrupt ID771  Priority/Priority Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID770  ,Interrupt ID770   Priority/Priority Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID769  ,Interrupt ID769  Priority/Priority Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID768  ,Interrupt ID768   Priority/Priority Byte Offset 768 "
group.long 0x704++0x03
line.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hexmask.long.byte 0x00 24.--31. 1. " INTID775  ,Interrupt ID775  Priority/Priority Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID774  ,Interrupt ID774   Priority/Priority Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID773  ,Interrupt ID773  Priority/Priority Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID772  ,Interrupt ID772   Priority/Priority Byte Offset 772 "
group.long 0x708++0x03
line.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hexmask.long.byte 0x00 24.--31. 1. " INTID779  ,Interrupt ID779  Priority/Priority Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID778  ,Interrupt ID778   Priority/Priority Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID777  ,Interrupt ID777  Priority/Priority Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID776  ,Interrupt ID776   Priority/Priority Byte Offset 776 "
group.long 0x70C++0x03
line.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hexmask.long.byte 0x00 24.--31. 1. " INTID783  ,Interrupt ID783  Priority/Priority Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID782  ,Interrupt ID782   Priority/Priority Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID781  ,Interrupt ID781  Priority/Priority Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID780  ,Interrupt ID780   Priority/Priority Byte Offset 780 "
group.long 0x710++0x03
line.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hexmask.long.byte 0x00 24.--31. 1. " INTID787  ,Interrupt ID787  Priority/Priority Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID786  ,Interrupt ID786   Priority/Priority Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID785  ,Interrupt ID785  Priority/Priority Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID784  ,Interrupt ID784   Priority/Priority Byte Offset 784 "
group.long 0x714++0x03
line.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hexmask.long.byte 0x00 24.--31. 1. " INTID791  ,Interrupt ID791  Priority/Priority Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID790  ,Interrupt ID790   Priority/Priority Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID789  ,Interrupt ID789  Priority/Priority Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID788  ,Interrupt ID788   Priority/Priority Byte Offset 788 "
group.long 0x718++0x03
line.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hexmask.long.byte 0x00 24.--31. 1. " INTID795  ,Interrupt ID795  Priority/Priority Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID794  ,Interrupt ID794   Priority/Priority Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID793  ,Interrupt ID793  Priority/Priority Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID792  ,Interrupt ID792   Priority/Priority Byte Offset 792 "
group.long 0x71C++0x03
line.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
hexmask.long.byte 0x00 24.--31. 1. " INTID799  ,Interrupt ID799  Priority/Priority Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID798  ,Interrupt ID798   Priority/Priority Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID797  ,Interrupt ID797  Priority/Priority Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID796  ,Interrupt ID796   Priority/Priority Byte Offset 796 "
else
hgroup.long 0x700++0x03
hide.long 0x00 "GICD_IPRIORITYR192,Interrupt Priority Register 192"
hgroup.long 0x704++0x03
hide.long 0x00 "GICD_IPRIORITYR193,Interrupt Priority Register 193"
hgroup.long 0x708++0x03
hide.long 0x00 "GICD_IPRIORITYR194,Interrupt Priority Register 194"
hgroup.long 0x70C++0x03
hide.long 0x00 "GICD_IPRIORITYR195,Interrupt Priority Register 195"
hgroup.long 0x710++0x03
hide.long 0x00 "GICD_IPRIORITYR196,Interrupt Priority Register 196"
hgroup.long 0x714++0x03
hide.long 0x00 "GICD_IPRIORITYR197,Interrupt Priority Register 197"
hgroup.long 0x718++0x03
hide.long 0x00 "GICD_IPRIORITYR198,Interrupt Priority Register 198"
hgroup.long 0x71C++0x03
hide.long 0x00 "GICD_IPRIORITYR199,Interrupt Priority Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0x720++0x03
line.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hexmask.long.byte 0x00 24.--31. 1. " INTID803  ,Interrupt ID803  Priority/Priority Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID802  ,Interrupt ID802   Priority/Priority Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID801  ,Interrupt ID801  Priority/Priority Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID800  ,Interrupt ID800   Priority/Priority Byte Offset 800 "
group.long 0x724++0x03
line.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hexmask.long.byte 0x00 24.--31. 1. " INTID807  ,Interrupt ID807  Priority/Priority Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID806  ,Interrupt ID806   Priority/Priority Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID805  ,Interrupt ID805  Priority/Priority Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID804  ,Interrupt ID804   Priority/Priority Byte Offset 804 "
group.long 0x728++0x03
line.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hexmask.long.byte 0x00 24.--31. 1. " INTID811  ,Interrupt ID811  Priority/Priority Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID810  ,Interrupt ID810   Priority/Priority Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID809  ,Interrupt ID809  Priority/Priority Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID808  ,Interrupt ID808   Priority/Priority Byte Offset 808 "
group.long 0x72C++0x03
line.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hexmask.long.byte 0x00 24.--31. 1. " INTID815  ,Interrupt ID815  Priority/Priority Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID814  ,Interrupt ID814   Priority/Priority Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID813  ,Interrupt ID813  Priority/Priority Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID812  ,Interrupt ID812   Priority/Priority Byte Offset 812 "
group.long 0x730++0x03
line.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hexmask.long.byte 0x00 24.--31. 1. " INTID819  ,Interrupt ID819  Priority/Priority Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID818  ,Interrupt ID818   Priority/Priority Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID817  ,Interrupt ID817  Priority/Priority Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID816  ,Interrupt ID816   Priority/Priority Byte Offset 816 "
group.long 0x734++0x03
line.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hexmask.long.byte 0x00 24.--31. 1. " INTID823  ,Interrupt ID823  Priority/Priority Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID822  ,Interrupt ID822   Priority/Priority Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID821  ,Interrupt ID821  Priority/Priority Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID820  ,Interrupt ID820   Priority/Priority Byte Offset 820 "
group.long 0x738++0x03
line.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hexmask.long.byte 0x00 24.--31. 1. " INTID827  ,Interrupt ID827  Priority/Priority Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID826  ,Interrupt ID826   Priority/Priority Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID825  ,Interrupt ID825  Priority/Priority Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID824  ,Interrupt ID824   Priority/Priority Byte Offset 824 "
group.long 0x73C++0x03
line.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
hexmask.long.byte 0x00 24.--31. 1. " INTID831  ,Interrupt ID831  Priority/Priority Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID830  ,Interrupt ID830   Priority/Priority Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID829  ,Interrupt ID829  Priority/Priority Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID828  ,Interrupt ID828   Priority/Priority Byte Offset 828 "
else
hgroup.long 0x720++0x03
hide.long 0x00 "GICD_IPRIORITYR200,Interrupt Priority Register 200"
hgroup.long 0x724++0x03
hide.long 0x00 "GICD_IPRIORITYR201,Interrupt Priority Register 201"
hgroup.long 0x728++0x03
hide.long 0x00 "GICD_IPRIORITYR202,Interrupt Priority Register 202"
hgroup.long 0x72C++0x03
hide.long 0x00 "GICD_IPRIORITYR203,Interrupt Priority Register 203"
hgroup.long 0x730++0x03
hide.long 0x00 "GICD_IPRIORITYR204,Interrupt Priority Register 204"
hgroup.long 0x734++0x03
hide.long 0x00 "GICD_IPRIORITYR205,Interrupt Priority Register 205"
hgroup.long 0x738++0x03
hide.long 0x00 "GICD_IPRIORITYR206,Interrupt Priority Register 206"
hgroup.long 0x73C++0x03
hide.long 0x00 "GICD_IPRIORITYR207,Interrupt Priority Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0x740++0x03
line.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hexmask.long.byte 0x00 24.--31. 1. " INTID835  ,Interrupt ID835  Priority/Priority Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID834  ,Interrupt ID834   Priority/Priority Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID833  ,Interrupt ID833  Priority/Priority Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID832  ,Interrupt ID832   Priority/Priority Byte Offset 832 "
group.long 0x744++0x03
line.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hexmask.long.byte 0x00 24.--31. 1. " INTID839  ,Interrupt ID839  Priority/Priority Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID838  ,Interrupt ID838   Priority/Priority Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID837  ,Interrupt ID837  Priority/Priority Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID836  ,Interrupt ID836   Priority/Priority Byte Offset 836 "
group.long 0x748++0x03
line.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hexmask.long.byte 0x00 24.--31. 1. " INTID843  ,Interrupt ID843  Priority/Priority Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID842  ,Interrupt ID842   Priority/Priority Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID841  ,Interrupt ID841  Priority/Priority Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID840  ,Interrupt ID840   Priority/Priority Byte Offset 840 "
group.long 0x74C++0x03
line.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hexmask.long.byte 0x00 24.--31. 1. " INTID847  ,Interrupt ID847  Priority/Priority Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID846  ,Interrupt ID846   Priority/Priority Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID845  ,Interrupt ID845  Priority/Priority Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID844  ,Interrupt ID844   Priority/Priority Byte Offset 844 "
group.long 0x750++0x03
line.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hexmask.long.byte 0x00 24.--31. 1. " INTID851  ,Interrupt ID851  Priority/Priority Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID850  ,Interrupt ID850   Priority/Priority Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID849  ,Interrupt ID849  Priority/Priority Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID848  ,Interrupt ID848   Priority/Priority Byte Offset 848 "
group.long 0x754++0x03
line.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hexmask.long.byte 0x00 24.--31. 1. " INTID855  ,Interrupt ID855  Priority/Priority Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID854  ,Interrupt ID854   Priority/Priority Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID853  ,Interrupt ID853  Priority/Priority Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID852  ,Interrupt ID852   Priority/Priority Byte Offset 852 "
group.long 0x758++0x03
line.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hexmask.long.byte 0x00 24.--31. 1. " INTID859  ,Interrupt ID859  Priority/Priority Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID858  ,Interrupt ID858   Priority/Priority Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID857  ,Interrupt ID857  Priority/Priority Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID856  ,Interrupt ID856   Priority/Priority Byte Offset 856 "
group.long 0x75C++0x03
line.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
hexmask.long.byte 0x00 24.--31. 1. " INTID863  ,Interrupt ID863  Priority/Priority Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID862  ,Interrupt ID862   Priority/Priority Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID861  ,Interrupt ID861  Priority/Priority Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID860  ,Interrupt ID860   Priority/Priority Byte Offset 860 "
else
hgroup.long 0x740++0x03
hide.long 0x00 "GICD_IPRIORITYR208,Interrupt Priority Register 208"
hgroup.long 0x744++0x03
hide.long 0x00 "GICD_IPRIORITYR209,Interrupt Priority Register 209"
hgroup.long 0x748++0x03
hide.long 0x00 "GICD_IPRIORITYR210,Interrupt Priority Register 210"
hgroup.long 0x74C++0x03
hide.long 0x00 "GICD_IPRIORITYR211,Interrupt Priority Register 211"
hgroup.long 0x750++0x03
hide.long 0x00 "GICD_IPRIORITYR212,Interrupt Priority Register 212"
hgroup.long 0x754++0x03
hide.long 0x00 "GICD_IPRIORITYR213,Interrupt Priority Register 213"
hgroup.long 0x758++0x03
hide.long 0x00 "GICD_IPRIORITYR214,Interrupt Priority Register 214"
hgroup.long 0x75C++0x03
hide.long 0x00 "GICD_IPRIORITYR215,Interrupt Priority Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0x760++0x03
line.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hexmask.long.byte 0x00 24.--31. 1. " INTID867  ,Interrupt ID867  Priority/Priority Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID866  ,Interrupt ID866   Priority/Priority Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID865  ,Interrupt ID865  Priority/Priority Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID864  ,Interrupt ID864   Priority/Priority Byte Offset 864 "
group.long 0x764++0x03
line.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hexmask.long.byte 0x00 24.--31. 1. " INTID871  ,Interrupt ID871  Priority/Priority Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID870  ,Interrupt ID870   Priority/Priority Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID869  ,Interrupt ID869  Priority/Priority Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID868  ,Interrupt ID868   Priority/Priority Byte Offset 868 "
group.long 0x768++0x03
line.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hexmask.long.byte 0x00 24.--31. 1. " INTID875  ,Interrupt ID875  Priority/Priority Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID874  ,Interrupt ID874   Priority/Priority Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID873  ,Interrupt ID873  Priority/Priority Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID872  ,Interrupt ID872   Priority/Priority Byte Offset 872 "
group.long 0x76C++0x03
line.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hexmask.long.byte 0x00 24.--31. 1. " INTID879  ,Interrupt ID879  Priority/Priority Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID878  ,Interrupt ID878   Priority/Priority Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID877  ,Interrupt ID877  Priority/Priority Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID876  ,Interrupt ID876   Priority/Priority Byte Offset 876 "
group.long 0x770++0x03
line.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hexmask.long.byte 0x00 24.--31. 1. " INTID883  ,Interrupt ID883  Priority/Priority Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID882  ,Interrupt ID882   Priority/Priority Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID881  ,Interrupt ID881  Priority/Priority Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID880  ,Interrupt ID880   Priority/Priority Byte Offset 880 "
group.long 0x774++0x03
line.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hexmask.long.byte 0x00 24.--31. 1. " INTID887  ,Interrupt ID887  Priority/Priority Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID886  ,Interrupt ID886   Priority/Priority Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID885  ,Interrupt ID885  Priority/Priority Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID884  ,Interrupt ID884   Priority/Priority Byte Offset 884 "
group.long 0x778++0x03
line.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hexmask.long.byte 0x00 24.--31. 1. " INTID891  ,Interrupt ID891  Priority/Priority Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID890  ,Interrupt ID890   Priority/Priority Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID889  ,Interrupt ID889  Priority/Priority Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID888  ,Interrupt ID888   Priority/Priority Byte Offset 888 "
group.long 0x77C++0x03
line.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
hexmask.long.byte 0x00 24.--31. 1. " INTID895  ,Interrupt ID895  Priority/Priority Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID894  ,Interrupt ID894   Priority/Priority Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID893  ,Interrupt ID893  Priority/Priority Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID892  ,Interrupt ID892   Priority/Priority Byte Offset 892 "
else
hgroup.long 0x760++0x03
hide.long 0x00 "GICD_IPRIORITYR216,Interrupt Priority Register 216"
hgroup.long 0x764++0x03
hide.long 0x00 "GICD_IPRIORITYR217,Interrupt Priority Register 217"
hgroup.long 0x768++0x03
hide.long 0x00 "GICD_IPRIORITYR218,Interrupt Priority Register 218"
hgroup.long 0x76C++0x03
hide.long 0x00 "GICD_IPRIORITYR219,Interrupt Priority Register 219"
hgroup.long 0x770++0x03
hide.long 0x00 "GICD_IPRIORITYR220,Interrupt Priority Register 220"
hgroup.long 0x774++0x03
hide.long 0x00 "GICD_IPRIORITYR221,Interrupt Priority Register 221"
hgroup.long 0x778++0x03
hide.long 0x00 "GICD_IPRIORITYR222,Interrupt Priority Register 222"
hgroup.long 0x77C++0x03
hide.long 0x00 "GICD_IPRIORITYR223,Interrupt Priority Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0x780++0x03
line.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hexmask.long.byte 0x00 24.--31. 1. " INTID899  ,Interrupt ID899  Priority/Priority Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID898  ,Interrupt ID898   Priority/Priority Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID897  ,Interrupt ID897  Priority/Priority Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID896  ,Interrupt ID896   Priority/Priority Byte Offset 896 "
group.long 0x784++0x03
line.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hexmask.long.byte 0x00 24.--31. 1. " INTID903  ,Interrupt ID903  Priority/Priority Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID902  ,Interrupt ID902   Priority/Priority Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID901  ,Interrupt ID901  Priority/Priority Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID900  ,Interrupt ID900   Priority/Priority Byte Offset 900 "
group.long 0x788++0x03
line.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hexmask.long.byte 0x00 24.--31. 1. " INTID907  ,Interrupt ID907  Priority/Priority Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID906  ,Interrupt ID906   Priority/Priority Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID905  ,Interrupt ID905  Priority/Priority Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID904  ,Interrupt ID904   Priority/Priority Byte Offset 904 "
group.long 0x78C++0x03
line.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hexmask.long.byte 0x00 24.--31. 1. " INTID911  ,Interrupt ID911  Priority/Priority Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID910  ,Interrupt ID910   Priority/Priority Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID909  ,Interrupt ID909  Priority/Priority Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID908  ,Interrupt ID908   Priority/Priority Byte Offset 908 "
group.long 0x790++0x03
line.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hexmask.long.byte 0x00 24.--31. 1. " INTID915  ,Interrupt ID915  Priority/Priority Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID914  ,Interrupt ID914   Priority/Priority Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID913  ,Interrupt ID913  Priority/Priority Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID912  ,Interrupt ID912   Priority/Priority Byte Offset 912 "
group.long 0x794++0x03
line.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hexmask.long.byte 0x00 24.--31. 1. " INTID919  ,Interrupt ID919  Priority/Priority Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID918  ,Interrupt ID918   Priority/Priority Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID917  ,Interrupt ID917  Priority/Priority Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID916  ,Interrupt ID916   Priority/Priority Byte Offset 916 "
group.long 0x798++0x03
line.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hexmask.long.byte 0x00 24.--31. 1. " INTID923  ,Interrupt ID923  Priority/Priority Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID922  ,Interrupt ID922   Priority/Priority Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID921  ,Interrupt ID921  Priority/Priority Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID920  ,Interrupt ID920   Priority/Priority Byte Offset 920 "
group.long 0x79C++0x03
line.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
hexmask.long.byte 0x00 24.--31. 1. " INTID927  ,Interrupt ID927  Priority/Priority Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID926  ,Interrupt ID926   Priority/Priority Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID925  ,Interrupt ID925  Priority/Priority Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID924  ,Interrupt ID924   Priority/Priority Byte Offset 924 "
else
hgroup.long 0x780++0x03
hide.long 0x00 "GICD_IPRIORITYR224,Interrupt Priority Register 224"
hgroup.long 0x784++0x03
hide.long 0x00 "GICD_IPRIORITYR225,Interrupt Priority Register 225"
hgroup.long 0x788++0x03
hide.long 0x00 "GICD_IPRIORITYR226,Interrupt Priority Register 226"
hgroup.long 0x78C++0x03
hide.long 0x00 "GICD_IPRIORITYR227,Interrupt Priority Register 227"
hgroup.long 0x790++0x03
hide.long 0x00 "GICD_IPRIORITYR228,Interrupt Priority Register 228"
hgroup.long 0x794++0x03
hide.long 0x00 "GICD_IPRIORITYR229,Interrupt Priority Register 229"
hgroup.long 0x798++0x03
hide.long 0x00 "GICD_IPRIORITYR230,Interrupt Priority Register 230"
hgroup.long 0x79C++0x03
hide.long 0x00 "GICD_IPRIORITYR231,Interrupt Priority Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0x7A0++0x03
line.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hexmask.long.byte 0x00 24.--31. 1. " INTID931  ,Interrupt ID931  Priority/Priority Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID930  ,Interrupt ID930   Priority/Priority Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID929  ,Interrupt ID929  Priority/Priority Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID928  ,Interrupt ID928   Priority/Priority Byte Offset 928 "
group.long 0x7A4++0x03
line.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hexmask.long.byte 0x00 24.--31. 1. " INTID935  ,Interrupt ID935  Priority/Priority Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID934  ,Interrupt ID934   Priority/Priority Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID933  ,Interrupt ID933  Priority/Priority Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID932  ,Interrupt ID932   Priority/Priority Byte Offset 932 "
group.long 0x7A8++0x03
line.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hexmask.long.byte 0x00 24.--31. 1. " INTID939  ,Interrupt ID939  Priority/Priority Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID938  ,Interrupt ID938   Priority/Priority Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID937  ,Interrupt ID937  Priority/Priority Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID936  ,Interrupt ID936   Priority/Priority Byte Offset 936 "
group.long 0x7AC++0x03
line.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hexmask.long.byte 0x00 24.--31. 1. " INTID943  ,Interrupt ID943  Priority/Priority Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID942  ,Interrupt ID942   Priority/Priority Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID941  ,Interrupt ID941  Priority/Priority Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID940  ,Interrupt ID940   Priority/Priority Byte Offset 940 "
group.long 0x7B0++0x03
line.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hexmask.long.byte 0x00 24.--31. 1. " INTID947  ,Interrupt ID947  Priority/Priority Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID946  ,Interrupt ID946   Priority/Priority Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID945  ,Interrupt ID945  Priority/Priority Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID944  ,Interrupt ID944   Priority/Priority Byte Offset 944 "
group.long 0x7B4++0x03
line.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hexmask.long.byte 0x00 24.--31. 1. " INTID951  ,Interrupt ID951  Priority/Priority Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID950  ,Interrupt ID950   Priority/Priority Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID949  ,Interrupt ID949  Priority/Priority Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID948  ,Interrupt ID948   Priority/Priority Byte Offset 948 "
group.long 0x7B8++0x03
line.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hexmask.long.byte 0x00 24.--31. 1. " INTID955  ,Interrupt ID955  Priority/Priority Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID954  ,Interrupt ID954   Priority/Priority Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID953  ,Interrupt ID953  Priority/Priority Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID952  ,Interrupt ID952   Priority/Priority Byte Offset 952 "
group.long 0x7BC++0x03
line.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
hexmask.long.byte 0x00 24.--31. 1. " INTID959  ,Interrupt ID959  Priority/Priority Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID958  ,Interrupt ID958   Priority/Priority Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID957  ,Interrupt ID957  Priority/Priority Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID956  ,Interrupt ID956   Priority/Priority Byte Offset 956 "
else
hgroup.long 0x7A0++0x03
hide.long 0x00 "GICD_IPRIORITYR232,Interrupt Priority Register 232"
hgroup.long 0x7A4++0x03
hide.long 0x00 "GICD_IPRIORITYR233,Interrupt Priority Register 233"
hgroup.long 0x7A8++0x03
hide.long 0x00 "GICD_IPRIORITYR234,Interrupt Priority Register 234"
hgroup.long 0x7AC++0x03
hide.long 0x00 "GICD_IPRIORITYR235,Interrupt Priority Register 235"
hgroup.long 0x7B0++0x03
hide.long 0x00 "GICD_IPRIORITYR236,Interrupt Priority Register 236"
hgroup.long 0x7B4++0x03
hide.long 0x00 "GICD_IPRIORITYR237,Interrupt Priority Register 237"
hgroup.long 0x7B8++0x03
hide.long 0x00 "GICD_IPRIORITYR238,Interrupt Priority Register 238"
hgroup.long 0x7BC++0x03
hide.long 0x00 "GICD_IPRIORITYR239,Interrupt Priority Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0x7C0++0x03
line.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hexmask.long.byte 0x00 24.--31. 1. " INTID963  ,Interrupt ID963  Priority/Priority Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID962  ,Interrupt ID962   Priority/Priority Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID961  ,Interrupt ID961  Priority/Priority Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID960  ,Interrupt ID960   Priority/Priority Byte Offset 960 "
group.long 0x7C4++0x03
line.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hexmask.long.byte 0x00 24.--31. 1. " INTID967  ,Interrupt ID967  Priority/Priority Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID966  ,Interrupt ID966   Priority/Priority Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID965  ,Interrupt ID965  Priority/Priority Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID964  ,Interrupt ID964   Priority/Priority Byte Offset 964 "
group.long 0x7C8++0x03
line.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hexmask.long.byte 0x00 24.--31. 1. " INTID971  ,Interrupt ID971  Priority/Priority Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID970  ,Interrupt ID970   Priority/Priority Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID969  ,Interrupt ID969  Priority/Priority Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID968  ,Interrupt ID968   Priority/Priority Byte Offset 968 "
group.long 0x7CC++0x03
line.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hexmask.long.byte 0x00 24.--31. 1. " INTID975  ,Interrupt ID975  Priority/Priority Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID974  ,Interrupt ID974   Priority/Priority Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID973  ,Interrupt ID973  Priority/Priority Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID972  ,Interrupt ID972   Priority/Priority Byte Offset 972 "
group.long 0x7D0++0x03
line.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hexmask.long.byte 0x00 24.--31. 1. " INTID979  ,Interrupt ID979  Priority/Priority Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID978  ,Interrupt ID978   Priority/Priority Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID977  ,Interrupt ID977  Priority/Priority Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID976  ,Interrupt ID976   Priority/Priority Byte Offset 976 "
group.long 0x7D4++0x03
line.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hexmask.long.byte 0x00 24.--31. 1. " INTID983  ,Interrupt ID983  Priority/Priority Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID982  ,Interrupt ID982   Priority/Priority Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID981  ,Interrupt ID981  Priority/Priority Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID980  ,Interrupt ID980   Priority/Priority Byte Offset 980 "
group.long 0x7D8++0x03
line.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hexmask.long.byte 0x00 24.--31. 1. " INTID987  ,Interrupt ID987  Priority/Priority Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID986  ,Interrupt ID986   Priority/Priority Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID985  ,Interrupt ID985  Priority/Priority Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID984  ,Interrupt ID984   Priority/Priority Byte Offset 984 "
group.long 0x7DC++0x03
line.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
hexmask.long.byte 0x00 24.--31. 1. " INTID991  ,Interrupt ID991  Priority/Priority Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  INTID990  ,Interrupt ID990   Priority/Priority Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  INTID989  ,Interrupt ID989  Priority/Priority Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  INTID988  ,Interrupt ID988   Priority/Priority Byte Offset 988 "
else
hgroup.long 0x7C0++0x03
hide.long 0x00 "GICD_IPRIORITYR240,Interrupt Priority Register 240"
hgroup.long 0x7C4++0x03
hide.long 0x00 "GICD_IPRIORITYR241,Interrupt Priority Register 241"
hgroup.long 0x7C8++0x03
hide.long 0x00 "GICD_IPRIORITYR242,Interrupt Priority Register 242"
hgroup.long 0x7CC++0x03
hide.long 0x00 "GICD_IPRIORITYR243,Interrupt Priority Register 243"
hgroup.long 0x7D0++0x03
hide.long 0x00 "GICD_IPRIORITYR244,Interrupt Priority Register 244"
hgroup.long 0x7D4++0x03
hide.long 0x00 "GICD_IPRIORITYR245,Interrupt Priority Register 245"
hgroup.long 0x7D8++0x03
hide.long 0x00 "GICD_IPRIORITYR246,Interrupt Priority Register 246"
hgroup.long 0x7DC++0x03
hide.long 0x00 "GICD_IPRIORITYR247,Interrupt Priority Register 247"
endif
tree.end
width 19.
tree "Interrupt Targets Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x000000E0)>0x1)
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0,Interrupt Processor Targets Register 0"
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1,Interrupt Processor Targets Register 1"
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2,Interrupt Processor Targets Register 2"
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3,Interrupt Processor Targets Register 3"
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4,Interrupt Processor Targets Register 4"
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5,Interrupt Processor Targets Register 5"
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6,Interrupt Processor Targets Register 6"
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7,Interrupt Processor Targets Register 7"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
group.long 0x820++0x03
line.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO35   ,CPU Targets Byte Offset 35  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO34   ,CPU Targets Byte Offset 34  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO33   ,CPU Targets Byte Offset 33  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO32   ,CPU Targets Byte Offset 32  "
group.long 0x824++0x03
line.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO39   ,CPU Targets Byte Offset 39  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO38   ,CPU Targets Byte Offset 38  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO37   ,CPU Targets Byte Offset 37  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO36   ,CPU Targets Byte Offset 36  "
group.long 0x828++0x03
line.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO43   ,CPU Targets Byte Offset 43  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO42   ,CPU Targets Byte Offset 42  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO41   ,CPU Targets Byte Offset 41  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO40   ,CPU Targets Byte Offset 40  "
group.long 0x82C++0x03
line.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO47   ,CPU Targets Byte Offset 47  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO46   ,CPU Targets Byte Offset 46  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO45   ,CPU Targets Byte Offset 45  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO44   ,CPU Targets Byte Offset 44  "
group.long 0x830++0x03
line.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO51   ,CPU Targets Byte Offset 51  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO50   ,CPU Targets Byte Offset 50  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO49   ,CPU Targets Byte Offset 49  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO48   ,CPU Targets Byte Offset 48  "
group.long 0x834++0x03
line.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO55   ,CPU Targets Byte Offset 55  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO54   ,CPU Targets Byte Offset 54  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO53   ,CPU Targets Byte Offset 53  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO52   ,CPU Targets Byte Offset 52  "
group.long 0x838++0x03
line.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO59   ,CPU Targets Byte Offset 59  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO58   ,CPU Targets Byte Offset 58  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO57   ,CPU Targets Byte Offset 57  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO56   ,CPU Targets Byte Offset 56  "
group.long 0x83C++0x03
line.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO63   ,CPU Targets Byte Offset 63  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO62   ,CPU Targets Byte Offset 62  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO61   ,CPU Targets Byte Offset 61  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO60   ,CPU Targets Byte Offset 60  "
else
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8,Interrupt Processor Targets Register 8"
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9,Interrupt Processor Targets Register 9"
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10,Interrupt Processor Targets Register 10"
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11,Interrupt Processor Targets Register 11"
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12,Interrupt Processor Targets Register 12"
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13,Interrupt Processor Targets Register 13"
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14,Interrupt Processor Targets Register 14"
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15,Interrupt Processor Targets Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
group.long 0x840++0x03
line.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO67   ,CPU Targets Byte Offset 67  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO66   ,CPU Targets Byte Offset 66  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO65   ,CPU Targets Byte Offset 65  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO64   ,CPU Targets Byte Offset 64  "
group.long 0x844++0x03
line.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO71   ,CPU Targets Byte Offset 71  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO70   ,CPU Targets Byte Offset 70  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO69   ,CPU Targets Byte Offset 69  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO68   ,CPU Targets Byte Offset 68  "
group.long 0x848++0x03
line.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO75   ,CPU Targets Byte Offset 75  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO74   ,CPU Targets Byte Offset 74  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO73   ,CPU Targets Byte Offset 73  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO72   ,CPU Targets Byte Offset 72  "
group.long 0x84C++0x03
line.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO79   ,CPU Targets Byte Offset 79  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO78   ,CPU Targets Byte Offset 78  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO77   ,CPU Targets Byte Offset 77  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO76   ,CPU Targets Byte Offset 76  "
group.long 0x850++0x03
line.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO83   ,CPU Targets Byte Offset 83  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO82   ,CPU Targets Byte Offset 82  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO81   ,CPU Targets Byte Offset 81  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO80   ,CPU Targets Byte Offset 80  "
group.long 0x854++0x03
line.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO87   ,CPU Targets Byte Offset 87  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO86   ,CPU Targets Byte Offset 86  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO85   ,CPU Targets Byte Offset 85  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO84   ,CPU Targets Byte Offset 84  "
group.long 0x858++0x03
line.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO91   ,CPU Targets Byte Offset 91  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO90   ,CPU Targets Byte Offset 90  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO89   ,CPU Targets Byte Offset 89  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO88   ,CPU Targets Byte Offset 88  "
group.long 0x85C++0x03
line.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO95   ,CPU Targets Byte Offset 95  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO94   ,CPU Targets Byte Offset 94  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO93   ,CPU Targets Byte Offset 93  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO92   ,CPU Targets Byte Offset 92  "
else
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16,Interrupt Processor Targets Register 16"
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17,Interrupt Processor Targets Register 17"
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18,Interrupt Processor Targets Register 18"
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19,Interrupt Processor Targets Register 19"
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20,Interrupt Processor Targets Register 20"
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21,Interrupt Processor Targets Register 21"
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22,Interrupt Processor Targets Register 22"
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23,Interrupt Processor Targets Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
group.long 0x860++0x03
line.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO99   ,CPU Targets Byte Offset 99  "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO98   ,CPU Targets Byte Offset 98  "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO97   ,CPU Targets Byte Offset 97  "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO96   ,CPU Targets Byte Offset 96  "
group.long 0x864++0x03
line.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO103  ,CPU Targets Byte Offset 103 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO102  ,CPU Targets Byte Offset 102 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO101  ,CPU Targets Byte Offset 101 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO100  ,CPU Targets Byte Offset 100 "
group.long 0x868++0x03
line.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO107  ,CPU Targets Byte Offset 107 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO106  ,CPU Targets Byte Offset 106 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO105  ,CPU Targets Byte Offset 105 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO104  ,CPU Targets Byte Offset 104 "
group.long 0x86C++0x03
line.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO111  ,CPU Targets Byte Offset 111 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO110  ,CPU Targets Byte Offset 110 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO109  ,CPU Targets Byte Offset 109 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO108  ,CPU Targets Byte Offset 108 "
group.long 0x870++0x03
line.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO115  ,CPU Targets Byte Offset 115 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO114  ,CPU Targets Byte Offset 114 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO113  ,CPU Targets Byte Offset 113 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO112  ,CPU Targets Byte Offset 112 "
group.long 0x874++0x03
line.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO119  ,CPU Targets Byte Offset 119 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO118  ,CPU Targets Byte Offset 118 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO117  ,CPU Targets Byte Offset 117 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO116  ,CPU Targets Byte Offset 116 "
group.long 0x878++0x03
line.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO123  ,CPU Targets Byte Offset 123 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO122  ,CPU Targets Byte Offset 122 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO121  ,CPU Targets Byte Offset 121 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO120  ,CPU Targets Byte Offset 120 "
group.long 0x87C++0x03
line.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO127  ,CPU Targets Byte Offset 127 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO126  ,CPU Targets Byte Offset 126 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO125  ,CPU Targets Byte Offset 125 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO124  ,CPU Targets Byte Offset 124 "
else
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24,Interrupt Processor Targets Register 24"
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25,Interrupt Processor Targets Register 25"
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26,Interrupt Processor Targets Register 26"
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27,Interrupt Processor Targets Register 27"
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28,Interrupt Processor Targets Register 28"
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29,Interrupt Processor Targets Register 29"
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30,Interrupt Processor Targets Register 30"
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31,Interrupt Processor Targets Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
group.long 0x880++0x03
line.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO131  ,CPU Targets Byte Offset 131 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO130  ,CPU Targets Byte Offset 130 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO129  ,CPU Targets Byte Offset 129 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO128  ,CPU Targets Byte Offset 128 "
group.long 0x884++0x03
line.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO135  ,CPU Targets Byte Offset 135 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO134  ,CPU Targets Byte Offset 134 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO133  ,CPU Targets Byte Offset 133 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO132  ,CPU Targets Byte Offset 132 "
group.long 0x888++0x03
line.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO139  ,CPU Targets Byte Offset 139 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO138  ,CPU Targets Byte Offset 138 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO137  ,CPU Targets Byte Offset 137 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO136  ,CPU Targets Byte Offset 136 "
group.long 0x88C++0x03
line.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO143  ,CPU Targets Byte Offset 143 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO142  ,CPU Targets Byte Offset 142 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO141  ,CPU Targets Byte Offset 141 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO140  ,CPU Targets Byte Offset 140 "
group.long 0x890++0x03
line.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO147  ,CPU Targets Byte Offset 147 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO146  ,CPU Targets Byte Offset 146 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO145  ,CPU Targets Byte Offset 145 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO144  ,CPU Targets Byte Offset 144 "
group.long 0x894++0x03
line.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO151  ,CPU Targets Byte Offset 151 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO150  ,CPU Targets Byte Offset 150 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO149  ,CPU Targets Byte Offset 149 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO148  ,CPU Targets Byte Offset 148 "
group.long 0x898++0x03
line.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO155  ,CPU Targets Byte Offset 155 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO154  ,CPU Targets Byte Offset 154 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO153  ,CPU Targets Byte Offset 153 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO152  ,CPU Targets Byte Offset 152 "
group.long 0x89C++0x03
line.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO159  ,CPU Targets Byte Offset 159 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO158  ,CPU Targets Byte Offset 158 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO157  ,CPU Targets Byte Offset 157 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO156  ,CPU Targets Byte Offset 156 "
else
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32,Interrupt Processor Targets Register 32"
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33,Interrupt Processor Targets Register 33"
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34,Interrupt Processor Targets Register 34"
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35,Interrupt Processor Targets Register 35"
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36,Interrupt Processor Targets Register 36"
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37,Interrupt Processor Targets Register 37"
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38,Interrupt Processor Targets Register 38"
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39,Interrupt Processor Targets Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
group.long 0x8A0++0x03
line.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO163  ,CPU Targets Byte Offset 163 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO162  ,CPU Targets Byte Offset 162 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO161  ,CPU Targets Byte Offset 161 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO160  ,CPU Targets Byte Offset 160 "
group.long 0x8A4++0x03
line.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO167  ,CPU Targets Byte Offset 167 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO166  ,CPU Targets Byte Offset 166 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO165  ,CPU Targets Byte Offset 165 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO164  ,CPU Targets Byte Offset 164 "
group.long 0x8A8++0x03
line.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO171  ,CPU Targets Byte Offset 171 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO170  ,CPU Targets Byte Offset 170 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO169  ,CPU Targets Byte Offset 169 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO168  ,CPU Targets Byte Offset 168 "
group.long 0x8AC++0x03
line.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO175  ,CPU Targets Byte Offset 175 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO174  ,CPU Targets Byte Offset 174 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO173  ,CPU Targets Byte Offset 173 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO172  ,CPU Targets Byte Offset 172 "
group.long 0x8B0++0x03
line.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO179  ,CPU Targets Byte Offset 179 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO178  ,CPU Targets Byte Offset 178 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO177  ,CPU Targets Byte Offset 177 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO176  ,CPU Targets Byte Offset 176 "
group.long 0x8B4++0x03
line.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO183  ,CPU Targets Byte Offset 183 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO182  ,CPU Targets Byte Offset 182 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO181  ,CPU Targets Byte Offset 181 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO180  ,CPU Targets Byte Offset 180 "
group.long 0x8B8++0x03
line.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO187  ,CPU Targets Byte Offset 187 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO186  ,CPU Targets Byte Offset 186 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO185  ,CPU Targets Byte Offset 185 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO184  ,CPU Targets Byte Offset 184 "
group.long 0x8BC++0x03
line.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO191  ,CPU Targets Byte Offset 191 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO190  ,CPU Targets Byte Offset 190 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO189  ,CPU Targets Byte Offset 189 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO188  ,CPU Targets Byte Offset 188 "
else
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40,Interrupt Processor Targets Register 40"
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41,Interrupt Processor Targets Register 41"
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42,Interrupt Processor Targets Register 42"
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43,Interrupt Processor Targets Register 43"
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44,Interrupt Processor Targets Register 44"
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45,Interrupt Processor Targets Register 45"
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46,Interrupt Processor Targets Register 46"
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47,Interrupt Processor Targets Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
group.long 0x8C0++0x03
line.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO195  ,CPU Targets Byte Offset 195 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO194  ,CPU Targets Byte Offset 194 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO193  ,CPU Targets Byte Offset 193 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO192  ,CPU Targets Byte Offset 192 "
group.long 0x8C4++0x03
line.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO199  ,CPU Targets Byte Offset 199 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO198  ,CPU Targets Byte Offset 198 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO197  ,CPU Targets Byte Offset 197 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO196  ,CPU Targets Byte Offset 196 "
group.long 0x8C8++0x03
line.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO203  ,CPU Targets Byte Offset 203 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO202  ,CPU Targets Byte Offset 202 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO201  ,CPU Targets Byte Offset 201 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO200  ,CPU Targets Byte Offset 200 "
group.long 0x8CC++0x03
line.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO207  ,CPU Targets Byte Offset 207 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO206  ,CPU Targets Byte Offset 206 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO205  ,CPU Targets Byte Offset 205 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO204  ,CPU Targets Byte Offset 204 "
group.long 0x8D0++0x03
line.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO211  ,CPU Targets Byte Offset 211 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO210  ,CPU Targets Byte Offset 210 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO209  ,CPU Targets Byte Offset 209 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO208  ,CPU Targets Byte Offset 208 "
group.long 0x8D4++0x03
line.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO215  ,CPU Targets Byte Offset 215 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO214  ,CPU Targets Byte Offset 214 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO213  ,CPU Targets Byte Offset 213 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO212  ,CPU Targets Byte Offset 212 "
group.long 0x8D8++0x03
line.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO219  ,CPU Targets Byte Offset 219 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO218  ,CPU Targets Byte Offset 218 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO217  ,CPU Targets Byte Offset 217 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO216  ,CPU Targets Byte Offset 216 "
group.long 0x8DC++0x03
line.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO223  ,CPU Targets Byte Offset 223 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO222  ,CPU Targets Byte Offset 222 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO221  ,CPU Targets Byte Offset 221 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO220  ,CPU Targets Byte Offset 220 "
else
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48,Interrupt Processor Targets Register 48"
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49,Interrupt Processor Targets Register 49"
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50,Interrupt Processor Targets Register 50"
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51,Interrupt Processor Targets Register 51"
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52,Interrupt Processor Targets Register 52"
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53,Interrupt Processor Targets Register 53"
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54,Interrupt Processor Targets Register 54"
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55,Interrupt Processor Targets Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
group.long 0x8E0++0x03
line.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO227  ,CPU Targets Byte Offset 227 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO226  ,CPU Targets Byte Offset 226 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO225  ,CPU Targets Byte Offset 225 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO224  ,CPU Targets Byte Offset 224 "
group.long 0x8E4++0x03
line.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO231  ,CPU Targets Byte Offset 231 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO230  ,CPU Targets Byte Offset 230 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO229  ,CPU Targets Byte Offset 229 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO228  ,CPU Targets Byte Offset 228 "
group.long 0x8E8++0x03
line.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO235  ,CPU Targets Byte Offset 235 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO234  ,CPU Targets Byte Offset 234 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO233  ,CPU Targets Byte Offset 233 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO232  ,CPU Targets Byte Offset 232 "
group.long 0x8EC++0x03
line.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO239  ,CPU Targets Byte Offset 239 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO238  ,CPU Targets Byte Offset 238 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO237  ,CPU Targets Byte Offset 237 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO236  ,CPU Targets Byte Offset 236 "
group.long 0x8F0++0x03
line.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO243  ,CPU Targets Byte Offset 243 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO242  ,CPU Targets Byte Offset 242 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO241  ,CPU Targets Byte Offset 241 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO240  ,CPU Targets Byte Offset 240 "
group.long 0x8F4++0x03
line.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO247  ,CPU Targets Byte Offset 247 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO246  ,CPU Targets Byte Offset 246 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO245  ,CPU Targets Byte Offset 245 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO244  ,CPU Targets Byte Offset 244 "
group.long 0x8F8++0x03
line.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO251  ,CPU Targets Byte Offset 251 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO250  ,CPU Targets Byte Offset 250 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO249  ,CPU Targets Byte Offset 249 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO248  ,CPU Targets Byte Offset 248 "
group.long 0x8FC++0x03
line.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO255  ,CPU Targets Byte Offset 255 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO254  ,CPU Targets Byte Offset 254 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO253  ,CPU Targets Byte Offset 253 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO252  ,CPU Targets Byte Offset 252 "
else
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56,Interrupt Processor Targets Register 56"
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57,Interrupt Processor Targets Register 57"
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58,Interrupt Processor Targets Register 58"
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59,Interrupt Processor Targets Register 59"
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60,Interrupt Processor Targets Register 60"
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61,Interrupt Processor Targets Register 61"
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62,Interrupt Processor Targets Register 62"
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63,Interrupt Processor Targets Register 63"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
group.long 0x900++0x03
line.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO259  ,CPU Targets Byte Offset 259 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO258  ,CPU Targets Byte Offset 258 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO257  ,CPU Targets Byte Offset 257 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO256  ,CPU Targets Byte Offset 256 "
group.long 0x904++0x03
line.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO263  ,CPU Targets Byte Offset 263 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO262  ,CPU Targets Byte Offset 262 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO261  ,CPU Targets Byte Offset 261 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO260  ,CPU Targets Byte Offset 260 "
group.long 0x908++0x03
line.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO267  ,CPU Targets Byte Offset 267 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO266  ,CPU Targets Byte Offset 266 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO265  ,CPU Targets Byte Offset 265 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO264  ,CPU Targets Byte Offset 264 "
group.long 0x90C++0x03
line.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO271  ,CPU Targets Byte Offset 271 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO270  ,CPU Targets Byte Offset 270 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO269  ,CPU Targets Byte Offset 269 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO268  ,CPU Targets Byte Offset 268 "
group.long 0x910++0x03
line.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO275  ,CPU Targets Byte Offset 275 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO274  ,CPU Targets Byte Offset 274 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO273  ,CPU Targets Byte Offset 273 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO272  ,CPU Targets Byte Offset 272 "
group.long 0x914++0x03
line.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO279  ,CPU Targets Byte Offset 279 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO278  ,CPU Targets Byte Offset 278 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO277  ,CPU Targets Byte Offset 277 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO276  ,CPU Targets Byte Offset 276 "
group.long 0x918++0x03
line.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO283  ,CPU Targets Byte Offset 283 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO282  ,CPU Targets Byte Offset 282 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO281  ,CPU Targets Byte Offset 281 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO280  ,CPU Targets Byte Offset 280 "
group.long 0x91C++0x03
line.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO287  ,CPU Targets Byte Offset 287 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO286  ,CPU Targets Byte Offset 286 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO285  ,CPU Targets Byte Offset 285 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO284  ,CPU Targets Byte Offset 284 "
else
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64,Interrupt Processor Targets Register 64"
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65,Interrupt Processor Targets Register 65"
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66,Interrupt Processor Targets Register 66"
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67,Interrupt Processor Targets Register 67"
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68,Interrupt Processor Targets Register 68"
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69,Interrupt Processor Targets Register 69"
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70,Interrupt Processor Targets Register 70"
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71,Interrupt Processor Targets Register 71"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
group.long 0x920++0x03
line.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO291  ,CPU Targets Byte Offset 291 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO290  ,CPU Targets Byte Offset 290 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO289  ,CPU Targets Byte Offset 289 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO288  ,CPU Targets Byte Offset 288 "
group.long 0x924++0x03
line.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO295  ,CPU Targets Byte Offset 295 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO294  ,CPU Targets Byte Offset 294 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO293  ,CPU Targets Byte Offset 293 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO292  ,CPU Targets Byte Offset 292 "
group.long 0x928++0x03
line.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO299  ,CPU Targets Byte Offset 299 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO298  ,CPU Targets Byte Offset 298 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO297  ,CPU Targets Byte Offset 297 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO296  ,CPU Targets Byte Offset 296 "
group.long 0x92C++0x03
line.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO303  ,CPU Targets Byte Offset 303 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO302  ,CPU Targets Byte Offset 302 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO301  ,CPU Targets Byte Offset 301 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO300  ,CPU Targets Byte Offset 300 "
group.long 0x930++0x03
line.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO307  ,CPU Targets Byte Offset 307 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO306  ,CPU Targets Byte Offset 306 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO305  ,CPU Targets Byte Offset 305 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO304  ,CPU Targets Byte Offset 304 "
group.long 0x934++0x03
line.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO311  ,CPU Targets Byte Offset 311 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO310  ,CPU Targets Byte Offset 310 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO309  ,CPU Targets Byte Offset 309 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO308  ,CPU Targets Byte Offset 308 "
group.long 0x938++0x03
line.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO315  ,CPU Targets Byte Offset 315 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO314  ,CPU Targets Byte Offset 314 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO313  ,CPU Targets Byte Offset 313 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO312  ,CPU Targets Byte Offset 312 "
group.long 0x93C++0x03
line.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO319  ,CPU Targets Byte Offset 319 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO318  ,CPU Targets Byte Offset 318 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO317  ,CPU Targets Byte Offset 317 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO316  ,CPU Targets Byte Offset 316 "
else
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72,Interrupt Processor Targets Register 72"
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73,Interrupt Processor Targets Register 73"
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74,Interrupt Processor Targets Register 74"
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75,Interrupt Processor Targets Register 75"
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76,Interrupt Processor Targets Register 76"
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77,Interrupt Processor Targets Register 77"
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78,Interrupt Processor Targets Register 78"
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79,Interrupt Processor Targets Register 79"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
group.long 0x940++0x03
line.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO323  ,CPU Targets Byte Offset 323 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO322  ,CPU Targets Byte Offset 322 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO321  ,CPU Targets Byte Offset 321 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO320  ,CPU Targets Byte Offset 320 "
group.long 0x944++0x03
line.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO327  ,CPU Targets Byte Offset 327 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO326  ,CPU Targets Byte Offset 326 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO325  ,CPU Targets Byte Offset 325 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO324  ,CPU Targets Byte Offset 324 "
group.long 0x948++0x03
line.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO331  ,CPU Targets Byte Offset 331 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO330  ,CPU Targets Byte Offset 330 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO329  ,CPU Targets Byte Offset 329 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO328  ,CPU Targets Byte Offset 328 "
group.long 0x94C++0x03
line.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO335  ,CPU Targets Byte Offset 335 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO334  ,CPU Targets Byte Offset 334 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO333  ,CPU Targets Byte Offset 333 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO332  ,CPU Targets Byte Offset 332 "
group.long 0x950++0x03
line.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO339  ,CPU Targets Byte Offset 339 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO338  ,CPU Targets Byte Offset 338 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO337  ,CPU Targets Byte Offset 337 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO336  ,CPU Targets Byte Offset 336 "
group.long 0x954++0x03
line.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO343  ,CPU Targets Byte Offset 343 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO342  ,CPU Targets Byte Offset 342 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO341  ,CPU Targets Byte Offset 341 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO340  ,CPU Targets Byte Offset 340 "
group.long 0x958++0x03
line.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO347  ,CPU Targets Byte Offset 347 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO346  ,CPU Targets Byte Offset 346 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO345  ,CPU Targets Byte Offset 345 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO344  ,CPU Targets Byte Offset 344 "
group.long 0x95C++0x03
line.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO351  ,CPU Targets Byte Offset 351 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO350  ,CPU Targets Byte Offset 350 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO349  ,CPU Targets Byte Offset 349 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO348  ,CPU Targets Byte Offset 348 "
else
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80,Interrupt Processor Targets Register 80"
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81,Interrupt Processor Targets Register 81"
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82,Interrupt Processor Targets Register 82"
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83,Interrupt Processor Targets Register 83"
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84,Interrupt Processor Targets Register 84"
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85,Interrupt Processor Targets Register 85"
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86,Interrupt Processor Targets Register 86"
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87,Interrupt Processor Targets Register 87"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
group.long 0x960++0x03
line.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO355  ,CPU Targets Byte Offset 355 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO354  ,CPU Targets Byte Offset 354 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO353  ,CPU Targets Byte Offset 353 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO352  ,CPU Targets Byte Offset 352 "
group.long 0x964++0x03
line.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO359  ,CPU Targets Byte Offset 359 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO358  ,CPU Targets Byte Offset 358 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO357  ,CPU Targets Byte Offset 357 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO356  ,CPU Targets Byte Offset 356 "
group.long 0x968++0x03
line.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO363  ,CPU Targets Byte Offset 363 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO362  ,CPU Targets Byte Offset 362 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO361  ,CPU Targets Byte Offset 361 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO360  ,CPU Targets Byte Offset 360 "
group.long 0x96C++0x03
line.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO367  ,CPU Targets Byte Offset 367 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO366  ,CPU Targets Byte Offset 366 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO365  ,CPU Targets Byte Offset 365 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO364  ,CPU Targets Byte Offset 364 "
group.long 0x970++0x03
line.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO371  ,CPU Targets Byte Offset 371 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO370  ,CPU Targets Byte Offset 370 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO369  ,CPU Targets Byte Offset 369 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO368  ,CPU Targets Byte Offset 368 "
group.long 0x974++0x03
line.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO375  ,CPU Targets Byte Offset 375 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO374  ,CPU Targets Byte Offset 374 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO373  ,CPU Targets Byte Offset 373 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO372  ,CPU Targets Byte Offset 372 "
group.long 0x978++0x03
line.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO379  ,CPU Targets Byte Offset 379 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO378  ,CPU Targets Byte Offset 378 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO377  ,CPU Targets Byte Offset 377 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO376  ,CPU Targets Byte Offset 376 "
group.long 0x97C++0x03
line.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO383  ,CPU Targets Byte Offset 383 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO382  ,CPU Targets Byte Offset 382 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO381  ,CPU Targets Byte Offset 381 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO380  ,CPU Targets Byte Offset 380 "
else
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88,Interrupt Processor Targets Register 88"
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89,Interrupt Processor Targets Register 89"
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90,Interrupt Processor Targets Register 90"
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91,Interrupt Processor Targets Register 91"
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92,Interrupt Processor Targets Register 92"
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93,Interrupt Processor Targets Register 93"
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94,Interrupt Processor Targets Register 94"
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95,Interrupt Processor Targets Register 95"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
group.long 0x980++0x03
line.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO387  ,CPU Targets Byte Offset 387 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO386  ,CPU Targets Byte Offset 386 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO385  ,CPU Targets Byte Offset 385 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO384  ,CPU Targets Byte Offset 384 "
group.long 0x984++0x03
line.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO391  ,CPU Targets Byte Offset 391 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO390  ,CPU Targets Byte Offset 390 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO389  ,CPU Targets Byte Offset 389 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO388  ,CPU Targets Byte Offset 388 "
group.long 0x988++0x03
line.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO395  ,CPU Targets Byte Offset 395 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO394  ,CPU Targets Byte Offset 394 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO393  ,CPU Targets Byte Offset 393 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO392  ,CPU Targets Byte Offset 392 "
group.long 0x98C++0x03
line.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO399  ,CPU Targets Byte Offset 399 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO398  ,CPU Targets Byte Offset 398 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO397  ,CPU Targets Byte Offset 397 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO396  ,CPU Targets Byte Offset 396 "
group.long 0x990++0x03
line.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO403  ,CPU Targets Byte Offset 403 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO402  ,CPU Targets Byte Offset 402 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO401  ,CPU Targets Byte Offset 401 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO400  ,CPU Targets Byte Offset 400 "
group.long 0x994++0x03
line.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO407  ,CPU Targets Byte Offset 407 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO406  ,CPU Targets Byte Offset 406 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO405  ,CPU Targets Byte Offset 405 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO404  ,CPU Targets Byte Offset 404 "
group.long 0x998++0x03
line.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO411  ,CPU Targets Byte Offset 411 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO410  ,CPU Targets Byte Offset 410 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO409  ,CPU Targets Byte Offset 409 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO408  ,CPU Targets Byte Offset 408 "
group.long 0x99C++0x03
line.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO415  ,CPU Targets Byte Offset 415 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO414  ,CPU Targets Byte Offset 414 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO413  ,CPU Targets Byte Offset 413 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO412  ,CPU Targets Byte Offset 412 "
else
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96,Interrupt Processor Targets Register 96"
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97,Interrupt Processor Targets Register 97"
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98,Interrupt Processor Targets Register 98"
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99,Interrupt Processor Targets Register 99"
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
group.long 0x9A0++0x03
line.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO419  ,CPU Targets Byte Offset 419 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO418  ,CPU Targets Byte Offset 418 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO417  ,CPU Targets Byte Offset 417 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO416  ,CPU Targets Byte Offset 416 "
group.long 0x9A4++0x03
line.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO423  ,CPU Targets Byte Offset 423 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO422  ,CPU Targets Byte Offset 422 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO421  ,CPU Targets Byte Offset 421 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO420  ,CPU Targets Byte Offset 420 "
group.long 0x9A8++0x03
line.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO427  ,CPU Targets Byte Offset 427 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO426  ,CPU Targets Byte Offset 426 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO425  ,CPU Targets Byte Offset 425 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO424  ,CPU Targets Byte Offset 424 "
group.long 0x9AC++0x03
line.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO431  ,CPU Targets Byte Offset 431 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO430  ,CPU Targets Byte Offset 430 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO429  ,CPU Targets Byte Offset 429 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO428  ,CPU Targets Byte Offset 428 "
group.long 0x9B0++0x03
line.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO435  ,CPU Targets Byte Offset 435 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO434  ,CPU Targets Byte Offset 434 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO433  ,CPU Targets Byte Offset 433 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO432  ,CPU Targets Byte Offset 432 "
group.long 0x9B4++0x03
line.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO439  ,CPU Targets Byte Offset 439 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO438  ,CPU Targets Byte Offset 438 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO437  ,CPU Targets Byte Offset 437 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO436  ,CPU Targets Byte Offset 436 "
group.long 0x9B8++0x03
line.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO443  ,CPU Targets Byte Offset 443 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO442  ,CPU Targets Byte Offset 442 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO441  ,CPU Targets Byte Offset 441 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO440  ,CPU Targets Byte Offset 440 "
group.long 0x9BC++0x03
line.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO447  ,CPU Targets Byte Offset 447 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO446  ,CPU Targets Byte Offset 446 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO445  ,CPU Targets Byte Offset 445 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO444  ,CPU Targets Byte Offset 444 "
else
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
group.long 0x9C0++0x03
line.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO451  ,CPU Targets Byte Offset 451 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO450  ,CPU Targets Byte Offset 450 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO449  ,CPU Targets Byte Offset 449 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO448  ,CPU Targets Byte Offset 448 "
group.long 0x9C4++0x03
line.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO455  ,CPU Targets Byte Offset 455 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO454  ,CPU Targets Byte Offset 454 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO453  ,CPU Targets Byte Offset 453 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO452  ,CPU Targets Byte Offset 452 "
group.long 0x9C8++0x03
line.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO459  ,CPU Targets Byte Offset 459 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO458  ,CPU Targets Byte Offset 458 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO457  ,CPU Targets Byte Offset 457 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO456  ,CPU Targets Byte Offset 456 "
group.long 0x9CC++0x03
line.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO463  ,CPU Targets Byte Offset 463 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO462  ,CPU Targets Byte Offset 462 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO461  ,CPU Targets Byte Offset 461 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO460  ,CPU Targets Byte Offset 460 "
group.long 0x9D0++0x03
line.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO467  ,CPU Targets Byte Offset 467 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO466  ,CPU Targets Byte Offset 466 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO465  ,CPU Targets Byte Offset 465 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO464  ,CPU Targets Byte Offset 464 "
group.long 0x9D4++0x03
line.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO471  ,CPU Targets Byte Offset 471 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO470  ,CPU Targets Byte Offset 470 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO469  ,CPU Targets Byte Offset 469 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO468  ,CPU Targets Byte Offset 468 "
group.long 0x9D8++0x03
line.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO475  ,CPU Targets Byte Offset 475 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO474  ,CPU Targets Byte Offset 474 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO473  ,CPU Targets Byte Offset 473 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO472  ,CPU Targets Byte Offset 472 "
group.long 0x9DC++0x03
line.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO479  ,CPU Targets Byte Offset 479 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO478  ,CPU Targets Byte Offset 478 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO477  ,CPU Targets Byte Offset 477 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO476  ,CPU Targets Byte Offset 476 "
else
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
group.long 0x9E0++0x03
line.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO483  ,CPU Targets Byte Offset 483 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO482  ,CPU Targets Byte Offset 482 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO481  ,CPU Targets Byte Offset 481 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO480  ,CPU Targets Byte Offset 480 "
group.long 0x9E4++0x03
line.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO487  ,CPU Targets Byte Offset 487 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO486  ,CPU Targets Byte Offset 486 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO485  ,CPU Targets Byte Offset 485 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO484  ,CPU Targets Byte Offset 484 "
group.long 0x9E8++0x03
line.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO491  ,CPU Targets Byte Offset 491 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO490  ,CPU Targets Byte Offset 490 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO489  ,CPU Targets Byte Offset 489 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO488  ,CPU Targets Byte Offset 488 "
group.long 0x9EC++0x03
line.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO495  ,CPU Targets Byte Offset 495 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO494  ,CPU Targets Byte Offset 494 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO493  ,CPU Targets Byte Offset 493 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO492  ,CPU Targets Byte Offset 492 "
group.long 0x9F0++0x03
line.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO499  ,CPU Targets Byte Offset 499 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO498  ,CPU Targets Byte Offset 498 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO497  ,CPU Targets Byte Offset 497 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO496  ,CPU Targets Byte Offset 496 "
group.long 0x9F4++0x03
line.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO503  ,CPU Targets Byte Offset 503 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO502  ,CPU Targets Byte Offset 502 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO501  ,CPU Targets Byte Offset 501 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO500  ,CPU Targets Byte Offset 500 "
group.long 0x9F8++0x03
line.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO507  ,CPU Targets Byte Offset 507 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO506  ,CPU Targets Byte Offset 506 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO505  ,CPU Targets Byte Offset 505 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO504  ,CPU Targets Byte Offset 504 "
group.long 0x9FC++0x03
line.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO511  ,CPU Targets Byte Offset 511 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO510  ,CPU Targets Byte Offset 510 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO509  ,CPU Targets Byte Offset 509 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO508  ,CPU Targets Byte Offset 508 "
else
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xA00++0x03
line.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO515  ,CPU Targets Byte Offset 515 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO514  ,CPU Targets Byte Offset 514 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO513  ,CPU Targets Byte Offset 513 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO512  ,CPU Targets Byte Offset 512 "
group.long 0xA04++0x03
line.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO519  ,CPU Targets Byte Offset 519 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO518  ,CPU Targets Byte Offset 518 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO517  ,CPU Targets Byte Offset 517 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO516  ,CPU Targets Byte Offset 516 "
group.long 0xA08++0x03
line.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO523  ,CPU Targets Byte Offset 523 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO522  ,CPU Targets Byte Offset 522 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO521  ,CPU Targets Byte Offset 521 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO520  ,CPU Targets Byte Offset 520 "
group.long 0xA0C++0x03
line.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO527  ,CPU Targets Byte Offset 527 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO526  ,CPU Targets Byte Offset 526 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO525  ,CPU Targets Byte Offset 525 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO524  ,CPU Targets Byte Offset 524 "
group.long 0xA10++0x03
line.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO531  ,CPU Targets Byte Offset 531 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO530  ,CPU Targets Byte Offset 530 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO529  ,CPU Targets Byte Offset 529 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO528  ,CPU Targets Byte Offset 528 "
group.long 0xA14++0x03
line.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO535  ,CPU Targets Byte Offset 535 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO534  ,CPU Targets Byte Offset 534 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO533  ,CPU Targets Byte Offset 533 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO532  ,CPU Targets Byte Offset 532 "
group.long 0xA18++0x03
line.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO539  ,CPU Targets Byte Offset 539 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO538  ,CPU Targets Byte Offset 538 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO537  ,CPU Targets Byte Offset 537 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO536  ,CPU Targets Byte Offset 536 "
group.long 0xA1C++0x03
line.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO543  ,CPU Targets Byte Offset 543 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO542  ,CPU Targets Byte Offset 542 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO541  ,CPU Targets Byte Offset 541 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO540  ,CPU Targets Byte Offset 540 "
else
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xA20++0x03
line.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO547  ,CPU Targets Byte Offset 547 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO546  ,CPU Targets Byte Offset 546 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO545  ,CPU Targets Byte Offset 545 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO544  ,CPU Targets Byte Offset 544 "
group.long 0xA24++0x03
line.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO551  ,CPU Targets Byte Offset 551 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO550  ,CPU Targets Byte Offset 550 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO549  ,CPU Targets Byte Offset 549 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO548  ,CPU Targets Byte Offset 548 "
group.long 0xA28++0x03
line.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO555  ,CPU Targets Byte Offset 555 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO554  ,CPU Targets Byte Offset 554 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO553  ,CPU Targets Byte Offset 553 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO552  ,CPU Targets Byte Offset 552 "
group.long 0xA2C++0x03
line.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO559  ,CPU Targets Byte Offset 559 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO558  ,CPU Targets Byte Offset 558 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO557  ,CPU Targets Byte Offset 557 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO556  ,CPU Targets Byte Offset 556 "
group.long 0xA30++0x03
line.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO563  ,CPU Targets Byte Offset 563 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO562  ,CPU Targets Byte Offset 562 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO561  ,CPU Targets Byte Offset 561 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO560  ,CPU Targets Byte Offset 560 "
group.long 0xA34++0x03
line.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO567  ,CPU Targets Byte Offset 567 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO566  ,CPU Targets Byte Offset 566 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO565  ,CPU Targets Byte Offset 565 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO564  ,CPU Targets Byte Offset 564 "
group.long 0xA38++0x03
line.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO571  ,CPU Targets Byte Offset 571 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO570  ,CPU Targets Byte Offset 570 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO569  ,CPU Targets Byte Offset 569 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO568  ,CPU Targets Byte Offset 568 "
group.long 0xA3C++0x03
line.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO575  ,CPU Targets Byte Offset 575 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO574  ,CPU Targets Byte Offset 574 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO573  ,CPU Targets Byte Offset 573 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO572  ,CPU Targets Byte Offset 572 "
else
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xA40++0x03
line.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO579  ,CPU Targets Byte Offset 579 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO578  ,CPU Targets Byte Offset 578 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO577  ,CPU Targets Byte Offset 577 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO576  ,CPU Targets Byte Offset 576 "
group.long 0xA44++0x03
line.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO583  ,CPU Targets Byte Offset 583 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO582  ,CPU Targets Byte Offset 582 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO581  ,CPU Targets Byte Offset 581 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO580  ,CPU Targets Byte Offset 580 "
group.long 0xA48++0x03
line.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO587  ,CPU Targets Byte Offset 587 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO586  ,CPU Targets Byte Offset 586 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO585  ,CPU Targets Byte Offset 585 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO584  ,CPU Targets Byte Offset 584 "
group.long 0xA4C++0x03
line.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO591  ,CPU Targets Byte Offset 591 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO590  ,CPU Targets Byte Offset 590 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO589  ,CPU Targets Byte Offset 589 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO588  ,CPU Targets Byte Offset 588 "
group.long 0xA50++0x03
line.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO595  ,CPU Targets Byte Offset 595 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO594  ,CPU Targets Byte Offset 594 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO593  ,CPU Targets Byte Offset 593 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO592  ,CPU Targets Byte Offset 592 "
group.long 0xA54++0x03
line.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO599  ,CPU Targets Byte Offset 599 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO598  ,CPU Targets Byte Offset 598 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO597  ,CPU Targets Byte Offset 597 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO596  ,CPU Targets Byte Offset 596 "
group.long 0xA58++0x03
line.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO603  ,CPU Targets Byte Offset 603 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO602  ,CPU Targets Byte Offset 602 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO601  ,CPU Targets Byte Offset 601 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO600  ,CPU Targets Byte Offset 600 "
group.long 0xA5C++0x03
line.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO607  ,CPU Targets Byte Offset 607 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO606  ,CPU Targets Byte Offset 606 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO605  ,CPU Targets Byte Offset 605 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO604  ,CPU Targets Byte Offset 604 "
else
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xA60++0x03
line.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO611  ,CPU Targets Byte Offset 611 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO610  ,CPU Targets Byte Offset 610 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO609  ,CPU Targets Byte Offset 609 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO608  ,CPU Targets Byte Offset 608 "
group.long 0xA64++0x03
line.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO615  ,CPU Targets Byte Offset 615 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO614  ,CPU Targets Byte Offset 614 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO613  ,CPU Targets Byte Offset 613 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO612  ,CPU Targets Byte Offset 612 "
group.long 0xA68++0x03
line.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO619  ,CPU Targets Byte Offset 619 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO618  ,CPU Targets Byte Offset 618 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO617  ,CPU Targets Byte Offset 617 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO616  ,CPU Targets Byte Offset 616 "
group.long 0xA6C++0x03
line.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO623  ,CPU Targets Byte Offset 623 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO622  ,CPU Targets Byte Offset 622 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO621  ,CPU Targets Byte Offset 621 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO620  ,CPU Targets Byte Offset 620 "
group.long 0xA70++0x03
line.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO627  ,CPU Targets Byte Offset 627 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO626  ,CPU Targets Byte Offset 626 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO625  ,CPU Targets Byte Offset 625 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO624  ,CPU Targets Byte Offset 624 "
group.long 0xA74++0x03
line.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO631  ,CPU Targets Byte Offset 631 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO630  ,CPU Targets Byte Offset 630 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO629  ,CPU Targets Byte Offset 629 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO628  ,CPU Targets Byte Offset 628 "
group.long 0xA78++0x03
line.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO635  ,CPU Targets Byte Offset 635 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO634  ,CPU Targets Byte Offset 634 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO633  ,CPU Targets Byte Offset 633 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO632  ,CPU Targets Byte Offset 632 "
group.long 0xA7C++0x03
line.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO639  ,CPU Targets Byte Offset 639 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO638  ,CPU Targets Byte Offset 638 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO637  ,CPU Targets Byte Offset 637 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO636  ,CPU Targets Byte Offset 636 "
else
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xA80++0x03
line.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO643  ,CPU Targets Byte Offset 643 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO642  ,CPU Targets Byte Offset 642 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO641  ,CPU Targets Byte Offset 641 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO640  ,CPU Targets Byte Offset 640 "
group.long 0xA84++0x03
line.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO647  ,CPU Targets Byte Offset 647 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO646  ,CPU Targets Byte Offset 646 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO645  ,CPU Targets Byte Offset 645 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO644  ,CPU Targets Byte Offset 644 "
group.long 0xA88++0x03
line.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO651  ,CPU Targets Byte Offset 651 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO650  ,CPU Targets Byte Offset 650 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO649  ,CPU Targets Byte Offset 649 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO648  ,CPU Targets Byte Offset 648 "
group.long 0xA8C++0x03
line.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO655  ,CPU Targets Byte Offset 655 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO654  ,CPU Targets Byte Offset 654 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO653  ,CPU Targets Byte Offset 653 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO652  ,CPU Targets Byte Offset 652 "
group.long 0xA90++0x03
line.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO659  ,CPU Targets Byte Offset 659 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO658  ,CPU Targets Byte Offset 658 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO657  ,CPU Targets Byte Offset 657 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO656  ,CPU Targets Byte Offset 656 "
group.long 0xA94++0x03
line.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO663  ,CPU Targets Byte Offset 663 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO662  ,CPU Targets Byte Offset 662 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO661  ,CPU Targets Byte Offset 661 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO660  ,CPU Targets Byte Offset 660 "
group.long 0xA98++0x03
line.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO667  ,CPU Targets Byte Offset 667 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO666  ,CPU Targets Byte Offset 666 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO665  ,CPU Targets Byte Offset 665 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO664  ,CPU Targets Byte Offset 664 "
group.long 0xA9C++0x03
line.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO671  ,CPU Targets Byte Offset 671 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO670  ,CPU Targets Byte Offset 670 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO669  ,CPU Targets Byte Offset 669 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO668  ,CPU Targets Byte Offset 668 "
else
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xAA0++0x03
line.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO675  ,CPU Targets Byte Offset 675 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO674  ,CPU Targets Byte Offset 674 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO673  ,CPU Targets Byte Offset 673 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO672  ,CPU Targets Byte Offset 672 "
group.long 0xAA4++0x03
line.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO679  ,CPU Targets Byte Offset 679 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO678  ,CPU Targets Byte Offset 678 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO677  ,CPU Targets Byte Offset 677 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO676  ,CPU Targets Byte Offset 676 "
group.long 0xAA8++0x03
line.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO683  ,CPU Targets Byte Offset 683 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO682  ,CPU Targets Byte Offset 682 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO681  ,CPU Targets Byte Offset 681 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO680  ,CPU Targets Byte Offset 680 "
group.long 0xAAC++0x03
line.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO687  ,CPU Targets Byte Offset 687 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO686  ,CPU Targets Byte Offset 686 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO685  ,CPU Targets Byte Offset 685 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO684  ,CPU Targets Byte Offset 684 "
group.long 0xAB0++0x03
line.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO691  ,CPU Targets Byte Offset 691 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO690  ,CPU Targets Byte Offset 690 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO689  ,CPU Targets Byte Offset 689 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO688  ,CPU Targets Byte Offset 688 "
group.long 0xAB4++0x03
line.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO695  ,CPU Targets Byte Offset 695 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO694  ,CPU Targets Byte Offset 694 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO693  ,CPU Targets Byte Offset 693 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO692  ,CPU Targets Byte Offset 692 "
group.long 0xAB8++0x03
line.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO699  ,CPU Targets Byte Offset 699 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO698  ,CPU Targets Byte Offset 698 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO697  ,CPU Targets Byte Offset 697 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO696  ,CPU Targets Byte Offset 696 "
group.long 0xABC++0x03
line.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO703  ,CPU Targets Byte Offset 703 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO702  ,CPU Targets Byte Offset 702 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO701  ,CPU Targets Byte Offset 701 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO700  ,CPU Targets Byte Offset 700 "
else
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xAC0++0x03
line.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO707  ,CPU Targets Byte Offset 707 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO706  ,CPU Targets Byte Offset 706 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO705  ,CPU Targets Byte Offset 705 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO704  ,CPU Targets Byte Offset 704 "
group.long 0xAC4++0x03
line.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO711  ,CPU Targets Byte Offset 711 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO710  ,CPU Targets Byte Offset 710 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO709  ,CPU Targets Byte Offset 709 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO708  ,CPU Targets Byte Offset 708 "
group.long 0xAC8++0x03
line.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO715  ,CPU Targets Byte Offset 715 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO714  ,CPU Targets Byte Offset 714 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO713  ,CPU Targets Byte Offset 713 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO712  ,CPU Targets Byte Offset 712 "
group.long 0xACC++0x03
line.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO719  ,CPU Targets Byte Offset 719 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO718  ,CPU Targets Byte Offset 718 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO717  ,CPU Targets Byte Offset 717 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO716  ,CPU Targets Byte Offset 716 "
group.long 0xAD0++0x03
line.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO723  ,CPU Targets Byte Offset 723 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO722  ,CPU Targets Byte Offset 722 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO721  ,CPU Targets Byte Offset 721 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO720  ,CPU Targets Byte Offset 720 "
group.long 0xAD4++0x03
line.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO727  ,CPU Targets Byte Offset 727 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO726  ,CPU Targets Byte Offset 726 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO725  ,CPU Targets Byte Offset 725 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO724  ,CPU Targets Byte Offset 724 "
group.long 0xAD8++0x03
line.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO731  ,CPU Targets Byte Offset 731 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO730  ,CPU Targets Byte Offset 730 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO729  ,CPU Targets Byte Offset 729 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO728  ,CPU Targets Byte Offset 728 "
group.long 0xADC++0x03
line.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO735  ,CPU Targets Byte Offset 735 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO734  ,CPU Targets Byte Offset 734 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO733  ,CPU Targets Byte Offset 733 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO732  ,CPU Targets Byte Offset 732 "
else
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xAE0++0x03
line.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO739  ,CPU Targets Byte Offset 739 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO738  ,CPU Targets Byte Offset 738 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO737  ,CPU Targets Byte Offset 737 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO736  ,CPU Targets Byte Offset 736 "
group.long 0xAE4++0x03
line.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO743  ,CPU Targets Byte Offset 743 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO742  ,CPU Targets Byte Offset 742 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO741  ,CPU Targets Byte Offset 741 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO740  ,CPU Targets Byte Offset 740 "
group.long 0xAE8++0x03
line.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO747  ,CPU Targets Byte Offset 747 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO746  ,CPU Targets Byte Offset 746 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO745  ,CPU Targets Byte Offset 745 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO744  ,CPU Targets Byte Offset 744 "
group.long 0xAEC++0x03
line.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO751  ,CPU Targets Byte Offset 751 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO750  ,CPU Targets Byte Offset 750 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO749  ,CPU Targets Byte Offset 749 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO748  ,CPU Targets Byte Offset 748 "
group.long 0xAF0++0x03
line.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO755  ,CPU Targets Byte Offset 755 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO754  ,CPU Targets Byte Offset 754 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO753  ,CPU Targets Byte Offset 753 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO752  ,CPU Targets Byte Offset 752 "
group.long 0xAF4++0x03
line.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO759  ,CPU Targets Byte Offset 759 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO758  ,CPU Targets Byte Offset 758 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO757  ,CPU Targets Byte Offset 757 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO756  ,CPU Targets Byte Offset 756 "
group.long 0xAF8++0x03
line.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO763  ,CPU Targets Byte Offset 763 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO762  ,CPU Targets Byte Offset 762 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO761  ,CPU Targets Byte Offset 761 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO760  ,CPU Targets Byte Offset 760 "
group.long 0xAFC++0x03
line.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO767  ,CPU Targets Byte Offset 767 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO766  ,CPU Targets Byte Offset 766 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO765  ,CPU Targets Byte Offset 765 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO764  ,CPU Targets Byte Offset 764 "
else
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xB00++0x03
line.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO771  ,CPU Targets Byte Offset 771 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO770  ,CPU Targets Byte Offset 770 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO769  ,CPU Targets Byte Offset 769 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO768  ,CPU Targets Byte Offset 768 "
group.long 0xB04++0x03
line.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO775  ,CPU Targets Byte Offset 775 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO774  ,CPU Targets Byte Offset 774 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO773  ,CPU Targets Byte Offset 773 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO772  ,CPU Targets Byte Offset 772 "
group.long 0xB08++0x03
line.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO779  ,CPU Targets Byte Offset 779 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO778  ,CPU Targets Byte Offset 778 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO777  ,CPU Targets Byte Offset 777 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO776  ,CPU Targets Byte Offset 776 "
group.long 0xB0C++0x03
line.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO783  ,CPU Targets Byte Offset 783 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO782  ,CPU Targets Byte Offset 782 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO781  ,CPU Targets Byte Offset 781 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO780  ,CPU Targets Byte Offset 780 "
group.long 0xB10++0x03
line.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO787  ,CPU Targets Byte Offset 787 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO786  ,CPU Targets Byte Offset 786 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO785  ,CPU Targets Byte Offset 785 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO784  ,CPU Targets Byte Offset 784 "
group.long 0xB14++0x03
line.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO791  ,CPU Targets Byte Offset 791 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO790  ,CPU Targets Byte Offset 790 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO789  ,CPU Targets Byte Offset 789 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO788  ,CPU Targets Byte Offset 788 "
group.long 0xB18++0x03
line.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO795  ,CPU Targets Byte Offset 795 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO794  ,CPU Targets Byte Offset 794 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO793  ,CPU Targets Byte Offset 793 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO792  ,CPU Targets Byte Offset 792 "
group.long 0xB1C++0x03
line.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO799  ,CPU Targets Byte Offset 799 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO798  ,CPU Targets Byte Offset 798 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO797  ,CPU Targets Byte Offset 797 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO796  ,CPU Targets Byte Offset 796 "
else
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xB20++0x03
line.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO803  ,CPU Targets Byte Offset 803 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO802  ,CPU Targets Byte Offset 802 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO801  ,CPU Targets Byte Offset 801 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO800  ,CPU Targets Byte Offset 800 "
group.long 0xB24++0x03
line.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO807  ,CPU Targets Byte Offset 807 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO806  ,CPU Targets Byte Offset 806 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO805  ,CPU Targets Byte Offset 805 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO804  ,CPU Targets Byte Offset 804 "
group.long 0xB28++0x03
line.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO811  ,CPU Targets Byte Offset 811 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO810  ,CPU Targets Byte Offset 810 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO809  ,CPU Targets Byte Offset 809 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO808  ,CPU Targets Byte Offset 808 "
group.long 0xB2C++0x03
line.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO815  ,CPU Targets Byte Offset 815 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO814  ,CPU Targets Byte Offset 814 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO813  ,CPU Targets Byte Offset 813 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO812  ,CPU Targets Byte Offset 812 "
group.long 0xB30++0x03
line.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO819  ,CPU Targets Byte Offset 819 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO818  ,CPU Targets Byte Offset 818 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO817  ,CPU Targets Byte Offset 817 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO816  ,CPU Targets Byte Offset 816 "
group.long 0xB34++0x03
line.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO823  ,CPU Targets Byte Offset 823 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO822  ,CPU Targets Byte Offset 822 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO821  ,CPU Targets Byte Offset 821 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO820  ,CPU Targets Byte Offset 820 "
group.long 0xB38++0x03
line.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO827  ,CPU Targets Byte Offset 827 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO826  ,CPU Targets Byte Offset 826 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO825  ,CPU Targets Byte Offset 825 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO824  ,CPU Targets Byte Offset 824 "
group.long 0xB3C++0x03
line.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO831  ,CPU Targets Byte Offset 831 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO830  ,CPU Targets Byte Offset 830 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO829  ,CPU Targets Byte Offset 829 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO828  ,CPU Targets Byte Offset 828 "
else
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xB40++0x03
line.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO835  ,CPU Targets Byte Offset 835 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO834  ,CPU Targets Byte Offset 834 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO833  ,CPU Targets Byte Offset 833 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO832  ,CPU Targets Byte Offset 832 "
group.long 0xB44++0x03
line.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO839  ,CPU Targets Byte Offset 839 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO838  ,CPU Targets Byte Offset 838 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO837  ,CPU Targets Byte Offset 837 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO836  ,CPU Targets Byte Offset 836 "
group.long 0xB48++0x03
line.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO843  ,CPU Targets Byte Offset 843 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO842  ,CPU Targets Byte Offset 842 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO841  ,CPU Targets Byte Offset 841 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO840  ,CPU Targets Byte Offset 840 "
group.long 0xB4C++0x03
line.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO847  ,CPU Targets Byte Offset 847 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO846  ,CPU Targets Byte Offset 846 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO845  ,CPU Targets Byte Offset 845 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO844  ,CPU Targets Byte Offset 844 "
group.long 0xB50++0x03
line.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO851  ,CPU Targets Byte Offset 851 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO850  ,CPU Targets Byte Offset 850 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO849  ,CPU Targets Byte Offset 849 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO848  ,CPU Targets Byte Offset 848 "
group.long 0xB54++0x03
line.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO855  ,CPU Targets Byte Offset 855 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO854  ,CPU Targets Byte Offset 854 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO853  ,CPU Targets Byte Offset 853 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO852  ,CPU Targets Byte Offset 852 "
group.long 0xB58++0x03
line.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO859  ,CPU Targets Byte Offset 859 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO858  ,CPU Targets Byte Offset 858 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO857  ,CPU Targets Byte Offset 857 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO856  ,CPU Targets Byte Offset 856 "
group.long 0xB5C++0x03
line.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO863  ,CPU Targets Byte Offset 863 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO862  ,CPU Targets Byte Offset 862 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO861  ,CPU Targets Byte Offset 861 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO860  ,CPU Targets Byte Offset 860 "
else
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xB60++0x03
line.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO867  ,CPU Targets Byte Offset 867 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO866  ,CPU Targets Byte Offset 866 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO865  ,CPU Targets Byte Offset 865 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO864  ,CPU Targets Byte Offset 864 "
group.long 0xB64++0x03
line.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO871  ,CPU Targets Byte Offset 871 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO870  ,CPU Targets Byte Offset 870 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO869  ,CPU Targets Byte Offset 869 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO868  ,CPU Targets Byte Offset 868 "
group.long 0xB68++0x03
line.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO875  ,CPU Targets Byte Offset 875 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO874  ,CPU Targets Byte Offset 874 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO873  ,CPU Targets Byte Offset 873 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO872  ,CPU Targets Byte Offset 872 "
group.long 0xB6C++0x03
line.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO879  ,CPU Targets Byte Offset 879 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO878  ,CPU Targets Byte Offset 878 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO877  ,CPU Targets Byte Offset 877 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO876  ,CPU Targets Byte Offset 876 "
group.long 0xB70++0x03
line.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO883  ,CPU Targets Byte Offset 883 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO882  ,CPU Targets Byte Offset 882 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO881  ,CPU Targets Byte Offset 881 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO880  ,CPU Targets Byte Offset 880 "
group.long 0xB74++0x03
line.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO887  ,CPU Targets Byte Offset 887 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO886  ,CPU Targets Byte Offset 886 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO885  ,CPU Targets Byte Offset 885 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO884  ,CPU Targets Byte Offset 884 "
group.long 0xB78++0x03
line.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO891  ,CPU Targets Byte Offset 891 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO890  ,CPU Targets Byte Offset 890 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO889  ,CPU Targets Byte Offset 889 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO888  ,CPU Targets Byte Offset 888 "
group.long 0xB7C++0x03
line.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO895  ,CPU Targets Byte Offset 895 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO894  ,CPU Targets Byte Offset 894 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO893  ,CPU Targets Byte Offset 893 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO892  ,CPU Targets Byte Offset 892 "
else
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xB80++0x03
line.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO899  ,CPU Targets Byte Offset 899 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO898  ,CPU Targets Byte Offset 898 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO897  ,CPU Targets Byte Offset 897 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO896  ,CPU Targets Byte Offset 896 "
group.long 0xB84++0x03
line.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO903  ,CPU Targets Byte Offset 903 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO902  ,CPU Targets Byte Offset 902 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO901  ,CPU Targets Byte Offset 901 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO900  ,CPU Targets Byte Offset 900 "
group.long 0xB88++0x03
line.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO907  ,CPU Targets Byte Offset 907 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO906  ,CPU Targets Byte Offset 906 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO905  ,CPU Targets Byte Offset 905 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO904  ,CPU Targets Byte Offset 904 "
group.long 0xB8C++0x03
line.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO911  ,CPU Targets Byte Offset 911 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO910  ,CPU Targets Byte Offset 910 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO909  ,CPU Targets Byte Offset 909 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO908  ,CPU Targets Byte Offset 908 "
group.long 0xB90++0x03
line.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO915  ,CPU Targets Byte Offset 915 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO914  ,CPU Targets Byte Offset 914 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO913  ,CPU Targets Byte Offset 913 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO912  ,CPU Targets Byte Offset 912 "
group.long 0xB94++0x03
line.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO919  ,CPU Targets Byte Offset 919 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO918  ,CPU Targets Byte Offset 918 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO917  ,CPU Targets Byte Offset 917 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO916  ,CPU Targets Byte Offset 916 "
group.long 0xB98++0x03
line.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO923  ,CPU Targets Byte Offset 923 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO922  ,CPU Targets Byte Offset 922 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO921  ,CPU Targets Byte Offset 921 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO920  ,CPU Targets Byte Offset 920 "
group.long 0xB9C++0x03
line.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO927  ,CPU Targets Byte Offset 927 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO926  ,CPU Targets Byte Offset 926 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO925  ,CPU Targets Byte Offset 925 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO924  ,CPU Targets Byte Offset 924 "
else
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xBA0++0x03
line.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO931  ,CPU Targets Byte Offset 931 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO930  ,CPU Targets Byte Offset 930 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO929  ,CPU Targets Byte Offset 929 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO928  ,CPU Targets Byte Offset 928 "
group.long 0xBA4++0x03
line.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO935  ,CPU Targets Byte Offset 935 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO934  ,CPU Targets Byte Offset 934 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO933  ,CPU Targets Byte Offset 933 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO932  ,CPU Targets Byte Offset 932 "
group.long 0xBA8++0x03
line.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO939  ,CPU Targets Byte Offset 939 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO938  ,CPU Targets Byte Offset 938 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO937  ,CPU Targets Byte Offset 937 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO936  ,CPU Targets Byte Offset 936 "
group.long 0xBAC++0x03
line.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO943  ,CPU Targets Byte Offset 943 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO942  ,CPU Targets Byte Offset 942 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO941  ,CPU Targets Byte Offset 941 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO940  ,CPU Targets Byte Offset 940 "
group.long 0xBB0++0x03
line.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO947  ,CPU Targets Byte Offset 947 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO946  ,CPU Targets Byte Offset 946 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO945  ,CPU Targets Byte Offset 945 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO944  ,CPU Targets Byte Offset 944 "
group.long 0xBB4++0x03
line.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO951  ,CPU Targets Byte Offset 951 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO950  ,CPU Targets Byte Offset 950 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO949  ,CPU Targets Byte Offset 949 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO948  ,CPU Targets Byte Offset 948 "
group.long 0xBB8++0x03
line.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO955  ,CPU Targets Byte Offset 955 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO954  ,CPU Targets Byte Offset 954 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO953  ,CPU Targets Byte Offset 953 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO952  ,CPU Targets Byte Offset 952 "
group.long 0xBBC++0x03
line.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO959  ,CPU Targets Byte Offset 959 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO958  ,CPU Targets Byte Offset 958 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO957  ,CPU Targets Byte Offset 957 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO956  ,CPU Targets Byte Offset 956 "
else
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xBC0++0x03
line.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO963  ,CPU Targets Byte Offset 963 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO962  ,CPU Targets Byte Offset 962 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO961  ,CPU Targets Byte Offset 961 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO960  ,CPU Targets Byte Offset 960 "
group.long 0xBC4++0x03
line.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO967  ,CPU Targets Byte Offset 967 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO966  ,CPU Targets Byte Offset 966 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO965  ,CPU Targets Byte Offset 965 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO964  ,CPU Targets Byte Offset 964 "
group.long 0xBC8++0x03
line.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO971  ,CPU Targets Byte Offset 971 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO970  ,CPU Targets Byte Offset 970 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO969  ,CPU Targets Byte Offset 969 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO968  ,CPU Targets Byte Offset 968 "
group.long 0xBCC++0x03
line.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO975  ,CPU Targets Byte Offset 975 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO974  ,CPU Targets Byte Offset 974 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO973  ,CPU Targets Byte Offset 973 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO972  ,CPU Targets Byte Offset 972 "
group.long 0xBD0++0x03
line.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO979  ,CPU Targets Byte Offset 979 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO978  ,CPU Targets Byte Offset 978 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO977  ,CPU Targets Byte Offset 977 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO976  ,CPU Targets Byte Offset 976 "
group.long 0xBD4++0x03
line.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO983  ,CPU Targets Byte Offset 983 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO982  ,CPU Targets Byte Offset 982 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO981  ,CPU Targets Byte Offset 981 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO980  ,CPU Targets Byte Offset 980 "
group.long 0xBD8++0x03
line.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO987  ,CPU Targets Byte Offset 987 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO986  ,CPU Targets Byte Offset 986 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO985  ,CPU Targets Byte Offset 985 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO984  ,CPU Targets Byte Offset 984 "
group.long 0xBDC++0x03
line.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
hexmask.long.byte 0x00 24.--31. 1. " CPUTBO991  ,CPU Targets Byte Offset 991 "
hexmask.long.byte 0x00 16.--23. 1. "  CPUTBO990  ,CPU Targets Byte Offset 990 "
hexmask.long.byte 0x00 8.--15. 1. "  CPUTBO989  ,CPU Targets Byte Offset 989 "
hexmask.long.byte 0x00 0.--7. 1. "  CPUTBO988  ,CPU Targets Byte Offset 988 "
else
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
else
hgroup.long 0x800++0x03
hide.long 0x00 "GICD_ITARGETSR0  ,Interrupt Processor Targets Register 0  "
hgroup.long 0x804++0x03
hide.long 0x00 "GICD_ITARGETSR1  ,Interrupt Processor Targets Register 1  "
hgroup.long 0x808++0x03
hide.long 0x00 "GICD_ITARGETSR2  ,Interrupt Processor Targets Register 2  "
hgroup.long 0x80C++0x03
hide.long 0x00 "GICD_ITARGETSR3  ,Interrupt Processor Targets Register 3  "
hgroup.long 0x810++0x03
hide.long 0x00 "GICD_ITARGETSR4  ,Interrupt Processor Targets Register 4  "
hgroup.long 0x814++0x03
hide.long 0x00 "GICD_ITARGETSR5  ,Interrupt Processor Targets Register 5  "
hgroup.long 0x818++0x03
hide.long 0x00 "GICD_ITARGETSR6  ,Interrupt Processor Targets Register 6  "
hgroup.long 0x81C++0x03
hide.long 0x00 "GICD_ITARGETSR7  ,Interrupt Processor Targets Register 7  "
hgroup.long 0x820++0x03
hide.long 0x00 "GICD_ITARGETSR8  ,Interrupt Processor Targets Register 8  "
hgroup.long 0x824++0x03
hide.long 0x00 "GICD_ITARGETSR9  ,Interrupt Processor Targets Register 9  "
hgroup.long 0x828++0x03
hide.long 0x00 "GICD_ITARGETSR10 ,Interrupt Processor Targets Register 10 "
hgroup.long 0x82C++0x03
hide.long 0x00 "GICD_ITARGETSR11 ,Interrupt Processor Targets Register 11 "
hgroup.long 0x830++0x03
hide.long 0x00 "GICD_ITARGETSR12 ,Interrupt Processor Targets Register 12 "
hgroup.long 0x834++0x03
hide.long 0x00 "GICD_ITARGETSR13 ,Interrupt Processor Targets Register 13 "
hgroup.long 0x838++0x03
hide.long 0x00 "GICD_ITARGETSR14 ,Interrupt Processor Targets Register 14 "
hgroup.long 0x83C++0x03
hide.long 0x00 "GICD_ITARGETSR15 ,Interrupt Processor Targets Register 15 "
hgroup.long 0x840++0x03
hide.long 0x00 "GICD_ITARGETSR16 ,Interrupt Processor Targets Register 16 "
hgroup.long 0x844++0x03
hide.long 0x00 "GICD_ITARGETSR17 ,Interrupt Processor Targets Register 17 "
hgroup.long 0x848++0x03
hide.long 0x00 "GICD_ITARGETSR18 ,Interrupt Processor Targets Register 18 "
hgroup.long 0x84C++0x03
hide.long 0x00 "GICD_ITARGETSR19 ,Interrupt Processor Targets Register 19 "
hgroup.long 0x850++0x03
hide.long 0x00 "GICD_ITARGETSR20 ,Interrupt Processor Targets Register 20 "
hgroup.long 0x854++0x03
hide.long 0x00 "GICD_ITARGETSR21 ,Interrupt Processor Targets Register 21 "
hgroup.long 0x858++0x03
hide.long 0x00 "GICD_ITARGETSR22 ,Interrupt Processor Targets Register 22 "
hgroup.long 0x85C++0x03
hide.long 0x00 "GICD_ITARGETSR23 ,Interrupt Processor Targets Register 23 "
hgroup.long 0x860++0x03
hide.long 0x00 "GICD_ITARGETSR24 ,Interrupt Processor Targets Register 24 "
hgroup.long 0x864++0x03
hide.long 0x00 "GICD_ITARGETSR25 ,Interrupt Processor Targets Register 25 "
hgroup.long 0x868++0x03
hide.long 0x00 "GICD_ITARGETSR26 ,Interrupt Processor Targets Register 26 "
hgroup.long 0x86C++0x03
hide.long 0x00 "GICD_ITARGETSR27 ,Interrupt Processor Targets Register 27 "
hgroup.long 0x870++0x03
hide.long 0x00 "GICD_ITARGETSR28 ,Interrupt Processor Targets Register 28 "
hgroup.long 0x874++0x03
hide.long 0x00 "GICD_ITARGETSR29 ,Interrupt Processor Targets Register 29 "
hgroup.long 0x878++0x03
hide.long 0x00 "GICD_ITARGETSR30 ,Interrupt Processor Targets Register 30 "
hgroup.long 0x87C++0x03
hide.long 0x00 "GICD_ITARGETSR31 ,Interrupt Processor Targets Register 31 "
hgroup.long 0x880++0x03
hide.long 0x00 "GICD_ITARGETSR32 ,Interrupt Processor Targets Register 32 "
hgroup.long 0x884++0x03
hide.long 0x00 "GICD_ITARGETSR33 ,Interrupt Processor Targets Register 33 "
hgroup.long 0x888++0x03
hide.long 0x00 "GICD_ITARGETSR34 ,Interrupt Processor Targets Register 34 "
hgroup.long 0x88C++0x03
hide.long 0x00 "GICD_ITARGETSR35 ,Interrupt Processor Targets Register 35 "
hgroup.long 0x890++0x03
hide.long 0x00 "GICD_ITARGETSR36 ,Interrupt Processor Targets Register 36 "
hgroup.long 0x894++0x03
hide.long 0x00 "GICD_ITARGETSR37 ,Interrupt Processor Targets Register 37 "
hgroup.long 0x898++0x03
hide.long 0x00 "GICD_ITARGETSR38 ,Interrupt Processor Targets Register 38 "
hgroup.long 0x89C++0x03
hide.long 0x00 "GICD_ITARGETSR39 ,Interrupt Processor Targets Register 39 "
hgroup.long 0x8A0++0x03
hide.long 0x00 "GICD_ITARGETSR40 ,Interrupt Processor Targets Register 40 "
hgroup.long 0x8A4++0x03
hide.long 0x00 "GICD_ITARGETSR41 ,Interrupt Processor Targets Register 41 "
hgroup.long 0x8A8++0x03
hide.long 0x00 "GICD_ITARGETSR42 ,Interrupt Processor Targets Register 42 "
hgroup.long 0x8AC++0x03
hide.long 0x00 "GICD_ITARGETSR43 ,Interrupt Processor Targets Register 43 "
hgroup.long 0x8B0++0x03
hide.long 0x00 "GICD_ITARGETSR44 ,Interrupt Processor Targets Register 44 "
hgroup.long 0x8B4++0x03
hide.long 0x00 "GICD_ITARGETSR45 ,Interrupt Processor Targets Register 45 "
hgroup.long 0x8B8++0x03
hide.long 0x00 "GICD_ITARGETSR46 ,Interrupt Processor Targets Register 46 "
hgroup.long 0x8BC++0x03
hide.long 0x00 "GICD_ITARGETSR47 ,Interrupt Processor Targets Register 47 "
hgroup.long 0x8C0++0x03
hide.long 0x00 "GICD_ITARGETSR48 ,Interrupt Processor Targets Register 48 "
hgroup.long 0x8C4++0x03
hide.long 0x00 "GICD_ITARGETSR49 ,Interrupt Processor Targets Register 49 "
hgroup.long 0x8C8++0x03
hide.long 0x00 "GICD_ITARGETSR50 ,Interrupt Processor Targets Register 50 "
hgroup.long 0x8CC++0x03
hide.long 0x00 "GICD_ITARGETSR51 ,Interrupt Processor Targets Register 51 "
hgroup.long 0x8D0++0x03
hide.long 0x00 "GICD_ITARGETSR52 ,Interrupt Processor Targets Register 52 "
hgroup.long 0x8D4++0x03
hide.long 0x00 "GICD_ITARGETSR53 ,Interrupt Processor Targets Register 53 "
hgroup.long 0x8D8++0x03
hide.long 0x00 "GICD_ITARGETSR54 ,Interrupt Processor Targets Register 54 "
hgroup.long 0x8DC++0x03
hide.long 0x00 "GICD_ITARGETSR55 ,Interrupt Processor Targets Register 55 "
hgroup.long 0x8E0++0x03
hide.long 0x00 "GICD_ITARGETSR56 ,Interrupt Processor Targets Register 56 "
hgroup.long 0x8E4++0x03
hide.long 0x00 "GICD_ITARGETSR57 ,Interrupt Processor Targets Register 57 "
hgroup.long 0x8E8++0x03
hide.long 0x00 "GICD_ITARGETSR58 ,Interrupt Processor Targets Register 58 "
hgroup.long 0x8EC++0x03
hide.long 0x00 "GICD_ITARGETSR59 ,Interrupt Processor Targets Register 59 "
hgroup.long 0x8F0++0x03
hide.long 0x00 "GICD_ITARGETSR60 ,Interrupt Processor Targets Register 60 "
hgroup.long 0x8F4++0x03
hide.long 0x00 "GICD_ITARGETSR61 ,Interrupt Processor Targets Register 61 "
hgroup.long 0x8F8++0x03
hide.long 0x00 "GICD_ITARGETSR62 ,Interrupt Processor Targets Register 62 "
hgroup.long 0x8FC++0x03
hide.long 0x00 "GICD_ITARGETSR63 ,Interrupt Processor Targets Register 63 "
hgroup.long 0x900++0x03
hide.long 0x00 "GICD_ITARGETSR64 ,Interrupt Processor Targets Register 64 "
hgroup.long 0x904++0x03
hide.long 0x00 "GICD_ITARGETSR65 ,Interrupt Processor Targets Register 65 "
hgroup.long 0x908++0x03
hide.long 0x00 "GICD_ITARGETSR66 ,Interrupt Processor Targets Register 66 "
hgroup.long 0x90C++0x03
hide.long 0x00 "GICD_ITARGETSR67 ,Interrupt Processor Targets Register 67 "
hgroup.long 0x910++0x03
hide.long 0x00 "GICD_ITARGETSR68 ,Interrupt Processor Targets Register 68 "
hgroup.long 0x914++0x03
hide.long 0x00 "GICD_ITARGETSR69 ,Interrupt Processor Targets Register 69 "
hgroup.long 0x918++0x03
hide.long 0x00 "GICD_ITARGETSR70 ,Interrupt Processor Targets Register 70 "
hgroup.long 0x91C++0x03
hide.long 0x00 "GICD_ITARGETSR71 ,Interrupt Processor Targets Register 71 "
hgroup.long 0x920++0x03
hide.long 0x00 "GICD_ITARGETSR72 ,Interrupt Processor Targets Register 72 "
hgroup.long 0x924++0x03
hide.long 0x00 "GICD_ITARGETSR73 ,Interrupt Processor Targets Register 73 "
hgroup.long 0x928++0x03
hide.long 0x00 "GICD_ITARGETSR74 ,Interrupt Processor Targets Register 74 "
hgroup.long 0x92C++0x03
hide.long 0x00 "GICD_ITARGETSR75 ,Interrupt Processor Targets Register 75 "
hgroup.long 0x930++0x03
hide.long 0x00 "GICD_ITARGETSR76 ,Interrupt Processor Targets Register 76 "
hgroup.long 0x934++0x03
hide.long 0x00 "GICD_ITARGETSR77 ,Interrupt Processor Targets Register 77 "
hgroup.long 0x938++0x03
hide.long 0x00 "GICD_ITARGETSR78 ,Interrupt Processor Targets Register 78 "
hgroup.long 0x93C++0x03
hide.long 0x00 "GICD_ITARGETSR79 ,Interrupt Processor Targets Register 79 "
hgroup.long 0x940++0x03
hide.long 0x00 "GICD_ITARGETSR80 ,Interrupt Processor Targets Register 80 "
hgroup.long 0x944++0x03
hide.long 0x00 "GICD_ITARGETSR81 ,Interrupt Processor Targets Register 81 "
hgroup.long 0x948++0x03
hide.long 0x00 "GICD_ITARGETSR82 ,Interrupt Processor Targets Register 82 "
hgroup.long 0x94C++0x03
hide.long 0x00 "GICD_ITARGETSR83 ,Interrupt Processor Targets Register 83 "
hgroup.long 0x950++0x03
hide.long 0x00 "GICD_ITARGETSR84 ,Interrupt Processor Targets Register 84 "
hgroup.long 0x954++0x03
hide.long 0x00 "GICD_ITARGETSR85 ,Interrupt Processor Targets Register 85 "
hgroup.long 0x958++0x03
hide.long 0x00 "GICD_ITARGETSR86 ,Interrupt Processor Targets Register 86 "
hgroup.long 0x95C++0x03
hide.long 0x00 "GICD_ITARGETSR87 ,Interrupt Processor Targets Register 87 "
hgroup.long 0x960++0x03
hide.long 0x00 "GICD_ITARGETSR88 ,Interrupt Processor Targets Register 88 "
hgroup.long 0x964++0x03
hide.long 0x00 "GICD_ITARGETSR89 ,Interrupt Processor Targets Register 89 "
hgroup.long 0x968++0x03
hide.long 0x00 "GICD_ITARGETSR90 ,Interrupt Processor Targets Register 90 "
hgroup.long 0x96C++0x03
hide.long 0x00 "GICD_ITARGETSR91 ,Interrupt Processor Targets Register 91 "
hgroup.long 0x970++0x03
hide.long 0x00 "GICD_ITARGETSR92 ,Interrupt Processor Targets Register 92 "
hgroup.long 0x974++0x03
hide.long 0x00 "GICD_ITARGETSR93 ,Interrupt Processor Targets Register 93 "
hgroup.long 0x978++0x03
hide.long 0x00 "GICD_ITARGETSR94 ,Interrupt Processor Targets Register 94 "
hgroup.long 0x97C++0x03
hide.long 0x00 "GICD_ITARGETSR95 ,Interrupt Processor Targets Register 95 "
hgroup.long 0x980++0x03
hide.long 0x00 "GICD_ITARGETSR96 ,Interrupt Processor Targets Register 96 "
hgroup.long 0x984++0x03
hide.long 0x00 "GICD_ITARGETSR97 ,Interrupt Processor Targets Register 97 "
hgroup.long 0x988++0x03
hide.long 0x00 "GICD_ITARGETSR98 ,Interrupt Processor Targets Register 98 "
hgroup.long 0x98C++0x03
hide.long 0x00 "GICD_ITARGETSR99 ,Interrupt Processor Targets Register 99 "
hgroup.long 0x990++0x03
hide.long 0x00 "GICD_ITARGETSR100,Interrupt Processor Targets Register 100"
hgroup.long 0x994++0x03
hide.long 0x00 "GICD_ITARGETSR101,Interrupt Processor Targets Register 101"
hgroup.long 0x998++0x03
hide.long 0x00 "GICD_ITARGETSR102,Interrupt Processor Targets Register 102"
hgroup.long 0x99C++0x03
hide.long 0x00 "GICD_ITARGETSR103,Interrupt Processor Targets Register 103"
hgroup.long 0x9A0++0x03
hide.long 0x00 "GICD_ITARGETSR104,Interrupt Processor Targets Register 104"
hgroup.long 0x9A4++0x03
hide.long 0x00 "GICD_ITARGETSR105,Interrupt Processor Targets Register 105"
hgroup.long 0x9A8++0x03
hide.long 0x00 "GICD_ITARGETSR106,Interrupt Processor Targets Register 106"
hgroup.long 0x9AC++0x03
hide.long 0x00 "GICD_ITARGETSR107,Interrupt Processor Targets Register 107"
hgroup.long 0x9B0++0x03
hide.long 0x00 "GICD_ITARGETSR108,Interrupt Processor Targets Register 108"
hgroup.long 0x9B4++0x03
hide.long 0x00 "GICD_ITARGETSR109,Interrupt Processor Targets Register 109"
hgroup.long 0x9B8++0x03
hide.long 0x00 "GICD_ITARGETSR110,Interrupt Processor Targets Register 110"
hgroup.long 0x9BC++0x03
hide.long 0x00 "GICD_ITARGETSR111,Interrupt Processor Targets Register 111"
hgroup.long 0x9C0++0x03
hide.long 0x00 "GICD_ITARGETSR112,Interrupt Processor Targets Register 112"
hgroup.long 0x9C4++0x03
hide.long 0x00 "GICD_ITARGETSR113,Interrupt Processor Targets Register 113"
hgroup.long 0x9C8++0x03
hide.long 0x00 "GICD_ITARGETSR114,Interrupt Processor Targets Register 114"
hgroup.long 0x9CC++0x03
hide.long 0x00 "GICD_ITARGETSR115,Interrupt Processor Targets Register 115"
hgroup.long 0x9D0++0x03
hide.long 0x00 "GICD_ITARGETSR116,Interrupt Processor Targets Register 116"
hgroup.long 0x9D4++0x03
hide.long 0x00 "GICD_ITARGETSR117,Interrupt Processor Targets Register 117"
hgroup.long 0x9D8++0x03
hide.long 0x00 "GICD_ITARGETSR118,Interrupt Processor Targets Register 118"
hgroup.long 0x9DC++0x03
hide.long 0x00 "GICD_ITARGETSR119,Interrupt Processor Targets Register 119"
hgroup.long 0x9E0++0x03
hide.long 0x00 "GICD_ITARGETSR120,Interrupt Processor Targets Register 120"
hgroup.long 0x9E4++0x03
hide.long 0x00 "GICD_ITARGETSR121,Interrupt Processor Targets Register 121"
hgroup.long 0x9E8++0x03
hide.long 0x00 "GICD_ITARGETSR122,Interrupt Processor Targets Register 122"
hgroup.long 0x9EC++0x03
hide.long 0x00 "GICD_ITARGETSR123,Interrupt Processor Targets Register 123"
hgroup.long 0x9F0++0x03
hide.long 0x00 "GICD_ITARGETSR124,Interrupt Processor Targets Register 124"
hgroup.long 0x9F4++0x03
hide.long 0x00 "GICD_ITARGETSR125,Interrupt Processor Targets Register 125"
hgroup.long 0x9F8++0x03
hide.long 0x00 "GICD_ITARGETSR126,Interrupt Processor Targets Register 126"
hgroup.long 0x9FC++0x03
hide.long 0x00 "GICD_ITARGETSR127,Interrupt Processor Targets Register 127"
hgroup.long 0xA00++0x03
hide.long 0x00 "GICD_ITARGETSR128,Interrupt Processor Targets Register 128"
hgroup.long 0xA04++0x03
hide.long 0x00 "GICD_ITARGETSR129,Interrupt Processor Targets Register 129"
hgroup.long 0xA08++0x03
hide.long 0x00 "GICD_ITARGETSR130,Interrupt Processor Targets Register 130"
hgroup.long 0xA0C++0x03
hide.long 0x00 "GICD_ITARGETSR131,Interrupt Processor Targets Register 131"
hgroup.long 0xA10++0x03
hide.long 0x00 "GICD_ITARGETSR132,Interrupt Processor Targets Register 132"
hgroup.long 0xA14++0x03
hide.long 0x00 "GICD_ITARGETSR133,Interrupt Processor Targets Register 133"
hgroup.long 0xA18++0x03
hide.long 0x00 "GICD_ITARGETSR134,Interrupt Processor Targets Register 134"
hgroup.long 0xA1C++0x03
hide.long 0x00 "GICD_ITARGETSR135,Interrupt Processor Targets Register 135"
hgroup.long 0xA20++0x03
hide.long 0x00 "GICD_ITARGETSR136,Interrupt Processor Targets Register 136"
hgroup.long 0xA24++0x03
hide.long 0x00 "GICD_ITARGETSR137,Interrupt Processor Targets Register 137"
hgroup.long 0xA28++0x03
hide.long 0x00 "GICD_ITARGETSR138,Interrupt Processor Targets Register 138"
hgroup.long 0xA2C++0x03
hide.long 0x00 "GICD_ITARGETSR139,Interrupt Processor Targets Register 139"
hgroup.long 0xA30++0x03
hide.long 0x00 "GICD_ITARGETSR140,Interrupt Processor Targets Register 140"
hgroup.long 0xA34++0x03
hide.long 0x00 "GICD_ITARGETSR141,Interrupt Processor Targets Register 141"
hgroup.long 0xA38++0x03
hide.long 0x00 "GICD_ITARGETSR142,Interrupt Processor Targets Register 142"
hgroup.long 0xA3C++0x03
hide.long 0x00 "GICD_ITARGETSR143,Interrupt Processor Targets Register 143"
hgroup.long 0xA40++0x03
hide.long 0x00 "GICD_ITARGETSR144,Interrupt Processor Targets Register 144"
hgroup.long 0xA44++0x03
hide.long 0x00 "GICD_ITARGETSR145,Interrupt Processor Targets Register 145"
hgroup.long 0xA48++0x03
hide.long 0x00 "GICD_ITARGETSR146,Interrupt Processor Targets Register 146"
hgroup.long 0xA4C++0x03
hide.long 0x00 "GICD_ITARGETSR147,Interrupt Processor Targets Register 147"
hgroup.long 0xA50++0x03
hide.long 0x00 "GICD_ITARGETSR148,Interrupt Processor Targets Register 148"
hgroup.long 0xA54++0x03
hide.long 0x00 "GICD_ITARGETSR149,Interrupt Processor Targets Register 149"
hgroup.long 0xA58++0x03
hide.long 0x00 "GICD_ITARGETSR150,Interrupt Processor Targets Register 150"
hgroup.long 0xA5C++0x03
hide.long 0x00 "GICD_ITARGETSR151,Interrupt Processor Targets Register 151"
hgroup.long 0xA60++0x03
hide.long 0x00 "GICD_ITARGETSR152,Interrupt Processor Targets Register 152"
hgroup.long 0xA64++0x03
hide.long 0x00 "GICD_ITARGETSR153,Interrupt Processor Targets Register 153"
hgroup.long 0xA68++0x03
hide.long 0x00 "GICD_ITARGETSR154,Interrupt Processor Targets Register 154"
hgroup.long 0xA6C++0x03
hide.long 0x00 "GICD_ITARGETSR155,Interrupt Processor Targets Register 155"
hgroup.long 0xA70++0x03
hide.long 0x00 "GICD_ITARGETSR156,Interrupt Processor Targets Register 156"
hgroup.long 0xA74++0x03
hide.long 0x00 "GICD_ITARGETSR157,Interrupt Processor Targets Register 157"
hgroup.long 0xA78++0x03
hide.long 0x00 "GICD_ITARGETSR158,Interrupt Processor Targets Register 158"
hgroup.long 0xA7C++0x03
hide.long 0x00 "GICD_ITARGETSR159,Interrupt Processor Targets Register 159"
hgroup.long 0xA80++0x03
hide.long 0x00 "GICD_ITARGETSR160,Interrupt Processor Targets Register 160"
hgroup.long 0xA84++0x03
hide.long 0x00 "GICD_ITARGETSR161,Interrupt Processor Targets Register 161"
hgroup.long 0xA88++0x03
hide.long 0x00 "GICD_ITARGETSR162,Interrupt Processor Targets Register 162"
hgroup.long 0xA8C++0x03
hide.long 0x00 "GICD_ITARGETSR163,Interrupt Processor Targets Register 163"
hgroup.long 0xA90++0x03
hide.long 0x00 "GICD_ITARGETSR164,Interrupt Processor Targets Register 164"
hgroup.long 0xA94++0x03
hide.long 0x00 "GICD_ITARGETSR165,Interrupt Processor Targets Register 165"
hgroup.long 0xA98++0x03
hide.long 0x00 "GICD_ITARGETSR166,Interrupt Processor Targets Register 166"
hgroup.long 0xA9C++0x03
hide.long 0x00 "GICD_ITARGETSR167,Interrupt Processor Targets Register 167"
hgroup.long 0xAA0++0x03
hide.long 0x00 "GICD_ITARGETSR168,Interrupt Processor Targets Register 168"
hgroup.long 0xAA4++0x03
hide.long 0x00 "GICD_ITARGETSR169,Interrupt Processor Targets Register 169"
hgroup.long 0xAA8++0x03
hide.long 0x00 "GICD_ITARGETSR170,Interrupt Processor Targets Register 170"
hgroup.long 0xAAC++0x03
hide.long 0x00 "GICD_ITARGETSR171,Interrupt Processor Targets Register 171"
hgroup.long 0xAB0++0x03
hide.long 0x00 "GICD_ITARGETSR172,Interrupt Processor Targets Register 172"
hgroup.long 0xAB4++0x03
hide.long 0x00 "GICD_ITARGETSR173,Interrupt Processor Targets Register 173"
hgroup.long 0xAB8++0x03
hide.long 0x00 "GICD_ITARGETSR174,Interrupt Processor Targets Register 174"
hgroup.long 0xABC++0x03
hide.long 0x00 "GICD_ITARGETSR175,Interrupt Processor Targets Register 175"
hgroup.long 0xAC0++0x03
hide.long 0x00 "GICD_ITARGETSR176,Interrupt Processor Targets Register 176"
hgroup.long 0xAC4++0x03
hide.long 0x00 "GICD_ITARGETSR177,Interrupt Processor Targets Register 177"
hgroup.long 0xAC8++0x03
hide.long 0x00 "GICD_ITARGETSR178,Interrupt Processor Targets Register 178"
hgroup.long 0xACC++0x03
hide.long 0x00 "GICD_ITARGETSR179,Interrupt Processor Targets Register 179"
hgroup.long 0xAD0++0x03
hide.long 0x00 "GICD_ITARGETSR180,Interrupt Processor Targets Register 180"
hgroup.long 0xAD4++0x03
hide.long 0x00 "GICD_ITARGETSR181,Interrupt Processor Targets Register 181"
hgroup.long 0xAD8++0x03
hide.long 0x00 "GICD_ITARGETSR182,Interrupt Processor Targets Register 182"
hgroup.long 0xADC++0x03
hide.long 0x00 "GICD_ITARGETSR183,Interrupt Processor Targets Register 183"
hgroup.long 0xAE0++0x03
hide.long 0x00 "GICD_ITARGETSR184,Interrupt Processor Targets Register 184"
hgroup.long 0xAE4++0x03
hide.long 0x00 "GICD_ITARGETSR185,Interrupt Processor Targets Register 185"
hgroup.long 0xAE8++0x03
hide.long 0x00 "GICD_ITARGETSR186,Interrupt Processor Targets Register 186"
hgroup.long 0xAEC++0x03
hide.long 0x00 "GICD_ITARGETSR187,Interrupt Processor Targets Register 187"
hgroup.long 0xAF0++0x03
hide.long 0x00 "GICD_ITARGETSR188,Interrupt Processor Targets Register 188"
hgroup.long 0xAF4++0x03
hide.long 0x00 "GICD_ITARGETSR189,Interrupt Processor Targets Register 189"
hgroup.long 0xAF8++0x03
hide.long 0x00 "GICD_ITARGETSR190,Interrupt Processor Targets Register 190"
hgroup.long 0xAFC++0x03
hide.long 0x00 "GICD_ITARGETSR191,Interrupt Processor Targets Register 191"
hgroup.long 0xB00++0x03
hide.long 0x00 "GICD_ITARGETSR192,Interrupt Processor Targets Register 192"
hgroup.long 0xB04++0x03
hide.long 0x00 "GICD_ITARGETSR193,Interrupt Processor Targets Register 193"
hgroup.long 0xB08++0x03
hide.long 0x00 "GICD_ITARGETSR194,Interrupt Processor Targets Register 194"
hgroup.long 0xB0C++0x03
hide.long 0x00 "GICD_ITARGETSR195,Interrupt Processor Targets Register 195"
hgroup.long 0xB10++0x03
hide.long 0x00 "GICD_ITARGETSR196,Interrupt Processor Targets Register 196"
hgroup.long 0xB14++0x03
hide.long 0x00 "GICD_ITARGETSR197,Interrupt Processor Targets Register 197"
hgroup.long 0xB18++0x03
hide.long 0x00 "GICD_ITARGETSR198,Interrupt Processor Targets Register 198"
hgroup.long 0xB1C++0x03
hide.long 0x00 "GICD_ITARGETSR199,Interrupt Processor Targets Register 199"
hgroup.long 0xB20++0x03
hide.long 0x00 "GICD_ITARGETSR200,Interrupt Processor Targets Register 200"
hgroup.long 0xB24++0x03
hide.long 0x00 "GICD_ITARGETSR201,Interrupt Processor Targets Register 201"
hgroup.long 0xB28++0x03
hide.long 0x00 "GICD_ITARGETSR202,Interrupt Processor Targets Register 202"
hgroup.long 0xB2C++0x03
hide.long 0x00 "GICD_ITARGETSR203,Interrupt Processor Targets Register 203"
hgroup.long 0xB30++0x03
hide.long 0x00 "GICD_ITARGETSR204,Interrupt Processor Targets Register 204"
hgroup.long 0xB34++0x03
hide.long 0x00 "GICD_ITARGETSR205,Interrupt Processor Targets Register 205"
hgroup.long 0xB38++0x03
hide.long 0x00 "GICD_ITARGETSR206,Interrupt Processor Targets Register 206"
hgroup.long 0xB3C++0x03
hide.long 0x00 "GICD_ITARGETSR207,Interrupt Processor Targets Register 207"
hgroup.long 0xB40++0x03
hide.long 0x00 "GICD_ITARGETSR208,Interrupt Processor Targets Register 208"
hgroup.long 0xB44++0x03
hide.long 0x00 "GICD_ITARGETSR209,Interrupt Processor Targets Register 209"
hgroup.long 0xB48++0x03
hide.long 0x00 "GICD_ITARGETSR210,Interrupt Processor Targets Register 210"
hgroup.long 0xB4C++0x03
hide.long 0x00 "GICD_ITARGETSR211,Interrupt Processor Targets Register 211"
hgroup.long 0xB50++0x03
hide.long 0x00 "GICD_ITARGETSR212,Interrupt Processor Targets Register 212"
hgroup.long 0xB54++0x03
hide.long 0x00 "GICD_ITARGETSR213,Interrupt Processor Targets Register 213"
hgroup.long 0xB58++0x03
hide.long 0x00 "GICD_ITARGETSR214,Interrupt Processor Targets Register 214"
hgroup.long 0xB5C++0x03
hide.long 0x00 "GICD_ITARGETSR215,Interrupt Processor Targets Register 215"
hgroup.long 0xB60++0x03
hide.long 0x00 "GICD_ITARGETSR216,Interrupt Processor Targets Register 216"
hgroup.long 0xB64++0x03
hide.long 0x00 "GICD_ITARGETSR217,Interrupt Processor Targets Register 217"
hgroup.long 0xB68++0x03
hide.long 0x00 "GICD_ITARGETSR218,Interrupt Processor Targets Register 218"
hgroup.long 0xB6C++0x03
hide.long 0x00 "GICD_ITARGETSR219,Interrupt Processor Targets Register 219"
hgroup.long 0xB70++0x03
hide.long 0x00 "GICD_ITARGETSR220,Interrupt Processor Targets Register 220"
hgroup.long 0xB74++0x03
hide.long 0x00 "GICD_ITARGETSR221,Interrupt Processor Targets Register 221"
hgroup.long 0xB78++0x03
hide.long 0x00 "GICD_ITARGETSR222,Interrupt Processor Targets Register 222"
hgroup.long 0xB7C++0x03
hide.long 0x00 "GICD_ITARGETSR223,Interrupt Processor Targets Register 223"
hgroup.long 0xB80++0x03
hide.long 0x00 "GICD_ITARGETSR224,Interrupt Processor Targets Register 224"
hgroup.long 0xB84++0x03
hide.long 0x00 "GICD_ITARGETSR225,Interrupt Processor Targets Register 225"
hgroup.long 0xB88++0x03
hide.long 0x00 "GICD_ITARGETSR226,Interrupt Processor Targets Register 226"
hgroup.long 0xB8C++0x03
hide.long 0x00 "GICD_ITARGETSR227,Interrupt Processor Targets Register 227"
hgroup.long 0xB90++0x03
hide.long 0x00 "GICD_ITARGETSR228,Interrupt Processor Targets Register 228"
hgroup.long 0xB94++0x03
hide.long 0x00 "GICD_ITARGETSR229,Interrupt Processor Targets Register 229"
hgroup.long 0xB98++0x03
hide.long 0x00 "GICD_ITARGETSR230,Interrupt Processor Targets Register 230"
hgroup.long 0xB9C++0x03
hide.long 0x00 "GICD_ITARGETSR231,Interrupt Processor Targets Register 231"
hgroup.long 0xBA0++0x03
hide.long 0x00 "GICD_ITARGETSR232,Interrupt Processor Targets Register 232"
hgroup.long 0xBA4++0x03
hide.long 0x00 "GICD_ITARGETSR233,Interrupt Processor Targets Register 233"
hgroup.long 0xBA8++0x03
hide.long 0x00 "GICD_ITARGETSR234,Interrupt Processor Targets Register 234"
hgroup.long 0xBAC++0x03
hide.long 0x00 "GICD_ITARGETSR235,Interrupt Processor Targets Register 235"
hgroup.long 0xBB0++0x03
hide.long 0x00 "GICD_ITARGETSR236,Interrupt Processor Targets Register 236"
hgroup.long 0xBB4++0x03
hide.long 0x00 "GICD_ITARGETSR237,Interrupt Processor Targets Register 237"
hgroup.long 0xBB8++0x03
hide.long 0x00 "GICD_ITARGETSR238,Interrupt Processor Targets Register 238"
hgroup.long 0xBBC++0x03
hide.long 0x00 "GICD_ITARGETSR239,Interrupt Processor Targets Register 239"
hgroup.long 0xBC0++0x03
hide.long 0x00 "GICD_ITARGETSR240,Interrupt Processor Targets Register 240"
hgroup.long 0xBC4++0x03
hide.long 0x00 "GICD_ITARGETSR241,Interrupt Processor Targets Register 241"
hgroup.long 0xBC8++0x03
hide.long 0x00 "GICD_ITARGETSR242,Interrupt Processor Targets Register 242"
hgroup.long 0xBCC++0x03
hide.long 0x00 "GICD_ITARGETSR243,Interrupt Processor Targets Register 243"
hgroup.long 0xBD0++0x03
hide.long 0x00 "GICD_ITARGETSR244,Interrupt Processor Targets Register 244"
hgroup.long 0xBD4++0x03
hide.long 0x00 "GICD_ITARGETSR245,Interrupt Processor Targets Register 245"
hgroup.long 0xBD8++0x03
hide.long 0x00 "GICD_ITARGETSR246,Interrupt Processor Targets Register 246"
hgroup.long 0xBDC++0x03
hide.long 0x00 "GICD_ITARGETSR247,Interrupt Processor Targets Register 247"
endif
tree.end
width 14.
tree "Configuration Registers"
rgroup.long 0xC00++0x03
line.long 0x00 "GICD_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SGI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SGI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SGI)" "Level,Edge"
group.long 0xC04++0x03
line.long 0x00 "GICD_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (PPI)" "Level,Edge"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1)
group.long 0xC08++0x03
line.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC0C++0x03
line.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC08++0x03
hide.long 0x00 "GICD_ICFGR2,Interrupt Configuration Register 2"
hgroup.long 0xC0C++0x03
hide.long 0x00 "GICD_ICFGR3,Interrupt Configuration Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x2)
group.long 0xC10++0x03
line.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC14++0x03
line.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC10++0x03
hide.long 0x00 "GICD_ICFGR4,Interrupt Configuration Register 4"
hgroup.long 0xC14++0x03
hide.long 0x00 "GICD_ICFGR5,Interrupt Configuration Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x3)
group.long 0xC18++0x03
line.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC1C++0x03
line.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC18++0x03
hide.long 0x00 "GICD_ICFGR6,Interrupt Configuration Register 6"
hgroup.long 0xC1C++0x03
hide.long 0x00 "GICD_ICFGR7,Interrupt Configuration Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x4)
group.long 0xC20++0x03
line.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC24++0x03
line.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC20++0x03
hide.long 0x00 "GICD_ICFGR8,Interrupt Configuration Register 8"
hgroup.long 0xC24++0x03
hide.long 0x00 "GICD_ICFGR9,Interrupt Configuration Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x5)
group.long 0xC28++0x03
line.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC2C++0x03
line.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC28++0x03
hide.long 0x00 "GICD_ICFGR10,Interrupt Configuration Register 10"
hgroup.long 0xC2C++0x03
hide.long 0x00 "GICD_ICFGR11,Interrupt Configuration Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x6)
group.long 0xC30++0x03
line.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC34++0x03
line.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC30++0x03
hide.long 0x00 "GICD_ICFGR12,Interrupt Configuration Register 12"
hgroup.long 0xC34++0x03
hide.long 0x00 "GICD_ICFGR13,Interrupt Configuration Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x7)
group.long 0xC38++0x03
line.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC3C++0x03
line.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC38++0x03
hide.long 0x00 "GICD_ICFGR14,Interrupt Configuration Register 14"
hgroup.long 0xC3C++0x03
hide.long 0x00 "GICD_ICFGR15,Interrupt Configuration Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x8)
group.long 0xC40++0x03
line.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC44++0x03
line.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC40++0x03
hide.long 0x00 "GICD_ICFGR16,Interrupt Configuration Register 16"
hgroup.long 0xC44++0x03
hide.long 0x00 "GICD_ICFGR17,Interrupt Configuration Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x9)
group.long 0xC48++0x03
line.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC4C++0x03
line.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC48++0x03
hide.long 0x00 "GICD_ICFGR18,Interrupt Configuration Register 18"
hgroup.long 0xC4C++0x03
hide.long 0x00 "GICD_ICFGR19,Interrupt Configuration Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xA)
group.long 0xC50++0x03
line.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC54++0x03
line.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC50++0x03
hide.long 0x00 "GICD_ICFGR20,Interrupt Configuration Register 20"
hgroup.long 0xC54++0x03
hide.long 0x00 "GICD_ICFGR21,Interrupt Configuration Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xB)
group.long 0xC58++0x03
line.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC5C++0x03
line.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC58++0x03
hide.long 0x00 "GICD_ICFGR22,Interrupt Configuration Register 22"
hgroup.long 0xC5C++0x03
hide.long 0x00 "GICD_ICFGR23,Interrupt Configuration Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xC)
group.long 0xC60++0x03
line.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC64++0x03
line.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC60++0x03
hide.long 0x00 "GICD_ICFGR24,Interrupt Configuration Register 24"
hgroup.long 0xC64++0x03
hide.long 0x00 "GICD_ICFGR25,Interrupt Configuration Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xD)
group.long 0xC68++0x03
line.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC6C++0x03
line.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC68++0x03
hide.long 0x00 "GICD_ICFGR26,Interrupt Configuration Register 26"
hgroup.long 0xC6C++0x03
hide.long 0x00 "GICD_ICFGR27,Interrupt Configuration Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xE)
group.long 0xC70++0x03
line.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC74++0x03
line.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC70++0x03
hide.long 0x00 "GICD_ICFGR28,Interrupt Configuration Register 28"
hgroup.long 0xC74++0x03
hide.long 0x00 "GICD_ICFGR29,Interrupt Configuration Register 29"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0xF)
group.long 0xC78++0x03
line.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC7C++0x03
line.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC78++0x03
hide.long 0x00 "GICD_ICFGR30,Interrupt Configuration Register 30"
hgroup.long 0xC7C++0x03
hide.long 0x00 "GICD_ICFGR31,Interrupt Configuration Register 31"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
group.long 0xC80++0x03
line.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC84++0x03
line.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC80++0x03
hide.long 0x00 "GICD_ICFGR32,Interrupt Configuration Register 32"
hgroup.long 0xC84++0x03
hide.long 0x00 "GICD_ICFGR33,Interrupt Configuration Register 33"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
group.long 0xC88++0x03
line.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC8C++0x03
line.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC88++0x03
hide.long 0x00 "GICD_ICFGR34,Interrupt Configuration Register 34"
hgroup.long 0xC8C++0x03
hide.long 0x00 "GICD_ICFGR35,Interrupt Configuration Register 35"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
group.long 0xC90++0x03
line.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC94++0x03
line.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC90++0x03
hide.long 0x00 "GICD_ICFGR36,Interrupt Configuration Register 36"
hgroup.long 0xC94++0x03
hide.long 0x00 "GICD_ICFGR37,Interrupt Configuration Register 37"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
group.long 0xC98++0x03
line.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xC9C++0x03
line.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xC98++0x03
hide.long 0x00 "GICD_ICFGR38,Interrupt Configuration Register 38"
hgroup.long 0xC9C++0x03
hide.long 0x00 "GICD_ICFGR39,Interrupt Configuration Register 39"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
group.long 0xCA0++0x03
line.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCA4++0x03
line.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA0++0x03
hide.long 0x00 "GICD_ICFGR40,Interrupt Configuration Register 40"
hgroup.long 0xCA4++0x03
hide.long 0x00 "GICD_ICFGR41,Interrupt Configuration Register 41"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
group.long 0xCA8++0x03
line.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCAC++0x03
line.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCA8++0x03
hide.long 0x00 "GICD_ICFGR42,Interrupt Configuration Register 42"
hgroup.long 0xCAC++0x03
hide.long 0x00 "GICD_ICFGR43,Interrupt Configuration Register 43"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
group.long 0xCB0++0x03
line.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCB4++0x03
line.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB0++0x03
hide.long 0x00 "GICD_ICFGR44,Interrupt Configuration Register 44"
hgroup.long 0xCB4++0x03
hide.long 0x00 "GICD_ICFGR45,Interrupt Configuration Register 45"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
group.long 0xCB8++0x03
line.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCBC++0x03
line.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCB8++0x03
hide.long 0x00 "GICD_ICFGR46,Interrupt Configuration Register 46"
hgroup.long 0xCBC++0x03
hide.long 0x00 "GICD_ICFGR47,Interrupt Configuration Register 47"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
group.long 0xCC0++0x03
line.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCC4++0x03
line.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC0++0x03
hide.long 0x00 "GICD_ICFGR48,Interrupt Configuration Register 48"
hgroup.long 0xCC4++0x03
hide.long 0x00 "GICD_ICFGR49,Interrupt Configuration Register 49"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
group.long 0xCC8++0x03
line.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCCC++0x03
line.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCC8++0x03
hide.long 0x00 "GICD_ICFGR50,Interrupt Configuration Register 50"
hgroup.long 0xCCC++0x03
hide.long 0x00 "GICD_ICFGR51,Interrupt Configuration Register 51"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
group.long 0xCD0++0x03
line.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCD4++0x03
line.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD0++0x03
hide.long 0x00 "GICD_ICFGR52,Interrupt Configuration Register 52"
hgroup.long 0xCD4++0x03
hide.long 0x00 "GICD_ICFGR53,Interrupt Configuration Register 53"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
group.long 0xCD8++0x03
line.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCDC++0x03
line.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCD8++0x03
hide.long 0x00 "GICD_ICFGR54,Interrupt Configuration Register 54"
hgroup.long 0xCDC++0x03
hide.long 0x00 "GICD_ICFGR55,Interrupt Configuration Register 55"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
group.long 0xCE0++0x03
line.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCE4++0x03
line.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE0++0x03
hide.long 0x00 "GICD_ICFGR56,Interrupt Configuration Register 56"
hgroup.long 0xCE4++0x03
hide.long 0x00 "GICD_ICFGR57,Interrupt Configuration Register 57"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
group.long 0xCE8++0x03
line.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCEC++0x03
line.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCE8++0x03
hide.long 0x00 "GICD_ICFGR58,Interrupt Configuration Register 58"
hgroup.long 0xCEC++0x03
hide.long 0x00 "GICD_ICFGR59,Interrupt Configuration Register 59"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
group.long 0xCF0++0x03
line.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
group.long 0xCF4++0x03
line.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
bitfld.long 0x00 31. " ICF15 ,Interrupt Configuration 15 (SPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14 ,Interrupt Configuration 14 (SPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13 ,Interrupt Configuration 13 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 25. " ICF12 ,Interrupt Configuration 12 (SPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11 ,Interrupt Configuration 11 (SPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10 ,Interrupt Configuration 10 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 19. " ICF9  ,Interrupt Configuration 9 (SPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8  ,Interrupt Configuration 8 (SPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7  ,Interrupt Configuration 7 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 13. " ICF6  ,Interrupt Configuration 6 (SPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5  ,Interrupt Configuration 5 (SPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4  ,Interrupt Configuration 4 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 7. " ICF3  ,Interrupt Configuration 3 (SPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2  ,Interrupt Configuration 2 (SPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1  ,Interrupt Configuration 1 (SPI)" "Level,Edge"
textline "                       "
bitfld.long 0x00 1. " ICF0  ,Interrupt Configuration 0 (SPI)" "Level,Edge"
else
hgroup.long 0xCF0++0x03
hide.long 0x00 "GICD_ICFGR60,Interrupt Configuration Register 60"
hgroup.long 0xCF4++0x03
hide.long 0x00 "GICD_ICFGR61,Interrupt Configuration Register 61"
endif
tree.end
width 17.
tree "Interrupt Group Modifier Registers"
hgroup.long 0x0D00++0x03
hide.long 0x0 "GICD_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D00))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01))
group.long 0x0D04++0x03
line.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
bitfld.long 0x00 31. " GMB63  ,Group Modifier Bit 63" "0,1"
bitfld.long 0x00 30. "  GMB62  ,Group Modifier Bit 62" "0,1"
bitfld.long 0x00 29. "  GMB61  ,Group Modifier Bit 61" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB60  ,Group Modifier Bit 60" "0,1"
bitfld.long 0x00 27. "  GMB59  ,Group Modifier Bit 59" "0,1"
bitfld.long 0x00 26. "  GMB58  ,Group Modifier Bit 58" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB57  ,Group Modifier Bit 57" "0,1"
bitfld.long 0x00 24. "  GMB56  ,Group Modifier Bit 56" "0,1"
bitfld.long 0x00 23. "  GMB55  ,Group Modifier Bit 55" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB54  ,Group Modifier Bit 54" "0,1"
bitfld.long 0x00 21. "  GMB53  ,Group Modifier Bit 53" "0,1"
bitfld.long 0x00 20. "  GMB52  ,Group Modifier Bit 52" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB51  ,Group Modifier Bit 51" "0,1"
bitfld.long 0x00 18. "  GMB50  ,Group Modifier Bit 50" "0,1"
bitfld.long 0x00 17. "  GMB49  ,Group Modifier Bit 49" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB48  ,Group Modifier Bit 48" "0,1"
bitfld.long 0x00 15. "  GMB47  ,Group Modifier Bit 47" "0,1"
bitfld.long 0x00 14. "  GMB46  ,Group Modifier Bit 46" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB45  ,Group Modifier Bit 45" "0,1"
bitfld.long 0x00 12. "  GMB44  ,Group Modifier Bit 44" "0,1"
bitfld.long 0x00 11. "  GMB43  ,Group Modifier Bit 43" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB42  ,Group Modifier Bit 42" "0,1"
bitfld.long 0x00 9. "  GMB41  ,Group Modifier Bit 41" "0,1"
bitfld.long 0x00 8. "  GMB40  ,Group Modifier Bit 40" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB39  ,Group Modifier Bit 39" "0,1"
bitfld.long 0x00 6. "  GMB38  ,Group Modifier Bit 38" "0,1"
bitfld.long 0x00 5. "  GMB37  ,Group Modifier Bit 37" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB36  ,Group Modifier Bit 36" "0,1"
bitfld.long 0x00 3. "  GMB35  ,Group Modifier Bit 35" "0,1"
bitfld.long 0x00 2. "  GMB34  ,Group Modifier Bit 34" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB33  ,Group Modifier Bit 33" "0,1"
bitfld.long 0x00 0. "  GMB32  ,Group Modifier Bit 32" "0,1"
else
hgroup.long 0x0D04++0x03
hide.long 0x0 "GICD_IGRPMODR1,Interrupt Group Modifier Register 1"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D08))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02))
group.long 0x0D08++0x03
line.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
bitfld.long 0x00 31. " GMB95  ,Group Modifier Bit 95" "0,1"
bitfld.long 0x00 30. "  GMB94  ,Group Modifier Bit 94" "0,1"
bitfld.long 0x00 29. "  GMB93  ,Group Modifier Bit 93" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB92  ,Group Modifier Bit 92" "0,1"
bitfld.long 0x00 27. "  GMB91  ,Group Modifier Bit 91" "0,1"
bitfld.long 0x00 26. "  GMB90  ,Group Modifier Bit 90" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB89  ,Group Modifier Bit 89" "0,1"
bitfld.long 0x00 24. "  GMB88  ,Group Modifier Bit 88" "0,1"
bitfld.long 0x00 23. "  GMB87  ,Group Modifier Bit 87" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB86  ,Group Modifier Bit 86" "0,1"
bitfld.long 0x00 21. "  GMB85  ,Group Modifier Bit 85" "0,1"
bitfld.long 0x00 20. "  GMB84  ,Group Modifier Bit 84" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB83  ,Group Modifier Bit 83" "0,1"
bitfld.long 0x00 18. "  GMB82  ,Group Modifier Bit 82" "0,1"
bitfld.long 0x00 17. "  GMB81  ,Group Modifier Bit 81" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB80  ,Group Modifier Bit 80" "0,1"
bitfld.long 0x00 15. "  GMB79  ,Group Modifier Bit 79" "0,1"
bitfld.long 0x00 14. "  GMB78  ,Group Modifier Bit 78" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB77  ,Group Modifier Bit 77" "0,1"
bitfld.long 0x00 12. "  GMB76  ,Group Modifier Bit 76" "0,1"
bitfld.long 0x00 11. "  GMB75  ,Group Modifier Bit 75" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB74  ,Group Modifier Bit 74" "0,1"
bitfld.long 0x00 9. "  GMB73  ,Group Modifier Bit 73" "0,1"
bitfld.long 0x00 8. "  GMB72  ,Group Modifier Bit 72" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB71  ,Group Modifier Bit 71" "0,1"
bitfld.long 0x00 6. "  GMB70  ,Group Modifier Bit 70" "0,1"
bitfld.long 0x00 5. "  GMB69  ,Group Modifier Bit 69" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB68  ,Group Modifier Bit 68" "0,1"
bitfld.long 0x00 3. "  GMB67  ,Group Modifier Bit 67" "0,1"
bitfld.long 0x00 2. "  GMB66  ,Group Modifier Bit 66" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB65  ,Group Modifier Bit 65" "0,1"
bitfld.long 0x00 0. "  GMB64  ,Group Modifier Bit 64" "0,1"
else
hgroup.long 0x0D08++0x03
hide.long 0x0 "GICD_IGRPMODR2,Interrupt Group Modifier Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D0C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03))
group.long 0x0D0C++0x03
line.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
bitfld.long 0x00 31. " GMB127 ,Group Modifier Bit 127" "0,1"
bitfld.long 0x00 30. "  GMB126 ,Group Modifier Bit 126" "0,1"
bitfld.long 0x00 29. "  GMB125 ,Group Modifier Bit 125" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB124 ,Group Modifier Bit 124" "0,1"
bitfld.long 0x00 27. "  GMB123 ,Group Modifier Bit 123" "0,1"
bitfld.long 0x00 26. "  GMB122 ,Group Modifier Bit 122" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB121 ,Group Modifier Bit 121" "0,1"
bitfld.long 0x00 24. "  GMB120 ,Group Modifier Bit 120" "0,1"
bitfld.long 0x00 23. "  GMB119 ,Group Modifier Bit 119" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB118 ,Group Modifier Bit 118" "0,1"
bitfld.long 0x00 21. "  GMB117 ,Group Modifier Bit 117" "0,1"
bitfld.long 0x00 20. "  GMB116 ,Group Modifier Bit 116" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB115 ,Group Modifier Bit 115" "0,1"
bitfld.long 0x00 18. "  GMB114 ,Group Modifier Bit 114" "0,1"
bitfld.long 0x00 17. "  GMB113 ,Group Modifier Bit 113" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB112 ,Group Modifier Bit 112" "0,1"
bitfld.long 0x00 15. "  GMB111 ,Group Modifier Bit 111" "0,1"
bitfld.long 0x00 14. "  GMB110 ,Group Modifier Bit 110" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB109 ,Group Modifier Bit 109" "0,1"
bitfld.long 0x00 12. "  GMB108 ,Group Modifier Bit 108" "0,1"
bitfld.long 0x00 11. "  GMB107 ,Group Modifier Bit 107" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB106 ,Group Modifier Bit 106" "0,1"
bitfld.long 0x00 9. "  GMB105 ,Group Modifier Bit 105" "0,1"
bitfld.long 0x00 8. "  GMB104 ,Group Modifier Bit 104" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB103 ,Group Modifier Bit 103" "0,1"
bitfld.long 0x00 6. "  GMB102 ,Group Modifier Bit 102" "0,1"
bitfld.long 0x00 5. "  GMB101 ,Group Modifier Bit 101" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB100 ,Group Modifier Bit 100" "0,1"
bitfld.long 0x00 3. "  GMB99  ,Group Modifier Bit 99" "0,1"
bitfld.long 0x00 2. "  GMB98  ,Group Modifier Bit 98" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB97  ,Group Modifier Bit 97" "0,1"
bitfld.long 0x00 0. "  GMB96  ,Group Modifier Bit 96" "0,1"
else
hgroup.long 0x0D0C++0x03
hide.long 0x0 "GICD_IGRPMODR3,Interrupt Group Modifier Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D10))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04))
group.long 0x0D10++0x03
line.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
bitfld.long 0x00 31. " GMB159 ,Group Modifier Bit 159" "0,1"
bitfld.long 0x00 30. "  GMB158 ,Group Modifier Bit 158" "0,1"
bitfld.long 0x00 29. "  GMB157 ,Group Modifier Bit 157" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB156 ,Group Modifier Bit 156" "0,1"
bitfld.long 0x00 27. "  GMB155 ,Group Modifier Bit 155" "0,1"
bitfld.long 0x00 26. "  GMB154 ,Group Modifier Bit 154" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB153 ,Group Modifier Bit 153" "0,1"
bitfld.long 0x00 24. "  GMB152 ,Group Modifier Bit 152" "0,1"
bitfld.long 0x00 23. "  GMB151 ,Group Modifier Bit 151" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB150 ,Group Modifier Bit 150" "0,1"
bitfld.long 0x00 21. "  GMB149 ,Group Modifier Bit 149" "0,1"
bitfld.long 0x00 20. "  GMB148 ,Group Modifier Bit 148" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB147 ,Group Modifier Bit 147" "0,1"
bitfld.long 0x00 18. "  GMB146 ,Group Modifier Bit 146" "0,1"
bitfld.long 0x00 17. "  GMB145 ,Group Modifier Bit 145" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB144 ,Group Modifier Bit 144" "0,1"
bitfld.long 0x00 15. "  GMB143 ,Group Modifier Bit 143" "0,1"
bitfld.long 0x00 14. "  GMB142 ,Group Modifier Bit 142" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB141 ,Group Modifier Bit 141" "0,1"
bitfld.long 0x00 12. "  GMB140 ,Group Modifier Bit 140" "0,1"
bitfld.long 0x00 11. "  GMB139 ,Group Modifier Bit 139" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB138 ,Group Modifier Bit 138" "0,1"
bitfld.long 0x00 9. "  GMB137 ,Group Modifier Bit 137" "0,1"
bitfld.long 0x00 8. "  GMB136 ,Group Modifier Bit 136" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB135 ,Group Modifier Bit 135" "0,1"
bitfld.long 0x00 6. "  GMB134 ,Group Modifier Bit 134" "0,1"
bitfld.long 0x00 5. "  GMB133 ,Group Modifier Bit 133" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB132 ,Group Modifier Bit 132" "0,1"
bitfld.long 0x00 3. "  GMB131 ,Group Modifier Bit 131" "0,1"
bitfld.long 0x00 2. "  GMB130 ,Group Modifier Bit 130" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB129 ,Group Modifier Bit 129" "0,1"
bitfld.long 0x00 0. "  GMB128 ,Group Modifier Bit 128" "0,1"
else
hgroup.long 0x0D10++0x03
hide.long 0x0 "GICD_IGRPMODR4,Interrupt Group Modifier Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D14))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05))
group.long 0x0D14++0x03
line.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
bitfld.long 0x00 31. " GMB191 ,Group Modifier Bit 191" "0,1"
bitfld.long 0x00 30. "  GMB190 ,Group Modifier Bit 190" "0,1"
bitfld.long 0x00 29. "  GMB189 ,Group Modifier Bit 189" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB188 ,Group Modifier Bit 188" "0,1"
bitfld.long 0x00 27. "  GMB187 ,Group Modifier Bit 187" "0,1"
bitfld.long 0x00 26. "  GMB186 ,Group Modifier Bit 186" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB185 ,Group Modifier Bit 185" "0,1"
bitfld.long 0x00 24. "  GMB184 ,Group Modifier Bit 184" "0,1"
bitfld.long 0x00 23. "  GMB183 ,Group Modifier Bit 183" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB182 ,Group Modifier Bit 182" "0,1"
bitfld.long 0x00 21. "  GMB181 ,Group Modifier Bit 181" "0,1"
bitfld.long 0x00 20. "  GMB180 ,Group Modifier Bit 180" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB179 ,Group Modifier Bit 179" "0,1"
bitfld.long 0x00 18. "  GMB178 ,Group Modifier Bit 178" "0,1"
bitfld.long 0x00 17. "  GMB177 ,Group Modifier Bit 177" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB176 ,Group Modifier Bit 176" "0,1"
bitfld.long 0x00 15. "  GMB175 ,Group Modifier Bit 175" "0,1"
bitfld.long 0x00 14. "  GMB174 ,Group Modifier Bit 174" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB173 ,Group Modifier Bit 173" "0,1"
bitfld.long 0x00 12. "  GMB172 ,Group Modifier Bit 172" "0,1"
bitfld.long 0x00 11. "  GMB171 ,Group Modifier Bit 171" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB170 ,Group Modifier Bit 170" "0,1"
bitfld.long 0x00 9. "  GMB169 ,Group Modifier Bit 169" "0,1"
bitfld.long 0x00 8. "  GMB168 ,Group Modifier Bit 168" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB167 ,Group Modifier Bit 167" "0,1"
bitfld.long 0x00 6. "  GMB166 ,Group Modifier Bit 166" "0,1"
bitfld.long 0x00 5. "  GMB165 ,Group Modifier Bit 165" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB164 ,Group Modifier Bit 164" "0,1"
bitfld.long 0x00 3. "  GMB163 ,Group Modifier Bit 163" "0,1"
bitfld.long 0x00 2. "  GMB162 ,Group Modifier Bit 162" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB161 ,Group Modifier Bit 161" "0,1"
bitfld.long 0x00 0. "  GMB160 ,Group Modifier Bit 160" "0,1"
else
hgroup.long 0x0D14++0x03
hide.long 0x0 "GICD_IGRPMODR5,Interrupt Group Modifier Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D18))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06))
group.long 0x0D18++0x03
line.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
bitfld.long 0x00 31. " GMB223 ,Group Modifier Bit 223" "0,1"
bitfld.long 0x00 30. "  GMB222 ,Group Modifier Bit 222" "0,1"
bitfld.long 0x00 29. "  GMB221 ,Group Modifier Bit 221" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB220 ,Group Modifier Bit 220" "0,1"
bitfld.long 0x00 27. "  GMB219 ,Group Modifier Bit 219" "0,1"
bitfld.long 0x00 26. "  GMB218 ,Group Modifier Bit 218" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB217 ,Group Modifier Bit 217" "0,1"
bitfld.long 0x00 24. "  GMB216 ,Group Modifier Bit 216" "0,1"
bitfld.long 0x00 23. "  GMB215 ,Group Modifier Bit 215" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB214 ,Group Modifier Bit 214" "0,1"
bitfld.long 0x00 21. "  GMB213 ,Group Modifier Bit 213" "0,1"
bitfld.long 0x00 20. "  GMB212 ,Group Modifier Bit 212" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB211 ,Group Modifier Bit 211" "0,1"
bitfld.long 0x00 18. "  GMB210 ,Group Modifier Bit 210" "0,1"
bitfld.long 0x00 17. "  GMB209 ,Group Modifier Bit 209" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB208 ,Group Modifier Bit 208" "0,1"
bitfld.long 0x00 15. "  GMB207 ,Group Modifier Bit 207" "0,1"
bitfld.long 0x00 14. "  GMB206 ,Group Modifier Bit 206" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB205 ,Group Modifier Bit 205" "0,1"
bitfld.long 0x00 12. "  GMB204 ,Group Modifier Bit 204" "0,1"
bitfld.long 0x00 11. "  GMB203 ,Group Modifier Bit 203" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB202 ,Group Modifier Bit 202" "0,1"
bitfld.long 0x00 9. "  GMB201 ,Group Modifier Bit 201" "0,1"
bitfld.long 0x00 8. "  GMB200 ,Group Modifier Bit 200" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB199 ,Group Modifier Bit 199" "0,1"
bitfld.long 0x00 6. "  GMB198 ,Group Modifier Bit 198" "0,1"
bitfld.long 0x00 5. "  GMB197 ,Group Modifier Bit 197" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB196 ,Group Modifier Bit 196" "0,1"
bitfld.long 0x00 3. "  GMB195 ,Group Modifier Bit 195" "0,1"
bitfld.long 0x00 2. "  GMB194 ,Group Modifier Bit 194" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB193 ,Group Modifier Bit 193" "0,1"
bitfld.long 0x00 0. "  GMB192 ,Group Modifier Bit 192" "0,1"
else
hgroup.long 0x0D18++0x03
hide.long 0x0 "GICD_IGRPMODR6,Interrupt Group Modifier Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D1C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07))
group.long 0x0D1C++0x03
line.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
bitfld.long 0x00 31. " GMB255 ,Group Modifier Bit 255" "0,1"
bitfld.long 0x00 30. "  GMB254 ,Group Modifier Bit 254" "0,1"
bitfld.long 0x00 29. "  GMB253 ,Group Modifier Bit 253" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB252 ,Group Modifier Bit 252" "0,1"
bitfld.long 0x00 27. "  GMB251 ,Group Modifier Bit 251" "0,1"
bitfld.long 0x00 26. "  GMB250 ,Group Modifier Bit 250" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB249 ,Group Modifier Bit 249" "0,1"
bitfld.long 0x00 24. "  GMB248 ,Group Modifier Bit 248" "0,1"
bitfld.long 0x00 23. "  GMB247 ,Group Modifier Bit 247" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB246 ,Group Modifier Bit 246" "0,1"
bitfld.long 0x00 21. "  GMB245 ,Group Modifier Bit 245" "0,1"
bitfld.long 0x00 20. "  GMB244 ,Group Modifier Bit 244" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB243 ,Group Modifier Bit 243" "0,1"
bitfld.long 0x00 18. "  GMB242 ,Group Modifier Bit 242" "0,1"
bitfld.long 0x00 17. "  GMB241 ,Group Modifier Bit 241" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB240 ,Group Modifier Bit 240" "0,1"
bitfld.long 0x00 15. "  GMB239 ,Group Modifier Bit 239" "0,1"
bitfld.long 0x00 14. "  GMB238 ,Group Modifier Bit 238" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB237 ,Group Modifier Bit 237" "0,1"
bitfld.long 0x00 12. "  GMB236 ,Group Modifier Bit 236" "0,1"
bitfld.long 0x00 11. "  GMB235 ,Group Modifier Bit 235" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB234 ,Group Modifier Bit 234" "0,1"
bitfld.long 0x00 9. "  GMB233 ,Group Modifier Bit 233" "0,1"
bitfld.long 0x00 8. "  GMB232 ,Group Modifier Bit 232" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB231 ,Group Modifier Bit 231" "0,1"
bitfld.long 0x00 6. "  GMB230 ,Group Modifier Bit 230" "0,1"
bitfld.long 0x00 5. "  GMB229 ,Group Modifier Bit 229" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB228 ,Group Modifier Bit 228" "0,1"
bitfld.long 0x00 3. "  GMB227 ,Group Modifier Bit 227" "0,1"
bitfld.long 0x00 2. "  GMB226 ,Group Modifier Bit 226" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB225 ,Group Modifier Bit 225" "0,1"
bitfld.long 0x00 0. "  GMB224 ,Group Modifier Bit 224" "0,1"
else
hgroup.long 0x0D1C++0x03
hide.long 0x0 "GICD_IGRPMODR7,Interrupt Group Modifier Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D20))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08))
group.long 0x0D20++0x03
line.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
bitfld.long 0x00 31. " GMB287 ,Group Modifier Bit 287" "0,1"
bitfld.long 0x00 30. "  GMB286 ,Group Modifier Bit 286" "0,1"
bitfld.long 0x00 29. "  GMB285 ,Group Modifier Bit 285" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB284 ,Group Modifier Bit 284" "0,1"
bitfld.long 0x00 27. "  GMB283 ,Group Modifier Bit 283" "0,1"
bitfld.long 0x00 26. "  GMB282 ,Group Modifier Bit 282" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB281 ,Group Modifier Bit 281" "0,1"
bitfld.long 0x00 24. "  GMB280 ,Group Modifier Bit 280" "0,1"
bitfld.long 0x00 23. "  GMB279 ,Group Modifier Bit 279" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB278 ,Group Modifier Bit 278" "0,1"
bitfld.long 0x00 21. "  GMB277 ,Group Modifier Bit 277" "0,1"
bitfld.long 0x00 20. "  GMB276 ,Group Modifier Bit 276" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB275 ,Group Modifier Bit 275" "0,1"
bitfld.long 0x00 18. "  GMB274 ,Group Modifier Bit 274" "0,1"
bitfld.long 0x00 17. "  GMB273 ,Group Modifier Bit 273" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB272 ,Group Modifier Bit 272" "0,1"
bitfld.long 0x00 15. "  GMB271 ,Group Modifier Bit 271" "0,1"
bitfld.long 0x00 14. "  GMB270 ,Group Modifier Bit 270" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB269 ,Group Modifier Bit 269" "0,1"
bitfld.long 0x00 12. "  GMB268 ,Group Modifier Bit 268" "0,1"
bitfld.long 0x00 11. "  GMB267 ,Group Modifier Bit 267" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB266 ,Group Modifier Bit 266" "0,1"
bitfld.long 0x00 9. "  GMB265 ,Group Modifier Bit 265" "0,1"
bitfld.long 0x00 8. "  GMB264 ,Group Modifier Bit 264" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB263 ,Group Modifier Bit 263" "0,1"
bitfld.long 0x00 6. "  GMB262 ,Group Modifier Bit 262" "0,1"
bitfld.long 0x00 5. "  GMB261 ,Group Modifier Bit 261" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB260 ,Group Modifier Bit 260" "0,1"
bitfld.long 0x00 3. "  GMB259 ,Group Modifier Bit 259" "0,1"
bitfld.long 0x00 2. "  GMB258 ,Group Modifier Bit 258" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB257 ,Group Modifier Bit 257" "0,1"
bitfld.long 0x00 0. "  GMB256 ,Group Modifier Bit 256" "0,1"
else
hgroup.long 0x0D20++0x03
hide.long 0x0 "GICD_IGRPMODR8,Interrupt Group Modifier Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D24))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09))
group.long 0x0D24++0x03
line.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
bitfld.long 0x00 31. " GMB319 ,Group Modifier Bit 319" "0,1"
bitfld.long 0x00 30. "  GMB318 ,Group Modifier Bit 318" "0,1"
bitfld.long 0x00 29. "  GMB317 ,Group Modifier Bit 317" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB316 ,Group Modifier Bit 316" "0,1"
bitfld.long 0x00 27. "  GMB315 ,Group Modifier Bit 315" "0,1"
bitfld.long 0x00 26. "  GMB314 ,Group Modifier Bit 314" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB313 ,Group Modifier Bit 313" "0,1"
bitfld.long 0x00 24. "  GMB312 ,Group Modifier Bit 312" "0,1"
bitfld.long 0x00 23. "  GMB311 ,Group Modifier Bit 311" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB310 ,Group Modifier Bit 310" "0,1"
bitfld.long 0x00 21. "  GMB309 ,Group Modifier Bit 309" "0,1"
bitfld.long 0x00 20. "  GMB308 ,Group Modifier Bit 308" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB307 ,Group Modifier Bit 307" "0,1"
bitfld.long 0x00 18. "  GMB306 ,Group Modifier Bit 306" "0,1"
bitfld.long 0x00 17. "  GMB305 ,Group Modifier Bit 305" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB304 ,Group Modifier Bit 304" "0,1"
bitfld.long 0x00 15. "  GMB303 ,Group Modifier Bit 303" "0,1"
bitfld.long 0x00 14. "  GMB302 ,Group Modifier Bit 302" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB301 ,Group Modifier Bit 301" "0,1"
bitfld.long 0x00 12. "  GMB300 ,Group Modifier Bit 300" "0,1"
bitfld.long 0x00 11. "  GMB299 ,Group Modifier Bit 299" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB298 ,Group Modifier Bit 298" "0,1"
bitfld.long 0x00 9. "  GMB297 ,Group Modifier Bit 297" "0,1"
bitfld.long 0x00 8. "  GMB296 ,Group Modifier Bit 296" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB295 ,Group Modifier Bit 295" "0,1"
bitfld.long 0x00 6. "  GMB294 ,Group Modifier Bit 294" "0,1"
bitfld.long 0x00 5. "  GMB293 ,Group Modifier Bit 293" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB292 ,Group Modifier Bit 292" "0,1"
bitfld.long 0x00 3. "  GMB291 ,Group Modifier Bit 291" "0,1"
bitfld.long 0x00 2. "  GMB290 ,Group Modifier Bit 290" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB289 ,Group Modifier Bit 289" "0,1"
bitfld.long 0x00 0. "  GMB288 ,Group Modifier Bit 288" "0,1"
else
hgroup.long 0x0D24++0x03
hide.long 0x0 "GICD_IGRPMODR9,Interrupt Group Modifier Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D28))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A))
group.long 0x0D28++0x03
line.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
bitfld.long 0x00 31. " GMB351 ,Group Modifier Bit 351" "0,1"
bitfld.long 0x00 30. "  GMB350 ,Group Modifier Bit 350" "0,1"
bitfld.long 0x00 29. "  GMB349 ,Group Modifier Bit 349" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB348 ,Group Modifier Bit 348" "0,1"
bitfld.long 0x00 27. "  GMB347 ,Group Modifier Bit 347" "0,1"
bitfld.long 0x00 26. "  GMB346 ,Group Modifier Bit 346" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB345 ,Group Modifier Bit 345" "0,1"
bitfld.long 0x00 24. "  GMB344 ,Group Modifier Bit 344" "0,1"
bitfld.long 0x00 23. "  GMB343 ,Group Modifier Bit 343" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB342 ,Group Modifier Bit 342" "0,1"
bitfld.long 0x00 21. "  GMB341 ,Group Modifier Bit 341" "0,1"
bitfld.long 0x00 20. "  GMB340 ,Group Modifier Bit 340" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB339 ,Group Modifier Bit 339" "0,1"
bitfld.long 0x00 18. "  GMB338 ,Group Modifier Bit 338" "0,1"
bitfld.long 0x00 17. "  GMB337 ,Group Modifier Bit 337" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB336 ,Group Modifier Bit 336" "0,1"
bitfld.long 0x00 15. "  GMB335 ,Group Modifier Bit 335" "0,1"
bitfld.long 0x00 14. "  GMB334 ,Group Modifier Bit 334" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB333 ,Group Modifier Bit 333" "0,1"
bitfld.long 0x00 12. "  GMB332 ,Group Modifier Bit 332" "0,1"
bitfld.long 0x00 11. "  GMB331 ,Group Modifier Bit 331" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB330 ,Group Modifier Bit 330" "0,1"
bitfld.long 0x00 9. "  GMB329 ,Group Modifier Bit 329" "0,1"
bitfld.long 0x00 8. "  GMB328 ,Group Modifier Bit 328" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB327 ,Group Modifier Bit 327" "0,1"
bitfld.long 0x00 6. "  GMB326 ,Group Modifier Bit 326" "0,1"
bitfld.long 0x00 5. "  GMB325 ,Group Modifier Bit 325" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB324 ,Group Modifier Bit 324" "0,1"
bitfld.long 0x00 3. "  GMB323 ,Group Modifier Bit 323" "0,1"
bitfld.long 0x00 2. "  GMB322 ,Group Modifier Bit 322" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB321 ,Group Modifier Bit 321" "0,1"
bitfld.long 0x00 0. "  GMB320 ,Group Modifier Bit 320" "0,1"
else
hgroup.long 0x0D28++0x03
hide.long 0x0 "GICD_IGRPMODR10,Interrupt Group Modifier Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D2C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B))
group.long 0x0D2C++0x03
line.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
bitfld.long 0x00 31. " GMB383 ,Group Modifier Bit 383" "0,1"
bitfld.long 0x00 30. "  GMB382 ,Group Modifier Bit 382" "0,1"
bitfld.long 0x00 29. "  GMB381 ,Group Modifier Bit 381" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB380 ,Group Modifier Bit 380" "0,1"
bitfld.long 0x00 27. "  GMB379 ,Group Modifier Bit 379" "0,1"
bitfld.long 0x00 26. "  GMB378 ,Group Modifier Bit 378" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB377 ,Group Modifier Bit 377" "0,1"
bitfld.long 0x00 24. "  GMB376 ,Group Modifier Bit 376" "0,1"
bitfld.long 0x00 23. "  GMB375 ,Group Modifier Bit 375" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB374 ,Group Modifier Bit 374" "0,1"
bitfld.long 0x00 21. "  GMB373 ,Group Modifier Bit 373" "0,1"
bitfld.long 0x00 20. "  GMB372 ,Group Modifier Bit 372" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB371 ,Group Modifier Bit 371" "0,1"
bitfld.long 0x00 18. "  GMB370 ,Group Modifier Bit 370" "0,1"
bitfld.long 0x00 17. "  GMB369 ,Group Modifier Bit 369" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB368 ,Group Modifier Bit 368" "0,1"
bitfld.long 0x00 15. "  GMB367 ,Group Modifier Bit 367" "0,1"
bitfld.long 0x00 14. "  GMB366 ,Group Modifier Bit 366" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB365 ,Group Modifier Bit 365" "0,1"
bitfld.long 0x00 12. "  GMB364 ,Group Modifier Bit 364" "0,1"
bitfld.long 0x00 11. "  GMB363 ,Group Modifier Bit 363" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB362 ,Group Modifier Bit 362" "0,1"
bitfld.long 0x00 9. "  GMB361 ,Group Modifier Bit 361" "0,1"
bitfld.long 0x00 8. "  GMB360 ,Group Modifier Bit 360" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB359 ,Group Modifier Bit 359" "0,1"
bitfld.long 0x00 6. "  GMB358 ,Group Modifier Bit 358" "0,1"
bitfld.long 0x00 5. "  GMB357 ,Group Modifier Bit 357" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB356 ,Group Modifier Bit 356" "0,1"
bitfld.long 0x00 3. "  GMB355 ,Group Modifier Bit 355" "0,1"
bitfld.long 0x00 2. "  GMB354 ,Group Modifier Bit 354" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB353 ,Group Modifier Bit 353" "0,1"
bitfld.long 0x00 0. "  GMB352 ,Group Modifier Bit 352" "0,1"
else
hgroup.long 0x0D2C++0x03
hide.long 0x0 "GICD_IGRPMODR11,Interrupt Group Modifier Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D30))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C))
group.long 0x0D30++0x03
line.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
bitfld.long 0x00 31. " GMB415 ,Group Modifier Bit 415" "0,1"
bitfld.long 0x00 30. "  GMB414 ,Group Modifier Bit 414" "0,1"
bitfld.long 0x00 29. "  GMB413 ,Group Modifier Bit 413" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB412 ,Group Modifier Bit 412" "0,1"
bitfld.long 0x00 27. "  GMB411 ,Group Modifier Bit 411" "0,1"
bitfld.long 0x00 26. "  GMB410 ,Group Modifier Bit 410" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB409 ,Group Modifier Bit 409" "0,1"
bitfld.long 0x00 24. "  GMB408 ,Group Modifier Bit 408" "0,1"
bitfld.long 0x00 23. "  GMB407 ,Group Modifier Bit 407" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB406 ,Group Modifier Bit 406" "0,1"
bitfld.long 0x00 21. "  GMB405 ,Group Modifier Bit 405" "0,1"
bitfld.long 0x00 20. "  GMB404 ,Group Modifier Bit 404" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB403 ,Group Modifier Bit 403" "0,1"
bitfld.long 0x00 18. "  GMB402 ,Group Modifier Bit 402" "0,1"
bitfld.long 0x00 17. "  GMB401 ,Group Modifier Bit 401" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB400 ,Group Modifier Bit 400" "0,1"
bitfld.long 0x00 15. "  GMB399 ,Group Modifier Bit 399" "0,1"
bitfld.long 0x00 14. "  GMB398 ,Group Modifier Bit 398" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB397 ,Group Modifier Bit 397" "0,1"
bitfld.long 0x00 12. "  GMB396 ,Group Modifier Bit 396" "0,1"
bitfld.long 0x00 11. "  GMB395 ,Group Modifier Bit 395" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB394 ,Group Modifier Bit 394" "0,1"
bitfld.long 0x00 9. "  GMB393 ,Group Modifier Bit 393" "0,1"
bitfld.long 0x00 8. "  GMB392 ,Group Modifier Bit 392" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB391 ,Group Modifier Bit 391" "0,1"
bitfld.long 0x00 6. "  GMB390 ,Group Modifier Bit 390" "0,1"
bitfld.long 0x00 5. "  GMB389 ,Group Modifier Bit 389" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB388 ,Group Modifier Bit 388" "0,1"
bitfld.long 0x00 3. "  GMB387 ,Group Modifier Bit 387" "0,1"
bitfld.long 0x00 2. "  GMB386 ,Group Modifier Bit 386" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB385 ,Group Modifier Bit 385" "0,1"
bitfld.long 0x00 0. "  GMB384 ,Group Modifier Bit 384" "0,1"
else
hgroup.long 0x0D30++0x03
hide.long 0x0 "GICD_IGRPMODR12,Interrupt Group Modifier Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D34))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D))
group.long 0x0D34++0x03
line.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
bitfld.long 0x00 31. " GMB447 ,Group Modifier Bit 447" "0,1"
bitfld.long 0x00 30. "  GMB446 ,Group Modifier Bit 446" "0,1"
bitfld.long 0x00 29. "  GMB445 ,Group Modifier Bit 445" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB444 ,Group Modifier Bit 444" "0,1"
bitfld.long 0x00 27. "  GMB443 ,Group Modifier Bit 443" "0,1"
bitfld.long 0x00 26. "  GMB442 ,Group Modifier Bit 442" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB441 ,Group Modifier Bit 441" "0,1"
bitfld.long 0x00 24. "  GMB440 ,Group Modifier Bit 440" "0,1"
bitfld.long 0x00 23. "  GMB439 ,Group Modifier Bit 439" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB438 ,Group Modifier Bit 438" "0,1"
bitfld.long 0x00 21. "  GMB437 ,Group Modifier Bit 437" "0,1"
bitfld.long 0x00 20. "  GMB436 ,Group Modifier Bit 436" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB435 ,Group Modifier Bit 435" "0,1"
bitfld.long 0x00 18. "  GMB434 ,Group Modifier Bit 434" "0,1"
bitfld.long 0x00 17. "  GMB433 ,Group Modifier Bit 433" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB432 ,Group Modifier Bit 432" "0,1"
bitfld.long 0x00 15. "  GMB431 ,Group Modifier Bit 431" "0,1"
bitfld.long 0x00 14. "  GMB430 ,Group Modifier Bit 430" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB429 ,Group Modifier Bit 429" "0,1"
bitfld.long 0x00 12. "  GMB428 ,Group Modifier Bit 428" "0,1"
bitfld.long 0x00 11. "  GMB427 ,Group Modifier Bit 427" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB426 ,Group Modifier Bit 426" "0,1"
bitfld.long 0x00 9. "  GMB425 ,Group Modifier Bit 425" "0,1"
bitfld.long 0x00 8. "  GMB424 ,Group Modifier Bit 424" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB423 ,Group Modifier Bit 423" "0,1"
bitfld.long 0x00 6. "  GMB422 ,Group Modifier Bit 422" "0,1"
bitfld.long 0x00 5. "  GMB421 ,Group Modifier Bit 421" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB420 ,Group Modifier Bit 420" "0,1"
bitfld.long 0x00 3. "  GMB419 ,Group Modifier Bit 419" "0,1"
bitfld.long 0x00 2. "  GMB418 ,Group Modifier Bit 418" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB417 ,Group Modifier Bit 417" "0,1"
bitfld.long 0x00 0. "  GMB416 ,Group Modifier Bit 416" "0,1"
else
hgroup.long 0x0D34++0x03
hide.long 0x0 "GICD_IGRPMODR13,Interrupt Group Modifier Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D38))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E))
group.long 0x0D38++0x03
line.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
bitfld.long 0x00 31. " GMB479 ,Group Modifier Bit 479" "0,1"
bitfld.long 0x00 30. "  GMB478 ,Group Modifier Bit 478" "0,1"
bitfld.long 0x00 29. "  GMB477 ,Group Modifier Bit 477" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB476 ,Group Modifier Bit 476" "0,1"
bitfld.long 0x00 27. "  GMB475 ,Group Modifier Bit 475" "0,1"
bitfld.long 0x00 26. "  GMB474 ,Group Modifier Bit 474" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB473 ,Group Modifier Bit 473" "0,1"
bitfld.long 0x00 24. "  GMB472 ,Group Modifier Bit 472" "0,1"
bitfld.long 0x00 23. "  GMB471 ,Group Modifier Bit 471" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB470 ,Group Modifier Bit 470" "0,1"
bitfld.long 0x00 21. "  GMB469 ,Group Modifier Bit 469" "0,1"
bitfld.long 0x00 20. "  GMB468 ,Group Modifier Bit 468" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB467 ,Group Modifier Bit 467" "0,1"
bitfld.long 0x00 18. "  GMB466 ,Group Modifier Bit 466" "0,1"
bitfld.long 0x00 17. "  GMB465 ,Group Modifier Bit 465" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB464 ,Group Modifier Bit 464" "0,1"
bitfld.long 0x00 15. "  GMB463 ,Group Modifier Bit 463" "0,1"
bitfld.long 0x00 14. "  GMB462 ,Group Modifier Bit 462" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB461 ,Group Modifier Bit 461" "0,1"
bitfld.long 0x00 12. "  GMB460 ,Group Modifier Bit 460" "0,1"
bitfld.long 0x00 11. "  GMB459 ,Group Modifier Bit 459" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB458 ,Group Modifier Bit 458" "0,1"
bitfld.long 0x00 9. "  GMB457 ,Group Modifier Bit 457" "0,1"
bitfld.long 0x00 8. "  GMB456 ,Group Modifier Bit 456" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB455 ,Group Modifier Bit 455" "0,1"
bitfld.long 0x00 6. "  GMB454 ,Group Modifier Bit 454" "0,1"
bitfld.long 0x00 5. "  GMB453 ,Group Modifier Bit 453" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB452 ,Group Modifier Bit 452" "0,1"
bitfld.long 0x00 3. "  GMB451 ,Group Modifier Bit 451" "0,1"
bitfld.long 0x00 2. "  GMB450 ,Group Modifier Bit 450" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB449 ,Group Modifier Bit 449" "0,1"
bitfld.long 0x00 0. "  GMB448 ,Group Modifier Bit 448" "0,1"
else
hgroup.long 0x0D38++0x03
hide.long 0x0 "GICD_IGRPMODR14,Interrupt Group Modifier Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D3C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F))
group.long 0x0D3C++0x03
line.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
bitfld.long 0x00 31. " GMB511 ,Group Modifier Bit 511" "0,1"
bitfld.long 0x00 30. "  GMB510 ,Group Modifier Bit 510" "0,1"
bitfld.long 0x00 29. "  GMB509 ,Group Modifier Bit 509" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB508 ,Group Modifier Bit 508" "0,1"
bitfld.long 0x00 27. "  GMB507 ,Group Modifier Bit 507" "0,1"
bitfld.long 0x00 26. "  GMB506 ,Group Modifier Bit 506" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB505 ,Group Modifier Bit 505" "0,1"
bitfld.long 0x00 24. "  GMB504 ,Group Modifier Bit 504" "0,1"
bitfld.long 0x00 23. "  GMB503 ,Group Modifier Bit 503" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB502 ,Group Modifier Bit 502" "0,1"
bitfld.long 0x00 21. "  GMB501 ,Group Modifier Bit 501" "0,1"
bitfld.long 0x00 20. "  GMB500 ,Group Modifier Bit 500" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB499 ,Group Modifier Bit 499" "0,1"
bitfld.long 0x00 18. "  GMB498 ,Group Modifier Bit 498" "0,1"
bitfld.long 0x00 17. "  GMB497 ,Group Modifier Bit 497" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB496 ,Group Modifier Bit 496" "0,1"
bitfld.long 0x00 15. "  GMB495 ,Group Modifier Bit 495" "0,1"
bitfld.long 0x00 14. "  GMB494 ,Group Modifier Bit 494" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB493 ,Group Modifier Bit 493" "0,1"
bitfld.long 0x00 12. "  GMB492 ,Group Modifier Bit 492" "0,1"
bitfld.long 0x00 11. "  GMB491 ,Group Modifier Bit 491" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB490 ,Group Modifier Bit 490" "0,1"
bitfld.long 0x00 9. "  GMB489 ,Group Modifier Bit 489" "0,1"
bitfld.long 0x00 8. "  GMB488 ,Group Modifier Bit 488" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB487 ,Group Modifier Bit 487" "0,1"
bitfld.long 0x00 6. "  GMB486 ,Group Modifier Bit 486" "0,1"
bitfld.long 0x00 5. "  GMB485 ,Group Modifier Bit 485" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB484 ,Group Modifier Bit 484" "0,1"
bitfld.long 0x00 3. "  GMB483 ,Group Modifier Bit 483" "0,1"
bitfld.long 0x00 2. "  GMB482 ,Group Modifier Bit 482" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB481 ,Group Modifier Bit 481" "0,1"
bitfld.long 0x00 0. "  GMB480 ,Group Modifier Bit 480" "0,1"
else
hgroup.long 0x0D3C++0x03
hide.long 0x0 "GICD_IGRPMODR15,Interrupt Group Modifier Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D40))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10))
group.long 0x0D40++0x03
line.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
bitfld.long 0x00 31. " GMB543 ,Group Modifier Bit 543" "0,1"
bitfld.long 0x00 30. "  GMB542 ,Group Modifier Bit 542" "0,1"
bitfld.long 0x00 29. "  GMB541 ,Group Modifier Bit 541" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB540 ,Group Modifier Bit 540" "0,1"
bitfld.long 0x00 27. "  GMB539 ,Group Modifier Bit 539" "0,1"
bitfld.long 0x00 26. "  GMB538 ,Group Modifier Bit 538" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB537 ,Group Modifier Bit 537" "0,1"
bitfld.long 0x00 24. "  GMB536 ,Group Modifier Bit 536" "0,1"
bitfld.long 0x00 23. "  GMB535 ,Group Modifier Bit 535" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB534 ,Group Modifier Bit 534" "0,1"
bitfld.long 0x00 21. "  GMB533 ,Group Modifier Bit 533" "0,1"
bitfld.long 0x00 20. "  GMB532 ,Group Modifier Bit 532" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB531 ,Group Modifier Bit 531" "0,1"
bitfld.long 0x00 18. "  GMB530 ,Group Modifier Bit 530" "0,1"
bitfld.long 0x00 17. "  GMB529 ,Group Modifier Bit 529" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB528 ,Group Modifier Bit 528" "0,1"
bitfld.long 0x00 15. "  GMB527 ,Group Modifier Bit 527" "0,1"
bitfld.long 0x00 14. "  GMB526 ,Group Modifier Bit 526" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB525 ,Group Modifier Bit 525" "0,1"
bitfld.long 0x00 12. "  GMB524 ,Group Modifier Bit 524" "0,1"
bitfld.long 0x00 11. "  GMB523 ,Group Modifier Bit 523" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB522 ,Group Modifier Bit 522" "0,1"
bitfld.long 0x00 9. "  GMB521 ,Group Modifier Bit 521" "0,1"
bitfld.long 0x00 8. "  GMB520 ,Group Modifier Bit 520" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB519 ,Group Modifier Bit 519" "0,1"
bitfld.long 0x00 6. "  GMB518 ,Group Modifier Bit 518" "0,1"
bitfld.long 0x00 5. "  GMB517 ,Group Modifier Bit 517" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB516 ,Group Modifier Bit 516" "0,1"
bitfld.long 0x00 3. "  GMB515 ,Group Modifier Bit 515" "0,1"
bitfld.long 0x00 2. "  GMB514 ,Group Modifier Bit 514" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB513 ,Group Modifier Bit 513" "0,1"
bitfld.long 0x00 0. "  GMB512 ,Group Modifier Bit 512" "0,1"
else
hgroup.long 0x0D40++0x03
hide.long 0x0 "GICD_IGRPMODR16,Interrupt Group Modifier Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D44))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11))
group.long 0x0D44++0x03
line.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
bitfld.long 0x00 31. " GMB575 ,Group Modifier Bit 575" "0,1"
bitfld.long 0x00 30. "  GMB574 ,Group Modifier Bit 574" "0,1"
bitfld.long 0x00 29. "  GMB573 ,Group Modifier Bit 573" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB572 ,Group Modifier Bit 572" "0,1"
bitfld.long 0x00 27. "  GMB571 ,Group Modifier Bit 571" "0,1"
bitfld.long 0x00 26. "  GMB570 ,Group Modifier Bit 570" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB569 ,Group Modifier Bit 569" "0,1"
bitfld.long 0x00 24. "  GMB568 ,Group Modifier Bit 568" "0,1"
bitfld.long 0x00 23. "  GMB567 ,Group Modifier Bit 567" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB566 ,Group Modifier Bit 566" "0,1"
bitfld.long 0x00 21. "  GMB565 ,Group Modifier Bit 565" "0,1"
bitfld.long 0x00 20. "  GMB564 ,Group Modifier Bit 564" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB563 ,Group Modifier Bit 563" "0,1"
bitfld.long 0x00 18. "  GMB562 ,Group Modifier Bit 562" "0,1"
bitfld.long 0x00 17. "  GMB561 ,Group Modifier Bit 561" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB560 ,Group Modifier Bit 560" "0,1"
bitfld.long 0x00 15. "  GMB559 ,Group Modifier Bit 559" "0,1"
bitfld.long 0x00 14. "  GMB558 ,Group Modifier Bit 558" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB557 ,Group Modifier Bit 557" "0,1"
bitfld.long 0x00 12. "  GMB556 ,Group Modifier Bit 556" "0,1"
bitfld.long 0x00 11. "  GMB555 ,Group Modifier Bit 555" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB554 ,Group Modifier Bit 554" "0,1"
bitfld.long 0x00 9. "  GMB553 ,Group Modifier Bit 553" "0,1"
bitfld.long 0x00 8. "  GMB552 ,Group Modifier Bit 552" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB551 ,Group Modifier Bit 551" "0,1"
bitfld.long 0x00 6. "  GMB550 ,Group Modifier Bit 550" "0,1"
bitfld.long 0x00 5. "  GMB549 ,Group Modifier Bit 549" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB548 ,Group Modifier Bit 548" "0,1"
bitfld.long 0x00 3. "  GMB547 ,Group Modifier Bit 547" "0,1"
bitfld.long 0x00 2. "  GMB546 ,Group Modifier Bit 546" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB545 ,Group Modifier Bit 545" "0,1"
bitfld.long 0x00 0. "  GMB544 ,Group Modifier Bit 544" "0,1"
else
hgroup.long 0x0D44++0x03
hide.long 0x0 "GICD_IGRPMODR17,Interrupt Group Modifier Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D48))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12))
group.long 0x0D48++0x03
line.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
bitfld.long 0x00 31. " GMB607 ,Group Modifier Bit 607" "0,1"
bitfld.long 0x00 30. "  GMB606 ,Group Modifier Bit 606" "0,1"
bitfld.long 0x00 29. "  GMB605 ,Group Modifier Bit 605" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB604 ,Group Modifier Bit 604" "0,1"
bitfld.long 0x00 27. "  GMB603 ,Group Modifier Bit 603" "0,1"
bitfld.long 0x00 26. "  GMB602 ,Group Modifier Bit 602" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB601 ,Group Modifier Bit 601" "0,1"
bitfld.long 0x00 24. "  GMB600 ,Group Modifier Bit 600" "0,1"
bitfld.long 0x00 23. "  GMB599 ,Group Modifier Bit 599" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB598 ,Group Modifier Bit 598" "0,1"
bitfld.long 0x00 21. "  GMB597 ,Group Modifier Bit 597" "0,1"
bitfld.long 0x00 20. "  GMB596 ,Group Modifier Bit 596" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB595 ,Group Modifier Bit 595" "0,1"
bitfld.long 0x00 18. "  GMB594 ,Group Modifier Bit 594" "0,1"
bitfld.long 0x00 17. "  GMB593 ,Group Modifier Bit 593" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB592 ,Group Modifier Bit 592" "0,1"
bitfld.long 0x00 15. "  GMB591 ,Group Modifier Bit 591" "0,1"
bitfld.long 0x00 14. "  GMB590 ,Group Modifier Bit 590" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB589 ,Group Modifier Bit 589" "0,1"
bitfld.long 0x00 12. "  GMB588 ,Group Modifier Bit 588" "0,1"
bitfld.long 0x00 11. "  GMB587 ,Group Modifier Bit 587" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB586 ,Group Modifier Bit 586" "0,1"
bitfld.long 0x00 9. "  GMB585 ,Group Modifier Bit 585" "0,1"
bitfld.long 0x00 8. "  GMB584 ,Group Modifier Bit 584" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB583 ,Group Modifier Bit 583" "0,1"
bitfld.long 0x00 6. "  GMB582 ,Group Modifier Bit 582" "0,1"
bitfld.long 0x00 5. "  GMB581 ,Group Modifier Bit 581" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB580 ,Group Modifier Bit 580" "0,1"
bitfld.long 0x00 3. "  GMB579 ,Group Modifier Bit 579" "0,1"
bitfld.long 0x00 2. "  GMB578 ,Group Modifier Bit 578" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB577 ,Group Modifier Bit 577" "0,1"
bitfld.long 0x00 0. "  GMB576 ,Group Modifier Bit 576" "0,1"
else
hgroup.long 0x0D48++0x03
hide.long 0x0 "GICD_IGRPMODR18,Interrupt Group Modifier Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D4C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13))
group.long 0x0D4C++0x03
line.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
bitfld.long 0x00 31. " GMB639 ,Group Modifier Bit 639" "0,1"
bitfld.long 0x00 30. "  GMB638 ,Group Modifier Bit 638" "0,1"
bitfld.long 0x00 29. "  GMB637 ,Group Modifier Bit 637" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB636 ,Group Modifier Bit 636" "0,1"
bitfld.long 0x00 27. "  GMB635 ,Group Modifier Bit 635" "0,1"
bitfld.long 0x00 26. "  GMB634 ,Group Modifier Bit 634" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB633 ,Group Modifier Bit 633" "0,1"
bitfld.long 0x00 24. "  GMB632 ,Group Modifier Bit 632" "0,1"
bitfld.long 0x00 23. "  GMB631 ,Group Modifier Bit 631" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB630 ,Group Modifier Bit 630" "0,1"
bitfld.long 0x00 21. "  GMB629 ,Group Modifier Bit 629" "0,1"
bitfld.long 0x00 20. "  GMB628 ,Group Modifier Bit 628" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB627 ,Group Modifier Bit 627" "0,1"
bitfld.long 0x00 18. "  GMB626 ,Group Modifier Bit 626" "0,1"
bitfld.long 0x00 17. "  GMB625 ,Group Modifier Bit 625" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB624 ,Group Modifier Bit 624" "0,1"
bitfld.long 0x00 15. "  GMB623 ,Group Modifier Bit 623" "0,1"
bitfld.long 0x00 14. "  GMB622 ,Group Modifier Bit 622" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB621 ,Group Modifier Bit 621" "0,1"
bitfld.long 0x00 12. "  GMB620 ,Group Modifier Bit 620" "0,1"
bitfld.long 0x00 11. "  GMB619 ,Group Modifier Bit 619" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB618 ,Group Modifier Bit 618" "0,1"
bitfld.long 0x00 9. "  GMB617 ,Group Modifier Bit 617" "0,1"
bitfld.long 0x00 8. "  GMB616 ,Group Modifier Bit 616" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB615 ,Group Modifier Bit 615" "0,1"
bitfld.long 0x00 6. "  GMB614 ,Group Modifier Bit 614" "0,1"
bitfld.long 0x00 5. "  GMB613 ,Group Modifier Bit 613" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB612 ,Group Modifier Bit 612" "0,1"
bitfld.long 0x00 3. "  GMB611 ,Group Modifier Bit 611" "0,1"
bitfld.long 0x00 2. "  GMB610 ,Group Modifier Bit 610" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB609 ,Group Modifier Bit 609" "0,1"
bitfld.long 0x00 0. "  GMB608 ,Group Modifier Bit 608" "0,1"
else
hgroup.long 0x0D4C++0x03
hide.long 0x0 "GICD_IGRPMODR19,Interrupt Group Modifier Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D50))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14))
group.long 0x0D50++0x03
line.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
bitfld.long 0x00 31. " GMB671 ,Group Modifier Bit 671" "0,1"
bitfld.long 0x00 30. "  GMB670 ,Group Modifier Bit 670" "0,1"
bitfld.long 0x00 29. "  GMB669 ,Group Modifier Bit 669" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB668 ,Group Modifier Bit 668" "0,1"
bitfld.long 0x00 27. "  GMB667 ,Group Modifier Bit 667" "0,1"
bitfld.long 0x00 26. "  GMB666 ,Group Modifier Bit 666" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB665 ,Group Modifier Bit 665" "0,1"
bitfld.long 0x00 24. "  GMB664 ,Group Modifier Bit 664" "0,1"
bitfld.long 0x00 23. "  GMB663 ,Group Modifier Bit 663" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB662 ,Group Modifier Bit 662" "0,1"
bitfld.long 0x00 21. "  GMB661 ,Group Modifier Bit 661" "0,1"
bitfld.long 0x00 20. "  GMB660 ,Group Modifier Bit 660" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB659 ,Group Modifier Bit 659" "0,1"
bitfld.long 0x00 18. "  GMB658 ,Group Modifier Bit 658" "0,1"
bitfld.long 0x00 17. "  GMB657 ,Group Modifier Bit 657" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB656 ,Group Modifier Bit 656" "0,1"
bitfld.long 0x00 15. "  GMB655 ,Group Modifier Bit 655" "0,1"
bitfld.long 0x00 14. "  GMB654 ,Group Modifier Bit 654" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB653 ,Group Modifier Bit 653" "0,1"
bitfld.long 0x00 12. "  GMB652 ,Group Modifier Bit 652" "0,1"
bitfld.long 0x00 11. "  GMB651 ,Group Modifier Bit 651" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB650 ,Group Modifier Bit 650" "0,1"
bitfld.long 0x00 9. "  GMB649 ,Group Modifier Bit 649" "0,1"
bitfld.long 0x00 8. "  GMB648 ,Group Modifier Bit 648" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB647 ,Group Modifier Bit 647" "0,1"
bitfld.long 0x00 6. "  GMB646 ,Group Modifier Bit 646" "0,1"
bitfld.long 0x00 5. "  GMB645 ,Group Modifier Bit 645" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB644 ,Group Modifier Bit 644" "0,1"
bitfld.long 0x00 3. "  GMB643 ,Group Modifier Bit 643" "0,1"
bitfld.long 0x00 2. "  GMB642 ,Group Modifier Bit 642" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB641 ,Group Modifier Bit 641" "0,1"
bitfld.long 0x00 0. "  GMB640 ,Group Modifier Bit 640" "0,1"
else
hgroup.long 0x0D50++0x03
hide.long 0x0 "GICD_IGRPMODR20,Interrupt Group Modifier Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D54))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15))
group.long 0x0D54++0x03
line.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
bitfld.long 0x00 31. " GMB703 ,Group Modifier Bit 703" "0,1"
bitfld.long 0x00 30. "  GMB702 ,Group Modifier Bit 702" "0,1"
bitfld.long 0x00 29. "  GMB701 ,Group Modifier Bit 701" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB700 ,Group Modifier Bit 700" "0,1"
bitfld.long 0x00 27. "  GMB699 ,Group Modifier Bit 699" "0,1"
bitfld.long 0x00 26. "  GMB698 ,Group Modifier Bit 698" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB697 ,Group Modifier Bit 697" "0,1"
bitfld.long 0x00 24. "  GMB696 ,Group Modifier Bit 696" "0,1"
bitfld.long 0x00 23. "  GMB695 ,Group Modifier Bit 695" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB694 ,Group Modifier Bit 694" "0,1"
bitfld.long 0x00 21. "  GMB693 ,Group Modifier Bit 693" "0,1"
bitfld.long 0x00 20. "  GMB692 ,Group Modifier Bit 692" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB691 ,Group Modifier Bit 691" "0,1"
bitfld.long 0x00 18. "  GMB690 ,Group Modifier Bit 690" "0,1"
bitfld.long 0x00 17. "  GMB689 ,Group Modifier Bit 689" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB688 ,Group Modifier Bit 688" "0,1"
bitfld.long 0x00 15. "  GMB687 ,Group Modifier Bit 687" "0,1"
bitfld.long 0x00 14. "  GMB686 ,Group Modifier Bit 686" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB685 ,Group Modifier Bit 685" "0,1"
bitfld.long 0x00 12. "  GMB684 ,Group Modifier Bit 684" "0,1"
bitfld.long 0x00 11. "  GMB683 ,Group Modifier Bit 683" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB682 ,Group Modifier Bit 682" "0,1"
bitfld.long 0x00 9. "  GMB681 ,Group Modifier Bit 681" "0,1"
bitfld.long 0x00 8. "  GMB680 ,Group Modifier Bit 680" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB679 ,Group Modifier Bit 679" "0,1"
bitfld.long 0x00 6. "  GMB678 ,Group Modifier Bit 678" "0,1"
bitfld.long 0x00 5. "  GMB677 ,Group Modifier Bit 677" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB676 ,Group Modifier Bit 676" "0,1"
bitfld.long 0x00 3. "  GMB675 ,Group Modifier Bit 675" "0,1"
bitfld.long 0x00 2. "  GMB674 ,Group Modifier Bit 674" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB673 ,Group Modifier Bit 673" "0,1"
bitfld.long 0x00 0. "  GMB672 ,Group Modifier Bit 672" "0,1"
else
hgroup.long 0x0D54++0x03
hide.long 0x0 "GICD_IGRPMODR21,Interrupt Group Modifier Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D58))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16))
group.long 0x0D58++0x03
line.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
bitfld.long 0x00 31. " GMB735 ,Group Modifier Bit 735" "0,1"
bitfld.long 0x00 30. "  GMB734 ,Group Modifier Bit 734" "0,1"
bitfld.long 0x00 29. "  GMB733 ,Group Modifier Bit 733" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB732 ,Group Modifier Bit 732" "0,1"
bitfld.long 0x00 27. "  GMB731 ,Group Modifier Bit 731" "0,1"
bitfld.long 0x00 26. "  GMB730 ,Group Modifier Bit 730" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB729 ,Group Modifier Bit 729" "0,1"
bitfld.long 0x00 24. "  GMB728 ,Group Modifier Bit 728" "0,1"
bitfld.long 0x00 23. "  GMB727 ,Group Modifier Bit 727" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB726 ,Group Modifier Bit 726" "0,1"
bitfld.long 0x00 21. "  GMB725 ,Group Modifier Bit 725" "0,1"
bitfld.long 0x00 20. "  GMB724 ,Group Modifier Bit 724" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB723 ,Group Modifier Bit 723" "0,1"
bitfld.long 0x00 18. "  GMB722 ,Group Modifier Bit 722" "0,1"
bitfld.long 0x00 17. "  GMB721 ,Group Modifier Bit 721" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB720 ,Group Modifier Bit 720" "0,1"
bitfld.long 0x00 15. "  GMB719 ,Group Modifier Bit 719" "0,1"
bitfld.long 0x00 14. "  GMB718 ,Group Modifier Bit 718" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB717 ,Group Modifier Bit 717" "0,1"
bitfld.long 0x00 12. "  GMB716 ,Group Modifier Bit 716" "0,1"
bitfld.long 0x00 11. "  GMB715 ,Group Modifier Bit 715" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB714 ,Group Modifier Bit 714" "0,1"
bitfld.long 0x00 9. "  GMB713 ,Group Modifier Bit 713" "0,1"
bitfld.long 0x00 8. "  GMB712 ,Group Modifier Bit 712" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB711 ,Group Modifier Bit 711" "0,1"
bitfld.long 0x00 6. "  GMB710 ,Group Modifier Bit 710" "0,1"
bitfld.long 0x00 5. "  GMB709 ,Group Modifier Bit 709" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB708 ,Group Modifier Bit 708" "0,1"
bitfld.long 0x00 3. "  GMB707 ,Group Modifier Bit 707" "0,1"
bitfld.long 0x00 2. "  GMB706 ,Group Modifier Bit 706" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB705 ,Group Modifier Bit 705" "0,1"
bitfld.long 0x00 0. "  GMB704 ,Group Modifier Bit 704" "0,1"
else
hgroup.long 0x0D58++0x03
hide.long 0x0 "GICD_IGRPMODR22,Interrupt Group Modifier Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D5C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17))
group.long 0x0D5C++0x03
line.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
bitfld.long 0x00 31. " GMB767 ,Group Modifier Bit 767" "0,1"
bitfld.long 0x00 30. "  GMB766 ,Group Modifier Bit 766" "0,1"
bitfld.long 0x00 29. "  GMB765 ,Group Modifier Bit 765" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB764 ,Group Modifier Bit 764" "0,1"
bitfld.long 0x00 27. "  GMB763 ,Group Modifier Bit 763" "0,1"
bitfld.long 0x00 26. "  GMB762 ,Group Modifier Bit 762" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB761 ,Group Modifier Bit 761" "0,1"
bitfld.long 0x00 24. "  GMB760 ,Group Modifier Bit 760" "0,1"
bitfld.long 0x00 23. "  GMB759 ,Group Modifier Bit 759" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB758 ,Group Modifier Bit 758" "0,1"
bitfld.long 0x00 21. "  GMB757 ,Group Modifier Bit 757" "0,1"
bitfld.long 0x00 20. "  GMB756 ,Group Modifier Bit 756" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB755 ,Group Modifier Bit 755" "0,1"
bitfld.long 0x00 18. "  GMB754 ,Group Modifier Bit 754" "0,1"
bitfld.long 0x00 17. "  GMB753 ,Group Modifier Bit 753" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB752 ,Group Modifier Bit 752" "0,1"
bitfld.long 0x00 15. "  GMB751 ,Group Modifier Bit 751" "0,1"
bitfld.long 0x00 14. "  GMB750 ,Group Modifier Bit 750" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB749 ,Group Modifier Bit 749" "0,1"
bitfld.long 0x00 12. "  GMB748 ,Group Modifier Bit 748" "0,1"
bitfld.long 0x00 11. "  GMB747 ,Group Modifier Bit 747" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB746 ,Group Modifier Bit 746" "0,1"
bitfld.long 0x00 9. "  GMB745 ,Group Modifier Bit 745" "0,1"
bitfld.long 0x00 8. "  GMB744 ,Group Modifier Bit 744" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB743 ,Group Modifier Bit 743" "0,1"
bitfld.long 0x00 6. "  GMB742 ,Group Modifier Bit 742" "0,1"
bitfld.long 0x00 5. "  GMB741 ,Group Modifier Bit 741" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB740 ,Group Modifier Bit 740" "0,1"
bitfld.long 0x00 3. "  GMB739 ,Group Modifier Bit 739" "0,1"
bitfld.long 0x00 2. "  GMB738 ,Group Modifier Bit 738" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB737 ,Group Modifier Bit 737" "0,1"
bitfld.long 0x00 0. "  GMB736 ,Group Modifier Bit 736" "0,1"
else
hgroup.long 0x0D5C++0x03
hide.long 0x0 "GICD_IGRPMODR23,Interrupt Group Modifier Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D60))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18))
group.long 0x0D60++0x03
line.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
bitfld.long 0x00 31. " GMB799 ,Group Modifier Bit 799" "0,1"
bitfld.long 0x00 30. "  GMB798 ,Group Modifier Bit 798" "0,1"
bitfld.long 0x00 29. "  GMB797 ,Group Modifier Bit 797" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB796 ,Group Modifier Bit 796" "0,1"
bitfld.long 0x00 27. "  GMB795 ,Group Modifier Bit 795" "0,1"
bitfld.long 0x00 26. "  GMB794 ,Group Modifier Bit 794" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB793 ,Group Modifier Bit 793" "0,1"
bitfld.long 0x00 24. "  GMB792 ,Group Modifier Bit 792" "0,1"
bitfld.long 0x00 23. "  GMB791 ,Group Modifier Bit 791" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB790 ,Group Modifier Bit 790" "0,1"
bitfld.long 0x00 21. "  GMB789 ,Group Modifier Bit 789" "0,1"
bitfld.long 0x00 20. "  GMB788 ,Group Modifier Bit 788" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB787 ,Group Modifier Bit 787" "0,1"
bitfld.long 0x00 18. "  GMB786 ,Group Modifier Bit 786" "0,1"
bitfld.long 0x00 17. "  GMB785 ,Group Modifier Bit 785" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB784 ,Group Modifier Bit 784" "0,1"
bitfld.long 0x00 15. "  GMB783 ,Group Modifier Bit 783" "0,1"
bitfld.long 0x00 14. "  GMB782 ,Group Modifier Bit 782" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB781 ,Group Modifier Bit 781" "0,1"
bitfld.long 0x00 12. "  GMB780 ,Group Modifier Bit 780" "0,1"
bitfld.long 0x00 11. "  GMB779 ,Group Modifier Bit 779" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB778 ,Group Modifier Bit 778" "0,1"
bitfld.long 0x00 9. "  GMB777 ,Group Modifier Bit 777" "0,1"
bitfld.long 0x00 8. "  GMB776 ,Group Modifier Bit 776" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB775 ,Group Modifier Bit 775" "0,1"
bitfld.long 0x00 6. "  GMB774 ,Group Modifier Bit 774" "0,1"
bitfld.long 0x00 5. "  GMB773 ,Group Modifier Bit 773" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB772 ,Group Modifier Bit 772" "0,1"
bitfld.long 0x00 3. "  GMB771 ,Group Modifier Bit 771" "0,1"
bitfld.long 0x00 2. "  GMB770 ,Group Modifier Bit 770" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB769 ,Group Modifier Bit 769" "0,1"
bitfld.long 0x00 0. "  GMB768 ,Group Modifier Bit 768" "0,1"
else
hgroup.long 0x0D60++0x03
hide.long 0x0 "GICD_IGRPMODR24,Interrupt Group Modifier Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D64))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19))
group.long 0x0D64++0x03
line.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
bitfld.long 0x00 31. " GMB831 ,Group Modifier Bit 831" "0,1"
bitfld.long 0x00 30. "  GMB830 ,Group Modifier Bit 830" "0,1"
bitfld.long 0x00 29. "  GMB829 ,Group Modifier Bit 829" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB828 ,Group Modifier Bit 828" "0,1"
bitfld.long 0x00 27. "  GMB827 ,Group Modifier Bit 827" "0,1"
bitfld.long 0x00 26. "  GMB826 ,Group Modifier Bit 826" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB825 ,Group Modifier Bit 825" "0,1"
bitfld.long 0x00 24. "  GMB824 ,Group Modifier Bit 824" "0,1"
bitfld.long 0x00 23. "  GMB823 ,Group Modifier Bit 823" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB822 ,Group Modifier Bit 822" "0,1"
bitfld.long 0x00 21. "  GMB821 ,Group Modifier Bit 821" "0,1"
bitfld.long 0x00 20. "  GMB820 ,Group Modifier Bit 820" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB819 ,Group Modifier Bit 819" "0,1"
bitfld.long 0x00 18. "  GMB818 ,Group Modifier Bit 818" "0,1"
bitfld.long 0x00 17. "  GMB817 ,Group Modifier Bit 817" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB816 ,Group Modifier Bit 816" "0,1"
bitfld.long 0x00 15. "  GMB815 ,Group Modifier Bit 815" "0,1"
bitfld.long 0x00 14. "  GMB814 ,Group Modifier Bit 814" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB813 ,Group Modifier Bit 813" "0,1"
bitfld.long 0x00 12. "  GMB812 ,Group Modifier Bit 812" "0,1"
bitfld.long 0x00 11. "  GMB811 ,Group Modifier Bit 811" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB810 ,Group Modifier Bit 810" "0,1"
bitfld.long 0x00 9. "  GMB809 ,Group Modifier Bit 809" "0,1"
bitfld.long 0x00 8. "  GMB808 ,Group Modifier Bit 808" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB807 ,Group Modifier Bit 807" "0,1"
bitfld.long 0x00 6. "  GMB806 ,Group Modifier Bit 806" "0,1"
bitfld.long 0x00 5. "  GMB805 ,Group Modifier Bit 805" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB804 ,Group Modifier Bit 804" "0,1"
bitfld.long 0x00 3. "  GMB803 ,Group Modifier Bit 803" "0,1"
bitfld.long 0x00 2. "  GMB802 ,Group Modifier Bit 802" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB801 ,Group Modifier Bit 801" "0,1"
bitfld.long 0x00 0. "  GMB800 ,Group Modifier Bit 800" "0,1"
else
hgroup.long 0x0D64++0x03
hide.long 0x0 "GICD_IGRPMODR25,Interrupt Group Modifier Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D68))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01A))
group.long 0x0D68++0x03
line.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
bitfld.long 0x00 31. " GMB863 ,Group Modifier Bit 863" "0,1"
bitfld.long 0x00 30. "  GMB862 ,Group Modifier Bit 862" "0,1"
bitfld.long 0x00 29. "  GMB861 ,Group Modifier Bit 861" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB860 ,Group Modifier Bit 860" "0,1"
bitfld.long 0x00 27. "  GMB859 ,Group Modifier Bit 859" "0,1"
bitfld.long 0x00 26. "  GMB858 ,Group Modifier Bit 858" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB857 ,Group Modifier Bit 857" "0,1"
bitfld.long 0x00 24. "  GMB856 ,Group Modifier Bit 856" "0,1"
bitfld.long 0x00 23. "  GMB855 ,Group Modifier Bit 855" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB854 ,Group Modifier Bit 854" "0,1"
bitfld.long 0x00 21. "  GMB853 ,Group Modifier Bit 853" "0,1"
bitfld.long 0x00 20. "  GMB852 ,Group Modifier Bit 852" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB851 ,Group Modifier Bit 851" "0,1"
bitfld.long 0x00 18. "  GMB850 ,Group Modifier Bit 850" "0,1"
bitfld.long 0x00 17. "  GMB849 ,Group Modifier Bit 849" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB848 ,Group Modifier Bit 848" "0,1"
bitfld.long 0x00 15. "  GMB847 ,Group Modifier Bit 847" "0,1"
bitfld.long 0x00 14. "  GMB846 ,Group Modifier Bit 846" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB845 ,Group Modifier Bit 845" "0,1"
bitfld.long 0x00 12. "  GMB844 ,Group Modifier Bit 844" "0,1"
bitfld.long 0x00 11. "  GMB843 ,Group Modifier Bit 843" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB842 ,Group Modifier Bit 842" "0,1"
bitfld.long 0x00 9. "  GMB841 ,Group Modifier Bit 841" "0,1"
bitfld.long 0x00 8. "  GMB840 ,Group Modifier Bit 840" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB839 ,Group Modifier Bit 839" "0,1"
bitfld.long 0x00 6. "  GMB838 ,Group Modifier Bit 838" "0,1"
bitfld.long 0x00 5. "  GMB837 ,Group Modifier Bit 837" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB836 ,Group Modifier Bit 836" "0,1"
bitfld.long 0x00 3. "  GMB835 ,Group Modifier Bit 835" "0,1"
bitfld.long 0x00 2. "  GMB834 ,Group Modifier Bit 834" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB833 ,Group Modifier Bit 833" "0,1"
bitfld.long 0x00 0. "  GMB832 ,Group Modifier Bit 832" "0,1"
else
hgroup.long 0x0D68++0x03
hide.long 0x0 "GICD_IGRPMODR26,Interrupt Group Modifier Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D6C))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B))
group.long 0x0D6C++0x03
line.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
bitfld.long 0x00 31. " GMB895 ,Group Modifier Bit 895" "0,1"
bitfld.long 0x00 30. "  GMB894 ,Group Modifier Bit 894" "0,1"
bitfld.long 0x00 29. "  GMB893 ,Group Modifier Bit 893" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB892 ,Group Modifier Bit 892" "0,1"
bitfld.long 0x00 27. "  GMB891 ,Group Modifier Bit 891" "0,1"
bitfld.long 0x00 26. "  GMB890 ,Group Modifier Bit 890" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB889 ,Group Modifier Bit 889" "0,1"
bitfld.long 0x00 24. "  GMB888 ,Group Modifier Bit 888" "0,1"
bitfld.long 0x00 23. "  GMB887 ,Group Modifier Bit 887" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB886 ,Group Modifier Bit 886" "0,1"
bitfld.long 0x00 21. "  GMB885 ,Group Modifier Bit 885" "0,1"
bitfld.long 0x00 20. "  GMB884 ,Group Modifier Bit 884" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB883 ,Group Modifier Bit 883" "0,1"
bitfld.long 0x00 18. "  GMB882 ,Group Modifier Bit 882" "0,1"
bitfld.long 0x00 17. "  GMB881 ,Group Modifier Bit 881" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB880 ,Group Modifier Bit 880" "0,1"
bitfld.long 0x00 15. "  GMB879 ,Group Modifier Bit 879" "0,1"
bitfld.long 0x00 14. "  GMB878 ,Group Modifier Bit 878" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB877 ,Group Modifier Bit 877" "0,1"
bitfld.long 0x00 12. "  GMB876 ,Group Modifier Bit 876" "0,1"
bitfld.long 0x00 11. "  GMB875 ,Group Modifier Bit 875" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB874 ,Group Modifier Bit 874" "0,1"
bitfld.long 0x00 9. "  GMB873 ,Group Modifier Bit 873" "0,1"
bitfld.long 0x00 8. "  GMB872 ,Group Modifier Bit 872" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB871 ,Group Modifier Bit 871" "0,1"
bitfld.long 0x00 6. "  GMB870 ,Group Modifier Bit 870" "0,1"
bitfld.long 0x00 5. "  GMB869 ,Group Modifier Bit 869" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB868 ,Group Modifier Bit 868" "0,1"
bitfld.long 0x00 3. "  GMB867 ,Group Modifier Bit 867" "0,1"
bitfld.long 0x00 2. "  GMB866 ,Group Modifier Bit 866" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB865 ,Group Modifier Bit 865" "0,1"
bitfld.long 0x00 0. "  GMB864 ,Group Modifier Bit 864" "0,1"
else
hgroup.long 0x0D6C++0x03
hide.long 0x0 "GICD_IGRPMODR27,Interrupt Group Modifier Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D70))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C))
group.long 0x0D70++0x03
line.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
bitfld.long 0x00 31. " GMB927 ,Group Modifier Bit 927" "0,1"
bitfld.long 0x00 30. "  GMB926 ,Group Modifier Bit 926" "0,1"
bitfld.long 0x00 29. "  GMB925 ,Group Modifier Bit 925" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB924 ,Group Modifier Bit 924" "0,1"
bitfld.long 0x00 27. "  GMB923 ,Group Modifier Bit 923" "0,1"
bitfld.long 0x00 26. "  GMB922 ,Group Modifier Bit 922" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB921 ,Group Modifier Bit 921" "0,1"
bitfld.long 0x00 24. "  GMB920 ,Group Modifier Bit 920" "0,1"
bitfld.long 0x00 23. "  GMB919 ,Group Modifier Bit 919" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB918 ,Group Modifier Bit 918" "0,1"
bitfld.long 0x00 21. "  GMB917 ,Group Modifier Bit 917" "0,1"
bitfld.long 0x00 20. "  GMB916 ,Group Modifier Bit 916" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB915 ,Group Modifier Bit 915" "0,1"
bitfld.long 0x00 18. "  GMB914 ,Group Modifier Bit 914" "0,1"
bitfld.long 0x00 17. "  GMB913 ,Group Modifier Bit 913" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB912 ,Group Modifier Bit 912" "0,1"
bitfld.long 0x00 15. "  GMB911 ,Group Modifier Bit 911" "0,1"
bitfld.long 0x00 14. "  GMB910 ,Group Modifier Bit 910" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB909 ,Group Modifier Bit 909" "0,1"
bitfld.long 0x00 12. "  GMB908 ,Group Modifier Bit 908" "0,1"
bitfld.long 0x00 11. "  GMB907 ,Group Modifier Bit 907" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB906 ,Group Modifier Bit 906" "0,1"
bitfld.long 0x00 9. "  GMB905 ,Group Modifier Bit 905" "0,1"
bitfld.long 0x00 8. "  GMB904 ,Group Modifier Bit 904" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB903 ,Group Modifier Bit 903" "0,1"
bitfld.long 0x00 6. "  GMB902 ,Group Modifier Bit 902" "0,1"
bitfld.long 0x00 5. "  GMB901 ,Group Modifier Bit 901" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB900 ,Group Modifier Bit 900" "0,1"
bitfld.long 0x00 3. "  GMB899 ,Group Modifier Bit 899" "0,1"
bitfld.long 0x00 2. "  GMB898 ,Group Modifier Bit 898" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB897 ,Group Modifier Bit 897" "0,1"
bitfld.long 0x00 0. "  GMB896 ,Group Modifier Bit 896" "0,1"
else
hgroup.long 0x0D70++0x03
hide.long 0x0 "GICD_IGRPMODR28,Interrupt Group Modifier Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D74))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D))
group.long 0x0D74++0x03
line.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
bitfld.long 0x00 31. " GMB959 ,Group Modifier Bit 959" "0,1"
bitfld.long 0x00 30. "  GMB958 ,Group Modifier Bit 958" "0,1"
bitfld.long 0x00 29. "  GMB957 ,Group Modifier Bit 957" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB956 ,Group Modifier Bit 956" "0,1"
bitfld.long 0x00 27. "  GMB955 ,Group Modifier Bit 955" "0,1"
bitfld.long 0x00 26. "  GMB954 ,Group Modifier Bit 954" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB953 ,Group Modifier Bit 953" "0,1"
bitfld.long 0x00 24. "  GMB952 ,Group Modifier Bit 952" "0,1"
bitfld.long 0x00 23. "  GMB951 ,Group Modifier Bit 951" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB950 ,Group Modifier Bit 950" "0,1"
bitfld.long 0x00 21. "  GMB949 ,Group Modifier Bit 949" "0,1"
bitfld.long 0x00 20. "  GMB948 ,Group Modifier Bit 948" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB947 ,Group Modifier Bit 947" "0,1"
bitfld.long 0x00 18. "  GMB946 ,Group Modifier Bit 946" "0,1"
bitfld.long 0x00 17. "  GMB945 ,Group Modifier Bit 945" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB944 ,Group Modifier Bit 944" "0,1"
bitfld.long 0x00 15. "  GMB943 ,Group Modifier Bit 943" "0,1"
bitfld.long 0x00 14. "  GMB942 ,Group Modifier Bit 942" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB941 ,Group Modifier Bit 941" "0,1"
bitfld.long 0x00 12. "  GMB940 ,Group Modifier Bit 940" "0,1"
bitfld.long 0x00 11. "  GMB939 ,Group Modifier Bit 939" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB938 ,Group Modifier Bit 938" "0,1"
bitfld.long 0x00 9. "  GMB937 ,Group Modifier Bit 937" "0,1"
bitfld.long 0x00 8. "  GMB936 ,Group Modifier Bit 936" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB935 ,Group Modifier Bit 935" "0,1"
bitfld.long 0x00 6. "  GMB934 ,Group Modifier Bit 934" "0,1"
bitfld.long 0x00 5. "  GMB933 ,Group Modifier Bit 933" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB932 ,Group Modifier Bit 932" "0,1"
bitfld.long 0x00 3. "  GMB931 ,Group Modifier Bit 931" "0,1"
bitfld.long 0x00 2. "  GMB930 ,Group Modifier Bit 930" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB929 ,Group Modifier Bit 929" "0,1"
bitfld.long 0x00 0. "  GMB928 ,Group Modifier Bit 928" "0,1"
else
hgroup.long 0x0D74++0x03
hide.long 0x0 "GICD_IGRPMODR29,Interrupt Group Modifier Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0x0D78))&&(((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E))
group.long 0x0D78++0x03
line.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
bitfld.long 0x00 31. " GMB991 ,Group Modifier Bit 991" "0,1"
bitfld.long 0x00 30. "  GMB990 ,Group Modifier Bit 990" "0,1"
bitfld.long 0x00 29. "  GMB989 ,Group Modifier Bit 989" "0,1"
textline "                          "
bitfld.long 0x00 28. " GMB988 ,Group Modifier Bit 988" "0,1"
bitfld.long 0x00 27. "  GMB987 ,Group Modifier Bit 987" "0,1"
bitfld.long 0x00 26. "  GMB986 ,Group Modifier Bit 986" "0,1"
textline "                          "
bitfld.long 0x00 25. " GMB985 ,Group Modifier Bit 985" "0,1"
bitfld.long 0x00 24. "  GMB984 ,Group Modifier Bit 984" "0,1"
bitfld.long 0x00 23. "  GMB983 ,Group Modifier Bit 983" "0,1"
textline "                          "
bitfld.long 0x00 22. " GMB982 ,Group Modifier Bit 982" "0,1"
bitfld.long 0x00 21. "  GMB981 ,Group Modifier Bit 981" "0,1"
bitfld.long 0x00 20. "  GMB980 ,Group Modifier Bit 980" "0,1"
textline "                          "
bitfld.long 0x00 19. " GMB979 ,Group Modifier Bit 979" "0,1"
bitfld.long 0x00 18. "  GMB978 ,Group Modifier Bit 978" "0,1"
bitfld.long 0x00 17. "  GMB977 ,Group Modifier Bit 977" "0,1"
textline "                          "
bitfld.long 0x00 16. " GMB976 ,Group Modifier Bit 976" "0,1"
bitfld.long 0x00 15. "  GMB975 ,Group Modifier Bit 975" "0,1"
bitfld.long 0x00 14. "  GMB974 ,Group Modifier Bit 974" "0,1"
textline "                          "
bitfld.long 0x00 13. " GMB973 ,Group Modifier Bit 973" "0,1"
bitfld.long 0x00 12. "  GMB972 ,Group Modifier Bit 972" "0,1"
bitfld.long 0x00 11. "  GMB971 ,Group Modifier Bit 971" "0,1"
textline "                          "
bitfld.long 0x00 10. " GMB970 ,Group Modifier Bit 970" "0,1"
bitfld.long 0x00 9. "  GMB969 ,Group Modifier Bit 969" "0,1"
bitfld.long 0x00 8. "  GMB968 ,Group Modifier Bit 968" "0,1"
textline "                          "
bitfld.long 0x00 7. " GMB967 ,Group Modifier Bit 967" "0,1"
bitfld.long 0x00 6. "  GMB966 ,Group Modifier Bit 966" "0,1"
bitfld.long 0x00 5. "  GMB965 ,Group Modifier Bit 965" "0,1"
textline "                          "
bitfld.long 0x00 4. " GMB964 ,Group Modifier Bit 964" "0,1"
bitfld.long 0x00 3. "  GMB963 ,Group Modifier Bit 963" "0,1"
bitfld.long 0x00 2. "  GMB962 ,Group Modifier Bit 962" "0,1"
textline "                          "
bitfld.long 0x00 1. " GMB961 ,Group Modifier Bit 961" "0,1"
bitfld.long 0x00 0. "  GMB960 ,Group Modifier Bit 960" "0,1"
else
hgroup.long 0x0D78++0x03
hide.long 0x0 "GICD_IGRPMODR30,Interrupt Group Modifier Register 30"
endif
tree.end
width 14.
tree "Non-secure Access Control Registers"
hgroup.long 0x0E00++0x03
hide.long 0x00 "GICD_NSACR0,Non-secure Access Control Register 0"
hgroup.long 0xE04++0x03
hide.long 0x00 "GICD_NSACR1,Non-secure Access Control Register 1"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE08)))
group.long 0xE08++0x03
line.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
bitfld.long 0x00 30.--31. " NS_ACCESS47  ,Controls Non-secure access of the interrupt with ID47 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS46  ,Controls Non-secure access of the interrupt with ID46 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS45  ,Controls Non-secure access of the interrupt with ID45 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS44  ,Controls Non-secure access of the interrupt with ID44 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS43  ,Controls Non-secure access of the interrupt with ID43 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS42  ,Controls Non-secure access of the interrupt with ID42 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS41  ,Controls Non-secure access of the interrupt with ID41 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS40  ,Controls Non-secure access of the interrupt with ID40 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS39  ,Controls Non-secure access of the interrupt with ID39 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS38  ,Controls Non-secure access of the interrupt with ID38 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS37  ,Controls Non-secure access of the interrupt with ID37 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS36  ,Controls Non-secure access of the interrupt with ID36 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS35  ,Controls Non-secure access of the interrupt with ID35 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS34  ,Controls Non-secure access of the interrupt with ID34 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS33  ,Controls Non-secure access of the interrupt with ID33 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS32  ,Controls Non-secure access of the interrupt with ID32 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE08++0x03
hide.long 0x00 "GICD_NSACR2,Non-secure Access Control Register 2"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE0C)))
group.long 0xE0C++0x03
line.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
bitfld.long 0x00 30.--31. " NS_ACCESS63  ,Controls Non-secure access of the interrupt with ID63 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS62  ,Controls Non-secure access of the interrupt with ID62 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS61  ,Controls Non-secure access of the interrupt with ID61 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS60  ,Controls Non-secure access of the interrupt with ID60 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS59  ,Controls Non-secure access of the interrupt with ID59 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS58  ,Controls Non-secure access of the interrupt with ID58 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS57  ,Controls Non-secure access of the interrupt with ID57 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS56  ,Controls Non-secure access of the interrupt with ID56 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS55  ,Controls Non-secure access of the interrupt with ID55 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS54  ,Controls Non-secure access of the interrupt with ID54 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS53  ,Controls Non-secure access of the interrupt with ID53 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS52  ,Controls Non-secure access of the interrupt with ID52 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS51  ,Controls Non-secure access of the interrupt with ID51 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS50  ,Controls Non-secure access of the interrupt with ID50 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS49  ,Controls Non-secure access of the interrupt with ID49 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS48  ,Controls Non-secure access of the interrupt with ID48 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE0C++0x03
hide.long 0x00 "GICD_NSACR3,Non-secure Access Control Register 3"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE10)))
group.long 0xE10++0x03
line.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
bitfld.long 0x00 30.--31. " NS_ACCESS79  ,Controls Non-secure access of the interrupt with ID79 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS78  ,Controls Non-secure access of the interrupt with ID78 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS77  ,Controls Non-secure access of the interrupt with ID77 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS76  ,Controls Non-secure access of the interrupt with ID76 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS75  ,Controls Non-secure access of the interrupt with ID75 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS74  ,Controls Non-secure access of the interrupt with ID74 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS73  ,Controls Non-secure access of the interrupt with ID73 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS72  ,Controls Non-secure access of the interrupt with ID72 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS71  ,Controls Non-secure access of the interrupt with ID71 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS70  ,Controls Non-secure access of the interrupt with ID70 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS69  ,Controls Non-secure access of the interrupt with ID69 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS68  ,Controls Non-secure access of the interrupt with ID68 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS67  ,Controls Non-secure access of the interrupt with ID67 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS66  ,Controls Non-secure access of the interrupt with ID66 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS65  ,Controls Non-secure access of the interrupt with ID65 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS64  ,Controls Non-secure access of the interrupt with ID64 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE10++0x03
hide.long 0x00 "GICD_NSACR4,Non-secure Access Control Register 4"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE14)))
group.long 0xE14++0x03
line.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
bitfld.long 0x00 30.--31. " NS_ACCESS95  ,Controls Non-secure access of the interrupt with ID95 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS94  ,Controls Non-secure access of the interrupt with ID94 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS93  ,Controls Non-secure access of the interrupt with ID93 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS92  ,Controls Non-secure access of the interrupt with ID92 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS91  ,Controls Non-secure access of the interrupt with ID91 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS90  ,Controls Non-secure access of the interrupt with ID90 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS89  ,Controls Non-secure access of the interrupt with ID89 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS88  ,Controls Non-secure access of the interrupt with ID88 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS87  ,Controls Non-secure access of the interrupt with ID87 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS86  ,Controls Non-secure access of the interrupt with ID86 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS85  ,Controls Non-secure access of the interrupt with ID85 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS84  ,Controls Non-secure access of the interrupt with ID84 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS83  ,Controls Non-secure access of the interrupt with ID83 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS82  ,Controls Non-secure access of the interrupt with ID82 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS81  ,Controls Non-secure access of the interrupt with ID81 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS80  ,Controls Non-secure access of the interrupt with ID80 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE14++0x03
hide.long 0x00 "GICD_NSACR5,Non-secure Access Control Register 5"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE18)))
group.long 0xE18++0x03
line.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
bitfld.long 0x00 30.--31. " NS_ACCESS111 ,Controls Non-secure access of the interrupt with ID111" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS110 ,Controls Non-secure access of the interrupt with ID110" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS109 ,Controls Non-secure access of the interrupt with ID109" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS108 ,Controls Non-secure access of the interrupt with ID108" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS107 ,Controls Non-secure access of the interrupt with ID107" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS106 ,Controls Non-secure access of the interrupt with ID106" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS105 ,Controls Non-secure access of the interrupt with ID105" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS104 ,Controls Non-secure access of the interrupt with ID104" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS103 ,Controls Non-secure access of the interrupt with ID103" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS102 ,Controls Non-secure access of the interrupt with ID102" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS101 ,Controls Non-secure access of the interrupt with ID101" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS100 ,Controls Non-secure access of the interrupt with ID100" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS99  ,Controls Non-secure access of the interrupt with ID99 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS98  ,Controls Non-secure access of the interrupt with ID98 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS97  ,Controls Non-secure access of the interrupt with ID97 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS96  ,Controls Non-secure access of the interrupt with ID96 " "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE18++0x03
hide.long 0x00 "GICD_NSACR6,Non-secure Access Control Register 6"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE1C)))
group.long 0xE1C++0x03
line.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
bitfld.long 0x00 30.--31. " NS_ACCESS127 ,Controls Non-secure access of the interrupt with ID127" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS126 ,Controls Non-secure access of the interrupt with ID126" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS125 ,Controls Non-secure access of the interrupt with ID125" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS124 ,Controls Non-secure access of the interrupt with ID124" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS123 ,Controls Non-secure access of the interrupt with ID123" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS122 ,Controls Non-secure access of the interrupt with ID122" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS121 ,Controls Non-secure access of the interrupt with ID121" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS120 ,Controls Non-secure access of the interrupt with ID120" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS119 ,Controls Non-secure access of the interrupt with ID119" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS118 ,Controls Non-secure access of the interrupt with ID118" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS117 ,Controls Non-secure access of the interrupt with ID117" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS116 ,Controls Non-secure access of the interrupt with ID116" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS115 ,Controls Non-secure access of the interrupt with ID115" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS114 ,Controls Non-secure access of the interrupt with ID114" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS113 ,Controls Non-secure access of the interrupt with ID113" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS112 ,Controls Non-secure access of the interrupt with ID112" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE1C++0x03
hide.long 0x00 "GICD_NSACR7,Non-secure Access Control Register 7"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE20)))
group.long 0xE20++0x03
line.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
bitfld.long 0x00 30.--31. " NS_ACCESS143 ,Controls Non-secure access of the interrupt with ID143" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS142 ,Controls Non-secure access of the interrupt with ID142" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS141 ,Controls Non-secure access of the interrupt with ID141" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS140 ,Controls Non-secure access of the interrupt with ID140" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS139 ,Controls Non-secure access of the interrupt with ID139" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS138 ,Controls Non-secure access of the interrupt with ID138" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS137 ,Controls Non-secure access of the interrupt with ID137" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS136 ,Controls Non-secure access of the interrupt with ID136" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS135 ,Controls Non-secure access of the interrupt with ID135" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS134 ,Controls Non-secure access of the interrupt with ID134" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS133 ,Controls Non-secure access of the interrupt with ID133" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS132 ,Controls Non-secure access of the interrupt with ID132" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS131 ,Controls Non-secure access of the interrupt with ID131" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS130 ,Controls Non-secure access of the interrupt with ID130" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS129 ,Controls Non-secure access of the interrupt with ID129" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS128 ,Controls Non-secure access of the interrupt with ID128" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE20++0x03
hide.long 0x00 "GICD_NSACR8,Non-secure Access Control Register 8"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE24)))
group.long 0xE24++0x03
line.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
bitfld.long 0x00 30.--31. " NS_ACCESS159 ,Controls Non-secure access of the interrupt with ID159" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS158 ,Controls Non-secure access of the interrupt with ID158" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS157 ,Controls Non-secure access of the interrupt with ID157" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS156 ,Controls Non-secure access of the interrupt with ID156" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS155 ,Controls Non-secure access of the interrupt with ID155" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS154 ,Controls Non-secure access of the interrupt with ID154" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS153 ,Controls Non-secure access of the interrupt with ID153" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS152 ,Controls Non-secure access of the interrupt with ID152" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS151 ,Controls Non-secure access of the interrupt with ID151" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS150 ,Controls Non-secure access of the interrupt with ID150" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS149 ,Controls Non-secure access of the interrupt with ID149" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS148 ,Controls Non-secure access of the interrupt with ID148" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS147 ,Controls Non-secure access of the interrupt with ID147" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS146 ,Controls Non-secure access of the interrupt with ID146" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS145 ,Controls Non-secure access of the interrupt with ID145" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS144 ,Controls Non-secure access of the interrupt with ID144" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE24++0x03
hide.long 0x00 "GICD_NSACR9,Non-secure Access Control Register 9"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE28)))
group.long 0xE28++0x03
line.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
bitfld.long 0x00 30.--31. " NS_ACCESS175 ,Controls Non-secure access of the interrupt with ID175" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS174 ,Controls Non-secure access of the interrupt with ID174" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS173 ,Controls Non-secure access of the interrupt with ID173" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS172 ,Controls Non-secure access of the interrupt with ID172" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS171 ,Controls Non-secure access of the interrupt with ID171" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS170 ,Controls Non-secure access of the interrupt with ID170" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS169 ,Controls Non-secure access of the interrupt with ID169" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS168 ,Controls Non-secure access of the interrupt with ID168" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS167 ,Controls Non-secure access of the interrupt with ID167" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS166 ,Controls Non-secure access of the interrupt with ID166" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS165 ,Controls Non-secure access of the interrupt with ID165" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS164 ,Controls Non-secure access of the interrupt with ID164" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS163 ,Controls Non-secure access of the interrupt with ID163" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS162 ,Controls Non-secure access of the interrupt with ID162" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS161 ,Controls Non-secure access of the interrupt with ID161" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS160 ,Controls Non-secure access of the interrupt with ID160" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE28++0x03
hide.long 0x00 "GICD_NSACR10,Non-secure Access Control Register 10"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE2C)))
group.long 0xE2C++0x03
line.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
bitfld.long 0x00 30.--31. " NS_ACCESS191 ,Controls Non-secure access of the interrupt with ID191" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS190 ,Controls Non-secure access of the interrupt with ID190" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS189 ,Controls Non-secure access of the interrupt with ID189" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS188 ,Controls Non-secure access of the interrupt with ID188" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS187 ,Controls Non-secure access of the interrupt with ID187" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS186 ,Controls Non-secure access of the interrupt with ID186" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS185 ,Controls Non-secure access of the interrupt with ID185" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS184 ,Controls Non-secure access of the interrupt with ID184" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS183 ,Controls Non-secure access of the interrupt with ID183" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS182 ,Controls Non-secure access of the interrupt with ID182" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS181 ,Controls Non-secure access of the interrupt with ID181" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS180 ,Controls Non-secure access of the interrupt with ID180" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS179 ,Controls Non-secure access of the interrupt with ID179" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS178 ,Controls Non-secure access of the interrupt with ID178" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS177 ,Controls Non-secure access of the interrupt with ID177" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS176 ,Controls Non-secure access of the interrupt with ID176" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE2C++0x03
hide.long 0x00 "GICD_NSACR11,Non-secure Access Control Register 11"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE30)))
group.long 0xE30++0x03
line.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
bitfld.long 0x00 30.--31. " NS_ACCESS207 ,Controls Non-secure access of the interrupt with ID207" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS206 ,Controls Non-secure access of the interrupt with ID206" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS205 ,Controls Non-secure access of the interrupt with ID205" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS204 ,Controls Non-secure access of the interrupt with ID204" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS203 ,Controls Non-secure access of the interrupt with ID203" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS202 ,Controls Non-secure access of the interrupt with ID202" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS201 ,Controls Non-secure access of the interrupt with ID201" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS200 ,Controls Non-secure access of the interrupt with ID200" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS199 ,Controls Non-secure access of the interrupt with ID199" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS198 ,Controls Non-secure access of the interrupt with ID198" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS197 ,Controls Non-secure access of the interrupt with ID197" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS196 ,Controls Non-secure access of the interrupt with ID196" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS195 ,Controls Non-secure access of the interrupt with ID195" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS194 ,Controls Non-secure access of the interrupt with ID194" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS193 ,Controls Non-secure access of the interrupt with ID193" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS192 ,Controls Non-secure access of the interrupt with ID192" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE30++0x03
hide.long 0x00 "GICD_NSACR12,Non-secure Access Control Register 12"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE34)))
group.long 0xE34++0x03
line.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
bitfld.long 0x00 30.--31. " NS_ACCESS223 ,Controls Non-secure access of the interrupt with ID223" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS222 ,Controls Non-secure access of the interrupt with ID222" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS221 ,Controls Non-secure access of the interrupt with ID221" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS220 ,Controls Non-secure access of the interrupt with ID220" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS219 ,Controls Non-secure access of the interrupt with ID219" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS218 ,Controls Non-secure access of the interrupt with ID218" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS217 ,Controls Non-secure access of the interrupt with ID217" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS216 ,Controls Non-secure access of the interrupt with ID216" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS215 ,Controls Non-secure access of the interrupt with ID215" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS214 ,Controls Non-secure access of the interrupt with ID214" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS213 ,Controls Non-secure access of the interrupt with ID213" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS212 ,Controls Non-secure access of the interrupt with ID212" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS211 ,Controls Non-secure access of the interrupt with ID211" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS210 ,Controls Non-secure access of the interrupt with ID210" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS209 ,Controls Non-secure access of the interrupt with ID209" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS208 ,Controls Non-secure access of the interrupt with ID208" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE34++0x03
hide.long 0x00 "GICD_NSACR13,Non-secure Access Control Register 13"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE38)))
group.long 0xE38++0x03
line.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
bitfld.long 0x00 30.--31. " NS_ACCESS239 ,Controls Non-secure access of the interrupt with ID239" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS238 ,Controls Non-secure access of the interrupt with ID238" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS237 ,Controls Non-secure access of the interrupt with ID237" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS236 ,Controls Non-secure access of the interrupt with ID236" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS235 ,Controls Non-secure access of the interrupt with ID235" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS234 ,Controls Non-secure access of the interrupt with ID234" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS233 ,Controls Non-secure access of the interrupt with ID233" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS232 ,Controls Non-secure access of the interrupt with ID232" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS231 ,Controls Non-secure access of the interrupt with ID231" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS230 ,Controls Non-secure access of the interrupt with ID230" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS229 ,Controls Non-secure access of the interrupt with ID229" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS228 ,Controls Non-secure access of the interrupt with ID228" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS227 ,Controls Non-secure access of the interrupt with ID227" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS226 ,Controls Non-secure access of the interrupt with ID226" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS225 ,Controls Non-secure access of the interrupt with ID225" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS224 ,Controls Non-secure access of the interrupt with ID224" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE38++0x03
hide.long 0x00 "GICD_NSACR14,Non-secure Access Control Register 14"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE3C)))
group.long 0xE3C++0x03
line.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
bitfld.long 0x00 30.--31. " NS_ACCESS255 ,Controls Non-secure access of the interrupt with ID255" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS254 ,Controls Non-secure access of the interrupt with ID254" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS253 ,Controls Non-secure access of the interrupt with ID253" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS252 ,Controls Non-secure access of the interrupt with ID252" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS251 ,Controls Non-secure access of the interrupt with ID251" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS250 ,Controls Non-secure access of the interrupt with ID250" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS249 ,Controls Non-secure access of the interrupt with ID249" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS248 ,Controls Non-secure access of the interrupt with ID248" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS247 ,Controls Non-secure access of the interrupt with ID247" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS246 ,Controls Non-secure access of the interrupt with ID246" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS245 ,Controls Non-secure access of the interrupt with ID245" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS244 ,Controls Non-secure access of the interrupt with ID244" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS243 ,Controls Non-secure access of the interrupt with ID243" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS242 ,Controls Non-secure access of the interrupt with ID242" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS241 ,Controls Non-secure access of the interrupt with ID241" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS240 ,Controls Non-secure access of the interrupt with ID240" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE3C++0x03
hide.long 0x00 "GICD_NSACR15,Non-secure Access Control Register 15"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE40)))
group.long 0xE40++0x03
line.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
bitfld.long 0x00 30.--31. " NS_ACCESS271 ,Controls Non-secure access of the interrupt with ID271" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS270 ,Controls Non-secure access of the interrupt with ID270" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS269 ,Controls Non-secure access of the interrupt with ID269" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS268 ,Controls Non-secure access of the interrupt with ID268" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS267 ,Controls Non-secure access of the interrupt with ID267" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS266 ,Controls Non-secure access of the interrupt with ID266" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS265 ,Controls Non-secure access of the interrupt with ID265" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS264 ,Controls Non-secure access of the interrupt with ID264" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS263 ,Controls Non-secure access of the interrupt with ID263" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS262 ,Controls Non-secure access of the interrupt with ID262" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS261 ,Controls Non-secure access of the interrupt with ID261" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS260 ,Controls Non-secure access of the interrupt with ID260" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS259 ,Controls Non-secure access of the interrupt with ID259" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS258 ,Controls Non-secure access of the interrupt with ID258" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS257 ,Controls Non-secure access of the interrupt with ID257" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS256 ,Controls Non-secure access of the interrupt with ID256" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE40++0x03
hide.long 0x00 "GICD_NSACR16,Non-secure Access Control Register 16"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE44)))
group.long 0xE44++0x03
line.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
bitfld.long 0x00 30.--31. " NS_ACCESS287 ,Controls Non-secure access of the interrupt with ID287" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS286 ,Controls Non-secure access of the interrupt with ID286" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS285 ,Controls Non-secure access of the interrupt with ID285" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS284 ,Controls Non-secure access of the interrupt with ID284" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS283 ,Controls Non-secure access of the interrupt with ID283" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS282 ,Controls Non-secure access of the interrupt with ID282" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS281 ,Controls Non-secure access of the interrupt with ID281" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS280 ,Controls Non-secure access of the interrupt with ID280" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS279 ,Controls Non-secure access of the interrupt with ID279" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS278 ,Controls Non-secure access of the interrupt with ID278" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS277 ,Controls Non-secure access of the interrupt with ID277" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS276 ,Controls Non-secure access of the interrupt with ID276" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS275 ,Controls Non-secure access of the interrupt with ID275" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS274 ,Controls Non-secure access of the interrupt with ID274" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS273 ,Controls Non-secure access of the interrupt with ID273" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS272 ,Controls Non-secure access of the interrupt with ID272" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE44++0x03
hide.long 0x00 "GICD_NSACR17,Non-secure Access Control Register 17"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE48)))
group.long 0xE48++0x03
line.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
bitfld.long 0x00 30.--31. " NS_ACCESS303 ,Controls Non-secure access of the interrupt with ID303" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS302 ,Controls Non-secure access of the interrupt with ID302" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS301 ,Controls Non-secure access of the interrupt with ID301" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS300 ,Controls Non-secure access of the interrupt with ID300" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS299 ,Controls Non-secure access of the interrupt with ID299" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS298 ,Controls Non-secure access of the interrupt with ID298" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS297 ,Controls Non-secure access of the interrupt with ID297" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS296 ,Controls Non-secure access of the interrupt with ID296" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS295 ,Controls Non-secure access of the interrupt with ID295" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS294 ,Controls Non-secure access of the interrupt with ID294" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS293 ,Controls Non-secure access of the interrupt with ID293" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS292 ,Controls Non-secure access of the interrupt with ID292" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS291 ,Controls Non-secure access of the interrupt with ID291" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS290 ,Controls Non-secure access of the interrupt with ID290" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS289 ,Controls Non-secure access of the interrupt with ID289" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS288 ,Controls Non-secure access of the interrupt with ID288" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE48++0x03
hide.long 0x00 "GICD_NSACR18,Non-secure Access Control Register 18"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE4C)))
group.long 0xE4C++0x03
line.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
bitfld.long 0x00 30.--31. " NS_ACCESS319 ,Controls Non-secure access of the interrupt with ID319" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS318 ,Controls Non-secure access of the interrupt with ID318" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS317 ,Controls Non-secure access of the interrupt with ID317" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS316 ,Controls Non-secure access of the interrupt with ID316" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS315 ,Controls Non-secure access of the interrupt with ID315" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS314 ,Controls Non-secure access of the interrupt with ID314" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS313 ,Controls Non-secure access of the interrupt with ID313" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS312 ,Controls Non-secure access of the interrupt with ID312" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS311 ,Controls Non-secure access of the interrupt with ID311" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS310 ,Controls Non-secure access of the interrupt with ID310" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS309 ,Controls Non-secure access of the interrupt with ID309" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS308 ,Controls Non-secure access of the interrupt with ID308" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS307 ,Controls Non-secure access of the interrupt with ID307" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS306 ,Controls Non-secure access of the interrupt with ID306" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS305 ,Controls Non-secure access of the interrupt with ID305" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS304 ,Controls Non-secure access of the interrupt with ID304" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE4C++0x03
hide.long 0x00 "GICD_NSACR19,Non-secure Access Control Register 19"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE50)))
group.long 0xE50++0x03
line.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
bitfld.long 0x00 30.--31. " NS_ACCESS335 ,Controls Non-secure access of the interrupt with ID335" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS334 ,Controls Non-secure access of the interrupt with ID334" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS333 ,Controls Non-secure access of the interrupt with ID333" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS332 ,Controls Non-secure access of the interrupt with ID332" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS331 ,Controls Non-secure access of the interrupt with ID331" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS330 ,Controls Non-secure access of the interrupt with ID330" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS329 ,Controls Non-secure access of the interrupt with ID329" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS328 ,Controls Non-secure access of the interrupt with ID328" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS327 ,Controls Non-secure access of the interrupt with ID327" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS326 ,Controls Non-secure access of the interrupt with ID326" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS325 ,Controls Non-secure access of the interrupt with ID325" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS324 ,Controls Non-secure access of the interrupt with ID324" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS323 ,Controls Non-secure access of the interrupt with ID323" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS322 ,Controls Non-secure access of the interrupt with ID322" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS321 ,Controls Non-secure access of the interrupt with ID321" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS320 ,Controls Non-secure access of the interrupt with ID320" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE50++0x03
hide.long 0x00 "GICD_NSACR20,Non-secure Access Control Register 20"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE54)))
group.long 0xE54++0x03
line.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
bitfld.long 0x00 30.--31. " NS_ACCESS351 ,Controls Non-secure access of the interrupt with ID351" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS350 ,Controls Non-secure access of the interrupt with ID350" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS349 ,Controls Non-secure access of the interrupt with ID349" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS348 ,Controls Non-secure access of the interrupt with ID348" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS347 ,Controls Non-secure access of the interrupt with ID347" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS346 ,Controls Non-secure access of the interrupt with ID346" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS345 ,Controls Non-secure access of the interrupt with ID345" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS344 ,Controls Non-secure access of the interrupt with ID344" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS343 ,Controls Non-secure access of the interrupt with ID343" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS342 ,Controls Non-secure access of the interrupt with ID342" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS341 ,Controls Non-secure access of the interrupt with ID341" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS340 ,Controls Non-secure access of the interrupt with ID340" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS339 ,Controls Non-secure access of the interrupt with ID339" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS338 ,Controls Non-secure access of the interrupt with ID338" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS337 ,Controls Non-secure access of the interrupt with ID337" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS336 ,Controls Non-secure access of the interrupt with ID336" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE54++0x03
hide.long 0x00 "GICD_NSACR21,Non-secure Access Control Register 21"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE58)))
group.long 0xE58++0x03
line.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
bitfld.long 0x00 30.--31. " NS_ACCESS367 ,Controls Non-secure access of the interrupt with ID367" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS366 ,Controls Non-secure access of the interrupt with ID366" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS365 ,Controls Non-secure access of the interrupt with ID365" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS364 ,Controls Non-secure access of the interrupt with ID364" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS363 ,Controls Non-secure access of the interrupt with ID363" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS362 ,Controls Non-secure access of the interrupt with ID362" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS361 ,Controls Non-secure access of the interrupt with ID361" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS360 ,Controls Non-secure access of the interrupt with ID360" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS359 ,Controls Non-secure access of the interrupt with ID359" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS358 ,Controls Non-secure access of the interrupt with ID358" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS357 ,Controls Non-secure access of the interrupt with ID357" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS356 ,Controls Non-secure access of the interrupt with ID356" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS355 ,Controls Non-secure access of the interrupt with ID355" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS354 ,Controls Non-secure access of the interrupt with ID354" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS353 ,Controls Non-secure access of the interrupt with ID353" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS352 ,Controls Non-secure access of the interrupt with ID352" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE58++0x03
hide.long 0x00 "GICD_NSACR22,Non-secure Access Control Register 22"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE5C)))
group.long 0xE5C++0x03
line.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
bitfld.long 0x00 30.--31. " NS_ACCESS383 ,Controls Non-secure access of the interrupt with ID383" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS382 ,Controls Non-secure access of the interrupt with ID382" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS381 ,Controls Non-secure access of the interrupt with ID381" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS380 ,Controls Non-secure access of the interrupt with ID380" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS379 ,Controls Non-secure access of the interrupt with ID379" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS378 ,Controls Non-secure access of the interrupt with ID378" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS377 ,Controls Non-secure access of the interrupt with ID377" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS376 ,Controls Non-secure access of the interrupt with ID376" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS375 ,Controls Non-secure access of the interrupt with ID375" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS374 ,Controls Non-secure access of the interrupt with ID374" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS373 ,Controls Non-secure access of the interrupt with ID373" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS372 ,Controls Non-secure access of the interrupt with ID372" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS371 ,Controls Non-secure access of the interrupt with ID371" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS370 ,Controls Non-secure access of the interrupt with ID370" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS369 ,Controls Non-secure access of the interrupt with ID369" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS368 ,Controls Non-secure access of the interrupt with ID368" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE5C++0x03
hide.long 0x00 "GICD_NSACR23,Non-secure Access Control Register 23"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE60)))
group.long 0xE60++0x03
line.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
bitfld.long 0x00 30.--31. " NS_ACCESS399 ,Controls Non-secure access of the interrupt with ID399" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS398 ,Controls Non-secure access of the interrupt with ID398" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS397 ,Controls Non-secure access of the interrupt with ID397" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS396 ,Controls Non-secure access of the interrupt with ID396" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS395 ,Controls Non-secure access of the interrupt with ID395" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS394 ,Controls Non-secure access of the interrupt with ID394" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS393 ,Controls Non-secure access of the interrupt with ID393" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS392 ,Controls Non-secure access of the interrupt with ID392" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS391 ,Controls Non-secure access of the interrupt with ID391" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS390 ,Controls Non-secure access of the interrupt with ID390" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS389 ,Controls Non-secure access of the interrupt with ID389" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS388 ,Controls Non-secure access of the interrupt with ID388" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS387 ,Controls Non-secure access of the interrupt with ID387" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS386 ,Controls Non-secure access of the interrupt with ID386" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS385 ,Controls Non-secure access of the interrupt with ID385" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS384 ,Controls Non-secure access of the interrupt with ID384" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE60++0x03
hide.long 0x00 "GICD_NSACR24,Non-secure Access Control Register 24"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE64)))
group.long 0xE64++0x03
line.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
bitfld.long 0x00 30.--31. " NS_ACCESS415 ,Controls Non-secure access of the interrupt with ID415" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS414 ,Controls Non-secure access of the interrupt with ID414" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS413 ,Controls Non-secure access of the interrupt with ID413" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS412 ,Controls Non-secure access of the interrupt with ID412" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS411 ,Controls Non-secure access of the interrupt with ID411" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS410 ,Controls Non-secure access of the interrupt with ID410" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS409 ,Controls Non-secure access of the interrupt with ID409" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS408 ,Controls Non-secure access of the interrupt with ID408" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS407 ,Controls Non-secure access of the interrupt with ID407" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS406 ,Controls Non-secure access of the interrupt with ID406" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS405 ,Controls Non-secure access of the interrupt with ID405" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS404 ,Controls Non-secure access of the interrupt with ID404" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS403 ,Controls Non-secure access of the interrupt with ID403" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS402 ,Controls Non-secure access of the interrupt with ID402" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS401 ,Controls Non-secure access of the interrupt with ID401" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS400 ,Controls Non-secure access of the interrupt with ID400" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE64++0x03
hide.long 0x00 "GICD_NSACR25,Non-secure Access Control Register 25"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE68)))
group.long 0xE68++0x03
line.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
bitfld.long 0x00 30.--31. " NS_ACCESS431 ,Controls Non-secure access of the interrupt with ID431" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS430 ,Controls Non-secure access of the interrupt with ID430" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS429 ,Controls Non-secure access of the interrupt with ID429" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS428 ,Controls Non-secure access of the interrupt with ID428" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS427 ,Controls Non-secure access of the interrupt with ID427" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS426 ,Controls Non-secure access of the interrupt with ID426" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS425 ,Controls Non-secure access of the interrupt with ID425" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS424 ,Controls Non-secure access of the interrupt with ID424" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS423 ,Controls Non-secure access of the interrupt with ID423" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS422 ,Controls Non-secure access of the interrupt with ID422" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS421 ,Controls Non-secure access of the interrupt with ID421" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS420 ,Controls Non-secure access of the interrupt with ID420" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS419 ,Controls Non-secure access of the interrupt with ID419" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS418 ,Controls Non-secure access of the interrupt with ID418" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS417 ,Controls Non-secure access of the interrupt with ID417" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS416 ,Controls Non-secure access of the interrupt with ID416" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE68++0x03
hide.long 0x00 "GICD_NSACR26,Non-secure Access Control Register 26"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE6C)))
group.long 0xE6C++0x03
line.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
bitfld.long 0x00 30.--31. " NS_ACCESS447 ,Controls Non-secure access of the interrupt with ID447" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS446 ,Controls Non-secure access of the interrupt with ID446" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS445 ,Controls Non-secure access of the interrupt with ID445" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS444 ,Controls Non-secure access of the interrupt with ID444" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS443 ,Controls Non-secure access of the interrupt with ID443" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS442 ,Controls Non-secure access of the interrupt with ID442" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS441 ,Controls Non-secure access of the interrupt with ID441" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS440 ,Controls Non-secure access of the interrupt with ID440" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS439 ,Controls Non-secure access of the interrupt with ID439" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS438 ,Controls Non-secure access of the interrupt with ID438" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS437 ,Controls Non-secure access of the interrupt with ID437" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS436 ,Controls Non-secure access of the interrupt with ID436" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS435 ,Controls Non-secure access of the interrupt with ID435" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS434 ,Controls Non-secure access of the interrupt with ID434" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS433 ,Controls Non-secure access of the interrupt with ID433" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS432 ,Controls Non-secure access of the interrupt with ID432" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE6C++0x03
hide.long 0x00 "GICD_NSACR27,Non-secure Access Control Register 27"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE70)))
group.long 0xE70++0x03
line.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
bitfld.long 0x00 30.--31. " NS_ACCESS463 ,Controls Non-secure access of the interrupt with ID463" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS462 ,Controls Non-secure access of the interrupt with ID462" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS461 ,Controls Non-secure access of the interrupt with ID461" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS460 ,Controls Non-secure access of the interrupt with ID460" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS459 ,Controls Non-secure access of the interrupt with ID459" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS458 ,Controls Non-secure access of the interrupt with ID458" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS457 ,Controls Non-secure access of the interrupt with ID457" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS456 ,Controls Non-secure access of the interrupt with ID456" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS455 ,Controls Non-secure access of the interrupt with ID455" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS454 ,Controls Non-secure access of the interrupt with ID454" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS453 ,Controls Non-secure access of the interrupt with ID453" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS452 ,Controls Non-secure access of the interrupt with ID452" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS451 ,Controls Non-secure access of the interrupt with ID451" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS450 ,Controls Non-secure access of the interrupt with ID450" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS449 ,Controls Non-secure access of the interrupt with ID449" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS448 ,Controls Non-secure access of the interrupt with ID448" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE70++0x03
hide.long 0x00 "GICD_NSACR28,Non-secure Access Control Register 28"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE74)))
group.long 0xE74++0x03
line.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
bitfld.long 0x00 30.--31. " NS_ACCESS479 ,Controls Non-secure access of the interrupt with ID479" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS478 ,Controls Non-secure access of the interrupt with ID478" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS477 ,Controls Non-secure access of the interrupt with ID477" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS476 ,Controls Non-secure access of the interrupt with ID476" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS475 ,Controls Non-secure access of the interrupt with ID475" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS474 ,Controls Non-secure access of the interrupt with ID474" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS473 ,Controls Non-secure access of the interrupt with ID473" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS472 ,Controls Non-secure access of the interrupt with ID472" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS471 ,Controls Non-secure access of the interrupt with ID471" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS470 ,Controls Non-secure access of the interrupt with ID470" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS469 ,Controls Non-secure access of the interrupt with ID469" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS468 ,Controls Non-secure access of the interrupt with ID468" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS467 ,Controls Non-secure access of the interrupt with ID467" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS466 ,Controls Non-secure access of the interrupt with ID466" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS465 ,Controls Non-secure access of the interrupt with ID465" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS464 ,Controls Non-secure access of the interrupt with ID464" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE74++0x03
hide.long 0x00 "GICD_NSACR29,Non-secure Access Control Register 29"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE78)))
group.long 0xE78++0x03
line.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
bitfld.long 0x00 30.--31. " NS_ACCESS495 ,Controls Non-secure access of the interrupt with ID495" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS494 ,Controls Non-secure access of the interrupt with ID494" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS493 ,Controls Non-secure access of the interrupt with ID493" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS492 ,Controls Non-secure access of the interrupt with ID492" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS491 ,Controls Non-secure access of the interrupt with ID491" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS490 ,Controls Non-secure access of the interrupt with ID490" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS489 ,Controls Non-secure access of the interrupt with ID489" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS488 ,Controls Non-secure access of the interrupt with ID488" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS487 ,Controls Non-secure access of the interrupt with ID487" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS486 ,Controls Non-secure access of the interrupt with ID486" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS485 ,Controls Non-secure access of the interrupt with ID485" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS484 ,Controls Non-secure access of the interrupt with ID484" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS483 ,Controls Non-secure access of the interrupt with ID483" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS482 ,Controls Non-secure access of the interrupt with ID482" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS481 ,Controls Non-secure access of the interrupt with ID481" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS480 ,Controls Non-secure access of the interrupt with ID480" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE78++0x03
hide.long 0x00 "GICD_NSACR30,Non-secure Access Control Register 30"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE7C)))
group.long 0xE7C++0x03
line.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
bitfld.long 0x00 30.--31. " NS_ACCESS511 ,Controls Non-secure access of the interrupt with ID511" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS510 ,Controls Non-secure access of the interrupt with ID510" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS509 ,Controls Non-secure access of the interrupt with ID509" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS508 ,Controls Non-secure access of the interrupt with ID508" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS507 ,Controls Non-secure access of the interrupt with ID507" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS506 ,Controls Non-secure access of the interrupt with ID506" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS505 ,Controls Non-secure access of the interrupt with ID505" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS504 ,Controls Non-secure access of the interrupt with ID504" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS503 ,Controls Non-secure access of the interrupt with ID503" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS502 ,Controls Non-secure access of the interrupt with ID502" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS501 ,Controls Non-secure access of the interrupt with ID501" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS500 ,Controls Non-secure access of the interrupt with ID500" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS499 ,Controls Non-secure access of the interrupt with ID499" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS498 ,Controls Non-secure access of the interrupt with ID498" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS497 ,Controls Non-secure access of the interrupt with ID497" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS496 ,Controls Non-secure access of the interrupt with ID496" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE7C++0x03
hide.long 0x00 "GICD_NSACR31,Non-secure Access Control Register 31"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE80)))
group.long 0xE80++0x03
line.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
bitfld.long 0x00 30.--31. " NS_ACCESS527 ,Controls Non-secure access of the interrupt with ID527" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS526 ,Controls Non-secure access of the interrupt with ID526" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS525 ,Controls Non-secure access of the interrupt with ID525" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS524 ,Controls Non-secure access of the interrupt with ID524" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS523 ,Controls Non-secure access of the interrupt with ID523" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS522 ,Controls Non-secure access of the interrupt with ID522" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS521 ,Controls Non-secure access of the interrupt with ID521" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS520 ,Controls Non-secure access of the interrupt with ID520" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS519 ,Controls Non-secure access of the interrupt with ID519" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS518 ,Controls Non-secure access of the interrupt with ID518" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS517 ,Controls Non-secure access of the interrupt with ID517" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS516 ,Controls Non-secure access of the interrupt with ID516" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS515 ,Controls Non-secure access of the interrupt with ID515" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS514 ,Controls Non-secure access of the interrupt with ID514" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS513 ,Controls Non-secure access of the interrupt with ID513" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS512 ,Controls Non-secure access of the interrupt with ID512" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE80++0x03
hide.long 0x00 "GICD_NSACR32,Non-secure Access Control Register 32"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE84)))
group.long 0xE84++0x03
line.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
bitfld.long 0x00 30.--31. " NS_ACCESS543 ,Controls Non-secure access of the interrupt with ID543" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS542 ,Controls Non-secure access of the interrupt with ID542" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS541 ,Controls Non-secure access of the interrupt with ID541" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS540 ,Controls Non-secure access of the interrupt with ID540" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS539 ,Controls Non-secure access of the interrupt with ID539" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS538 ,Controls Non-secure access of the interrupt with ID538" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS537 ,Controls Non-secure access of the interrupt with ID537" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS536 ,Controls Non-secure access of the interrupt with ID536" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS535 ,Controls Non-secure access of the interrupt with ID535" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS534 ,Controls Non-secure access of the interrupt with ID534" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS533 ,Controls Non-secure access of the interrupt with ID533" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS532 ,Controls Non-secure access of the interrupt with ID532" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS531 ,Controls Non-secure access of the interrupt with ID531" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS530 ,Controls Non-secure access of the interrupt with ID530" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS529 ,Controls Non-secure access of the interrupt with ID529" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS528 ,Controls Non-secure access of the interrupt with ID528" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE84++0x03
hide.long 0x00 "GICD_NSACR33,Non-secure Access Control Register 33"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE88)))
group.long 0xE88++0x03
line.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
bitfld.long 0x00 30.--31. " NS_ACCESS559 ,Controls Non-secure access of the interrupt with ID559" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS558 ,Controls Non-secure access of the interrupt with ID558" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS557 ,Controls Non-secure access of the interrupt with ID557" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS556 ,Controls Non-secure access of the interrupt with ID556" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS555 ,Controls Non-secure access of the interrupt with ID555" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS554 ,Controls Non-secure access of the interrupt with ID554" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS553 ,Controls Non-secure access of the interrupt with ID553" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS552 ,Controls Non-secure access of the interrupt with ID552" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS551 ,Controls Non-secure access of the interrupt with ID551" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS550 ,Controls Non-secure access of the interrupt with ID550" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS549 ,Controls Non-secure access of the interrupt with ID549" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS548 ,Controls Non-secure access of the interrupt with ID548" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS547 ,Controls Non-secure access of the interrupt with ID547" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS546 ,Controls Non-secure access of the interrupt with ID546" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS545 ,Controls Non-secure access of the interrupt with ID545" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS544 ,Controls Non-secure access of the interrupt with ID544" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE88++0x03
hide.long 0x00 "GICD_NSACR34,Non-secure Access Control Register 34"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE8C)))
group.long 0xE8C++0x03
line.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
bitfld.long 0x00 30.--31. " NS_ACCESS575 ,Controls Non-secure access of the interrupt with ID575" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS574 ,Controls Non-secure access of the interrupt with ID574" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS573 ,Controls Non-secure access of the interrupt with ID573" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS572 ,Controls Non-secure access of the interrupt with ID572" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS571 ,Controls Non-secure access of the interrupt with ID571" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS570 ,Controls Non-secure access of the interrupt with ID570" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS569 ,Controls Non-secure access of the interrupt with ID569" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS568 ,Controls Non-secure access of the interrupt with ID568" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS567 ,Controls Non-secure access of the interrupt with ID567" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS566 ,Controls Non-secure access of the interrupt with ID566" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS565 ,Controls Non-secure access of the interrupt with ID565" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS564 ,Controls Non-secure access of the interrupt with ID564" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS563 ,Controls Non-secure access of the interrupt with ID563" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS562 ,Controls Non-secure access of the interrupt with ID562" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS561 ,Controls Non-secure access of the interrupt with ID561" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS560 ,Controls Non-secure access of the interrupt with ID560" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE8C++0x03
hide.long 0x00 "GICD_NSACR35,Non-secure Access Control Register 35"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE90)))
group.long 0xE90++0x03
line.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
bitfld.long 0x00 30.--31. " NS_ACCESS591 ,Controls Non-secure access of the interrupt with ID591" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS590 ,Controls Non-secure access of the interrupt with ID590" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS589 ,Controls Non-secure access of the interrupt with ID589" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS588 ,Controls Non-secure access of the interrupt with ID588" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS587 ,Controls Non-secure access of the interrupt with ID587" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS586 ,Controls Non-secure access of the interrupt with ID586" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS585 ,Controls Non-secure access of the interrupt with ID585" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS584 ,Controls Non-secure access of the interrupt with ID584" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS583 ,Controls Non-secure access of the interrupt with ID583" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS582 ,Controls Non-secure access of the interrupt with ID582" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS581 ,Controls Non-secure access of the interrupt with ID581" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS580 ,Controls Non-secure access of the interrupt with ID580" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS579 ,Controls Non-secure access of the interrupt with ID579" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS578 ,Controls Non-secure access of the interrupt with ID578" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS577 ,Controls Non-secure access of the interrupt with ID577" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS576 ,Controls Non-secure access of the interrupt with ID576" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE90++0x03
hide.long 0x00 "GICD_NSACR36,Non-secure Access Control Register 36"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE94)))
group.long 0xE94++0x03
line.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
bitfld.long 0x00 30.--31. " NS_ACCESS607 ,Controls Non-secure access of the interrupt with ID607" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS606 ,Controls Non-secure access of the interrupt with ID606" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS605 ,Controls Non-secure access of the interrupt with ID605" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS604 ,Controls Non-secure access of the interrupt with ID604" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS603 ,Controls Non-secure access of the interrupt with ID603" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS602 ,Controls Non-secure access of the interrupt with ID602" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS601 ,Controls Non-secure access of the interrupt with ID601" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS600 ,Controls Non-secure access of the interrupt with ID600" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS599 ,Controls Non-secure access of the interrupt with ID599" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS598 ,Controls Non-secure access of the interrupt with ID598" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS597 ,Controls Non-secure access of the interrupt with ID597" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS596 ,Controls Non-secure access of the interrupt with ID596" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS595 ,Controls Non-secure access of the interrupt with ID595" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS594 ,Controls Non-secure access of the interrupt with ID594" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS593 ,Controls Non-secure access of the interrupt with ID593" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS592 ,Controls Non-secure access of the interrupt with ID592" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE94++0x03
hide.long 0x00 "GICD_NSACR37,Non-secure Access Control Register 37"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE98)))
group.long 0xE98++0x03
line.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
bitfld.long 0x00 30.--31. " NS_ACCESS623 ,Controls Non-secure access of the interrupt with ID623" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS622 ,Controls Non-secure access of the interrupt with ID622" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS621 ,Controls Non-secure access of the interrupt with ID621" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS620 ,Controls Non-secure access of the interrupt with ID620" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS619 ,Controls Non-secure access of the interrupt with ID619" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS618 ,Controls Non-secure access of the interrupt with ID618" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS617 ,Controls Non-secure access of the interrupt with ID617" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS616 ,Controls Non-secure access of the interrupt with ID616" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS615 ,Controls Non-secure access of the interrupt with ID615" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS614 ,Controls Non-secure access of the interrupt with ID614" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS613 ,Controls Non-secure access of the interrupt with ID613" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS612 ,Controls Non-secure access of the interrupt with ID612" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS611 ,Controls Non-secure access of the interrupt with ID611" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS610 ,Controls Non-secure access of the interrupt with ID610" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS609 ,Controls Non-secure access of the interrupt with ID609" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS608 ,Controls Non-secure access of the interrupt with ID608" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE98++0x03
hide.long 0x00 "GICD_NSACR38,Non-secure Access Control Register 38"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xE9C)))
group.long 0xE9C++0x03
line.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
bitfld.long 0x00 30.--31. " NS_ACCESS639 ,Controls Non-secure access of the interrupt with ID639" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS638 ,Controls Non-secure access of the interrupt with ID638" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS637 ,Controls Non-secure access of the interrupt with ID637" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS636 ,Controls Non-secure access of the interrupt with ID636" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS635 ,Controls Non-secure access of the interrupt with ID635" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS634 ,Controls Non-secure access of the interrupt with ID634" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS633 ,Controls Non-secure access of the interrupt with ID633" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS632 ,Controls Non-secure access of the interrupt with ID632" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS631 ,Controls Non-secure access of the interrupt with ID631" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS630 ,Controls Non-secure access of the interrupt with ID630" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS629 ,Controls Non-secure access of the interrupt with ID629" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS628 ,Controls Non-secure access of the interrupt with ID628" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS627 ,Controls Non-secure access of the interrupt with ID627" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS626 ,Controls Non-secure access of the interrupt with ID626" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS625 ,Controls Non-secure access of the interrupt with ID625" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS624 ,Controls Non-secure access of the interrupt with ID624" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xE9C++0x03
hide.long 0x00 "GICD_NSACR39,Non-secure Access Control Register 39"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA0)))
group.long 0xEA0++0x03
line.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
bitfld.long 0x00 30.--31. " NS_ACCESS655 ,Controls Non-secure access of the interrupt with ID655" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS654 ,Controls Non-secure access of the interrupt with ID654" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS653 ,Controls Non-secure access of the interrupt with ID653" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS652 ,Controls Non-secure access of the interrupt with ID652" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS651 ,Controls Non-secure access of the interrupt with ID651" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS650 ,Controls Non-secure access of the interrupt with ID650" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS649 ,Controls Non-secure access of the interrupt with ID649" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS648 ,Controls Non-secure access of the interrupt with ID648" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS647 ,Controls Non-secure access of the interrupt with ID647" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS646 ,Controls Non-secure access of the interrupt with ID646" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS645 ,Controls Non-secure access of the interrupt with ID645" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS644 ,Controls Non-secure access of the interrupt with ID644" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS643 ,Controls Non-secure access of the interrupt with ID643" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS642 ,Controls Non-secure access of the interrupt with ID642" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS641 ,Controls Non-secure access of the interrupt with ID641" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS640 ,Controls Non-secure access of the interrupt with ID640" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA0++0x03
hide.long 0x00 "GICD_NSACR40,Non-secure Access Control Register 40"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA4)))
group.long 0xEA4++0x03
line.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
bitfld.long 0x00 30.--31. " NS_ACCESS671 ,Controls Non-secure access of the interrupt with ID671" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS670 ,Controls Non-secure access of the interrupt with ID670" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS669 ,Controls Non-secure access of the interrupt with ID669" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS668 ,Controls Non-secure access of the interrupt with ID668" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS667 ,Controls Non-secure access of the interrupt with ID667" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS666 ,Controls Non-secure access of the interrupt with ID666" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS665 ,Controls Non-secure access of the interrupt with ID665" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS664 ,Controls Non-secure access of the interrupt with ID664" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS663 ,Controls Non-secure access of the interrupt with ID663" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS662 ,Controls Non-secure access of the interrupt with ID662" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS661 ,Controls Non-secure access of the interrupt with ID661" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS660 ,Controls Non-secure access of the interrupt with ID660" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS659 ,Controls Non-secure access of the interrupt with ID659" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS658 ,Controls Non-secure access of the interrupt with ID658" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS657 ,Controls Non-secure access of the interrupt with ID657" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS656 ,Controls Non-secure access of the interrupt with ID656" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA4++0x03
hide.long 0x00 "GICD_NSACR41,Non-secure Access Control Register 41"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEA8)))
group.long 0xEA8++0x03
line.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
bitfld.long 0x00 30.--31. " NS_ACCESS687 ,Controls Non-secure access of the interrupt with ID687" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS686 ,Controls Non-secure access of the interrupt with ID686" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS685 ,Controls Non-secure access of the interrupt with ID685" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS684 ,Controls Non-secure access of the interrupt with ID684" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS683 ,Controls Non-secure access of the interrupt with ID683" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS682 ,Controls Non-secure access of the interrupt with ID682" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS681 ,Controls Non-secure access of the interrupt with ID681" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS680 ,Controls Non-secure access of the interrupt with ID680" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS679 ,Controls Non-secure access of the interrupt with ID679" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS678 ,Controls Non-secure access of the interrupt with ID678" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS677 ,Controls Non-secure access of the interrupt with ID677" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS676 ,Controls Non-secure access of the interrupt with ID676" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS675 ,Controls Non-secure access of the interrupt with ID675" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS674 ,Controls Non-secure access of the interrupt with ID674" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS673 ,Controls Non-secure access of the interrupt with ID673" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS672 ,Controls Non-secure access of the interrupt with ID672" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEA8++0x03
hide.long 0x00 "GICD_NSACR42,Non-secure Access Control Register 42"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEAC)))
group.long 0xEAC++0x03
line.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
bitfld.long 0x00 30.--31. " NS_ACCESS703 ,Controls Non-secure access of the interrupt with ID703" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS702 ,Controls Non-secure access of the interrupt with ID702" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS701 ,Controls Non-secure access of the interrupt with ID701" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS700 ,Controls Non-secure access of the interrupt with ID700" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS699 ,Controls Non-secure access of the interrupt with ID699" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS698 ,Controls Non-secure access of the interrupt with ID698" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS697 ,Controls Non-secure access of the interrupt with ID697" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS696 ,Controls Non-secure access of the interrupt with ID696" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS695 ,Controls Non-secure access of the interrupt with ID695" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS694 ,Controls Non-secure access of the interrupt with ID694" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS693 ,Controls Non-secure access of the interrupt with ID693" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS692 ,Controls Non-secure access of the interrupt with ID692" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS691 ,Controls Non-secure access of the interrupt with ID691" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS690 ,Controls Non-secure access of the interrupt with ID690" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS689 ,Controls Non-secure access of the interrupt with ID689" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS688 ,Controls Non-secure access of the interrupt with ID688" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEAC++0x03
hide.long 0x00 "GICD_NSACR43,Non-secure Access Control Register 43"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB0)))
group.long 0xEB0++0x03
line.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
bitfld.long 0x00 30.--31. " NS_ACCESS719 ,Controls Non-secure access of the interrupt with ID719" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS718 ,Controls Non-secure access of the interrupt with ID718" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS717 ,Controls Non-secure access of the interrupt with ID717" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS716 ,Controls Non-secure access of the interrupt with ID716" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS715 ,Controls Non-secure access of the interrupt with ID715" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS714 ,Controls Non-secure access of the interrupt with ID714" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS713 ,Controls Non-secure access of the interrupt with ID713" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS712 ,Controls Non-secure access of the interrupt with ID712" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS711 ,Controls Non-secure access of the interrupt with ID711" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS710 ,Controls Non-secure access of the interrupt with ID710" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS709 ,Controls Non-secure access of the interrupt with ID709" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS708 ,Controls Non-secure access of the interrupt with ID708" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS707 ,Controls Non-secure access of the interrupt with ID707" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS706 ,Controls Non-secure access of the interrupt with ID706" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS705 ,Controls Non-secure access of the interrupt with ID705" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS704 ,Controls Non-secure access of the interrupt with ID704" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB0++0x03
hide.long 0x00 "GICD_NSACR44,Non-secure Access Control Register 44"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB4)))
group.long 0xEB4++0x03
line.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
bitfld.long 0x00 30.--31. " NS_ACCESS735 ,Controls Non-secure access of the interrupt with ID735" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS734 ,Controls Non-secure access of the interrupt with ID734" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS733 ,Controls Non-secure access of the interrupt with ID733" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS732 ,Controls Non-secure access of the interrupt with ID732" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS731 ,Controls Non-secure access of the interrupt with ID731" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS730 ,Controls Non-secure access of the interrupt with ID730" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS729 ,Controls Non-secure access of the interrupt with ID729" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS728 ,Controls Non-secure access of the interrupt with ID728" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS727 ,Controls Non-secure access of the interrupt with ID727" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS726 ,Controls Non-secure access of the interrupt with ID726" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS725 ,Controls Non-secure access of the interrupt with ID725" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS724 ,Controls Non-secure access of the interrupt with ID724" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS723 ,Controls Non-secure access of the interrupt with ID723" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS722 ,Controls Non-secure access of the interrupt with ID722" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS721 ,Controls Non-secure access of the interrupt with ID721" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS720 ,Controls Non-secure access of the interrupt with ID720" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB4++0x03
hide.long 0x00 "GICD_NSACR45,Non-secure Access Control Register 45"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEB8)))
group.long 0xEB8++0x03
line.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
bitfld.long 0x00 30.--31. " NS_ACCESS751 ,Controls Non-secure access of the interrupt with ID751" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS750 ,Controls Non-secure access of the interrupt with ID750" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS749 ,Controls Non-secure access of the interrupt with ID749" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS748 ,Controls Non-secure access of the interrupt with ID748" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS747 ,Controls Non-secure access of the interrupt with ID747" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS746 ,Controls Non-secure access of the interrupt with ID746" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS745 ,Controls Non-secure access of the interrupt with ID745" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS744 ,Controls Non-secure access of the interrupt with ID744" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS743 ,Controls Non-secure access of the interrupt with ID743" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS742 ,Controls Non-secure access of the interrupt with ID742" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS741 ,Controls Non-secure access of the interrupt with ID741" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS740 ,Controls Non-secure access of the interrupt with ID740" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS739 ,Controls Non-secure access of the interrupt with ID739" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS738 ,Controls Non-secure access of the interrupt with ID738" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS737 ,Controls Non-secure access of the interrupt with ID737" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS736 ,Controls Non-secure access of the interrupt with ID736" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEB8++0x03
hide.long 0x00 "GICD_NSACR46,Non-secure Access Control Register 46"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEBC)))
group.long 0xEBC++0x03
line.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
bitfld.long 0x00 30.--31. " NS_ACCESS767 ,Controls Non-secure access of the interrupt with ID767" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS766 ,Controls Non-secure access of the interrupt with ID766" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS765 ,Controls Non-secure access of the interrupt with ID765" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS764 ,Controls Non-secure access of the interrupt with ID764" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS763 ,Controls Non-secure access of the interrupt with ID763" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS762 ,Controls Non-secure access of the interrupt with ID762" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS761 ,Controls Non-secure access of the interrupt with ID761" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS760 ,Controls Non-secure access of the interrupt with ID760" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS759 ,Controls Non-secure access of the interrupt with ID759" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS758 ,Controls Non-secure access of the interrupt with ID758" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS757 ,Controls Non-secure access of the interrupt with ID757" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS756 ,Controls Non-secure access of the interrupt with ID756" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS755 ,Controls Non-secure access of the interrupt with ID755" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS754 ,Controls Non-secure access of the interrupt with ID754" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS753 ,Controls Non-secure access of the interrupt with ID753" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS752 ,Controls Non-secure access of the interrupt with ID752" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEBC++0x03
hide.long 0x00 "GICD_NSACR47,Non-secure Access Control Register 47"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC0)))
group.long 0xEC0++0x03
line.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
bitfld.long 0x00 30.--31. " NS_ACCESS783 ,Controls Non-secure access of the interrupt with ID783" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS782 ,Controls Non-secure access of the interrupt with ID782" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS781 ,Controls Non-secure access of the interrupt with ID781" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS780 ,Controls Non-secure access of the interrupt with ID780" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS779 ,Controls Non-secure access of the interrupt with ID779" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS778 ,Controls Non-secure access of the interrupt with ID778" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS777 ,Controls Non-secure access of the interrupt with ID777" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS776 ,Controls Non-secure access of the interrupt with ID776" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS775 ,Controls Non-secure access of the interrupt with ID775" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS774 ,Controls Non-secure access of the interrupt with ID774" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS773 ,Controls Non-secure access of the interrupt with ID773" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS772 ,Controls Non-secure access of the interrupt with ID772" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS771 ,Controls Non-secure access of the interrupt with ID771" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS770 ,Controls Non-secure access of the interrupt with ID770" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS769 ,Controls Non-secure access of the interrupt with ID769" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS768 ,Controls Non-secure access of the interrupt with ID768" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC0++0x03
hide.long 0x00 "GICD_NSACR48,Non-secure Access Control Register 48"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC4)))
group.long 0xEC4++0x03
line.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
bitfld.long 0x00 30.--31. " NS_ACCESS799 ,Controls Non-secure access of the interrupt with ID799" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS798 ,Controls Non-secure access of the interrupt with ID798" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS797 ,Controls Non-secure access of the interrupt with ID797" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS796 ,Controls Non-secure access of the interrupt with ID796" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS795 ,Controls Non-secure access of the interrupt with ID795" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS794 ,Controls Non-secure access of the interrupt with ID794" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS793 ,Controls Non-secure access of the interrupt with ID793" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS792 ,Controls Non-secure access of the interrupt with ID792" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS791 ,Controls Non-secure access of the interrupt with ID791" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS790 ,Controls Non-secure access of the interrupt with ID790" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS789 ,Controls Non-secure access of the interrupt with ID789" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS788 ,Controls Non-secure access of the interrupt with ID788" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS787 ,Controls Non-secure access of the interrupt with ID787" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS786 ,Controls Non-secure access of the interrupt with ID786" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS785 ,Controls Non-secure access of the interrupt with ID785" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS784 ,Controls Non-secure access of the interrupt with ID784" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC4++0x03
hide.long 0x00 "GICD_NSACR49,Non-secure Access Control Register 49"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEC8)))
group.long 0xEC8++0x03
line.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
bitfld.long 0x00 30.--31. " NS_ACCESS815 ,Controls Non-secure access of the interrupt with ID815" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS814 ,Controls Non-secure access of the interrupt with ID814" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS813 ,Controls Non-secure access of the interrupt with ID813" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS812 ,Controls Non-secure access of the interrupt with ID812" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS811 ,Controls Non-secure access of the interrupt with ID811" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS810 ,Controls Non-secure access of the interrupt with ID810" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS809 ,Controls Non-secure access of the interrupt with ID809" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS808 ,Controls Non-secure access of the interrupt with ID808" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS807 ,Controls Non-secure access of the interrupt with ID807" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS806 ,Controls Non-secure access of the interrupt with ID806" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS805 ,Controls Non-secure access of the interrupt with ID805" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS804 ,Controls Non-secure access of the interrupt with ID804" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS803 ,Controls Non-secure access of the interrupt with ID803" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS802 ,Controls Non-secure access of the interrupt with ID802" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS801 ,Controls Non-secure access of the interrupt with ID801" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS800 ,Controls Non-secure access of the interrupt with ID800" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEC8++0x03
hide.long 0x00 "GICD_NSACR50,Non-secure Access Control Register 50"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xECC)))
group.long 0xECC++0x03
line.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
bitfld.long 0x00 30.--31. " NS_ACCESS831 ,Controls Non-secure access of the interrupt with ID831" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS830 ,Controls Non-secure access of the interrupt with ID830" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS829 ,Controls Non-secure access of the interrupt with ID829" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS828 ,Controls Non-secure access of the interrupt with ID828" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS827 ,Controls Non-secure access of the interrupt with ID827" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS826 ,Controls Non-secure access of the interrupt with ID826" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS825 ,Controls Non-secure access of the interrupt with ID825" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS824 ,Controls Non-secure access of the interrupt with ID824" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS823 ,Controls Non-secure access of the interrupt with ID823" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS822 ,Controls Non-secure access of the interrupt with ID822" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS821 ,Controls Non-secure access of the interrupt with ID821" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS820 ,Controls Non-secure access of the interrupt with ID820" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS819 ,Controls Non-secure access of the interrupt with ID819" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS818 ,Controls Non-secure access of the interrupt with ID818" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS817 ,Controls Non-secure access of the interrupt with ID817" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS816 ,Controls Non-secure access of the interrupt with ID816" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xECC++0x03
hide.long 0x00 "GICD_NSACR51,Non-secure Access Control Register 51"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED0)))
group.long 0xED0++0x03
line.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
bitfld.long 0x00 30.--31. " NS_ACCESS847 ,Controls Non-secure access of the interrupt with ID847" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS846 ,Controls Non-secure access of the interrupt with ID846" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS845 ,Controls Non-secure access of the interrupt with ID845" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS844 ,Controls Non-secure access of the interrupt with ID844" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS843 ,Controls Non-secure access of the interrupt with ID843" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS842 ,Controls Non-secure access of the interrupt with ID842" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS841 ,Controls Non-secure access of the interrupt with ID841" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS840 ,Controls Non-secure access of the interrupt with ID840" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS839 ,Controls Non-secure access of the interrupt with ID839" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS838 ,Controls Non-secure access of the interrupt with ID838" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS837 ,Controls Non-secure access of the interrupt with ID837" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS836 ,Controls Non-secure access of the interrupt with ID836" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS835 ,Controls Non-secure access of the interrupt with ID835" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS834 ,Controls Non-secure access of the interrupt with ID834" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS833 ,Controls Non-secure access of the interrupt with ID833" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS832 ,Controls Non-secure access of the interrupt with ID832" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED0++0x03
hide.long 0x00 "GICD_NSACR52,Non-secure Access Control Register 52"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED4)))
group.long 0xED4++0x03
line.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
bitfld.long 0x00 30.--31. " NS_ACCESS863 ,Controls Non-secure access of the interrupt with ID863" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS862 ,Controls Non-secure access of the interrupt with ID862" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS861 ,Controls Non-secure access of the interrupt with ID861" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS860 ,Controls Non-secure access of the interrupt with ID860" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS859 ,Controls Non-secure access of the interrupt with ID859" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS858 ,Controls Non-secure access of the interrupt with ID858" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS857 ,Controls Non-secure access of the interrupt with ID857" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS856 ,Controls Non-secure access of the interrupt with ID856" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS855 ,Controls Non-secure access of the interrupt with ID855" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS854 ,Controls Non-secure access of the interrupt with ID854" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS853 ,Controls Non-secure access of the interrupt with ID853" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS852 ,Controls Non-secure access of the interrupt with ID852" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS851 ,Controls Non-secure access of the interrupt with ID851" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS850 ,Controls Non-secure access of the interrupt with ID850" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS849 ,Controls Non-secure access of the interrupt with ID849" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS848 ,Controls Non-secure access of the interrupt with ID848" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED4++0x03
hide.long 0x00 "GICD_NSACR53,Non-secure Access Control Register 53"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xED8)))
group.long 0xED8++0x03
line.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
bitfld.long 0x00 30.--31. " NS_ACCESS879 ,Controls Non-secure access of the interrupt with ID879" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS878 ,Controls Non-secure access of the interrupt with ID878" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS877 ,Controls Non-secure access of the interrupt with ID877" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS876 ,Controls Non-secure access of the interrupt with ID876" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS875 ,Controls Non-secure access of the interrupt with ID875" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS874 ,Controls Non-secure access of the interrupt with ID874" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS873 ,Controls Non-secure access of the interrupt with ID873" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS872 ,Controls Non-secure access of the interrupt with ID872" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS871 ,Controls Non-secure access of the interrupt with ID871" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS870 ,Controls Non-secure access of the interrupt with ID870" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS869 ,Controls Non-secure access of the interrupt with ID869" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS868 ,Controls Non-secure access of the interrupt with ID868" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS867 ,Controls Non-secure access of the interrupt with ID867" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS866 ,Controls Non-secure access of the interrupt with ID866" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS865 ,Controls Non-secure access of the interrupt with ID865" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS864 ,Controls Non-secure access of the interrupt with ID864" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xED8++0x03
hide.long 0x00 "GICD_NSACR54,Non-secure Access Control Register 54"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEDC)))
group.long 0xEDC++0x03
line.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
bitfld.long 0x00 30.--31. " NS_ACCESS895 ,Controls Non-secure access of the interrupt with ID895" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS894 ,Controls Non-secure access of the interrupt with ID894" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS893 ,Controls Non-secure access of the interrupt with ID893" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS892 ,Controls Non-secure access of the interrupt with ID892" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS891 ,Controls Non-secure access of the interrupt with ID891" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS890 ,Controls Non-secure access of the interrupt with ID890" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS889 ,Controls Non-secure access of the interrupt with ID889" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS888 ,Controls Non-secure access of the interrupt with ID888" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS887 ,Controls Non-secure access of the interrupt with ID887" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS886 ,Controls Non-secure access of the interrupt with ID886" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS885 ,Controls Non-secure access of the interrupt with ID885" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS884 ,Controls Non-secure access of the interrupt with ID884" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS883 ,Controls Non-secure access of the interrupt with ID883" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS882 ,Controls Non-secure access of the interrupt with ID882" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS881 ,Controls Non-secure access of the interrupt with ID881" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS880 ,Controls Non-secure access of the interrupt with ID880" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEDC++0x03
hide.long 0x00 "GICD_NSACR55,Non-secure Access Control Register 55"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE0)))
group.long 0xEE0++0x03
line.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
bitfld.long 0x00 30.--31. " NS_ACCESS911 ,Controls Non-secure access of the interrupt with ID911" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS910 ,Controls Non-secure access of the interrupt with ID910" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS909 ,Controls Non-secure access of the interrupt with ID909" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS908 ,Controls Non-secure access of the interrupt with ID908" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS907 ,Controls Non-secure access of the interrupt with ID907" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS906 ,Controls Non-secure access of the interrupt with ID906" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS905 ,Controls Non-secure access of the interrupt with ID905" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS904 ,Controls Non-secure access of the interrupt with ID904" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS903 ,Controls Non-secure access of the interrupt with ID903" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS902 ,Controls Non-secure access of the interrupt with ID902" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS901 ,Controls Non-secure access of the interrupt with ID901" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS900 ,Controls Non-secure access of the interrupt with ID900" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS899 ,Controls Non-secure access of the interrupt with ID899" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS898 ,Controls Non-secure access of the interrupt with ID898" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS897 ,Controls Non-secure access of the interrupt with ID897" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS896 ,Controls Non-secure access of the interrupt with ID896" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE0++0x03
hide.long 0x00 "GICD_NSACR56,Non-secure Access Control Register 56"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE4)))
group.long 0xEE4++0x03
line.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
bitfld.long 0x00 30.--31. " NS_ACCESS927 ,Controls Non-secure access of the interrupt with ID927" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS926 ,Controls Non-secure access of the interrupt with ID926" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS925 ,Controls Non-secure access of the interrupt with ID925" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS924 ,Controls Non-secure access of the interrupt with ID924" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS923 ,Controls Non-secure access of the interrupt with ID923" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS922 ,Controls Non-secure access of the interrupt with ID922" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS921 ,Controls Non-secure access of the interrupt with ID921" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS920 ,Controls Non-secure access of the interrupt with ID920" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS919 ,Controls Non-secure access of the interrupt with ID919" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS918 ,Controls Non-secure access of the interrupt with ID918" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS917 ,Controls Non-secure access of the interrupt with ID917" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS916 ,Controls Non-secure access of the interrupt with ID916" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS915 ,Controls Non-secure access of the interrupt with ID915" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS914 ,Controls Non-secure access of the interrupt with ID914" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS913 ,Controls Non-secure access of the interrupt with ID913" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS912 ,Controls Non-secure access of the interrupt with ID912" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE4++0x03
hide.long 0x00 "GICD_NSACR57,Non-secure Access Control Register 57"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEE8)))
group.long 0xEE8++0x03
line.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
bitfld.long 0x00 30.--31. " NS_ACCESS943 ,Controls Non-secure access of the interrupt with ID943" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS942 ,Controls Non-secure access of the interrupt with ID942" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS941 ,Controls Non-secure access of the interrupt with ID941" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS940 ,Controls Non-secure access of the interrupt with ID940" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS939 ,Controls Non-secure access of the interrupt with ID939" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS938 ,Controls Non-secure access of the interrupt with ID938" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS937 ,Controls Non-secure access of the interrupt with ID937" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS936 ,Controls Non-secure access of the interrupt with ID936" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS935 ,Controls Non-secure access of the interrupt with ID935" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS934 ,Controls Non-secure access of the interrupt with ID934" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS933 ,Controls Non-secure access of the interrupt with ID933" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS932 ,Controls Non-secure access of the interrupt with ID932" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS931 ,Controls Non-secure access of the interrupt with ID931" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS930 ,Controls Non-secure access of the interrupt with ID930" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS929 ,Controls Non-secure access of the interrupt with ID929" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS928 ,Controls Non-secure access of the interrupt with ID928" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEE8++0x03
hide.long 0x00 "GICD_NSACR58,Non-secure Access Control Register 58"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEEC)))
group.long 0xEEC++0x03
line.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
bitfld.long 0x00 30.--31. " NS_ACCESS959 ,Controls Non-secure access of the interrupt with ID959" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS958 ,Controls Non-secure access of the interrupt with ID958" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS957 ,Controls Non-secure access of the interrupt with ID957" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS956 ,Controls Non-secure access of the interrupt with ID956" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS955 ,Controls Non-secure access of the interrupt with ID955" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS954 ,Controls Non-secure access of the interrupt with ID954" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS953 ,Controls Non-secure access of the interrupt with ID953" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS952 ,Controls Non-secure access of the interrupt with ID952" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS951 ,Controls Non-secure access of the interrupt with ID951" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS950 ,Controls Non-secure access of the interrupt with ID950" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS949 ,Controls Non-secure access of the interrupt with ID949" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS948 ,Controls Non-secure access of the interrupt with ID948" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS947 ,Controls Non-secure access of the interrupt with ID947" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS946 ,Controls Non-secure access of the interrupt with ID946" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS945 ,Controls Non-secure access of the interrupt with ID945" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS944 ,Controls Non-secure access of the interrupt with ID944" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEEC++0x03
hide.long 0x00 "GICD_NSACR59,Non-secure Access Control Register 59"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF0)))
group.long 0xEF0++0x03
line.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
bitfld.long 0x00 30.--31. " NS_ACCESS975 ,Controls Non-secure access of the interrupt with ID975" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS974 ,Controls Non-secure access of the interrupt with ID974" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS973 ,Controls Non-secure access of the interrupt with ID973" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS972 ,Controls Non-secure access of the interrupt with ID972" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS971 ,Controls Non-secure access of the interrupt with ID971" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS970 ,Controls Non-secure access of the interrupt with ID970" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS969 ,Controls Non-secure access of the interrupt with ID969" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS968 ,Controls Non-secure access of the interrupt with ID968" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS967 ,Controls Non-secure access of the interrupt with ID967" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS966 ,Controls Non-secure access of the interrupt with ID966" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS965 ,Controls Non-secure access of the interrupt with ID965" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS964 ,Controls Non-secure access of the interrupt with ID964" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS963 ,Controls Non-secure access of the interrupt with ID963" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS962 ,Controls Non-secure access of the interrupt with ID962" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS961 ,Controls Non-secure access of the interrupt with ID961" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS960 ,Controls Non-secure access of the interrupt with ID960" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF0++0x03
hide.long 0x00 "GICD_NSACR60,Non-secure Access Control Register 60"
endif
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICD",-1.)+0xEF4)))
group.long 0xEF4++0x03
line.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
bitfld.long 0x00 30.--31. " NS_ACCESS991 ,Controls Non-secure access of the interrupt with ID991" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 28.--29. " NS_ACCESS990 ,Controls Non-secure access of the interrupt with ID990" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 26.--27. " NS_ACCESS989 ,Controls Non-secure access of the interrupt with ID989" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 24.--25. " NS_ACCESS988 ,Controls Non-secure access of the interrupt with ID988" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 22.--23. " NS_ACCESS987 ,Controls Non-secure access of the interrupt with ID987" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 20.--21. " NS_ACCESS986 ,Controls Non-secure access of the interrupt with ID986" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 18.--19. " NS_ACCESS985 ,Controls Non-secure access of the interrupt with ID985" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 16.--17. " NS_ACCESS984 ,Controls Non-secure access of the interrupt with ID984" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 14.--15. " NS_ACCESS983 ,Controls Non-secure access of the interrupt with ID983" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 12.--13. " NS_ACCESS982 ,Controls Non-secure access of the interrupt with ID982" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 10.--11. " NS_ACCESS981 ,Controls Non-secure access of the interrupt with ID981" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 8.--9. " NS_ACCESS980 ,Controls Non-secure access of the interrupt with ID980" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 6.--7. " NS_ACCESS979 ,Controls Non-secure access of the interrupt with ID979" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 4.--5. " NS_ACCESS978 ,Controls Non-secure access of the interrupt with ID978" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 2.--3. " NS_ACCESS977 ,Controls Non-secure access of the interrupt with ID977" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
textline "                       "
bitfld.long 0x00 0.--1. " NS_ACCESS976 ,Controls Non-secure access of the interrupt with ID976" "No access,SET_CLR_PENDR/SETSPI_NSR/SGIR,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER,SET_CLR_PENDR/SETSPI_NSR/SGIR/CLRSPI_NSR/SET_CLR_ACTIVER/ITARGETSR/IROUTER"
else
hgroup.long 0xEF4++0x03
hide.long 0x00 "GICD_NSACR61,Non-secure Access Control Register 61"
endif
tree.end
width 25.
tree "Software Generated Interrupt"
if (((per.l(COMP.BASE("GICD",-1.)))&0x10)==0x10)
hgroup.long 0x0F00++0x03
hide.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
hgroup.long 0xF10++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
hgroup.long 0xF14++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
hgroup.long 0xF18++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
hgroup.long 0xF1C++0x03
hide.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
hgroup.long 0xF20++0x03
hide.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
hgroup.long 0xF24++0x03
hide.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
hgroup.long 0xF28++0x03
hide.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
hgroup.long 0xF2C++0x03
hide.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
else
wgroup.long 0x0F00++0x03
line.long 0x00 "GICD_SGIR,Software Generated Interrupt Register"
group.long 0xF10++0x03
line.long 0x00 "GICD_CLR_PENDSGIR0,SGI Clear Pending Register 0"
group.long 0xF14++0x03
line.long 0x00 "GICD_CLR_PENDSGIR1,SGI Clear Pending Register 1"
group.long 0xF18++0x03
line.long 0x00 "GICD_CLR_PENDSGIR2,SGI Clear Pending Register 2"
group.long 0xF1C++0x03
line.long 0x00 "GICD_CLR_PENDSGIR3,SGI Clear Pending Register 3"
group.long 0xF20++0x03
line.long 0x00 "GICD_SET_PENDSGIR0,SGI Set Pending Register 0"
group.long 0xF24++0x03
line.long 0x00 "GICD_SET_PENDSGIR1,SGI Set Pending Register 1"
group.long 0xF28++0x03
line.long 0x00 "GICD_SET_PENDSGIR2,SGI Set Pending Register 2"
group.long 0xF2C++0x03
line.long 0x00 "GICD_SET_PENDSGIR3,SGI Set Pending Register 3"
endif
tree.end
width 24.
tree "Interrupt Routing Registers"
group.quad 0x6100++0x07
line.quad 0x00 "GICD_IROUTER32 ,Interrupt Routing Register 32 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6108++0x07
line.quad 0x00 "GICD_IROUTER33 ,Interrupt Routing Register 33 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6110++0x07
line.quad 0x00 "GICD_IROUTER34 ,Interrupt Routing Register 34 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6118++0x07
line.quad 0x00 "GICD_IROUTER35 ,Interrupt Routing Register 35 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6120++0x07
line.quad 0x00 "GICD_IROUTER36 ,Interrupt Routing Register 36 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6128++0x07
line.quad 0x00 "GICD_IROUTER37 ,Interrupt Routing Register 37 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6130++0x07
line.quad 0x00 "GICD_IROUTER38 ,Interrupt Routing Register 38 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6138++0x07
line.quad 0x00 "GICD_IROUTER39 ,Interrupt Routing Register 39 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6140++0x07
line.quad 0x00 "GICD_IROUTER40 ,Interrupt Routing Register 40 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6148++0x07
line.quad 0x00 "GICD_IROUTER41 ,Interrupt Routing Register 41 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6150++0x07
line.quad 0x00 "GICD_IROUTER42 ,Interrupt Routing Register 42 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6158++0x07
line.quad 0x00 "GICD_IROUTER43 ,Interrupt Routing Register 43 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6160++0x07
line.quad 0x00 "GICD_IROUTER44 ,Interrupt Routing Register 44 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6168++0x07
line.quad 0x00 "GICD_IROUTER45 ,Interrupt Routing Register 45 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6170++0x07
line.quad 0x00 "GICD_IROUTER46 ,Interrupt Routing Register 46 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6178++0x07
line.quad 0x00 "GICD_IROUTER47 ,Interrupt Routing Register 47 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6180++0x07
line.quad 0x00 "GICD_IROUTER48 ,Interrupt Routing Register 48 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6188++0x07
line.quad 0x00 "GICD_IROUTER49 ,Interrupt Routing Register 49 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6190++0x07
line.quad 0x00 "GICD_IROUTER50 ,Interrupt Routing Register 50 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6198++0x07
line.quad 0x00 "GICD_IROUTER51 ,Interrupt Routing Register 51 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A0++0x07
line.quad 0x00 "GICD_IROUTER52 ,Interrupt Routing Register 52 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61A8++0x07
line.quad 0x00 "GICD_IROUTER53 ,Interrupt Routing Register 53 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B0++0x07
line.quad 0x00 "GICD_IROUTER54 ,Interrupt Routing Register 54 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61B8++0x07
line.quad 0x00 "GICD_IROUTER55 ,Interrupt Routing Register 55 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C0++0x07
line.quad 0x00 "GICD_IROUTER56 ,Interrupt Routing Register 56 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61C8++0x07
line.quad 0x00 "GICD_IROUTER57 ,Interrupt Routing Register 57 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D0++0x07
line.quad 0x00 "GICD_IROUTER58 ,Interrupt Routing Register 58 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61D8++0x07
line.quad 0x00 "GICD_IROUTER59 ,Interrupt Routing Register 59 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E0++0x07
line.quad 0x00 "GICD_IROUTER60 ,Interrupt Routing Register 60 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61E8++0x07
line.quad 0x00 "GICD_IROUTER61 ,Interrupt Routing Register 61 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F0++0x07
line.quad 0x00 "GICD_IROUTER62 ,Interrupt Routing Register 62 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x61F8++0x07
line.quad 0x00 "GICD_IROUTER63 ,Interrupt Routing Register 63 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6200++0x07
line.quad 0x00 "GICD_IROUTER64 ,Interrupt Routing Register 64 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6208++0x07
line.quad 0x00 "GICD_IROUTER65 ,Interrupt Routing Register 65 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6210++0x07
line.quad 0x00 "GICD_IROUTER66 ,Interrupt Routing Register 66 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6218++0x07
line.quad 0x00 "GICD_IROUTER67 ,Interrupt Routing Register 67 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6220++0x07
line.quad 0x00 "GICD_IROUTER68 ,Interrupt Routing Register 68 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6228++0x07
line.quad 0x00 "GICD_IROUTER69 ,Interrupt Routing Register 69 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6230++0x07
line.quad 0x00 "GICD_IROUTER70 ,Interrupt Routing Register 70 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6238++0x07
line.quad 0x00 "GICD_IROUTER71 ,Interrupt Routing Register 71 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6240++0x07
line.quad 0x00 "GICD_IROUTER72 ,Interrupt Routing Register 72 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6248++0x07
line.quad 0x00 "GICD_IROUTER73 ,Interrupt Routing Register 73 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6250++0x07
line.quad 0x00 "GICD_IROUTER74 ,Interrupt Routing Register 74 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6258++0x07
line.quad 0x00 "GICD_IROUTER75 ,Interrupt Routing Register 75 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6260++0x07
line.quad 0x00 "GICD_IROUTER76 ,Interrupt Routing Register 76 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6268++0x07
line.quad 0x00 "GICD_IROUTER77 ,Interrupt Routing Register 77 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6270++0x07
line.quad 0x00 "GICD_IROUTER78 ,Interrupt Routing Register 78 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6278++0x07
line.quad 0x00 "GICD_IROUTER79 ,Interrupt Routing Register 79 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6280++0x07
line.quad 0x00 "GICD_IROUTER80 ,Interrupt Routing Register 80 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6288++0x07
line.quad 0x00 "GICD_IROUTER81 ,Interrupt Routing Register 81 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6290++0x07
line.quad 0x00 "GICD_IROUTER82 ,Interrupt Routing Register 82 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6298++0x07
line.quad 0x00 "GICD_IROUTER83 ,Interrupt Routing Register 83 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A0++0x07
line.quad 0x00 "GICD_IROUTER84 ,Interrupt Routing Register 84 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62A8++0x07
line.quad 0x00 "GICD_IROUTER85 ,Interrupt Routing Register 85 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B0++0x07
line.quad 0x00 "GICD_IROUTER86 ,Interrupt Routing Register 86 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62B8++0x07
line.quad 0x00 "GICD_IROUTER87 ,Interrupt Routing Register 87 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C0++0x07
line.quad 0x00 "GICD_IROUTER88 ,Interrupt Routing Register 88 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62C8++0x07
line.quad 0x00 "GICD_IROUTER89 ,Interrupt Routing Register 89 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D0++0x07
line.quad 0x00 "GICD_IROUTER90 ,Interrupt Routing Register 90 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62D8++0x07
line.quad 0x00 "GICD_IROUTER91 ,Interrupt Routing Register 91 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E0++0x07
line.quad 0x00 "GICD_IROUTER92 ,Interrupt Routing Register 92 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62E8++0x07
line.quad 0x00 "GICD_IROUTER93 ,Interrupt Routing Register 93 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F0++0x07
line.quad 0x00 "GICD_IROUTER94 ,Interrupt Routing Register 94 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x62F8++0x07
line.quad 0x00 "GICD_IROUTER95 ,Interrupt Routing Register 95 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6300++0x07
line.quad 0x00 "GICD_IROUTER96 ,Interrupt Routing Register 96 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6308++0x07
line.quad 0x00 "GICD_IROUTER97 ,Interrupt Routing Register 97 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6310++0x07
line.quad 0x00 "GICD_IROUTER98 ,Interrupt Routing Register 98 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6318++0x07
line.quad 0x00 "GICD_IROUTER99 ,Interrupt Routing Register 99 "
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6320++0x07
line.quad 0x00 "GICD_IROUTER100,Interrupt Routing Register 100"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6328++0x07
line.quad 0x00 "GICD_IROUTER101,Interrupt Routing Register 101"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6330++0x07
line.quad 0x00 "GICD_IROUTER102,Interrupt Routing Register 102"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6338++0x07
line.quad 0x00 "GICD_IROUTER103,Interrupt Routing Register 103"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6340++0x07
line.quad 0x00 "GICD_IROUTER104,Interrupt Routing Register 104"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6348++0x07
line.quad 0x00 "GICD_IROUTER105,Interrupt Routing Register 105"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6350++0x07
line.quad 0x00 "GICD_IROUTER106,Interrupt Routing Register 106"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6358++0x07
line.quad 0x00 "GICD_IROUTER107,Interrupt Routing Register 107"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6360++0x07
line.quad 0x00 "GICD_IROUTER108,Interrupt Routing Register 108"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6368++0x07
line.quad 0x00 "GICD_IROUTER109,Interrupt Routing Register 109"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6370++0x07
line.quad 0x00 "GICD_IROUTER110,Interrupt Routing Register 110"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6378++0x07
line.quad 0x00 "GICD_IROUTER111,Interrupt Routing Register 111"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6380++0x07
line.quad 0x00 "GICD_IROUTER112,Interrupt Routing Register 112"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6388++0x07
line.quad 0x00 "GICD_IROUTER113,Interrupt Routing Register 113"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6390++0x07
line.quad 0x00 "GICD_IROUTER114,Interrupt Routing Register 114"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6398++0x07
line.quad 0x00 "GICD_IROUTER115,Interrupt Routing Register 115"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A0++0x07
line.quad 0x00 "GICD_IROUTER116,Interrupt Routing Register 116"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63A8++0x07
line.quad 0x00 "GICD_IROUTER117,Interrupt Routing Register 117"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B0++0x07
line.quad 0x00 "GICD_IROUTER118,Interrupt Routing Register 118"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63B8++0x07
line.quad 0x00 "GICD_IROUTER119,Interrupt Routing Register 119"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C0++0x07
line.quad 0x00 "GICD_IROUTER120,Interrupt Routing Register 120"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63C8++0x07
line.quad 0x00 "GICD_IROUTER121,Interrupt Routing Register 121"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D0++0x07
line.quad 0x00 "GICD_IROUTER122,Interrupt Routing Register 122"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63D8++0x07
line.quad 0x00 "GICD_IROUTER123,Interrupt Routing Register 123"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E0++0x07
line.quad 0x00 "GICD_IROUTER124,Interrupt Routing Register 124"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63E8++0x07
line.quad 0x00 "GICD_IROUTER125,Interrupt Routing Register 125"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F0++0x07
line.quad 0x00 "GICD_IROUTER126,Interrupt Routing Register 126"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x63F8++0x07
line.quad 0x00 "GICD_IROUTER127,Interrupt Routing Register 127"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6400++0x07
line.quad 0x00 "GICD_IROUTER128,Interrupt Routing Register 128"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6408++0x07
line.quad 0x00 "GICD_IROUTER129,Interrupt Routing Register 129"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6410++0x07
line.quad 0x00 "GICD_IROUTER130,Interrupt Routing Register 130"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6418++0x07
line.quad 0x00 "GICD_IROUTER131,Interrupt Routing Register 131"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6420++0x07
line.quad 0x00 "GICD_IROUTER132,Interrupt Routing Register 132"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6428++0x07
line.quad 0x00 "GICD_IROUTER133,Interrupt Routing Register 133"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6430++0x07
line.quad 0x00 "GICD_IROUTER134,Interrupt Routing Register 134"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6438++0x07
line.quad 0x00 "GICD_IROUTER135,Interrupt Routing Register 135"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6440++0x07
line.quad 0x00 "GICD_IROUTER136,Interrupt Routing Register 136"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6448++0x07
line.quad 0x00 "GICD_IROUTER137,Interrupt Routing Register 137"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6450++0x07
line.quad 0x00 "GICD_IROUTER138,Interrupt Routing Register 138"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6458++0x07
line.quad 0x00 "GICD_IROUTER139,Interrupt Routing Register 139"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6460++0x07
line.quad 0x00 "GICD_IROUTER140,Interrupt Routing Register 140"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6468++0x07
line.quad 0x00 "GICD_IROUTER141,Interrupt Routing Register 141"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6470++0x07
line.quad 0x00 "GICD_IROUTER142,Interrupt Routing Register 142"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6478++0x07
line.quad 0x00 "GICD_IROUTER143,Interrupt Routing Register 143"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6480++0x07
line.quad 0x00 "GICD_IROUTER144,Interrupt Routing Register 144"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6488++0x07
line.quad 0x00 "GICD_IROUTER145,Interrupt Routing Register 145"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6490++0x07
line.quad 0x00 "GICD_IROUTER146,Interrupt Routing Register 146"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6498++0x07
line.quad 0x00 "GICD_IROUTER147,Interrupt Routing Register 147"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A0++0x07
line.quad 0x00 "GICD_IROUTER148,Interrupt Routing Register 148"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64A8++0x07
line.quad 0x00 "GICD_IROUTER149,Interrupt Routing Register 149"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B0++0x07
line.quad 0x00 "GICD_IROUTER150,Interrupt Routing Register 150"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64B8++0x07
line.quad 0x00 "GICD_IROUTER151,Interrupt Routing Register 151"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C0++0x07
line.quad 0x00 "GICD_IROUTER152,Interrupt Routing Register 152"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64C8++0x07
line.quad 0x00 "GICD_IROUTER153,Interrupt Routing Register 153"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D0++0x07
line.quad 0x00 "GICD_IROUTER154,Interrupt Routing Register 154"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64D8++0x07
line.quad 0x00 "GICD_IROUTER155,Interrupt Routing Register 155"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E0++0x07
line.quad 0x00 "GICD_IROUTER156,Interrupt Routing Register 156"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64E8++0x07
line.quad 0x00 "GICD_IROUTER157,Interrupt Routing Register 157"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F0++0x07
line.quad 0x00 "GICD_IROUTER158,Interrupt Routing Register 158"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x64F8++0x07
line.quad 0x00 "GICD_IROUTER159,Interrupt Routing Register 159"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6500++0x07
line.quad 0x00 "GICD_IROUTER160,Interrupt Routing Register 160"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6508++0x07
line.quad 0x00 "GICD_IROUTER161,Interrupt Routing Register 161"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6510++0x07
line.quad 0x00 "GICD_IROUTER162,Interrupt Routing Register 162"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6518++0x07
line.quad 0x00 "GICD_IROUTER163,Interrupt Routing Register 163"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6520++0x07
line.quad 0x00 "GICD_IROUTER164,Interrupt Routing Register 164"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6528++0x07
line.quad 0x00 "GICD_IROUTER165,Interrupt Routing Register 165"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6530++0x07
line.quad 0x00 "GICD_IROUTER166,Interrupt Routing Register 166"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6538++0x07
line.quad 0x00 "GICD_IROUTER167,Interrupt Routing Register 167"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6540++0x07
line.quad 0x00 "GICD_IROUTER168,Interrupt Routing Register 168"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6548++0x07
line.quad 0x00 "GICD_IROUTER169,Interrupt Routing Register 169"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6550++0x07
line.quad 0x00 "GICD_IROUTER170,Interrupt Routing Register 170"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6558++0x07
line.quad 0x00 "GICD_IROUTER171,Interrupt Routing Register 171"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6560++0x07
line.quad 0x00 "GICD_IROUTER172,Interrupt Routing Register 172"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6568++0x07
line.quad 0x00 "GICD_IROUTER173,Interrupt Routing Register 173"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6570++0x07
line.quad 0x00 "GICD_IROUTER174,Interrupt Routing Register 174"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6578++0x07
line.quad 0x00 "GICD_IROUTER175,Interrupt Routing Register 175"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6580++0x07
line.quad 0x00 "GICD_IROUTER176,Interrupt Routing Register 176"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6588++0x07
line.quad 0x00 "GICD_IROUTER177,Interrupt Routing Register 177"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6590++0x07
line.quad 0x00 "GICD_IROUTER178,Interrupt Routing Register 178"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6598++0x07
line.quad 0x00 "GICD_IROUTER179,Interrupt Routing Register 179"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A0++0x07
line.quad 0x00 "GICD_IROUTER180,Interrupt Routing Register 180"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65A8++0x07
line.quad 0x00 "GICD_IROUTER181,Interrupt Routing Register 181"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B0++0x07
line.quad 0x00 "GICD_IROUTER182,Interrupt Routing Register 182"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65B8++0x07
line.quad 0x00 "GICD_IROUTER183,Interrupt Routing Register 183"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C0++0x07
line.quad 0x00 "GICD_IROUTER184,Interrupt Routing Register 184"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65C8++0x07
line.quad 0x00 "GICD_IROUTER185,Interrupt Routing Register 185"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D0++0x07
line.quad 0x00 "GICD_IROUTER186,Interrupt Routing Register 186"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65D8++0x07
line.quad 0x00 "GICD_IROUTER187,Interrupt Routing Register 187"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E0++0x07
line.quad 0x00 "GICD_IROUTER188,Interrupt Routing Register 188"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65E8++0x07
line.quad 0x00 "GICD_IROUTER189,Interrupt Routing Register 189"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F0++0x07
line.quad 0x00 "GICD_IROUTER190,Interrupt Routing Register 190"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x65F8++0x07
line.quad 0x00 "GICD_IROUTER191,Interrupt Routing Register 191"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6600++0x07
line.quad 0x00 "GICD_IROUTER192,Interrupt Routing Register 192"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6608++0x07
line.quad 0x00 "GICD_IROUTER193,Interrupt Routing Register 193"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6610++0x07
line.quad 0x00 "GICD_IROUTER194,Interrupt Routing Register 194"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6618++0x07
line.quad 0x00 "GICD_IROUTER195,Interrupt Routing Register 195"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6620++0x07
line.quad 0x00 "GICD_IROUTER196,Interrupt Routing Register 196"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6628++0x07
line.quad 0x00 "GICD_IROUTER197,Interrupt Routing Register 197"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6630++0x07
line.quad 0x00 "GICD_IROUTER198,Interrupt Routing Register 198"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6638++0x07
line.quad 0x00 "GICD_IROUTER199,Interrupt Routing Register 199"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6640++0x07
line.quad 0x00 "GICD_IROUTER200,Interrupt Routing Register 200"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6648++0x07
line.quad 0x00 "GICD_IROUTER201,Interrupt Routing Register 201"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6650++0x07
line.quad 0x00 "GICD_IROUTER202,Interrupt Routing Register 202"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6658++0x07
line.quad 0x00 "GICD_IROUTER203,Interrupt Routing Register 203"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6660++0x07
line.quad 0x00 "GICD_IROUTER204,Interrupt Routing Register 204"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6668++0x07
line.quad 0x00 "GICD_IROUTER205,Interrupt Routing Register 205"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6670++0x07
line.quad 0x00 "GICD_IROUTER206,Interrupt Routing Register 206"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6678++0x07
line.quad 0x00 "GICD_IROUTER207,Interrupt Routing Register 207"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6680++0x07
line.quad 0x00 "GICD_IROUTER208,Interrupt Routing Register 208"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6688++0x07
line.quad 0x00 "GICD_IROUTER209,Interrupt Routing Register 209"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6690++0x07
line.quad 0x00 "GICD_IROUTER210,Interrupt Routing Register 210"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6698++0x07
line.quad 0x00 "GICD_IROUTER211,Interrupt Routing Register 211"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A0++0x07
line.quad 0x00 "GICD_IROUTER212,Interrupt Routing Register 212"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66A8++0x07
line.quad 0x00 "GICD_IROUTER213,Interrupt Routing Register 213"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B0++0x07
line.quad 0x00 "GICD_IROUTER214,Interrupt Routing Register 214"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66B8++0x07
line.quad 0x00 "GICD_IROUTER215,Interrupt Routing Register 215"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C0++0x07
line.quad 0x00 "GICD_IROUTER216,Interrupt Routing Register 216"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66C8++0x07
line.quad 0x00 "GICD_IROUTER217,Interrupt Routing Register 217"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D0++0x07
line.quad 0x00 "GICD_IROUTER218,Interrupt Routing Register 218"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66D8++0x07
line.quad 0x00 "GICD_IROUTER219,Interrupt Routing Register 219"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E0++0x07
line.quad 0x00 "GICD_IROUTER220,Interrupt Routing Register 220"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66E8++0x07
line.quad 0x00 "GICD_IROUTER221,Interrupt Routing Register 221"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F0++0x07
line.quad 0x00 "GICD_IROUTER222,Interrupt Routing Register 222"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x66F8++0x07
line.quad 0x00 "GICD_IROUTER223,Interrupt Routing Register 223"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6700++0x07
line.quad 0x00 "GICD_IROUTER224,Interrupt Routing Register 224"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6708++0x07
line.quad 0x00 "GICD_IROUTER225,Interrupt Routing Register 225"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6710++0x07
line.quad 0x00 "GICD_IROUTER226,Interrupt Routing Register 226"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6718++0x07
line.quad 0x00 "GICD_IROUTER227,Interrupt Routing Register 227"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6720++0x07
line.quad 0x00 "GICD_IROUTER228,Interrupt Routing Register 228"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6728++0x07
line.quad 0x00 "GICD_IROUTER229,Interrupt Routing Register 229"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6730++0x07
line.quad 0x00 "GICD_IROUTER230,Interrupt Routing Register 230"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6738++0x07
line.quad 0x00 "GICD_IROUTER231,Interrupt Routing Register 231"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6740++0x07
line.quad 0x00 "GICD_IROUTER232,Interrupt Routing Register 232"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6748++0x07
line.quad 0x00 "GICD_IROUTER233,Interrupt Routing Register 233"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6750++0x07
line.quad 0x00 "GICD_IROUTER234,Interrupt Routing Register 234"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6758++0x07
line.quad 0x00 "GICD_IROUTER235,Interrupt Routing Register 235"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6760++0x07
line.quad 0x00 "GICD_IROUTER236,Interrupt Routing Register 236"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6768++0x07
line.quad 0x00 "GICD_IROUTER237,Interrupt Routing Register 237"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6770++0x07
line.quad 0x00 "GICD_IROUTER238,Interrupt Routing Register 238"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6778++0x07
line.quad 0x00 "GICD_IROUTER239,Interrupt Routing Register 239"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6780++0x07
line.quad 0x00 "GICD_IROUTER240,Interrupt Routing Register 240"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6788++0x07
line.quad 0x00 "GICD_IROUTER241,Interrupt Routing Register 241"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6790++0x07
line.quad 0x00 "GICD_IROUTER242,Interrupt Routing Register 242"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6798++0x07
line.quad 0x00 "GICD_IROUTER243,Interrupt Routing Register 243"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A0++0x07
line.quad 0x00 "GICD_IROUTER244,Interrupt Routing Register 244"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67A8++0x07
line.quad 0x00 "GICD_IROUTER245,Interrupt Routing Register 245"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B0++0x07
line.quad 0x00 "GICD_IROUTER246,Interrupt Routing Register 246"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67B8++0x07
line.quad 0x00 "GICD_IROUTER247,Interrupt Routing Register 247"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C0++0x07
line.quad 0x00 "GICD_IROUTER248,Interrupt Routing Register 248"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67C8++0x07
line.quad 0x00 "GICD_IROUTER249,Interrupt Routing Register 249"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D0++0x07
line.quad 0x00 "GICD_IROUTER250,Interrupt Routing Register 250"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67D8++0x07
line.quad 0x00 "GICD_IROUTER251,Interrupt Routing Register 251"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E0++0x07
line.quad 0x00 "GICD_IROUTER252,Interrupt Routing Register 252"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67E8++0x07
line.quad 0x00 "GICD_IROUTER253,Interrupt Routing Register 253"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F0++0x07
line.quad 0x00 "GICD_IROUTER254,Interrupt Routing Register 254"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x67F8++0x07
line.quad 0x00 "GICD_IROUTER255,Interrupt Routing Register 255"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6800++0x07
line.quad 0x00 "GICD_IROUTER256,Interrupt Routing Register 256"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6808++0x07
line.quad 0x00 "GICD_IROUTER257,Interrupt Routing Register 257"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6810++0x07
line.quad 0x00 "GICD_IROUTER258,Interrupt Routing Register 258"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6818++0x07
line.quad 0x00 "GICD_IROUTER259,Interrupt Routing Register 259"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6820++0x07
line.quad 0x00 "GICD_IROUTER260,Interrupt Routing Register 260"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6828++0x07
line.quad 0x00 "GICD_IROUTER261,Interrupt Routing Register 261"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6830++0x07
line.quad 0x00 "GICD_IROUTER262,Interrupt Routing Register 262"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6838++0x07
line.quad 0x00 "GICD_IROUTER263,Interrupt Routing Register 263"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6840++0x07
line.quad 0x00 "GICD_IROUTER264,Interrupt Routing Register 264"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6848++0x07
line.quad 0x00 "GICD_IROUTER265,Interrupt Routing Register 265"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6850++0x07
line.quad 0x00 "GICD_IROUTER266,Interrupt Routing Register 266"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6858++0x07
line.quad 0x00 "GICD_IROUTER267,Interrupt Routing Register 267"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6860++0x07
line.quad 0x00 "GICD_IROUTER268,Interrupt Routing Register 268"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6868++0x07
line.quad 0x00 "GICD_IROUTER269,Interrupt Routing Register 269"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6870++0x07
line.quad 0x00 "GICD_IROUTER270,Interrupt Routing Register 270"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6878++0x07
line.quad 0x00 "GICD_IROUTER271,Interrupt Routing Register 271"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6880++0x07
line.quad 0x00 "GICD_IROUTER272,Interrupt Routing Register 272"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6888++0x07
line.quad 0x00 "GICD_IROUTER273,Interrupt Routing Register 273"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6890++0x07
line.quad 0x00 "GICD_IROUTER274,Interrupt Routing Register 274"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6898++0x07
line.quad 0x00 "GICD_IROUTER275,Interrupt Routing Register 275"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A0++0x07
line.quad 0x00 "GICD_IROUTER276,Interrupt Routing Register 276"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68A8++0x07
line.quad 0x00 "GICD_IROUTER277,Interrupt Routing Register 277"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B0++0x07
line.quad 0x00 "GICD_IROUTER278,Interrupt Routing Register 278"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68B8++0x07
line.quad 0x00 "GICD_IROUTER279,Interrupt Routing Register 279"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C0++0x07
line.quad 0x00 "GICD_IROUTER280,Interrupt Routing Register 280"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68C8++0x07
line.quad 0x00 "GICD_IROUTER281,Interrupt Routing Register 281"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D0++0x07
line.quad 0x00 "GICD_IROUTER282,Interrupt Routing Register 282"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68D8++0x07
line.quad 0x00 "GICD_IROUTER283,Interrupt Routing Register 283"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E0++0x07
line.quad 0x00 "GICD_IROUTER284,Interrupt Routing Register 284"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68E8++0x07
line.quad 0x00 "GICD_IROUTER285,Interrupt Routing Register 285"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F0++0x07
line.quad 0x00 "GICD_IROUTER286,Interrupt Routing Register 286"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x68F8++0x07
line.quad 0x00 "GICD_IROUTER287,Interrupt Routing Register 287"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6900++0x07
line.quad 0x00 "GICD_IROUTER288,Interrupt Routing Register 288"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6908++0x07
line.quad 0x00 "GICD_IROUTER289,Interrupt Routing Register 289"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6910++0x07
line.quad 0x00 "GICD_IROUTER290,Interrupt Routing Register 290"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6918++0x07
line.quad 0x00 "GICD_IROUTER291,Interrupt Routing Register 291"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6920++0x07
line.quad 0x00 "GICD_IROUTER292,Interrupt Routing Register 292"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6928++0x07
line.quad 0x00 "GICD_IROUTER293,Interrupt Routing Register 293"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6930++0x07
line.quad 0x00 "GICD_IROUTER294,Interrupt Routing Register 294"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6938++0x07
line.quad 0x00 "GICD_IROUTER295,Interrupt Routing Register 295"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6940++0x07
line.quad 0x00 "GICD_IROUTER296,Interrupt Routing Register 296"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6948++0x07
line.quad 0x00 "GICD_IROUTER297,Interrupt Routing Register 297"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6950++0x07
line.quad 0x00 "GICD_IROUTER298,Interrupt Routing Register 298"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6958++0x07
line.quad 0x00 "GICD_IROUTER299,Interrupt Routing Register 299"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6960++0x07
line.quad 0x00 "GICD_IROUTER300,Interrupt Routing Register 300"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6968++0x07
line.quad 0x00 "GICD_IROUTER301,Interrupt Routing Register 301"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6970++0x07
line.quad 0x00 "GICD_IROUTER302,Interrupt Routing Register 302"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6978++0x07
line.quad 0x00 "GICD_IROUTER303,Interrupt Routing Register 303"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6980++0x07
line.quad 0x00 "GICD_IROUTER304,Interrupt Routing Register 304"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6988++0x07
line.quad 0x00 "GICD_IROUTER305,Interrupt Routing Register 305"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6990++0x07
line.quad 0x00 "GICD_IROUTER306,Interrupt Routing Register 306"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6998++0x07
line.quad 0x00 "GICD_IROUTER307,Interrupt Routing Register 307"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A0++0x07
line.quad 0x00 "GICD_IROUTER308,Interrupt Routing Register 308"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69A8++0x07
line.quad 0x00 "GICD_IROUTER309,Interrupt Routing Register 309"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B0++0x07
line.quad 0x00 "GICD_IROUTER310,Interrupt Routing Register 310"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69B8++0x07
line.quad 0x00 "GICD_IROUTER311,Interrupt Routing Register 311"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C0++0x07
line.quad 0x00 "GICD_IROUTER312,Interrupt Routing Register 312"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69C8++0x07
line.quad 0x00 "GICD_IROUTER313,Interrupt Routing Register 313"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D0++0x07
line.quad 0x00 "GICD_IROUTER314,Interrupt Routing Register 314"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69D8++0x07
line.quad 0x00 "GICD_IROUTER315,Interrupt Routing Register 315"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E0++0x07
line.quad 0x00 "GICD_IROUTER316,Interrupt Routing Register 316"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69E8++0x07
line.quad 0x00 "GICD_IROUTER317,Interrupt Routing Register 317"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F0++0x07
line.quad 0x00 "GICD_IROUTER318,Interrupt Routing Register 318"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x69F8++0x07
line.quad 0x00 "GICD_IROUTER319,Interrupt Routing Register 319"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A00++0x07
line.quad 0x00 "GICD_IROUTER320,Interrupt Routing Register 320"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A08++0x07
line.quad 0x00 "GICD_IROUTER321,Interrupt Routing Register 321"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A10++0x07
line.quad 0x00 "GICD_IROUTER322,Interrupt Routing Register 322"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A18++0x07
line.quad 0x00 "GICD_IROUTER323,Interrupt Routing Register 323"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A20++0x07
line.quad 0x00 "GICD_IROUTER324,Interrupt Routing Register 324"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A28++0x07
line.quad 0x00 "GICD_IROUTER325,Interrupt Routing Register 325"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A30++0x07
line.quad 0x00 "GICD_IROUTER326,Interrupt Routing Register 326"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A38++0x07
line.quad 0x00 "GICD_IROUTER327,Interrupt Routing Register 327"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A40++0x07
line.quad 0x00 "GICD_IROUTER328,Interrupt Routing Register 328"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A48++0x07
line.quad 0x00 "GICD_IROUTER329,Interrupt Routing Register 329"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A50++0x07
line.quad 0x00 "GICD_IROUTER330,Interrupt Routing Register 330"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A58++0x07
line.quad 0x00 "GICD_IROUTER331,Interrupt Routing Register 331"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A60++0x07
line.quad 0x00 "GICD_IROUTER332,Interrupt Routing Register 332"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A68++0x07
line.quad 0x00 "GICD_IROUTER333,Interrupt Routing Register 333"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A70++0x07
line.quad 0x00 "GICD_IROUTER334,Interrupt Routing Register 334"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A78++0x07
line.quad 0x00 "GICD_IROUTER335,Interrupt Routing Register 335"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A80++0x07
line.quad 0x00 "GICD_IROUTER336,Interrupt Routing Register 336"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A88++0x07
line.quad 0x00 "GICD_IROUTER337,Interrupt Routing Register 337"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A90++0x07
line.quad 0x00 "GICD_IROUTER338,Interrupt Routing Register 338"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6A98++0x07
line.quad 0x00 "GICD_IROUTER339,Interrupt Routing Register 339"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA0++0x07
line.quad 0x00 "GICD_IROUTER340,Interrupt Routing Register 340"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AA8++0x07
line.quad 0x00 "GICD_IROUTER341,Interrupt Routing Register 341"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB0++0x07
line.quad 0x00 "GICD_IROUTER342,Interrupt Routing Register 342"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AB8++0x07
line.quad 0x00 "GICD_IROUTER343,Interrupt Routing Register 343"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC0++0x07
line.quad 0x00 "GICD_IROUTER344,Interrupt Routing Register 344"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AC8++0x07
line.quad 0x00 "GICD_IROUTER345,Interrupt Routing Register 345"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD0++0x07
line.quad 0x00 "GICD_IROUTER346,Interrupt Routing Register 346"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AD8++0x07
line.quad 0x00 "GICD_IROUTER347,Interrupt Routing Register 347"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE0++0x07
line.quad 0x00 "GICD_IROUTER348,Interrupt Routing Register 348"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AE8++0x07
line.quad 0x00 "GICD_IROUTER349,Interrupt Routing Register 349"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF0++0x07
line.quad 0x00 "GICD_IROUTER350,Interrupt Routing Register 350"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6AF8++0x07
line.quad 0x00 "GICD_IROUTER351,Interrupt Routing Register 351"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B00++0x07
line.quad 0x00 "GICD_IROUTER352,Interrupt Routing Register 352"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B08++0x07
line.quad 0x00 "GICD_IROUTER353,Interrupt Routing Register 353"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B10++0x07
line.quad 0x00 "GICD_IROUTER354,Interrupt Routing Register 354"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B18++0x07
line.quad 0x00 "GICD_IROUTER355,Interrupt Routing Register 355"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B20++0x07
line.quad 0x00 "GICD_IROUTER356,Interrupt Routing Register 356"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B28++0x07
line.quad 0x00 "GICD_IROUTER357,Interrupt Routing Register 357"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B30++0x07
line.quad 0x00 "GICD_IROUTER358,Interrupt Routing Register 358"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B38++0x07
line.quad 0x00 "GICD_IROUTER359,Interrupt Routing Register 359"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B40++0x07
line.quad 0x00 "GICD_IROUTER360,Interrupt Routing Register 360"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B48++0x07
line.quad 0x00 "GICD_IROUTER361,Interrupt Routing Register 361"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B50++0x07
line.quad 0x00 "GICD_IROUTER362,Interrupt Routing Register 362"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B58++0x07
line.quad 0x00 "GICD_IROUTER363,Interrupt Routing Register 363"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B60++0x07
line.quad 0x00 "GICD_IROUTER364,Interrupt Routing Register 364"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B68++0x07
line.quad 0x00 "GICD_IROUTER365,Interrupt Routing Register 365"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B70++0x07
line.quad 0x00 "GICD_IROUTER366,Interrupt Routing Register 366"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B78++0x07
line.quad 0x00 "GICD_IROUTER367,Interrupt Routing Register 367"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B80++0x07
line.quad 0x00 "GICD_IROUTER368,Interrupt Routing Register 368"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B88++0x07
line.quad 0x00 "GICD_IROUTER369,Interrupt Routing Register 369"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B90++0x07
line.quad 0x00 "GICD_IROUTER370,Interrupt Routing Register 370"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6B98++0x07
line.quad 0x00 "GICD_IROUTER371,Interrupt Routing Register 371"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA0++0x07
line.quad 0x00 "GICD_IROUTER372,Interrupt Routing Register 372"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BA8++0x07
line.quad 0x00 "GICD_IROUTER373,Interrupt Routing Register 373"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB0++0x07
line.quad 0x00 "GICD_IROUTER374,Interrupt Routing Register 374"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BB8++0x07
line.quad 0x00 "GICD_IROUTER375,Interrupt Routing Register 375"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC0++0x07
line.quad 0x00 "GICD_IROUTER376,Interrupt Routing Register 376"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BC8++0x07
line.quad 0x00 "GICD_IROUTER377,Interrupt Routing Register 377"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD0++0x07
line.quad 0x00 "GICD_IROUTER378,Interrupt Routing Register 378"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BD8++0x07
line.quad 0x00 "GICD_IROUTER379,Interrupt Routing Register 379"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE0++0x07
line.quad 0x00 "GICD_IROUTER380,Interrupt Routing Register 380"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BE8++0x07
line.quad 0x00 "GICD_IROUTER381,Interrupt Routing Register 381"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF0++0x07
line.quad 0x00 "GICD_IROUTER382,Interrupt Routing Register 382"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6BF8++0x07
line.quad 0x00 "GICD_IROUTER383,Interrupt Routing Register 383"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C00++0x07
line.quad 0x00 "GICD_IROUTER384,Interrupt Routing Register 384"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C08++0x07
line.quad 0x00 "GICD_IROUTER385,Interrupt Routing Register 385"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C10++0x07
line.quad 0x00 "GICD_IROUTER386,Interrupt Routing Register 386"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C18++0x07
line.quad 0x00 "GICD_IROUTER387,Interrupt Routing Register 387"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C20++0x07
line.quad 0x00 "GICD_IROUTER388,Interrupt Routing Register 388"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C28++0x07
line.quad 0x00 "GICD_IROUTER389,Interrupt Routing Register 389"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C30++0x07
line.quad 0x00 "GICD_IROUTER390,Interrupt Routing Register 390"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C38++0x07
line.quad 0x00 "GICD_IROUTER391,Interrupt Routing Register 391"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C40++0x07
line.quad 0x00 "GICD_IROUTER392,Interrupt Routing Register 392"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C48++0x07
line.quad 0x00 "GICD_IROUTER393,Interrupt Routing Register 393"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C50++0x07
line.quad 0x00 "GICD_IROUTER394,Interrupt Routing Register 394"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C58++0x07
line.quad 0x00 "GICD_IROUTER395,Interrupt Routing Register 395"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C60++0x07
line.quad 0x00 "GICD_IROUTER396,Interrupt Routing Register 396"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C68++0x07
line.quad 0x00 "GICD_IROUTER397,Interrupt Routing Register 397"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C70++0x07
line.quad 0x00 "GICD_IROUTER398,Interrupt Routing Register 398"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C78++0x07
line.quad 0x00 "GICD_IROUTER399,Interrupt Routing Register 399"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C80++0x07
line.quad 0x00 "GICD_IROUTER400,Interrupt Routing Register 400"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C88++0x07
line.quad 0x00 "GICD_IROUTER401,Interrupt Routing Register 401"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C90++0x07
line.quad 0x00 "GICD_IROUTER402,Interrupt Routing Register 402"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6C98++0x07
line.quad 0x00 "GICD_IROUTER403,Interrupt Routing Register 403"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA0++0x07
line.quad 0x00 "GICD_IROUTER404,Interrupt Routing Register 404"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CA8++0x07
line.quad 0x00 "GICD_IROUTER405,Interrupt Routing Register 405"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB0++0x07
line.quad 0x00 "GICD_IROUTER406,Interrupt Routing Register 406"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CB8++0x07
line.quad 0x00 "GICD_IROUTER407,Interrupt Routing Register 407"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC0++0x07
line.quad 0x00 "GICD_IROUTER408,Interrupt Routing Register 408"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CC8++0x07
line.quad 0x00 "GICD_IROUTER409,Interrupt Routing Register 409"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD0++0x07
line.quad 0x00 "GICD_IROUTER410,Interrupt Routing Register 410"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CD8++0x07
line.quad 0x00 "GICD_IROUTER411,Interrupt Routing Register 411"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE0++0x07
line.quad 0x00 "GICD_IROUTER412,Interrupt Routing Register 412"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CE8++0x07
line.quad 0x00 "GICD_IROUTER413,Interrupt Routing Register 413"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF0++0x07
line.quad 0x00 "GICD_IROUTER414,Interrupt Routing Register 414"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6CF8++0x07
line.quad 0x00 "GICD_IROUTER415,Interrupt Routing Register 415"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D00++0x07
line.quad 0x00 "GICD_IROUTER416,Interrupt Routing Register 416"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D08++0x07
line.quad 0x00 "GICD_IROUTER417,Interrupt Routing Register 417"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D10++0x07
line.quad 0x00 "GICD_IROUTER418,Interrupt Routing Register 418"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D18++0x07
line.quad 0x00 "GICD_IROUTER419,Interrupt Routing Register 419"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D20++0x07
line.quad 0x00 "GICD_IROUTER420,Interrupt Routing Register 420"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D28++0x07
line.quad 0x00 "GICD_IROUTER421,Interrupt Routing Register 421"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D30++0x07
line.quad 0x00 "GICD_IROUTER422,Interrupt Routing Register 422"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D38++0x07
line.quad 0x00 "GICD_IROUTER423,Interrupt Routing Register 423"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D40++0x07
line.quad 0x00 "GICD_IROUTER424,Interrupt Routing Register 424"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D48++0x07
line.quad 0x00 "GICD_IROUTER425,Interrupt Routing Register 425"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D50++0x07
line.quad 0x00 "GICD_IROUTER426,Interrupt Routing Register 426"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D58++0x07
line.quad 0x00 "GICD_IROUTER427,Interrupt Routing Register 427"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D60++0x07
line.quad 0x00 "GICD_IROUTER428,Interrupt Routing Register 428"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D68++0x07
line.quad 0x00 "GICD_IROUTER429,Interrupt Routing Register 429"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D70++0x07
line.quad 0x00 "GICD_IROUTER430,Interrupt Routing Register 430"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D78++0x07
line.quad 0x00 "GICD_IROUTER431,Interrupt Routing Register 431"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D80++0x07
line.quad 0x00 "GICD_IROUTER432,Interrupt Routing Register 432"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D88++0x07
line.quad 0x00 "GICD_IROUTER433,Interrupt Routing Register 433"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D90++0x07
line.quad 0x00 "GICD_IROUTER434,Interrupt Routing Register 434"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6D98++0x07
line.quad 0x00 "GICD_IROUTER435,Interrupt Routing Register 435"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA0++0x07
line.quad 0x00 "GICD_IROUTER436,Interrupt Routing Register 436"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DA8++0x07
line.quad 0x00 "GICD_IROUTER437,Interrupt Routing Register 437"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB0++0x07
line.quad 0x00 "GICD_IROUTER438,Interrupt Routing Register 438"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DB8++0x07
line.quad 0x00 "GICD_IROUTER439,Interrupt Routing Register 439"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC0++0x07
line.quad 0x00 "GICD_IROUTER440,Interrupt Routing Register 440"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DC8++0x07
line.quad 0x00 "GICD_IROUTER441,Interrupt Routing Register 441"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD0++0x07
line.quad 0x00 "GICD_IROUTER442,Interrupt Routing Register 442"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DD8++0x07
line.quad 0x00 "GICD_IROUTER443,Interrupt Routing Register 443"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE0++0x07
line.quad 0x00 "GICD_IROUTER444,Interrupt Routing Register 444"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DE8++0x07
line.quad 0x00 "GICD_IROUTER445,Interrupt Routing Register 445"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF0++0x07
line.quad 0x00 "GICD_IROUTER446,Interrupt Routing Register 446"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6DF8++0x07
line.quad 0x00 "GICD_IROUTER447,Interrupt Routing Register 447"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E00++0x07
line.quad 0x00 "GICD_IROUTER448,Interrupt Routing Register 448"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E08++0x07
line.quad 0x00 "GICD_IROUTER449,Interrupt Routing Register 449"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E10++0x07
line.quad 0x00 "GICD_IROUTER450,Interrupt Routing Register 450"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E18++0x07
line.quad 0x00 "GICD_IROUTER451,Interrupt Routing Register 451"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E20++0x07
line.quad 0x00 "GICD_IROUTER452,Interrupt Routing Register 452"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E28++0x07
line.quad 0x00 "GICD_IROUTER453,Interrupt Routing Register 453"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E30++0x07
line.quad 0x00 "GICD_IROUTER454,Interrupt Routing Register 454"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E38++0x07
line.quad 0x00 "GICD_IROUTER455,Interrupt Routing Register 455"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E40++0x07
line.quad 0x00 "GICD_IROUTER456,Interrupt Routing Register 456"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E48++0x07
line.quad 0x00 "GICD_IROUTER457,Interrupt Routing Register 457"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E50++0x07
line.quad 0x00 "GICD_IROUTER458,Interrupt Routing Register 458"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E58++0x07
line.quad 0x00 "GICD_IROUTER459,Interrupt Routing Register 459"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E60++0x07
line.quad 0x00 "GICD_IROUTER460,Interrupt Routing Register 460"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E68++0x07
line.quad 0x00 "GICD_IROUTER461,Interrupt Routing Register 461"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E70++0x07
line.quad 0x00 "GICD_IROUTER462,Interrupt Routing Register 462"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E78++0x07
line.quad 0x00 "GICD_IROUTER463,Interrupt Routing Register 463"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E80++0x07
line.quad 0x00 "GICD_IROUTER464,Interrupt Routing Register 464"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E88++0x07
line.quad 0x00 "GICD_IROUTER465,Interrupt Routing Register 465"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E90++0x07
line.quad 0x00 "GICD_IROUTER466,Interrupt Routing Register 466"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6E98++0x07
line.quad 0x00 "GICD_IROUTER467,Interrupt Routing Register 467"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA0++0x07
line.quad 0x00 "GICD_IROUTER468,Interrupt Routing Register 468"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EA8++0x07
line.quad 0x00 "GICD_IROUTER469,Interrupt Routing Register 469"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB0++0x07
line.quad 0x00 "GICD_IROUTER470,Interrupt Routing Register 470"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EB8++0x07
line.quad 0x00 "GICD_IROUTER471,Interrupt Routing Register 471"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC0++0x07
line.quad 0x00 "GICD_IROUTER472,Interrupt Routing Register 472"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EC8++0x07
line.quad 0x00 "GICD_IROUTER473,Interrupt Routing Register 473"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED0++0x07
line.quad 0x00 "GICD_IROUTER474,Interrupt Routing Register 474"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6ED8++0x07
line.quad 0x00 "GICD_IROUTER475,Interrupt Routing Register 475"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE0++0x07
line.quad 0x00 "GICD_IROUTER476,Interrupt Routing Register 476"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EE8++0x07
line.quad 0x00 "GICD_IROUTER477,Interrupt Routing Register 477"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF0++0x07
line.quad 0x00 "GICD_IROUTER478,Interrupt Routing Register 478"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6EF8++0x07
line.quad 0x00 "GICD_IROUTER479,Interrupt Routing Register 479"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F00++0x07
line.quad 0x00 "GICD_IROUTER480,Interrupt Routing Register 480"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F08++0x07
line.quad 0x00 "GICD_IROUTER481,Interrupt Routing Register 481"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F10++0x07
line.quad 0x00 "GICD_IROUTER482,Interrupt Routing Register 482"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F18++0x07
line.quad 0x00 "GICD_IROUTER483,Interrupt Routing Register 483"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F20++0x07
line.quad 0x00 "GICD_IROUTER484,Interrupt Routing Register 484"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F28++0x07
line.quad 0x00 "GICD_IROUTER485,Interrupt Routing Register 485"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F30++0x07
line.quad 0x00 "GICD_IROUTER486,Interrupt Routing Register 486"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F38++0x07
line.quad 0x00 "GICD_IROUTER487,Interrupt Routing Register 487"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F40++0x07
line.quad 0x00 "GICD_IROUTER488,Interrupt Routing Register 488"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F48++0x07
line.quad 0x00 "GICD_IROUTER489,Interrupt Routing Register 489"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F50++0x07
line.quad 0x00 "GICD_IROUTER490,Interrupt Routing Register 490"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F58++0x07
line.quad 0x00 "GICD_IROUTER491,Interrupt Routing Register 491"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F60++0x07
line.quad 0x00 "GICD_IROUTER492,Interrupt Routing Register 492"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F68++0x07
line.quad 0x00 "GICD_IROUTER493,Interrupt Routing Register 493"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F70++0x07
line.quad 0x00 "GICD_IROUTER494,Interrupt Routing Register 494"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F78++0x07
line.quad 0x00 "GICD_IROUTER495,Interrupt Routing Register 495"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F80++0x07
line.quad 0x00 "GICD_IROUTER496,Interrupt Routing Register 496"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F88++0x07
line.quad 0x00 "GICD_IROUTER497,Interrupt Routing Register 497"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F90++0x07
line.quad 0x00 "GICD_IROUTER498,Interrupt Routing Register 498"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6F98++0x07
line.quad 0x00 "GICD_IROUTER499,Interrupt Routing Register 499"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA0++0x07
line.quad 0x00 "GICD_IROUTER500,Interrupt Routing Register 500"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FA8++0x07
line.quad 0x00 "GICD_IROUTER501,Interrupt Routing Register 501"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB0++0x07
line.quad 0x00 "GICD_IROUTER502,Interrupt Routing Register 502"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FB8++0x07
line.quad 0x00 "GICD_IROUTER503,Interrupt Routing Register 503"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC0++0x07
line.quad 0x00 "GICD_IROUTER504,Interrupt Routing Register 504"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FC8++0x07
line.quad 0x00 "GICD_IROUTER505,Interrupt Routing Register 505"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD0++0x07
line.quad 0x00 "GICD_IROUTER506,Interrupt Routing Register 506"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FD8++0x07
line.quad 0x00 "GICD_IROUTER507,Interrupt Routing Register 507"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE0++0x07
line.quad 0x00 "GICD_IROUTER508,Interrupt Routing Register 508"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FE8++0x07
line.quad 0x00 "GICD_IROUTER509,Interrupt Routing Register 509"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF0++0x07
line.quad 0x00 "GICD_IROUTER510,Interrupt Routing Register 510"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x6FF8++0x07
line.quad 0x00 "GICD_IROUTER511,Interrupt Routing Register 511"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7000++0x07
line.quad 0x00 "GICD_IROUTER512,Interrupt Routing Register 512"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7008++0x07
line.quad 0x00 "GICD_IROUTER513,Interrupt Routing Register 513"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7010++0x07
line.quad 0x00 "GICD_IROUTER514,Interrupt Routing Register 514"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7018++0x07
line.quad 0x00 "GICD_IROUTER515,Interrupt Routing Register 515"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7020++0x07
line.quad 0x00 "GICD_IROUTER516,Interrupt Routing Register 516"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7028++0x07
line.quad 0x00 "GICD_IROUTER517,Interrupt Routing Register 517"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7030++0x07
line.quad 0x00 "GICD_IROUTER518,Interrupt Routing Register 518"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7038++0x07
line.quad 0x00 "GICD_IROUTER519,Interrupt Routing Register 519"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7040++0x07
line.quad 0x00 "GICD_IROUTER520,Interrupt Routing Register 520"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7048++0x07
line.quad 0x00 "GICD_IROUTER521,Interrupt Routing Register 521"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7050++0x07
line.quad 0x00 "GICD_IROUTER522,Interrupt Routing Register 522"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7058++0x07
line.quad 0x00 "GICD_IROUTER523,Interrupt Routing Register 523"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7060++0x07
line.quad 0x00 "GICD_IROUTER524,Interrupt Routing Register 524"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7068++0x07
line.quad 0x00 "GICD_IROUTER525,Interrupt Routing Register 525"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7070++0x07
line.quad 0x00 "GICD_IROUTER526,Interrupt Routing Register 526"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7078++0x07
line.quad 0x00 "GICD_IROUTER527,Interrupt Routing Register 527"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7080++0x07
line.quad 0x00 "GICD_IROUTER528,Interrupt Routing Register 528"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7088++0x07
line.quad 0x00 "GICD_IROUTER529,Interrupt Routing Register 529"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7090++0x07
line.quad 0x00 "GICD_IROUTER530,Interrupt Routing Register 530"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7098++0x07
line.quad 0x00 "GICD_IROUTER531,Interrupt Routing Register 531"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A0++0x07
line.quad 0x00 "GICD_IROUTER532,Interrupt Routing Register 532"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70A8++0x07
line.quad 0x00 "GICD_IROUTER533,Interrupt Routing Register 533"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B0++0x07
line.quad 0x00 "GICD_IROUTER534,Interrupt Routing Register 534"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70B8++0x07
line.quad 0x00 "GICD_IROUTER535,Interrupt Routing Register 535"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C0++0x07
line.quad 0x00 "GICD_IROUTER536,Interrupt Routing Register 536"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70C8++0x07
line.quad 0x00 "GICD_IROUTER537,Interrupt Routing Register 537"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D0++0x07
line.quad 0x00 "GICD_IROUTER538,Interrupt Routing Register 538"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70D8++0x07
line.quad 0x00 "GICD_IROUTER539,Interrupt Routing Register 539"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E0++0x07
line.quad 0x00 "GICD_IROUTER540,Interrupt Routing Register 540"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70E8++0x07
line.quad 0x00 "GICD_IROUTER541,Interrupt Routing Register 541"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F0++0x07
line.quad 0x00 "GICD_IROUTER542,Interrupt Routing Register 542"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x70F8++0x07
line.quad 0x00 "GICD_IROUTER543,Interrupt Routing Register 543"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7100++0x07
line.quad 0x00 "GICD_IROUTER544,Interrupt Routing Register 544"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7108++0x07
line.quad 0x00 "GICD_IROUTER545,Interrupt Routing Register 545"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7110++0x07
line.quad 0x00 "GICD_IROUTER546,Interrupt Routing Register 546"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7118++0x07
line.quad 0x00 "GICD_IROUTER547,Interrupt Routing Register 547"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7120++0x07
line.quad 0x00 "GICD_IROUTER548,Interrupt Routing Register 548"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7128++0x07
line.quad 0x00 "GICD_IROUTER549,Interrupt Routing Register 549"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7130++0x07
line.quad 0x00 "GICD_IROUTER550,Interrupt Routing Register 550"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7138++0x07
line.quad 0x00 "GICD_IROUTER551,Interrupt Routing Register 551"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7140++0x07
line.quad 0x00 "GICD_IROUTER552,Interrupt Routing Register 552"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7148++0x07
line.quad 0x00 "GICD_IROUTER553,Interrupt Routing Register 553"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7150++0x07
line.quad 0x00 "GICD_IROUTER554,Interrupt Routing Register 554"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7158++0x07
line.quad 0x00 "GICD_IROUTER555,Interrupt Routing Register 555"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7160++0x07
line.quad 0x00 "GICD_IROUTER556,Interrupt Routing Register 556"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7168++0x07
line.quad 0x00 "GICD_IROUTER557,Interrupt Routing Register 557"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7170++0x07
line.quad 0x00 "GICD_IROUTER558,Interrupt Routing Register 558"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7178++0x07
line.quad 0x00 "GICD_IROUTER559,Interrupt Routing Register 559"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7180++0x07
line.quad 0x00 "GICD_IROUTER560,Interrupt Routing Register 560"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7188++0x07
line.quad 0x00 "GICD_IROUTER561,Interrupt Routing Register 561"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7190++0x07
line.quad 0x00 "GICD_IROUTER562,Interrupt Routing Register 562"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7198++0x07
line.quad 0x00 "GICD_IROUTER563,Interrupt Routing Register 563"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A0++0x07
line.quad 0x00 "GICD_IROUTER564,Interrupt Routing Register 564"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71A8++0x07
line.quad 0x00 "GICD_IROUTER565,Interrupt Routing Register 565"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B0++0x07
line.quad 0x00 "GICD_IROUTER566,Interrupt Routing Register 566"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71B8++0x07
line.quad 0x00 "GICD_IROUTER567,Interrupt Routing Register 567"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C0++0x07
line.quad 0x00 "GICD_IROUTER568,Interrupt Routing Register 568"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71C8++0x07
line.quad 0x00 "GICD_IROUTER569,Interrupt Routing Register 569"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D0++0x07
line.quad 0x00 "GICD_IROUTER570,Interrupt Routing Register 570"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71D8++0x07
line.quad 0x00 "GICD_IROUTER571,Interrupt Routing Register 571"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E0++0x07
line.quad 0x00 "GICD_IROUTER572,Interrupt Routing Register 572"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71E8++0x07
line.quad 0x00 "GICD_IROUTER573,Interrupt Routing Register 573"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F0++0x07
line.quad 0x00 "GICD_IROUTER574,Interrupt Routing Register 574"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x71F8++0x07
line.quad 0x00 "GICD_IROUTER575,Interrupt Routing Register 575"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7200++0x07
line.quad 0x00 "GICD_IROUTER576,Interrupt Routing Register 576"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7208++0x07
line.quad 0x00 "GICD_IROUTER577,Interrupt Routing Register 577"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7210++0x07
line.quad 0x00 "GICD_IROUTER578,Interrupt Routing Register 578"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7218++0x07
line.quad 0x00 "GICD_IROUTER579,Interrupt Routing Register 579"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7220++0x07
line.quad 0x00 "GICD_IROUTER580,Interrupt Routing Register 580"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7228++0x07
line.quad 0x00 "GICD_IROUTER581,Interrupt Routing Register 581"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7230++0x07
line.quad 0x00 "GICD_IROUTER582,Interrupt Routing Register 582"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7238++0x07
line.quad 0x00 "GICD_IROUTER583,Interrupt Routing Register 583"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7240++0x07
line.quad 0x00 "GICD_IROUTER584,Interrupt Routing Register 584"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7248++0x07
line.quad 0x00 "GICD_IROUTER585,Interrupt Routing Register 585"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7250++0x07
line.quad 0x00 "GICD_IROUTER586,Interrupt Routing Register 586"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7258++0x07
line.quad 0x00 "GICD_IROUTER587,Interrupt Routing Register 587"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7260++0x07
line.quad 0x00 "GICD_IROUTER588,Interrupt Routing Register 588"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7268++0x07
line.quad 0x00 "GICD_IROUTER589,Interrupt Routing Register 589"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7270++0x07
line.quad 0x00 "GICD_IROUTER590,Interrupt Routing Register 590"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7278++0x07
line.quad 0x00 "GICD_IROUTER591,Interrupt Routing Register 591"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7280++0x07
line.quad 0x00 "GICD_IROUTER592,Interrupt Routing Register 592"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7288++0x07
line.quad 0x00 "GICD_IROUTER593,Interrupt Routing Register 593"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7290++0x07
line.quad 0x00 "GICD_IROUTER594,Interrupt Routing Register 594"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7298++0x07
line.quad 0x00 "GICD_IROUTER595,Interrupt Routing Register 595"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A0++0x07
line.quad 0x00 "GICD_IROUTER596,Interrupt Routing Register 596"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72A8++0x07
line.quad 0x00 "GICD_IROUTER597,Interrupt Routing Register 597"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B0++0x07
line.quad 0x00 "GICD_IROUTER598,Interrupt Routing Register 598"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72B8++0x07
line.quad 0x00 "GICD_IROUTER599,Interrupt Routing Register 599"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C0++0x07
line.quad 0x00 "GICD_IROUTER600,Interrupt Routing Register 600"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72C8++0x07
line.quad 0x00 "GICD_IROUTER601,Interrupt Routing Register 601"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D0++0x07
line.quad 0x00 "GICD_IROUTER602,Interrupt Routing Register 602"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72D8++0x07
line.quad 0x00 "GICD_IROUTER603,Interrupt Routing Register 603"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E0++0x07
line.quad 0x00 "GICD_IROUTER604,Interrupt Routing Register 604"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72E8++0x07
line.quad 0x00 "GICD_IROUTER605,Interrupt Routing Register 605"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F0++0x07
line.quad 0x00 "GICD_IROUTER606,Interrupt Routing Register 606"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x72F8++0x07
line.quad 0x00 "GICD_IROUTER607,Interrupt Routing Register 607"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7300++0x07
line.quad 0x00 "GICD_IROUTER608,Interrupt Routing Register 608"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7308++0x07
line.quad 0x00 "GICD_IROUTER609,Interrupt Routing Register 609"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7310++0x07
line.quad 0x00 "GICD_IROUTER610,Interrupt Routing Register 610"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7318++0x07
line.quad 0x00 "GICD_IROUTER611,Interrupt Routing Register 611"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7320++0x07
line.quad 0x00 "GICD_IROUTER612,Interrupt Routing Register 612"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7328++0x07
line.quad 0x00 "GICD_IROUTER613,Interrupt Routing Register 613"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7330++0x07
line.quad 0x00 "GICD_IROUTER614,Interrupt Routing Register 614"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7338++0x07
line.quad 0x00 "GICD_IROUTER615,Interrupt Routing Register 615"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7340++0x07
line.quad 0x00 "GICD_IROUTER616,Interrupt Routing Register 616"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7348++0x07
line.quad 0x00 "GICD_IROUTER617,Interrupt Routing Register 617"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7350++0x07
line.quad 0x00 "GICD_IROUTER618,Interrupt Routing Register 618"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7358++0x07
line.quad 0x00 "GICD_IROUTER619,Interrupt Routing Register 619"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7360++0x07
line.quad 0x00 "GICD_IROUTER620,Interrupt Routing Register 620"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7368++0x07
line.quad 0x00 "GICD_IROUTER621,Interrupt Routing Register 621"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7370++0x07
line.quad 0x00 "GICD_IROUTER622,Interrupt Routing Register 622"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7378++0x07
line.quad 0x00 "GICD_IROUTER623,Interrupt Routing Register 623"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7380++0x07
line.quad 0x00 "GICD_IROUTER624,Interrupt Routing Register 624"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7388++0x07
line.quad 0x00 "GICD_IROUTER625,Interrupt Routing Register 625"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7390++0x07
line.quad 0x00 "GICD_IROUTER626,Interrupt Routing Register 626"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7398++0x07
line.quad 0x00 "GICD_IROUTER627,Interrupt Routing Register 627"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A0++0x07
line.quad 0x00 "GICD_IROUTER628,Interrupt Routing Register 628"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73A8++0x07
line.quad 0x00 "GICD_IROUTER629,Interrupt Routing Register 629"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B0++0x07
line.quad 0x00 "GICD_IROUTER630,Interrupt Routing Register 630"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73B8++0x07
line.quad 0x00 "GICD_IROUTER631,Interrupt Routing Register 631"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C0++0x07
line.quad 0x00 "GICD_IROUTER632,Interrupt Routing Register 632"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73C8++0x07
line.quad 0x00 "GICD_IROUTER633,Interrupt Routing Register 633"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D0++0x07
line.quad 0x00 "GICD_IROUTER634,Interrupt Routing Register 634"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73D8++0x07
line.quad 0x00 "GICD_IROUTER635,Interrupt Routing Register 635"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E0++0x07
line.quad 0x00 "GICD_IROUTER636,Interrupt Routing Register 636"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73E8++0x07
line.quad 0x00 "GICD_IROUTER637,Interrupt Routing Register 637"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F0++0x07
line.quad 0x00 "GICD_IROUTER638,Interrupt Routing Register 638"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x73F8++0x07
line.quad 0x00 "GICD_IROUTER639,Interrupt Routing Register 639"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7400++0x07
line.quad 0x00 "GICD_IROUTER640,Interrupt Routing Register 640"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7408++0x07
line.quad 0x00 "GICD_IROUTER641,Interrupt Routing Register 641"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7410++0x07
line.quad 0x00 "GICD_IROUTER642,Interrupt Routing Register 642"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7418++0x07
line.quad 0x00 "GICD_IROUTER643,Interrupt Routing Register 643"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7420++0x07
line.quad 0x00 "GICD_IROUTER644,Interrupt Routing Register 644"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7428++0x07
line.quad 0x00 "GICD_IROUTER645,Interrupt Routing Register 645"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7430++0x07
line.quad 0x00 "GICD_IROUTER646,Interrupt Routing Register 646"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7438++0x07
line.quad 0x00 "GICD_IROUTER647,Interrupt Routing Register 647"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7440++0x07
line.quad 0x00 "GICD_IROUTER648,Interrupt Routing Register 648"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7448++0x07
line.quad 0x00 "GICD_IROUTER649,Interrupt Routing Register 649"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7450++0x07
line.quad 0x00 "GICD_IROUTER650,Interrupt Routing Register 650"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7458++0x07
line.quad 0x00 "GICD_IROUTER651,Interrupt Routing Register 651"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7460++0x07
line.quad 0x00 "GICD_IROUTER652,Interrupt Routing Register 652"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7468++0x07
line.quad 0x00 "GICD_IROUTER653,Interrupt Routing Register 653"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7470++0x07
line.quad 0x00 "GICD_IROUTER654,Interrupt Routing Register 654"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7478++0x07
line.quad 0x00 "GICD_IROUTER655,Interrupt Routing Register 655"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7480++0x07
line.quad 0x00 "GICD_IROUTER656,Interrupt Routing Register 656"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7488++0x07
line.quad 0x00 "GICD_IROUTER657,Interrupt Routing Register 657"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7490++0x07
line.quad 0x00 "GICD_IROUTER658,Interrupt Routing Register 658"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7498++0x07
line.quad 0x00 "GICD_IROUTER659,Interrupt Routing Register 659"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A0++0x07
line.quad 0x00 "GICD_IROUTER660,Interrupt Routing Register 660"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74A8++0x07
line.quad 0x00 "GICD_IROUTER661,Interrupt Routing Register 661"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B0++0x07
line.quad 0x00 "GICD_IROUTER662,Interrupt Routing Register 662"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74B8++0x07
line.quad 0x00 "GICD_IROUTER663,Interrupt Routing Register 663"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C0++0x07
line.quad 0x00 "GICD_IROUTER664,Interrupt Routing Register 664"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74C8++0x07
line.quad 0x00 "GICD_IROUTER665,Interrupt Routing Register 665"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D0++0x07
line.quad 0x00 "GICD_IROUTER666,Interrupt Routing Register 666"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74D8++0x07
line.quad 0x00 "GICD_IROUTER667,Interrupt Routing Register 667"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E0++0x07
line.quad 0x00 "GICD_IROUTER668,Interrupt Routing Register 668"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74E8++0x07
line.quad 0x00 "GICD_IROUTER669,Interrupt Routing Register 669"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F0++0x07
line.quad 0x00 "GICD_IROUTER670,Interrupt Routing Register 670"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x74F8++0x07
line.quad 0x00 "GICD_IROUTER671,Interrupt Routing Register 671"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7500++0x07
line.quad 0x00 "GICD_IROUTER672,Interrupt Routing Register 672"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7508++0x07
line.quad 0x00 "GICD_IROUTER673,Interrupt Routing Register 673"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7510++0x07
line.quad 0x00 "GICD_IROUTER674,Interrupt Routing Register 674"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7518++0x07
line.quad 0x00 "GICD_IROUTER675,Interrupt Routing Register 675"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7520++0x07
line.quad 0x00 "GICD_IROUTER676,Interrupt Routing Register 676"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7528++0x07
line.quad 0x00 "GICD_IROUTER677,Interrupt Routing Register 677"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7530++0x07
line.quad 0x00 "GICD_IROUTER678,Interrupt Routing Register 678"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7538++0x07
line.quad 0x00 "GICD_IROUTER679,Interrupt Routing Register 679"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7540++0x07
line.quad 0x00 "GICD_IROUTER680,Interrupt Routing Register 680"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7548++0x07
line.quad 0x00 "GICD_IROUTER681,Interrupt Routing Register 681"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7550++0x07
line.quad 0x00 "GICD_IROUTER682,Interrupt Routing Register 682"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7558++0x07
line.quad 0x00 "GICD_IROUTER683,Interrupt Routing Register 683"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7560++0x07
line.quad 0x00 "GICD_IROUTER684,Interrupt Routing Register 684"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7568++0x07
line.quad 0x00 "GICD_IROUTER685,Interrupt Routing Register 685"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7570++0x07
line.quad 0x00 "GICD_IROUTER686,Interrupt Routing Register 686"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7578++0x07
line.quad 0x00 "GICD_IROUTER687,Interrupt Routing Register 687"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7580++0x07
line.quad 0x00 "GICD_IROUTER688,Interrupt Routing Register 688"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7588++0x07
line.quad 0x00 "GICD_IROUTER689,Interrupt Routing Register 689"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7590++0x07
line.quad 0x00 "GICD_IROUTER690,Interrupt Routing Register 690"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7598++0x07
line.quad 0x00 "GICD_IROUTER691,Interrupt Routing Register 691"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A0++0x07
line.quad 0x00 "GICD_IROUTER692,Interrupt Routing Register 692"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75A8++0x07
line.quad 0x00 "GICD_IROUTER693,Interrupt Routing Register 693"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B0++0x07
line.quad 0x00 "GICD_IROUTER694,Interrupt Routing Register 694"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75B8++0x07
line.quad 0x00 "GICD_IROUTER695,Interrupt Routing Register 695"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C0++0x07
line.quad 0x00 "GICD_IROUTER696,Interrupt Routing Register 696"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75C8++0x07
line.quad 0x00 "GICD_IROUTER697,Interrupt Routing Register 697"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D0++0x07
line.quad 0x00 "GICD_IROUTER698,Interrupt Routing Register 698"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75D8++0x07
line.quad 0x00 "GICD_IROUTER699,Interrupt Routing Register 699"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E0++0x07
line.quad 0x00 "GICD_IROUTER700,Interrupt Routing Register 700"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75E8++0x07
line.quad 0x00 "GICD_IROUTER701,Interrupt Routing Register 701"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F0++0x07
line.quad 0x00 "GICD_IROUTER702,Interrupt Routing Register 702"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x75F8++0x07
line.quad 0x00 "GICD_IROUTER703,Interrupt Routing Register 703"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7600++0x07
line.quad 0x00 "GICD_IROUTER704,Interrupt Routing Register 704"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7608++0x07
line.quad 0x00 "GICD_IROUTER705,Interrupt Routing Register 705"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7610++0x07
line.quad 0x00 "GICD_IROUTER706,Interrupt Routing Register 706"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7618++0x07
line.quad 0x00 "GICD_IROUTER707,Interrupt Routing Register 707"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7620++0x07
line.quad 0x00 "GICD_IROUTER708,Interrupt Routing Register 708"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7628++0x07
line.quad 0x00 "GICD_IROUTER709,Interrupt Routing Register 709"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7630++0x07
line.quad 0x00 "GICD_IROUTER710,Interrupt Routing Register 710"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7638++0x07
line.quad 0x00 "GICD_IROUTER711,Interrupt Routing Register 711"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7640++0x07
line.quad 0x00 "GICD_IROUTER712,Interrupt Routing Register 712"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7648++0x07
line.quad 0x00 "GICD_IROUTER713,Interrupt Routing Register 713"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7650++0x07
line.quad 0x00 "GICD_IROUTER714,Interrupt Routing Register 714"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7658++0x07
line.quad 0x00 "GICD_IROUTER715,Interrupt Routing Register 715"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7660++0x07
line.quad 0x00 "GICD_IROUTER716,Interrupt Routing Register 716"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7668++0x07
line.quad 0x00 "GICD_IROUTER717,Interrupt Routing Register 717"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7670++0x07
line.quad 0x00 "GICD_IROUTER718,Interrupt Routing Register 718"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7678++0x07
line.quad 0x00 "GICD_IROUTER719,Interrupt Routing Register 719"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7680++0x07
line.quad 0x00 "GICD_IROUTER720,Interrupt Routing Register 720"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7688++0x07
line.quad 0x00 "GICD_IROUTER721,Interrupt Routing Register 721"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7690++0x07
line.quad 0x00 "GICD_IROUTER722,Interrupt Routing Register 722"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7698++0x07
line.quad 0x00 "GICD_IROUTER723,Interrupt Routing Register 723"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A0++0x07
line.quad 0x00 "GICD_IROUTER724,Interrupt Routing Register 724"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76A8++0x07
line.quad 0x00 "GICD_IROUTER725,Interrupt Routing Register 725"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B0++0x07
line.quad 0x00 "GICD_IROUTER726,Interrupt Routing Register 726"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76B8++0x07
line.quad 0x00 "GICD_IROUTER727,Interrupt Routing Register 727"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C0++0x07
line.quad 0x00 "GICD_IROUTER728,Interrupt Routing Register 728"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76C8++0x07
line.quad 0x00 "GICD_IROUTER729,Interrupt Routing Register 729"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D0++0x07
line.quad 0x00 "GICD_IROUTER730,Interrupt Routing Register 730"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76D8++0x07
line.quad 0x00 "GICD_IROUTER731,Interrupt Routing Register 731"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E0++0x07
line.quad 0x00 "GICD_IROUTER732,Interrupt Routing Register 732"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76E8++0x07
line.quad 0x00 "GICD_IROUTER733,Interrupt Routing Register 733"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F0++0x07
line.quad 0x00 "GICD_IROUTER734,Interrupt Routing Register 734"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x76F8++0x07
line.quad 0x00 "GICD_IROUTER735,Interrupt Routing Register 735"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7700++0x07
line.quad 0x00 "GICD_IROUTER736,Interrupt Routing Register 736"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7708++0x07
line.quad 0x00 "GICD_IROUTER737,Interrupt Routing Register 737"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7710++0x07
line.quad 0x00 "GICD_IROUTER738,Interrupt Routing Register 738"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7718++0x07
line.quad 0x00 "GICD_IROUTER739,Interrupt Routing Register 739"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7720++0x07
line.quad 0x00 "GICD_IROUTER740,Interrupt Routing Register 740"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7728++0x07
line.quad 0x00 "GICD_IROUTER741,Interrupt Routing Register 741"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7730++0x07
line.quad 0x00 "GICD_IROUTER742,Interrupt Routing Register 742"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7738++0x07
line.quad 0x00 "GICD_IROUTER743,Interrupt Routing Register 743"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7740++0x07
line.quad 0x00 "GICD_IROUTER744,Interrupt Routing Register 744"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7748++0x07
line.quad 0x00 "GICD_IROUTER745,Interrupt Routing Register 745"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7750++0x07
line.quad 0x00 "GICD_IROUTER746,Interrupt Routing Register 746"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7758++0x07
line.quad 0x00 "GICD_IROUTER747,Interrupt Routing Register 747"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7760++0x07
line.quad 0x00 "GICD_IROUTER748,Interrupt Routing Register 748"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7768++0x07
line.quad 0x00 "GICD_IROUTER749,Interrupt Routing Register 749"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7770++0x07
line.quad 0x00 "GICD_IROUTER750,Interrupt Routing Register 750"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7778++0x07
line.quad 0x00 "GICD_IROUTER751,Interrupt Routing Register 751"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7780++0x07
line.quad 0x00 "GICD_IROUTER752,Interrupt Routing Register 752"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7788++0x07
line.quad 0x00 "GICD_IROUTER753,Interrupt Routing Register 753"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7790++0x07
line.quad 0x00 "GICD_IROUTER754,Interrupt Routing Register 754"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7798++0x07
line.quad 0x00 "GICD_IROUTER755,Interrupt Routing Register 755"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A0++0x07
line.quad 0x00 "GICD_IROUTER756,Interrupt Routing Register 756"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77A8++0x07
line.quad 0x00 "GICD_IROUTER757,Interrupt Routing Register 757"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B0++0x07
line.quad 0x00 "GICD_IROUTER758,Interrupt Routing Register 758"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77B8++0x07
line.quad 0x00 "GICD_IROUTER759,Interrupt Routing Register 759"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C0++0x07
line.quad 0x00 "GICD_IROUTER760,Interrupt Routing Register 760"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77C8++0x07
line.quad 0x00 "GICD_IROUTER761,Interrupt Routing Register 761"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D0++0x07
line.quad 0x00 "GICD_IROUTER762,Interrupt Routing Register 762"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77D8++0x07
line.quad 0x00 "GICD_IROUTER763,Interrupt Routing Register 763"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E0++0x07
line.quad 0x00 "GICD_IROUTER764,Interrupt Routing Register 764"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77E8++0x07
line.quad 0x00 "GICD_IROUTER765,Interrupt Routing Register 765"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F0++0x07
line.quad 0x00 "GICD_IROUTER766,Interrupt Routing Register 766"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x77F8++0x07
line.quad 0x00 "GICD_IROUTER767,Interrupt Routing Register 767"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7800++0x07
line.quad 0x00 "GICD_IROUTER768,Interrupt Routing Register 768"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7808++0x07
line.quad 0x00 "GICD_IROUTER769,Interrupt Routing Register 769"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7810++0x07
line.quad 0x00 "GICD_IROUTER770,Interrupt Routing Register 770"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7818++0x07
line.quad 0x00 "GICD_IROUTER771,Interrupt Routing Register 771"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7820++0x07
line.quad 0x00 "GICD_IROUTER772,Interrupt Routing Register 772"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7828++0x07
line.quad 0x00 "GICD_IROUTER773,Interrupt Routing Register 773"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7830++0x07
line.quad 0x00 "GICD_IROUTER774,Interrupt Routing Register 774"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7838++0x07
line.quad 0x00 "GICD_IROUTER775,Interrupt Routing Register 775"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7840++0x07
line.quad 0x00 "GICD_IROUTER776,Interrupt Routing Register 776"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7848++0x07
line.quad 0x00 "GICD_IROUTER777,Interrupt Routing Register 777"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7850++0x07
line.quad 0x00 "GICD_IROUTER778,Interrupt Routing Register 778"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7858++0x07
line.quad 0x00 "GICD_IROUTER779,Interrupt Routing Register 779"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7860++0x07
line.quad 0x00 "GICD_IROUTER780,Interrupt Routing Register 780"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7868++0x07
line.quad 0x00 "GICD_IROUTER781,Interrupt Routing Register 781"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7870++0x07
line.quad 0x00 "GICD_IROUTER782,Interrupt Routing Register 782"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7878++0x07
line.quad 0x00 "GICD_IROUTER783,Interrupt Routing Register 783"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7880++0x07
line.quad 0x00 "GICD_IROUTER784,Interrupt Routing Register 784"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7888++0x07
line.quad 0x00 "GICD_IROUTER785,Interrupt Routing Register 785"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7890++0x07
line.quad 0x00 "GICD_IROUTER786,Interrupt Routing Register 786"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7898++0x07
line.quad 0x00 "GICD_IROUTER787,Interrupt Routing Register 787"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A0++0x07
line.quad 0x00 "GICD_IROUTER788,Interrupt Routing Register 788"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78A8++0x07
line.quad 0x00 "GICD_IROUTER789,Interrupt Routing Register 789"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B0++0x07
line.quad 0x00 "GICD_IROUTER790,Interrupt Routing Register 790"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78B8++0x07
line.quad 0x00 "GICD_IROUTER791,Interrupt Routing Register 791"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C0++0x07
line.quad 0x00 "GICD_IROUTER792,Interrupt Routing Register 792"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78C8++0x07
line.quad 0x00 "GICD_IROUTER793,Interrupt Routing Register 793"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D0++0x07
line.quad 0x00 "GICD_IROUTER794,Interrupt Routing Register 794"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78D8++0x07
line.quad 0x00 "GICD_IROUTER795,Interrupt Routing Register 795"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E0++0x07
line.quad 0x00 "GICD_IROUTER796,Interrupt Routing Register 796"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78E8++0x07
line.quad 0x00 "GICD_IROUTER797,Interrupt Routing Register 797"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F0++0x07
line.quad 0x00 "GICD_IROUTER798,Interrupt Routing Register 798"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x78F8++0x07
line.quad 0x00 "GICD_IROUTER799,Interrupt Routing Register 799"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7900++0x07
line.quad 0x00 "GICD_IROUTER800,Interrupt Routing Register 800"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7908++0x07
line.quad 0x00 "GICD_IROUTER801,Interrupt Routing Register 801"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7910++0x07
line.quad 0x00 "GICD_IROUTER802,Interrupt Routing Register 802"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7918++0x07
line.quad 0x00 "GICD_IROUTER803,Interrupt Routing Register 803"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7920++0x07
line.quad 0x00 "GICD_IROUTER804,Interrupt Routing Register 804"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7928++0x07
line.quad 0x00 "GICD_IROUTER805,Interrupt Routing Register 805"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7930++0x07
line.quad 0x00 "GICD_IROUTER806,Interrupt Routing Register 806"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7938++0x07
line.quad 0x00 "GICD_IROUTER807,Interrupt Routing Register 807"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7940++0x07
line.quad 0x00 "GICD_IROUTER808,Interrupt Routing Register 808"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7948++0x07
line.quad 0x00 "GICD_IROUTER809,Interrupt Routing Register 809"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7950++0x07
line.quad 0x00 "GICD_IROUTER810,Interrupt Routing Register 810"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7958++0x07
line.quad 0x00 "GICD_IROUTER811,Interrupt Routing Register 811"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7960++0x07
line.quad 0x00 "GICD_IROUTER812,Interrupt Routing Register 812"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7968++0x07
line.quad 0x00 "GICD_IROUTER813,Interrupt Routing Register 813"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7970++0x07
line.quad 0x00 "GICD_IROUTER814,Interrupt Routing Register 814"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7978++0x07
line.quad 0x00 "GICD_IROUTER815,Interrupt Routing Register 815"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7980++0x07
line.quad 0x00 "GICD_IROUTER816,Interrupt Routing Register 816"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7988++0x07
line.quad 0x00 "GICD_IROUTER817,Interrupt Routing Register 817"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7990++0x07
line.quad 0x00 "GICD_IROUTER818,Interrupt Routing Register 818"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7998++0x07
line.quad 0x00 "GICD_IROUTER819,Interrupt Routing Register 819"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A0++0x07
line.quad 0x00 "GICD_IROUTER820,Interrupt Routing Register 820"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79A8++0x07
line.quad 0x00 "GICD_IROUTER821,Interrupt Routing Register 821"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B0++0x07
line.quad 0x00 "GICD_IROUTER822,Interrupt Routing Register 822"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79B8++0x07
line.quad 0x00 "GICD_IROUTER823,Interrupt Routing Register 823"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C0++0x07
line.quad 0x00 "GICD_IROUTER824,Interrupt Routing Register 824"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79C8++0x07
line.quad 0x00 "GICD_IROUTER825,Interrupt Routing Register 825"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D0++0x07
line.quad 0x00 "GICD_IROUTER826,Interrupt Routing Register 826"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79D8++0x07
line.quad 0x00 "GICD_IROUTER827,Interrupt Routing Register 827"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E0++0x07
line.quad 0x00 "GICD_IROUTER828,Interrupt Routing Register 828"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79E8++0x07
line.quad 0x00 "GICD_IROUTER829,Interrupt Routing Register 829"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F0++0x07
line.quad 0x00 "GICD_IROUTER830,Interrupt Routing Register 830"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x79F8++0x07
line.quad 0x00 "GICD_IROUTER831,Interrupt Routing Register 831"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A00++0x07
line.quad 0x00 "GICD_IROUTER832,Interrupt Routing Register 832"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A08++0x07
line.quad 0x00 "GICD_IROUTER833,Interrupt Routing Register 833"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A10++0x07
line.quad 0x00 "GICD_IROUTER834,Interrupt Routing Register 834"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A18++0x07
line.quad 0x00 "GICD_IROUTER835,Interrupt Routing Register 835"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A20++0x07
line.quad 0x00 "GICD_IROUTER836,Interrupt Routing Register 836"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A28++0x07
line.quad 0x00 "GICD_IROUTER837,Interrupt Routing Register 837"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A30++0x07
line.quad 0x00 "GICD_IROUTER838,Interrupt Routing Register 838"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A38++0x07
line.quad 0x00 "GICD_IROUTER839,Interrupt Routing Register 839"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A40++0x07
line.quad 0x00 "GICD_IROUTER840,Interrupt Routing Register 840"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A48++0x07
line.quad 0x00 "GICD_IROUTER841,Interrupt Routing Register 841"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A50++0x07
line.quad 0x00 "GICD_IROUTER842,Interrupt Routing Register 842"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A58++0x07
line.quad 0x00 "GICD_IROUTER843,Interrupt Routing Register 843"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A60++0x07
line.quad 0x00 "GICD_IROUTER844,Interrupt Routing Register 844"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A68++0x07
line.quad 0x00 "GICD_IROUTER845,Interrupt Routing Register 845"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A70++0x07
line.quad 0x00 "GICD_IROUTER846,Interrupt Routing Register 846"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A78++0x07
line.quad 0x00 "GICD_IROUTER847,Interrupt Routing Register 847"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A80++0x07
line.quad 0x00 "GICD_IROUTER848,Interrupt Routing Register 848"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A88++0x07
line.quad 0x00 "GICD_IROUTER849,Interrupt Routing Register 849"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A90++0x07
line.quad 0x00 "GICD_IROUTER850,Interrupt Routing Register 850"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7A98++0x07
line.quad 0x00 "GICD_IROUTER851,Interrupt Routing Register 851"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA0++0x07
line.quad 0x00 "GICD_IROUTER852,Interrupt Routing Register 852"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AA8++0x07
line.quad 0x00 "GICD_IROUTER853,Interrupt Routing Register 853"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB0++0x07
line.quad 0x00 "GICD_IROUTER854,Interrupt Routing Register 854"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AB8++0x07
line.quad 0x00 "GICD_IROUTER855,Interrupt Routing Register 855"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC0++0x07
line.quad 0x00 "GICD_IROUTER856,Interrupt Routing Register 856"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AC8++0x07
line.quad 0x00 "GICD_IROUTER857,Interrupt Routing Register 857"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD0++0x07
line.quad 0x00 "GICD_IROUTER858,Interrupt Routing Register 858"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AD8++0x07
line.quad 0x00 "GICD_IROUTER859,Interrupt Routing Register 859"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE0++0x07
line.quad 0x00 "GICD_IROUTER860,Interrupt Routing Register 860"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AE8++0x07
line.quad 0x00 "GICD_IROUTER861,Interrupt Routing Register 861"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF0++0x07
line.quad 0x00 "GICD_IROUTER862,Interrupt Routing Register 862"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7AF8++0x07
line.quad 0x00 "GICD_IROUTER863,Interrupt Routing Register 863"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B00++0x07
line.quad 0x00 "GICD_IROUTER864,Interrupt Routing Register 864"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B08++0x07
line.quad 0x00 "GICD_IROUTER865,Interrupt Routing Register 865"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B10++0x07
line.quad 0x00 "GICD_IROUTER866,Interrupt Routing Register 866"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B18++0x07
line.quad 0x00 "GICD_IROUTER867,Interrupt Routing Register 867"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B20++0x07
line.quad 0x00 "GICD_IROUTER868,Interrupt Routing Register 868"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B28++0x07
line.quad 0x00 "GICD_IROUTER869,Interrupt Routing Register 869"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B30++0x07
line.quad 0x00 "GICD_IROUTER870,Interrupt Routing Register 870"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B38++0x07
line.quad 0x00 "GICD_IROUTER871,Interrupt Routing Register 871"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B40++0x07
line.quad 0x00 "GICD_IROUTER872,Interrupt Routing Register 872"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B48++0x07
line.quad 0x00 "GICD_IROUTER873,Interrupt Routing Register 873"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B50++0x07
line.quad 0x00 "GICD_IROUTER874,Interrupt Routing Register 874"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B58++0x07
line.quad 0x00 "GICD_IROUTER875,Interrupt Routing Register 875"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B60++0x07
line.quad 0x00 "GICD_IROUTER876,Interrupt Routing Register 876"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B68++0x07
line.quad 0x00 "GICD_IROUTER877,Interrupt Routing Register 877"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B70++0x07
line.quad 0x00 "GICD_IROUTER878,Interrupt Routing Register 878"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B78++0x07
line.quad 0x00 "GICD_IROUTER879,Interrupt Routing Register 879"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B80++0x07
line.quad 0x00 "GICD_IROUTER880,Interrupt Routing Register 880"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B88++0x07
line.quad 0x00 "GICD_IROUTER881,Interrupt Routing Register 881"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B90++0x07
line.quad 0x00 "GICD_IROUTER882,Interrupt Routing Register 882"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7B98++0x07
line.quad 0x00 "GICD_IROUTER883,Interrupt Routing Register 883"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA0++0x07
line.quad 0x00 "GICD_IROUTER884,Interrupt Routing Register 884"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BA8++0x07
line.quad 0x00 "GICD_IROUTER885,Interrupt Routing Register 885"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB0++0x07
line.quad 0x00 "GICD_IROUTER886,Interrupt Routing Register 886"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BB8++0x07
line.quad 0x00 "GICD_IROUTER887,Interrupt Routing Register 887"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC0++0x07
line.quad 0x00 "GICD_IROUTER888,Interrupt Routing Register 888"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BC8++0x07
line.quad 0x00 "GICD_IROUTER889,Interrupt Routing Register 889"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD0++0x07
line.quad 0x00 "GICD_IROUTER890,Interrupt Routing Register 890"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BD8++0x07
line.quad 0x00 "GICD_IROUTER891,Interrupt Routing Register 891"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE0++0x07
line.quad 0x00 "GICD_IROUTER892,Interrupt Routing Register 892"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BE8++0x07
line.quad 0x00 "GICD_IROUTER893,Interrupt Routing Register 893"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF0++0x07
line.quad 0x00 "GICD_IROUTER894,Interrupt Routing Register 894"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7BF8++0x07
line.quad 0x00 "GICD_IROUTER895,Interrupt Routing Register 895"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C00++0x07
line.quad 0x00 "GICD_IROUTER896,Interrupt Routing Register 896"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C08++0x07
line.quad 0x00 "GICD_IROUTER897,Interrupt Routing Register 897"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C10++0x07
line.quad 0x00 "GICD_IROUTER898,Interrupt Routing Register 898"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C18++0x07
line.quad 0x00 "GICD_IROUTER899,Interrupt Routing Register 899"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C20++0x07
line.quad 0x00 "GICD_IROUTER900,Interrupt Routing Register 900"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C28++0x07
line.quad 0x00 "GICD_IROUTER901,Interrupt Routing Register 901"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C30++0x07
line.quad 0x00 "GICD_IROUTER902,Interrupt Routing Register 902"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C38++0x07
line.quad 0x00 "GICD_IROUTER903,Interrupt Routing Register 903"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C40++0x07
line.quad 0x00 "GICD_IROUTER904,Interrupt Routing Register 904"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C48++0x07
line.quad 0x00 "GICD_IROUTER905,Interrupt Routing Register 905"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C50++0x07
line.quad 0x00 "GICD_IROUTER906,Interrupt Routing Register 906"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C58++0x07
line.quad 0x00 "GICD_IROUTER907,Interrupt Routing Register 907"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C60++0x07
line.quad 0x00 "GICD_IROUTER908,Interrupt Routing Register 908"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C68++0x07
line.quad 0x00 "GICD_IROUTER909,Interrupt Routing Register 909"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C70++0x07
line.quad 0x00 "GICD_IROUTER910,Interrupt Routing Register 910"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C78++0x07
line.quad 0x00 "GICD_IROUTER911,Interrupt Routing Register 911"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C80++0x07
line.quad 0x00 "GICD_IROUTER912,Interrupt Routing Register 912"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C88++0x07
line.quad 0x00 "GICD_IROUTER913,Interrupt Routing Register 913"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C90++0x07
line.quad 0x00 "GICD_IROUTER914,Interrupt Routing Register 914"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7C98++0x07
line.quad 0x00 "GICD_IROUTER915,Interrupt Routing Register 915"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA0++0x07
line.quad 0x00 "GICD_IROUTER916,Interrupt Routing Register 916"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CA8++0x07
line.quad 0x00 "GICD_IROUTER917,Interrupt Routing Register 917"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB0++0x07
line.quad 0x00 "GICD_IROUTER918,Interrupt Routing Register 918"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CB8++0x07
line.quad 0x00 "GICD_IROUTER919,Interrupt Routing Register 919"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC0++0x07
line.quad 0x00 "GICD_IROUTER920,Interrupt Routing Register 920"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CC8++0x07
line.quad 0x00 "GICD_IROUTER921,Interrupt Routing Register 921"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD0++0x07
line.quad 0x00 "GICD_IROUTER922,Interrupt Routing Register 922"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CD8++0x07
line.quad 0x00 "GICD_IROUTER923,Interrupt Routing Register 923"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE0++0x07
line.quad 0x00 "GICD_IROUTER924,Interrupt Routing Register 924"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CE8++0x07
line.quad 0x00 "GICD_IROUTER925,Interrupt Routing Register 925"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF0++0x07
line.quad 0x00 "GICD_IROUTER926,Interrupt Routing Register 926"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7CF8++0x07
line.quad 0x00 "GICD_IROUTER927,Interrupt Routing Register 927"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D00++0x07
line.quad 0x00 "GICD_IROUTER928,Interrupt Routing Register 928"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D08++0x07
line.quad 0x00 "GICD_IROUTER929,Interrupt Routing Register 929"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D10++0x07
line.quad 0x00 "GICD_IROUTER930,Interrupt Routing Register 930"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D18++0x07
line.quad 0x00 "GICD_IROUTER931,Interrupt Routing Register 931"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D20++0x07
line.quad 0x00 "GICD_IROUTER932,Interrupt Routing Register 932"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D28++0x07
line.quad 0x00 "GICD_IROUTER933,Interrupt Routing Register 933"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D30++0x07
line.quad 0x00 "GICD_IROUTER934,Interrupt Routing Register 934"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D38++0x07
line.quad 0x00 "GICD_IROUTER935,Interrupt Routing Register 935"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D40++0x07
line.quad 0x00 "GICD_IROUTER936,Interrupt Routing Register 936"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D48++0x07
line.quad 0x00 "GICD_IROUTER937,Interrupt Routing Register 937"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D50++0x07
line.quad 0x00 "GICD_IROUTER938,Interrupt Routing Register 938"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D58++0x07
line.quad 0x00 "GICD_IROUTER939,Interrupt Routing Register 939"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D60++0x07
line.quad 0x00 "GICD_IROUTER940,Interrupt Routing Register 940"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D68++0x07
line.quad 0x00 "GICD_IROUTER941,Interrupt Routing Register 941"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D70++0x07
line.quad 0x00 "GICD_IROUTER942,Interrupt Routing Register 942"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D78++0x07
line.quad 0x00 "GICD_IROUTER943,Interrupt Routing Register 943"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D80++0x07
line.quad 0x00 "GICD_IROUTER944,Interrupt Routing Register 944"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D88++0x07
line.quad 0x00 "GICD_IROUTER945,Interrupt Routing Register 945"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D90++0x07
line.quad 0x00 "GICD_IROUTER946,Interrupt Routing Register 946"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7D98++0x07
line.quad 0x00 "GICD_IROUTER947,Interrupt Routing Register 947"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA0++0x07
line.quad 0x00 "GICD_IROUTER948,Interrupt Routing Register 948"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DA8++0x07
line.quad 0x00 "GICD_IROUTER949,Interrupt Routing Register 949"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB0++0x07
line.quad 0x00 "GICD_IROUTER950,Interrupt Routing Register 950"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DB8++0x07
line.quad 0x00 "GICD_IROUTER951,Interrupt Routing Register 951"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC0++0x07
line.quad 0x00 "GICD_IROUTER952,Interrupt Routing Register 952"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DC8++0x07
line.quad 0x00 "GICD_IROUTER953,Interrupt Routing Register 953"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD0++0x07
line.quad 0x00 "GICD_IROUTER954,Interrupt Routing Register 954"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DD8++0x07
line.quad 0x00 "GICD_IROUTER955,Interrupt Routing Register 955"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE0++0x07
line.quad 0x00 "GICD_IROUTER956,Interrupt Routing Register 956"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DE8++0x07
line.quad 0x00 "GICD_IROUTER957,Interrupt Routing Register 957"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF0++0x07
line.quad 0x00 "GICD_IROUTER958,Interrupt Routing Register 958"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7DF8++0x07
line.quad 0x00 "GICD_IROUTER959,Interrupt Routing Register 959"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E00++0x07
line.quad 0x00 "GICD_IROUTER960,Interrupt Routing Register 960"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E08++0x07
line.quad 0x00 "GICD_IROUTER961,Interrupt Routing Register 961"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E10++0x07
line.quad 0x00 "GICD_IROUTER962,Interrupt Routing Register 962"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E18++0x07
line.quad 0x00 "GICD_IROUTER963,Interrupt Routing Register 963"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E20++0x07
line.quad 0x00 "GICD_IROUTER964,Interrupt Routing Register 964"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E28++0x07
line.quad 0x00 "GICD_IROUTER965,Interrupt Routing Register 965"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E30++0x07
line.quad 0x00 "GICD_IROUTER966,Interrupt Routing Register 966"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E38++0x07
line.quad 0x00 "GICD_IROUTER967,Interrupt Routing Register 967"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E40++0x07
line.quad 0x00 "GICD_IROUTER968,Interrupt Routing Register 968"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E48++0x07
line.quad 0x00 "GICD_IROUTER969,Interrupt Routing Register 969"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E50++0x07
line.quad 0x00 "GICD_IROUTER970,Interrupt Routing Register 970"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E58++0x07
line.quad 0x00 "GICD_IROUTER971,Interrupt Routing Register 971"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E60++0x07
line.quad 0x00 "GICD_IROUTER972,Interrupt Routing Register 972"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E68++0x07
line.quad 0x00 "GICD_IROUTER973,Interrupt Routing Register 973"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E70++0x07
line.quad 0x00 "GICD_IROUTER974,Interrupt Routing Register 974"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E78++0x07
line.quad 0x00 "GICD_IROUTER975,Interrupt Routing Register 975"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E80++0x07
line.quad 0x00 "GICD_IROUTER976,Interrupt Routing Register 976"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E88++0x07
line.quad 0x00 "GICD_IROUTER977,Interrupt Routing Register 977"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E90++0x07
line.quad 0x00 "GICD_IROUTER978,Interrupt Routing Register 978"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7E98++0x07
line.quad 0x00 "GICD_IROUTER979,Interrupt Routing Register 979"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA0++0x07
line.quad 0x00 "GICD_IROUTER980,Interrupt Routing Register 980"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EA8++0x07
line.quad 0x00 "GICD_IROUTER981,Interrupt Routing Register 981"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB0++0x07
line.quad 0x00 "GICD_IROUTER982,Interrupt Routing Register 982"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EB8++0x07
line.quad 0x00 "GICD_IROUTER983,Interrupt Routing Register 983"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC0++0x07
line.quad 0x00 "GICD_IROUTER984,Interrupt Routing Register 984"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EC8++0x07
line.quad 0x00 "GICD_IROUTER985,Interrupt Routing Register 985"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED0++0x07
line.quad 0x00 "GICD_IROUTER986,Interrupt Routing Register 986"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7ED8++0x07
line.quad 0x00 "GICD_IROUTER987,Interrupt Routing Register 987"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE0++0x07
line.quad 0x00 "GICD_IROUTER988,Interrupt Routing Register 988"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EE8++0x07
line.quad 0x00 "GICD_IROUTER989,Interrupt Routing Register 989"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF0++0x07
line.quad 0x00 "GICD_IROUTER990,Interrupt Routing Register 990"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
group.quad 0x7EF8++0x07
line.quad 0x00 "GICD_IROUTER991,Interrupt Routing Register 991"
hexmask.quad.byte 0x00 32.--39. 1. " AFF3 ,Affinity level 3"
bitfld.quad 0x00 31. "  IRM  ,Interrupt Routing Mode. Defines how SPIs are routed in an affinity hierarchy" "PE specified by AFFn fields,Any PE defined as a participating node"
textline "                                         "
hexmask.quad.byte 0x00 16.--23. 1. " AFF2 ,Affinity level 2"
hexmask.quad.byte 0x00 8.--15. 1. "  AFF1 ,Affinity level 1"
textline "                                         "
hexmask.quad.byte 0x00 0.--7. 1. " AFF0 ,Affinity level 0"
tree.end
width 22.
tree "Implementation Defined Test Registers"
rgroup.long 0xC000++0x03
line.long 0x00 "GICD_ESTATUSR,GICD_ESTATUSR"
bitfld.long 0x00 31. " SRWP     ,Super Register Write Pending" "Not pending,Pending"
wgroup.long 0xC004++0x03
line.long 0x00 "GICD_ERRTESTR,Error Test Register"
bitfld.long 0x00 1. " AXIM_ERR ,Drives the axim_err pin to 0b1 for 1 cycle" "Low,High"
bitfld.long 0x00 0. "         ECC_FATAL ,Drives the ecc_fatal pin to 0b1 for 1 cycle" "Low,High"
textline "                               "
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x01)
rgroup.long 0xC084++0x03
line.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
bitfld.long 0x00 31. " SPIS63  ,SPI Status Bit 63" "Low,High"
bitfld.long 0x00 30. "  SPIS62  ,SPI Status Bit 62" "Low,High"
bitfld.long 0x00 29. "  SPIS61  ,SPI Status Bit 61" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS60  ,SPI Status Bit 60" "Low,High"
bitfld.long 0x00 27. "  SPIS59  ,SPI Status Bit 59" "Low,High"
bitfld.long 0x00 26. "  SPIS58  ,SPI Status Bit 58" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS57  ,SPI Status Bit 57" "Low,High"
bitfld.long 0x00 24. "  SPIS56  ,SPI Status Bit 56" "Low,High"
bitfld.long 0x00 23. "  SPIS55  ,SPI Status Bit 55" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS54  ,SPI Status Bit 54" "Low,High"
bitfld.long 0x00 21. "  SPIS53  ,SPI Status Bit 53" "Low,High"
bitfld.long 0x00 20. "  SPIS52  ,SPI Status Bit 52" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS51  ,SPI Status Bit 51" "Low,High"
bitfld.long 0x00 18. "  SPIS50  ,SPI Status Bit 50" "Low,High"
bitfld.long 0x00 17. "  SPIS49  ,SPI Status Bit 49" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS48  ,SPI Status Bit 48" "Low,High"
bitfld.long 0x00 15. "  SPIS47  ,SPI Status Bit 47" "Low,High"
bitfld.long 0x00 14. "  SPIS46  ,SPI Status Bit 46" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS45  ,SPI Status Bit 45" "Low,High"
bitfld.long 0x00 12. "  SPIS44  ,SPI Status Bit 44" "Low,High"
bitfld.long 0x00 11. "  SPIS43  ,SPI Status Bit 43" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS42  ,SPI Status Bit 42" "Low,High"
bitfld.long 0x00 9. "  SPIS41  ,SPI Status Bit 41" "Low,High"
bitfld.long 0x00 8. "  SPIS40  ,SPI Status Bit 40" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS39  ,SPI Status Bit 39" "Low,High"
bitfld.long 0x00 6. "  SPIS38  ,SPI Status Bit 38" "Low,High"
bitfld.long 0x00 5. "  SPIS37  ,SPI Status Bit 37" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS36  ,SPI Status Bit 36" "Low,High"
bitfld.long 0x00 3. "  SPIS35  ,SPI Status Bit 35" "Low,High"
bitfld.long 0x00 2. "  SPIS34  ,SPI Status Bit 34" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS33  ,SPI Status Bit 33" "Low,High"
bitfld.long 0x00 0. "  SPIS32  ,SPI Status Bit 32" "Low,High"
else
hgroup.long 0xC084++0x03
hide.long 0x0 "GICD_SPISR0,Shared Peripheral Interrupt Status Register 0"
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
textline "                               "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x02)
rgroup.long 0xC088++0x03
line.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
bitfld.long 0x00 31. " SPIS95  ,SPI Status Bit 95" "Low,High"
bitfld.long 0x00 30. "  SPIS94  ,SPI Status Bit 94" "Low,High"
bitfld.long 0x00 29. "  SPIS93  ,SPI Status Bit 93" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS92  ,SPI Status Bit 92" "Low,High"
bitfld.long 0x00 27. "  SPIS91  ,SPI Status Bit 91" "Low,High"
bitfld.long 0x00 26. "  SPIS90  ,SPI Status Bit 90" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS89  ,SPI Status Bit 89" "Low,High"
bitfld.long 0x00 24. "  SPIS88  ,SPI Status Bit 88" "Low,High"
bitfld.long 0x00 23. "  SPIS87  ,SPI Status Bit 87" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS86  ,SPI Status Bit 86" "Low,High"
bitfld.long 0x00 21. "  SPIS85  ,SPI Status Bit 85" "Low,High"
bitfld.long 0x00 20. "  SPIS84  ,SPI Status Bit 84" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS83  ,SPI Status Bit 83" "Low,High"
bitfld.long 0x00 18. "  SPIS82  ,SPI Status Bit 82" "Low,High"
bitfld.long 0x00 17. "  SPIS81  ,SPI Status Bit 81" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS80  ,SPI Status Bit 80" "Low,High"
bitfld.long 0x00 15. "  SPIS79  ,SPI Status Bit 79" "Low,High"
bitfld.long 0x00 14. "  SPIS78  ,SPI Status Bit 78" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS77  ,SPI Status Bit 77" "Low,High"
bitfld.long 0x00 12. "  SPIS76  ,SPI Status Bit 76" "Low,High"
bitfld.long 0x00 11. "  SPIS75  ,SPI Status Bit 75" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS74  ,SPI Status Bit 74" "Low,High"
bitfld.long 0x00 9. "  SPIS73  ,SPI Status Bit 73" "Low,High"
bitfld.long 0x00 8. "  SPIS72  ,SPI Status Bit 72" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS71  ,SPI Status Bit 71" "Low,High"
bitfld.long 0x00 6. "  SPIS70  ,SPI Status Bit 70" "Low,High"
bitfld.long 0x00 5. "  SPIS69  ,SPI Status Bit 69" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS68  ,SPI Status Bit 68" "Low,High"
bitfld.long 0x00 3. "  SPIS67  ,SPI Status Bit 67" "Low,High"
bitfld.long 0x00 2. "  SPIS66  ,SPI Status Bit 66" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS65  ,SPI Status Bit 65" "Low,High"
bitfld.long 0x00 0. "  SPIS64  ,SPI Status Bit 64" "Low,High"
else
hgroup.long 0xC088++0x03
hide.long 0x0 "GICD_SPISR1,Shared Peripheral Interrupt Status Register 1"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x03)
rgroup.long 0xC08C++0x03
line.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
bitfld.long 0x00 31. " SPIS127 ,SPI Status Bit 127" "Low,High"
bitfld.long 0x00 30. "  SPIS126 ,SPI Status Bit 126" "Low,High"
bitfld.long 0x00 29. "  SPIS125 ,SPI Status Bit 125" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS124 ,SPI Status Bit 124" "Low,High"
bitfld.long 0x00 27. "  SPIS123 ,SPI Status Bit 123" "Low,High"
bitfld.long 0x00 26. "  SPIS122 ,SPI Status Bit 122" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS121 ,SPI Status Bit 121" "Low,High"
bitfld.long 0x00 24. "  SPIS120 ,SPI Status Bit 120" "Low,High"
bitfld.long 0x00 23. "  SPIS119 ,SPI Status Bit 119" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS118 ,SPI Status Bit 118" "Low,High"
bitfld.long 0x00 21. "  SPIS117 ,SPI Status Bit 117" "Low,High"
bitfld.long 0x00 20. "  SPIS116 ,SPI Status Bit 116" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS115 ,SPI Status Bit 115" "Low,High"
bitfld.long 0x00 18. "  SPIS114 ,SPI Status Bit 114" "Low,High"
bitfld.long 0x00 17. "  SPIS113 ,SPI Status Bit 113" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS112 ,SPI Status Bit 112" "Low,High"
bitfld.long 0x00 15. "  SPIS111 ,SPI Status Bit 111" "Low,High"
bitfld.long 0x00 14. "  SPIS110 ,SPI Status Bit 110" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS109 ,SPI Status Bit 109" "Low,High"
bitfld.long 0x00 12. "  SPIS108 ,SPI Status Bit 108" "Low,High"
bitfld.long 0x00 11. "  SPIS107 ,SPI Status Bit 107" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS106 ,SPI Status Bit 106" "Low,High"
bitfld.long 0x00 9. "  SPIS105 ,SPI Status Bit 105" "Low,High"
bitfld.long 0x00 8. "  SPIS104 ,SPI Status Bit 104" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS103 ,SPI Status Bit 103" "Low,High"
bitfld.long 0x00 6. "  SPIS102 ,SPI Status Bit 102" "Low,High"
bitfld.long 0x00 5. "  SPIS101 ,SPI Status Bit 101" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS100 ,SPI Status Bit 100" "Low,High"
bitfld.long 0x00 3. "  SPIS99  ,SPI Status Bit 99" "Low,High"
bitfld.long 0x00 2. "  SPIS98  ,SPI Status Bit 98" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS97  ,SPI Status Bit 97" "Low,High"
bitfld.long 0x00 0. "  SPIS96  ,SPI Status Bit 96" "Low,High"
else
hgroup.long 0xC08C++0x03
hide.long 0x0 "GICD_SPISR2,Shared Peripheral Interrupt Status Register 2"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x04)
rgroup.long 0xC090++0x03
line.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
bitfld.long 0x00 31. " SPIS159 ,SPI Status Bit 159" "Low,High"
bitfld.long 0x00 30. "  SPIS158 ,SPI Status Bit 158" "Low,High"
bitfld.long 0x00 29. "  SPIS157 ,SPI Status Bit 157" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS156 ,SPI Status Bit 156" "Low,High"
bitfld.long 0x00 27. "  SPIS155 ,SPI Status Bit 155" "Low,High"
bitfld.long 0x00 26. "  SPIS154 ,SPI Status Bit 154" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS153 ,SPI Status Bit 153" "Low,High"
bitfld.long 0x00 24. "  SPIS152 ,SPI Status Bit 152" "Low,High"
bitfld.long 0x00 23. "  SPIS151 ,SPI Status Bit 151" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS150 ,SPI Status Bit 150" "Low,High"
bitfld.long 0x00 21. "  SPIS149 ,SPI Status Bit 149" "Low,High"
bitfld.long 0x00 20. "  SPIS148 ,SPI Status Bit 148" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS147 ,SPI Status Bit 147" "Low,High"
bitfld.long 0x00 18. "  SPIS146 ,SPI Status Bit 146" "Low,High"
bitfld.long 0x00 17. "  SPIS145 ,SPI Status Bit 145" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS144 ,SPI Status Bit 144" "Low,High"
bitfld.long 0x00 15. "  SPIS143 ,SPI Status Bit 143" "Low,High"
bitfld.long 0x00 14. "  SPIS142 ,SPI Status Bit 142" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS141 ,SPI Status Bit 141" "Low,High"
bitfld.long 0x00 12. "  SPIS140 ,SPI Status Bit 140" "Low,High"
bitfld.long 0x00 11. "  SPIS139 ,SPI Status Bit 139" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS138 ,SPI Status Bit 138" "Low,High"
bitfld.long 0x00 9. "  SPIS137 ,SPI Status Bit 137" "Low,High"
bitfld.long 0x00 8. "  SPIS136 ,SPI Status Bit 136" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS135 ,SPI Status Bit 135" "Low,High"
bitfld.long 0x00 6. "  SPIS134 ,SPI Status Bit 134" "Low,High"
bitfld.long 0x00 5. "  SPIS133 ,SPI Status Bit 133" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS132 ,SPI Status Bit 132" "Low,High"
bitfld.long 0x00 3. "  SPIS131 ,SPI Status Bit 131" "Low,High"
bitfld.long 0x00 2. "  SPIS130 ,SPI Status Bit 130" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS129 ,SPI Status Bit 129" "Low,High"
bitfld.long 0x00 0. "  SPIS128 ,SPI Status Bit 128" "Low,High"
else
hgroup.long 0xC090++0x03
hide.long 0x0 "GICD_SPISR3,Shared Peripheral Interrupt Status Register 3"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x05)
rgroup.long 0xC094++0x03
line.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
bitfld.long 0x00 31. " SPIS191 ,SPI Status Bit 191" "Low,High"
bitfld.long 0x00 30. "  SPIS190 ,SPI Status Bit 190" "Low,High"
bitfld.long 0x00 29. "  SPIS189 ,SPI Status Bit 189" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS188 ,SPI Status Bit 188" "Low,High"
bitfld.long 0x00 27. "  SPIS187 ,SPI Status Bit 187" "Low,High"
bitfld.long 0x00 26. "  SPIS186 ,SPI Status Bit 186" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS185 ,SPI Status Bit 185" "Low,High"
bitfld.long 0x00 24. "  SPIS184 ,SPI Status Bit 184" "Low,High"
bitfld.long 0x00 23. "  SPIS183 ,SPI Status Bit 183" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS182 ,SPI Status Bit 182" "Low,High"
bitfld.long 0x00 21. "  SPIS181 ,SPI Status Bit 181" "Low,High"
bitfld.long 0x00 20. "  SPIS180 ,SPI Status Bit 180" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS179 ,SPI Status Bit 179" "Low,High"
bitfld.long 0x00 18. "  SPIS178 ,SPI Status Bit 178" "Low,High"
bitfld.long 0x00 17. "  SPIS177 ,SPI Status Bit 177" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS176 ,SPI Status Bit 176" "Low,High"
bitfld.long 0x00 15. "  SPIS175 ,SPI Status Bit 175" "Low,High"
bitfld.long 0x00 14. "  SPIS174 ,SPI Status Bit 174" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS173 ,SPI Status Bit 173" "Low,High"
bitfld.long 0x00 12. "  SPIS172 ,SPI Status Bit 172" "Low,High"
bitfld.long 0x00 11. "  SPIS171 ,SPI Status Bit 171" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS170 ,SPI Status Bit 170" "Low,High"
bitfld.long 0x00 9. "  SPIS169 ,SPI Status Bit 169" "Low,High"
bitfld.long 0x00 8. "  SPIS168 ,SPI Status Bit 168" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS167 ,SPI Status Bit 167" "Low,High"
bitfld.long 0x00 6. "  SPIS166 ,SPI Status Bit 166" "Low,High"
bitfld.long 0x00 5. "  SPIS165 ,SPI Status Bit 165" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS164 ,SPI Status Bit 164" "Low,High"
bitfld.long 0x00 3. "  SPIS163 ,SPI Status Bit 163" "Low,High"
bitfld.long 0x00 2. "  SPIS162 ,SPI Status Bit 162" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS161 ,SPI Status Bit 161" "Low,High"
bitfld.long 0x00 0. "  SPIS160 ,SPI Status Bit 160" "Low,High"
else
hgroup.long 0xC094++0x03
hide.long 0x0 "GICD_SPISR4,Shared Peripheral Interrupt Status Register 4"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x06)
rgroup.long 0xC098++0x03
line.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
bitfld.long 0x00 31. " SPIS223 ,SPI Status Bit 223" "Low,High"
bitfld.long 0x00 30. "  SPIS222 ,SPI Status Bit 222" "Low,High"
bitfld.long 0x00 29. "  SPIS221 ,SPI Status Bit 221" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS220 ,SPI Status Bit 220" "Low,High"
bitfld.long 0x00 27. "  SPIS219 ,SPI Status Bit 219" "Low,High"
bitfld.long 0x00 26. "  SPIS218 ,SPI Status Bit 218" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS217 ,SPI Status Bit 217" "Low,High"
bitfld.long 0x00 24. "  SPIS216 ,SPI Status Bit 216" "Low,High"
bitfld.long 0x00 23. "  SPIS215 ,SPI Status Bit 215" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS214 ,SPI Status Bit 214" "Low,High"
bitfld.long 0x00 21. "  SPIS213 ,SPI Status Bit 213" "Low,High"
bitfld.long 0x00 20. "  SPIS212 ,SPI Status Bit 212" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS211 ,SPI Status Bit 211" "Low,High"
bitfld.long 0x00 18. "  SPIS210 ,SPI Status Bit 210" "Low,High"
bitfld.long 0x00 17. "  SPIS209 ,SPI Status Bit 209" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS208 ,SPI Status Bit 208" "Low,High"
bitfld.long 0x00 15. "  SPIS207 ,SPI Status Bit 207" "Low,High"
bitfld.long 0x00 14. "  SPIS206 ,SPI Status Bit 206" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS205 ,SPI Status Bit 205" "Low,High"
bitfld.long 0x00 12. "  SPIS204 ,SPI Status Bit 204" "Low,High"
bitfld.long 0x00 11. "  SPIS203 ,SPI Status Bit 203" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS202 ,SPI Status Bit 202" "Low,High"
bitfld.long 0x00 9. "  SPIS201 ,SPI Status Bit 201" "Low,High"
bitfld.long 0x00 8. "  SPIS200 ,SPI Status Bit 200" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS199 ,SPI Status Bit 199" "Low,High"
bitfld.long 0x00 6. "  SPIS198 ,SPI Status Bit 198" "Low,High"
bitfld.long 0x00 5. "  SPIS197 ,SPI Status Bit 197" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS196 ,SPI Status Bit 196" "Low,High"
bitfld.long 0x00 3. "  SPIS195 ,SPI Status Bit 195" "Low,High"
bitfld.long 0x00 2. "  SPIS194 ,SPI Status Bit 194" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS193 ,SPI Status Bit 193" "Low,High"
bitfld.long 0x00 0. "  SPIS192 ,SPI Status Bit 192" "Low,High"
else
hgroup.long 0xC098++0x03
hide.long 0x0 "GICD_SPISR5,Shared Peripheral Interrupt Status Register 5"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x07)
rgroup.long 0xC09C++0x03
line.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
bitfld.long 0x00 31. " SPIS255 ,SPI Status Bit 255" "Low,High"
bitfld.long 0x00 30. "  SPIS254 ,SPI Status Bit 254" "Low,High"
bitfld.long 0x00 29. "  SPIS253 ,SPI Status Bit 253" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS252 ,SPI Status Bit 252" "Low,High"
bitfld.long 0x00 27. "  SPIS251 ,SPI Status Bit 251" "Low,High"
bitfld.long 0x00 26. "  SPIS250 ,SPI Status Bit 250" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS249 ,SPI Status Bit 249" "Low,High"
bitfld.long 0x00 24. "  SPIS248 ,SPI Status Bit 248" "Low,High"
bitfld.long 0x00 23. "  SPIS247 ,SPI Status Bit 247" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS246 ,SPI Status Bit 246" "Low,High"
bitfld.long 0x00 21. "  SPIS245 ,SPI Status Bit 245" "Low,High"
bitfld.long 0x00 20. "  SPIS244 ,SPI Status Bit 244" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS243 ,SPI Status Bit 243" "Low,High"
bitfld.long 0x00 18. "  SPIS242 ,SPI Status Bit 242" "Low,High"
bitfld.long 0x00 17. "  SPIS241 ,SPI Status Bit 241" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS240 ,SPI Status Bit 240" "Low,High"
bitfld.long 0x00 15. "  SPIS239 ,SPI Status Bit 239" "Low,High"
bitfld.long 0x00 14. "  SPIS238 ,SPI Status Bit 238" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS237 ,SPI Status Bit 237" "Low,High"
bitfld.long 0x00 12. "  SPIS236 ,SPI Status Bit 236" "Low,High"
bitfld.long 0x00 11. "  SPIS235 ,SPI Status Bit 235" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS234 ,SPI Status Bit 234" "Low,High"
bitfld.long 0x00 9. "  SPIS233 ,SPI Status Bit 233" "Low,High"
bitfld.long 0x00 8. "  SPIS232 ,SPI Status Bit 232" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS231 ,SPI Status Bit 231" "Low,High"
bitfld.long 0x00 6. "  SPIS230 ,SPI Status Bit 230" "Low,High"
bitfld.long 0x00 5. "  SPIS229 ,SPI Status Bit 229" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS228 ,SPI Status Bit 228" "Low,High"
bitfld.long 0x00 3. "  SPIS227 ,SPI Status Bit 227" "Low,High"
bitfld.long 0x00 2. "  SPIS226 ,SPI Status Bit 226" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS225 ,SPI Status Bit 225" "Low,High"
bitfld.long 0x00 0. "  SPIS224 ,SPI Status Bit 224" "Low,High"
else
hgroup.long 0xC09C++0x03
hide.long 0x0 "GICD_SPISR6,Shared Peripheral Interrupt Status Register 6"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x08)
rgroup.long 0xC0A0++0x03
line.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
bitfld.long 0x00 31. " SPIS287 ,SPI Status Bit 287" "Low,High"
bitfld.long 0x00 30. "  SPIS286 ,SPI Status Bit 286" "Low,High"
bitfld.long 0x00 29. "  SPIS285 ,SPI Status Bit 285" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS284 ,SPI Status Bit 284" "Low,High"
bitfld.long 0x00 27. "  SPIS283 ,SPI Status Bit 283" "Low,High"
bitfld.long 0x00 26. "  SPIS282 ,SPI Status Bit 282" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS281 ,SPI Status Bit 281" "Low,High"
bitfld.long 0x00 24. "  SPIS280 ,SPI Status Bit 280" "Low,High"
bitfld.long 0x00 23. "  SPIS279 ,SPI Status Bit 279" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS278 ,SPI Status Bit 278" "Low,High"
bitfld.long 0x00 21. "  SPIS277 ,SPI Status Bit 277" "Low,High"
bitfld.long 0x00 20. "  SPIS276 ,SPI Status Bit 276" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS275 ,SPI Status Bit 275" "Low,High"
bitfld.long 0x00 18. "  SPIS274 ,SPI Status Bit 274" "Low,High"
bitfld.long 0x00 17. "  SPIS273 ,SPI Status Bit 273" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS272 ,SPI Status Bit 272" "Low,High"
bitfld.long 0x00 15. "  SPIS271 ,SPI Status Bit 271" "Low,High"
bitfld.long 0x00 14. "  SPIS270 ,SPI Status Bit 270" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS269 ,SPI Status Bit 269" "Low,High"
bitfld.long 0x00 12. "  SPIS268 ,SPI Status Bit 268" "Low,High"
bitfld.long 0x00 11. "  SPIS267 ,SPI Status Bit 267" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS266 ,SPI Status Bit 266" "Low,High"
bitfld.long 0x00 9. "  SPIS265 ,SPI Status Bit 265" "Low,High"
bitfld.long 0x00 8. "  SPIS264 ,SPI Status Bit 264" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS263 ,SPI Status Bit 263" "Low,High"
bitfld.long 0x00 6. "  SPIS262 ,SPI Status Bit 262" "Low,High"
bitfld.long 0x00 5. "  SPIS261 ,SPI Status Bit 261" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS260 ,SPI Status Bit 260" "Low,High"
bitfld.long 0x00 3. "  SPIS259 ,SPI Status Bit 259" "Low,High"
bitfld.long 0x00 2. "  SPIS258 ,SPI Status Bit 258" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS257 ,SPI Status Bit 257" "Low,High"
bitfld.long 0x00 0. "  SPIS256 ,SPI Status Bit 256" "Low,High"
else
hgroup.long 0xC0A0++0x03
hide.long 0x0 "GICD_SPISR7,Shared Peripheral Interrupt Status Register 7"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x09)
rgroup.long 0xC0A4++0x03
line.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
bitfld.long 0x00 31. " SPIS319 ,SPI Status Bit 319" "Low,High"
bitfld.long 0x00 30. "  SPIS318 ,SPI Status Bit 318" "Low,High"
bitfld.long 0x00 29. "  SPIS317 ,SPI Status Bit 317" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS316 ,SPI Status Bit 316" "Low,High"
bitfld.long 0x00 27. "  SPIS315 ,SPI Status Bit 315" "Low,High"
bitfld.long 0x00 26. "  SPIS314 ,SPI Status Bit 314" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS313 ,SPI Status Bit 313" "Low,High"
bitfld.long 0x00 24. "  SPIS312 ,SPI Status Bit 312" "Low,High"
bitfld.long 0x00 23. "  SPIS311 ,SPI Status Bit 311" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS310 ,SPI Status Bit 310" "Low,High"
bitfld.long 0x00 21. "  SPIS309 ,SPI Status Bit 309" "Low,High"
bitfld.long 0x00 20. "  SPIS308 ,SPI Status Bit 308" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS307 ,SPI Status Bit 307" "Low,High"
bitfld.long 0x00 18. "  SPIS306 ,SPI Status Bit 306" "Low,High"
bitfld.long 0x00 17. "  SPIS305 ,SPI Status Bit 305" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS304 ,SPI Status Bit 304" "Low,High"
bitfld.long 0x00 15. "  SPIS303 ,SPI Status Bit 303" "Low,High"
bitfld.long 0x00 14. "  SPIS302 ,SPI Status Bit 302" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS301 ,SPI Status Bit 301" "Low,High"
bitfld.long 0x00 12. "  SPIS300 ,SPI Status Bit 300" "Low,High"
bitfld.long 0x00 11. "  SPIS299 ,SPI Status Bit 299" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS298 ,SPI Status Bit 298" "Low,High"
bitfld.long 0x00 9. "  SPIS297 ,SPI Status Bit 297" "Low,High"
bitfld.long 0x00 8. "  SPIS296 ,SPI Status Bit 296" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS295 ,SPI Status Bit 295" "Low,High"
bitfld.long 0x00 6. "  SPIS294 ,SPI Status Bit 294" "Low,High"
bitfld.long 0x00 5. "  SPIS293 ,SPI Status Bit 293" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS292 ,SPI Status Bit 292" "Low,High"
bitfld.long 0x00 3. "  SPIS291 ,SPI Status Bit 291" "Low,High"
bitfld.long 0x00 2. "  SPIS290 ,SPI Status Bit 290" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS289 ,SPI Status Bit 289" "Low,High"
bitfld.long 0x00 0. "  SPIS288 ,SPI Status Bit 288" "Low,High"
else
hgroup.long 0xC0A4++0x03
hide.long 0x0 "GICD_SPISR8,Shared Peripheral Interrupt Status Register 8"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0A)
rgroup.long 0xC0A8++0x03
line.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
bitfld.long 0x00 31. " SPIS351 ,SPI Status Bit 351" "Low,High"
bitfld.long 0x00 30. "  SPIS350 ,SPI Status Bit 350" "Low,High"
bitfld.long 0x00 29. "  SPIS349 ,SPI Status Bit 349" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS348 ,SPI Status Bit 348" "Low,High"
bitfld.long 0x00 27. "  SPIS347 ,SPI Status Bit 347" "Low,High"
bitfld.long 0x00 26. "  SPIS346 ,SPI Status Bit 346" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS345 ,SPI Status Bit 345" "Low,High"
bitfld.long 0x00 24. "  SPIS344 ,SPI Status Bit 344" "Low,High"
bitfld.long 0x00 23. "  SPIS343 ,SPI Status Bit 343" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS342 ,SPI Status Bit 342" "Low,High"
bitfld.long 0x00 21. "  SPIS341 ,SPI Status Bit 341" "Low,High"
bitfld.long 0x00 20. "  SPIS340 ,SPI Status Bit 340" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS339 ,SPI Status Bit 339" "Low,High"
bitfld.long 0x00 18. "  SPIS338 ,SPI Status Bit 338" "Low,High"
bitfld.long 0x00 17. "  SPIS337 ,SPI Status Bit 337" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS336 ,SPI Status Bit 336" "Low,High"
bitfld.long 0x00 15. "  SPIS335 ,SPI Status Bit 335" "Low,High"
bitfld.long 0x00 14. "  SPIS334 ,SPI Status Bit 334" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS333 ,SPI Status Bit 333" "Low,High"
bitfld.long 0x00 12. "  SPIS332 ,SPI Status Bit 332" "Low,High"
bitfld.long 0x00 11. "  SPIS331 ,SPI Status Bit 331" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS330 ,SPI Status Bit 330" "Low,High"
bitfld.long 0x00 9. "  SPIS329 ,SPI Status Bit 329" "Low,High"
bitfld.long 0x00 8. "  SPIS328 ,SPI Status Bit 328" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS327 ,SPI Status Bit 327" "Low,High"
bitfld.long 0x00 6. "  SPIS326 ,SPI Status Bit 326" "Low,High"
bitfld.long 0x00 5. "  SPIS325 ,SPI Status Bit 325" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS324 ,SPI Status Bit 324" "Low,High"
bitfld.long 0x00 3. "  SPIS323 ,SPI Status Bit 323" "Low,High"
bitfld.long 0x00 2. "  SPIS322 ,SPI Status Bit 322" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS321 ,SPI Status Bit 321" "Low,High"
bitfld.long 0x00 0. "  SPIS320 ,SPI Status Bit 320" "Low,High"
else
hgroup.long 0xC0A8++0x03
hide.long 0x0 "GICD_SPISR9,Shared Peripheral Interrupt Status Register 9"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0B)
rgroup.long 0xC0AC++0x03
line.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
bitfld.long 0x00 31. " SPIS383 ,SPI Status Bit 383" "Low,High"
bitfld.long 0x00 30. "  SPIS382 ,SPI Status Bit 382" "Low,High"
bitfld.long 0x00 29. "  SPIS381 ,SPI Status Bit 381" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS380 ,SPI Status Bit 380" "Low,High"
bitfld.long 0x00 27. "  SPIS379 ,SPI Status Bit 379" "Low,High"
bitfld.long 0x00 26. "  SPIS378 ,SPI Status Bit 378" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS377 ,SPI Status Bit 377" "Low,High"
bitfld.long 0x00 24. "  SPIS376 ,SPI Status Bit 376" "Low,High"
bitfld.long 0x00 23. "  SPIS375 ,SPI Status Bit 375" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS374 ,SPI Status Bit 374" "Low,High"
bitfld.long 0x00 21. "  SPIS373 ,SPI Status Bit 373" "Low,High"
bitfld.long 0x00 20. "  SPIS372 ,SPI Status Bit 372" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS371 ,SPI Status Bit 371" "Low,High"
bitfld.long 0x00 18. "  SPIS370 ,SPI Status Bit 370" "Low,High"
bitfld.long 0x00 17. "  SPIS369 ,SPI Status Bit 369" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS368 ,SPI Status Bit 368" "Low,High"
bitfld.long 0x00 15. "  SPIS367 ,SPI Status Bit 367" "Low,High"
bitfld.long 0x00 14. "  SPIS366 ,SPI Status Bit 366" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS365 ,SPI Status Bit 365" "Low,High"
bitfld.long 0x00 12. "  SPIS364 ,SPI Status Bit 364" "Low,High"
bitfld.long 0x00 11. "  SPIS363 ,SPI Status Bit 363" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS362 ,SPI Status Bit 362" "Low,High"
bitfld.long 0x00 9. "  SPIS361 ,SPI Status Bit 361" "Low,High"
bitfld.long 0x00 8. "  SPIS360 ,SPI Status Bit 360" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS359 ,SPI Status Bit 359" "Low,High"
bitfld.long 0x00 6. "  SPIS358 ,SPI Status Bit 358" "Low,High"
bitfld.long 0x00 5. "  SPIS357 ,SPI Status Bit 357" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS356 ,SPI Status Bit 356" "Low,High"
bitfld.long 0x00 3. "  SPIS355 ,SPI Status Bit 355" "Low,High"
bitfld.long 0x00 2. "  SPIS354 ,SPI Status Bit 354" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS353 ,SPI Status Bit 353" "Low,High"
bitfld.long 0x00 0. "  SPIS352 ,SPI Status Bit 352" "Low,High"
else
hgroup.long 0xC0AC++0x03
hide.long 0x0 "GICD_SPISR10,Shared Peripheral Interrupt Status Register 10"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0C)
rgroup.long 0xC0B0++0x03
line.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
bitfld.long 0x00 31. " SPIS415 ,SPI Status Bit 415" "Low,High"
bitfld.long 0x00 30. "  SPIS414 ,SPI Status Bit 414" "Low,High"
bitfld.long 0x00 29. "  SPIS413 ,SPI Status Bit 413" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS412 ,SPI Status Bit 412" "Low,High"
bitfld.long 0x00 27. "  SPIS411 ,SPI Status Bit 411" "Low,High"
bitfld.long 0x00 26. "  SPIS410 ,SPI Status Bit 410" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS409 ,SPI Status Bit 409" "Low,High"
bitfld.long 0x00 24. "  SPIS408 ,SPI Status Bit 408" "Low,High"
bitfld.long 0x00 23. "  SPIS407 ,SPI Status Bit 407" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS406 ,SPI Status Bit 406" "Low,High"
bitfld.long 0x00 21. "  SPIS405 ,SPI Status Bit 405" "Low,High"
bitfld.long 0x00 20. "  SPIS404 ,SPI Status Bit 404" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS403 ,SPI Status Bit 403" "Low,High"
bitfld.long 0x00 18. "  SPIS402 ,SPI Status Bit 402" "Low,High"
bitfld.long 0x00 17. "  SPIS401 ,SPI Status Bit 401" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS400 ,SPI Status Bit 400" "Low,High"
bitfld.long 0x00 15. "  SPIS399 ,SPI Status Bit 399" "Low,High"
bitfld.long 0x00 14. "  SPIS398 ,SPI Status Bit 398" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS397 ,SPI Status Bit 397" "Low,High"
bitfld.long 0x00 12. "  SPIS396 ,SPI Status Bit 396" "Low,High"
bitfld.long 0x00 11. "  SPIS395 ,SPI Status Bit 395" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS394 ,SPI Status Bit 394" "Low,High"
bitfld.long 0x00 9. "  SPIS393 ,SPI Status Bit 393" "Low,High"
bitfld.long 0x00 8. "  SPIS392 ,SPI Status Bit 392" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS391 ,SPI Status Bit 391" "Low,High"
bitfld.long 0x00 6. "  SPIS390 ,SPI Status Bit 390" "Low,High"
bitfld.long 0x00 5. "  SPIS389 ,SPI Status Bit 389" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS388 ,SPI Status Bit 388" "Low,High"
bitfld.long 0x00 3. "  SPIS387 ,SPI Status Bit 387" "Low,High"
bitfld.long 0x00 2. "  SPIS386 ,SPI Status Bit 386" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS385 ,SPI Status Bit 385" "Low,High"
bitfld.long 0x00 0. "  SPIS384 ,SPI Status Bit 384" "Low,High"
else
hgroup.long 0xC0B0++0x03
hide.long 0x0 "GICD_SPISR11,Shared Peripheral Interrupt Status Register 11"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0D)
rgroup.long 0xC0B4++0x03
line.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
bitfld.long 0x00 31. " SPIS447 ,SPI Status Bit 447" "Low,High"
bitfld.long 0x00 30. "  SPIS446 ,SPI Status Bit 446" "Low,High"
bitfld.long 0x00 29. "  SPIS445 ,SPI Status Bit 445" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS444 ,SPI Status Bit 444" "Low,High"
bitfld.long 0x00 27. "  SPIS443 ,SPI Status Bit 443" "Low,High"
bitfld.long 0x00 26. "  SPIS442 ,SPI Status Bit 442" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS441 ,SPI Status Bit 441" "Low,High"
bitfld.long 0x00 24. "  SPIS440 ,SPI Status Bit 440" "Low,High"
bitfld.long 0x00 23. "  SPIS439 ,SPI Status Bit 439" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS438 ,SPI Status Bit 438" "Low,High"
bitfld.long 0x00 21. "  SPIS437 ,SPI Status Bit 437" "Low,High"
bitfld.long 0x00 20. "  SPIS436 ,SPI Status Bit 436" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS435 ,SPI Status Bit 435" "Low,High"
bitfld.long 0x00 18. "  SPIS434 ,SPI Status Bit 434" "Low,High"
bitfld.long 0x00 17. "  SPIS433 ,SPI Status Bit 433" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS432 ,SPI Status Bit 432" "Low,High"
bitfld.long 0x00 15. "  SPIS431 ,SPI Status Bit 431" "Low,High"
bitfld.long 0x00 14. "  SPIS430 ,SPI Status Bit 430" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS429 ,SPI Status Bit 429" "Low,High"
bitfld.long 0x00 12. "  SPIS428 ,SPI Status Bit 428" "Low,High"
bitfld.long 0x00 11. "  SPIS427 ,SPI Status Bit 427" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS426 ,SPI Status Bit 426" "Low,High"
bitfld.long 0x00 9. "  SPIS425 ,SPI Status Bit 425" "Low,High"
bitfld.long 0x00 8. "  SPIS424 ,SPI Status Bit 424" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS423 ,SPI Status Bit 423" "Low,High"
bitfld.long 0x00 6. "  SPIS422 ,SPI Status Bit 422" "Low,High"
bitfld.long 0x00 5. "  SPIS421 ,SPI Status Bit 421" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS420 ,SPI Status Bit 420" "Low,High"
bitfld.long 0x00 3. "  SPIS419 ,SPI Status Bit 419" "Low,High"
bitfld.long 0x00 2. "  SPIS418 ,SPI Status Bit 418" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS417 ,SPI Status Bit 417" "Low,High"
bitfld.long 0x00 0. "  SPIS416 ,SPI Status Bit 416" "Low,High"
else
hgroup.long 0xC0B4++0x03
hide.long 0x0 "GICD_SPISR12,Shared Peripheral Interrupt Status Register 12"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0E)
rgroup.long 0xC0B8++0x03
line.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
bitfld.long 0x00 31. " SPIS479 ,SPI Status Bit 479" "Low,High"
bitfld.long 0x00 30. "  SPIS478 ,SPI Status Bit 478" "Low,High"
bitfld.long 0x00 29. "  SPIS477 ,SPI Status Bit 477" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS476 ,SPI Status Bit 476" "Low,High"
bitfld.long 0x00 27. "  SPIS475 ,SPI Status Bit 475" "Low,High"
bitfld.long 0x00 26. "  SPIS474 ,SPI Status Bit 474" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS473 ,SPI Status Bit 473" "Low,High"
bitfld.long 0x00 24. "  SPIS472 ,SPI Status Bit 472" "Low,High"
bitfld.long 0x00 23. "  SPIS471 ,SPI Status Bit 471" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS470 ,SPI Status Bit 470" "Low,High"
bitfld.long 0x00 21. "  SPIS469 ,SPI Status Bit 469" "Low,High"
bitfld.long 0x00 20. "  SPIS468 ,SPI Status Bit 468" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS467 ,SPI Status Bit 467" "Low,High"
bitfld.long 0x00 18. "  SPIS466 ,SPI Status Bit 466" "Low,High"
bitfld.long 0x00 17. "  SPIS465 ,SPI Status Bit 465" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS464 ,SPI Status Bit 464" "Low,High"
bitfld.long 0x00 15. "  SPIS463 ,SPI Status Bit 463" "Low,High"
bitfld.long 0x00 14. "  SPIS462 ,SPI Status Bit 462" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS461 ,SPI Status Bit 461" "Low,High"
bitfld.long 0x00 12. "  SPIS460 ,SPI Status Bit 460" "Low,High"
bitfld.long 0x00 11. "  SPIS459 ,SPI Status Bit 459" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS458 ,SPI Status Bit 458" "Low,High"
bitfld.long 0x00 9. "  SPIS457 ,SPI Status Bit 457" "Low,High"
bitfld.long 0x00 8. "  SPIS456 ,SPI Status Bit 456" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS455 ,SPI Status Bit 455" "Low,High"
bitfld.long 0x00 6. "  SPIS454 ,SPI Status Bit 454" "Low,High"
bitfld.long 0x00 5. "  SPIS453 ,SPI Status Bit 453" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS452 ,SPI Status Bit 452" "Low,High"
bitfld.long 0x00 3. "  SPIS451 ,SPI Status Bit 451" "Low,High"
bitfld.long 0x00 2. "  SPIS450 ,SPI Status Bit 450" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS449 ,SPI Status Bit 449" "Low,High"
bitfld.long 0x00 0. "  SPIS448 ,SPI Status Bit 448" "Low,High"
else
hgroup.long 0xC0B8++0x03
hide.long 0x0 "GICD_SPISR13,Shared Peripheral Interrupt Status Register 13"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x0F)
rgroup.long 0xC0BC++0x03
line.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
bitfld.long 0x00 31. " SPIS511 ,SPI Status Bit 511" "Low,High"
bitfld.long 0x00 30. "  SPIS510 ,SPI Status Bit 510" "Low,High"
bitfld.long 0x00 29. "  SPIS509 ,SPI Status Bit 509" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS508 ,SPI Status Bit 508" "Low,High"
bitfld.long 0x00 27. "  SPIS507 ,SPI Status Bit 507" "Low,High"
bitfld.long 0x00 26. "  SPIS506 ,SPI Status Bit 506" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS505 ,SPI Status Bit 505" "Low,High"
bitfld.long 0x00 24. "  SPIS504 ,SPI Status Bit 504" "Low,High"
bitfld.long 0x00 23. "  SPIS503 ,SPI Status Bit 503" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS502 ,SPI Status Bit 502" "Low,High"
bitfld.long 0x00 21. "  SPIS501 ,SPI Status Bit 501" "Low,High"
bitfld.long 0x00 20. "  SPIS500 ,SPI Status Bit 500" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS499 ,SPI Status Bit 499" "Low,High"
bitfld.long 0x00 18. "  SPIS498 ,SPI Status Bit 498" "Low,High"
bitfld.long 0x00 17. "  SPIS497 ,SPI Status Bit 497" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS496 ,SPI Status Bit 496" "Low,High"
bitfld.long 0x00 15. "  SPIS495 ,SPI Status Bit 495" "Low,High"
bitfld.long 0x00 14. "  SPIS494 ,SPI Status Bit 494" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS493 ,SPI Status Bit 493" "Low,High"
bitfld.long 0x00 12. "  SPIS492 ,SPI Status Bit 492" "Low,High"
bitfld.long 0x00 11. "  SPIS491 ,SPI Status Bit 491" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS490 ,SPI Status Bit 490" "Low,High"
bitfld.long 0x00 9. "  SPIS489 ,SPI Status Bit 489" "Low,High"
bitfld.long 0x00 8. "  SPIS488 ,SPI Status Bit 488" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS487 ,SPI Status Bit 487" "Low,High"
bitfld.long 0x00 6. "  SPIS486 ,SPI Status Bit 486" "Low,High"
bitfld.long 0x00 5. "  SPIS485 ,SPI Status Bit 485" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS484 ,SPI Status Bit 484" "Low,High"
bitfld.long 0x00 3. "  SPIS483 ,SPI Status Bit 483" "Low,High"
bitfld.long 0x00 2. "  SPIS482 ,SPI Status Bit 482" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS481 ,SPI Status Bit 481" "Low,High"
bitfld.long 0x00 0. "  SPIS480 ,SPI Status Bit 480" "Low,High"
else
hgroup.long 0xC0BC++0x03
hide.long 0x0 "GICD_SPISR14,Shared Peripheral Interrupt Status Register 14"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x10)
rgroup.long 0xC0C0++0x03
line.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
bitfld.long 0x00 31. " SPIS543 ,SPI Status Bit 543" "Low,High"
bitfld.long 0x00 30. "  SPIS542 ,SPI Status Bit 542" "Low,High"
bitfld.long 0x00 29. "  SPIS541 ,SPI Status Bit 541" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS540 ,SPI Status Bit 540" "Low,High"
bitfld.long 0x00 27. "  SPIS539 ,SPI Status Bit 539" "Low,High"
bitfld.long 0x00 26. "  SPIS538 ,SPI Status Bit 538" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS537 ,SPI Status Bit 537" "Low,High"
bitfld.long 0x00 24. "  SPIS536 ,SPI Status Bit 536" "Low,High"
bitfld.long 0x00 23. "  SPIS535 ,SPI Status Bit 535" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS534 ,SPI Status Bit 534" "Low,High"
bitfld.long 0x00 21. "  SPIS533 ,SPI Status Bit 533" "Low,High"
bitfld.long 0x00 20. "  SPIS532 ,SPI Status Bit 532" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS531 ,SPI Status Bit 531" "Low,High"
bitfld.long 0x00 18. "  SPIS530 ,SPI Status Bit 530" "Low,High"
bitfld.long 0x00 17. "  SPIS529 ,SPI Status Bit 529" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS528 ,SPI Status Bit 528" "Low,High"
bitfld.long 0x00 15. "  SPIS527 ,SPI Status Bit 527" "Low,High"
bitfld.long 0x00 14. "  SPIS526 ,SPI Status Bit 526" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS525 ,SPI Status Bit 525" "Low,High"
bitfld.long 0x00 12. "  SPIS524 ,SPI Status Bit 524" "Low,High"
bitfld.long 0x00 11. "  SPIS523 ,SPI Status Bit 523" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS522 ,SPI Status Bit 522" "Low,High"
bitfld.long 0x00 9. "  SPIS521 ,SPI Status Bit 521" "Low,High"
bitfld.long 0x00 8. "  SPIS520 ,SPI Status Bit 520" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS519 ,SPI Status Bit 519" "Low,High"
bitfld.long 0x00 6. "  SPIS518 ,SPI Status Bit 518" "Low,High"
bitfld.long 0x00 5. "  SPIS517 ,SPI Status Bit 517" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS516 ,SPI Status Bit 516" "Low,High"
bitfld.long 0x00 3. "  SPIS515 ,SPI Status Bit 515" "Low,High"
bitfld.long 0x00 2. "  SPIS514 ,SPI Status Bit 514" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS513 ,SPI Status Bit 513" "Low,High"
bitfld.long 0x00 0. "  SPIS512 ,SPI Status Bit 512" "Low,High"
else
hgroup.long 0xC0C0++0x03
hide.long 0x0 "GICD_SPISR15,Shared Peripheral Interrupt Status Register 15"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x11)
rgroup.long 0xC0C4++0x03
line.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
bitfld.long 0x00 31. " SPIS575 ,SPI Status Bit 575" "Low,High"
bitfld.long 0x00 30. "  SPIS574 ,SPI Status Bit 574" "Low,High"
bitfld.long 0x00 29. "  SPIS573 ,SPI Status Bit 573" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS572 ,SPI Status Bit 572" "Low,High"
bitfld.long 0x00 27. "  SPIS571 ,SPI Status Bit 571" "Low,High"
bitfld.long 0x00 26. "  SPIS570 ,SPI Status Bit 570" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS569 ,SPI Status Bit 569" "Low,High"
bitfld.long 0x00 24. "  SPIS568 ,SPI Status Bit 568" "Low,High"
bitfld.long 0x00 23. "  SPIS567 ,SPI Status Bit 567" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS566 ,SPI Status Bit 566" "Low,High"
bitfld.long 0x00 21. "  SPIS565 ,SPI Status Bit 565" "Low,High"
bitfld.long 0x00 20. "  SPIS564 ,SPI Status Bit 564" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS563 ,SPI Status Bit 563" "Low,High"
bitfld.long 0x00 18. "  SPIS562 ,SPI Status Bit 562" "Low,High"
bitfld.long 0x00 17. "  SPIS561 ,SPI Status Bit 561" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS560 ,SPI Status Bit 560" "Low,High"
bitfld.long 0x00 15. "  SPIS559 ,SPI Status Bit 559" "Low,High"
bitfld.long 0x00 14. "  SPIS558 ,SPI Status Bit 558" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS557 ,SPI Status Bit 557" "Low,High"
bitfld.long 0x00 12. "  SPIS556 ,SPI Status Bit 556" "Low,High"
bitfld.long 0x00 11. "  SPIS555 ,SPI Status Bit 555" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS554 ,SPI Status Bit 554" "Low,High"
bitfld.long 0x00 9. "  SPIS553 ,SPI Status Bit 553" "Low,High"
bitfld.long 0x00 8. "  SPIS552 ,SPI Status Bit 552" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS551 ,SPI Status Bit 551" "Low,High"
bitfld.long 0x00 6. "  SPIS550 ,SPI Status Bit 550" "Low,High"
bitfld.long 0x00 5. "  SPIS549 ,SPI Status Bit 549" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS548 ,SPI Status Bit 548" "Low,High"
bitfld.long 0x00 3. "  SPIS547 ,SPI Status Bit 547" "Low,High"
bitfld.long 0x00 2. "  SPIS546 ,SPI Status Bit 546" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS545 ,SPI Status Bit 545" "Low,High"
bitfld.long 0x00 0. "  SPIS544 ,SPI Status Bit 544" "Low,High"
else
hgroup.long 0xC0C4++0x03
hide.long 0x0 "GICD_SPISR16,Shared Peripheral Interrupt Status Register 16"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x12)
rgroup.long 0xC0C8++0x03
line.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
bitfld.long 0x00 31. " SPIS607 ,SPI Status Bit 607" "Low,High"
bitfld.long 0x00 30. "  SPIS606 ,SPI Status Bit 606" "Low,High"
bitfld.long 0x00 29. "  SPIS605 ,SPI Status Bit 605" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS604 ,SPI Status Bit 604" "Low,High"
bitfld.long 0x00 27. "  SPIS603 ,SPI Status Bit 603" "Low,High"
bitfld.long 0x00 26. "  SPIS602 ,SPI Status Bit 602" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS601 ,SPI Status Bit 601" "Low,High"
bitfld.long 0x00 24. "  SPIS600 ,SPI Status Bit 600" "Low,High"
bitfld.long 0x00 23. "  SPIS599 ,SPI Status Bit 599" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS598 ,SPI Status Bit 598" "Low,High"
bitfld.long 0x00 21. "  SPIS597 ,SPI Status Bit 597" "Low,High"
bitfld.long 0x00 20. "  SPIS596 ,SPI Status Bit 596" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS595 ,SPI Status Bit 595" "Low,High"
bitfld.long 0x00 18. "  SPIS594 ,SPI Status Bit 594" "Low,High"
bitfld.long 0x00 17. "  SPIS593 ,SPI Status Bit 593" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS592 ,SPI Status Bit 592" "Low,High"
bitfld.long 0x00 15. "  SPIS591 ,SPI Status Bit 591" "Low,High"
bitfld.long 0x00 14. "  SPIS590 ,SPI Status Bit 590" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS589 ,SPI Status Bit 589" "Low,High"
bitfld.long 0x00 12. "  SPIS588 ,SPI Status Bit 588" "Low,High"
bitfld.long 0x00 11. "  SPIS587 ,SPI Status Bit 587" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS586 ,SPI Status Bit 586" "Low,High"
bitfld.long 0x00 9. "  SPIS585 ,SPI Status Bit 585" "Low,High"
bitfld.long 0x00 8. "  SPIS584 ,SPI Status Bit 584" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS583 ,SPI Status Bit 583" "Low,High"
bitfld.long 0x00 6. "  SPIS582 ,SPI Status Bit 582" "Low,High"
bitfld.long 0x00 5. "  SPIS581 ,SPI Status Bit 581" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS580 ,SPI Status Bit 580" "Low,High"
bitfld.long 0x00 3. "  SPIS579 ,SPI Status Bit 579" "Low,High"
bitfld.long 0x00 2. "  SPIS578 ,SPI Status Bit 578" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS577 ,SPI Status Bit 577" "Low,High"
bitfld.long 0x00 0. "  SPIS576 ,SPI Status Bit 576" "Low,High"
else
hgroup.long 0xC0C8++0x03
hide.long 0x0 "GICD_SPISR17,Shared Peripheral Interrupt Status Register 17"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x13)
rgroup.long 0xC0CC++0x03
line.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
bitfld.long 0x00 31. " SPIS639 ,SPI Status Bit 639" "Low,High"
bitfld.long 0x00 30. "  SPIS638 ,SPI Status Bit 638" "Low,High"
bitfld.long 0x00 29. "  SPIS637 ,SPI Status Bit 637" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS636 ,SPI Status Bit 636" "Low,High"
bitfld.long 0x00 27. "  SPIS635 ,SPI Status Bit 635" "Low,High"
bitfld.long 0x00 26. "  SPIS634 ,SPI Status Bit 634" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS633 ,SPI Status Bit 633" "Low,High"
bitfld.long 0x00 24. "  SPIS632 ,SPI Status Bit 632" "Low,High"
bitfld.long 0x00 23. "  SPIS631 ,SPI Status Bit 631" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS630 ,SPI Status Bit 630" "Low,High"
bitfld.long 0x00 21. "  SPIS629 ,SPI Status Bit 629" "Low,High"
bitfld.long 0x00 20. "  SPIS628 ,SPI Status Bit 628" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS627 ,SPI Status Bit 627" "Low,High"
bitfld.long 0x00 18. "  SPIS626 ,SPI Status Bit 626" "Low,High"
bitfld.long 0x00 17. "  SPIS625 ,SPI Status Bit 625" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS624 ,SPI Status Bit 624" "Low,High"
bitfld.long 0x00 15. "  SPIS623 ,SPI Status Bit 623" "Low,High"
bitfld.long 0x00 14. "  SPIS622 ,SPI Status Bit 622" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS621 ,SPI Status Bit 621" "Low,High"
bitfld.long 0x00 12. "  SPIS620 ,SPI Status Bit 620" "Low,High"
bitfld.long 0x00 11. "  SPIS619 ,SPI Status Bit 619" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS618 ,SPI Status Bit 618" "Low,High"
bitfld.long 0x00 9. "  SPIS617 ,SPI Status Bit 617" "Low,High"
bitfld.long 0x00 8. "  SPIS616 ,SPI Status Bit 616" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS615 ,SPI Status Bit 615" "Low,High"
bitfld.long 0x00 6. "  SPIS614 ,SPI Status Bit 614" "Low,High"
bitfld.long 0x00 5. "  SPIS613 ,SPI Status Bit 613" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS612 ,SPI Status Bit 612" "Low,High"
bitfld.long 0x00 3. "  SPIS611 ,SPI Status Bit 611" "Low,High"
bitfld.long 0x00 2. "  SPIS610 ,SPI Status Bit 610" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS609 ,SPI Status Bit 609" "Low,High"
bitfld.long 0x00 0. "  SPIS608 ,SPI Status Bit 608" "Low,High"
else
hgroup.long 0xC0CC++0x03
hide.long 0x0 "GICD_SPISR18,Shared Peripheral Interrupt Status Register 18"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x14)
rgroup.long 0xC0D0++0x03
line.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
bitfld.long 0x00 31. " SPIS671 ,SPI Status Bit 671" "Low,High"
bitfld.long 0x00 30. "  SPIS670 ,SPI Status Bit 670" "Low,High"
bitfld.long 0x00 29. "  SPIS669 ,SPI Status Bit 669" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS668 ,SPI Status Bit 668" "Low,High"
bitfld.long 0x00 27. "  SPIS667 ,SPI Status Bit 667" "Low,High"
bitfld.long 0x00 26. "  SPIS666 ,SPI Status Bit 666" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS665 ,SPI Status Bit 665" "Low,High"
bitfld.long 0x00 24. "  SPIS664 ,SPI Status Bit 664" "Low,High"
bitfld.long 0x00 23. "  SPIS663 ,SPI Status Bit 663" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS662 ,SPI Status Bit 662" "Low,High"
bitfld.long 0x00 21. "  SPIS661 ,SPI Status Bit 661" "Low,High"
bitfld.long 0x00 20. "  SPIS660 ,SPI Status Bit 660" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS659 ,SPI Status Bit 659" "Low,High"
bitfld.long 0x00 18. "  SPIS658 ,SPI Status Bit 658" "Low,High"
bitfld.long 0x00 17. "  SPIS657 ,SPI Status Bit 657" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS656 ,SPI Status Bit 656" "Low,High"
bitfld.long 0x00 15. "  SPIS655 ,SPI Status Bit 655" "Low,High"
bitfld.long 0x00 14. "  SPIS654 ,SPI Status Bit 654" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS653 ,SPI Status Bit 653" "Low,High"
bitfld.long 0x00 12. "  SPIS652 ,SPI Status Bit 652" "Low,High"
bitfld.long 0x00 11. "  SPIS651 ,SPI Status Bit 651" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS650 ,SPI Status Bit 650" "Low,High"
bitfld.long 0x00 9. "  SPIS649 ,SPI Status Bit 649" "Low,High"
bitfld.long 0x00 8. "  SPIS648 ,SPI Status Bit 648" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS647 ,SPI Status Bit 647" "Low,High"
bitfld.long 0x00 6. "  SPIS646 ,SPI Status Bit 646" "Low,High"
bitfld.long 0x00 5. "  SPIS645 ,SPI Status Bit 645" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS644 ,SPI Status Bit 644" "Low,High"
bitfld.long 0x00 3. "  SPIS643 ,SPI Status Bit 643" "Low,High"
bitfld.long 0x00 2. "  SPIS642 ,SPI Status Bit 642" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS641 ,SPI Status Bit 641" "Low,High"
bitfld.long 0x00 0. "  SPIS640 ,SPI Status Bit 640" "Low,High"
else
hgroup.long 0xC0D0++0x03
hide.long 0x0 "GICD_SPISR19,Shared Peripheral Interrupt Status Register 19"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x15)
rgroup.long 0xC0D4++0x03
line.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
bitfld.long 0x00 31. " SPIS703 ,SPI Status Bit 703" "Low,High"
bitfld.long 0x00 30. "  SPIS702 ,SPI Status Bit 702" "Low,High"
bitfld.long 0x00 29. "  SPIS701 ,SPI Status Bit 701" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS700 ,SPI Status Bit 700" "Low,High"
bitfld.long 0x00 27. "  SPIS699 ,SPI Status Bit 699" "Low,High"
bitfld.long 0x00 26. "  SPIS698 ,SPI Status Bit 698" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS697 ,SPI Status Bit 697" "Low,High"
bitfld.long 0x00 24. "  SPIS696 ,SPI Status Bit 696" "Low,High"
bitfld.long 0x00 23. "  SPIS695 ,SPI Status Bit 695" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS694 ,SPI Status Bit 694" "Low,High"
bitfld.long 0x00 21. "  SPIS693 ,SPI Status Bit 693" "Low,High"
bitfld.long 0x00 20. "  SPIS692 ,SPI Status Bit 692" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS691 ,SPI Status Bit 691" "Low,High"
bitfld.long 0x00 18. "  SPIS690 ,SPI Status Bit 690" "Low,High"
bitfld.long 0x00 17. "  SPIS689 ,SPI Status Bit 689" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS688 ,SPI Status Bit 688" "Low,High"
bitfld.long 0x00 15. "  SPIS687 ,SPI Status Bit 687" "Low,High"
bitfld.long 0x00 14. "  SPIS686 ,SPI Status Bit 686" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS685 ,SPI Status Bit 685" "Low,High"
bitfld.long 0x00 12. "  SPIS684 ,SPI Status Bit 684" "Low,High"
bitfld.long 0x00 11. "  SPIS683 ,SPI Status Bit 683" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS682 ,SPI Status Bit 682" "Low,High"
bitfld.long 0x00 9. "  SPIS681 ,SPI Status Bit 681" "Low,High"
bitfld.long 0x00 8. "  SPIS680 ,SPI Status Bit 680" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS679 ,SPI Status Bit 679" "Low,High"
bitfld.long 0x00 6. "  SPIS678 ,SPI Status Bit 678" "Low,High"
bitfld.long 0x00 5. "  SPIS677 ,SPI Status Bit 677" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS676 ,SPI Status Bit 676" "Low,High"
bitfld.long 0x00 3. "  SPIS675 ,SPI Status Bit 675" "Low,High"
bitfld.long 0x00 2. "  SPIS674 ,SPI Status Bit 674" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS673 ,SPI Status Bit 673" "Low,High"
bitfld.long 0x00 0. "  SPIS672 ,SPI Status Bit 672" "Low,High"
else
hgroup.long 0xC0D4++0x03
hide.long 0x0 "GICD_SPISR20,Shared Peripheral Interrupt Status Register 20"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x16)
rgroup.long 0xC0D8++0x03
line.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
bitfld.long 0x00 31. " SPIS735 ,SPI Status Bit 735" "Low,High"
bitfld.long 0x00 30. "  SPIS734 ,SPI Status Bit 734" "Low,High"
bitfld.long 0x00 29. "  SPIS733 ,SPI Status Bit 733" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS732 ,SPI Status Bit 732" "Low,High"
bitfld.long 0x00 27. "  SPIS731 ,SPI Status Bit 731" "Low,High"
bitfld.long 0x00 26. "  SPIS730 ,SPI Status Bit 730" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS729 ,SPI Status Bit 729" "Low,High"
bitfld.long 0x00 24. "  SPIS728 ,SPI Status Bit 728" "Low,High"
bitfld.long 0x00 23. "  SPIS727 ,SPI Status Bit 727" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS726 ,SPI Status Bit 726" "Low,High"
bitfld.long 0x00 21. "  SPIS725 ,SPI Status Bit 725" "Low,High"
bitfld.long 0x00 20. "  SPIS724 ,SPI Status Bit 724" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS723 ,SPI Status Bit 723" "Low,High"
bitfld.long 0x00 18. "  SPIS722 ,SPI Status Bit 722" "Low,High"
bitfld.long 0x00 17. "  SPIS721 ,SPI Status Bit 721" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS720 ,SPI Status Bit 720" "Low,High"
bitfld.long 0x00 15. "  SPIS719 ,SPI Status Bit 719" "Low,High"
bitfld.long 0x00 14. "  SPIS718 ,SPI Status Bit 718" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS717 ,SPI Status Bit 717" "Low,High"
bitfld.long 0x00 12. "  SPIS716 ,SPI Status Bit 716" "Low,High"
bitfld.long 0x00 11. "  SPIS715 ,SPI Status Bit 715" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS714 ,SPI Status Bit 714" "Low,High"
bitfld.long 0x00 9. "  SPIS713 ,SPI Status Bit 713" "Low,High"
bitfld.long 0x00 8. "  SPIS712 ,SPI Status Bit 712" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS711 ,SPI Status Bit 711" "Low,High"
bitfld.long 0x00 6. "  SPIS710 ,SPI Status Bit 710" "Low,High"
bitfld.long 0x00 5. "  SPIS709 ,SPI Status Bit 709" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS708 ,SPI Status Bit 708" "Low,High"
bitfld.long 0x00 3. "  SPIS707 ,SPI Status Bit 707" "Low,High"
bitfld.long 0x00 2. "  SPIS706 ,SPI Status Bit 706" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS705 ,SPI Status Bit 705" "Low,High"
bitfld.long 0x00 0. "  SPIS704 ,SPI Status Bit 704" "Low,High"
else
hgroup.long 0xC0D8++0x03
hide.long 0x0 "GICD_SPISR21,Shared Peripheral Interrupt Status Register 21"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x17)
rgroup.long 0xC0DC++0x03
line.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
bitfld.long 0x00 31. " SPIS767 ,SPI Status Bit 767" "Low,High"
bitfld.long 0x00 30. "  SPIS766 ,SPI Status Bit 766" "Low,High"
bitfld.long 0x00 29. "  SPIS765 ,SPI Status Bit 765" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS764 ,SPI Status Bit 764" "Low,High"
bitfld.long 0x00 27. "  SPIS763 ,SPI Status Bit 763" "Low,High"
bitfld.long 0x00 26. "  SPIS762 ,SPI Status Bit 762" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS761 ,SPI Status Bit 761" "Low,High"
bitfld.long 0x00 24. "  SPIS760 ,SPI Status Bit 760" "Low,High"
bitfld.long 0x00 23. "  SPIS759 ,SPI Status Bit 759" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS758 ,SPI Status Bit 758" "Low,High"
bitfld.long 0x00 21. "  SPIS757 ,SPI Status Bit 757" "Low,High"
bitfld.long 0x00 20. "  SPIS756 ,SPI Status Bit 756" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS755 ,SPI Status Bit 755" "Low,High"
bitfld.long 0x00 18. "  SPIS754 ,SPI Status Bit 754" "Low,High"
bitfld.long 0x00 17. "  SPIS753 ,SPI Status Bit 753" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS752 ,SPI Status Bit 752" "Low,High"
bitfld.long 0x00 15. "  SPIS751 ,SPI Status Bit 751" "Low,High"
bitfld.long 0x00 14. "  SPIS750 ,SPI Status Bit 750" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS749 ,SPI Status Bit 749" "Low,High"
bitfld.long 0x00 12. "  SPIS748 ,SPI Status Bit 748" "Low,High"
bitfld.long 0x00 11. "  SPIS747 ,SPI Status Bit 747" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS746 ,SPI Status Bit 746" "Low,High"
bitfld.long 0x00 9. "  SPIS745 ,SPI Status Bit 745" "Low,High"
bitfld.long 0x00 8. "  SPIS744 ,SPI Status Bit 744" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS743 ,SPI Status Bit 743" "Low,High"
bitfld.long 0x00 6. "  SPIS742 ,SPI Status Bit 742" "Low,High"
bitfld.long 0x00 5. "  SPIS741 ,SPI Status Bit 741" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS740 ,SPI Status Bit 740" "Low,High"
bitfld.long 0x00 3. "  SPIS739 ,SPI Status Bit 739" "Low,High"
bitfld.long 0x00 2. "  SPIS738 ,SPI Status Bit 738" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS737 ,SPI Status Bit 737" "Low,High"
bitfld.long 0x00 0. "  SPIS736 ,SPI Status Bit 736" "Low,High"
else
hgroup.long 0xC0DC++0x03
hide.long 0x0 "GICD_SPISR22,Shared Peripheral Interrupt Status Register 22"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x18)
rgroup.long 0xC0E0++0x03
line.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
bitfld.long 0x00 31. " SPIS799 ,SPI Status Bit 799" "Low,High"
bitfld.long 0x00 30. "  SPIS798 ,SPI Status Bit 798" "Low,High"
bitfld.long 0x00 29. "  SPIS797 ,SPI Status Bit 797" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS796 ,SPI Status Bit 796" "Low,High"
bitfld.long 0x00 27. "  SPIS795 ,SPI Status Bit 795" "Low,High"
bitfld.long 0x00 26. "  SPIS794 ,SPI Status Bit 794" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS793 ,SPI Status Bit 793" "Low,High"
bitfld.long 0x00 24. "  SPIS792 ,SPI Status Bit 792" "Low,High"
bitfld.long 0x00 23. "  SPIS791 ,SPI Status Bit 791" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS790 ,SPI Status Bit 790" "Low,High"
bitfld.long 0x00 21. "  SPIS789 ,SPI Status Bit 789" "Low,High"
bitfld.long 0x00 20. "  SPIS788 ,SPI Status Bit 788" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS787 ,SPI Status Bit 787" "Low,High"
bitfld.long 0x00 18. "  SPIS786 ,SPI Status Bit 786" "Low,High"
bitfld.long 0x00 17. "  SPIS785 ,SPI Status Bit 785" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS784 ,SPI Status Bit 784" "Low,High"
bitfld.long 0x00 15. "  SPIS783 ,SPI Status Bit 783" "Low,High"
bitfld.long 0x00 14. "  SPIS782 ,SPI Status Bit 782" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS781 ,SPI Status Bit 781" "Low,High"
bitfld.long 0x00 12. "  SPIS780 ,SPI Status Bit 780" "Low,High"
bitfld.long 0x00 11. "  SPIS779 ,SPI Status Bit 779" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS778 ,SPI Status Bit 778" "Low,High"
bitfld.long 0x00 9. "  SPIS777 ,SPI Status Bit 777" "Low,High"
bitfld.long 0x00 8. "  SPIS776 ,SPI Status Bit 776" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS775 ,SPI Status Bit 775" "Low,High"
bitfld.long 0x00 6. "  SPIS774 ,SPI Status Bit 774" "Low,High"
bitfld.long 0x00 5. "  SPIS773 ,SPI Status Bit 773" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS772 ,SPI Status Bit 772" "Low,High"
bitfld.long 0x00 3. "  SPIS771 ,SPI Status Bit 771" "Low,High"
bitfld.long 0x00 2. "  SPIS770 ,SPI Status Bit 770" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS769 ,SPI Status Bit 769" "Low,High"
bitfld.long 0x00 0. "  SPIS768 ,SPI Status Bit 768" "Low,High"
else
hgroup.long 0xC0E0++0x03
hide.long 0x0 "GICD_SPISR23,Shared Peripheral Interrupt Status Register 23"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x19)
rgroup.long 0xC0E4++0x03
line.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
bitfld.long 0x00 31. " SPIS831 ,SPI Status Bit 831" "Low,High"
bitfld.long 0x00 30. "  SPIS830 ,SPI Status Bit 830" "Low,High"
bitfld.long 0x00 29. "  SPIS829 ,SPI Status Bit 829" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS828 ,SPI Status Bit 828" "Low,High"
bitfld.long 0x00 27. "  SPIS827 ,SPI Status Bit 827" "Low,High"
bitfld.long 0x00 26. "  SPIS826 ,SPI Status Bit 826" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS825 ,SPI Status Bit 825" "Low,High"
bitfld.long 0x00 24. "  SPIS824 ,SPI Status Bit 824" "Low,High"
bitfld.long 0x00 23. "  SPIS823 ,SPI Status Bit 823" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS822 ,SPI Status Bit 822" "Low,High"
bitfld.long 0x00 21. "  SPIS821 ,SPI Status Bit 821" "Low,High"
bitfld.long 0x00 20. "  SPIS820 ,SPI Status Bit 820" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS819 ,SPI Status Bit 819" "Low,High"
bitfld.long 0x00 18. "  SPIS818 ,SPI Status Bit 818" "Low,High"
bitfld.long 0x00 17. "  SPIS817 ,SPI Status Bit 817" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS816 ,SPI Status Bit 816" "Low,High"
bitfld.long 0x00 15. "  SPIS815 ,SPI Status Bit 815" "Low,High"
bitfld.long 0x00 14. "  SPIS814 ,SPI Status Bit 814" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS813 ,SPI Status Bit 813" "Low,High"
bitfld.long 0x00 12. "  SPIS812 ,SPI Status Bit 812" "Low,High"
bitfld.long 0x00 11. "  SPIS811 ,SPI Status Bit 811" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS810 ,SPI Status Bit 810" "Low,High"
bitfld.long 0x00 9. "  SPIS809 ,SPI Status Bit 809" "Low,High"
bitfld.long 0x00 8. "  SPIS808 ,SPI Status Bit 808" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS807 ,SPI Status Bit 807" "Low,High"
bitfld.long 0x00 6. "  SPIS806 ,SPI Status Bit 806" "Low,High"
bitfld.long 0x00 5. "  SPIS805 ,SPI Status Bit 805" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS804 ,SPI Status Bit 804" "Low,High"
bitfld.long 0x00 3. "  SPIS803 ,SPI Status Bit 803" "Low,High"
bitfld.long 0x00 2. "  SPIS802 ,SPI Status Bit 802" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS801 ,SPI Status Bit 801" "Low,High"
bitfld.long 0x00 0. "  SPIS800 ,SPI Status Bit 800" "Low,High"
else
hgroup.long 0xC0E4++0x03
hide.long 0x0 "GICD_SPISR24,Shared Peripheral Interrupt Status Register 24"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1A)
rgroup.long 0xC0E8++0x03
line.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
bitfld.long 0x00 31. " SPIS863 ,SPI Status Bit 863" "Low,High"
bitfld.long 0x00 30. "  SPIS862 ,SPI Status Bit 862" "Low,High"
bitfld.long 0x00 29. "  SPIS861 ,SPI Status Bit 861" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS860 ,SPI Status Bit 860" "Low,High"
bitfld.long 0x00 27. "  SPIS859 ,SPI Status Bit 859" "Low,High"
bitfld.long 0x00 26. "  SPIS858 ,SPI Status Bit 858" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS857 ,SPI Status Bit 857" "Low,High"
bitfld.long 0x00 24. "  SPIS856 ,SPI Status Bit 856" "Low,High"
bitfld.long 0x00 23. "  SPIS855 ,SPI Status Bit 855" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS854 ,SPI Status Bit 854" "Low,High"
bitfld.long 0x00 21. "  SPIS853 ,SPI Status Bit 853" "Low,High"
bitfld.long 0x00 20. "  SPIS852 ,SPI Status Bit 852" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS851 ,SPI Status Bit 851" "Low,High"
bitfld.long 0x00 18. "  SPIS850 ,SPI Status Bit 850" "Low,High"
bitfld.long 0x00 17. "  SPIS849 ,SPI Status Bit 849" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS848 ,SPI Status Bit 848" "Low,High"
bitfld.long 0x00 15. "  SPIS847 ,SPI Status Bit 847" "Low,High"
bitfld.long 0x00 14. "  SPIS846 ,SPI Status Bit 846" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS845 ,SPI Status Bit 845" "Low,High"
bitfld.long 0x00 12. "  SPIS844 ,SPI Status Bit 844" "Low,High"
bitfld.long 0x00 11. "  SPIS843 ,SPI Status Bit 843" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS842 ,SPI Status Bit 842" "Low,High"
bitfld.long 0x00 9. "  SPIS841 ,SPI Status Bit 841" "Low,High"
bitfld.long 0x00 8. "  SPIS840 ,SPI Status Bit 840" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS839 ,SPI Status Bit 839" "Low,High"
bitfld.long 0x00 6. "  SPIS838 ,SPI Status Bit 838" "Low,High"
bitfld.long 0x00 5. "  SPIS837 ,SPI Status Bit 837" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS836 ,SPI Status Bit 836" "Low,High"
bitfld.long 0x00 3. "  SPIS835 ,SPI Status Bit 835" "Low,High"
bitfld.long 0x00 2. "  SPIS834 ,SPI Status Bit 834" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS833 ,SPI Status Bit 833" "Low,High"
bitfld.long 0x00 0. "  SPIS832 ,SPI Status Bit 832" "Low,High"
else
hgroup.long 0xC0E8++0x03
hide.long 0x0 "GICD_SPISR25,Shared Peripheral Interrupt Status Register 25"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1B)
rgroup.long 0xC0EC++0x03
line.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
bitfld.long 0x00 31. " SPIS895 ,SPI Status Bit 895" "Low,High"
bitfld.long 0x00 30. "  SPIS894 ,SPI Status Bit 894" "Low,High"
bitfld.long 0x00 29. "  SPIS893 ,SPI Status Bit 893" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS892 ,SPI Status Bit 892" "Low,High"
bitfld.long 0x00 27. "  SPIS891 ,SPI Status Bit 891" "Low,High"
bitfld.long 0x00 26. "  SPIS890 ,SPI Status Bit 890" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS889 ,SPI Status Bit 889" "Low,High"
bitfld.long 0x00 24. "  SPIS888 ,SPI Status Bit 888" "Low,High"
bitfld.long 0x00 23. "  SPIS887 ,SPI Status Bit 887" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS886 ,SPI Status Bit 886" "Low,High"
bitfld.long 0x00 21. "  SPIS885 ,SPI Status Bit 885" "Low,High"
bitfld.long 0x00 20. "  SPIS884 ,SPI Status Bit 884" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS883 ,SPI Status Bit 883" "Low,High"
bitfld.long 0x00 18. "  SPIS882 ,SPI Status Bit 882" "Low,High"
bitfld.long 0x00 17. "  SPIS881 ,SPI Status Bit 881" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS880 ,SPI Status Bit 880" "Low,High"
bitfld.long 0x00 15. "  SPIS879 ,SPI Status Bit 879" "Low,High"
bitfld.long 0x00 14. "  SPIS878 ,SPI Status Bit 878" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS877 ,SPI Status Bit 877" "Low,High"
bitfld.long 0x00 12. "  SPIS876 ,SPI Status Bit 876" "Low,High"
bitfld.long 0x00 11. "  SPIS875 ,SPI Status Bit 875" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS874 ,SPI Status Bit 874" "Low,High"
bitfld.long 0x00 9. "  SPIS873 ,SPI Status Bit 873" "Low,High"
bitfld.long 0x00 8. "  SPIS872 ,SPI Status Bit 872" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS871 ,SPI Status Bit 871" "Low,High"
bitfld.long 0x00 6. "  SPIS870 ,SPI Status Bit 870" "Low,High"
bitfld.long 0x00 5. "  SPIS869 ,SPI Status Bit 869" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS868 ,SPI Status Bit 868" "Low,High"
bitfld.long 0x00 3. "  SPIS867 ,SPI Status Bit 867" "Low,High"
bitfld.long 0x00 2. "  SPIS866 ,SPI Status Bit 866" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS865 ,SPI Status Bit 865" "Low,High"
bitfld.long 0x00 0. "  SPIS864 ,SPI Status Bit 864" "Low,High"
else
hgroup.long 0xC0EC++0x03
hide.long 0x0 "GICD_SPISR26,Shared Peripheral Interrupt Status Register 26"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1C)
rgroup.long 0xC0F0++0x03
line.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
bitfld.long 0x00 31. " SPIS927 ,SPI Status Bit 927" "Low,High"
bitfld.long 0x00 30. "  SPIS926 ,SPI Status Bit 926" "Low,High"
bitfld.long 0x00 29. "  SPIS925 ,SPI Status Bit 925" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS924 ,SPI Status Bit 924" "Low,High"
bitfld.long 0x00 27. "  SPIS923 ,SPI Status Bit 923" "Low,High"
bitfld.long 0x00 26. "  SPIS922 ,SPI Status Bit 922" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS921 ,SPI Status Bit 921" "Low,High"
bitfld.long 0x00 24. "  SPIS920 ,SPI Status Bit 920" "Low,High"
bitfld.long 0x00 23. "  SPIS919 ,SPI Status Bit 919" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS918 ,SPI Status Bit 918" "Low,High"
bitfld.long 0x00 21. "  SPIS917 ,SPI Status Bit 917" "Low,High"
bitfld.long 0x00 20. "  SPIS916 ,SPI Status Bit 916" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS915 ,SPI Status Bit 915" "Low,High"
bitfld.long 0x00 18. "  SPIS914 ,SPI Status Bit 914" "Low,High"
bitfld.long 0x00 17. "  SPIS913 ,SPI Status Bit 913" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS912 ,SPI Status Bit 912" "Low,High"
bitfld.long 0x00 15. "  SPIS911 ,SPI Status Bit 911" "Low,High"
bitfld.long 0x00 14. "  SPIS910 ,SPI Status Bit 910" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS909 ,SPI Status Bit 909" "Low,High"
bitfld.long 0x00 12. "  SPIS908 ,SPI Status Bit 908" "Low,High"
bitfld.long 0x00 11. "  SPIS907 ,SPI Status Bit 907" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS906 ,SPI Status Bit 906" "Low,High"
bitfld.long 0x00 9. "  SPIS905 ,SPI Status Bit 905" "Low,High"
bitfld.long 0x00 8. "  SPIS904 ,SPI Status Bit 904" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS903 ,SPI Status Bit 903" "Low,High"
bitfld.long 0x00 6. "  SPIS902 ,SPI Status Bit 902" "Low,High"
bitfld.long 0x00 5. "  SPIS901 ,SPI Status Bit 901" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS900 ,SPI Status Bit 900" "Low,High"
bitfld.long 0x00 3. "  SPIS899 ,SPI Status Bit 899" "Low,High"
bitfld.long 0x00 2. "  SPIS898 ,SPI Status Bit 898" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS897 ,SPI Status Bit 897" "Low,High"
bitfld.long 0x00 0. "  SPIS896 ,SPI Status Bit 896" "Low,High"
else
hgroup.long 0xC0F0++0x03
hide.long 0x0 "GICD_SPISR27,Shared Peripheral Interrupt Status Register 27"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1D)
rgroup.long 0xC0F4++0x03
line.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
bitfld.long 0x00 31. " SPIS959 ,SPI Status Bit 959" "Low,High"
bitfld.long 0x00 30. "  SPIS958 ,SPI Status Bit 958" "Low,High"
bitfld.long 0x00 29. "  SPIS957 ,SPI Status Bit 957" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS956 ,SPI Status Bit 956" "Low,High"
bitfld.long 0x00 27. "  SPIS955 ,SPI Status Bit 955" "Low,High"
bitfld.long 0x00 26. "  SPIS954 ,SPI Status Bit 954" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS953 ,SPI Status Bit 953" "Low,High"
bitfld.long 0x00 24. "  SPIS952 ,SPI Status Bit 952" "Low,High"
bitfld.long 0x00 23. "  SPIS951 ,SPI Status Bit 951" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS950 ,SPI Status Bit 950" "Low,High"
bitfld.long 0x00 21. "  SPIS949 ,SPI Status Bit 949" "Low,High"
bitfld.long 0x00 20. "  SPIS948 ,SPI Status Bit 948" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS947 ,SPI Status Bit 947" "Low,High"
bitfld.long 0x00 18. "  SPIS946 ,SPI Status Bit 946" "Low,High"
bitfld.long 0x00 17. "  SPIS945 ,SPI Status Bit 945" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS944 ,SPI Status Bit 944" "Low,High"
bitfld.long 0x00 15. "  SPIS943 ,SPI Status Bit 943" "Low,High"
bitfld.long 0x00 14. "  SPIS942 ,SPI Status Bit 942" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS941 ,SPI Status Bit 941" "Low,High"
bitfld.long 0x00 12. "  SPIS940 ,SPI Status Bit 940" "Low,High"
bitfld.long 0x00 11. "  SPIS939 ,SPI Status Bit 939" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS938 ,SPI Status Bit 938" "Low,High"
bitfld.long 0x00 9. "  SPIS937 ,SPI Status Bit 937" "Low,High"
bitfld.long 0x00 8. "  SPIS936 ,SPI Status Bit 936" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS935 ,SPI Status Bit 935" "Low,High"
bitfld.long 0x00 6. "  SPIS934 ,SPI Status Bit 934" "Low,High"
bitfld.long 0x00 5. "  SPIS933 ,SPI Status Bit 933" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS932 ,SPI Status Bit 932" "Low,High"
bitfld.long 0x00 3. "  SPIS931 ,SPI Status Bit 931" "Low,High"
bitfld.long 0x00 2. "  SPIS930 ,SPI Status Bit 930" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS929 ,SPI Status Bit 929" "Low,High"
bitfld.long 0x00 0. "  SPIS928 ,SPI Status Bit 928" "Low,High"
else
hgroup.long 0xC0F4++0x03
hide.long 0x0 "GICD_SPISR28,Shared Peripheral Interrupt Status Register 28"
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x0000001F)>=0x1E)
rgroup.long 0xC0F8++0x03
line.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
bitfld.long 0x00 31. " SPIS991 ,SPI Status Bit 991" "Low,High"
bitfld.long 0x00 30. "  SPIS990 ,SPI Status Bit 990" "Low,High"
bitfld.long 0x00 29. "  SPIS989 ,SPI Status Bit 989" "Low,High"
textline "                               "
bitfld.long 0x00 28. " SPIS988 ,SPI Status Bit 988" "Low,High"
bitfld.long 0x00 27. "  SPIS987 ,SPI Status Bit 987" "Low,High"
bitfld.long 0x00 26. "  SPIS986 ,SPI Status Bit 986" "Low,High"
textline "                               "
bitfld.long 0x00 25. " SPIS985 ,SPI Status Bit 985" "Low,High"
bitfld.long 0x00 24. "  SPIS984 ,SPI Status Bit 984" "Low,High"
bitfld.long 0x00 23. "  SPIS983 ,SPI Status Bit 983" "Low,High"
textline "                               "
bitfld.long 0x00 22. " SPIS982 ,SPI Status Bit 982" "Low,High"
bitfld.long 0x00 21. "  SPIS981 ,SPI Status Bit 981" "Low,High"
bitfld.long 0x00 20. "  SPIS980 ,SPI Status Bit 980" "Low,High"
textline "                               "
bitfld.long 0x00 19. " SPIS979 ,SPI Status Bit 979" "Low,High"
bitfld.long 0x00 18. "  SPIS978 ,SPI Status Bit 978" "Low,High"
bitfld.long 0x00 17. "  SPIS977 ,SPI Status Bit 977" "Low,High"
textline "                               "
bitfld.long 0x00 16. " SPIS976 ,SPI Status Bit 976" "Low,High"
bitfld.long 0x00 15. "  SPIS975 ,SPI Status Bit 975" "Low,High"
bitfld.long 0x00 14. "  SPIS974 ,SPI Status Bit 974" "Low,High"
textline "                               "
bitfld.long 0x00 13. " SPIS973 ,SPI Status Bit 973" "Low,High"
bitfld.long 0x00 12. "  SPIS972 ,SPI Status Bit 972" "Low,High"
bitfld.long 0x00 11. "  SPIS971 ,SPI Status Bit 971" "Low,High"
textline "                               "
bitfld.long 0x00 10. " SPIS970 ,SPI Status Bit 970" "Low,High"
bitfld.long 0x00 9. "  SPIS969 ,SPI Status Bit 969" "Low,High"
bitfld.long 0x00 8. "  SPIS968 ,SPI Status Bit 968" "Low,High"
textline "                               "
bitfld.long 0x00 7. " SPIS967 ,SPI Status Bit 967" "Low,High"
bitfld.long 0x00 6. "  SPIS966 ,SPI Status Bit 966" "Low,High"
bitfld.long 0x00 5. "  SPIS965 ,SPI Status Bit 965" "Low,High"
textline "                               "
bitfld.long 0x00 4. " SPIS964 ,SPI Status Bit 964" "Low,High"
bitfld.long 0x00 3. "  SPIS963 ,SPI Status Bit 963" "Low,High"
bitfld.long 0x00 2. "  SPIS962 ,SPI Status Bit 962" "Low,High"
textline "                               "
bitfld.long 0x00 1. " SPIS961 ,SPI Status Bit 961" "Low,High"
bitfld.long 0x00 0. "  SPIS960 ,SPI Status Bit 960" "Low,High"
else
hgroup.long 0xC0F8++0x03
hide.long 0x0 "GICD_SPISR29,Shared Peripheral Interrupt Status Register 29"
endif
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICD_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICD_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICD_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Not Used,Used"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICD_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICD_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICD_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICD_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICD_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICD_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICD_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICD_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICD_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
base (COMP.BASE("GICD",-1.)+0x20000)
width 24.
tree "Interrupt Translation Service"
group.long 0x00++0x03
line.long 0x00 "GITS_CTLR,ITS Control Register"
rbitfld.long 0x00 31. "         QUIESCENT              ,Indicates completion of all ITS operations" "Not quiescent,Quiescent"
bitfld.long 0x00 0. "                      ENABLED                ,Controls whether the ITS is enabled" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GITS_IIDR,ITS Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID                 ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "                            VAR                    ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.long 0x00 12.--15. " REV                    ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                                 IMP                    ,Implementer"
if (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0x1000000000)==0x1000000000)&&(((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
bitfld.quad 0x00 32.--35. " CIDBITS                ,Number of Collection ID bits" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "                                 HCC                    ,Hardware Collection Count"
textline "                                         "
bitfld.quad 0x00 19. " PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
bitfld.quad 0x00 18. "  SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
textline "                                         "
bitfld.quad 0x00 13.--17. " DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "                                 ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
rbitfld.quad 0x00 4.--7. " ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x00 2. "                                 CCT                    ,Cumulative Collection Tables" "0,1"
elif (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0x1000000000)==0x1000000000)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
bitfld.quad 0x00 32.--35. " CIDBITS                ,Number of Collection ID bits minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.quad.byte 0x00 24.--31. 1. "                                 HCC                    ,Hardware Collection Count"
textline "                                         "
bitfld.quad 0x00 19. " PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
bitfld.quad 0x00 18. "  SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
textline "                                         "
bitfld.quad 0x00 13.--17. " DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.quad 0x00 8.--12. "                                 ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
rbitfld.quad 0x00 4.--7. " ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
elif (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0008))&0xFF000000)!=0x00)
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
hexmask.quad.byte 0x00 24.--31. 1. " HCC                    ,Hardware Collection Count"
bitfld.quad 0x00 19. "                                 PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
textline "                                         "
bitfld.quad 0x00 18. " SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "                     DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.quad 0x00 8.--12. " ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "                                 ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.quad 0x00 2. " CCT                    ,Cumulative Collection Tables" "0,1"
else
rgroup.quad 0x08++0x07
line.quad 0x00 "GITS_TYPER,ITS Type Register"
bitfld.quad 0x00 37. " VMOVP                  ,Indicates the form of the VMOVP command" "All ITSs,One ITS"
bitfld.quad 0x00 36. "                           CIL                    ,Collection ID Limit" "16-bit,GITS_TYPER.CIDBITS value"
textline "                                         "
hexmask.quad.byte 0x00 24.--31. 1. " HCC                    ,Hardware Collection Count"
bitfld.quad 0x00 19. "                                 PTA                    ,Indicates the format of the target address" "GICR_TYPER.PROCESSOR_NUMBER value,Base physical address"
textline "                                         "
bitfld.quad 0x00 18. " SEIS                   ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not suppported,Supported"
bitfld.quad 0x00 13.--17. "                     DEVBITS                ,The number of DeviceID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.quad 0x00 8.--12. " ID_BITS                ,The number of EventID bits implemented minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.quad 0x00 4.--7. "                                 ITT_ENTRY_SIZE         ,The number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.quad 0x80++0x07
line.quad 0x00 "GITS_CBASER,The command queue control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the command queue" "Not allocated,Allocated"
bitfld.quad 0x00 59.--61. "                      INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the command queue" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the command queue" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "    PHYSICAL_ADDRESS       ,Bits [51:12] of the base physical address of the command queue"
textline "                                         "
bitfld.quad 0x00 10.--11. " SHAREABILITY           ,Indicates the Shareability attributes of accesses to the command queue" "Non-shareable,Inner Shareable,Outer Shareable,?..."
hexmask.quad.byte 0x00 0.--7. 1. "                    SIZE                   ,The number of 4KB pages of physical memory allocated to the command queue minus one"
group.quad 0x88++0x7
line.quad 0x00 "GITS_CWRITER,The command queue write pointer"
hexmask.quad.word 0x00 5.--19. 0x20 " OFFSET                 ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "                               RETRY                  ,Restarts the processing of commands by the ITS if it stalled because of a command error" "No effect,Restarted"
group.quad 0x90++0x07
line.quad 0x00 "GITS_CREADR,The command queue read pointer"
hexmask.quad.word 0x00 5.--19. 0x20 " OFFSET                 ,Bits [19:5] of the offset from GITS_CBASER"
bitfld.quad 0x00 0. "                               STALLED                ,Reports whether the processing of commands is stalled because of a command error" "Not stalled,Stalled"
if (((per.q((COMP.BASE("GICD",-1.)+0x20000)+0x0100))&0x700000000000000)==0x00)
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "                      INDIRECT               ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
textline "                                         "
bitfld.quad 0x00 59.--61. " INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "    TYPE                   ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "    ENTRY_SIZE             ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
hexmask.quad 0x00 12.--47. 1. " PHYSICAL_ADDRESS       ,Physical Address"
bitfld.quad 0x00 10.--11. "                   SHAREABILITY           ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                         "
bitfld.quad 0x00 8.--9. " PAGE_SIZE              ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
else
group.quad 0x100++0x07
line.quad 0x00 "GITS_BASER0,ITS table control register"
bitfld.quad 0x00 63. " VALID                  ,Indicates whether software has allocated memory for the translation table" "Not allocated,Allocated"
bitfld.quad 0x00 62. "                      INDIRECT               ,This field indicates whether an implemented register specifies a single flat table or a two-level table where the first level contains a list of descriptors" "Single Level,Two Level"
textline "                                         "
bitfld.quad 0x00 59.--61. " INNERCACHE             ,Indicates the Inner Cacheability attributes of accesses to the table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
rbitfld.quad 0x00 56.--58. "    TYPE                   ,Specifies the type of entity that requires entries in the corresponding translation table" "Unimplemented,Devices,Reserved,Reserved,Interrupt collections,?..."
textline "                                         "
bitfld.quad 0x00 53.--55. " OUTERCACHE             ,Indicates the Outer Cacheability attributes of accesses to the table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
rbitfld.quad 0x00 48.--52. "    ENTRY_SIZE             ,Specifies the number of bytes per translation table entry minus one" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
hexmask.quad 0x00 12.--47. 0x10 " PHYSICAL_ADDRESS       ,Physical Address"
bitfld.quad 0x00 10.--11. "                   SHAREABILITY           ,Indicates the Shareability attributes of accesses to the table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                         "
bitfld.quad 0x00 8.--9. " PAGE_SIZE              ,The size of page that the translation table uses" "4KB,16KB,64KB,?..."
hexmask.quad.byte 0x00 0.--7. 1. "                               SIZE                   ,The number of pages of physical memory allocated to the table minus one"
endif
textline "                                         "
wgroup.long 0xC000++0x03
line.long 0x00 "GITS_TRKCTLR,Tracking Control Register"
bitfld.long 0x00 1. "         LPI_TRACK              ,Write 0b1 to capture information about the next interrupt that the ITS generated or failed to generate because of misprogramming" "No effect,Capture"
bitfld.long 0x00 0. "  CACHE_COUNT_RESET      ,Write 0b1 to reset the cache hit and miss counters in GITS_TRKICR and GITS_TRKLCR" "No effect,Reset"
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x1F)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 6. "         PID_OUT_OF_RANGE       ,Indicates that the LPI PID is larger than that allowed by the IDbits field in the GICR_PROPBASER" "0,1"
bitfld.long 0x00 5. "          TARGET_OUT_OF_RANGE    ,Indicates that target collection has not been successfully mapped using MAPC or that the target core does not have LPIs enabled in GICR_CTLR" "0,1"
textline "                                 "
bitfld.long 0x00 4. "         NO_TRANSLATION         ,Indicates that no valid MAPI or MAPVI has successfully been performed for this combination of input ID and Device ID" "0,1"
bitfld.long 0x00 3. "          INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
textline "                                 "
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0xF)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 4. "         NO_TRANSLATION         ,Indicates that no valid MAPI or MAPVI has successfully been performed for this combination of input ID and Device ID" "0,1"
bitfld.long 0x00 3. "          INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
textline "                                 "
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 3. "         INPUT_ID_OUT_OF_RANGE  ,Indicates that the input ID is larger than that allowed for that Device ID which is set during the MAPD command or it is larger than 65535" "0,1"
bitfld.long 0x00 2. "          DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
textline "                                 "
bitfld.long 0x00 1. "         DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
bitfld.long 0x00 0. "          LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
elif (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x3)==0x01)
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 2. "         DEVICE_ID_UNMAPPED     ,Indicates that no valid MAPD has successfully been performed for this Device ID" "0,1"
bitfld.long 0x00 1. "          DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
textline "                                 "
bitfld.long 0x00 0. "         LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
else
rgroup.long 0xC004++0x03
line.long 0x00 "GITS_TRKR,Tracking Status Register"
bitfld.long 0x00 1. "         DEVICE_ID_OUT_OF_RANGE ,Indicates that the Device ID is larger than that allowed by the Size and Page Size in GITS_BASER0 or larger than the number of Device IDs configured" "0,1"
bitfld.long 0x00 0. "          LPI_TRACKED            ,Indicates that the LPI tracking initiated by the LPI track bit in the GITS_TRKCTLR register is completed and the contents of the Debug Tracked registers are valid" "Not valid,Valid"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x01)==0x01)
rgroup.long 0xC008++0x03
line.long 0x00 "GITS_TRKDIDR,Debug Tracked DID Register"
hexmask.long.tbyte 0x00 0.--19. 1. "         LPI_DID                ,The Device ID for the interrupt that was tracked"
else
hgroup.long 0xC008++0x03
hide.long 0x00 "GITS_TRKDIDR,Debug Tracked DID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7F)==0x01)
rgroup.long 0xC00C++0x03
line.long 0x00 "GITS_TRKPIDR,Debug Tracked PID Register"
hexmask.long.word 0x00 0.--15. 1. "         LPI_PID                ,The ID after translation for an interrupt that was tracked and generated an LPI successfully"
else
hgroup.long 0xC00C++0x03
hide.long 0x00 "GITS_TRKPIDR,Debug Tracked PID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x01)==0x01)
rgroup.long 0xC010++0x03
line.long 0x00 "GITS_TRKVIDR,Debug Tracked ID Register"
hexmask.long.word 0x00 0.--15. 1. "         LPI_ID                 ,The ID before translation of the interrupt that was tracked"
else
hgroup.long 0xC010++0x03
hide.long 0x00 "GITS_TRKVIDR,Debug Tracked ID Register"
endif
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)+0xC004))&0x7F)==0x01)
rgroup.long 0xC014++0x03
line.long 0x00 "GITS_TRKTGTR,Debug Tracked Target Register"
hexmask.long.byte 0x00 0.--6. 1. "         LPI_TARGET_CORE        ,The target core for an interrupt that was tracked and generated an LPI successfully"
else
hgroup.long 0xC014++0x03
hide.long 0x00 "GITS_TRKTGTR,Debug Tracked Target Register"
endif
rgroup.long 0xC018++0x03
line.long 0x00 "GITS_TRKICR,Debug ITE Cache Statistics"
hexmask.long.word 0x00 16.--31. 1. "         ITE_CACHE_HITS         ,Number of hits in the ITE cache"
hexmask.long.word 0x00 0.--15. 1. "       ITE_CACHE_MISSES       ,Number of misses in the ITE cache"
rgroup.long 0xC01C++0x03
line.long 0x00 "GITS_TRKLCR,Debug LPI Cache Statistics"
hexmask.long.word 0x00 16.--31. 1. "         LPI_CACHE_HITS         ,Number of hits in the LPI cache"
hexmask.long.word 0x00 0.--15. 1. "       LPI_CACHE_MISSES       ,Number of misses in the LPI cache"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GITS_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "         PART_0                 ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GITS_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. "         DES_1                  ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         PART_1                 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GITS_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. "         ARCHREV                ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "   JEDEC                  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
textline "                                 "
bitfld.long 0x00 0.--2. "         DES_1                  ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GITS_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. "         REVAND                 ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         CMOD                   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GITS_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. "         SIZE                   ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "         DES_2                  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GITS_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GITS_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GITS_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GITS_CIDR0,Component ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GITS_CIDR1,Component ID1 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GITS_CIDR2,Component ID2 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GITS_CIDR3,Component ID3 Register"
hexmask.long.byte 0x00 0.--7. 1. "         FIXVAL                 ,ARM-defined fixed values for the preamble for component discovery"
textline "                                 "
base (COMP.BASE("GICD",-1.)+0x20000)+0x10000
if (((per.l((COMP.BASE("GICD",-1.)+0x20000)))&0x01)==0x01)
wgroup.long 0x40++0x03
line.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
else
hgroup.long 0x40++0x03
hide.long 0x00 "GITS_TRANSLATER,ITS Translation Register"
endif
tree.end
width 0x0B
base COMP.BASE("GICR",-1.)
width 17.
tree "Redistributor Interface"
tree "Control Registers"
if (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x21)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
textline "                                  "
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x20)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 26. "       DPG1S          ,Disable Processor selection for Group 1 Secure interrupts" "No,Yes"
bitfld.long 0x00 25. "             DPG1NS           ,Disable Processor selection for Group 1 Non-secure interrupts" "No,Yes"
textline "                                  "
bitfld.long 0x00 24. " DPG0      ,Disable Processor selection for Group 0 interrupts" "No,Yes"
bitfld.long 0x00 3. "               RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
elif (((per.q(COMP.BASE("GICR",-1.)+0x08))&0x21)==0x01)
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
bitfld.long 0x00 0. "     ENABLE_LPIS      ,Enables LPIs in implementations where affinity routing is enabled for Security state" "Disabled,Enabled"
else
group.long 0x0000++0x03
line.long 0x00 "GICR_CTLR,Redistributor Control Register"
rbitfld.long 0x00 31. "         UWP       ,Upstream Write Pending. Indicates whether all upstream writes have been communicated to the Distributor" "Not pending,Pending"
bitfld.long 0x00 3. "       RWP            ,Register Write Pending. Indicates whether a register write for the current Security state is in progress or not" "Not pending,Pending"
endif
rgroup.long 0x0004++0x03
line.long 0x00 "GICR_IIDR,Distributor Implementer Identification Register"
bitfld.long 0x00 24.--31. "         PRODID    ,Indicates the product ID" "GIC-500,?..."
bitfld.long 0x00 16.--19. "           VAR            ,Major revison number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                  "
bitfld.long 0x00 12.--15. " REV       ,Minor revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "                IMP            ,Implementer"
rgroup.quad 0x0008++0x07
line.quad 0x00 "GICR_TYPER,Interrupt Controller Type Register"
hexmask.quad.byte 0x00 56.--63. 1. " AFF3      ,Affinity level 3 value for the Redistributor"
hexmask.quad.byte 0x00 48.--55. 1. "                AFF2           ,Affinity level 2 value for the Redistributor"
hexmask.quad.byte 0x00 40.--47. 1. "              AFF1             ,Affinity level 1 value for the Redistributor"
textline "                                  "
hexmask.quad.byte 0x00 32.--39. 1. " AFF0      ,Affinity level 0 value for the Redistributor"
bitfld.quad 0x00 24.--25. "                COMMONLPIAFF   ,The affinity level at which Redistributors share a LPI Configuration table" "All levels,AFF3,AFF3/AFF2,AFF3/AFF2/AFF1"
hexmask.quad.word 0x00 8.--23. 1. "  PROCESSOR_NUMBER ,A unique identifier for the PE"
textline "                                  "
bitfld.quad 0x00 5. " DPGS      ,Sets support for GICR_CTLR.DPG* bits" "Not supported,Supported"
bitfld.quad 0x00 4. "     LAST           ,Indicates whether this Redistributor is the highest-numbered Redistributor in a series of contiguous Redistributor pages" "Not highest,Highest"
bitfld.quad 0x00 3. "     DIRECTLPI        ,Indicates whether this Redistributor supports direct injection of LPIs" "Not supported,Supported"
textline "                                  "
bitfld.quad 0x00 0. " PLPIS     ,Indicates whether the GIC implementation supports physical LPIs" "Not supported,Supported"
if ((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x00)||((((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x0014))))
group.long 0x0014++0x03
line.long 0x00 "GICR_WAKER,Power Management Control Register"
bitfld.long 0x00 31. "         QUIESCENT ,This bit shows that the GIC-500 is idle and can be powered down if required" "Not quiescent,Quiescent"
bitfld.long 0x00 2. "     CHILDRENASLEEP ,Indicates the bus between the CPU interface and this Redistributor is quiescent" "Not quiescent,Quiescent"
bitfld.long 0x00 1. "   PROCESSORASLEEP  ,Indicates if this Redistributor must assert a WakeRequest if there is a pending interrupt targeted at the connected core" "No,Yes"
textline "                                  "
bitfld.long 0x00 0. " SLEEP     ,Indicates if GIC-500 ensures that all the caches are consistent with external memory and that it is safe to power off" "No,Yes"
textline "                                  "
else
hgroup.long 0x0014++0x03
hide.long 0x00 "GICR_WAKER,Power Management Control Register"
endif
group.quad 0x070++0x07
line.quad 0x00 "GICR_PROPBASER,Common LPI configuration table base register"
bitfld.quad 0x00 56.--58. " OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Configuration table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
hexmask.quad 0x00 12.--51. 0x10 "  PHYSICAL_ADDRESS ,Bits [51:12] of the physical address containing the LPI Configuration table"
textline "                                  "
bitfld.quad 0x00 10.--11. " SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Configuration table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
bitfld.quad 0x00 7.--9. "                  INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Configuration table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                  "
bitfld.quad 0x00 0.--4. " IDBITS           ,The number of bits of LPI INTID supported minus one by the LPI Configuration table starting at Physical_Address"
group.quad 0x78++0x07
line.quad 0x00 "GICR_PENDBASER,LPI pending table base register"
bitfld.quad 0x00 62. "         PTZ              ,Pending Table Zero" "Not zero,Zero" 
bitfld.quad 0x00 56.--58. "                         OUTERCACHE       ,Indicates the Outer Cacheability attributes of accesses to the LPI Pending table" "Defined in INNERCACHE,Normal outer non-cacheable,Normal outer RA WT cacheable,Normal outer RA WB cacheable,Normal outer WA WT cacheable,Normal outer WA WB cacheable,Normal outer RA WA WT cacheable,Normal outer RA WA WB cacheable"
textline "                                  "
hexmask.quad 0x00 16.--51. 0x10 " PHYSICAL_ADDRESS ,Bits [51:16] of the physical address containing the LPI Pending table"
bitfld.quad 0x00 10.--11. "                 SHAREABILITY     ,Indicates the Shareability attributes of accesses to the LPI Pending table" "Non-shareable,Inner Shareable,Outer Shareable,?..."
textline "                                  "
bitfld.quad 0x00 7.--9. " INNERCACHE       ,Indicates the Inner Cacheability attributes of accesses to the LPI Pending table" "Device-nGnRnE,Normal inner non-cacheable,Normal inner RA WT cacheable,Normal inner RA WB cacheable,Normal inner WA WT cacheable,Normal inner WA WB cacheable,Normal inner RA WA WT cacheable,Normal inner RA WA WB cacheable"
textline "                                 "
tree.end
tree "SGI and PPI Registers"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10080))
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Secure,Non-secure Group 1"
bitfld.long 0x00 30. "  GSB30 ,Group Status Bit 30" "Secure,Non-secure Group 1"
bitfld.long 0x00 29. "  GSB29 ,Group Status Bit 29" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Secure,Non-secure Group 1"
bitfld.long 0x00 27. "  GSB27 ,Group Status Bit 27" "Secure,Non-secure Group 1"
bitfld.long 0x00 26. "  GSB26 ,Group Status Bit 26" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Secure,Non-secure Group 1"
bitfld.long 0x00 24. "  GSB24 ,Group Status Bit 24" "Secure,Non-secure Group 1"
bitfld.long 0x00 23. "  GSB23 ,Group Status Bit 23" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Secure,Non-secure Group 1"
bitfld.long 0x00 21. "  GSB21 ,Group Status Bit 21" "Secure,Non-secure Group 1"
bitfld.long 0x00 20. "  GSB20 ,Group Status Bit 20" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Secure,Non-secure Group 1"
bitfld.long 0x00 18. "  GSB18 ,Group Status Bit 18" "Secure,Non-secure Group 1"
bitfld.long 0x00 17. "  GSB17 ,Group Status Bit 17" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Secure,Non-secure Group 1"
bitfld.long 0x00 15. "  GSB15 ,Group Status Bit 15" "Secure,Non-secure Group 1"
bitfld.long 0x00 14. "  GSB14 ,Group Status Bit 14" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Secure,Non-secure Group 1"
bitfld.long 0x00 12. "  GSB12 ,Group Status Bit 12" "Secure,Non-secure Group 1"
bitfld.long 0x00 11. "  GSB11 ,Group Status Bit 11" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Secure,Non-secure Group 1"
bitfld.long 0x00 9. "  GSB9  ,Group Status Bit 9" "Secure,Non-secure Group 1"
bitfld.long 0x00 8. "  GSB8  ,Group Status Bit 8" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Secure,Non-secure Group 1"
bitfld.long 0x00 6. "  GSB6  ,Group Status Bit 6" "Secure,Non-secure Group 1"
bitfld.long 0x00 5. "  GSB5  ,Group Status Bit 5" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Secure,Non-secure Group 1"
bitfld.long 0x00 3. "  GSB3  ,Group Status Bit 3" "Secure,Non-secure Group 1"
bitfld.long 0x00 2. "  GSB2  ,Group Status Bit 2" "Secure,Non-secure Group 1"
textline "                          "
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Secure,Non-secure Group 1"
bitfld.long 0x00 0. "  GSB0  ,Group Status Bit 0" "Secure,Non-secure Group 1"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x000)
group.long 0x10080++0x03
line.long 0x0 "GICR_IGROUPR0,Interrupt Group Register 0"
bitfld.long 0x00 31. "         GSB31 ,Group Status Bit 31" "Group 0,Group 1"
bitfld.long 0x00 30. "             GSB30 ,Group Status Bit 30" "Group 0,Group 1"
bitfld.long 0x00 29. "             GSB29 ,Group Status Bit 29" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 28. "         GSB28 ,Group Status Bit 28" "Group 0,Group 1"
bitfld.long 0x00 27. "             GSB27 ,Group Status Bit 27" "Group 0,Group 1"
bitfld.long 0x00 26. "             GSB26 ,Group Status Bit 26" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 25. "         GSB25 ,Group Status Bit 25" "Group 0,Group 1"
bitfld.long 0x00 24. "             GSB24 ,Group Status Bit 24" "Group 0,Group 1"
bitfld.long 0x00 23. "             GSB23 ,Group Status Bit 23" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 22. "         GSB22 ,Group Status Bit 22" "Group 0,Group 1"
bitfld.long 0x00 21. "             GSB21 ,Group Status Bit 21" "Group 0,Group 1"
bitfld.long 0x00 20. "             GSB20 ,Group Status Bit 20" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 19. "         GSB19 ,Group Status Bit 19" "Group 0,Group 1"
bitfld.long 0x00 18. "             GSB18 ,Group Status Bit 18" "Group 0,Group 1"
bitfld.long 0x00 17. "             GSB17 ,Group Status Bit 17" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 16. "         GSB16 ,Group Status Bit 16" "Group 0,Group 1"
bitfld.long 0x00 15. "             GSB15 ,Group Status Bit 15" "Group 0,Group 1"
bitfld.long 0x00 14. "             GSB14 ,Group Status Bit 14" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 13. "         GSB13 ,Group Status Bit 13" "Group 0,Group 1"
bitfld.long 0x00 12. "             GSB12 ,Group Status Bit 12" "Group 0,Group 1"
bitfld.long 0x00 11. "             GSB11 ,Group Status Bit 11" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 10. "         GSB10 ,Group Status Bit 10" "Group 0,Group 1"
bitfld.long 0x00 9. "             GSB9  ,Group Status Bit 9" "Group 0,Group 1"
bitfld.long 0x00 8. "             GSB8  ,Group Status Bit 8" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 7. "         GSB7  ,Group Status Bit 7" "Group 0,Group 1"
bitfld.long 0x00 6. "             GSB6  ,Group Status Bit 6" "Group 0,Group 1"
bitfld.long 0x00 5. "             GSB5  ,Group Status Bit 5" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 4. "         GSB4  ,Group Status Bit 4" "Group 0,Group 1"
bitfld.long 0x00 3. "             GSB3  ,Group Status Bit 3" "Group 0,Group 1"
bitfld.long 0x00 2. "             GSB2  ,Group Status Bit 2" "Group 0,Group 1"
textline "                          "
bitfld.long 0x00 1. "         GSB1  ,Group Status Bit 1" "Group 0,Group 1"
bitfld.long 0x00 0. "             GSB0  ,Group Status Bit 0" "Group 0,Group 1"
else
hgroup.long 0x10080++0x03
hide.long 0x00 "GICR_IGROUPR0,Interrupt Group Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
textline "                          "
width 24.
group.long 0x10100++0x03
line.long 0x0 "GICR_SET/CLR_ENABLER0,Interrupt Set/Clear Enable Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRENB31    ,Set/Clear Enable Bit 31" "Disabled,Enabled"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRENB30    ,Set/Clear Enable Bit 30" "Disabled,Enabled"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRENB29    ,Set/Clear Enable Bit 29" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRENB28    ,Set/Clear Enable Bit 28" "Disabled,Enabled"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRENB27    ,Set/Clear Enable Bit 27" "Disabled,Enabled"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRENB26    ,Set/Clear Enable Bit 26" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRENB25    ,Set/Clear Enable Bit 25" "Disabled,Enabled"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRENB24    ,Set/Clear Enable Bit 24" "Disabled,Enabled"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRENB23    ,Set/Clear Enable Bit 23" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRENB22    ,Set/Clear Enable Bit 22" "Disabled,Enabled"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRENB21    ,Set/Clear Enable Bit 21" "Disabled,Enabled"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRENB20    ,Set/Clear Enable Bit 20" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRENB19    ,Set/Clear Enable Bit 19" "Disabled,Enabled"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRENB18    ,Set/Clear Enable Bit 18" "Disabled,Enabled"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRENB17    ,Set/Clear Enable Bit 17" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRENB16    ,Set/Clear Enable Bit 16" "Disabled,Enabled"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRENB15    ,Set/Clear Enable Bit 15" "Disabled,Enabled"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRENB14    ,Set/Clear Enable Bit 14" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRENB13    ,Set/Clear Enable Bit 13" "Disabled,Enabled"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRENB12    ,Set/Clear Enable Bit 12" "Disabled,Enabled"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRENB11    ,Set/Clear Enable Bit 11" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRENB10    ,Set/Clear Enable Bit 10" "Disabled,Enabled"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRENB9     ,Set/Clear Enable Bit 9" "Disabled,Enabled"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRENB8     ,Set/Clear Enable Bit 8" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRENB7     ,Set/Clear Enable Bit 7" "Disabled,Enabled"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRENB6     ,Set/Clear Enable Bit 6" "Disabled,Enabled"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRENB5     ,Set/Clear Enable Bit 5" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRENB4     ,Set/Clear Enable Bit 4" "Disabled,Enabled"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRENB3     ,Set/Clear Enable Bit 3" "Disabled,Enabled"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRENB2     ,Set/Clear Enable Bit 2" "Disabled,Enabled"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRENB1     ,Set/Clear Enable Bit 1" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRENB0     ,Set/Clear Enable Bit 0" "Disabled,Enabled"
group.long 0x10200++0x03
line.long 0x0 "GICR_SET/CLR_PENDR0,Interrupt Set/Clear Pending Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRPEND31   ,Set/Clear Pending Bit 31" "Not pending,Pending"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "    SET/CLRPEND30   ,Set/Clear Pending Bit 30" "Not pending,Pending"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "    SET/CLRPEND29   ,Set/Clear Pending Bit 29" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRPEND28   ,Set/Clear Pending Bit 28" "Not pending,Pending"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "    SET/CLRPEND27   ,Set/Clear Pending Bit 27" "Not pending,Pending"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "    SET/CLRPEND26   ,Set/Clear Pending Bit 26" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRPEND25   ,Set/Clear Pending Bit 25" "Not pending,Pending"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "    SET/CLRPEND24   ,Set/Clear Pending Bit 24" "Not pending,Pending"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "    SET/CLRPEND23   ,Set/Clear Pending Bit 23" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRPEND22   ,Set/Clear Pending Bit 22" "Not pending,Pending"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "    SET/CLRPEND21   ,Set/Clear Pending Bit 21" "Not pending,Pending"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "    SET/CLRPEND20   ,Set/Clear Pending Bit 20" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRPEND19   ,Set/Clear Pending Bit 19" "Not pending,Pending"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "    SET/CLRPEND18   ,Set/Clear Pending Bit 18" "Not pending,Pending"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "    SET/CLRPEND17   ,Set/Clear Pending Bit 17" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRPEND16   ,Set/Clear Pending Bit 16" "Not pending,Pending"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "    SET/CLRPEND15   ,Set/Clear Pending Bit 15" "Not pending,Pending"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "    SET/CLRPEND14   ,Set/Clear Pending Bit 14" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRPEND13   ,Set/Clear Pending Bit 13" "Not pending,Pending"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "    SET/CLRPEND12   ,Set/Clear Pending Bit 12" "Not pending,Pending"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "    SET/CLRPEND11   ,Set/Clear Pending Bit 11" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRPEND10   ,Set/Clear Pending Bit 10" "Not pending,Pending"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "    SET/CLRPEND9    ,Set/Clear Pending Bit 9" "Not pending,Pending"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "    SET/CLRPEND8    ,Set/Clear Pending Bit 8" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRPEND7    ,Set/Clear Pending Bit 7" "Not pending,Pending"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "    SET/CLRPEND6    ,Set/Clear Pending Bit 6" "Not pending,Pending"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "    SET/CLRPEND5    ,Set/Clear Pending Bit 5" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRPEND4    ,Set/Clear Pending Bit 4" "Not pending,Pending"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "    SET/CLRPEND3    ,Set/Clear Pending Bit 3" "Not pending,Pending"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "    SET/CLRPEND2    ,Set/Clear Pending Bit 2" "Not pending,Pending"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRPEND1    ,Set/Clear Pending Bit 1" "Not pending,Pending"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "    SET/CLRPEND0    ,Set/Clear Pending Bit 0" "Not pending,Pending"
group.long 0x10300++0x03
line.long 0x0 "GICR_SET/CLR_ACTIVER0,Interrupt Set/Clear Active Register 0"
setclrfld.long 0x00 31. 0x00 31. 0x80 31. "  SET/CLRACTIVE31 ,Set/Clear Active Bit 31" "Not active,Active"
setclrfld.long 0x00 30. 0x00 30. 0x80 30. "  SET/CLRACTIVE30 ,Set/Clear Active Bit 30" "Not active,Active"
setclrfld.long 0x00 29. 0x00 29. 0x80 29. "  SET/CLRACTIVE29 ,Set/Clear Active Bit 29" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 28. 0x00 28. 0x80 28. "  SET/CLRACTIVE28 ,Set/Clear Active Bit 28" "Not active,Active"
setclrfld.long 0x00 27. 0x00 27. 0x80 27. "  SET/CLRACTIVE27 ,Set/Clear Active Bit 27" "Not active,Active"
setclrfld.long 0x00 26. 0x00 26. 0x80 26. "  SET/CLRACTIVE26 ,Set/Clear Active Bit 26" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 25. 0x00 25. 0x80 25. "  SET/CLRACTIVE25 ,Set/Clear Active Bit 25" "Not active,Active"
setclrfld.long 0x00 24. 0x00 24. 0x80 24. "  SET/CLRACTIVE24 ,Set/Clear Active Bit 24" "Not active,Active"
setclrfld.long 0x00 23. 0x00 23. 0x80 23. "  SET/CLRACTIVE23 ,Set/Clear Active Bit 23" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 22. 0x00 22. 0x80 22. "  SET/CLRACTIVE22 ,Set/Clear Active Bit 22" "Not active,Active"
setclrfld.long 0x00 21. 0x00 21. 0x80 21. "  SET/CLRACTIVE21 ,Set/Clear Active Bit 21" "Not active,Active"
setclrfld.long 0x00 20. 0x00 20. 0x80 20. "  SET/CLRACTIVE20 ,Set/Clear Active Bit 20" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 19. 0x00 19. 0x80 19. "  SET/CLRACTIVE19 ,Set/Clear Active Bit 19" "Not active,Active"
setclrfld.long 0x00 18. 0x00 18. 0x80 18. "  SET/CLRACTIVE18 ,Set/Clear Active Bit 18" "Not active,Active"
setclrfld.long 0x00 17. 0x00 17. 0x80 17. "  SET/CLRACTIVE17 ,Set/Clear Active Bit 17" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 16. 0x00 16. 0x80 16. "  SET/CLRACTIVE16 ,Set/Clear Active Bit 16" "Not active,Active"
setclrfld.long 0x00 15. 0x00 15. 0x80 15. "  SET/CLRACTIVE15 ,Set/Clear Active Bit 15" "Not active,Active"
setclrfld.long 0x00 14. 0x00 14. 0x80 14. "  SET/CLRACTIVE14 ,Set/Clear Active Bit 14" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 13. 0x00 13. 0x80 13. "  SET/CLRACTIVE13 ,Set/Clear Active Bit 13" "Not active,Active"
setclrfld.long 0x00 12. 0x00 12. 0x80 12. "  SET/CLRACTIVE12 ,Set/Clear Active Bit 12" "Not active,Active"
setclrfld.long 0x00 11. 0x00 11. 0x80 11. "  SET/CLRACTIVE11 ,Set/Clear Active Bit 11" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 10. 0x00 10. 0x80 10. "  SET/CLRACTIVE10 ,Set/Clear Active Bit 10" "Not active,Active"
setclrfld.long 0x00 9. 0x00 9. 0x80 9. "  SET/CLRACTIVE9  ,Set/Clear Active Bit 9" "Not active,Active"
setclrfld.long 0x00 8. 0x00 8. 0x80 8. "  SET/CLRACTIVE8  ,Set/Clear Active Bit 8" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 7. 0x00 7. 0x80 7. "  SET/CLRACTIVE7  ,Set/Clear Active Bit 7" "Not active,Active"
setclrfld.long 0x00 6. 0x00 6. 0x80 6. "  SET/CLRACTIVE6  ,Set/Clear Active Bit 6" "Not active,Active"
setclrfld.long 0x00 5. 0x00 5. 0x80 5. "  SET/CLRACTIVE5  ,Set/Clear Active Bit 5" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 4. 0x00 4. 0x80 4. "  SET/CLRACTIVE4  ,Set/Clear Active Bit 4" "Not active,Active"
setclrfld.long 0x00 3. 0x00 3. 0x80 3. "  SET/CLRACTIVE3  ,Set/Clear Active Bit 3" "Not active,Active"
setclrfld.long 0x00 2. 0x00 2. 0x80 2. "  SET/CLRACTIVE2  ,Set/Clear Active Bit 2" "Not active,Active"
textline "                                 "
setclrfld.long 0x00 1. 0x00 1. 0x80 1. "  SET/CLRACTIVE1  ,Set/Clear Active Bit 1" "Not active,Active"
setclrfld.long 0x00 0. 0x00 0. 0x80 0. "  SET/CLRACTIVE0  ,Set/Clear Active Bit 0" "Not active,Active"
textline "                                 "
width 18.
group.long 0x10400++0x03
line.long 0x00 "GICR_IPRIORITYR0,Interrupt Priority Register 0"
hexmask.long.byte 0x00 24.--31. 1. " INTID3    ,Interrupt ID3    Priority/Priority Byte Offset 3   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID2    ,Interrupt ID2    Priority/Priority Byte Offset 2   "
hexmask.long.byte 0x00 8.--15. 1. "     INTID1    ,Interrupt ID1    Priority/Priority Byte Offset 1   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID0    ,Interrupt ID0    Priority/Priority Byte Offset 0   "
group.long 0x10404++0x03
line.long 0x00 "GICR_IPRIORITYR1,Interrupt Priority Register 1"
hexmask.long.byte 0x00 24.--31. 1. " INTID7    ,Interrupt ID7    Priority/Priority Byte Offset 7   "
hexmask.long.byte 0x00 16.--23. 1. "     INTID6    ,Interrupt ID6    Priority/Priority Byte Offset 6   "
hexmask.long.byte 0x00 8.--15. 1. "     INTID5    ,Interrupt ID5    Priority/Priority Byte Offset 5   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID4    ,Interrupt ID4    Priority/Priority Byte Offset 4   "
group.long 0x10408++0x03
line.long 0x00 "GICR_IPRIORITYR2,Interrupt Priority Register 2"
hexmask.long.byte 0x00 24.--31. 1. " INTID11   ,Interrupt ID11   Priority/Priority Byte Offset 11  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID10   ,Interrupt ID10   Priority/Priority Byte Offset 10  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID9    ,Interrupt ID9    Priority/Priority Byte Offset 9   "
hexmask.long.byte 0x00 0.--7. 1. "     INTID8    ,Interrupt ID8    Priority/Priority Byte Offset 8   "
group.long 0x1040C++0x03
line.long 0x00 "GICR_IPRIORITYR3,Interrupt Priority Register 3"
hexmask.long.byte 0x00 24.--31. 1. " INTID15   ,Interrupt ID15   Priority/Priority Byte Offset 15  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID14   ,Interrupt ID14   Priority/Priority Byte Offset 14  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID13   ,Interrupt ID13   Priority/Priority Byte Offset 13  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID12   ,Interrupt ID12   Priority/Priority Byte Offset 12  "
group.long 0x10410++0x03
line.long 0x00 "GICR_IPRIORITYR4,Interrupt Priority Register 4"
hexmask.long.byte 0x00 24.--31. 1. " INTID19   ,Interrupt ID19   Priority/Priority Byte Offset 19  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID18   ,Interrupt ID18   Priority/Priority Byte Offset 18  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID17   ,Interrupt ID17   Priority/Priority Byte Offset 17  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID16   ,Interrupt ID16   Priority/Priority Byte Offset 16  "
group.long 0x10414++0x03
line.long 0x00 "GICR_IPRIORITYR5,Interrupt Priority Register 5"
hexmask.long.byte 0x00 24.--31. 1. " INTID23   ,Interrupt ID23   Priority/Priority Byte Offset 23  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID22   ,Interrupt ID22   Priority/Priority Byte Offset 22  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID21   ,Interrupt ID21   Priority/Priority Byte Offset 21  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID20   ,Interrupt ID20   Priority/Priority Byte Offset 20  "
group.long 0x10418++0x03
line.long 0x00 "GICR_IPRIORITYR6,Interrupt Priority Register 6"
hexmask.long.byte 0x00 24.--31. 1. " INTID27   ,Interrupt ID27   Priority/Priority Byte Offset 27  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID26   ,Interrupt ID26   Priority/Priority Byte Offset 26  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID25   ,Interrupt ID25   Priority/Priority Byte Offset 25  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID24   ,Interrupt ID24   Priority/Priority Byte Offset 24  "
group.long 0x1041C++0x03
line.long 0x00 "GICR_IPRIORITYR7,Interrupt Priority Register 7"
hexmask.long.byte 0x00 24.--31. 1. " INTID31   ,Interrupt ID31   Priority/Priority Byte Offset 31  "
hexmask.long.byte 0x00 16.--23. 1. "     INTID30   ,Interrupt ID30   Priority/Priority Byte Offset 30  "
hexmask.long.byte 0x00 8.--15. 1. "     INTID29   ,Interrupt ID29   Priority/Priority Byte Offset 29  "
hexmask.long.byte 0x00 0.--7. 1. "     INTID28   ,Interrupt ID28   Priority/Priority Byte Offset 28  "
textline "                                 "
rgroup.long 0x10C00++0x03
line.long 0x00 "GICR_ICFGR0,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (SGI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (SGI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (SGI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (SGI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (SGI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (SGI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (SGI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (SGI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (SGI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (SGI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (SGI)" "Level,Edge"
group.long 0x10C04++0x03
line.long 0x00 "GICR_ICFGR1,Interrupt Configuration Register"
bitfld.long 0x00 31. " ICF15   ,Interrupt Configuration 15 (PPI)" "Level,Edge"
bitfld.long 0x00 29. "  ICF14   ,Interrupt Configuration 14 (PPI)" "Level,Edge"
bitfld.long 0x00 27. "  ICF13   ,Interrupt Configuration 13 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 25. " ICF12   ,Interrupt Configuration 12 (PPI)" "Level,Edge"
bitfld.long 0x00 23. "  ICF11   ,Interrupt Configuration 11 (PPI)" "Level,Edge"
bitfld.long 0x00 21. "  ICF10   ,Interrupt Configuration 10 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 19. " ICF9    ,Interrupt Configuration 9 (PPI)" "Level,Edge"
bitfld.long 0x00 17. "  ICF8    ,Interrupt Configuration 8 (PPI)" "Level,Edge"
bitfld.long 0x00 15. "  ICF7    ,Interrupt Configuration 7 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 13. " ICF6    ,Interrupt Configuration 6 (PPI)" "Level,Edge"
bitfld.long 0x00 11. "  ICF5    ,Interrupt Configuration 5 (PPI)" "Level,Edge"
bitfld.long 0x00 9. "  ICF4    ,Interrupt Configuration 4 (PPI)" "Level,Edge"
textline "                           "
bitfld.long 0x00 7. " ICF3    ,Interrupt Configuration 3 (PPI)" "Level,Edge"
bitfld.long 0x00 5. "  ICF2    ,Interrupt Configuration 2 (PPI)" "Level,Edge"
bitfld.long 0x00 3. "  ICF1    ,Interrupt Configuration 1 (PPI)" "Level,Edge"
textline "                           "
width 18.
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10D00))
group.long 0x10D00++0x03
line.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
bitfld.long 0x00 31. " GMB31 ,Group Modifier Bit 31" "0,1"
bitfld.long 0x00 30. "  GMB30 ,Group Modifier Bit 30" "0,1"
bitfld.long 0x00 29. "  GMB29 ,Group Modifier Bit 29" "0,1"
textline "                           "
bitfld.long 0x00 28. " GMB28 ,Group Modifier Bit 28" "0,1"
bitfld.long 0x00 27. "  GMB27 ,Group Modifier Bit 27" "0,1"
bitfld.long 0x00 26. "  GMB26 ,Group Modifier Bit 26" "0,1"
textline "                           "
bitfld.long 0x00 25. " GMB25 ,Group Modifier Bit 25" "0,1"
bitfld.long 0x00 24. "  GMB24 ,Group Modifier Bit 24" "0,1"
bitfld.long 0x00 23. "  GMB23 ,Group Modifier Bit 23" "0,1"
textline "                           "
bitfld.long 0x00 22. " GMB22 ,Group Modifier Bit 22" "0,1"
bitfld.long 0x00 21. "  GMB21 ,Group Modifier Bit 21" "0,1"
bitfld.long 0x00 20. "  GMB20 ,Group Modifier Bit 20" "0,1"
textline "                           "
bitfld.long 0x00 19. " GMB19 ,Group Modifier Bit 19" "0,1"
bitfld.long 0x00 18. "  GMB18 ,Group Modifier Bit 18" "0,1"
bitfld.long 0x00 17. "  GMB17 ,Group Modifier Bit 17" "0,1"
textline "                           "
bitfld.long 0x00 16. " GMB16 ,Group Modifier Bit 16" "0,1"
bitfld.long 0x00 15. "  GMB15 ,Group Modifier Bit 15" "0,1"
bitfld.long 0x00 14. "  GMB14 ,Group Modifier Bit 14" "0,1"
textline "                           "
bitfld.long 0x00 13. " GMB13 ,Group Modifier Bit 13" "0,1"
bitfld.long 0x00 12. "  GMB12 ,Group Modifier Bit 12" "0,1"
bitfld.long 0x00 11. "  GMB11 ,Group Modifier Bit 11" "0,1"
textline "                           "
bitfld.long 0x00 10. " GMB10 ,Group Modifier Bit 10" "0,1"
bitfld.long 0x00 9. "  GMB9  ,Group Modifier Bit 9" "0,1"
bitfld.long 0x00 8. "  GMB8  ,Group Modifier Bit 8" "0,1"
textline "                           "
bitfld.long 0x00 7. " GMB7  ,Group Modifier Bit 7" "0,1"
bitfld.long 0x00 6. "  GMB6  ,Group Modifier Bit 6" "0,1"
bitfld.long 0x00 5. "  GMB5  ,Group Modifier Bit 5" "0,1"
textline "                           "
bitfld.long 0x00 4. " GMB4  ,Group Modifier Bit 4" "0,1"
bitfld.long 0x00 3. "  GMB3  ,Group Modifier Bit 3" "0,1"
bitfld.long 0x00 2. "  GMB2  ,Group Modifier Bit 2" "0,1"
textline "                           "
bitfld.long 0x00 1. " GMB1  ,Group Modifier Bit 1" "0,1"
bitfld.long 0x00 0. "  GMB0  ,Group Modifier Bit 0" "0,1"
textline "                           "
else
hgroup.long 0x10D00++0x03
hide.long 0x0 "GICR_IGRPMODR0,Interrupt Group Modifier Register 0"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICR",-1.)+0x10E00))
group.long 0x10E00++0x03
line.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
bitfld.long 0x00 30.--31. " NS_ACCESS15 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID15" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 28.--29. "  NS_ACCESS14 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID14" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 26.--27. "  NS_ACCESS13 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID13" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 24.--25. " NS_ACCESS12 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID12" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 22.--23. "  NS_ACCESS11 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID11" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 20.--21. "  NS_ACCESS10 ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID10" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 18.--19. " NS_ACCESS9  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID9" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 16.--17. "  NS_ACCESS8  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID8" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 14.--15. "  NS_ACCESS7  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID7" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 12.--13. " NS_ACCESS6  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID6" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 10.--11. "  NS_ACCESS5  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID5" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 8.--9. "  NS_ACCESS4  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID4" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 6.--7. " NS_ACCESS3  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID3" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 4.--5. "  NS_ACCESS2  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID2" "No access,G0S,G0S/G1S,?..."
bitfld.long 0x00 2.--3. "  NS_ACCESS1  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID1" "No access,G0S,G0S/G1S,?..."
textline "                           "
bitfld.long 0x00 0.--1. " NS_ACCESS0  ,Configures the level of Non-secure access permitted when the SGI is in Secure Group 0 or Secure Group 1 for interrupt ID0" "No access,G0S,G0S/G1S,?..."
textline "                           "
else
hgroup.long 0x10E00++0x03
hide.long 0x00 "GICR_NSACR,Non-secure Access Control Register"
textline "                          "
textline "                          "
textline "                          "
textline "                          "
textline "                          "
endif
rgroup.long 0x1C000++0x03
line.long 0x00 "GICR_MISCSTATUSR,Miscellaneous Status Register"
bitfld.long 0x00 31. " CPU_AS     ,CPU active state. This bit returns the actual status of the cpu_active signal for the core corresponding to the Redistributor whose register is being read" "Low,High"
bitfld.long 0x00 2. "  ENABLEGRP1_S ,EnableGrp1 Secure" "0,1"
bitfld.long 0x00 1. "     ENABLEGRP1_NS ,EnableGrp1 Non-secure" "0,1"
textline "                           "
bitfld.long 0x00 0. " ENABLEGRP0 ,EnableGrp0" "0,1"
rgroup.long 0x1C080++0x03
line.long 0x00 "GICR_PPISR,Private Peripheral Interrupt Status Register"
bitfld.long 0x00 31. " PPI31S     ,Actual status of the PPI31 input signal" "Low,High"
bitfld.long 0x00 30. "  PPI30S       ,Actual status of the PPI30 input signal" "Low,High"
bitfld.long 0x00 29. "  PPI29S        ,Actual status of the PPI29 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 28. " PPI28S     ,Actual status of the PPI28 input signal" "Low,High"
bitfld.long 0x00 27. "  PPI27S       ,Actual status of the PPI27 input signal" "Low,High"
bitfld.long 0x00 26. "  PPI26S        ,Actual status of the PPI26 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 25. " PPI25S     ,Actual status of the PPI25 input signal" "Low,High"
bitfld.long 0x00 24. "  PPI24S       ,Actual status of the PPI24 input signal" "Low,High"
bitfld.long 0x00 23. "  PPI23S        ,Actual status of the PPI23 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 22. " PPI22S     ,Actual status of the PPI22 input signal" "Low,High"
bitfld.long 0x00 21. "  PPI21S       ,Actual status of the PPI21 input signal" "Low,High"
bitfld.long 0x00 20. "  PPI20S        ,Actual status of the PPI20 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 19. " PPI19S     ,Actual status of the PPI19 input signal" "Low,High"
bitfld.long 0x00 18. "  PPI18S       ,Actual status of the PPI18 input signal" "Low,High"
bitfld.long 0x00 17. "  PPI17S        ,Actual status of the PPI17 input signal" "Low,High"
textline "                           "
bitfld.long 0x00 16. " PPI16S     ,Actual status of the PPI16 input signal" "Low,High"
tree.end
width 12.
tree "Peripheral/Component ID Registers"
rgroup.long 0xFFE0++0x03
line.long 0x00 "GICR_PIDR0,Peripheral ID0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_0  ,Part number[7:0]"
rgroup.long 0xFFE4++0x03
line.long 0x00 "GICR_PIDR1,Peripheral ID1 Register"
bitfld.long 0x00 4.--7. " DES_1   ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        PART_1 ,         Part number[11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFE8++0x03
line.long 0x00 "GICR_PIDR2,Peripheral ID2 Register"
bitfld.long 0x00 4.--7. " ARCHREV ,Identifies the version of the GIC architecture with which the GIC-500 complies" "Reserved,Reserved,Reserved,v3.0,?..."
bitfld.long 0x00 3. "  JEDEC  ,Indicates that a JEDEC-assigned JEP106 identity code is used" "Low,High"
bitfld.long 0x00 0.--2. "  DES_1 ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.long 0xFFEC++0x03
line.long 0x00 "GICR_PIDR3,Peripheral ID3 Register"
bitfld.long 0x00 4.--7. " REVAND  ,Manufacturer defined revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        CMOD   ,Indicates if the customer has modified the behavior of the component" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xFFD0++0x03
line.long 0x00 "GICR_PIDR4,Peripheral ID4 Register"
bitfld.long 0x00 4.--7. " SIZE    ,64 KB software visible page" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "        DES_2  ,ARM implementation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.long 0xFFD4++0x03
hide.long 0x00 "GICR_PIDR5,Peripheral ID5 Register"
hgroup.long 0xFFD8++0x03
hide.long 0x00 "GICR_PIDR6,Peripheral ID6 Register"
hgroup.long 0xFFDC++0x03
hide.long 0x00 "GICR_PIDR7,Peripheral ID7 Register"
rgroup.long 0xFFF0++0x03
line.long 0x00 "GICR_CIDR0,Component ID0 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF4++0x03
line.long 0x00 "GICR_CIDR1,Component ID1 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFF8++0x03
line.long 0x00 "GICR_CIDR2,Component ID2 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
rgroup.long 0xFFFC++0x03
line.long 0x00 "GICR_CIDR3,Component ID3 Register"
hexmask.long 0x00 0.--7. 1. " FIXVAL  ,ARM-defined fixed values for the preamble for component discovery"
tree.end
tree.end
width 0x0B
sif COMP.AVAILABLE("GICC")
base COMP.BASE("GICC",-1.)
width 14.
tree "CPU Interface"
if (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)&&(PER.ADDRESS.isSECUREEX(COMP.BASE("GICC",-1.)))
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 10. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 9. "  EOIMODES      ,Controls the behavior of Secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 7. " FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 6. "          IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 4. " CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "               FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
elif (((per.l(COMP.BASE("GICD",-1.)+0x04))&0x400)==0x400)
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODENS     ,Controls the behavior of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 6. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 0. " ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
else
group.long 0x00++0x03
line.long 0x00 "GICC_CTLR,CPU Interface Control Register"
bitfld.long 0x00 9. " EOIMODE       ,Controls the behavior of accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 8. "  IRQBYPDISGRP1 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
bitfld.long 0x00 7. "          FIQBYPDISGRP1 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 1" "Signaled,Not signaled"
textline "                       "
bitfld.long 0x00 6. " IRQBYPDISGRP0 ,Controls whether the bypass IRQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 5. "          FIQBYPDISGRP0 ,Controls whether the bypass FIQ signal is signaled to the PE for Group 0" "Signaled,Not signaled"
bitfld.long 0x00 4. "          CBPR          ,Controls whether GICC_BPR provides common control of preemption to Group 0 and Group 1 interrupts" "Group 0,Both"
textline "                       "
bitfld.long 0x00 3. " FIQEN         ,Controls whether the CPU interface signals Group 0 interrupts to a target PE using the FIQ or IRQ signal" "IRQ,FIQ"
bitfld.long 0x00 1. "                   ENABLEGRP1    ,Enables the signaling of Group 1 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0    ,Enables the signaling of Group 0 interrupts by the CPU interface to a target PE" "Disabled,Enabled"
endif
textline "                       "
group.long 0x04++0x03
line.long 0x00 "GICC_PMR,Interrupt Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority mask level for CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICC_BPR,Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x0C++0x03
hide.long 0x00 "GICC_IAR,Interrupt Acknowledge Register"
in
wgroup.long 0x10++0x03
line.long 0x00 "GICC_EOIR,End Of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICC_RPR,Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICC_HPPIR,Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICC_ABPR,Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP       ,Binary point" "0,1,2,3,4,5,6,7"
hgroup.long 0x20++0x03
hide.long 0x00 "GICC_AIAR,Aliased Interrupt Acknowledge Register"
in
wgroup.long 0x24++0x03
line.long 0x00 "GICC_AEOIR,Aliased End of Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICC_AHPPIR,Aliased Highest Priority Pending Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
rgroup.long 0x2C++0x03
line.long 0x00 "GICC_STATUSR,CPU Interface Status Register"
bitfld.long 0x00 4. " ASV      ,Attempted security violation" "Not detected,Detected"
bitfld.long 0x00 3. "  WROD    ,Write to an RO location" "Not detected,Detected"
bitfld.long 0x00 2. "  RWOD ,Read of a WO location" "Not detected,Detected"
textline "                       "
bitfld.long 0x00 1. " WRD      ,Write to a reserved location" "Not detected,Detected"
bitfld.long 0x00 0. "  RRD     ,Read of a reserved location" "Not detected,Detected"
group.long 0xD0++0x03
line.long 0x00 "GICC_APR0,Active Priorities Register 0"
group.long 0xD4++0x03
line.long 0x00 "GICC_APR1,Active Priorities Register 1"
group.long 0xD8++0x03
line.long 0x00 "GICC_APR2,Active Priorities Register 2"
group.long 0xDC++0x03
line.long 0x00 "GICC_APR3,Active Priorities Register 3"
group.long 0xE0++0x03
line.long 0x00 "GICC_NSAPR0,Non-Secure Active Priorities Register 0"
group.long 0xE4++0x03
line.long 0x00 "GICC_NSAPR1,Non-Secure Active Priorities Register 1"
group.long 0xE8++0x03
line.long 0x00 "GICC_NSAPR2,Non-Secure Active Priorities Register 2"
group.long 0xEC++0x03
line.long 0x00 "GICC_NSAPR3,Non-Secure Active Priorities Register 3"
rgroup.long 0xFC++0x03
line.long 0x00 "GICC_IIDR,CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID   ,Product ID"
bitfld.long 0x00 16.--19. "          ARCHVER ,The version of the GIC architecture that is implemented" ",,,GICv3,?..."
bitfld.long 0x00 12.--15. "         REV  ,Revision number for the CPU interface" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--11. 1. "            IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICC_DIR,Deactivate Interrupt Register"
hexmask.long.tbyte 0x00 0.--23. 1. " INTID    ,Interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICH")
base COMP.BASE("GICH",-1.)
width 13.
tree "Virtual CPU Control Interface"
group.long 0x00++0x03
line.long 0x00 "GICH_HCR,Hypervisor Control Register"
bitfld.long 0x00 27.--31. " EOICOUNT ,Counts the number of EOIs received that do not have a corresponding entry in the List registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "             VGRP1DIE ,VM Group 1 Disabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 6. "      VGRP1EIE ,VM Group 1 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 5. "             VGRP0DIE ,VM Group 0 Disabled Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 4. " VGRP0EIE ,VM Group 0 Enabled Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 3. "       NPIE     ,No Pending Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      LRENPIE  ,List Register Entry Not Present Interrupt Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "             UIE      ,Underflow Interrupt Enable" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " EN       ,Virtual CPU interface Enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "GICH_VTR,Virtual Type Register"
bitfld.long 0x00 29.--31. " PRIBITS  ,Number of priority bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 26.--28. "              PREBITS  ,Number of pre-emption bits" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 23.--25. "             IDBITS   ,The number of virtual interrupt identifier bits supported" "16 bits,24 bits,?..."
textline "                      "
bitfld.long 0x00 22. " SEIS     ,Indicates whether the virtual CPU interface supports generation of SEIs" "Not supported,Supported"
bitfld.long 0x00 21. "  A3V      ,Affinity 3 valid" "Invalid,Valid"
bitfld.long 0x00 0.--4. "       LISTREGS ,List regs number" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
group.long 0x08++0x03
line.long 0x00 "GICH_VMCR,Virtual Machine Control Register"
hexmask.long.byte 0x00 24.--31. 1. " VPMR     ,Virtual priority mask"
bitfld.long 0x00 21.--23. "             VBPR0    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 0)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--20. "             VBPR1    ,Defines the point at which the priority value fields split into two parts the group priority field and the subpriority field (group 1)" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 9. "                    VEOIM    ,Virtual EOImode. DP - Drop the priority / ID - interrupt deactivate" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
textline "                      "
bitfld.long 0x00 4. " VCBPR    ,Virtual Common Binary Point Register" "ABPR,BPR"
bitfld.long 0x00 3. "           VFIQEN   ,Virtual FIQ enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      VACKCTL  ,Virtual AckCtl" "INTID=1022,INTID=corresponding"
bitfld.long 0x00 1. "  VENG1    ,Virtual interrupt enable for group 1" "Disabled,Enabled"
textline "                      "
bitfld.long 0x00 0. " VENG0    ,Virtual interrupt enable for group 0" "Disabled,Enabled"
rgroup.long 0x10++0x03
line.long 0x00 "GICH_MISR,Maintenance Interrupt Status Register"
bitfld.long 0x00 7. " VGRP1D   ,vPE Group 1 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 6. "   VGRP1E   ,vPE Group 1 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 5. "  VGRP0D   ,vPE Group 0 Disabled maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 4. "         VGRP0E   ,vPE Group 0 Enabled maintenance interrupt assertion" "Not asserted,Asserted"
textline "                      "
bitfld.long 0x00 3. " NP       ,No Pending maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 2. "   LRENP    ,List Register Entry Not Present maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 1. "  U        ,Underflow maintenance interrupt assertion" "Not asserted,Asserted"
bitfld.long 0x00 0. "         EOI      ,End Of Interrupt maintenance interrupt assertion" "Not asserted,Asserted"
rgroup.long 0x20++0x03
line.long 0x00 "GICH_EISR0,End of Interrupt Status Register"
bitfld.long 0x00 15. " STATUS15 ,EOI maintenance interrupt status for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,EOI maintenance interrupt status for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,EOI maintenance interrupt status for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,EOI maintenance interrupt status for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,EOI maintenance interrupt status for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,EOI maintenance interrupt status for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,EOI maintenance interrupt status for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,EOI maintenance interrupt status for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,EOI maintenance interrupt status for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,EOI maintenance interrupt status for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,EOI maintenance interrupt status for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,EOI maintenance interrupt status for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,EOI maintenance interrupt status for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,EOI maintenance interrupt status for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,EOI maintenance interrupt status for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,EOI maintenance interrupt status for List register 0" "No interrupt,Interrupt"
rgroup.long 0x30++0x03
line.long 0x00 "GICH_ELRSR0,Empty List register Status Register"
bitfld.long 0x00 15. " STATUS15 ,Status bit for List register 15" "No interrupt,Interrupt"
bitfld.long 0x00 14. "   STATUS14 ,Status bit for List register 14" "No interrupt,Interrupt"
bitfld.long 0x00 13. "  STATUS13 ,Status bit for List register 13" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 12. " STATUS12 ,Status bit for List register 12" "No interrupt,Interrupt"
bitfld.long 0x00 11. "   STATUS11 ,Status bit for List register 11" "No interrupt,Interrupt"
bitfld.long 0x00 10. "  STATUS10 ,Status bit for List register 10" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 9. " STATUS9  ,Status bit for List register 9" "No interrupt,Interrupt"
bitfld.long 0x00 8. "   STATUS8  ,Status bit for List register 8" "No interrupt,Interrupt"
bitfld.long 0x00 7. "  STATUS7  ,Status bit for List register 7" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 6. " STATUS6  ,Status bit for List register 6" "No interrupt,Interrupt"
bitfld.long 0x00 5. "   STATUS5  ,Status bit for List register 5" "No interrupt,Interrupt"
bitfld.long 0x00 4. "  STATUS4  ,Status bit for List register 4" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 3. " STATUS3  ,Status bit for List register 3" "No interrupt,Interrupt"
bitfld.long 0x00 2. "   STATUS2  ,Status bit for List register 2" "No interrupt,Interrupt"
bitfld.long 0x00 1. "  STATUS1  ,Status bit for List register 1" "No interrupt,Interrupt"
textline "                      "
bitfld.long 0x00 0. " STATUS0  ,Status bit for List register 0" "No interrupt,Interrupt"
textline "                      "
group.long 0xF0++0x03
line.long 0x00 "GICH_APR0,Active Priorities Register 0"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF4++0x03
line.long 0x00 "GICH_APR1,Active Priorities Register 1"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xF8++0x03
line.long 0x00 "GICH_APR2,Active Priorities Register 2"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
group.long 0xFC++0x03
line.long 0x00 "GICH_APR3,Active Priorities Register 3"
bitfld.long 0x00 31. "  P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "  P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "  P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "  P28 ,Active Priority 28" "0,1"
textline "                       "
bitfld.long 0x00 27. " P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "  P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "  P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "  P24 ,Active Priority 24" "0,1"
textline "                       "
bitfld.long 0x00 23. " P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "  P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "  P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "  P20 ,Active Priority 20" "0,1"
textline "                       "
bitfld.long 0x00 19. " P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "  P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "  P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "  P16 ,Active Priority 16" "0,1"
textline "                       "
bitfld.long 0x00 15. " P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "  P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "  P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "  P12 ,Active Priority 12" "0,1"
textline "                       "
bitfld.long 0x00 11. " P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "  P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "  P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "  P8  ,Active Priority 8" "0,1"
textline "                       "
bitfld.long 0x00 7. " P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "  P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "  P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "  P4  ,Active Priority 4" "0,1"
textline "                       "
bitfld.long 0x00 3. " P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "  P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "  P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "  P0  ,Active Priority 0" "0,1"
textline "                       "
group.long 0x100++0x03
line.long 0x00 "GICH_LR0,List Register 0"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x104++0x03
line.long 0x00 "GICH_LR1,List Register 1"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x108++0x03
line.long 0x00 "GICH_LR2,List Register 2"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x10C++0x03
line.long 0x00 "GICH_LR3,List Register 3"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x110++0x03
line.long 0x00 "GICH_LR4,List Register 4"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x114++0x03
line.long 0x00 "GICH_LR5,List Register 5"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x118++0x03
line.long 0x00 "GICH_LR6,List Register 6"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x11C++0x03
line.long 0x00 "GICH_LR7,List Register 7"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x120++0x03
line.long 0x00 "GICH_LR8,List Register 8"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x124++0x03
line.long 0x00 "GICH_LR9,List Register 9"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x128++0x03
line.long 0x00 "GICH_LR10,List Register 10"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x12C++0x03
line.long 0x00 "GICH_LR11,List Register 11"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x130++0x03
line.long 0x00 "GICH_LR12,List Register 12"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x134++0x03
line.long 0x00 "GICH_LR13,List Register 13"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
group.long 0x138++0x03
line.long 0x00 "GICH_LR14,List Register 14"
bitfld.long 0x00 31. " HW ,Indicates whether this virtual interrupt is a hardware interrupt" "Software,Hardware"
bitfld.long 0x00 30. "  GROUP ,Indicates whether the interrupt is Group 0 or Group 1" "Group 0,Group 1"
bitfld.long 0x00 28.--29. "  STATE ,The state of the interrupt" "Inactive,Pending,Active,Active/Pending"
bitfld.long 0x00 23.--27. "  PRIORITY ,The priority of this interrupt" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 10.--19. 1. "  PINTID ,Physical interrupt ID"
hexmask.long.word 0x00 0.--9. 1. "  VINTID ,Virtual interrupt ID"
tree.end
width 0x0b
endif
sif COMP.AVAILABLE("GICV")
base COMP.BASE("GICV",-1.)
width 14.
tree "Virtual CPU Interface"
group.long 0x00++0x03
line.long 0x00 "GICV_CTLR,VM Control Register"
bitfld.long 0x00 9. " EOIMODE    ,Controls the behaviour of Non-secure accesses to GICC_EOIR/GICC_AEOIR/GICC_DIR. PD - Priority Drop / ID - Interrupt Deactivation" "EOIR+AEOIR=PD+ID,EOIR+AEOIR=PD/DIR=ID"
bitfld.long 0x00 4. "  CBPR       ,Controls whether GICV_BPR affects both Group 0 and Group 1 interrupts" "Group 0,Both"
bitfld.long 0x00 3. "       FIQEN ,FIQ Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "      ACKCTL ,Acknowledge control. Return ID of the corresponding interrupt" "1022,Corresponding"
textline "                      "
bitfld.long 0x00 1. "  ENABLEGRP1 ,Enables the signalling of Group 1 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
bitfld.long 0x00 0. "              ENABLEGRP0 ,Enables the signalling of Group 0 interrupts by the CPU interface to the virtual machine" "Disabled,Enabled"
group.long 0x04++0x03
line.long 0x00 "GICV_PMR,VM Priority Mask Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority mask level for the virtual CPU interface"
group.long 0x08++0x03
line.long 0x00 "GICV_BPR,VM Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x0C++0x03
line.long 0x00 "GICV_IAR,VM Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x10++0x03
line.long 0x00 "GICV_EOIR,VM End Of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x14++0x03
line.long 0x00 "GICV_RPR,VM Running Priority Register"
hexmask.long.byte 0x00 0.--7. 1. " PRIORITY   ,Priority value of highest priority interrupt"
rgroup.long 0x18++0x03
line.long 0x00 "GICV_HPPIR,VM Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
group.long 0x1C++0x03
line.long 0x00 "GICV_ABPR,VM Aliased Binary Point Register"
bitfld.long 0x00 0.--2. " BP         ,Binary point" "0,1,2,3,4,5,6,7"
rgroup.long 0x20++0x03
line.long 0x00 "GICV_AIAR,VM Aliased Interrupt Acknowledge Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
wgroup.long 0x24++0x03
line.long 0x00 "GICV_AEOIR,VM Aliased End of Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
rgroup.long 0x28++0x03
line.long 0x00 "GICV_AHPPIR,VM Aliased Highest Priority Pending Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
textline ""
group.long 0xD0++0x03
line.long 0x00 "GICV_APR0,VM Active Priority Register 0"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD4++0x03
line.long 0x00 "GICV_APR1,VM Active Priority Register 1"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xD8++0x03
line.long 0x00 "GICV_APR2,VM Active Priority Register 2"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
group.long 0xDC++0x03
line.long 0x00 "GICV_APR3,VM Active Priority Register 3"
bitfld.long 0x00 31. " P31 ,Active Priority 31" "0,1"
bitfld.long 0x00 30. "   P30 ,Active Priority 30" "0,1"
bitfld.long 0x00 29. "   P29 ,Active Priority 29" "0,1"
bitfld.long 0x00 28. "   P28 ,Active Priority 28" "0,1"
textline "                      "
bitfld.long 0x00 27. "  P27 ,Active Priority 27" "0,1"
bitfld.long 0x00 26. "   P26 ,Active Priority 26" "0,1"
bitfld.long 0x00 25. "   P25 ,Active Priority 25" "0,1"
bitfld.long 0x00 24. "   P24 ,Active Priority 24" "0,1"
textline "                      "
bitfld.long 0x00 23. "  P23 ,Active Priority 23" "0,1"
bitfld.long 0x00 22. "   P22 ,Active Priority 22" "0,1"
bitfld.long 0x00 21. "   P21 ,Active Priority 21" "0,1"
bitfld.long 0x00 20. "   P20 ,Active Priority 20" "0,1"
textline "                      "
bitfld.long 0x00 19. "  P19 ,Active Priority 19" "0,1"
bitfld.long 0x00 18. "   P18 ,Active Priority 18" "0,1"
bitfld.long 0x00 17. "   P17 ,Active Priority 17" "0,1"
bitfld.long 0x00 16. "   P16 ,Active Priority 16" "0,1"
textline "                      "
bitfld.long 0x00 15. "  P15 ,Active Priority 15" "0,1"
bitfld.long 0x00 14. "   P14 ,Active Priority 14" "0,1"
bitfld.long 0x00 13. "   P13 ,Active Priority 13" "0,1"
bitfld.long 0x00 12. "   P12 ,Active Priority 12" "0,1"
textline "                      "
bitfld.long 0x00 11. "  P11 ,Active Priority 11" "0,1"
bitfld.long 0x00 10. "   P10 ,Active Priority 10" "0,1"
bitfld.long 0x00 9. "   P9  ,Active Priority 9" "0,1"
bitfld.long 0x00 8. "   P8  ,Active Priority 8" "0,1"
textline "                      "
bitfld.long 0x00 7. "  P7  ,Active Priority 7" "0,1"
bitfld.long 0x00 6. "   P6  ,Active Priority 6" "0,1"
bitfld.long 0x00 5. "   P5  ,Active Priority 5" "0,1"
bitfld.long 0x00 4. "   P4  ,Active Priority 4" "0,1"
textline "                      "
bitfld.long 0x00 3. "  P3  ,Active Priority 3" "0,1"
bitfld.long 0x00 2. "   P2  ,Active Priority 2" "0,1"
bitfld.long 0x00 1. "   P1  ,Active Priority 1" "0,1"
bitfld.long 0x00 0. "   P0  ,Active Priority 0" "0,1"
textline "                      "
rgroup.long 0xFC++0x03
line.long 0x00 "GICV_IIDR,Virtual Machine CPU Interface Identification Register"
hexmask.long.word 0x00 20.--31. 1. " PRODID     ,Product ID"
bitfld.long 0x00 16.--19. "    ARCHVER ,The version of the GIC architecture that is implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "  REV ,Revision number for the CPU interface" ",,,GICv3,?..."
hexmask.long.word 0x00 0.--11. 1. "  IMP ,Implementer"
wgroup.long 0x1000++0x03
line.long 0x00 "GICV_DIR,VM Deactivate Interrupt Register"
hexmask.long 0x00 0.--24. 1. " INTID      ,Interrupt ID"
tree.end
width 0x0b
endif
width 0x0B
tree.end
tree.end
endif
tree.open "RST/CLK (Reset Clocking and Initialization)"
tree "Reset"
base ad:0x01E60000
width 17.
group.long 0x00++0x07
line.long 0x00 "RSTCR,Reset Control Register"
bitfld.long 0x00 4. " WDR_EN       ,Warm device reset request enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       RESET_REQ    ,Hardware reset request" "Not requested,Requested"
line.long 0x04 "RSTCRSP,Service Processor Reset Control Register"
bitfld.long 0x04 1. " RESET_REQ    ,Hardware reset request" "Not requested,Requested"
group.long 0x10++0x03
line.long 0x00 "RSTRQMR1,Reset Request Mask Register"
bitfld.long 0x00 20. " SRDS_RST_MSK ,SerDes reset request event mask" "Not masked,Masked"
bitfld.long 0x00 19. "     RPTOE_MSK    ,RCPM time out reset request event mask" "Not masked,Masked"
bitfld.long 0x00 17. "     MBEE_MSK   ,Multi-bit ECC error reset request mask" "Not masked,Masked"
bitfld.long 0x00 16. "     SDC_MSK     ,Security debug controller error reset request mask" "Not masked,Masked"
newline
bitfld.long 0x00 14. " SFP_MSK      ,Security fuse processor error during POR fuse process reset mask" "Not masked,Masked"
bitfld.long 0x00 13. "     SP_MSK       ,Service processor error reset mask" "Not masked,Masked"
bitfld.long 0x00 3. "     PERIF3_MSK ,Peripheral 3 reset request mask" "Not masked,Masked"
bitfld.long 0x00 2. "     PERIF2_MSK  ,Peripheral 2 reset request mask" "Not masked,Masked"
newline
bitfld.long 0x00 1. " PERIF1_MSK   ,Peripheral 1 reset request mask" "Not masked,Masked"
bitfld.long 0x00 0. "     PERIF0_MSK   ,Peripheral 0 reset request mask" "Not masked,Masked"
if (((per.l(ad:0x01E60000+0x04))&0x01)==0x01)
group.long 0x18++0x03
line.long 0x00 "RSTRQSR1,Reset Request Status Register"
eventfld.long 0x00 23. " MC_WDT_RR    ,MC processor reset request" "Not requested,Requested"
eventfld.long 0x00 22. "  TZONE_WDT_RR ,TrustZone WDOG reset request" "Not active,Active"
eventfld.long 0x00 21. "     SP_WDT_RR  ,Service processor WDOG reset request" "Not active,Active"
eventfld.long 0x00 20. "     SRDS_RST_RR ,SerDes reset event" "Not active,Active"
newline
eventfld.long 0x00 19. " RPTOE_RR     ,RCPM time out reset request event" "Not active,Active"
eventfld.long 0x00 18. "     PBSTE_RR     ,POR BIST error reset request" "Not active,Active"
eventfld.long 0x00 17. "     MBEE_RR    ,Multi-bit ECC reset request" "Not active,Active"
eventfld.long 0x00 16. "     SDC_RR      ,Security debug controller reset request" "Not active,Active"
newline
eventfld.long 0x00 15. " SECM_RR      ,Security monitor error during POR fuse process caused reset request" "Not active,Active"
eventfld.long 0x00 14. "     SFP_RR       ,Security fuse processor error during POR fuse process caused reset request" "Not active,Active"
bitfld.long 0x00 13. "     SP_RR      ,Service processor reset request" "Not requested,Requested"
eventfld.long 0x00 11. "  SW_RR       ,Software settable reset requested" "Not active,Active"
newline
eventfld.long 0x00 10. " WDT_RR       ,WDT reset request" "Not active,Active"
eventfld.long 0x00 9. "     IFC_RR       ,IFC reset request" "Not active,Active"
eventfld.long 0x00 3. "     PERIF3_RR  ,Peripheral 3 reset request" "Not active,Active"
eventfld.long 0x00 2. "     PERIF2_RR   ,Peripheral 2 reset request" "Not active,Active"
newline
eventfld.long 0x00 1. " PERIF1_RR    ,Peripheral 1 reset request" "Not active,Active"
eventfld.long 0x00 0. "     PERIF0_RR    ,Peripheral 0 reset request" "Not active,Active"
else
group.long 0x18++0x03
line.long 0x00 "RSTRQSR1,Reset Request Status Register"
eventfld.long 0x00 23. " MC_WDT_RR    ,MC processor reset request" "Not requested,Requested"
eventfld.long 0x00 22. "  TZONE_WDT_RR ,TrustZone WDOG reset request" "Not active,Active"
eventfld.long 0x00 21. "     SP_WDT_RR  ,Service processor WDOG reset request" "Not active,Active"
eventfld.long 0x00 20. "     SRDS_RST_RR ,SerDes reset event" "Not active,Active"
newline
eventfld.long 0x00 19. " RPTOE_RR     ,RCPM time out reset request event" "Not active,Active"
eventfld.long 0x00 18. "     PBSTE_RR     ,POR BIST error reset request" "Not active,Active"
eventfld.long 0x00 17. "     MBEE_RR    ,Multi-bit ECC reset request" "Not active,Active"
eventfld.long 0x00 16. "     SDC_RR      ,Security debug controller reset request" "Not active,Active"
newline
eventfld.long 0x00 15. " SECM_RR      ,Security monitor error during POR fuse process caused reset request" "Not active,Active"
eventfld.long 0x00 14. "     SFP_RR       ,Security fuse processor error during POR fuse process caused reset request" "Not active,Active"
eventfld.long 0x00 13. "     SP_RR      ,Service processor reset request" "No request,Request"
eventfld.long 0x00 11. "     SW_RR       ,Software settable reset requested" "Not active,Active"
newline
eventfld.long 0x00 10. " WDT_RR       ,WDT reset request" "Not active,Active"
eventfld.long 0x00 9. "     IFC_RR       ,IFC reset request" "Not active,Active"
eventfld.long 0x00 3. "     PERIF3_RR  ,Peripheral 3 reset request" "Not active,Active"
eventfld.long 0x00 2. "     PERIF2_RR   ,Peripheral 2 reset request" "Not active,Active"
newline
eventfld.long 0x00 1. " PERIF1_RR    ,Peripheral 1 reset request" "Not active,Active"
eventfld.long 0x00 0. "     PERIF0_RR    ,Peripheral 0 reset request" "Not active,Active"
endif
group.long 0x20++0x03
line.long 0x00 "RSTRQWDTMRL,Reset Request WDT Mask Register"
sif cpuis("LS2088A*")
bitfld.long 0x00 7. " WDT_MSK7     ,Thread 7 WDT reset request mask" "Not masked,Masked"
bitfld.long 0x00 6. "     WDT_MSK6     ,Thread 6 WDT reset request mask" "Not masked,Masked"
bitfld.long 0x00 5. "     WDT_MSK5   ,Thread 5 WDT reset request mask" "Not masked,Masked"
bitfld.long 0x00 4. "     WDT_MSK4    ,Thread 4 WDT reset request mask" "Not masked,Masked"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
bitfld.long 0x00 3. " WDT_MSK3     ,Thread 3 WDT reset request mask" "Not masked,Masked"
bitfld.long 0x00 2. "     WDT_MSK2     ,Thread 2 WDT reset request mask" "Not masked,Masked"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
bitfld.long 0x00 1. " WDT_MSK1     ,Thread 1 WDT reset request mask" "Not masked,Masked"
newline
endif
bitfld.long 0x00 0. " WDT_MSK0     ,Thread 0 WDT reset request mask" "Not masked,Masked"
group.long 0x30++0x03
line.long 0x00 "RSTRQWDTSRL,Reset Request WDT Status Register"
sif cpuis("LS2088A*")
eventfld.long 0x00 7. " WDT_RR7      ,Thread 7 WDT reset request status" "Not requested,Requested"
eventfld.long 0x00 6. "  WDT_RR6      ,Thread 6 WDT reset request status" "Not requested,Requested"
eventfld.long 0x00 5. "  WDT_RR5    ,Thread 5 WDT reset request status" "Not requested,Requested"
eventfld.long 0x00 4. "  WDT_RR4     ,Thread 4 WDT reset request status" "Not requested,Requested"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
eventfld.long 0x00 3. " WDT_RR3      ,Thread 3 WDT reset request status" "Not requested,Requested"
eventfld.long 0x00 2. "  WDT_RR2      ,Thread 2 WDT reset request status" "Not requested,Requested"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
eventfld.long 0x00 1. " WDT_RR1      ,Thread 1 WDT reset request status" "Not requested,Requested"
newline
endif
eventfld.long 0x00 0. " WDT_RR0      ,Thread 0 WDT reset request status" "Not requested,Requested"
group.long 0x60++0x03
line.long 0x00 "BRR,Boot Release Register"
sif cpuis("LS2088A*")
bitfld.long 0x00 7. " CR7          ,Core 7 release for booting" "Not released,Released"
bitfld.long 0x00 6. "   CR6          ,Core 6 release for booting" "Not released,Released"
bitfld.long 0x00 5. "   CR5        ,Core 5 release for booting" "Not released,Released"
bitfld.long 0x00 4. "   CR4         ,Core 4 release for booting" "Not released,Released"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
bitfld.long 0x00 3. " CR3          ,Core 3 release for booting" "Not released,Released"
bitfld.long 0x00 2. "   CR2          ,Core 2 release for booting" "Not released,Released"
newline
endif
sif cpuis("LS2088A*")||cpuis("LS??4*")
bitfld.long 0x00 1. " CR1          ,Core 1 release for booting" "Not released,Released"
newline
endif
bitfld.long 0x00 0. " CR0          ,Core 0 release for booting" "Not released,Released"
rgroup.long 0x90++0x03
line.long 0x00 "BRCORENBR,Core Enable Boot Release Status Register"
sif cpuis("LS2088A*")
bitfld.long 0x00 0.--5. " CORE_NBR     ,Designates which core will begin booting out of reset" "Core 0,Core 1,Core 2,Core 3,Core 4,Core 5,Core 6,Core 7,?..."
elif cpuis("LS??4*")
bitfld.long 0x00 0.--5. " CORE_NBR     ,Designates which core will begin booting out of reset" "Core 0,Core 1,?..."
else
bitfld.long 0x00 0.--5. " CORE_NBR     ,Designates which core will begin booting out of reset" "Core 0,?..."
endif
rgroup.long 0x100++0x03
line.long 0x00 "RCW_REQR,RCW Request Register"
bitfld.long 0x00 0. " RQ           ,Service processor was requested for RCW loading" "Not requested,Requested"
group.long 0x104++0x03
line.long 0x00 "RCW_COMPLETIONR,RCW Completion Register"
hexmask.long.byte 0x00 16.--23. 1. " ERR_CODE     ,RCW error code"
bitfld.long 0x00 0. "             DONE         ,RCW done bit" "Not done,Done"
rgroup.long 0x110++0x03
line.long 0x00 "PBI_REQR,PBI Request Register"
bitfld.long 0x00 0. " RQ           ,Service processor was requested for PBI phase" "Not requested,Requested"
group.long 0x114++0x03
line.long 0x00 "PBI_COMPLETIONR,PBI Completion Register"
hexmask.long.byte 0x00 16.--23. 1. " ERR_CODE     ,PBI error code"
bitfld.long 0x00 0. "             DONE         ,PBI done bit" "Not done,Done"
sif cpuis("LS2088A*")||cpuis("LS2084A*")
group.long 0x400++0x03
line.long 0x00 "CRSTSR0,Core Reset Status Register 0"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x404++0x03
line.long 0x00 "CRSTSR1,Core Reset Status Register 1"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x408++0x03
line.long 0x00 "CRSTSR2,Core Reset Status Register 2"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x40C++0x03
line.long 0x00 "CRSTSR3,Core Reset Status Register 3"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x410++0x03
line.long 0x00 "CRSTSR4,Core Reset Status Register 4"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x414++0x03
line.long 0x00 "CRSTSR5,Core Reset Status Register 5"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x418++0x03
line.long 0x00 "CRSTSR6,Core Reset Status Register 6"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x41C++0x03
line.long 0x00 "CRSTSR7,Core Reset Status Register 7"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
else
group.long 0x400++0x03
line.long 0x00 "CRSTSR0,Core Reset Status Register 0"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x404++0x03
line.long 0x00 "CRSTSR1,Core Reset Status Register 1"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x408++0x03
line.long 0x00 "CRSTSR2,Core Reset Status Register 2"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
group.long 0x40C++0x03
line.long 0x00 "CRSTSR3,Core Reset Status Register 3"
bitfld.long 0x00 24.--27. " RST_WDT      ,Threaded MPIC" "MPIC,WDT,?..."
bitfld.long 0x00 16.--19. "           RST_MPIC     ,Threaded MPICr" "MPIC,MPIC,?..."
eventfld.long 0x00 8. "           RST_CORE   ,Core was reset in response to internal core request to reset itself by setting bit DBCR0[RST] register" "No reset,Reset"
eventfld.long 0x00 3. "       WDRFR       ,Warm device reset with fuse restore core was reset due to a warm device reset with fuse restore" "No reset,Reset"
newline
rbitfld.long 0x00 2. " READY        ,Core ready pin" "Not ready,Ready"
eventfld.long 0x00 1. "      RST_HRST     ,Core was reset due to an HRESET" "No reset,Reset"
eventfld.long 0x00 0. "       RST_PORST  ,Core was reset due to a PORESET" "No reset,Reset"
endif
group.long 0xA00++0x07
line.long 0x00 "QMBM_WARMRST,QMBM Warm Reset Control Register"
bitfld.long 0x00 0. " BMQM_WARMRST ,BMan warm reset" "No reset,Reset"
line.long 0x04 "SOCIP_WARMRST,SOC_IP Warm Reset Request Register"
bitfld.long 0x04 1. " IP2_WARMRST  ,QMan warm reset" "No reset,Reset"
bitfld.long 0x04 0. "       IP1_WARMRST  ,IP warm reset" "No reset,Reset"
rgroup.long 0xBF8++0x07
line.long 0x00 "IP_REV1,IP Block Revision Register 1"
hexmask.long.word 0x00 16.--31. 1. " IP_ID        ,Block ID"
hexmask.long.byte 0x00 8.--15. 1. "           IP_MJ        ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "             IP_MN      ,Minor revision"
line.long 0x04 "IP_REV2,IP Block Revision Register 2"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT       ,Block ID"
hexmask.long.byte 0x04 0.--7. 1. "             IP_CFG       ,IP block configuration ID"
width 0x0B
tree.end
tree "Clock"
tree "CGU Platform"
base ad:0x01360000
width 9.
group.long 0x00++0x03
line.long 0x00 "CLKCSR,Platform Clock Control/Status Register"
bitfld.long 0x00 16. " CLKOEN1 ,CLKOEN1.CLKOUT1 pad enable" "Tristated,Enabled"
bitfld.long 0x00 11.--15. "  CLKOSEL1 ,CLKOSEL1" ",,,,,,,,,,,,,,,,,,,,,,,,pll_clk_out_div8,pll_clk_out_div6,pll_clk_out_div4,pll_clk_out_div2,pll_clk_out,pll_vco_bufout,pll_fdbk_bufout,pll_sys_bufout"
bitfld.long 0x00 9.--10. "  CLKODIV1 ,Selects division setting for clockout mux output" "/1,/2,/4,/8"
group.long 0x80++0x03
line.long 0x00 "PPLLGSR,Platform PLL General Status Register"
bitfld.long 0x00 31. " KILL    ,PLL status" "Active,Disabled"
rhexmask.long.word 0x00 1.--8. 1. "   CFG      ,Reflects the current PLL multiplier configuration"
width 0x0B
tree.end
tree "CGU1 CGA"
base ad:0x01300000
width 9.
rgroup.long 0x10++0x03
line.long 0x00 "HWA1CSR,CGA Hardware Accelerator 1 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,Cluster A/B PLL1/1,Cluster A/B PLL1/2,Cluster A/B PLL1/3,Cluster A/B PLL1/4,HWAMUX1 external clock,Cluster PLL2/2,?..."
rgroup.long 0x30++0x03
line.long 0x00 "HWA2CSR,CGA Hardware Accelerator 2 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,Cluster A/B PLL2/1,Cluster A/B PLL2/2,Cluster A/B PLL2/3,Cluster A/B PLL2/4,HWAMUX2 external clock,Cluster PLL1/2,?..."
rgroup.long 0x50++0x03
line.long 0x00 "HWA3CSR,CGA Hardware Accelerator 3 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,,,,,HWAMUX3 external clock,Cluster PLL2/2,?..."
group.long 0x80++0x03
line.long 0x00 "PLL1GSR,Core Cluster PLL General Status Register"
bitfld.long 0x00 31. " KILL      ,PLL disable" "No,Yes"
rhexmask.long.word 0x00 1.--8. 1. "            CFG ,Reflects the current PLL multiplier configuration"
width 0x0B
tree.end
tree "CGU2 CGB"
base ad:0x01310000
width 9.
rgroup.long 0x10++0x03
line.long 0x00 "HWA1CSR,CGA Hardware Accelerator 1 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,Cluster A/B PLL1/1,Cluster A/B PLL1/2,Cluster A/B PLL1/3,Cluster A/B PLL1/4,HWAMUX1 external clock,Cluster PLL2/2,?..."
rgroup.long 0x30++0x03
line.long 0x00 "HWA2CSR,CGA Hardware Accelerator 2 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,Cluster A/B PLL2/1,Cluster A/B PLL2/2,Cluster A/B PLL2/3,Cluster A/B PLL2/4,HWAMUX2 external clock,Cluster PLL1/2,?..."
rgroup.long 0x50++0x03
line.long 0x00 "HWA3CSR,CGA Hardware Accelerator 3 Control/Status Register"
bitfld.long 0x00 27.--30. " HWACLKSEL ,Selects the clock source for peripheral hardware accelerators" "Sync mode,,,,,HWAMUX3 external clock,Cluster PLL2/2,?..."
group.long 0x80++0x03
line.long 0x00 "PLL1GSR,Core Cluster PLL General Status Register"
bitfld.long 0x00 31. " KILL      ,PLL disable" "No,Yes"
rhexmask.long.word 0x00 1.--8. 1. "            CFG ,Reflects the current PLL multiplier configuration"
width 0x0B
tree.end
tree "CGU DDR Unit 1"
base ad:0x01380000
width 9.
group.long 0x00++0x03
line.long 0x00 "CLKCSR,DDR Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL    ,Selects the clock source for this clock domain" "/1,/2,?..."
width 0x0B
tree.end
tree "CGU DDR Unit 2"
base ad:0x01390000
width 9.
group.long 0x00++0x03
line.long 0x00 "CLKCSR,DDR Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL    ,Selects the clock source for this clock domain" "/1,/2,?..."
width 0x0B
tree.end
tree "CGU Core Cluster Unit"
base ad:0x01370000
width 9.
group.long 0x0++0x03
line.long 0x00 "CLKC1CSR,Core Cluster 1 Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL  ,Clock source for this clock domain" "PLL1,PLL1/2,PLL/4,,PLL2,PLL2/2,PLL/4,?..."
group.long 0x20++0x03
line.long 0x00 "CLKC2CSR,Core Cluster 2 Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL  ,Clock source for this clock domain" "PLL1,PLL1/2,PLL/4,,PLL2,PLL2/2,PLL/4,?..."
group.long 0x40++0x03
line.long 0x00 "CLKC3CSR,Core Cluster 3 Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL  ,Clock source for this clock domain" "PLL1,PLL1/2,PLL/4,,PLL2,PLL2/2,PLL/4,?..."
group.long 0x60++0x03
line.long 0x00 "CLKC4CSR,Core Cluster 4 Clock Control/Status Register"
bitfld.long 0x00 27.--30. " CLKSEL  ,Clock source for this clock domain" "PLL1,PLL1/2,PLL/4,,PLL2,PLL2/2,PLL/4,?..."
width 0x0B
tree.end
tree.end
tree.end
tree "ISC (Interrupt Sampling)"
base ad:0x01F70000
width 9.
rgroup.long 0x10++0x03
line.long 0x00 "IRQPSR,External Interrupt Pins Status Register"
bitfld.long 0x00 31. " IRQSTAT[31]  ,External interrupt status 31" "Not occurred,Occurred"
bitfld.long 0x00 30. "  [30] ,External interrupt status 30" "Not occurred,Occurred"
bitfld.long 0x00 29. "  [29] ,External interrupt status 29" "Not occurred,Occurred"
bitfld.long 0x00 28. "  [28] ,External interrupt status 28" "Not occurred,Occurred"
bitfld.long 0x00 27. "  [27] ,External interrupt status 27" "Not occurred,Occurred"
newline
bitfld.long 0x00 26. " [26]         ,External interrupt status 26" "Not occurred,Occurred"
bitfld.long 0x00 25. "  [25] ,External interrupt status 25" "Not occurred,Occurred"
bitfld.long 0x00 24. "  [24] ,External interrupt status 24" "Not occurred,Occurred"
bitfld.long 0x00 23. "  [23] ,External interrupt status 23" "Not occurred,Occurred"
bitfld.long 0x00 22. "  [22] ,External interrupt status 22" "Not occurred,Occurred"
newline
bitfld.long 0x00 21. " [21]         ,External interrupt status 21" "Not occurred,Occurred"
bitfld.long 0x00 20. "  [20] ,External interrupt status 20" "Not occurred,Occurred"
bitfld.long 0x00 19. "  [19] ,External interrupt status 19" "Not occurred,Occurred"
bitfld.long 0x00 18. "  [18] ,External interrupt status 18" "Not occurred,Occurred"
bitfld.long 0x00 17. "  [17] ,External interrupt status 17" "Not occurred,Occurred"
newline
bitfld.long 0x00 16. " [16]         ,External interrupt status 16" "Not occurred,Occurred"
bitfld.long 0x00 15. "  [15] ,External interrupt status 15" "Not occurred,Occurred"
bitfld.long 0x00 14. "  [14] ,External interrupt status 14" "Not occurred,Occurred"
bitfld.long 0x00 13. "  [13] ,External interrupt status 13" "Not occurred,Occurred"
bitfld.long 0x00 12. "  [12] ,External interrupt status 12" "Not occurred,Occurred"
newline
bitfld.long 0x00 11. " [11]         ,External interrupt status 11" "Not occurred,Occurred"
bitfld.long 0x00 10. "  [10] ,External interrupt status 10" "Not occurred,Occurred"
bitfld.long 0x00 9. "  [9]  ,External interrupt status 9" "Not occurred,Occurred"
bitfld.long 0x00 8. "  [8]  ,External interrupt status 8" "Not occurred,Occurred"
bitfld.long 0x00 7. "  [7]  ,External interrupt status 7" "Not occurred,Occurred"
newline
bitfld.long 0x00 6. " [6]          ,External interrupt status 6" "Not occurred,Occurred"
bitfld.long 0x00 5. "  [5]  ,External interrupt status 5" "Not occurred,Occurred"
bitfld.long 0x00 4. "  [4]  ,External interrupt status 4" "Not occurred,Occurred"
bitfld.long 0x00 3. "  [3]  ,External interrupt status 3" "Not occurred,Occurred"
bitfld.long 0x00 2. "  [2]  ,External interrupt status 2" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " [1]          ,External interrupt status 1" "Not occurred,Occurred"
bitfld.long 0x00 0. "  [0]  ,External interrupt status 0" "Not occurred,Occurred"
group.long 0x14++0x03
line.long 0x00 "IRQCR,External Interrupt Control Register"
bitfld.long 0x00 31. " IRQINV[31]   ,External interrupt inversion 31" "Not inverted,Inverted"
bitfld.long 0x00 30. "  [30] ,External interrupt inversion 30" "Not inverted,Inverted"
bitfld.long 0x00 29. "  [29] ,External interrupt inversion 29" "Not inverted,Inverted"
bitfld.long 0x00 28. "  [28] ,External interrupt inversion 28" "Not inverted,Inverted"
bitfld.long 0x00 27. "  [27] ,External interrupt inversion 27" "Not inverted,Inverted"
newline
bitfld.long 0x00 26. " [26]         ,External interrupt inversion 26" "Not inverted,Inverted"
bitfld.long 0x00 25. "  [25] ,External interrupt inversion 25" "Not inverted,Inverted"
bitfld.long 0x00 24. "  [24] ,External interrupt inversion 24" "Not inverted,Inverted"
bitfld.long 0x00 23. "  [23] ,External interrupt inversion 23" "Not inverted,Inverted"
bitfld.long 0x00 22. "  [22] ,External interrupt inversion 22" "Not inverted,Inverted"
newline
bitfld.long 0x00 21. " [21]         ,External interrupt inversion 21" "Not inverted,Inverted"
bitfld.long 0x00 20. "  [20] ,External interrupt inversion 20" "Not inverted,Inverted"
bitfld.long 0x00 19. "  [19] ,External interrupt inversion 19" "Not inverted,Inverted"
bitfld.long 0x00 18. "  [18] ,External interrupt inversion 18" "Not inverted,Inverted"
bitfld.long 0x00 17. "  [17] ,External interrupt inversion 17" "Not inverted,Inverted"
newline
bitfld.long 0x00 16. " [16]         ,External interrupt inversion 16" "Not inverted,Inverted"
bitfld.long 0x00 15. "  [15] ,External interrupt inversion 15" "Not inverted,Inverted"
bitfld.long 0x00 14. "  [14] ,External interrupt inversion 14" "Not inverted,Inverted"
bitfld.long 0x00 13. "  [13] ,External interrupt inversion 13" "Not inverted,Inverted"
bitfld.long 0x00 12. "  [12] ,External interrupt inversion 12" "Not inverted,Inverted"
newline
bitfld.long 0x00 11. " [11]         ,External interrupt inversion 11" "Not inverted,Inverted"
bitfld.long 0x00 10. "  [10] ,External interrupt inversion 10" "Not inverted,Inverted"
bitfld.long 0x00 9. "  [9]  ,External interrupt inversion 9" "Not inverted,Inverted"
bitfld.long 0x00 8. "  [8]  ,External interrupt inversion 8" "Not inverted,Inverted"
bitfld.long 0x00 7. "  [7]  ,External interrupt inversion 7" "Not inverted,Inverted"
newline
bitfld.long 0x00 6. " [6]          ,External interrupt inversion 6" "Not inverted,Inverted"
bitfld.long 0x00 5. "  [5]  ,External interrupt inversion 5" "Not inverted,Inverted"
bitfld.long 0x00 4. "  [4]  ,External interrupt inversion 4" "Not inverted,Inverted"
bitfld.long 0x00 3. "  [3]  ,External interrupt inversion 3" "Not inverted,Inverted"
bitfld.long 0x00 2. "  [2]  ,External interrupt inversion 2" "Not inverted,Inverted"
newline
bitfld.long 0x00 1. " [1]          ,External interrupt inversion 1" "Not inverted,Inverted"
bitfld.long 0x00 0. "  [0]  ,External interrupt inversion 0" "Not inverted,Inverted"
rgroup.long 0x20++0x03
line.long 0x00 "TWDTSR0,Thread Watchdog Reset Timer Status Register"
bitfld.long 0x00 31. " TWDTSTAT[31] ,Thread watchdog timer 31" "Not occurred,Occurred"
bitfld.long 0x00 30. "  [30] ,Thread watchdog timer 30" "Not occurred,Occurred"
bitfld.long 0x00 29. "  [29] ,Thread watchdog timer 29" "Not occurred,Occurred"
bitfld.long 0x00 28. "  [28] ,Thread watchdog timer 28" "Not occurred,Occurred"
bitfld.long 0x00 27. "  [27] ,Thread watchdog timer 27" "Not occurred,Occurred"
newline
bitfld.long 0x00 26. " [26]         ,Thread watchdog timer 26" "Not occurred,Occurred"
bitfld.long 0x00 25. "  [25] ,Thread watchdog timer 25" "Not occurred,Occurred"
bitfld.long 0x00 24. "  [24] ,Thread watchdog timer 24" "Not occurred,Occurred"
bitfld.long 0x00 23. "  [23] ,Thread watchdog timer 23" "Not occurred,Occurred"
bitfld.long 0x00 22. "  [22] ,Thread watchdog timer 22" "Not occurred,Occurred"
newline
bitfld.long 0x00 21. " [21]         ,Thread watchdog timer 21" "Not occurred,Occurred"
bitfld.long 0x00 20. "  [20] ,Thread watchdog timer 20" "Not occurred,Occurred"
bitfld.long 0x00 19. "  [19] ,Thread watchdog timer 19" "Not occurred,Occurred"
bitfld.long 0x00 18. "  [18] ,Thread watchdog timer 18" "Not occurred,Occurred"
bitfld.long 0x00 17. "  [17] ,Thread watchdog timer 17" "Not occurred,Occurred"
newline
bitfld.long 0x00 16. " [16]         ,Thread watchdog timer 16" "Not occurred,Occurred"
bitfld.long 0x00 15. "  [15] ,Thread watchdog timer 15" "Not occurred,Occurred"
bitfld.long 0x00 14. "  [14] ,Thread watchdog timer 14" "Not occurred,Occurred"
bitfld.long 0x00 13. "  [13] ,Thread watchdog timer 13" "Not occurred,Occurred"
bitfld.long 0x00 12. "  [12] ,Thread watchdog timer 12" "Not occurred,Occurred"
newline
bitfld.long 0x00 11. " [11]         ,Thread watchdog timer 11" "Not occurred,Occurred"
bitfld.long 0x00 10. "  [10] ,Thread watchdog timer 10" "Not occurred,Occurred"
bitfld.long 0x00 9. "  [9]  ,Thread watchdog timer 9" "Not occurred,Occurred"
bitfld.long 0x00 8. "  [8]  ,Thread watchdog timer 8" "Not occurred,Occurred"
bitfld.long 0x00 7. "  [7]  ,Thread watchdog timer 7" "Not occurred,Occurred"
newline
bitfld.long 0x00 6. " [6]          ,Thread watchdog timer 6" "Not occurred,Occurred"
bitfld.long 0x00 5. "  [5]  ,Thread watchdog timer 5" "Not occurred,Occurred"
bitfld.long 0x00 4. "  [4]  ,Thread watchdog timer 4" "Not occurred,Occurred"
bitfld.long 0x00 3. "  [3]  ,Thread watchdog timer 3" "Not occurred,Occurred"
bitfld.long 0x00 2. "  [2]  ,Thread watchdog timer 2" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " [1]          ,Thread watchdog timer 1" "Not occurred,Occurred"
bitfld.long 0x00 0. "  [0]  ,Thread watchdog timer 0" "Not occurred,Occurred"
group.long 0x40++0x03
line.long 0x00 "TWDTCR,Thread Watchdog Reset Timer Control Register"
bitfld.long 0x00 0. " INT_EN       ,Interrupt enable" "Disabled,Enabled"
rgroup.long 0x60++0x03
line.long 0x00 "SWDTSR,SoC Watchdog Reset Timer Status Register"
bitfld.long 0x00 31. " SWDTSTAT[31] ,SoC watchdog timer 31" "Not occurred,Occurred"
bitfld.long 0x00 30. "  [30] ,SoC watchdog timer 30" "Not occurred,Occurred"
bitfld.long 0x00 29. "  [29] ,SoC watchdog timer 29" "Not occurred,Occurred"
bitfld.long 0x00 28. "  [28] ,SoC watchdog timer 28" "Not occurred,Occurred"
bitfld.long 0x00 27. "  [27] ,SoC watchdog timer 27" "Not occurred,Occurred"
newline
bitfld.long 0x00 26. " [26]         ,SoC watchdog timer 26" "Not occurred,Occurred"
bitfld.long 0x00 25. "  [25] ,SoC watchdog timer 25" "Not occurred,Occurred"
bitfld.long 0x00 24. "  [24] ,SoC watchdog timer 24" "Not occurred,Occurred"
bitfld.long 0x00 23. "  [23] ,SoC watchdog timer 23" "Not occurred,Occurred"
bitfld.long 0x00 22. "  [22] ,SoC watchdog timer 22" "Not occurred,Occurred"
newline
bitfld.long 0x00 21. " [21]         ,SoC watchdog timer 21" "Not occurred,Occurred"
bitfld.long 0x00 20. "  [20] ,SoC watchdog timer 20" "Not occurred,Occurred"
bitfld.long 0x00 19. "  [19] ,SoC watchdog timer 19" "Not occurred,Occurred"
bitfld.long 0x00 18. "  [18] ,SoC watchdog timer 18" "Not occurred,Occurred"
bitfld.long 0x00 17. "  [17] ,SoC watchdog timer 17" "Not occurred,Occurred"
newline
bitfld.long 0x00 16. " [16]         ,SoC watchdog timer 16" "Not occurred,Occurred"
bitfld.long 0x00 15. "  [15] ,SoC watchdog timer 15" "Not occurred,Occurred"
bitfld.long 0x00 14. "  [14] ,SoC watchdog timer 14" "Not occurred,Occurred"
bitfld.long 0x00 13. "  [13] ,SoC watchdog timer 13" "Not occurred,Occurred"
bitfld.long 0x00 12. "  [12] ,SoC watchdog timer 12" "Not occurred,Occurred"
newline
bitfld.long 0x00 11. " [11]         ,SoC watchdog timer 11" "Not occurred,Occurred"
bitfld.long 0x00 10. "  [10] ,SoC watchdog timer 10" "Not occurred,Occurred"
bitfld.long 0x00 9. "  [9]  ,SoC watchdog timer 9" "Not occurred,Occurred"
bitfld.long 0x00 8. "  [8]  ,SoC watchdog timer 8" "Not occurred,Occurred"
bitfld.long 0x00 7. "  [7]  ,SoC watchdog timer 7" "Not occurred,Occurred"
newline
bitfld.long 0x00 6. " [6]          ,SoC watchdog timer 6" "Not occurred,Occurred"
bitfld.long 0x00 5. "  [5]  ,SoC watchdog timer 5" "Not occurred,Occurred"
bitfld.long 0x00 4. "  [4]  ,SoC watchdog timer 4" "Not occurred,Occurred"
bitfld.long 0x00 3. "  [3]  ,SoC watchdog timer 3" "Not occurred,Occurred"
bitfld.long 0x00 2. "  [2]  ,SoC watchdog timer 2" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " [1]          ,SoC watchdog timer 1" "Not occurred,Occurred"
bitfld.long 0x00 0. "  [0]  ,SoC watchdog timer 0" "Not occurred,Occurred"
width 0x0B
tree.end
tree "DCFG (Device Configuration)"
base ad:0x01E00000
width 10.
rgroup.long 0x00++0x07
line.long 0x00 "PORSR1,POR Status 1 Register"
hexmask.long.word 0x00 23.--31. 1. " RCW_SRC     ,Reset configuration word source"
bitfld.long 0x00 21. "      RSP_DIS        ,Reset pause" "Not reset,Reset"
bitfld.long 0x00 18. "     IFC_TE         ,IFC external transceive enable polarity selection" "Active high,Active low"
bitfld.long 0x00 7. "  SOC            ,SoC use" "Not set,Set"
line.long 0x04 "PORSR2,POR Status 2 Register"
bitfld.long 0x04 30.--31. " SVR_VER     ,System version register version" "0,1,2,3"
bitfld.long 0x04 20. "         RCLK_CFG       ,Power-on-reset reference clock configuration" "DIFF_SYSCLK,System clock"
rgroup.long 0x20++0x03
line.long 0x00 "GPPORCR1,General-Purpose POR Configuration Register"
hexmask.long.byte 0x00 0.--7. 0x01 " POR_CFG_VEC ,General-purpose POR configuration vector"
rgroup.long 0x60++0x03
line.long 0x00 "FUSESR,Fuse Status Register"
bitfld.long 0x00 7.--11. " DA_ALT_V    ,Secondary voltage field for VDD" "1.05V,,0.9750V,,0.950V,,,,0.9V,,,,,,,,1.0V,,1.025V,,1.05V,?..."
bitfld.long 0x00 2.--6. "   DA_V           ,Minimum voltage required to reach the frequency specified" "1.05V,,0.9750V,,0.950V,,,,0.9V,,,,,,,,1.0V,,1.025V,,1.05V,?..."
group.long 0x70++0x17
line.long 0x00 "DEVDISR1,Device Disable 1 Register"
bitfld.long 0x00 25. " DCE         ,DCE disable" "No,Yes"
bitfld.long 0x00 22. "       SEC            ,SEC disable" "No,Yes"
bitfld.long 0x00 20. "           PME            ,PME disable" "No,Yes"
bitfld.long 0x00 16. "          SATA1_SAS1_FC1 ,SATA1/SAS1/FC1 disable" "No,Yes"
newline
bitfld.long 0x00 13. " USB2        ,USB2 disable" "No,Yes"
bitfld.long 0x00 12. "       USB1           ,USB1 disable" "No,Yes"
bitfld.long 0x00 8. "           QDMA           ,QDMA disable" "No,Yes"
bitfld.long 0x00 2. "          ESDHC          ,ESDHC disable" "No,Yes"
line.long 0x04 "DEVDISR2,Device Disable 2 Register"
bitfld.long 0x04 15. " MAC[16]     ,MAC_16 disable" "No,Yes"
bitfld.long 0x04 14. "       [15]           ,MAC_15 disable" "No,Yes"
bitfld.long 0x04 13. "           [14]           ,MAC_14 disable" "No,Yes"
bitfld.long 0x04 12. "          [13]           ,MAC_13 disable" "No,Yes"
newline
bitfld.long 0x04 11. " [12]        ,MAC_12 disable" "No,Yes"
bitfld.long 0x04 10. "       [11]           ,MAC_11 disable" "No,Yes"
bitfld.long 0x04 9. "           [10]           ,MAC_10 disable" "No,Yes"
bitfld.long 0x04 8. "          [9]            ,MAC_9 disable" "No,Yes"
newline
bitfld.long 0x04 7. " [8]         ,MAC_8 disable" "No,Yes"
bitfld.long 0x04 6. "       [7]            ,MAC_7 disable" "No,Yes"
bitfld.long 0x04 5. "           [6]            ,MAC_6 disable" "No,Yes"
bitfld.long 0x04 4. "          [5]            ,MAC_5 disable" "No,Yes"
newline
bitfld.long 0x04 3. " [4]         ,MAC_4 disable" "No,Yes"
bitfld.long 0x04 2. "       [3]            ,MAC_3 disable" "No,Yes"
bitfld.long 0x04 1. "           [2]            ,MAC_2 disable" "No,Yes"
bitfld.long 0x04 0. "          [1]            ,MAC_1 disable" "No,Yes"
line.long 0x08 "DEVDISR3,Device Disable 3 Register"
bitfld.long 0x08 16. " AIOP        ,AIOP disable" "No,Yes"
newline
bitfld.long 0x08 13. " MC          ,MC disable" "No,Yes"
bitfld.long 0x08 12. "       QBMAN          ,QBMAN disable" "No,Yes"
bitfld.long 0x08 3. "           PCIE4          ,PCIE4 disable" "No,Yes"
bitfld.long 0x08 2. "          PCIE3          ,PCIE3 disable" "No,Yes"
newline
bitfld.long 0x08 1. " PCIE2       ,PCIE2 disable" "No,Yes"
bitfld.long 0x08 0. "       PCIE1          ,PCIE1 disable" "No,Yes"
line.long 0x0C "DEVDISR4,Device Disable 4 Register"
bitfld.long 0x0C 9. " I2C4        ,I2C4 disable" "No,Yes"
bitfld.long 0x0C 8. "       I2C3           ,I2C3 disable" "No,Yes"
bitfld.long 0x0C 5. "           SPI            ,SPI disable" "No,Yes"
bitfld.long 0x0C 4. "          QSPI           ,QSPI disable" "No,Yes"
newline
bitfld.long 0x0C 3. " DUART2      ,DUART2 disable" "No,Yes"
bitfld.long 0x0C 2. "       DUART1         ,DUART1 disable" "No,Yes"
bitfld.long 0x0C 1. "           I2C2           ,I2C2 disable" "No,Yes"
bitfld.long 0x0C 0. "          I2C1           ,I2C1 disable" "No,Yes"
line.long 0x10 "DEVDISR5,Device Disable 5 Register"
bitfld.long 0x10 20. " PEBM        ,PEBM disable" "No,Yes"
bitfld.long 0x10 14. "       FLEXTIMERS1_4  ,FlexTimers1_4 disable" "No,Yes"
bitfld.long 0x10 13. "           TMU            ,TMU disable" "No,Yes"
bitfld.long 0x10 12. "          OCRAM          ,OCRAM disable" "No,Yes"
newline
bitfld.long 0x10 11. " NAL         ,NAL disable" "No,Yes"
newline
bitfld.long 0x10 10. " DBG         ,DBG disable" "No,Yes"
bitfld.long 0x10 9. "       GPIO           ,GPIO disable" "No,Yes"
bitfld.long 0x10 8. "           IFC            ,IFC disable" "No,Yes"
newline
bitfld.long 0x10 1. " DDR2        ,DDR2 disable" "No,Yes"
bitfld.long 0x10 0. "       DDR1           ,DDR1 disable" "No,Yes"
line.long 0x14 "DEVDISR6,Device Disable 6 Register"
bitfld.long 0x14 0. " WRIOP       ,WRIOP disable" "No,Yes"
group.long 0x94++0x03
line.long 0x00 "COREDISR,Core Disable Register"
bitfld.long 0x00 7. " CD7         ,Core 7 disable" "No,Yes"
bitfld.long 0x00 6. "       CD6            ,Core 6 disable" "No,Yes"
bitfld.long 0x00 5. "           CD5            ,Core 5 disable" "No,Yes"
bitfld.long 0x00 4. "          CD4            ,Core 4 disable" "No,Yes"
newline
bitfld.long 0x00 3. " CD3         ,Core 3 disable" "No,Yes"
bitfld.long 0x00 2. "       CD2            ,Core 2 disable" "No,Yes"
bitfld.long 0x00 1. "           CD1            ,Core 1 disable" "No,Yes"
bitfld.long 0x00 0. "          CD0            ,Core 0 disable" "No,Yes"
rgroup.long 0xA4++0x03
line.long 0x00 "SVR,System Version Register"
bitfld.long 0x00 28.--31. " MFR_ID      ,Manufacturer ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "        FAMILY         ,Family" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--21. "            SOC_DEV_ID     ,SoC device ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "           VAR_PER        ,Various personalities" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
hexmask.long.byte 0x00 4.--7. 1. " MAJOR_REV   ,Major revision number"
hexmask.long.byte 0x00 0.--3. 1. "        MINOR_REV      ,Minor revision number"
newline
rgroup.long 0x100++0x07
line.long 0x00 "RCWSR1,Reset Control Word Status 1 Register"
bitfld.long 0x00 26.--31. " CGA_PLL1_RAT                 ,Cluster group A PLL 1 multiplier/ratio" ",,,,,,6:1,7:1,8:1,9:1,10:1,11:1,12:1,13:1,14:1,15:1,16:1,17:1,18:1,19:1,20:1,21:1,22:1,23:1,24:1,?..."
newline
bitfld.long 0x00 24.--25. " CGA_PLL1_CFG                 ,Cluster group A PLL 1 configuration" "All valid cluster group A PLL frequencies,?..."
newline
bitfld.long 0x00 10.--15. " MEM_PLL_RAT                  ,Memory controller complex PLL multiplier/ratio" ",,,,,,,,,,10:1,11:1,12:1,13:1,14:1,15:1,16:1,17:1,18:1,19:1,20:1,?..."
newline
bitfld.long 0x00 8.--9. " MEM_PLL_CFG                  ,Memory controller complex PLL configuration" "All valid DDR PLL frequencies,?..."
newline
bitfld.long 0x00 2.--6. " SYS_PLL_RAT                  ,System PLL multiplier/ratio" "Bypassed,,,,,,,,8:1,,10:1,,12:1,,14:1,,16:1,?..."
newline
bitfld.long 0x00 0.--1. " SYS_PLL_CFG                  ,System PLL configuration" "For all valid Platform PLL frequencies,?..."
line.long 0x04 "RCWSR2,Reset Control Word Status 2"
bitfld.long 0x04 2.--7. " CGA_PLL2_RAT                 ,Cluster group A PLL 2 multiplier/ratio" ",,,,,,6:1,7:1,8:1,9:1,10:1,11:1,12:1,13:1,14:1,15:1,16:1,17:1,18:1,19:1,20:1,21:1,22:1,23:1,24:1,?..."
newline
bitfld.long 0x04 0.--1. " CGA_PLL2_CFG                 ,Cluster group A PLL 2 configuration" "All valid cluster group A PLL frequencies,?..."
rgroup.long 0x110++0x17
line.long 0x00 "RCWSR5,Reset Control Word Status 5 Register"
bitfld.long 0x00 28.--31. " C4_PLL_SEL                   ,Cluster 4 PLL select" "CGB_PLL1 /1,CGB_PLL1 /2,CGB_PLL1 /4,,CGB_PLL2 /1,CGB_PLL2 /2,CGB_PLL2 /4,?..."
newline
bitfld.long 0x00 24.--27. " C3_PLL_SEL                   ,Cluster 3 PLL select" "CGB_PLL1 /1,CGB_PLL1 /2,CGB_PLL1 /4,,CGB_PLL2 /1,CGB_PLL2 /2,CGB_PLL2 /4,?..."
newline
bitfld.long 0x00 20.--23. " C2_PLL_SEL                   ,Cluster 2 PLL select" "CGA_PLL1 /1,CGA_PLL1 /2,CGA_PLL1 /4,,CGA_PLL2 /1,CGA_PLL2 /2,CGA_PLL2 /4,?..."
newline
bitfld.long 0x00 16.--19. " C1_PLL_SEL                   ,Cluster 1 PLL select" "CGA_PLL1 /1,CGA_PLL1 /2,CGA_PLL1 /4,,CGA_PLL2 /1,CGA_PLL2 /2,CGA_PLL2 /4,?..."
newline
bitfld.long 0x00 8. " CGB_PLL2_SPD                 ,Cluster group B PLL 2 speed select" "High speed,Low speed"
newline
bitfld.long 0x00 7. " CGB_PLL1_SPD                 ,Cluster group B PLL 1 speed select" "High speed,Low speed"
newline
bitfld.long 0x00 5. " CGA_PLL2_SPD                 ,Cluster group A PLL 2 speed select" "High speed,Low speed"
newline
bitfld.long 0x00 4. " CGA_PLL1_SPD                 ,Cluster group A PLL 1 speed select" "High speed,Low speed"
newline
bitfld.long 0x00 1. " MEM_PLL_SPD                  ,Memory controller complex PLL speed select" "High speed,Low speed"
newline
bitfld.long 0x00 0. " SYS_PLL_SPD                  ,System PLL speed select" "High speed,Low speed"
line.long 0x04 "RCWSR6,Reset Control Word Status 6 Register"
line.long 0x08 "RCWSR7,Reset Control Word Status 7 Register"
bitfld.long 0x08 23. " DDR_RATE                     ,DDR data rate" "0,?..."
newline
bitfld.long 0x08 21.--22. " DRAM_LAT                     ,DDR latency" "Default,For typical unknown or higher latency DRAMs,,Only for lowest latency DRAMs"
newline
bitfld.long 0x08 19.--20. " DDR_REFCLK_SEL               ,DDR reference clock selection" "DDRCLK,?..."
line.long 0x0C "RCWSR8,Reset Control Word Status 8 Register"
bitfld.long 0x0C 5.--6. " REQD_CUST_CONFIG_230_229     ,Required customer configuration" "0,1,2,3"
line.long 0x10 "RCWSR9,Reset Control Word Status 9 Register"
hexmask.long.word 0x10 20.--31. 1. " PBI_LENGTH                   ,Pre-boot initialization length"
newline
hexmask.long.word 0x10 11.--19. 1. " FLASH_MODE                   ,Flash mode"
newline
bitfld.long 0x10 10. " SB_EN                        ,Secure boot enable" "Disabled,Enabled"
newline
bitfld.long 0x10 9. " BOOT_HO                      ,Boot holdoff" "All cores except core 0 in hold off,All cores in hold off"
newline
bitfld.long 0x10 4.--8. " BOOT_LOC                     ,Boot location" "PCIe1,PCIe2,PCIe3,PCIe4,,,,,,,,,,,,,,,,,Memory Complex,OCRAM,,,IFC,,Serial NOR,?..."
line.long 0x14 "RCWSR10,Reset Control Word Status 10 Register"
bitfld.long 0x14 23. " GPIO_LED_EN                  ,GPIO LED enable" "Disabled,Enabled"
newline
hexmask.long.byte 0x14 16.--22. 1. " GPIO_LED_NUM                 ,GPIO LED number"
newline
hexmask.long.word 0x14 4.--13. 1. " SYSCLK_FREQ                  ,System clock frequency"
newline
bitfld.long 0x14 0. " SDBGEN                       ,Secure debug enable" "Disabled,Enabled"
rgroup.long 0x130++0x03
line.long 0x00 "RCWSR13,Reset Control Word Status 13 Register"
bitfld.long 0x00 24. " ASLEEP                       ,ASLEEP pin configuration" "0,1"
newline
bitfld.long 0x00 23. " RTC                          ,RTC pin configuration" "0,1"
newline
bitfld.long 0x00 22. " EVT_9                        ,EVT_9 pin configuration" "0,1"
newline
bitfld.long 0x00 21. " IRQ11_BASE                   ,IRQ11 pin configuration" "0,1"
newline
bitfld.long 0x00 20. " IRQ10_BASE                   ,IRQ10 pin configuration" "0,1"
newline
bitfld.long 0x00 19. " IRQ09_BASE                   ,IRQ9 pin configuration" "0,1"
newline
bitfld.long 0x00 18. " IRQ08_BASE                   ,IRQ8 pin configuration" "0,1"
newline
bitfld.long 0x00 17. " IRQ07_BASE                   ,IRQ7 pin configuration" "0,1"
newline
bitfld.long 0x00 16. " IRQ06_BASE                   ,IRQ6 pin configuration" "0,1"
newline
bitfld.long 0x00 15. " IRQ05_BASE                   ,IRQ5 pin configuration" "0,1"
newline
bitfld.long 0x00 14. " IRQ04_BASE                   ,IRQ4 pin configuration" "0,1"
newline
bitfld.long 0x00 13. " IRQ03_BASE                   ,IRQ3 pin configuration" "0,1"
newline
bitfld.long 0x00 12. " SDHC_BASE                    ,SDHC pin configuration" "0,1"
newline
bitfld.long 0x00 10.--11. " SPI_PCS_BASE                 ,SPI_PCS pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. " SPI_BASE_BASE                ,SPI pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 6.--7. " IIC4_BASE                    ,IIC4 pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 4.--5. " IIC3_BASE                    ,IIC3 pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 2.--3. " IIC2_BASE                    ,IIC2 pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 0.--1. " UART_BASE                    ,UART pin configuration" "0,UART1_RTS_B/UART1_CTS_B,UART2_SOUT/UART2_SIN,UART2_RTS_B/UART2_CTS_B"
rgroup.long 0x138++0x07
line.long 0x00 "RCWSR15,Reset Control Word Status 15 Register"
bitfld.long 0x00 13. " QSPI_OCT_EN                  ,QSPI pin configuration" "0,1"
newline
bitfld.long 0x00 12. " IFC_A_8_6                    ,IFC_A_8_6 pin configuration" "0,1"
newline
bitfld.long 0x00 10.--11. " IFC_GRP_FGHI_BASE            ,IFC_GRP_FGHI_BASE pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 8.--9. " IFC_GRP_E_BASE               ,IFC_GRP_E_BASE pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 6.--7. " IFC_GRP_D_BASE               ,IFC_GRP_D_BASE pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 2.--3. " IFC_GRP_B_BASE               ,IFC_GRP_B_BASE pin configuration" "0,1,2,3"
newline
bitfld.long 0x00 0.--1. " IFC_GRP_A_BASE               ,IFC_GRP_A_BASE pin configuration" "0,1,2,3"
line.long 0x04 "RCWSR16,Reset Control Word Status 16 Register"
bitfld.long 0x04 8. " HOST_AGT_PEX4                ,Host/Agent PEX4" "Host,Agent"
newline
bitfld.long 0x04 7. " HOST_AGT_PEX3                ,Host/Agent PEX3" "Host,Agent"
newline
bitfld.long 0x04 6. " HOST_AGT_PEX2                ,Host/Agent PEX2" "Host,Agent"
newline
bitfld.long 0x04 5. " HOST_AGT_PEX1                ,Host/Agent PEX1" "Host,Agent"
rgroup.long 0x160++0x03
line.long 0x00 "RCWSR25,Reset Control Word Status 25 Register"
rgroup.long 0x168++0x03
line.long 0x00 "RCWSR27,Reset Control Word Status 27 Register"
bitfld.long 0x00 25.--26. " USB3_REFCLK_SEL              ,USB3 reference clock selector" "SYSCLK,DIF_SYSCLK,?..."
newline
hexmask.long.word 0x00 18.--24. 1. " USB3_CLK_DIV_RATIO           ,USB3 clock division ratio"
newline
bitfld.long 0x00 12.--17. " USB3_CLK_FSEL                ,USB3_PHY fsel[5:0] is connected to this field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 1. " USB_EXT                      ,USB pin configuration" "USB1_DRVVBUS/USB1_PWRFAULT/USB2_DRVVBUS/USB2_PWRFAULT,GPIO4[24:27]"
newline
bitfld.long 0x00 0. " IEEE_1588_EXT                ,1588 pin configuration" "GPIO4[16:23],IEEE 1588"
rgroup.long 0x170++0x07
line.long 0x00 "RCWSR29,Reset Control Word Status 29 Register"
hexmask.long.byte 0x00 24.--31. 1. " SRDS_PRTCL_S2                ,SerDes 2 protocol select"
newline
hexmask.long.byte 0x00 16.--23. 1. " SRDS_PRTCL_S1                ,SerDes 1 protocol select"
newline
bitfld.long 0x00 3. " SRDS_PLL_PD_PLL4             ,SerDes PLL 4 power down" "Powered up,Powered down"
newline
bitfld.long 0x00 2. " SRDS_PLL_PD_PLL3             ,SerDes PLL 3 power down" "Powered up,Powered down"
newline
bitfld.long 0x00 1. " SRDS_PLL_PD_PLL2             ,SerDes PLL 2 power down" "Powered up,Powered down"
newline
bitfld.long 0x00 0. " SRDS_PLL_PD_PLL1             ,SerDes PLL 1 power down" "Powered up,Powered down"
line.long 0x04 "RCWSR30,Reset Control Word Status 30 Register"
bitfld.long 0x04 18.--19. " SRDS_DIV_PEX_S2              ,SerDes frequency divider - SerDes 2" "8G/5G,5G,2.5G,?..."
newline
bitfld.long 0x04 16.--17. " SRDS_DIV_PEX_S1              ,Configures the frequency of PCI Express protocols on this SerDes" "8G/5G,5G,2.5G,?..."
newline
bitfld.long 0x04 3. " SRDS_PLL_REF_CLK_SEL_S2_PLL2 ,SerDes 2 PLL 2 reference clock select" "0,1"
newline
bitfld.long 0x04 2. " SRDS_PLL_REF_CLK_SEL_S2_PLL1 ,SerDes 2 PLL 1 reference clock select" "0,1"
newline
bitfld.long 0x04 1. " SRDS_PLL_REF_CLK_SEL_S1_PLL2 ,Selects the PLL reference clock frequency for this SerDes" "0,1"
newline
bitfld.long 0x04 0. " SRDS_PLL_REF_CLK_SEL_S1_PLL1 ,Selects the PLL reference clock frequency for this SerDes" "0,1"
newline
button "SCRATCHRW" "d (ad:0x01E00000+0x200)--(ad:0x01E00000+0x23F) /long"
newline
button "SCRATCHW1R" "d (ad:0x01E00000+0x300)--(ad:0x01E00000+0x30F) /long"
newline
width 14.
group.long 0x400++0x07
line.long 0x00 "BOOTLOCPTRL,Boot Location Pointer Low-Order Address Register"
line.long 0x04 "BOOTLOCPTRH,Boot Location Pointer High-Order Address Register"
group.long 0x520++0x07
line.long 0x00 "USB1_AMQR,USB1_AMQR"
bitfld.long 0x00 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x00 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x00 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x00 0.--6. 1. " ICID ,Isolation context"
line.long 0x04 "USB2_AMQR,USB2_AMQR"
bitfld.long 0x04 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x04 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x04 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x04 0.--6. 1. " ICID ,Isolation context"
group.long 0x530++0x03
line.long 0x00 "SDMM1_AMQR,SD/MMC Access Management Qualifier Register"
bitfld.long 0x00 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x00 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x00 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x00 0.--6. 1. " ICID ,Isolation context"
group.long 0x550++0x07
line.long 0x00 "SATA1_AMQR,SATA 1 Access Management Qualifier Register"
bitfld.long 0x00 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x00 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x00 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x00 0.--6. 1. " ICID ,Isolation context"
line.long 0x04 "SATA2_AMQR,SATA 2 Access Management Qualifier Register"
bitfld.long 0x04 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x04 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x04 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x04 0.--6. 1. " ICID ,Isolation context"
group.long 0x594++0x03
line.long 0x00 "SPARE2_AMQR,SPARE 2 Access Management Qualifier Register"
bitfld.long 0x00 18. " PL   ,PL (privileged level) bit" "Incorrect,Correct"
bitfld.long 0x00 17. "  BMT ,BMT (bypass memory translation) bit" "Not bypassed,Bypassed"
bitfld.long 0x00 16. "  VA ,VA (virtual address) bit" "Physical,Virtual"
newline
hexmask.long.byte 0x00 0.--6. 1. " ICID ,Isolation context"
newline
group.long 0x620++0x1B
line.long 0x00 "GENCR1,General Control Register"
bitfld.long 0x00 31. " SYSBARDISABLE ,A57 input configuration signal" "0,1"
bitfld.long 0x00 29. "             BROADCASTCACHEMAINT ,BROADCASTCACHEMAINT" "0,1"
line.long 0x04 "GENCR2,General Control Register"
line.long 0x08 "GENCR3,General Control Register"
line.long 0x0C "GENCR4,General Control Register"
line.long 0x10 "GENCR5,General Control Register"
line.long 0x14 "GENCR6,General Control Register"
line.long 0x18 "GENCR7,General Control Register"
rgroup.long 0x740++0x03
line.long 0x00 "TP_ITYP0,Topology Initiator Type Register 0"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x744++0x03
line.long 0x00 "TP_ITYP1,Topology Initiator Type Register 1"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x748++0x03
line.long 0x00 "TP_ITYP2,Topology Initiator Type Register 2"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x74C++0x03
line.long 0x00 "TP_ITYP3,Topology Initiator Type Register 3"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x750++0x03
line.long 0x00 "TP_ITYP4,Topology Initiator Type Register 4"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x754++0x03
line.long 0x00 "TP_ITYP5,Topology Initiator Type Register 5"
hexmask.long.byte 0x00 0.--7. 1. " INIT_TYPE     ,Identifies the type of initiator for this index"
rgroup.long 0x844++0x03
line.long 0x00 "TP_CLUSTER1L,Core Cluster 1 Topology Register"
bitfld.long 0x00 30.--31. " EOC           ,Last cluster in SoC" "Not last,Last,Last,Last"
bitfld.long 0x00 24.--29. "      IT_IDX_PC[4]        ,Initiator type index for this cluster's fourth initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 16.--21. " [3]           ,Initiator type index for this cluster third initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "            [2]                 ,Initiator type index for this cluster second initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " [1]           ,Initiator type index for this cluster first initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rgroup.long 0x84C++0x03
line.long 0x00 "TP_CLUSTER2L,Core Cluster 2 Topology Register"
bitfld.long 0x00 30.--31. " EOC           ,Last cluster in SoC" "Not last,Last,Last,Last"
bitfld.long 0x00 24.--29. "      IT_IDX_PC[4]        ,Initiator type index for this cluster's fourth initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 16.--21. " [3]           ,Initiator type index for this cluster third initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "            [2]                 ,Initiator type index for this cluster second initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " [1]           ,Initiator type index for this cluster first initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rgroup.long 0x854++0x03
line.long 0x00 "TP_CLUSTER3L,Core Cluster 3 Topology Register"
bitfld.long 0x00 30.--31. " EOC           ,Last cluster in SoC" "Not last,Last,Last,Last"
bitfld.long 0x00 24.--29. "      IT_IDX_PC[4]        ,Initiator type index for this cluster's fourth initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 16.--21. " [3]           ,Initiator type index for this cluster third initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "            [2]                 ,Initiator type index for this cluster second initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " [1]           ,Initiator type index for this cluster first initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
rgroup.long 0x85C++0x03
line.long 0x00 "TP_CLUSTER4L,Core Cluster 4 Topology Register"
bitfld.long 0x00 30.--31. " EOC           ,Last cluster in SoC" "Not last,Last,Last,Last"
bitfld.long 0x00 24.--29. "      IT_IDX_PC[4]        ,Initiator type index for this cluster's fourth initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 16.--21. " [3]           ,Initiator type index for this cluster third initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "            [2]                 ,Initiator type index for this cluster second initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " [1]           ,Initiator type index for this cluster first initiator" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x900++0x03
line.long 0x00 "QSPICR1,QSPI Control Register"
bitfld.long 0x00 0.--5. " QSPI_CLK_DIV  ,QSPI clock divisor" ",,/8,/12,/16,/20,/24,/28,/32,,,,,,,,,,,,/80,?..."
group.long 0x920++0x03
line.long 0x00 "IOQOSCR1,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x924++0x03
line.long 0x00 "IOQOSCR2,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x928++0x03
line.long 0x00 "IOQOSCR3,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x92C++0x03
line.long 0x00 "IOQOSCR4,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x930++0x03
line.long 0x00 "IOQOSCR5,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x934++0x03
line.long 0x00 "IOQOSCR6,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x938++0x03
line.long 0x00 "IOQOSCR7,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x93C++0x03
line.long 0x00 "IOQOSCR8,I/O Quality Of Services Register"
bitfld.long 0x00 16.--19. " QOS[3]        ,Quality of service 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "            [2]                 ,Quality of service 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " [1]           ,Quality of service 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x960++0x03
line.long 0x00 "FTMCR,FlexTimer Control Register"
bitfld.long 0x00 6. " CASC08_07     ,Cascade flex timer 8 to flex timer 7" "Not cascaded,Cascaded"
bitfld.long 0x00 5. "  CASC07_06           ,Cascade flex timer 7 to flex timer 6" "Not cascaded,Cascaded"
newline
bitfld.long 0x00 4. " CASC06_05     ,Cascade flex timer 6 to flex timer 5" "Not cascaded,Cascaded"
bitfld.long 0x00 3. "  CASC05_04           ,Cascade flex timer 5 to flex timer 4" "Not cascaded,Cascaded"
newline
bitfld.long 0x00 2. " CASC04_03     ,Cascade flex timer 4 to flex timer 3" "Not cascaded,Cascaded"
bitfld.long 0x00 1. "  CASC03_02           ,Cascade flex timer 3 to flex timer 2" "Not cascaded,Cascaded"
newline
bitfld.long 0x00 0. " CASC02_01     ,Cascade flex timer 2 to flex timer 1" "Not cascaded,Cascaded"
rgroup.long 0x990++0x03
line.long 0x00 "COREDISABLESR,Core Disable Status Register"
sif cpuis("LS208*")
bitfld.long 0x00 7. " CD7           ,Core 7 disable" "No,Yes"
bitfld.long 0x00 6. "           CD6                 ,Core 6 disable" "No,Yes"
newline
bitfld.long 0x00 5. " CD5           ,Core 5 disable" "No,Yes"
bitfld.long 0x00 4. "           CD4                 ,Core 4 disable" "No,Yes"
newline
endif
bitfld.long 0x00 3. " CD3           ,Core 3 disable" "No,Yes"
bitfld.long 0x00 2. "           CD2                 ,Core 2 disable" "No,Yes"
newline
bitfld.long 0x00 1. " CD1           ,Core 1 disable" "No,Yes"
bitfld.long 0x00 0. "           CD0                 ,Core 0 disable" "No,Yes"
group.long 0xA00++0x03
line.long 0x00 "SDBGCR,Secure Debug Configuration Register"
bitfld.long 0x00 0. " SDBG_NS       ,Secure debug - TZ not secure" "Secure,Not secure"
rgroup.long 0xBF8++0x07
line.long 0x00 "IPBRR1,IP Block Revision 1 Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID         ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "          IP_MJ               ,Major revision"
newline
hexmask.long.byte 0x00 0.--7. 1. " IP_MN         ,Minor revision"
line.long 0x04 "IPBRR2,IP Block Revision 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT        ,IP block integration options"
hexmask.long.byte 0x04 0.--7. 1. "            IP_CFG              ,IP block configuration options"
newline
base ad:0x1FF0000
width 33.
group.long 0x60++0x03 "Pin Control Registers"
line.long 0x00 "DCFG_PIN_CTRL_PIN_CTRL_DDRCLKDR,DDR Clock Disable Register"
bitfld.long 0x00 21. " D1_MCK0_DIS  ,DDR controller 1 clock 0 disable" "No,Yes"
bitfld.long 0x00 20. "  D1_MCK1_DIS  ,DDR controller 1 clock 1 disable" "No,Yes"
bitfld.long 0x00 19. "  D1_MCK2_DIS ,DDR controller 1 clock 2 disable" "No,Yes"
bitfld.long 0x00 18. "  D1_MCK3_DIS ,DDR controller 1 clock 3 disable" "No,Yes"
newline
bitfld.long 0x00 15. " D2_MCK0_DIS  ,DDR controller 2 clock 0 disable" "No,Yes"
bitfld.long 0x00 14. "  D2_MCK1_DIS  ,DDR controller 2 clock 1 disable" "No,Yes"
bitfld.long 0x00 13. "  D2_MCK2_DIS ,DDR controller 2 clock 2 disable" "No,Yes"
bitfld.long 0x00 12. "  D2_MCK3_DIS ,DDR controller 2 clock 3 disable" "No,Yes"
group.long 0x68++0x03
line.long 0x00 "DCFG_PIN_CTRL_PIN_CTRL_IFCCLKDR,IFC Clock Disable Register"
bitfld.long 0x00 2. " IFC_CLK0_DIS ,IFC clock 0 disable" "No,Yes"
bitfld.long 0x00 1. "  IFC_CLK1_DIS ,IFC clock 1 disable" "No,Yes"
width 0x0B
tree.end
tree "SCFG (Supplemental Configuration Unit)"
base ad:0x01FC0000
endian.be
width 18.
group.long 0x00++0x07
line.long 0x00 "SCFG_USB3PRM1CR,USB3 Parameter 1 Control Register"
bitfld.long 0x00 22.--25. " TXVREFTUNE      ,Drives the value of USB3 TXVREFTUNE signal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 6.--8. "    SQRXTUNE     ,Drives the value of USB3 SQRXTUNE signal" "0,1,2,3,4,5,6,7"
line.long 0x04 "SCFG_USB3PRM2CR,USB3 Parameter 2 Control Register"
hexmask.long.byte 0x04 16.--22. 1. " PCSTXSWINGFULL  ,Drives the value of USB3 pcs_tx_swing_full signal"
group.long 0x0C++0x03
line.long 0x00 "SCFG_USB3CLKCTLR,USB3 Clock Control Register"
hexmask.long.word 0x00 16.--24. 1. " SSC_REF_CLK_SEL ,Drives the ssc_ref_clk_sel[8:0] input to USB PHY"
bitfld.long 0x00 8.--10. "  SSC_RANGE    ,Drives the ssc_range[2:0] input to USB3 PHY" "0,1,2,3,4,5,6,7"
newline
hexmask.long.byte 0x00 1.--7. 1. " MPLL_MULTIPLIER ,Drives mpll_multiplier[6:0] input to USB3 PHY"
bitfld.long 0x00 0. "    REF_CLKDIV_2 ,Drives ref_clkdiv2 input to USB3 PHY" "0,1"
endian.le
width 0x0B
tree.end
tree "DPAA2 (Data Path Acceleration Architecture)"
tree.open "QBMAN (Queue/Buffer Manager)"
tree "QMAN_CCSR"
base ad:0x08180000
width 19.
if (((per.l(ad:0x08180000+0x04))&0x01)==0x01)
group.long 0x00++0x03
line.long 0x00 "SWP_CCSR_IDX,Software Portals CCSR Index Register"
hexmask.long.word 0x00 0.--9. 1. " SWP_IDX ,Software portal index"
else
hgroup.long 0x00++0x03
hide.long 0x00 "SWP_CCSR_IDX,Software Portals CCSR Index Register"
endif
group.long 0x04++0x0B
line.long 0x00 "SWP_CCSR_IDX_LOCK,Software Portals CCSR Index Lock"
eventfld.long 0x00 0. " L       ,Lock bit" "Not locked,Locked"
line.long 0x04 "SWP_CCSR_CFG,Software Portal CCSR Configuration Register"
bitfld.long 0x04 31. " E       ,Portal enable" "Disabled,Enabled"
bitfld.long 0x04 30. "    R     ,Portal reset" "No reset,Reset"
bitfld.long 0x04 29. "  BDI ,Bypass DPAA resource isolation disable" "No,Yes"
newline
bitfld.long 0x04 28. " VA      ,Virtual address" "Physical,Virtual"
hexmask.long.byte 0x04 16.--23. 1. "    SDEST ,Stashing destination"
bitfld.long 0x04 15. "        PL  ,Privilege level" "0,1"
newline
hexmask.long.word 0x04 0.--14. 1. " ICID    ,Isolation context ID"
newline
line.long 0x08 "SWP_DD_CFG,Software Portal Dynamic Debug Configuration"
bitfld.long 0x08 29. " EMM      ,Enqueue marking mode" "Overwrite mode,Bitwise OR mode"
bitfld.long 0x08 28. "                               EM       ,Enqueue marking" "Disabled,Enabled"
bitfld.long 0x08 27. "              TP1_T    ,Trace point 1 type" "Command trace point,Complete trace point"
newline
bitfld.long 0x08 24.--26. " TP1_CFG  ,Trace point 1 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x08 20.--23. "  TP1_MASK ,Trace point 1 mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 16.--19. "                    TP1_CMPV ,Trace point 1 compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 12.--15. " EMDD     ,Enqueue marking DD code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 11. "                                            TP0_T    ,Trace point 0 type" "Command trace point,Complete trace point"
bitfld.long 0x08 8.--10. "  TP0_CFG  ,Trace point 0 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
newline
bitfld.long 0x08 4.--7. " TP0_MASK ,Trace point 0 mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                                            TP0_CMPV ,Trace point 0 compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 13.
tree "Software Portal Static Dequeue Mapping Registers"
if (((per.l(ad:0x08180000+0x10))&0x10000)==0x10000)
group.long 0x10++0x03
line.long 0x00 "SWP_SDQMR0,Software Portal Static Dequeue Mapping Register 0"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x10++0x03
line.long 0x00 "SWP_SDQMR0,Software Portal Static Dequeue Mapping Register 0"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x14))&0x10000)==0x10000)
group.long 0x14++0x03
line.long 0x00 "SWP_SDQMR1,Software Portal Static Dequeue Mapping Register 1"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x14++0x03
line.long 0x00 "SWP_SDQMR1,Software Portal Static Dequeue Mapping Register 1"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x18))&0x10000)==0x10000)
group.long 0x18++0x03
line.long 0x00 "SWP_SDQMR2,Software Portal Static Dequeue Mapping Register 2"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x18++0x03
line.long 0x00 "SWP_SDQMR2,Software Portal Static Dequeue Mapping Register 2"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x1C))&0x10000)==0x10000)
group.long 0x1C++0x03
line.long 0x00 "SWP_SDQMR3,Software Portal Static Dequeue Mapping Register 3"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x1C++0x03
line.long 0x00 "SWP_SDQMR3,Software Portal Static Dequeue Mapping Register 3"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x20))&0x10000)==0x10000)
group.long 0x20++0x03
line.long 0x00 "SWP_SDQMR4,Software Portal Static Dequeue Mapping Register 4"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x20++0x03
line.long 0x00 "SWP_SDQMR4,Software Portal Static Dequeue Mapping Register 4"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x24))&0x10000)==0x10000)
group.long 0x24++0x03
line.long 0x00 "SWP_SDQMR5,Software Portal Static Dequeue Mapping Register 5"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x24++0x03
line.long 0x00 "SWP_SDQMR5,Software Portal Static Dequeue Mapping Register 5"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x28))&0x10000)==0x10000)
group.long 0x28++0x03
line.long 0x00 "SWP_SDQMR6,Software Portal Static Dequeue Mapping Register 6"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x28++0x03
line.long 0x00 "SWP_SDQMR6,Software Portal Static Dequeue Mapping Register 6"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x2C))&0x10000)==0x10000)
group.long 0x2C++0x03
line.long 0x00 "SWP_SDQMR7,Software Portal Static Dequeue Mapping Register 7"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x2C++0x03
line.long 0x00 "SWP_SDQMR7,Software Portal Static Dequeue Mapping Register 7"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x30))&0x10000)==0x10000)
group.long 0x30++0x03
line.long 0x00 "SWP_SDQMR8,Software Portal Static Dequeue Mapping Register 8"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x30++0x03
line.long 0x00 "SWP_SDQMR8,Software Portal Static Dequeue Mapping Register 8"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x34))&0x10000)==0x10000)
group.long 0x34++0x03
line.long 0x00 "SWP_SDQMR9,Software Portal Static Dequeue Mapping Register 9"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x34++0x03
line.long 0x00 "SWP_SDQMR9,Software Portal Static Dequeue Mapping Register 9"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x38))&0x10000)==0x10000)
group.long 0x38++0x03
line.long 0x00 "SWP_SDQMR10,Software Portal Static Dequeue Mapping Register 10"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x38++0x03
line.long 0x00 "SWP_SDQMR10,Software Portal Static Dequeue Mapping Register 10"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x3C))&0x10000)==0x10000)
group.long 0x3C++0x03
line.long 0x00 "SWP_SDQMR11,Software Portal Static Dequeue Mapping Register 11"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x3C++0x03
line.long 0x00 "SWP_SDQMR11,Software Portal Static Dequeue Mapping Register 11"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x40))&0x10000)==0x10000)
group.long 0x40++0x03
line.long 0x00 "SWP_SDQMR12,Software Portal Static Dequeue Mapping Register 12"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x40++0x03
line.long 0x00 "SWP_SDQMR12,Software Portal Static Dequeue Mapping Register 12"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x44))&0x10000)==0x10000)
group.long 0x44++0x03
line.long 0x00 "SWP_SDQMR13,Software Portal Static Dequeue Mapping Register 13"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x44++0x03
line.long 0x00 "SWP_SDQMR13,Software Portal Static Dequeue Mapping Register 13"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x48))&0x10000)==0x10000)
group.long 0x48++0x03
line.long 0x00 "SWP_SDQMR14,Software Portal Static Dequeue Mapping Register 14"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x48++0x03
line.long 0x00 "SWP_SDQMR14,Software Portal Static Dequeue Mapping Register 14"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x4C))&0x10000)==0x10000)
group.long 0x4C++0x03
line.long 0x00 "SWP_SDQMR15,Software Portal Static Dequeue Mapping Register 15"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "  CHAN ,Channel ID"
else
group.long 0x4C++0x03
line.long 0x00 "SWP_SDQMR15,Software Portal Static Dequeue Mapping Register 15"
bitfld.long 0x00 16. " E ,Enable" "Disabled,Enabled"
endif
tree.end
newline
width 18.
group.long 0x50++0x03
line.long 0x00 "SWP_INT_MSG,Software Portal Interrupt Message Payload Register"
hexmask.long.word 0x00 0.--15. 1. " INT_MSG ,Interrupt message payload"
group.long 0x70++0x07
line.long 0x00 "SWP_PM_CFG_A,SWP Performance Monitor Configuration A"
bitfld.long 0x00 20.--23. " DD_MASK ,DD mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "                      DD_CMPV  ,DD compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "     FE      ,Filter enable" "Disabled,Enabled"
newline
hexmask.long.word 0x00 0.--9. 1. " SWPID   ,Software portal ID"
line.long 0x04 "SWP_PM_CFG_B,SWP Performance Monitor Configuration B"
bitfld.long 0x04 20.--23. " DD_MASK ,DD mask value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                      DD_CMPV  ,DD compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 11. "     FE      ,Filter enable" "Disabled,Enabled"
newline
hexmask.long.word 0x04 0.--9. 1. " SWPID   ,Software portal ID"
group.long 0x80++0x07
line.long 0x00 "SWP_INT_MSG_BAR,SWP Interrupt Message Base Address Register"
hexmask.long 0x00 2.--31. 0x04 " ADDR    ,Interrupt message base address"
line.long 0x04 "SWP_INT_MSG_BARE,SWP Interrupt Message Base Address Register Extended"
hexmask.long.tbyte 0x04 0.--16. 0x01 " ADDR    ,Interrupt message base address"
newline
group.long 0x90++0x03
line.long 0x00 "SWP_INTW0_CFG,Software Portal Interrupt Wire 0 Configure"
bitfld.long 0x00 31. " E       ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "                SWP_IDX  ,Software portal index"
group.long (0x90+0x50)++0x03
line.long 0x00 "SWP_AR0_CMD,Software Portal Access Register Set 0 Command"
bitfld.long 0x00 31. " E       ,Command execute" "Empty/Command complete,In progress"
bitfld.long 0x00 29. "  T        ,Command type" "Read,Write"
hexmask.long.word 0x00 16.--25. 1. "  SWP_IDX ,Software portal index"
newline
bitfld.long 0x00 12. " C       ,Cache location access" "CENA,CINH"
hexmask.long.word 0x00 0.--11. 1. "                    P_OFFSET ,Offset within the portal"
group.long 0x94++0x03
line.long 0x00 "SWP_INTW1_CFG,Software Portal Interrupt Wire 1 Configure"
bitfld.long 0x00 31. " E       ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "                SWP_IDX  ,Software portal index"
group.long (0x94+0x50)++0x03
line.long 0x00 "SWP_AR1_CMD,Software Portal Access Register Set 1 Command"
bitfld.long 0x00 31. " E       ,Command execute" "Empty/Command complete,In progress"
bitfld.long 0x00 29. "  T        ,Command type" "Read,Write"
hexmask.long.word 0x00 16.--25. 1. "  SWP_IDX ,Software portal index"
newline
bitfld.long 0x00 12. " C       ,Cache location access" "CENA,CINH"
hexmask.long.word 0x00 0.--11. 1. "                    P_OFFSET ,Offset within the portal"
group.long 0x98++0x03
line.long 0x00 "SWP_INTW2_CFG,Software Portal Interrupt Wire 2 Configure"
bitfld.long 0x00 31. " E       ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "                SWP_IDX  ,Software portal index"
group.long (0x98+0x50)++0x03
line.long 0x00 "SWP_AR2_CMD,Software Portal Access Register Set 2 Command"
bitfld.long 0x00 31. " E       ,Command execute" "Empty/Command complete,In progress"
bitfld.long 0x00 29. "  T        ,Command type" "Read,Write"
hexmask.long.word 0x00 16.--25. 1. "  SWP_IDX ,Software portal index"
newline
bitfld.long 0x00 12. " C       ,Cache location access" "CENA,CINH"
hexmask.long.word 0x00 0.--11. 1. "                    P_OFFSET ,Offset within the portal"
group.long 0x9C++0x03
line.long 0x00 "SWP_INTW3_CFG,Software Portal Interrupt Wire 3 Configure"
bitfld.long 0x00 31. " E       ,Enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--9. 1. "                SWP_IDX  ,Software portal index"
group.long (0x9C+0x50)++0x03
line.long 0x00 "SWP_AR3_CMD,Software Portal Access Register Set 3 Command"
bitfld.long 0x00 31. " E       ,Command execute" "Empty/Command complete,In progress"
bitfld.long 0x00 29. "  T        ,Command type" "Read,Write"
hexmask.long.word 0x00 16.--25. 1. "  SWP_IDX ,Software portal index"
newline
bitfld.long 0x00 12. " C       ,Cache location access" "CENA,CINH"
hexmask.long.word 0x00 0.--11. 1. "                    P_OFFSET ,Offset within the portal"
width 16.
tree "Software Portal Access Registers"
group.long 0x100++0x3F
line.long 0x00 "SWP_AR0_DATA0,Software Portal Access Register Set 0 Data 0"
line.long 0x04 "SWP_AR0_DATA1,Software Portal Access Register Set 0 Data 1"
line.long 0x08 "SWP_AR0_DATA2,Software Portal Access Register Set 0 Data 2"
line.long 0x0C "SWP_AR0_DATA3,Software Portal Access Register Set 0 Data 3"
line.long 0x10 "SWP_AR0_DATA4,Software Portal Access Register Set 0 Data 4"
line.long 0x14 "SWP_AR0_DATA5,Software Portal Access Register Set 0 Data 5"
line.long 0x18 "SWP_AR0_DATA6,Software Portal Access Register Set 0 Data 6"
line.long 0x1C "SWP_AR0_DATA7,Software Portal Access Register Set 0 Data 7"
line.long 0x20 "SWP_AR0_DATA8,Software Portal Access Register Set 0 Data 8"
line.long 0x24 "SWP_AR0_DATA9,Software Portal Access Register Set 0 Data 9"
line.long 0x28 "SWP_AR0_DATA10,Software Portal Access Register Set 0 Data 10"
line.long 0x2C "SWP_AR0_DATA11,Software Portal Access Register Set 0 Data 11"
line.long 0x30 "SWP_AR0_DATA12,Software Portal Access Register Set 0 Data 12"
line.long 0x34 "SWP_AR0_DATA13,Software Portal Access Register Set 0 Data 13"
line.long 0x38 "SWP_AR0_DATA14,Software Portal Access Register Set 0 Data 14"
line.long 0x3C "SWP_AR0_DATA15,Software Portal Access Register Set 0 Data 15"
group.long 0x140++0x3F
line.long 0x00 "SWP_AR1_DATA0,Software Portal Access Register Set 1 Data 0"
line.long 0x04 "SWP_AR1_DATA1,Software Portal Access Register Set 1 Data 1"
line.long 0x08 "SWP_AR1_DATA2,Software Portal Access Register Set 1 Data 2"
line.long 0x0C "SWP_AR1_DATA3,Software Portal Access Register Set 1 Data 3"
line.long 0x10 "SWP_AR1_DATA4,Software Portal Access Register Set 1 Data 4"
line.long 0x14 "SWP_AR1_DATA5,Software Portal Access Register Set 1 Data 5"
line.long 0x18 "SWP_AR1_DATA6,Software Portal Access Register Set 1 Data 6"
line.long 0x1C "SWP_AR1_DATA7,Software Portal Access Register Set 1 Data 7"
line.long 0x20 "SWP_AR1_DATA8,Software Portal Access Register Set 1 Data 8"
line.long 0x24 "SWP_AR1_DATA9,Software Portal Access Register Set 1 Data 9"
line.long 0x28 "SWP_AR1_DATA10,Software Portal Access Register Set 1 Data 10"
line.long 0x2C "SWP_AR1_DATA11,Software Portal Access Register Set 1 Data 11"
line.long 0x30 "SWP_AR1_DATA12,Software Portal Access Register Set 1 Data 12"
line.long 0x34 "SWP_AR1_DATA13,Software Portal Access Register Set 1 Data 13"
line.long 0x38 "SWP_AR1_DATA14,Software Portal Access Register Set 1 Data 14"
line.long 0x3C "SWP_AR1_DATA15,Software Portal Access Register Set 1 Data 15"
group.long 0x180++0x3F
line.long 0x00 "SWP_AR2_DATA0,Software Portal Access Register Set 2 Data 0"
line.long 0x04 "SWP_AR2_DATA1,Software Portal Access Register Set 2 Data 1"
line.long 0x08 "SWP_AR2_DATA2,Software Portal Access Register Set 2 Data 2"
line.long 0x0C "SWP_AR2_DATA3,Software Portal Access Register Set 2 Data 3"
line.long 0x10 "SWP_AR2_DATA4,Software Portal Access Register Set 2 Data 4"
line.long 0x14 "SWP_AR2_DATA5,Software Portal Access Register Set 2 Data 5"
line.long 0x18 "SWP_AR2_DATA6,Software Portal Access Register Set 2 Data 6"
line.long 0x1C "SWP_AR2_DATA7,Software Portal Access Register Set 2 Data 7"
line.long 0x20 "SWP_AR2_DATA8,Software Portal Access Register Set 2 Data 8"
line.long 0x24 "SWP_AR2_DATA9,Software Portal Access Register Set 2 Data 9"
line.long 0x28 "SWP_AR2_DATA10,Software Portal Access Register Set 2 Data 10"
line.long 0x2C "SWP_AR2_DATA11,Software Portal Access Register Set 2 Data 11"
line.long 0x30 "SWP_AR2_DATA12,Software Portal Access Register Set 2 Data 12"
line.long 0x34 "SWP_AR2_DATA13,Software Portal Access Register Set 2 Data 13"
line.long 0x38 "SWP_AR2_DATA14,Software Portal Access Register Set 2 Data 14"
line.long 0x3C "SWP_AR2_DATA15,Software Portal Access Register Set 2 Data 15"
group.long 0x1C0++0x3F
line.long 0x00 "SWP_AR3_DATA0,Software Portal Access Register Set 3 Data 0"
line.long 0x04 "SWP_AR3_DATA1,Software Portal Access Register Set 3 Data 1"
line.long 0x08 "SWP_AR3_DATA2,Software Portal Access Register Set 3 Data 2"
line.long 0x0C "SWP_AR3_DATA3,Software Portal Access Register Set 3 Data 3"
line.long 0x10 "SWP_AR3_DATA4,Software Portal Access Register Set 3 Data 4"
line.long 0x14 "SWP_AR3_DATA5,Software Portal Access Register Set 3 Data 5"
line.long 0x18 "SWP_AR3_DATA6,Software Portal Access Register Set 3 Data 6"
line.long 0x1C "SWP_AR3_DATA7,Software Portal Access Register Set 3 Data 7"
line.long 0x20 "SWP_AR3_DATA8,Software Portal Access Register Set 3 Data 8"
line.long 0x24 "SWP_AR3_DATA9,Software Portal Access Register Set 3 Data 9"
line.long 0x28 "SWP_AR3_DATA10,Software Portal Access Register Set 3 Data 10"
line.long 0x2C "SWP_AR3_DATA11,Software Portal Access Register Set 3 Data 11"
line.long 0x30 "SWP_AR3_DATA12,Software Portal Access Register Set 3 Data 12"
line.long 0x34 "SWP_AR3_DATA13,Software Portal Access Register Set 3 Data 13"
line.long 0x38 "SWP_AR3_DATA14,Software Portal Access Register Set 3 Data 14"
line.long 0x3C "SWP_AR3_DATA15,Software Portal Access Register Set 3 Data 15"
tree.end
newline
width 21.
group.long 0x200++0x03
line.long 0x00 "QMAN_DD_CFG,QMan DD Configuration"
rbitfld.long 0x00 31. " L         ,Lossy mode" "Lossless,Lossy"
rbitfld.long 0x00 30. "       F         ,FIFO full" "Not full,Full"
bitfld.long 0x00 20. "               MM        ,Marking mode" "Overwrite,Bitwise OR"
newline
bitfld.long 0x00 16.--19. " MDD       ,Order restoration deferral marking dynamic debug code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--15. 1. "             M_CFG     ,Order restoration deferral marking configuration"
if (((per.l(ad:0x08180000+0x208))&0x01)==0x01)
rgroup.long 0x204++0x03
line.long 0x00 "SWP_DD_IDX,Software Portals DD Index Register"
bitfld.long 0x00 5.--9. " SWP_IDX   ,Software portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x204++0x03
line.long 0x00 "SWP_DD_IDX,Software Portals DD Index Register"
bitfld.long 0x00 5.--9. " SWP_IDX   ,Software portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0x208++0x03
line.long 0x00 "SWP_DD_IDX_LOCK,Software Portals DD Index Lock"
eventfld.long 0x00 0. " L         ,Lock bit" "Not locked,Locked"
if (((per.l(ad:0x08180000+0x204))&0x3E0)==0x00)
group.long 0x210++0x03
line.long 0x00 "SWP_DD_IHRSR,Software Portal DD Internal Halt Request Status"
eventfld.long 0x00 31. " IHRS[31]  ,Internal halt request status for software portal 31" "Not requested,Requested"
eventfld.long 0x00 30. "  [30]      ,Internal halt request status for software portal 30" "Not requested,Requested"
eventfld.long 0x00 29. "          [29]      ,Internal halt request status for software portal 29" "Not requested,Requested"
newline
eventfld.long 0x00 28. " [28]      ,Internal halt request status for software portal 28" "Not requested,Requested"
eventfld.long 0x00 27. "  [27]      ,Internal halt request status for software portal 27" "Not requested,Requested"
eventfld.long 0x00 26. "          [26]      ,Internal halt request status for software portal 26" "Not requested,Requested"
newline
eventfld.long 0x00 25. " [25]      ,Internal halt request status for software portal 25" "Not requested,Requested"
eventfld.long 0x00 24. "  [24]      ,Internal halt request status for software portal 24" "Not requested,Requested"
eventfld.long 0x00 23. "          [23]      ,Internal halt request status for software portal 23" "Not requested,Requested"
newline
eventfld.long 0x00 22. " [22]      ,Internal halt request status for software portal 22" "Not requested,Requested"
eventfld.long 0x00 21. "  [21]      ,Internal halt request status for software portal 21" "Not requested,Requested"
eventfld.long 0x00 20. "          [20]      ,Internal halt request status for software portal 20" "Not requested,Requested"
newline
eventfld.long 0x00 19. " [19]      ,Internal halt request status for software portal 19" "Not requested,Requested"
eventfld.long 0x00 18. "  [18]      ,Internal halt request status for software portal 18" "Not requested,Requested"
eventfld.long 0x00 17. "          [17]      ,Internal halt request status for software portal 17" "Not requested,Requested"
newline
eventfld.long 0x00 16. " [16]      ,Internal halt request status for software portal 16" "Not requested,Requested"
eventfld.long 0x00 15. "  [15]      ,Internal halt request status for software portal 15" "Not requested,Requested"
eventfld.long 0x00 14. "          [14]      ,Internal halt request status for software portal 14" "Not requested,Requested"
newline
eventfld.long 0x00 13. " [13]      ,Internal halt request status for software portal 13" "Not requested,Requested"
eventfld.long 0x00 12. "  [12]      ,Internal halt request status for software portal 12" "Not requested,Requested"
eventfld.long 0x00 11. "          [11]      ,Internal halt request status for software portal 11" "Not requested,Requested"
newline
eventfld.long 0x00 10. " [10]      ,Internal halt request status for software portal 10" "Not requested,Requested"
eventfld.long 0x00 9. "  [9]       ,Internal halt request status for software portal 9" "Not requested,Requested"
eventfld.long 0x00 8. "          [8]       ,Internal halt request status for software portal 8" "Not requested,Requested"
newline
eventfld.long 0x00 7. " [7]       ,Internal halt request status for software portal 7" "Not requested,Requested"
eventfld.long 0x00 6. "  [6]       ,Internal halt request status for software portal 6" "Not requested,Requested"
eventfld.long 0x00 5. "          [5]       ,Internal halt request status for software portal 5" "Not requested,Requested"
newline
eventfld.long 0x00 4. " [4]       ,Internal halt request status for software portal 4" "Not requested,Requested"
eventfld.long 0x00 3. "  [3]       ,Internal halt request status for software portal 3" "Not requested,Requested"
eventfld.long 0x00 2. "          [2]       ,Internal halt request status for software portal 2" "Not requested,Requested"
newline
eventfld.long 0x00 1. " [1]       ,Internal halt request status for software portal 1" "Not requested,Requested"
eventfld.long 0x00 0. "  [0]       ,Internal halt request status for software portal 0" "Not requested,Requested"
wgroup.long 0x214++0x03
line.long 0x00 "SWP_DD_IHRFR,Software Portal DD Internal Halt Request Force"
bitfld.long 0x00 31. " IHRF[31]  ,Internal halt request force for software portal 31" "Not forced,Forced"
bitfld.long 0x00 30. "     [30]      ,Internal halt request force for software portal 30" "Not forced,Forced"
bitfld.long 0x00 29. "             [29]      ,Internal halt request force for software portal 29" "Not forced,Forced"
newline
bitfld.long 0x00 28. " [28]      ,Internal halt request force for software portal 28" "Not forced,Forced"
bitfld.long 0x00 27. "     [27]      ,Internal halt request force for software portal 27" "Not forced,Forced"
bitfld.long 0x00 26. "             [26]      ,Internal halt request force for software portal 26" "Not forced,Forced"
newline
bitfld.long 0x00 25. " [25]      ,Internal halt request force for software portal 25" "Not forced,Forced"
bitfld.long 0x00 24. "     [24]      ,Internal halt request force for software portal 24" "Not forced,Forced"
bitfld.long 0x00 23. "             [23]      ,Internal halt request force for software portal 23" "Not forced,Forced"
newline
bitfld.long 0x00 22. " [22]      ,Internal halt request force for software portal 22" "Not forced,Forced"
bitfld.long 0x00 21. "     [21]      ,Internal halt request force for software portal 21" "Not forced,Forced"
bitfld.long 0x00 20. "             [20]      ,Internal halt request force for software portal 20" "Not forced,Forced"
newline
bitfld.long 0x00 19. " [19]      ,Internal halt request force for software portal 19" "Not forced,Forced"
bitfld.long 0x00 18. "     [18]      ,Internal halt request force for software portal 18" "Not forced,Forced"
bitfld.long 0x00 17. "             [17]      ,Internal halt request force for software portal 17" "Not forced,Forced"
newline
bitfld.long 0x00 16. " [16]      ,Internal halt request force for software portal 16" "Not forced,Forced"
bitfld.long 0x00 15. "     [15]      ,Internal halt request force for software portal 15" "Not forced,Forced"
bitfld.long 0x00 14. "             [14]      ,Internal halt request force for software portal 14" "Not forced,Forced"
newline
bitfld.long 0x00 13. " [13]      ,Internal halt request force for software portal 13" "Not forced,Forced"
bitfld.long 0x00 12. "     [12]      ,Internal halt request force for software portal 12" "Not forced,Forced"
bitfld.long 0x00 11. "             [11]      ,Internal halt request force for software portal 11" "Not forced,Forced"
newline
bitfld.long 0x00 10. " [10]      ,Internal halt request force for software portal 10" "Not forced,Forced"
bitfld.long 0x00 9. "     [9]       ,Internal halt request force for software portal 9" "Not forced,Forced"
bitfld.long 0x00 8. "             [8]       ,Internal halt request force for software portal 8" "Not forced,Forced"
newline
bitfld.long 0x00 7. " [7]       ,Internal halt request force for software portal 7" "Not forced,Forced"
bitfld.long 0x00 6. "     [6]       ,Internal halt request force for software portal 6" "Not forced,Forced"
bitfld.long 0x00 5. "             [5]       ,Internal halt request force for software portal 5" "Not forced,Forced"
newline
bitfld.long 0x00 4. " [4]       ,Internal halt request force for software portal 4" "Not forced,Forced"
bitfld.long 0x00 3. "     [3]       ,Internal halt request force for software portal 3" "Not forced,Forced"
bitfld.long 0x00 2. "             [2]       ,Internal halt request force for software portal 2" "Not forced,Forced"
newline
bitfld.long 0x00 1. " [1]       ,Internal halt request force for software portal 1" "Not forced,Forced"
bitfld.long 0x00 0. "     [0]       ,Internal halt request force for software portal 0" "Not forced,Forced"
rgroup.long 0x218++0x03
line.long 0x00 "SWP_DD_HASR,Software Portal DD Halt Acknowledge Status"
bitfld.long 0x00 31. " HAS[31]   ,Halt acknowledge status for software portal 31" "Not halted,Halted"
bitfld.long 0x00 30. "     [30]      ,Halt acknowledge status for software portal 30" "Not halted,Halted"
bitfld.long 0x00 29. "             [29]      ,Halt acknowledge status for software portal 29" "Not halted,Halted"
newline
bitfld.long 0x00 28. " [28]      ,Halt acknowledge status for software portal 28" "Not halted,Halted"
bitfld.long 0x00 27. "     [27]      ,Halt acknowledge status for software portal 27" "Not halted,Halted"
bitfld.long 0x00 26. "             [26]      ,Halt acknowledge status for software portal 26" "Not halted,Halted"
newline
bitfld.long 0x00 25. " [25]      ,Halt acknowledge status for software portal 25" "Not halted,Halted"
bitfld.long 0x00 24. "     [24]      ,Halt acknowledge status for software portal 24" "Not halted,Halted"
bitfld.long 0x00 23. "             [23]      ,Halt acknowledge status for software portal 23" "Not halted,Halted"
newline
bitfld.long 0x00 22. " [22]      ,Halt acknowledge status for software portal 22" "Not halted,Halted"
bitfld.long 0x00 21. "     [21]      ,Halt acknowledge status for software portal 21" "Not halted,Halted"
bitfld.long 0x00 20. "             [20]      ,Halt acknowledge status for software portal 20" "Not halted,Halted"
newline
bitfld.long 0x00 19. " [19]      ,Halt acknowledge status for software portal 19" "Not halted,Halted"
bitfld.long 0x00 18. "     [18]      ,Halt acknowledge status for software portal 18" "Not halted,Halted"
bitfld.long 0x00 17. "             [17]      ,Halt acknowledge status for software portal 17" "Not halted,Halted"
newline
bitfld.long 0x00 16. " [16]      ,Halt acknowledge status for software portal 16" "Not halted,Halted"
bitfld.long 0x00 15. "     [15]      ,Halt acknowledge status for software portal 15" "Not halted,Halted"
bitfld.long 0x00 14. "             [14]      ,Halt acknowledge status for software portal 14" "Not halted,Halted"
newline
bitfld.long 0x00 13. " [13]      ,Halt acknowledge status for software portal 13" "Not halted,Halted"
bitfld.long 0x00 12. "     [12]      ,Halt acknowledge status for software portal 12" "Not halted,Halted"
bitfld.long 0x00 11. "             [11]      ,Halt acknowledge status for software portal 11" "Not halted,Halted"
newline
bitfld.long 0x00 10. " [10]      ,Halt acknowledge status for software portal 10" "Not halted,Halted"
bitfld.long 0x00 9. "     [9]       ,Halt acknowledge status for software portal 9" "Not halted,Halted"
bitfld.long 0x00 8. "             [8]       ,Halt acknowledge status for software portal 8" "Not halted,Halted"
newline
bitfld.long 0x00 7. " [7]       ,Halt acknowledge status for software portal 7" "Not halted,Halted"
bitfld.long 0x00 6. "     [6]       ,Halt acknowledge status for software portal 6" "Not halted,Halted"
bitfld.long 0x00 5. "             [5]       ,Halt acknowledge status for software portal 5" "Not halted,Halted"
newline
bitfld.long 0x00 4. " [4]       ,Halt acknowledge status for software portal 4" "Not halted,Halted"
bitfld.long 0x00 3. "     [3]       ,Halt acknowledge status for software portal 3" "Not halted,Halted"
bitfld.long 0x00 2. "             [2]       ,Halt acknowledge status for software portal 2" "Not halted,Halted"
newline
bitfld.long 0x00 1. " [1]       ,Halt acknowledge status for software portal 1" "Not halted,Halted"
bitfld.long 0x00 0. "     [0]       ,Halt acknowledge status for software portal 0" "Not halted,Halted"
elif (((per.l(ad:0x08180000+0x204))&0x3E0)==0x10)
group.long 0x210++0x03
line.long 0x00 "SWP_DD_IHRSR,Software Portal DD Internal Halt Request Status"
eventfld.long 0x00 31. " IHRS[35]  ,Internal halt request status for software portal 35" "Not requested,Requested"
eventfld.long 0x00 30. "  [34]      ,Internal halt request status for software portal 34" "Not requested,Requested"
eventfld.long 0x00 29. "          [33]      ,Internal halt request status for software portal 33" "Not requested,Requested"
newline
eventfld.long 0x00 28. " [32]      ,Internal halt request status for software portal 32" "Not requested,Requested"
wgroup.long 0x214++0x03
line.long 0x00 "SWP_DD_IHRFR,Software Portal DD Internal Halt Request Force"
bitfld.long 0x00 31. " IHRF[35]  ,Internal halt request force for software portal 35" "Not forced,Forced"
bitfld.long 0x00 30. "     [34]      ,Internal halt request force for software portal 34" "Not forced,Forced"
bitfld.long 0x00 29. "             [33]      ,Internal halt request force for software portal 33" "Not forced,Forced"
newline
bitfld.long 0x00 28. " [32]      ,Internal halt request force for software portal 32" "Not forced,Forced"
rgroup.long 0x218++0x03
line.long 0x00 "SWP_DD_HASR,Software Portal DD Halt Acknowledge Status"
bitfld.long 0x00 31. " HAS[35]   ,Halt acknowledge status for software portal 35" "Not halted,Halted"
bitfld.long 0x00 30. "     [34]      ,Halt acknowledge status for software portal 34" "Not halted,Halted"
bitfld.long 0x00 29. "             [33]      ,Halt acknowledge status for software portal 33" "Not halted,Halted"
newline
bitfld.long 0x00 28. " [32]      ,Halt acknowledge status for software portal 32" "Not halted,Halted"
else
hgroup.long 0x210++0x03
hide.long 0x00 "SWP_DD_IHRSR,Software Portal DD Internal Halt Request Status"
hgroup.long 0x214++0x03
hide.long 0x00 "SWP_DD_IHRFR,Software Portal DD Internal Halt Request Force"
hgroup.long 0x218++0x03
hide.long 0x00 "SWP_DD_HASR,Software Portal DD Halt Acknowledge Status"
endif
group.long 0x220++0x03
line.long 0x00 "DCP_DD_IHRSR,DCP DD Internal Halt Request Status"
eventfld.long 0x00 15. " IHRS[15]  ,Internal halt request status for direct connect portal 15" "Not requested,Requested"
eventfld.long 0x00 14. "  [14]      ,Internal halt request status for direct connect portal 14" "Not requested,Requested"
eventfld.long 0x00 13. "          [13]      ,Internal halt request status for direct connect portal 13" "Not requested,Requested"
newline
eventfld.long 0x00 12. " [12]      ,Internal halt request status for direct connect portal 12" "Not requested,Requested"
eventfld.long 0x00 11. "  [11]      ,Internal halt request status for direct connect portal 11" "Not requested,Requested"
eventfld.long 0x00 10. "          [10]      ,Internal halt request status for direct connect portal 10" "Not requested,Requested"
newline
eventfld.long 0x00 9. " [9]       ,Internal halt request status for direct connect portal 9" "Not requested,Requested"
eventfld.long 0x00 8. "  [8]       ,Internal halt request status for direct connect portal 8" "Not requested,Requested"
eventfld.long 0x00 7. "          [7]       ,Internal halt request status for direct connect portal 7" "Not requested,Requested"
newline
eventfld.long 0x00 6. " [6]       ,Internal halt request status for direct connect portal 6" "Not requested,Requested"
eventfld.long 0x00 5. "  [5]       ,Internal halt request status for direct connect portal 5" "Not requested,Requested"
eventfld.long 0x00 4. "          [4]       ,Internal halt request status for direct connect portal 4" "Not requested,Requested"
newline
eventfld.long 0x00 3. " [3]       ,Internal halt request status for direct connect portal 3" "Not requested,Requested"
eventfld.long 0x00 2. "  [2]       ,Internal halt request status for direct connect portal 2" "Not requested,Requested"
eventfld.long 0x00 1. "          [1]       ,Internal halt request status for direct connect portal 1" "Not requested,Requested"
newline
eventfld.long 0x00 0. " [0]       ,Internal halt request status for direct connect portal 0" "Not requested,Requested"
wgroup.long 0x224++0x03
line.long 0x00 "DCP_DD_IHRFR,DCP DD Internal Halt Request Force"
bitfld.long 0x00 15. " IHRF[15]  ,Internal halt request force for direct connect portal 15" "Not forced,Forced"
bitfld.long 0x00 14. "     [14]      ,Internal halt request force for direct connect portal 14" "Not forced,Forced"
bitfld.long 0x00 13. "             [13]      ,Internal halt request force for direct connect portal 13" "Not forced,Forced"
newline
bitfld.long 0x00 12. " [12]      ,Internal halt request force for direct connect portal 12" "Not forced,Forced"
bitfld.long 0x00 11. "     [11]      ,Internal halt request force for direct connect portal 11" "Not forced,Forced"
bitfld.long 0x00 10. "             [10]      ,Internal halt request force for direct connect portal 10" "Not forced,Forced"
newline
bitfld.long 0x00 9. " [9]       ,Internal halt request force for direct connect portal 9" "Not forced,Forced"
bitfld.long 0x00 8. "     [8]       ,Internal halt request force for direct connect portal 8" "Not forced,Forced"
bitfld.long 0x00 7. "             [7]       ,Internal halt request force for direct connect portal 7" "Not forced,Forced"
newline
bitfld.long 0x00 6. " [6]       ,Internal halt request force for direct connect portal 6" "Not forced,Forced"
bitfld.long 0x00 5. "     [5]       ,Internal halt request force for direct connect portal 5" "Not forced,Forced"
bitfld.long 0x00 4. "             [4]       ,Internal halt request force for direct connect portal 4" "Not forced,Forced"
newline
bitfld.long 0x00 3. " [3]       ,Internal halt request force for direct connect portal 3" "Not forced,Forced"
bitfld.long 0x00 2. "     [2]       ,Internal halt request force for direct connect portal 2" "Not forced,Forced"
bitfld.long 0x00 1. "             [1]       ,Internal halt request force for direct connect portal 1" "Not forced,Forced"
newline
bitfld.long 0x00 0. " [0]       ,Internal halt request force for direct connect portal 0" "Not forced,Forced"
rgroup.long 0x228++0x03
line.long 0x00 "SWP_DD_HASR,Software Portal DD Halt Acknowledge Status"
bitfld.long 0x00 15. " HAS[15]   ,Halt acknowledge status for direct connect portal 15" "Not halted,Halted"
bitfld.long 0x00 14. "     [14]      ,Halt acknowledge status for direct connect portal 14" "Not halted,Halted"
bitfld.long 0x00 13. "             [13]      ,Halt acknowledge status for direct connect portal 13" "Not halted,Halted"
newline
bitfld.long 0x00 12. " [12]      ,Halt acknowledge status for direct connect portal 12" "Not halted,Halted"
bitfld.long 0x00 11. "     [11]      ,Halt acknowledge status for direct connect portal 11" "Not halted,Halted"
bitfld.long 0x00 10. "             [10]      ,Halt acknowledge status for direct connect portal 10" "Not halted,Halted"
newline
bitfld.long 0x00 9. " [9]       ,Halt acknowledge status for direct connect portal 9" "Not halted,Halted"
bitfld.long 0x00 8. "     [8]       ,Halt acknowledge status for direct connect portal 8" "Not halted,Halted"
bitfld.long 0x00 7. "             [7]       ,Halt acknowledge status for direct connect portal 7" "Not halted,Halted"
newline
bitfld.long 0x00 6. " [6]       ,Halt acknowledge status for direct connect portal 6" "Not halted,Halted"
bitfld.long 0x00 5. "     [5]       ,Halt acknowledge status for direct connect portal 5" "Not halted,Halted"
bitfld.long 0x00 4. "             [4]       ,Halt acknowledge status for direct connect portal 4" "Not halted,Halted"
newline
bitfld.long 0x00 3. " [3]       ,Halt acknowledge status for direct connect portal 3" "Not halted,Halted"
bitfld.long 0x00 2. "     [2]       ,Halt acknowledge status for direct connect portal 2" "Not halted,Halted"
bitfld.long 0x00 1. "             [1]       ,Halt acknowledge status for direct connect portal 1" "Not halted,Halted"
newline
bitfld.long 0x00 0. " [0]       ,Halt acknowledge status for direct connect portal 0" "Not halted,Halted"
if (((per.l(ad:0x08180000+0x230))&0x8000000)==0x8000000)
if (((per.l(ad:0x08180000+0x230))&0x4000000)==0x4000000)
group.long 0x230++0x03
line.long 0x00 "FQ_PM_CFG_A,FQ Performance Monitor Configuration A"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       T         ,Type" "FQID or a CEETM LFQID,CEETM Class Queue"
bitfld.long 0x00 20.--21. "  IID       ,Instance ID" "0,1,2,3"
newline
bitfld.long 0x00 16.--19. " DCPID     ,DCP portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--8. 1. "             CQID      ,Identifies the particular CQ"
else
group.long 0x230++0x03
line.long 0x00 "FQ_PM_CFG_A,FQ Performance Monitor Configuration A"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       T         ,Type" "FQID or a CEETM LFQID,CEETM Class Queue"
hexmask.long.tbyte 0x00 0.--23. 1. "  FQID      ,FQID for filtering the FQ PM events in group A/B"
endif
else
group.long 0x230++0x03
line.long 0x00 "FQ_PM_CFG_A,FQ Performance Monitor Configuration A"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x08180000+0x234))&0x8000000)==0x8000000)
if (((per.l(ad:0x08180000+0x234))&0x4000000)==0x4000000)
group.long 0x234++0x03
line.long 0x00 "FQ_PM_CFG_B,FQ Performance Monitor Configuration B"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       T         ,Type" "FQID or a CEETM LFQID,CEETM Class Queue"
bitfld.long 0x00 20.--21. "  IID       ,Instance ID" "0,1,2,3"
newline
bitfld.long 0x00 16.--19. " DCPID     ,DCP portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x00 0.--8. 1. "             CQID      ,Identifies the particular CQ"
else
group.long 0x234++0x03
line.long 0x00 "FQ_PM_CFG_B,FQ Performance Monitor Configuration B"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       T         ,Type" "FQID or a CEETM LFQID,CEETM Class Queue"
hexmask.long.tbyte 0x00 0.--23. 1. "  FQID      ,FQID for filtering the FQ PM events in group A/B"
endif
else
group.long 0x234++0x03
line.long 0x00 "FQ_PM_CFG_B,FQ Performance Monitor Configuration B"
bitfld.long 0x00 27. " FE        ,Filter enable" "Disabled,Enabled"
endif
group.long 0x238++0x03
line.long 0x00 "FQ_PM_DD_CFG,FQ Dynamic Debug Configuration"
bitfld.long 0x00 20.--23. " DD_MASK_B ,DD mask value for FQ PM events group B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "             DD_CMPV_B ,DD compare value for FQ PM events group B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "                     DD_MASK_A ,DD mask value for FQ PM events group A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " DD_CMPV_A ,DD compare value for FQ PM events group A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
group.long 0x270++0x03
line.long 0x00 "QMAN_PM_CNT_CFG0,QMan PM Counter Configuration 0"
bitfld.long 0x00 29.--31. " PMGS3 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 24.--28. "  PMES3 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 21.--23. " PMGS2 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 16.--20. "  PMES2 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 13.--15. " PMGS1 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 8.--12. "  PMES1 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 5.--7. " PMGS0 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 0.--4. "  PMES0 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
group.long 0x4E4++0x03
line.long 0x00 "QMAN_PM_CNT_CFG1,QMan PM Counter Configuration 1"
bitfld.long 0x00 29.--31. " PMGS3 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 24.--28. "  PMES3 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 21.--23. " PMGS2 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 16.--20. "  PMES2 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 13.--15. " PMGS1 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 8.--12. "  PMES1 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
newline
bitfld.long 0x00 5.--7. " PMGS0 ,PM group select" "SWP PM A,SWP PM B,DCP PM A,DCP PM B,FQ PM A,FQ PM B,General PM group,?..."
bitfld.long 0x00 0.--4. "  PMES0 ,PM event select" "Enqueue command count,Dequeued frame count in DQRR,EQCR full count,DQRR full count,Enqueue sequence dispatch count,Enqueue sequence dispatch count when FIFO full,Dequeue sequence completed with 1 or more frames count,Dequeue sequence completed with 2 or more frames count,Dequeue sequence completed with 3 frames count,Enqueue rejections total count,FQ enqueue rejections WRED count,FQ enqueue rejections Congestion Group Tail Drop count,FQ enqueue rejections FQ Tail Drop count,PFDR in use read count,PFDR in use write count,Marked Frame Enqueue count,Marked Frame Dequeue count,Marked Frame leaving OPR count,Dequeued frame count,?..."
width 21.
tree "QMan Performance Monitor Counter Registers"
group.long 0x280++0x07
line.long 0x00 "QMAN_PM_CNT0_LO,QMan Performance Monitor Counter 0"
line.long 0x04 "QMAN_PM_CNT0_HI,QMan Performance Monitor Counter 0"
group.long 0x284++0x07
line.long 0x00 "QMAN_PM_CNT1_LO,QMan Performance Monitor Counter 1"
line.long 0x04 "QMAN_PM_CNT1_HI,QMan Performance Monitor Counter 1"
group.long 0x288++0x07
line.long 0x00 "QMAN_PM_CNT2_LO,QMan Performance Monitor Counter 2"
line.long 0x04 "QMAN_PM_CNT2_HI,QMan Performance Monitor Counter 2"
group.long 0x28C++0x07
line.long 0x00 "QMAN_PM_CNT3_LO,QMan Performance Monitor Counter 3"
line.long 0x04 "QMAN_PM_CNT3_HI,QMan Performance Monitor Counter 3"
group.long 0x290++0x07
line.long 0x00 "QMAN_PM_CNT4_LO,QMan Performance Monitor Counter 4"
line.long 0x04 "QMAN_PM_CNT4_HI,QMan Performance Monitor Counter 4"
group.long 0x294++0x07
line.long 0x00 "QMAN_PM_CNT5_LO,QMan Performance Monitor Counter 5"
line.long 0x04 "QMAN_PM_CNT5_HI,QMan Performance Monitor Counter 5"
group.long 0x298++0x07
line.long 0x00 "QMAN_PM_CNT6_LO,QMan Performance Monitor Counter 6"
line.long 0x04 "QMAN_PM_CNT6_HI,QMan Performance Monitor Counter 6"
group.long 0x29C++0x07
line.long 0x00 "QMAN_PM_CNT7_LO,QMan Performance Monitor Counter 7"
line.long 0x04 "QMAN_PM_CNT7_HI,QMan Performance Monitor Counter 7"
group.long 0x2A0++0x07
line.long 0x00 "QMAN_PM_CNT8_LO,QMan Performance Monitor Counter 8"
line.long 0x04 "QMAN_PM_CNT8_HI,QMan Performance Monitor Counter 8"
group.long 0x2A4++0x07
line.long 0x00 "QMAN_PM_CNT9_LO,QMan Performance Monitor Counter 9"
line.long 0x04 "QMAN_PM_CNT9_HI,QMan Performance Monitor Counter 9"
group.long 0x2A8++0x07
line.long 0x00 "QMAN_PM_CNT10_LO,QMan Performance Monitor Counter 10"
line.long 0x04 "QMAN_PM_CNT10_HI,QMan Performance Monitor Counter 10"
group.long 0x2AC++0x07
line.long 0x00 "QMAN_PM_CNT11_LO,QMan Performance Monitor Counter 11"
line.long 0x04 "QMAN_PM_CNT11_HI,QMan Performance Monitor Counter 11"
group.long 0x2B0++0x07
line.long 0x00 "QMAN_PM_CNT12_LO,QMan Performance Monitor Counter 12"
line.long 0x04 "QMAN_PM_CNT12_HI,QMan Performance Monitor Counter 12"
group.long 0x2B4++0x07
line.long 0x00 "QMAN_PM_CNT13_LO,QMan Performance Monitor Counter 13"
line.long 0x04 "QMAN_PM_CNT13_HI,QMan Performance Monitor Counter 13"
group.long 0x2B8++0x07
line.long 0x00 "QMAN_PM_CNT14_LO,QMan Performance Monitor Counter 14"
line.long 0x04 "QMAN_PM_CNT14_HI,QMan Performance Monitor Counter 14"
group.long 0x2BC++0x07
line.long 0x00 "QMAN_PM_CNT15_LO,QMan Performance Monitor Counter 15"
line.long 0x04 "QMAN_PM_CNT15_HI,QMan Performance Monitor Counter 15"
group.long 0x2C0++0x03
line.long 0x00 "QMAN_PM_CNT0_LO_RR,QMan Performance Monitor Counter 0"
group.long 0x2C4++0x03
line.long 0x00 "QMAN_PM_CNT1_LO_RR,QMan Performance Monitor Counter 1"
group.long 0x2C8++0x03
line.long 0x00 "QMAN_PM_CNT2_LO_RR,QMan Performance Monitor Counter 2"
group.long 0x2CC++0x03
line.long 0x00 "QMAN_PM_CNT3_LO_RR,QMan Performance Monitor Counter 3"
group.long 0x2D0++0x03
line.long 0x00 "QMAN_PM_CNT4_LO_RR,QMan Performance Monitor Counter 4"
group.long 0x2D4++0x03
line.long 0x00 "QMAN_PM_CNT5_LO_RR,QMan Performance Monitor Counter 5"
group.long 0x2D8++0x03
line.long 0x00 "QMAN_PM_CNT6_LO_RR,QMan Performance Monitor Counter 6"
group.long 0x2DC++0x03
line.long 0x00 "QMAN_PM_CNT7_LO_RR,QMan Performance Monitor Counter 7"
tree.end
newline
width 20.
if (((per.l(ad:0x08180000+0x304))&0x01)==0x01)
rgroup.long 0x300++0x03
line.long 0x00 "DCP_CFG_IDX,DCP Configuration Index Register"
bitfld.long 0x00 8.--13. " SPID ,Sub-Portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--3. "          DCP_IDX ,DCP portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x300++0x03
line.long 0x00 "DCP_CFG_IDX,DCP Configuration Index Register"
bitfld.long 0x00 8.--13. " SPID ,Sub-Portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--3. "          DCP_IDX ,DCP portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x304++0x03
line.long 0x00 "DCP_CFG_IDX_LOCK,DCP Configuration Index Lock"
eventfld.long 0x00 0. " L    ,Lock bit" "Not locked,Locked"
newline
group.long 0x308++0x03
line.long 0x00 "DCP_DD_CFG,DCP Dynamic Debug Configuration"
bitfld.long 0x00 24.--26. " TP1_CFG ,Trace point 1 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x00 23. "  TP1_MASK[3] ,Trace point 1 mask 3" "0,1"
bitfld.long 0x00 22. "  [2]         ,Trace point 1 mask 2" "0,1"
newline
bitfld.long 0x00 21. " [1]     ,Trace point 1 mask 1" "0,1"
bitfld.long 0x00 20. "                                             [0]         ,Trace point 1 mask 0" "0,1"
bitfld.long 0x00 19. "  TP1_CMPV[3] ,Trace point 1 compare 3" "0,1"
newline
bitfld.long 0x00 18. " [2]     ,Trace point 1 compare 2" "0,1"
bitfld.long 0x00 17. "                                             [1]         ,Trace point 1 compare 1" "0,1"
bitfld.long 0x00 16. "  [0]         ,Trace point 1 compare 0" "0,1"
newline
bitfld.long 0x00 8.--10. " TP0_CFG ,Trace point 0 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x00 7. "  TP0_MASK[3] ,Trace point 0 mask 3" "0,1"
bitfld.long 0x00 6. "  [2]         ,Trace point 0 mask 2" "0,1"
newline
bitfld.long 0x00 5. " [1]     ,Trace point 0 mask 1" "0,1"
bitfld.long 0x00 4. "                                             [0]         ,Trace point 0 mask 0" "0,1"
bitfld.long 0x00 3. "  TP0_CMPV[3] ,Trace point 0 compare 3" "0,1"
newline
bitfld.long 0x00 2. " [2]     ,Trace point 0 compare 2" "0,1"
bitfld.long 0x00 1. "                                             [1]         ,Trace point 0 compare 1" "0,1"
bitfld.long 0x00 0. "  [0]         ,Trace point 0 compare 0" "0,1"
newline
group.long 0x310++0x03
line.long 0x00 "DCP_PM_CFG,DCP Performance Monitor Configuration"
bitfld.long 0x00 31. " DD_MASK_B[3] ,DD mask 3 for DCP PM events group B" "0,1"
bitfld.long 0x00 30. "                    [2]           ,DD mask 2 for DCP PM events group B" "0,1"
bitfld.long 0x00 29. "                [1]          ,DD mask 1 for DCP PM events group B" "0,1"
newline
bitfld.long 0x00 28. " [0]          ,DD mask 0 for DCP PM events group B" "0,1"
bitfld.long 0x00 27. "                    DD_CMPV_B[3]  ,DD compare 3 for DCP PM events group B" "0,1"
bitfld.long 0x00 26. "                [2]          ,DD compare 2 for DCP PM events group B" "0,1"
newline
bitfld.long 0x00 25. " [1]          ,DD compare 1 for DCP PM events group B" "0,1"
bitfld.long 0x00 24. "                    [0]           ,DD compare 0 for DCP PM events group B" "0,1"
bitfld.long 0x00 23. "                FEB          ,Filter enable B" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--19. " DCPID_B      ,Direct connect portal ID for filtering the DCP PM events in group B" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 15. "                   DD_MASK_A[3]  ,DD mask 3 for DCP PM events group A" "0,1"
bitfld.long 0x00 14. "                [2]          ,DD mask 2 for DCP PM events group A" "0,1"
newline
bitfld.long 0x00 13. " [1]          ,DD mask 1 for DCP PM events group A" "0,1"
bitfld.long 0x00 12. "                    [0]           ,DD mask 0 for DCP PM events group A" "0,1"
bitfld.long 0x00 11. "                DD_CMPV_A[3] ,DD compare 3 for DCP PM events group A" "0,1"
newline
bitfld.long 0x00 10. " [2]          ,DD compare 3 for DCP PM events group A" "0,1"
bitfld.long 0x00 9. "                    [1]           ,DD compare 3 for DCP PM events group A" "0,1"
bitfld.long 0x00 8. "                [0]          ,DD compare 3 for DCP PM events group A" "0,1"
newline
bitfld.long 0x00 7. " FEA          ,Filter enable A" "Disabled,Enabled"
bitfld.long 0x00 0.--3. "             DCPID_A       ,Direct connect portal ID for filtering the DCP PM events in group A" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x320++0x07
line.long 0x00 "DCP_DLM_CFG_A,DCP Dequeue Latency Monitor Configuration A"
bitfld.long 0x00 28.--31. " DLM_TH_D     ,Threshold which is used for comparison in the generation of the DCP dequeue latency D performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 24.--27. "          DLM_TH_C      ,Threshold which is used for comparison in the generation of the DCP dequeue latency C performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 20.--23. "      DLM_TH_B     ,Threshold which is used for comparison in the generation of the DCP dequeue latency B performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
newline
bitfld.long 0x00 16.--19. " DLM_TH_A     ,Threshold which is used for comparison in the generation of the DCP dequeue latency A performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 15. "          SM[15]        ,Enable monitoring for dequeue commands made via sub portal 15" "Disabled,Enabled"
bitfld.long 0x00 14. "         [14]         ,Enable monitoring for dequeue commands made via sub portal 14" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " [13]         ,Enable monitoring for dequeue commands made via sub portal 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]          ,Enable monitoring for dequeue commands made via sub portal 12" "Disabled,Enabled"
bitfld.long 0x00 11. "         [11]         ,Enable monitoring for dequeue commands made via sub portal 11" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " [10]         ,Enable monitoring for dequeue commands made via sub portal 10" "Disabled,Enabled"
bitfld.long 0x00 9. "             [9]           ,Enable monitoring for dequeue commands made via sub portal 9" "Disabled,Enabled"
bitfld.long 0x00 8. "         [8]          ,Enable monitoring for dequeue commands made via sub portal 8" "Disabled,Enabled"
newline
bitfld.long 0x00 7. " [7]          ,Enable monitoring for dequeue commands made via sub portal 7" "Disabled,Enabled"
bitfld.long 0x00 6. "             [6]           ,Enable monitoring for dequeue commands made via sub portal 6" "Disabled,Enabled"
bitfld.long 0x00 5. "         [5]          ,Enable monitoring for dequeue commands made via sub portal 5" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " [4]          ,Enable monitoring for dequeue commands made via sub portal 4" "Disabled,Enabled"
bitfld.long 0x00 3. "             [3]           ,Enable monitoring for dequeue commands made via sub portal 3" "Disabled,Enabled"
bitfld.long 0x00 2. "         [2]          ,Enable monitoring for dequeue commands made via sub portal 2" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " [1]          ,Enable monitoring for dequeue commands made via sub portal 1" "Disabled,Enabled"
bitfld.long 0x00 0. "             [0]           ,Enable monitoring for dequeue commands made via sub portal 0" "Disabled,Enabled"
line.long 0x04 "DCP_DLM_AVG_A,DCP Dequeue Latency Monitor Average A"
hexmask.long.word 0x04 8.--19. 1. " DLM_AVG_INT  ,Integer portion of the measured average latency value"
hexmask.long.byte 0x04 0.--7. 1. "                 DLM_AVG_FRACT ,Fractional portion of the measured average latency value"
group.long 0x328++0x07
line.long 0x00 "DCP_DLM_CFG_B,DCP Dequeue Latency Monitor Configuration B"
bitfld.long 0x00 28.--31. " DLM_TH_D     ,Threshold which is used for comparison in the generation of the DCP dequeue latency D performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 24.--27. "          DLM_TH_C      ,Threshold which is used for comparison in the generation of the DCP dequeue latency C performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 20.--23. "      DLM_TH_B     ,Threshold which is used for comparison in the generation of the DCP dequeue latency B performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
newline
bitfld.long 0x00 16.--19. " DLM_TH_A     ,Threshold which is used for comparison in the generation of the DCP dequeue latency A performance monitor signal" "9 cycles,10 cycles,11 cycles,12 cycles,14 cycles,16 cycles,18 cycles,20 cycles,24 cycles,32 cycles,48 cycles,64 cycles,128 cycles,256 cycles,512 cycles,1024 cycles"
bitfld.long 0x00 15. "          SM[15]        ,Enable monitoring for dequeue commands made via sub portal 15" "Disabled,Enabled"
bitfld.long 0x00 14. "         [14]         ,Enable monitoring for dequeue commands made via sub portal 14" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " [13]         ,Enable monitoring for dequeue commands made via sub portal 13" "Disabled,Enabled"
bitfld.long 0x00 12. "             [12]          ,Enable monitoring for dequeue commands made via sub portal 12" "Disabled,Enabled"
bitfld.long 0x00 11. "         [11]         ,Enable monitoring for dequeue commands made via sub portal 11" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " [10]         ,Enable monitoring for dequeue commands made via sub portal 10" "Disabled,Enabled"
bitfld.long 0x00 9. "             [9]           ,Enable monitoring for dequeue commands made via sub portal 9" "Disabled,Enabled"
bitfld.long 0x00 8. "         [8]          ,Enable monitoring for dequeue commands made via sub portal 8" "Disabled,Enabled"
newline
bitfld.long 0x00 7. " [7]          ,Enable monitoring for dequeue commands made via sub portal 7" "Disabled,Enabled"
bitfld.long 0x00 6. "             [6]           ,Enable monitoring for dequeue commands made via sub portal 6" "Disabled,Enabled"
bitfld.long 0x00 5. "         [5]          ,Enable monitoring for dequeue commands made via sub portal 5" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " [4]          ,Enable monitoring for dequeue commands made via sub portal 4" "Disabled,Enabled"
bitfld.long 0x00 3. "             [3]           ,Enable monitoring for dequeue commands made via sub portal 3" "Disabled,Enabled"
bitfld.long 0x00 2. "         [2]          ,Enable monitoring for dequeue commands made via sub portal 2" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " [1]          ,Enable monitoring for dequeue commands made via sub portal 1" "Disabled,Enabled"
bitfld.long 0x00 0. "             [0]           ,Enable monitoring for dequeue commands made via sub portal 0" "Disabled,Enabled"
line.long 0x04 "DCP_DLM_AVG_B,DCP Dequeue Latency Monitor Average B"
hexmask.long.word 0x04 8.--19. 1. " DLM_AVG_INT  ,Integer portion of the measured average latency value"
hexmask.long.byte 0x04 0.--7. 1. "                 DLM_AVG_FRACT ,Fractional portion of the measured average latency value"
rgroup.long 0x330++0x07
line.long 0x00 "DCP_CTXBCR,DCP CEETM Transmit Byte Credits Register"
hexmask.long.tbyte 0x00 0.--20. 1. " CREDIT       ,Tx byte credit"
line.long 0x04 "DCP_CTXFCR,DCP CEETM Transmit Frame Credits Register"
hexmask.long.word 0x04 0.--14. 1. " CREDIT       ,Tx frame credit"
rgroup.long 0x400++0x0B
line.long 0x00 "PFDR_FPC_0,PFDR Free Pool Count"
hexmask.long.tbyte 0x00 0.--23. 1. " FPC          ,Free pool count"
line.long 0x04 "PFDR_FP_HEAD_0,PFDR Free Pool Head Pointer"
hexmask.long.tbyte 0x04 0.--23. 1. " FPHP         ,Packed frame descriptor record free pool head pointer"
line.long 0x08 "PFDR_FP_TAIL_0,PFDR Free Pool Tail Pointer"
hexmask.long.tbyte 0x08 0.--23. 0x01 " FPTP         ,Packed frame descriptor record free pool tail pointer"
group.long (0x400+0x10)++0x07
line.long 0x00 "PFDR_FP_LWIT_0,PFDR Free Pool Low Watermark Interrupt Threshold"
hexmask.long.tbyte 0x00 0.--23. 1. " TH           ,PFDR low watermark interrupt threshold"
line.long 0x04 "PFDR_CFG_0,PFDR Configuration"
hexmask.long.byte 0x04 0.--7. 1. " K            ,PFDR base constant"
rgroup.long 0x420++0x0B
line.long 0x00 "PFDR_FPC_1,PFDR Free Pool Count"
hexmask.long.tbyte 0x00 0.--23. 1. " FPC          ,Free pool count"
line.long 0x04 "PFDR_FP_HEAD_1,PFDR Free Pool Head Pointer"
hexmask.long.tbyte 0x04 0.--23. 1. " FPHP         ,Packed frame descriptor record free pool head pointer"
line.long 0x08 "PFDR_FP_TAIL_1,PFDR Free Pool Tail Pointer"
hexmask.long.tbyte 0x08 0.--23. 0x01 " FPTP         ,Packed frame descriptor record free pool tail pointer"
group.long (0x420+0x10)++0x07
line.long 0x00 "PFDR_FP_LWIT_1,PFDR Free Pool Low Watermark Interrupt Threshold"
hexmask.long.tbyte 0x00 0.--23. 1. " TH           ,PFDR low watermark interrupt threshold"
line.long 0x04 "PFDR_CFG_1,PFDR Configuration"
hexmask.long.byte 0x04 0.--7. 1. " K            ,PFDR base constant"
rgroup.long 0x440++0x0B
line.long 0x00 "PFDR_FPC_2,PFDR Free Pool Count"
hexmask.long.tbyte 0x00 0.--23. 1. " FPC          ,Free pool count"
line.long 0x04 "PFDR_FP_HEAD_2,PFDR Free Pool Head Pointer"
hexmask.long.tbyte 0x04 0.--23. 1. " FPHP         ,Packed frame descriptor record free pool head pointer"
line.long 0x08 "PFDR_FP_TAIL_2,PFDR Free Pool Tail Pointer"
hexmask.long.tbyte 0x08 0.--23. 0x01 " FPTP         ,Packed frame descriptor record free pool tail pointer"
group.long (0x440+0x10)++0x07
line.long 0x00 "PFDR_FP_LWIT_2,PFDR Free Pool Low Watermark Interrupt Threshold"
hexmask.long.tbyte 0x00 0.--23. 1. " TH           ,PFDR low watermark interrupt threshold"
line.long 0x04 "PFDR_CFG_2,PFDR Configuration"
hexmask.long.byte 0x04 0.--7. 1. " K            ,PFDR base constant"
rgroup.long 0x460++0x0B
line.long 0x00 "PFDR_FPC_3,PFDR Free Pool Count"
hexmask.long.tbyte 0x00 0.--23. 1. " FPC          ,Free pool count"
line.long 0x04 "PFDR_FP_HEAD_3,PFDR Free Pool Head Pointer"
hexmask.long.tbyte 0x04 0.--23. 1. " FPHP         ,Packed frame descriptor record free pool head pointer"
line.long 0x08 "PFDR_FP_TAIL_3,PFDR Free Pool Tail Pointer"
hexmask.long.tbyte 0x08 0.--23. 0x01 " FPTP         ,Packed frame descriptor record free pool tail pointer"
group.long (0x460+0x10)++0x07
line.long 0x00 "PFDR_FP_LWIT_3,PFDR Free Pool Low Watermark Interrupt Threshold"
hexmask.long.tbyte 0x00 0.--23. 1. " TH           ,PFDR low watermark interrupt threshold"
line.long 0x04 "PFDR_CFG_3,PFDR Configuration"
hexmask.long.byte 0x04 0.--7. 1. " K            ,PFDR base constant"
group.long 0x500++0x03
line.long 0x00 "SFDR_CFG,SFDR Configuration Register"
bitfld.long 0x00 31. " RM           ,SFDR reservation mode" "High priority WQs,Allocate bit set"
hexmask.long.word 0x00 0.--9. 1. "    TH            ,SFDR high priority reservation threshold"
rgroup.long 0x504++0x03
line.long 0x00 "SFDR_IN_USE,SFDR In Use Register"
hexmask.long.word 0x00 0.--11. 1. " NUM          ,SFDR in use number"
if (((per.l(ad:0x08180000+0x600))&0x300)==0x100)
if (((per.l(ad:0x08180000+0x604))&0x01)==0x01)
group.long 0x600++0x03
line.long 0x00 "WQ_CS_CFG_IDX,Work Queue Class Scheduler Configuration Index"
bitfld.long 0x00 8.--9. " IS           ,Index select" "All software portal,All channels used,Channel dedicated,?..."
rbitfld.long 0x00 0.--3. "  DCP_IDX       ,DCP portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x600++0x03
line.long 0x00 "WQ_CS_CFG_IDX,Work Queue Class Scheduler Configuration Index"
bitfld.long 0x00 8.--9. " IS           ,Index select" "All software portal,All channels used,Channel dedicated,?..."
bitfld.long 0x00 0.--3. "  DCP_IDX       ,DCP portal index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
else
group.long 0x600++0x03
line.long 0x00 "WQ_CS_CFG_IDX,Work Queue Class Scheduler Configuration Index"
bitfld.long 0x00 8.--9. " IS           ,Index select" "All software portal,All channels used,Channel dedicated,?..."
endif
group.long 0x604++0x0B
line.long 0x00 "WQ_CS_CFG_IDX_LOCK,WQ Class Scheduler Configuration IDX Lock"
bitfld.long 0x00 0. " L            ,Lock" "Not locked,Locked"
line.long 0x04 "WQ_CS_CFG,Work Queue Class Scheduler Configuration Register"
hexmask.long.byte 0x04 24.--31. 1. " CS_ELEV      ,WQ class scheduler priority elevation weight"
bitfld.long 0x04 20.--22. "                   CSW7          ,Class scheduler weight for WQ 7" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
bitfld.long 0x04 16.--18. "  CSW6         ,Class scheduler weight for WQ 6" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
newline
bitfld.long 0x04 12.--14. " CSW5         ,Class scheduler weight for WQ 5" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
bitfld.long 0x04 8.--10. "      CSW4          ,Class scheduler weight for WQ 4" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
bitfld.long 0x04 4.--6. "  CSW3         ,Class scheduler weight for WQ 3" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
newline
bitfld.long 0x04 0.--2. " CSW2         ,Class scheduler weight for WQ 2" "High Priority 0,High Priority 1,Medium Priority,Medium Priority,Medium Priority,Medium Priority,Low Priority,Low Priority"
line.long 0x08 "WQ_SWP_CH_CFG,WQ Software Portal Channel Configuration"
hexmask.long.word 0x08 0.--11. 1. " NUM8CH       ,Number of 8 WQ software portal channels"
if (((per.l(ad:0x08180000+0x614))&0x01)==0x01)
rgroup.long 0x610++0x03
line.long 0x00 "WQ_CH_CFG_IDX,Work Queue Channel Configuration Index"
hexmask.long.word 0x00 0.--11. 1. " CHID         ,Channel ID"
else
group.long 0x610++0x03
line.long 0x00 "WQ_CH_CFG_IDX,Work Queue Channel Configuration Index"
hexmask.long.word 0x00 0.--11. 1. " CHID         ,Channel ID"
endif
group.long 0x614++0x03
line.long 0x00 "WQ_CH_CFG_IDX_LOCK,WQ Channel Configuration Index Lock"
bitfld.long 0x00 0. " L            ,Lock bit" "Not locked,Locked"
if (((per.l(ad:0x08180000+0x618))&0x80000000)==0x80000000)
group.long 0x618++0x03
line.long 0x00 "WQ_CH_CDAN_CFG,Work Queue Channel CDAN Configuration"
bitfld.long 0x00 31. " BDI          ,Bypass DPAA resource isolation" "0,1"
bitfld.long 0x00 30. "                    EN            ,CDAN enable" "Disabled,Enabled"
hexmask.long.word 0x00 0.--14. 1. "         CDAN_WQID    ,Channel data availability notification work queue ID"
newline
else
group.long 0x618++0x03
line.long 0x00 "WQ_CH_CDAN_CFG,Work Queue Channel CDAN Configuration"
bitfld.long 0x00 31. " BDI          ,Bypass DPAA resource isolation" "0,1"
bitfld.long 0x00 30. "                    EN            ,CDAN enable" "Disabled,Enabled"
hexmask.long.word 0x00 16.--27. 1. "         CDAN_VCHID   ,Channel data availability notification virtual channel ID"
newline
hexmask.long.word 0x00 0.--14. 1. " CDAN_WQID    ,Channel data availability notification work queue ID"
newline
endif
group.long 0x61C++0x03
line.long 0x00 "WQ_CH_DD_CFG,Work Queue Channel Dynamic Debug Configuration"
bitfld.long 0x00 24.--26. " TP1_CFG ,Trace point 1 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x00 23. "  TP1_MASK[3] ,Trace point 1 mask 3" "0,1"
bitfld.long 0x00 22. "  [2]         ,Trace point 1 mask 2" "0,1"
newline
bitfld.long 0x00 21. " [1]     ,Trace point 1 mask 1" "0,1"
bitfld.long 0x00 20. "                                             [0]         ,Trace point 1 mask 0" "0,1"
bitfld.long 0x00 19. "  TP1_CMPV[3] ,Trace point 1 compare 3" "0,1"
newline
bitfld.long 0x00 18. " [2]     ,Trace point 1 compare 2" "0,1"
bitfld.long 0x00 17. "                                             [1]         ,Trace point 1 compare 1" "0,1"
bitfld.long 0x00 16. "  [0]         ,Trace point 1 compare 0" "0,1"
newline
bitfld.long 0x00 8.--10. " TP0_CFG ,Trace point 0 configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x00 7. "  TP0_MASK[3] ,Trace point 0 mask 3" "0,1"
bitfld.long 0x00 6. "  [2]         ,Trace point 0 mask 2" "0,1"
newline
bitfld.long 0x00 5. " [1]     ,Trace point 0 mask 1" "0,1"
bitfld.long 0x00 4. "                                             [0]         ,Trace point 0 mask 0" "0,1"
bitfld.long 0x00 3. "  TP0_CMPV[3] ,Trace point 0 compare 3" "0,1"
newline
bitfld.long 0x00 2. " [2]     ,Trace point 0 compare 2" "0,1"
bitfld.long 0x00 1. "                                             [1]         ,Trace point 0 compare 1" "0,1"
bitfld.long 0x00 0. "  [0]         ,Trace point 0 compare 0" "0,1"
newline
rgroup.long 0x620++0x0B
line.long 0x00 "WQPR_FPC,Work Queue Proxy Record Free Pool Count"
hexmask.long.tbyte 0x00 0.--23. 1. " FPC       ,Free pool count"
line.long 0x04 "WQPR_FP_HEAD,Work Queue Proxy Record Free Pool Head Pointer"
hexmask.long.tbyte 0x04 0.--23. 0x01 " FPHP      ,WQPR free pool head pointer"
line.long 0x08 "WQPR_FP_TAIL,Work Queue Proxy Record Free Pool Tail Pointer"
hexmask.long.tbyte 0x08 0.--23. 0x01 " FPTP      ,Packed frame descriptor record free pool tail pointer"
group.long 0x630++0x03
line.long 0x00 "WQ_DEF_ENQ_WQID,Work Queue Default Enqueue WQID"
hexmask.long.word 0x00 0.--14. 1. " WQID      ,Default enqueue WQ ID"
group.long 0x700++0x07
line.long 0x00 "FBPR_FPC,Free Buffer Proxy Records (FBPR) Free Pool Count Register"
line.long 0x04 "FBPR_FP_LWIT,FBPR Free Pool Low Watermark Interrupt Threshold"
hexmask.long 0x04 0.--27. 1. " TH        ,FBPR low watermark interrupt threshold"
rgroup.long 0x708++0x03
line.long 0x00 "FBPR_HDPTR,FBPR Free Pool Head Pointer Register"
hexmask.long 0x00 0.--27. 0x01 " FPHP      ,Free pool head pointer"
group.long 0x720++0x07
line.long 0x00 "BMAN_CMD_PM0_CFG1,BMan Command Perf Mon 0 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM0_CFG2,BMan Command Perf Mon 0 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x720+0x40))&0x80000000)==0x00)
group.long (0x720+0x40)++0x03
line.long 0x00 "BMAN_FL_PM0_CFG,BMan Free List Perf Mon 0 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x720+0x40)++0x03
line.long 0x00 "BMAN_FL_PM0_CFG,BMan Free List Perf Mon 0 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x728++0x07
line.long 0x00 "BMAN_CMD_PM1_CFG1,BMan Command Perf Mon 1 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM1_CFG2,BMan Command Perf Mon 1 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x728+0x40))&0x80000000)==0x00)
group.long (0x728+0x40)++0x03
line.long 0x00 "BMAN_FL_PM1_CFG,BMan Free List Perf Mon 1 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x728+0x40)++0x03
line.long 0x00 "BMAN_FL_PM1_CFG,BMan Free List Perf Mon 1 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x730++0x07
line.long 0x00 "BMAN_CMD_PM2_CFG1,BMan Command Perf Mon 2 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM2_CFG2,BMan Command Perf Mon 2 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x730+0x40))&0x80000000)==0x00)
group.long (0x730+0x40)++0x03
line.long 0x00 "BMAN_FL_PM2_CFG,BMan Free List Perf Mon 2 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x730+0x40)++0x03
line.long 0x00 "BMAN_FL_PM2_CFG,BMan Free List Perf Mon 2 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x738++0x07
line.long 0x00 "BMAN_CMD_PM3_CFG1,BMan Command Perf Mon 3 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM3_CFG2,BMan Command Perf Mon 3 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x738+0x40))&0x80000000)==0x00)
group.long (0x738+0x40)++0x03
line.long 0x00 "BMAN_FL_PM3_CFG,BMan Free List Perf Mon 3 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x738+0x40)++0x03
line.long 0x00 "BMAN_FL_PM3_CFG,BMan Free List Perf Mon 3 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x740++0x07
line.long 0x00 "BMAN_CMD_PM4_CFG1,BMan Command Perf Mon 4 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM4_CFG2,BMan Command Perf Mon 4 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x740+0x40))&0x80000000)==0x00)
group.long (0x740+0x40)++0x03
line.long 0x00 "BMAN_FL_PM4_CFG,BMan Free List Perf Mon 4 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x740+0x40)++0x03
line.long 0x00 "BMAN_FL_PM4_CFG,BMan Free List Perf Mon 4 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x748++0x07
line.long 0x00 "BMAN_CMD_PM5_CFG1,BMan Command Perf Mon 5 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM5_CFG2,BMan Command Perf Mon 5 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x748+0x40))&0x80000000)==0x00)
group.long (0x748+0x40)++0x03
line.long 0x00 "BMAN_FL_PM5_CFG,BMan Free List Perf Mon 5 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x748+0x40)++0x03
line.long 0x00 "BMAN_FL_PM5_CFG,BMan Free List Perf Mon 5 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
group.long 0x750++0x07
line.long 0x00 "BMAN_CMD_PM6_CFG1,BMan Command Perf Mon 6 Configuration 1"
bitfld.long 0x00 28.--30. " DEXP      ,Command wait time threshold" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 24.--27. "           DCOEFF        ,Exponent" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--22. "       CBTH  ,Coefficient" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 18. " RF        ,Response service FIFO full" "0,1"
bitfld.long 0x00 17. "           CF            ,Command service FIFO full" "0,1"
bitfld.long 0x00 16. "        SF    ,Software portal command service FIFO" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " DCP_CFIFO ,DCP command service FIFO"
line.long 0x04 "BMAN_CMD_PM6_CFG2,BMan Command Perf Mon 6 Configuration 2"
hexmask.long.word 0x04 16.--29. 1. " BPID2     ,Buffer pool ID at end of selected contiguous range"
hexmask.long.word 0x04 0.--13. 1. "        BPID1         ,Buffer pool ID at start of selected contiguous range"
if (((per.l(ad:0x08180000+0x750+0x40))&0x80000000)==0x00)
group.long (0x750+0x40)++0x03
line.long 0x00 "BMAN_FL_PM6_CFG,BMan Free List Perf Mon 6 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
hexmask.long.word 0x00 16.--29. 1. "           BPID2         ,Buffer pool ID at end"
hexmask.long.word 0x00 0.--13. 1. "     BPID1 ,Buffer pool ID at start"
else
group.long (0x750+0x40)++0x03
line.long 0x00 "BMAN_FL_PM6_CFG,BMan Free List Perf Mon 6 Configuration"
bitfld.long 0x00 31. " FP        ,Monitor free pool of FBPR's" "0,1"
endif
rgroup.long 0x780++0x03
line.long 0x00 "BMAN_STATE_IDLE,BMan Idle Status Register"
bitfld.long 0x00 3. " A         ,Stop acknowledged" "0,Stopped"
bitfld.long 0x00 2. "     S             ,Stop request" "0,Stopped"
bitfld.long 0x00 1. "  E     ,Empty" "0,Empty"
newline
bitfld.long 0x00 0. " I         ,Idle" "0,Idle"
group.long 0x784++0x03
line.long 0x00 "BMAN_STATE_STOP,BMan Stop Register"
bitfld.long 0x00 31. " D         ,Stop servicing hardware (DCP) portal requests" "0,Stopped"
bitfld.long 0x00 30. "     P             ,Stop servicing software portal requests" "0,Stopped"
bitfld.long 0x00 29. "  F     ,Stop servicing fetch/flush requests from the stockpile" "0,Stopped"
newline
bitfld.long 0x00 2. " S         ,Stop request" "0,Stopped"
if (((per.l(ad:0x08180000+0x790))&0x10000)==0x10000)
rgroup.long 0x790++0x03
line.long 0x00 "BMAN_CECR,BMan Corruption Error Capture Register"
bitfld.long 0x00 16. " FP        ,Free pool" "0,1"
hexmask.long.word 0x00 0.--13. 1. "           BPID          ,Buffer pool ID"
else
rgroup.long 0x790++0x03
line.long 0x00 "BMAN_CECR,BMan Corruption Error Capture Register"
bitfld.long 0x00 16. " FP        ,Free pool" "0,1"
endif
group.long 0x794++0x03
line.long 0x00 "BMAN_CEAR,BMan Corruption Error Address Register"
hexmask.long 0x00 0.--27. 0x01 " ADDR      ,Address"
group.long 0x7C0++0x03
line.long 0x00 "FBPR_BAR,Free Buffer Proxy Records (FBPR) Base Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BA        ,Base address"
group.long 0x7C4++0x07
line.long 0x00 "FBPR_BARE,FBPR Extended Base Address Register"
line.long 0x04 "FBPR_AR,FBPR Attributes Register"
bitfld.long 0x04 30. " P         ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x04 0.--5. "      SIZE          ,Identifies the size of the window from the base address" ",,,,,,,,,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,2 GB,4 GB,8 GB,16 GB,?..."
group.long 0x7F0++0x07
line.long 0x00 "BMAN_DEBUG_CFIFO,BMan Debug: Command FIFO Disable Register"
bitfld.long 0x00 16. " SF        ,Software portal command service FIFO" "Enabled,Disabled"
bitfld.long 0x00 15. "    DCP_CFIFO[15] ,DCP portal 15 FIFOs disable" "No,Yes"
bitfld.long 0x00 14. "      [14]  ,DCP portal 14 FIFOs disable" "No,Yes"
newline
bitfld.long 0x00 13. " [13]      ,DCP portal 13 FIFOs disable" "No,Yes"
bitfld.long 0x00 12. "         [12]          ,DCP portal 12 FIFOs disable" "No,Yes"
bitfld.long 0x00 11. "      [11]  ,DCP portal 11 FIFOs disable" "No,Yes"
newline
bitfld.long 0x00 10. " [10]      ,DCP portal 10 FIFOs disable" "No,Yes"
bitfld.long 0x00 9. "         [9]           ,DCP portal 9 FIFOs disable" "No,Yes"
bitfld.long 0x00 8. "      [8]   ,DCP portal 8 FIFOs disable" "No,Yes"
newline
bitfld.long 0x00 7. " [7]       ,DCP portal 7 FIFOs disable" "No,Yes"
bitfld.long 0x00 6. "         [6]           ,DCP portal 6 FIFOs disable" "No,Yes"
bitfld.long 0x00 5. "      [5]   ,DCP portal 5 FIFOs disable" "No,Yes"
newline
bitfld.long 0x00 4. " [4]       ,DCP portal 4 FIFOs disable" "No,Yes"
bitfld.long 0x00 3. "         [3]           ,DCP portal 3 FIFOs disable" "No,Yes"
bitfld.long 0x00 2. "      [2]   ,DCP portal 2 FIFOs disable" "No,Yes"
newline
bitfld.long 0x00 1. " [1]       ,DCP portal 1 FIFOs disable" "No,Yes"
bitfld.long 0x00 0. "         [0]           ,DCP portal 0 FIFOs disable" "No,Yes"
line.long 0x04 "BMAN_DEBUG_FSM,BMan Debug State Machine Disable Register"
bitfld.long 0x04 1. " F         ,Fetch/Flush state machine disable" "No,Yes"
bitfld.long 0x04 0. "         S             ,FIFO service state machine disable" "No,Yes"
group.long 0x800++0x03
line.long 0x00 "CM_CFG,CM Configuration Register"
hexmask.long.word 0x00 0.--15. 1. " PRES      ,WRED block averaging timer pre-scaler"
if (((per.l(ad:0x08180000+0x904))&0x10000)==0x10000)
group.long 0x900++0x03
line.long 0x00 "CEETM_CFG_IDX,CEETM Configuration Index Register"
bitfld.long 0x00 4.--5. " IID       ,CEETM instance ID" "0,1,2,3"
rbitfld.long 0x00 0.--3. "           DCPID         ,CEETM portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
group.long 0x900++0x03
line.long 0x00 "CEETM_CFG_IDX,CEETM Configuration Index Register"
bitfld.long 0x00 4.--5. " IID       ,CEETM instance ID" "0,1,2,3"
bitfld.long 0x00 0.--3. "           DCPID         ,CEETM portal ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0x904++0x07
line.long 0x00 "CEETM_CFG_IDX_LOCK,CEETM Configuration Index Lock"
eventfld.long 0x00 0. " L         ,Lock bit" "Not locked,Locked"
line.long 0x04 "CEETM_CFG_PRES,CEETM Configuration Pre-Scaler Register"
hexmask.long.word 0x04 0.--15. 1. " PRES      ,CEETM shaper pre-scaler value"
rgroup.long 0x90C++0x03
line.long 0x00 "CEETM_XSFDR_IN_USE,CEETM XSFDR In Use Register"
hexmask.long.word 0x00 0.--12. 1. " NUM       ,XSFDR in use number"
newline
group.long 0x910++0x03
line.long 0x00 "CEETM_DD_CFG,CEETM Dynamic Debug Configuration Register"
rbitfld.long 0x00 31. " CPEND      ,Completion pending" "Complete,In progress"
bitfld.long 0x00 30. "  CMD    ,Command type" "Configure,Query"
hexmask.long.word 0x00 16.--27. 1. "                                     DCT_IDX    ,Dequeue context table index"
newline
bitfld.long 0x00 12. " TP_SEL     ,Trace point select" "0,1"
bitfld.long 0x00 8.--10. "            TP_CFG ,Trace point configuration" "Trace/Port halt disabled,Trace lv 1 output enabled/Port halt disabled,Trace lv 2 enabled/Port halt disabled,Trace lv 3 enabled/Portal halt disabled,Trace disabled/Port halt enabled,Trace lv 1 enabled/Portal halt enabled,Trace lv 3 enabled/Port halt enabled,Trace lv 3 enabled/Port halt enabled"
bitfld.long 0x00 7. "  TP_MASK[3] ,Trace point mask 3" "0,1"
newline
bitfld.long 0x00 6. " [2]        ,Trace point mask 2" "0,1"
bitfld.long 0x00 5. "            [1]    ,Trace point mask 1" "0,1"
bitfld.long 0x00 4. "                                             [0]        ,Trace point mask 0" "0,1"
newline
bitfld.long 0x00 3. " TP_CMPV[3] ,Trace point compare 3" "0,1"
bitfld.long 0x00 2. "            [2]    ,Trace point compare 2" "0,1"
bitfld.long 0x00 1. "                                             [1]        ,Trace point compare 1" "0,1"
newline
bitfld.long 0x00 0. " [0]        ,Trace point compare 0" "0,1"
newline
group.long 0xA00++0x03
line.long 0x00 "ECSR,Error Capture Status Register"
eventfld.long 0x00 31. " ME            ,Multiple errors" "No multiple,Multiple"
eventfld.long 0x00 21. "             SBEI          ,Single bit ECC error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 16. "           ICVI          ,Invalid command verb interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 11. " IDDI          ,Invalid dequeue direct connect portal interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 4. "            IECE          ,Invalid enqueue configuration error" "No interrupt,Interrupt"
eventfld.long 0x00 1. "           IECI          ,Invalid enqueue channel interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 0. " MBEI          ,Multi bit ECC error interrupt" "No interrupt,Interrupt"
newline
hgroup.long 0xA04++0x03
hide.long 0x00 "EADR,ECC Error Address Register"
in
hgroup.long 0xA08++0x03
hide.long 0x00 "ECIR,Error Capture Information Register"
in
hgroup.long 0xA0C++0x03
hide.long 0x00 "ECIR2,Error Capture Information Register 2"
in
newline
group.long 0xA10++0x0B
line.long 0x00 "RERR_REL_FQID,Recoverable Error Logging FQID Register"
hexmask.long.tbyte 0x00 0.--23. 1. " REL_FQID      ,Recoverable error logging FQID"
line.long 0x04 "ECC_SBET,ECC Single Bit Error Threshold Register"
hexmask.long.byte 0x04 0.--7. 1. " SBET          ,Single bit error threshold"
line.long 0x08 "ECDD,ECC Correction And Detection Disable Register"
bitfld.long 0x08 24. " ECDD[24]      ,Order restoration: internal deferred enqueue record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 23. "                     [23]          ,Egress traffic management dequeue statistics memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 22. "                     [22]          ,Egress traffic management class queue channel scheduling memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 21. " [21]          ,Egress traffic management class queue channel shaping memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 20. "                     [20]          ,Egress traffic management class congestion group record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 19. "                     [19]          ,Egress traffic management dequeue context memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 18. " [18]          ,Egress traffic management logical FQ mapping memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 17. "                     [17]          ,Egress traffic management extended SFDR memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 16. "                     [16]          ,Egress traffic management class queue descriptor memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 15. " [15]          ,Enqueue replication context record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 14. "                     [14]          ,Enqueue replication list record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 13. "                     [13]          ,Queuing destination qpri record memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 12. " [12]          ,Queuing destination record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 11. "                     [11]          ,BMan DCP portal authorization table memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 10. "                     [10]          ,QMan DCP portal authorization table memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 9. " [9]           ,Software portal authorization table memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 8. "                     [8]           ,Buffer pool stockpile memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 7. "                     [7]           ,Software portal ring memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 6. " [6]           ,Order restoration: deferred enqueue memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 5. "                     [5]           ,Order restoration: order point record (OPR) memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 4. "                     [4]           ,Congestion group record (CGR) memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 3. " [3]           ,WQ CDAN record memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 2. "                     [2]           ,WQ context memory ECC correction and error reporting disable" "No,Yes"
bitfld.long 0x08 1. "                     [1]           ,SFDR memory ECC correction and error reporting disable" "No,Yes"
newline
bitfld.long 0x08 0. " [0]           ,FQD memory ECC correction and error reporting disable" "No,Yes"
newline
hgroup.long 0xA40++0x03
hide.long 0x00 "ECC_SBEC0,ECC Single Bit Error Count 0 Register"
in
newline
hgroup.long 0xA44++0x03
hide.long 0x00 "ECC_SBEC1,ECC Single Bit Error Count 1 Register"
in
newline
hgroup.long 0xA48++0x03
hide.long 0x00 "ECC_SBEC2,ECC Single Bit Error Count 2 Register"
in
newline
hgroup.long 0xA4C++0x03
hide.long 0x00 "ECC_SBEC3,ECC Single Bit Error Count 3 Register"
in
newline
hgroup.long 0xA50++0x03
hide.long 0x00 "ECC_SBEC4,ECC Single Bit Error Count 4 Register"
in
newline
hgroup.long 0xA54++0x03
hide.long 0x00 "ECC_SBEC5,ECC Single Bit Error Count 5 Register"
in
newline
hgroup.long 0xA58++0x03
hide.long 0x00 "ECC_SBEC6,ECC Single Bit Error Count 6 Register"
in
newline
hgroup.long 0xA5C++0x03
hide.long 0x00 "ECC_SBEC7,ECC Single Bit Error Count 7 Register"
in
newline
hgroup.long 0xA60++0x03
hide.long 0x00 "ECC_SBEC8,ECC Single Bit Error Count 8 Register"
in
newline
hgroup.long 0xA64++0x03
hide.long 0x00 "ECC_SBEC9,ECC Single Bit Error Count 9 Register"
in
newline
hgroup.long 0xA68++0x03
hide.long 0x00 "ECC_SBEC10,ECC Single Bit Error Count 10 Register"
in
newline
hgroup.long 0xA6C++0x03
hide.long 0x00 "ECC_SBEC11,ECC Single Bit Error Count 11 Register"
in
newline
hgroup.long 0xA70++0x03
hide.long 0x00 "ECC_SBEC12,ECC Single Bit Error Count 12 Register"
in
newline
hgroup.long 0xA74++0x03
hide.long 0x00 "ECC_SBEC13,ECC Single Bit Error Count 13 Register"
in
newline
hgroup.long 0xA78++0x03
hide.long 0x00 "ECC_SBEC14,ECC Single Bit Error Count 14 Register"
in
newline
hgroup.long 0xA7C++0x03
hide.long 0x00 "ECC_SBEC15,ECC Single Bit Error Count 15 Register"
in
newline
hgroup.long 0xA80++0x03
hide.long 0x00 "ECC_SBEC16,ECC Single Bit Error Count 16 Register"
in
newline
hgroup.long 0xA84++0x03
hide.long 0x00 "ECC_SBEC17,ECC Single Bit Error Count 17 Register"
in
newline
hgroup.long 0xA88++0x03
hide.long 0x00 "ECC_SBEC18,ECC Single Bit Error Count 18 Register"
in
newline
hgroup.long 0xA8C++0x03
hide.long 0x00 "ECC_SBEC19,ECC Single Bit Error Count 19 Register"
in
newline
hgroup.long 0xA90++0x03
hide.long 0x00 "ECC_SBEC20,ECC Single Bit Error Count 20 Register"
in
newline
hgroup.long 0xA94++0x03
hide.long 0x00 "ECC_SBEC21,ECC Single Bit Error Count 21 Register"
in
newline
hgroup.long 0xA98++0x03
hide.long 0x00 "ECC_SBEC22,ECC Single Bit Error Count 22 Register"
in
newline
hgroup.long 0xA9C++0x03
hide.long 0x00 "ECC_SBEC23,ECC Single Bit Error Count 23 Register"
in
newline
hgroup.long 0xAA0++0x03
hide.long 0x00 "ECC_SBEC24,ECC Single Bit Error Count 24 Register"
in
newline
group.long 0xB00++0x0B
line.long 0x00 "QMAN_MCR,QMan Management Command/Result Register"
hexmask.long.byte 0x00 0.--7. 1. " CMD_RSLT      ,QMan management command/result"
line.long 0x04 "QMAN_MCP0,QMan Management Command Parameter 0 Register"
line.long 0x08 "QMAN_MCP1,QMan Management Command Parameter 1 Register"
rgroup.long 0xB20++0x03
line.long 0x00 "QMAN_MR0,QMan Management Return Register 0"
rgroup.long 0xB24++0x03
line.long 0x00 "QMAN_MR1,QMan Management Return Register 1"
rgroup.long 0xB28++0x03
line.long 0x00 "QMAN_MR2,QMan Management Return Register 2"
rgroup.long 0xB2C++0x03
line.long 0x00 "QMAN_MR3,QMan Management Return Register 3"
rgroup.long 0xB30++0x03
line.long 0x00 "QMAN_MR4,QMan Management Return Register 4"
rgroup.long 0xB34++0x03
line.long 0x00 "QMAN_MR5,QMan Management Return Register 5"
rgroup.long 0xB38++0x03
line.long 0x00 "QMAN_MR6,QMan Management Return Register 6"
rgroup.long 0xB3C++0x03
line.long 0x00 "QMAN_MR7,QMan Management Return Register 7"
rgroup.long 0xB40++0x03
line.long 0x00 "QMAN_MR8,QMan Management Return Register 8"
rgroup.long 0xB44++0x03
line.long 0x00 "QMAN_MR9,QMan Management Return Register 9"
rgroup.long 0xB48++0x03
line.long 0x00 "QMAN_MR10,QMan Management Return Register 10"
rgroup.long 0xB4C++0x03
line.long 0x00 "QMAN_MR11,QMan Management Return Register 11"
rgroup.long 0xB50++0x03
line.long 0x00 "QMAN_MR12,QMan Management Return Register 12"
rgroup.long 0xB54++0x03
line.long 0x00 "QMAN_MR13,QMan Management Return Register 13"
rgroup.long 0xB58++0x03
line.long 0x00 "QMAN_MR14,QMan Management Return Register 14"
rgroup.long 0xB5C++0x03
line.long 0x00 "QMAN_MR15,QMan Management Return Register 15"
group.long 0xBE0++0x03
line.long 0x00 "QMAN_MISC_CFG,QMan Miscellaneous Configuration Register"
bitfld.long 0x00 31. " SP            ,Spare read/write bit" "0,1"
bitfld.long 0x00 3. "                       OREE          ,Order restoration external memory access enable" "Internal,Extended"
bitfld.long 0x00 2. "                ICS_PM        ,Intra-Class scheduling (ICS) precedence mode" "0,1"
newline
bitfld.long 0x00 1. " WPM           ,Waterfall power management enable" "Default,Enabled"
rgroup.long 0xBF4++0x0B
line.long 0x00 "QMAN_IDLE_STAT,QMan Idle Status Register"
bitfld.long 0x00 27. " IDLE_COND[11] ,CEETM pipelines idle" "Not idle,Idle"
bitfld.long 0x00 26. "                [10]          ,Enqueue replicator idle" "Not idle,Idle"
bitfld.long 0x00 25. "                [9]           ,PFDR prefetch idle" "Not idle,Idle"
newline
bitfld.long 0x00 24. " [8]           ,BMan state machines idle" "Not idle,Idle"
bitfld.long 0x00 23. "                [7]           ,System target and initiator interfaces idle" "Not idle,Idle"
bitfld.long 0x00 22. "                [6]           ,CCSR interface idle" "Not idle,Idle"
newline
bitfld.long 0x00 21. " [5]           ,All algorithmic sequencers idle" "Not idle,Idle"
bitfld.long 0x00 20. "                [4]           ,All non-recoverable error interrupts idle" "Not idle,Idle"
bitfld.long 0x00 19. "                [3]           ,All recoverable error interrupts idle" "Not idle,Idle"
newline
bitfld.long 0x00 18. " [2]           ,All software portal interrupts idle" "Not idle,Idle"
bitfld.long 0x00 17. "                [1]           ,All software portals idle" "Not idle,Idle"
bitfld.long 0x00 16. "                [0]           ,All DCP portals idle" "Not idle,Idle"
newline
bitfld.long 0x00 1. " E             ,Empty" "0,Empty"
bitfld.long 0x00 0. "                   I             ,Idle" "0,Idle"
line.long 0x04 "QMAN_IP_REV_1,QMan IP Block Revision 1 Register"
hexmask.long.word 0x04 16.--31. 1. " IP_ID         ,IP block ID"
hexmask.long.byte 0x04 8.--15. 1. "                    IP_MJ         ,Major revision"
hexmask.long.byte 0x04 0.--7. 1. "                      IP_MN         ,Minor revision"
line.long 0x08 "QMAN_IP_REV_2,QMan IP Block Revision 2 Register"
hexmask.long.byte 0x08 16.--23. 1. " IP_INT        ,Integration options"
hexmask.long.byte 0x08 8.--15. 1. "                      IP_ERR        ,Errata revision level"
hexmask.long.byte 0x08 0.--7. 1. "                      IP_CFG        ,Configuration options"
group.long 0xC20++0x0B
line.long 0x00 "PFDR_BAR_0,Packed Frame Descriptor Record (PFDR) Base Address"
hexmask.long 0x00 7.--31. 0x80 " BASE_ADDR     ,Base address"
line.long 0x04 "PFDR_BARE_0,PFDR Extended Base Address Register"
line.long 0x08 "PFDR_AR_0,PFDR Attributes Register"
bitfld.long 0x08 31. " EN            ,Data structure access enable" "Disabled,Enabled"
bitfld.long 0x08 30. "                P             ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x08 29. "                  SE            ,CPC stash enable" "Disabled,Enabled"
newline
bitfld.long 0x08 22. " SM            ,Size mode" "Disabled,Enabled"
hexmask.long.tbyte 0x08 0.--21. 1. "                SIZE          ,Size of the window from the base address"
group.long 0xC40++0x0B
line.long 0x00 "PFDR_BAR_1,Packed Frame Descriptor Record (PFDR) Base Address"
hexmask.long 0x00 7.--31. 0x80 " BASE_ADDR     ,Base address"
line.long 0x04 "PFDR_BARE_1,PFDR Extended Base Address Register"
line.long 0x08 "PFDR_AR_1,PFDR Attributes Register"
bitfld.long 0x08 31. " EN            ,Data structure access enable" "Disabled,Enabled"
bitfld.long 0x08 30. "                P             ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x08 29. "                  SE            ,CPC stash enable" "Disabled,Enabled"
newline
bitfld.long 0x08 22. " SM            ,Size mode" "Disabled,Enabled"
hexmask.long.tbyte 0x08 0.--21. 1. "                SIZE          ,Size of the window from the base address"
group.long 0xC60++0x0B
line.long 0x00 "PFDR_BAR_2,Packed Frame Descriptor Record (PFDR) Base Address"
hexmask.long 0x00 7.--31. 0x80 " BASE_ADDR     ,Base address"
line.long 0x04 "PFDR_BARE_2,PFDR Extended Base Address Register"
line.long 0x08 "PFDR_AR_2,PFDR Attributes Register"
bitfld.long 0x08 31. " EN            ,Data structure access enable" "Disabled,Enabled"
bitfld.long 0x08 30. "                P             ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x08 29. "                  SE            ,CPC stash enable" "Disabled,Enabled"
newline
bitfld.long 0x08 22. " SM            ,Size mode" "Disabled,Enabled"
hexmask.long.tbyte 0x08 0.--21. 1. "                SIZE          ,Size of the window from the base address"
group.long 0xC80++0x0B
line.long 0x00 "PFDR_BAR_3,Packed Frame Descriptor Record (PFDR) Base Address"
hexmask.long 0x00 7.--31. 0x80 " BASE_ADDR     ,Base address"
line.long 0x04 "PFDR_BARE_3,PFDR Extended Base Address Register"
line.long 0x08 "PFDR_AR_3,PFDR Attributes Register"
bitfld.long 0x08 31. " EN            ,Data structure access enable" "Disabled,Enabled"
bitfld.long 0x08 30. "                P             ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x08 29. "                  SE            ,CPC stash enable" "Disabled,Enabled"
newline
bitfld.long 0x08 22. " SM            ,Size mode" "Disabled,Enabled"
hexmask.long.tbyte 0x08 0.--21. 1. "                SIZE          ,Size of the window from the base address"
group.long 0xC30++0x0B
line.long 0x00 "WQPR_BAR,Work Queue Proxy Record (WQPR) Base Address"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BA            ,Base address"
line.long 0x04 "WQPR_BARE,WQPR Extended Base Address Register"
line.long 0x08 "WQPR_AR,WQPR Attributes Register"
bitfld.long 0x08 31. " EN            ,Data structure access enable" "Disabled,Enabled"
bitfld.long 0x08 30. "                P             ,Data structure transaction priority" "Lower,Higher"
bitfld.long 0x08 29. "                  SE            ,CPC stash enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0.--5. " SIZE          ,Identifies the size of the window from the base address" ",,,,,,,,,,,4 KB,8 KB,16 KB,32 KB,64 KB,128 KB,256 KB,512 KB,1 MB,2 MB,4 MB,8 MB,16 MB,32 MB,64 MB,128 MB,256 MB,512 MB,1 GB,?..."
group.long 0xC80++0x13
line.long 0x00 "SWP_BAR,Software Portal Base Address Register"
bitfld.long 0x00 27.--31. " BA            ,Base address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "SWP_BARE,Software Portal Extended Base Address Register"
line.long 0x08 "SWP_ICA1,Software Portal Initiator Coherency Attributes 1 Register"
bitfld.long 0x08 28. " RNW_CA_WAE[4] ,Response and notification write coherency attributes write allocate enabled NO_SNOOP value" "0,1"
bitfld.long 0x08 27. "                       [3]           ,Response and notification write coherency attributes write allocate enabled AWCACHE[3] value" "0,1"
bitfld.long 0x08 26. "                       [2]           ,Response and notification write coherency attributes write allocate enabled AWCACHE[2] value" "0,1"
newline
bitfld.long 0x08 25. " [1]           ,Response and notification write coherency attributes write allocate enabled AWCACHE[1] value" "0,1"
bitfld.long 0x08 24. "                       [0]           ,Response and notification write coherency attributes write allocate enabled AWCACHE[0] value" "0,1"
bitfld.long 0x08 20. "                       RNW_CA_WAD[4] ,Response and notification write coherency attributes write allocate disabled NO_SNOOP value" "0,1"
newline
bitfld.long 0x08 19. " [3]           ,Response and notification write coherency attributes write allocate disabled AWCACHE[3] value" "0,1"
bitfld.long 0x08 18. "                       [2]           ,Response and notification write coherency attributes write allocate disabled AWCACHE[2] value" "0,1"
bitfld.long 0x08 17. "                       [1]           ,Response and notification write coherency attributes write allocate disabled AWCACHE[1] value" "0,1"
newline
bitfld.long 0x08 16. " [0]           ,Response and notification write coherency attributes write allocate disabled AWCACHE[0] value" "0,1"
bitfld.long 0x08 12. "                       CWS_CA[4]     ,Cache warming stashing coherency attributes NO_SNOOP value" "0,1"
bitfld.long 0x08 11. "                       [3]           ,Cache warming stashing coherency attributes AWCACHE[3] value" "0,1"
newline
bitfld.long 0x08 10. " [2]           ,Cache warming stashing coherency attributes AWCACHE[2] value" "0,1"
bitfld.long 0x08 9. "                       [1]           ,Cache warming stashing coherency attributes AWCACHE[1] value" "0,1"
bitfld.long 0x08 8. "                       [0]           ,Cache warming stashing coherency attributes AWCACHE[0] value" "0,1"
newline
bitfld.long 0x08 4. " WAS_CA[4]     ,Write allocate stashing coherency attributes NO_SNOOP value" "0,1"
bitfld.long 0x08 3. "                       [3]           ,Write allocate stashing coherency attributes AWCACHE[3] value" "0,1"
bitfld.long 0x08 2. "                       [2]           ,Write allocate stashing coherency attributes AWCACHE[2] value" "0,1"
newline
bitfld.long 0x08 1. " [1]           ,Write allocate stashing coherency attributes AWCACHE[1] value" "0,1"
bitfld.long 0x08 0. "                       [0]           ,Write allocate stashing coherency attributes AWCACHE[0] value" "0,1"
line.long 0x0C "SWP_ICA2,Software Portal Initiator Coherency Attributes 2 Register"
bitfld.long 0x0C 4. " IMW_CA[4]     ,Interrupt message write coherency attributes NO_SNOOP value" "0,1"
bitfld.long 0x0C 3. "                       [3]           ,Interrupt message write coherency attributes AWCACHE[3] value" "0,1"
bitfld.long 0x0C 2. "                       [2]           ,Interrupt message write coherency attributes AWCACHE[2] value" "0,1"
newline
bitfld.long 0x0C 1. " [1]           ,Interrupt message write coherency attributes AWCACHE[1] value" "0,1"
bitfld.long 0x0C 0. "                       [0]           ,Interrupt message write coherency attributes AWCACHE[0] value" "0,1"
line.long 0x10 "SWP_WAS_CFG,Software Portal Write Allocate Stashing Configuration Register"
bitfld.long 0x10 16. " VA            ,Virtual address" "Physical,Virtual"
bitfld.long 0x10 15. "                PL            ,Privilege level" "0,1"
hexmask.long.word 0x10 0.--14. 1. "                       ICID          ,Isolation context ID"
if (((per.l(ad:0x08180000+0xD00))&0x80000000)==0x80000000)
group.long 0xD00++0x03
line.long 0x00 "CI_SCHED_CFG,Initiator Scheduling Configuration"
bitfld.long 0x00 31. " SW            ,Stash request credit counter initial value write enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "                SRCCIV        ,Stash request credit counter initial value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--10. "                      SRQ_W         ,Stash request queues (SRQ) scheduling weight" "1,2,3,4,5,6,7,8"
newline
bitfld.long 0x00 4.--6. " RW_W          ,QMan read/write transaction scheduling weight" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 0.--2. "                       BMAN_W        ,BMan fetch/flush sequencer scheduling weight" "1,2,3,4,5,6,7,8"
else
group.long 0xD00++0x03
line.long 0x00 "CI_SCHED_CFG,Initiator Scheduling Configuration"
bitfld.long 0x00 31. " SW            ,Stash request credit counter initial value write enable" "Disabled,Enabled"
bitfld.long 0x00 8.--10. "                SRQ_W         ,Stash request queues (SRQ) scheduling weight" "1,2,3,4,5,6,7,8"
bitfld.long 0x00 4.--6. "                       RW_W          ,QMan read/write transaction scheduling weight" "1,2,3,4,5,6,7,8"
newline
bitfld.long 0x00 0.--2. " BMAN_W        ,BMan fetch/flush sequencer scheduling weight" "1,2,3,4,5,6,7,8"
endif
rgroup.long 0xD04++0x03
line.long 0x00 "QMAN_SRCIDR,QMan Source ID Register"
hexmask.long.byte 0x00 0.--7. 1. " SRCID         ,QMan's source ID"
group.long 0xD08++0x0F
line.long 0x00 "QMAN_ICIDR,QManIsolation Context ID Register"
bitfld.long 0x00 31. " PL3           ,Privilege level for PFDR pool3" "0,1"
bitfld.long 0x00 30. "                       PL2           ,Privilege level for PFDR pool2" "0,1"
bitfld.long 0x00 29. "                       PL1           ,Privilege level for PFDR pool1" "0,1"
newline
bitfld.long 0x00 21. " RA            ,Read allocate stash steering mode" "Side-band,No side-band"
bitfld.long 0x00 20. "            WA            ,Write allocate stash steering mode" "Side-band,No side-band"
bitfld.long 0x00 16. "            VA            ,Virtual address" "Physical,Virtual"
newline
bitfld.long 0x00 15. " PL            ,Privilege level" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                       ICID          ,QMan's private isolation context ID"
line.long 0x04 "QMAN_PD_CA,QMan Private Data Coherency Attributes Register"
bitfld.long 0x04 24.--28. " PDR_CA_CSE    ,Private data read coherency attributes CPC stashing enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 16.--20. "                      PDR_CA_CSD    ,Private data read coherency attributes CPC stashing disabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 8.--12. "                      PDW_CA_CSE    ,Private data write coherency attributes CPC stashing enabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x04 0.--4. " PDW_CA_CSD    ,Private data write coherency attributes CPC stashing disabled" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x08 "CI_RLM_CFG,Initiator Read Latency Monitor Configuration"
bitfld.long 0x08 19. " TH_MODE_D     ,Mode setting for read latency D performance monitor signal" "Read Latency,Transaction stall time"
bitfld.long 0x08 18. "  TH_MODE_C     ,Mode setting for read latency C performance monitor signal" "Read Latency,Transaction stall time"
bitfld.long 0x08 17. "  TH_MODE_B     ,Mode setting for read latency B performance monitor signal" "Read Latency,Transaction stall time"
newline
bitfld.long 0x08 16. " TH_MODE_A     ,Mode setting for read latency A performance monitor signal" "Read Latency,Transaction stall time"
bitfld.long 0x08 12.--15. "  RLM_TH_D      ,Threshold which is used for comparison in the generation of the initiator read latency D performance monitor signal" "6 cycles,8 cycles,12 cycles,16 cycles,24 cycles,32 cycles,48 cycles,64 cycles,96 cycles,128 cycles,192 cycles,256 cycles,384 cycles,512 cycles,768 cycles,1024 cycles"
bitfld.long 0x08 8.--11. "             RLM_TH_C      ,Threshold which is used for comparison in the generation of the initiator read latency C performance monitor signal" "6 cycles,8 cycles,12 cycles,16 cycles,24 cycles,32 cycles,48 cycles,64 cycles,96 cycles,128 cycles,192 cycles,256 cycles,384 cycles,512 cycles,768 cycles,1024 cycles"
newline
bitfld.long 0x08 4.--7. " RLM_TH_B      ,Threshold which is used for comparison in the generation of the initiator read latency B performance monitor signal" "6 cycles,8 cycles,12 cycles,16 cycles,24 cycles,32 cycles,48 cycles,64 cycles,96 cycles,128 cycles,192 cycles,256 cycles,384 cycles,512 cycles,768 cycles,1024 cycles"
bitfld.long 0x08 0.--3. "             RLM_TH_A      ,Threshold which is used for comparison in the generation of the initiator read latency A performance monitor signal" "6 cycles,8 cycles,12 cycles,16 cycles,24 cycles,32 cycles,48 cycles,64 cycles,96 cycles,128 cycles,192 cycles,256 cycles,384 cycles,512 cycles,768 cycles,1024 cycles"
line.long 0x0C "CI_RLM_AVG,Initiator Read Latency Monitor Average"
hexmask.long.word 0x0C 8.--19. 1. " RLM_AVG_INT   ,Integer portion of the measured average latency value"
hexmask.long.byte 0x0C 0.--7. 1. "                    RLM_AVG_FRACT ,Fractional portion of the measured average latency value"
group.long 0xE00++0x0F
line.long 0x00 "RERR_ISR,Recoverable Error Interrupt Status Register"
eventfld.long 0x00 31. " PLWI3         ,PFDR low watermark interrupt alternate PFDR pool 3" "No interrupt,Interrupt"
eventfld.long 0x00 30. "            PLWI2         ,PFDR low watermark interrupt alternate PFDR pool 2" "No interrupt,Interrupt"
eventfld.long 0x00 29. "            PLWI1         ,PFDR low watermark interrupt alternate PFDR pool 1" "No interrupt,Interrupt"
newline
eventfld.long 0x00 26. " RPLI          ,Replication list interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 25. "            RPQI          ,Replicator invalid queue interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 24. "            AVI           ,Access violation interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 21. " SBEI          ,Single bit ECC error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 20. "            FLWI          ,FBPR low watermark interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 19. "            PLWI          ,PFDR low watermark interrupt base PFDR pool" "No interrupt,Interrupt"
newline
eventfld.long 0x00 18. " PEBI          ,PFDR enqueues blocked interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 17. "            IFSI          ,Invalid FQ flow control state interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 16. "            ICVI          ,Invalid command verb interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 11. " IDDI          ,Invalid dequeue direct connect portal interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 10. "            IDFI          ,Invalid dequeue FQ interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 9. "            IDSI          ,Invalid dequeue source interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 8. " IDQI          ,Invalid dequeue queue interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 5. "            IERE          ,Invalid enqueue reject error" "No interrupt,Interrupt"
eventfld.long 0x00 4. "            IECE          ,Invalid enqueue configuration error" "No interrupt,Interrupt"
newline
eventfld.long 0x00 3. " IEOI          ,Invalid enqueue overflow interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 2. "            IESI          ,Invalid enqueue state interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 1. "            IECI          ,Invalid enqueue channel interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 0. " IEQI          ,Invalid enqueue queue interrupt" "No interrupt,Interrupt"
line.long 0x04 "RERR_IER,Recoverable Error Interrupt Enable Register"
bitfld.long 0x04 31. " PLWI3         ,Interrupt enable bit for RERR_ISR[PLWI3]" "No effect,Enable"
bitfld.long 0x04 30. "               PLWI2         ,Interrupt enable bit for RERR_ISR[PLWI2]" "No effect,Enable"
bitfld.long 0x04 29. "               PLWI1         ,Interrupt enable bit for RERR_ISR[PLWI1]" "No effect,Enable"
newline
bitfld.long 0x04 26. " RPLI          ,Interrupt enable bit for RERR_ISR[RPLI]" "No effect,Enable"
bitfld.long 0x04 25. "               RPQI          ,Interrupt enable bit for RERR_ISR[RPQI]" "No effect,Enable"
bitfld.long 0x04 24. "               AVI           ,Interrupt enable bit for RERR_ISR[AVI]" "No effect,Enable"
newline
bitfld.long 0x04 21. " SBEI          ,Interrupt enable bit for RERR_ISR[SBEI]" "No effect,Enable"
bitfld.long 0x04 20. "               FLWI          ,Interrupt enable bit for RERR_ISR[FLWI]" "No effect,Enable"
bitfld.long 0x04 19. "               PLWI          ,Interrupt enable bit for RERR_ISR[PLWI]" "No effect,Enable"
newline
bitfld.long 0x04 18. " PEBI          ,Interrupt enable bit for RERR_ISR[PEBI]" "No effect,Enable"
bitfld.long 0x04 17. "               IFSI          ,Interrupt enable bit for RERR_ISR[IFSI]" "No effect,Enable"
bitfld.long 0x04 16. "               ICVI          ,Interrupt enable bit for RERR_ISR[ICVI]" "No effect,Enable"
newline
bitfld.long 0x04 11. " IDDI          ,Interrupt enable bit for RERR_ISR[IDDI]" "No effect,Enable"
bitfld.long 0x04 10. "               IDFI          ,Interrupt enable bit for RERR_ISR[IDFI]" "No effect,Enable"
bitfld.long 0x04 9. "               IDSI          ,Interrupt enable bit for RERR_ISR[IDSI]" "No effect,Enable"
newline
bitfld.long 0x04 8. " IDQI          ,Interrupt enable bit for RERR_ISR[IDQI]" "No effect,Enable"
bitfld.long 0x04 5. "               IERE          ,Interrupt enable bit for RERR_ISR[IERE]" "No effect,Enable"
bitfld.long 0x04 4. "               IECE          ,Interrupt enable bit for RERR_ISR[IECE]" "No effect,Enable"
newline
bitfld.long 0x04 3. " IEOI          ,Interrupt enable bit for RERR_ISR[IEOI]" "No effect,Enable"
bitfld.long 0x04 2. "               IESI          ,Interrupt enable bit for RERR_ISR[IESI]" "No effect,Enable"
bitfld.long 0x04 1. "               IECI          ,Interrupt enable bit for RERR_ISR[IECI]" "No effect,Enable"
newline
bitfld.long 0x04 0. " IEQI          ,Interrupt enable bit for RERR_ISR[IEQI]" "No effect,Enable"
line.long 0x08 "RERR_ISDR,Recoverable Error Interrupt Status Disable Register"
bitfld.long 0x08 31. " PLWI3         ,Interrupt status disable bit for RERR_ISR[PLWI3]" "No effect,Disable"
bitfld.long 0x08 30. "               PLWI2         ,Interrupt status disable bit for RERR_ISR[PLWI2]" "No effect,Disable"
bitfld.long 0x08 29. "               PLWI1         ,Interrupt status disable bit for RERR_ISR[PLWI1]" "No effect,Disable"
newline
bitfld.long 0x08 26. " RPLI          ,Interrupt enable bit for RERR_ISR[RPLI]" "No effect,Disable"
bitfld.long 0x08 25. "               RPQI          ,Interrupt status disable bit for RERR_ISR[RPQI]" "No effect,Disable"
bitfld.long 0x08 24. "               AVI           ,Interrupt status disable bit for RERR_ISR[AVI]" "No effect,Disable"
newline
bitfld.long 0x08 21. " SBEI          ,Interrupt status disable bit for RERR_ISR[SBEI]" "No effect,Disable"
bitfld.long 0x08 20. "               FLWI          ,Interrupt status disable bit for RERR_ISR[FLWI]" "No effect,Disable"
bitfld.long 0x08 19. "               PLWI          ,Interrupt status disable bit for RERR_ISR[PLWI]" "No effect,Disable"
newline
bitfld.long 0x08 18. " PEBI          ,Interrupt status disable bit for RERR_ISR[PEBI]" "No effect,Disable"
bitfld.long 0x08 17. "               IFSI          ,Interrupt status disable bit for RERR_ISR[IFSI]" "No effect,Disable"
bitfld.long 0x08 16. "               ICVI          ,Interrupt status disable bit for RERR_ISR[ICVI]" "No effect,Disable"
newline
bitfld.long 0x08 11. " IDDI          ,Interrupt status disable bit for RERR_ISR[IDDI]" "No effect,Disable"
bitfld.long 0x08 10. "               IDFI          ,Interrupt status disable bit for RERR_ISR[IDFI]" "No effect,Disable"
bitfld.long 0x08 9. "               IDSI          ,Interrupt status disable bit for RERR_ISR[IDSI]" "No effect,Disable"
newline
bitfld.long 0x08 8. " IDQI          ,Interrupt status disable bit for RERR_ISR[IDQI]" "No effect,Disable"
bitfld.long 0x08 5. "               IERE          ,Interrupt status disable bit for RERR_ISR[IERE]" "No effect,Disable"
bitfld.long 0x08 4. "               IECE          ,Interrupt status disable bit for RERR_ISR[IECE]" "No effect,Disable"
newline
bitfld.long 0x08 3. " IEOI          ,Interrupt status disable bit for RERR_ISR[IEOI]" "No effect,Disable"
bitfld.long 0x08 2. "               IESI          ,Interrupt status disable bit for RERR_ISR[IESI]" "No effect,Disable"
bitfld.long 0x08 1. "               IECI          ,Interrupt status disable bit for RERR_ISR[IECI]" "No effect,Disable"
newline
bitfld.long 0x08 0. " IEQI          ,Interrupt status disable bit for RERR_ISR[IEQI]" "No effect,Disable"
line.long 0x0C "RERR_IIR,Recoverable Error Interrupt Inhibit Register"
bitfld.long 0x0C 0. " I             ,Interrupt inhibit" "Not inhibited,Inhibited"
group.long 0xE14++0x03
line.long 0x00 "RERR_HER,Recoverable Error Halt Enable Register"
bitfld.long 0x00 31. " PLWI3         ,Halt enable bit for RERR_ISR[PLWI3]" "Disabled,Enabled"
bitfld.long 0x00 30. "                PLWI2         ,Halt enable bit for RERR_ISR[PLWI2]" "Disabled,Enabled"
bitfld.long 0x00 29. "                PLWI1         ,Halt enable bit for RERR_ISR[PLWI1]" "Disabled,Enabled"
newline
bitfld.long 0x00 26. " RPLI          ,Halt enable bit for RERR_ISR[RPLI]" "Disabled,Enabled"
bitfld.long 0x00 25. "                RPQI          ,Halt enable bit for RERR_ISR[RPQI]" "Disabled,Enabled"
bitfld.long 0x00 24. "                AVI           ,Halt enable bit for RERR_ISR[AVI]" "Disabled,Enabled"
newline
bitfld.long 0x00 21. " SBEI          ,Halt enable bit for RERR_ISR[SBEI]" "Disabled,Enabled"
bitfld.long 0x00 20. "                FLWI          ,Halt enable bit for RERR_ISR[FLWI]" "Disabled,Enabled"
bitfld.long 0x00 19. "                PLWI          ,Halt enable bit for RERR_ISR[PLWI]" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " PEBI          ,Halt enable bit for RERR_ISR[PEBI]" "Disabled,Enabled"
bitfld.long 0x00 17. "                IFSI          ,Halt enable bit for RERR_ISR[IFSI]" "Disabled,Enabled"
bitfld.long 0x00 16. "                ICVI          ,Halt enable bit for RERR_ISR[ICVI]" "Disabled,Enabled"
newline
bitfld.long 0x00 11. " IDDI          ,Halt enable bit for RERR_ISR[IDDI]" "Disabled,Enabled"
bitfld.long 0x00 10. "                IDFI          ,Halt enable bit for RERR_ISR[IDFI]" "Disabled,Enabled"
bitfld.long 0x00 9. "                IDSI          ,Halt enable bit for RERR_ISR[IDSI]" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " IDQI          ,Halt enable bit for RERR_ISR[IDQI]" "Disabled,Enabled"
bitfld.long 0x00 5. "                IERE          ,Halt enable bit for RERR_ISR[IERE]" "Disabled,Enabled"
bitfld.long 0x00 4. "                IECE          ,Halt enable bit for RERR_ISR[IECE]" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " IEOI          ,Halt enable bit for RERR_ISR[IEOI]" "Disabled,Enabled"
bitfld.long 0x00 2. "                IESI          ,Halt enable bit for RERR_ISR[IESI]" "Disabled,Enabled"
bitfld.long 0x00 1. "                IECI          ,Halt enable bit for RERR_ISR[IECI]" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " IEQI          ,Halt enable bit for RERR_ISR[IEQI]" "Disabled,Enabled"
group.long 0xE20++0x0F
line.long 0x00 "NRERR_ISR,Non-Recoverable Error Interrupt Status Register"
eventfld.long 0x00 6. " WQPI          ,WQ proxy record interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 5. "            RFQE          ,Recoverable error logging FQ error" "No interrupt,Interrupt"
eventfld.long 0x00 4. "            EMCI          ,External memory corruption interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 3. " CIDE          ,Initiator data error" "No interrupt,Interrupt"
eventfld.long 0x00 28. "            CTDE          ,Target data error" "No interrupt,Interrupt"
eventfld.long 0x00 1. "            CITT          ,CoreNet invalid target transaction" "No interrupt,Interrupt"
newline
eventfld.long 0x00 0. " MBEI          ,Multi-bit ECC error interrupt" "No interrupt,Interrupt"
line.long 0x04 "NRERR_IER,Non-Recoverable Error Interrupt Enable Register"
bitfld.long 0x04 6. " WQPI          ,WQ proxy record interrupt" "No effect,Enabled"
bitfld.long 0x04 5. "               RFQE          ,Recoverable error logging FQ error" "No effect,Enabled"
bitfld.long 0x04 4. "               EMCI          ,External memory corruption interrupt" "No effect,Enabled"
newline
bitfld.long 0x04 3. " CIDE          ,Initiator data error" "No effect,Enabled"
bitfld.long 0x04 2. "               CTDE          ,Target data error" "No effect,Enabled"
bitfld.long 0x04 1. "               CITT          ,Invalid target transaction" "No effect,Enabled"
newline
bitfld.long 0x04 0. " MBEI          ,Multi-bit ECC error interrupt" "No effect,Enabled"
line.long 0x08 "NRERR_ISDR,Non-Recoverable Error Interrupt Status Disable Register"
bitfld.long 0x08 6. " WQPI          ,WQ proxy record interrupt" "No effect,Disable"
bitfld.long 0x08 5. "               RFQE          ,Recoverable error logging FQ error" "No effect,Disable"
bitfld.long 0x08 4. "               EMCI          ,External memory corruption interrupt" "No effect,Disable"
newline
bitfld.long 0x08 3. " CIDE          ,Initiator data error" "No effect,Disable"
bitfld.long 0x08 2. "               CTDE          ,Target data error" "No effect,Disable"
bitfld.long 0x08 1. "               CITT          ,Invalid target transaction" "No effect,Disable"
newline
bitfld.long 0x08 0. " MBEI          ,Multi-bit ECC error interrupt" "No effect,Disable"
line.long 0x0C "NRERR_IIR,Non-Recoverable Error Interrupt Inhibit Register"
bitfld.long 0x0C 0. " I             ,Interrupt inhibit" "Not inhibited,Inhibited"
group.long 0xE34++0x03
line.long 0x00 "NRERR_HER,Non-Recoverable Error Halt Enable Register"
bitfld.long 0x00 6. " WQPI          ,WQ proxy record interrupt" "Disabled,Enabled"
bitfld.long 0x00 5. "                RFQE          ,Recoverable error logging FQ error" "Disabled,Enabled"
bitfld.long 0x00 4. "                EMCI          ,External memory corruption interrupt" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CIDE          ,Initiator data error" "Disabled,Enabled"
bitfld.long 0x00 2. "                CTDE          ,Target data error" "Disabled,Enabled"
bitfld.long 0x00 1. "                CITT          ,Invalid target transaction" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " MBEI          ,Multi-bit ECC error interrupt" "Disabled,Enabled"
width 0x0B
tree.end
; tree.open "QMAN_SWP"
; %for (35)(0x00,0x10000)(0,1)
; tree "Software Portal $2"
; base ad:$1
; %include ls20xx/dpaa2/qman_swp.ph ad:$1 $2
; tree.end
; tree "Software Portal $2 Alias"
; base ad:$1
; %include ls20xx/dpaa2/qman_swp_alias.ph ad:$1 $2
; tree.end
; %endfor
; tree.end
tree.end
tree "MC (Management Complex)"
base ad:0x08340000
width 9.
group.long 0x00++0x03
line.long 0x00 "GCR1,General Control Register 1"
bitfld.long 0x00 31. " P1_STOP     ,Processor 1 stop" "Released to run,Stopped"
bitfld.long 0x00 23. "         P1_RST_B ,Processor 1 reset" "No reset,Reset"
bitfld.long 0x00 15. "   M1_RST_B   ,Command portals 1-256 reset" "Reset,No reset"
newline
bitfld.long 0x00 0. " G_RST       ,MC global reset" "De-asserted,Asserted"
group.long 0x08++0x03
line.long 0x00 "GSR,General Status Register"
bitfld.long 0x00 31. " HERR        ,Hardware error" "Ran,Not ran/Internal error"
bitfld.long 0x00 30. "  CERR     ,Catastrophic error" "No error,Error"
hexmask.long.tbyte 0x00 8.--29. 1. "   DPL_OFFSET ,DPL offset"
newline
hexmask.long.byte 0x00 0.--7. 1. " MCS         ,MC status"
group.long 0x20++0x0B
line.long 0x00 "MCFBALR,MC Firmware Base Address Low"
bitfld.long 0x00 29.--31. " MCFBAR_LOW  ,MC firmware base address low" "0,1,2,3,4,5,6,7"
line.long 0x04 "MCFBAHR,MC Firmware Base Address High"
hexmask.long.tbyte 0x04 0.--16. 1. " MCFBAR_HIGH ,MC firmware base address high"
line.long 0x08 "MCFAPR,MC Firmware Attributes And Partitioning Register"
bitfld.long 0x08 18. " PL          ,Privilege level" "0,1"
bitfld.long 0x08 17. "                       BMT      ,Bypass memory translation" "0,1"
hexmask.long.word 0x08 0.--14. 1. "          ICID       ,Isolation context ID"
rgroup.long 0xBF0++0x03
line.long 0x00 "PSR,Parameter Summary Register"
bitfld.long 0x00 28.--31. " PROCS       ,Total number of processors" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                      ADDR_W   ,External address physical width" "32,,36,,40,,44,,48,49,?..."
hexmask.long.byte 0x00 16.--23. 1. "         DPAA_INTS  ,DPAA2 interrupt inputs"
newline
hexmask.long.word 0x00 0.--15. 1. " CMD_PORTALS ,Command portals"
rgroup.long 0xBF8++0x07
line.long 0x00 "BRR1,Block Revision Register 1"
hexmask.long.byte 0x00 24.--31. 1. " IPMN        ,DPL offset"
hexmask.long.byte 0x00 16.--23. 1. "                      IPMJ     ,DPL offset"
hexmask.long.word 0x00 0.--15. 1. "         IPID       ,MC status"
line.long 0x04 "BRR2,Block Revision Register 2"
hexmask.long.byte 0x04 24.--31. 1. " IPCFGO      ,IP block configuration options"
hexmask.long.byte 0x04 0.--7. 1. "                      IPINTO   ,IP block integration options"
width 0x0B
tree.end
tree.open "WRIOP (Wire Rate IO Processor)"
; tree "Interface Profile Record Registers"
; tree "Ingress"
; base ad:0x00
; %include ls20xx/dpaa2/wriop_intprd.ph i
; tree.end
; tree "Egress"
; base ad:0x00
; %include ls20xx/dpaa2/wriop_intprd.ph e
; tree.end
; tree.end
; tree "Interface Profile Special Functions Registers"
; base ad:0x00
; %include ls20xx/dpaa2/wriop_intspec.ph
; tree.end
tree "Global Registers"
base ad:0x08B90000
width 14.
endian.be
group.long 0x00++0x07
line.long 0x00 "IOP_CGPA,IOP Congestion Group Priority Address"
hexmask.long.word 0x00 18.--31. 0x04 " ADDR              ,Congestion group/Buffer depletion priority mapping table address"
bitfld.long 0x00 16. "         CB                ,Congestion group/Buffer depletion priority mapping table selection" "Congestion group,Buffer depletion"
line.long 0x04 "IOP_CGPD,IOP Congestion Group Priority Data"
hexmask.long.byte 0x04 24.--31. 1. " CGP_CONG_ID_PPID3 ,Congestion group priority 3"
hexmask.long.byte 0x04 16.--23. 1. "           CGP_CONG_ID_PPID2 ,Congestion group priority 2"
newline
hexmask.long.byte 0x04 8.--15. 1. " CGP_CONG_ID_PPID1 ,Congestion group priority 1"
hexmask.long.byte 0x04 0.--7. 1. "           CGP_CONG_ID_PPID0 ,Congestion group priority 0"
group.long 0x1410++0x0B
line.long 0x00 "IOP_TPBBH,Temporary PFC Buffer Base High"
line.long 0x04 "IOP_TPBBL,Temporary PFC Buffer Base Low"
line.long 0x08 "IOP_TPBICID,Temporary PFC Buffer Isolation Context"
hexmask.long.word 0x08 17.--31. 1. " ICID              ,Isolation context ID"
newline
bitfld.long 0x08 14. " BMT               ,Bypass memory translation" "0,1"
bitfld.long 0x08 13. "            PL                ,Privilege level" "ICID unused,ICID used"
group.long 0x1800++0x07
line.long 0x00 "IOP_SBEV,System Bus Error Event"
eventfld.long 0x00 0. " SBEV              ,System bus error event" "No error,Error"
line.long 0x04 "IOP_SBEM,System Bus Error Event Mask Register"
bitfld.long 0x04 0. " SBEM              ,System bus error event mask" "Not masked,Masked"
group.long 0x1900++0x17
line.long 0x00 "IOP_CRCA,Coherent Read Cache Attributes"
bitfld.long 0x00 28.--31. " CANC              ,System cache attribute read non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "           NSNC              ,No-Snoop attribute for read non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x00 20.--23. "               CAN     ,System cache attribute read no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 19. " NSN               ,No-Snoop attribute for read no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x00 12.--15. "          CAA               ,System cache attribute read allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 11. "                NSA     ,No-Snoop attribute for read allocate (Snoop disable)" "No,Yes"
line.long 0x04 "IOP_NCRCA,Non Coherent Read Cache Attributes"
bitfld.long 0x04 28.--31. " CANC              ,System cache attribute read non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 27. "           NSNC              ,No-Snoop attribute for read non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x04 20.--23. "               CAN     ,System cache attribute read no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 19. " NSN               ,No-Snoop attribute for read no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x04 12.--15. "          CAA               ,System cache attribute read allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 11. "                NSA     ,No-Snoop attribute for read allocate (Snoop disable)" "No,Yes"
line.long 0x08 "IOP_CBWCA,Coherent Bufferable Write Cache Attributes"
bitfld.long 0x08 28.--31. " CANC              ,System cache attribute write non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 27. "           NSNC              ,No-Snoop attribute for write non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x08 20.--23. "               CAN     ,System cache attribute write no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 19. " NSN               ,No-Snoop attribute for write no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x08 12.--15. "          CAA               ,System cache attribute write allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 11. "                NSA     ,No-Snoop attribute for write allocate (Snoop disable)" "No,Yes"
line.long 0x0C "IOP_NCBWCA,Non Coherent Bufferable Write Cache Attributes"
bitfld.long 0x0C 28.--31. " CANC              ,System cache attribute write non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 27. "           NSNC              ,No-Snoop attribute for write non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x0C 20.--23. "               CAN     ,System cache attribute write no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x0C 19. " NSN               ,No-Snoop attribute for write no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x0C 12.--15. "          CAA               ,System cache attribute write allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                NSA     ,No-Snoop attribute for write allocate (Snoop disable)" "No,Yes"
line.long 0x10 "IOP_CNBWCA,Coherent Non Bufferable Write Cache Attributes"
bitfld.long 0x10 28.--31. " CANC              ,System cache attribute write non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 27. "           NSNC              ,No-Snoop attribute for write non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x10 20.--23. "               CAN     ,System cache attribute write no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x10 19. " NSN               ,No-Snoop attribute for write no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x10 12.--15. "          CAA               ,System cache attribute write allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 11. "                NSA     ,No-Snoop attribute for write allocate (Snoop disable)" "No,Yes"
line.long 0x14 "IOP_NCNBWCA,Non Coherent Non Bufferable Write Cache Attributes"
bitfld.long 0x14 28.--31. " CANC              ,System cache attribute write non cacheable" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 27. "           NSNC              ,No-Snoop attribute for write non cacheable (Snoop disable)" "No,Yes"
bitfld.long 0x14 20.--23. "               CAN     ,System cache attribute write no allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x14 19. " NSN               ,No-Snoop attribute for write no allocate (Snoop disable)" "No,Yes"
bitfld.long 0x14 12.--15. "          CAA               ,System cache attribute write allocate" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 11. "                NSA     ,No-Snoop attribute for write allocate (Snoop disable)" "No,Yes"
rgroup.long 0x2030++0x0B
line.long 0x00 "IOP_EPI,Error Pending Interrupt Register"
bitfld.long 0x00 3. " PILKEI            ,Pending interlaken error interrupt" "Negated,Asserted"
bitfld.long 0x00 2. "     PSBEI             ,Pending system bus error interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 1. " PGEI              ,Pending general error interrupt" "Negated,Asserted"
bitfld.long 0x00 0. "     PECCEI            ,Pending double ECC error interrupt" "Negated,Asserted"
line.long 0x04 "IOP_NPI1,Normal Pending Interrupt Register 1"
bitfld.long 0x04 3. " PILKNI            ,Pending interlaken normal interrupt" "Negated,Asserted"
bitfld.long 0x04 2. "     PTMRNI            ,Pending 1588 timer normal interrupt" "Negated,Asserted"
line.long 0x08 "IOP_NPI2,Normal Pending Interrupt Register 2"
bitfld.long 0x08 31. " PMCNI31           ,Pending MACSEC31 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 30. "     PMCNI30           ,Pending MACSEC30 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 29. "          PMCNI29 ,Pending MACSEC29 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 28. " PMCNI28           ,Pending MACSEC28 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 27. "     PMCNI27           ,Pending MACSEC27 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 26. "          PMCNI26 ,Pending MACSEC26 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 25. " PMCNI25           ,Pending MACSEC25 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 24. "     PMCNI24           ,Pending MACSEC24 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 23. "          PMCNI23 ,Pending MACSEC23 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 22. " PMCNI22           ,Pending MACSEC22 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 21. "     PMCNI21           ,Pending MACSEC21 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 20. "          PMCNI20 ,Pending MACSEC20 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 19. " PMCNI19           ,Pending MACSEC19 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 18. "     PMCNI18           ,Pending MACSEC18 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 17. "          PMCNI17 ,Pending MACSEC17 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 16. " PMCNI16           ,Pending MACSEC16 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 15. "     PMCNI15           ,Pending MACSEC15 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 14. "          PMCNI14 ,Pending MACSEC14 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 13. " PMCNI13           ,Pending MACSEC13 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 12. "     PMCNI12           ,Pending MACSEC12 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 11. "          PMCNI11 ,Pending MACSEC11 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 10. " PMCNI10           ,Pending MACSEC10 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 9. "     PMCNI9            ,Pending MACSEC9 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 8. "          PMCNI8  ,Pending MACSEC8 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 7. " PMCNI7            ,Pending MACSEC7 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 6. "     PMCNI6            ,Pending MACSEC6 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 5. "          PMCNI5  ,Pending MACSEC5 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 4. " PMCNI4            ,Pending MACSEC4 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 3. "     PMCNI3            ,Pending MACSEC3 normal interrupt" "Negated,Asserted"
bitfld.long 0x08 2. "          PMCNI2  ,Pending MACSEC2 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x08 1. " PMCNI1            ,Pending MACSEC1 normal interrupt" "Negated,Asserted"
group.long 0x2040++0x03
line.long 0x00 "IOP_NPI4,Normal Pending Interrupt Register 4"
bitfld.long 0x00 31. " PMCNI31           ,Pending mEMAC31 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 30. "     PMCNI30           ,Pending mEMAC30 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 29. "          PMCNI29 ,Pending mEMAC29 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 28. " PMCNI28           ,Pending mEMAC28 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 27. "     PMCNI27           ,Pending mEMAC27 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 26. "          PMCNI26 ,Pending mEMAC26 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 25. " PMCNI25           ,Pending mEMAC25 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 24. "     PMCNI24           ,Pending mEMAC24 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 23. "          PMCNI23 ,Pending mEMAC23 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 22. " PMCNI22           ,Pending mEMAC22 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 21. "     PMCNI21           ,Pending mEMAC21 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 20. "          PMCNI20 ,Pending mEMAC20 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 19. " PMCNI19           ,Pending mEMAC19 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 18. "     PMCNI18           ,Pending mEMAC18 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 17. "          PMCNI17 ,Pending mEMAC17 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 16. " PMCNI16           ,Pending mEMAC16 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 15. "     PMCNI15           ,Pending mEMAC15 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 14. "          PMCNI14 ,Pending mEMAC14 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 13. " PMCNI13           ,Pending mEMAC13 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 12. "     PMCNI12           ,Pending mEMAC12 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 11. "          PMCNI11 ,Pending mEMAC11 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 10. " PMCNI10           ,Pending mEMAC10 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 9. "     PMCNI9            ,Pending mEMAC9 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 8. "          PMCNI8  ,Pending mEMAC8 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 7. " PMCNI7            ,Pending mEMAC7 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 6. "     PMCNI6            ,Pending mEMAC6 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 5. "          PMCNI5  ,Pending mEMAC5 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 4. " PMCNI4            ,Pending mEMAC4 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 3. "     PMCNI3            ,Pending mEMAC3 normal interrupt" "Negated,Asserted"
bitfld.long 0x00 2. "          PMCNI2  ,Pending mEMAC2 normal interrupt" "Negated,Asserted"
newline
bitfld.long 0x00 1. " PMCNI1            ,Pending mEMAC1 normal interrupt" "Negated,Asserted"
group.long 0x2048++0x07
line.long 0x00 "IOP_GEEV,General Error Event Register"
eventfld.long 0x00 0. " STLE              ,WRIOP stall event" "Not stalled,Stalled"
line.long 0x04 "IOP_GEEM,General Error Event Mask Register"
bitfld.long 0x04 0. " STLM              ,WRIOP stall event mask" "Masked,Not masked"
rgroup.long 0x2064++0x07
line.long 0x00 "IOP_IP_REV_1,IP Block Revision 1 Register"
hexmask.long.byte 0x00 24.--31. 1. " IP_MN             ,Minor revision"
hexmask.long.byte 0x00 16.--23. 1. "           IP_MJ             ,Major revision"
newline
hexmask.long.word 0x00 0.--15. 1. " IP_ID             ,IP block ID"
line.long 0x04 "IOP_IP_REV_2,IP Block Revision 2 Register"
hexmask.long.byte 0x04 24.--31. 1. " IP_CFG            ,Configuration options"
hexmask.long.byte 0x04 16.--23. 1. "           IP_ERR            ,Errata revision level"
newline
hexmask.long.byte 0x04 8.--15. 1. " IP_INT            ,Integration options"
wgroup.long 0x206C++0x03
line.long 0x00 "IOP_RSTC,Reset Command Register"
bitfld.long 0x00 1. " QBRSTC            ,QBMan interface reset" "No reset,Reset"
bitfld.long 0x00 0. "     RSTC              ,WRIOP soft reset" "No reset,Reset"
endian.le
width 0x0B
tree.end
tree "Port Registers"
base ad:0x08C00000
width 17.
endian.be
tree "Ingress"
tree "Port 0"
group.long 0x0++0x03
line.long 0x00 "IOP_PCR0_0,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x0+0x14)++0x03
line.long 0x00 "IOP_PFS0_0,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x0+0x1C)++0x03
line.long 0x00 "IOP_DP0_0,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x0+0x800)++0x03
line.long 0x00 "IOP_PDEF0_0,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x0+0xC00)++0x03
line.long 0x00 "IOP_CFG0_0,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x0+0xC04)++0x03
line.long 0x00 "IOP_ST0_0,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x0+0xC08)++0x03
line.long 0x00 "IOP_TP0_0,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 1"
group.long 0x4000++0x03
line.long 0x00 "IOP_PCR0_1,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x4000+0x14)++0x03
line.long 0x00 "IOP_PFS0_1,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x4000+0x1C)++0x03
line.long 0x00 "IOP_DP0_1,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x4000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_1,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x4000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_1,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x4000+0xC04)++0x03
line.long 0x00 "IOP_ST0_1,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x4000+0xC08)++0x03
line.long 0x00 "IOP_TP0_1,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 2"
group.long 0x8000++0x03
line.long 0x00 "IOP_PCR0_2,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x8000+0x14)++0x03
line.long 0x00 "IOP_PFS0_2,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x8000+0x1C)++0x03
line.long 0x00 "IOP_DP0_2,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x8000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_2,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x8000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_2,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x8000+0xC04)++0x03
line.long 0x00 "IOP_ST0_2,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x8000+0xC08)++0x03
line.long 0x00 "IOP_TP0_2,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 3"
group.long 0xC000++0x03
line.long 0x00 "IOP_PCR0_3,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0xC000+0x14)++0x03
line.long 0x00 "IOP_PFS0_3,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0xC000+0x1C)++0x03
line.long 0x00 "IOP_DP0_3,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0xC000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_3,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0xC000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_3,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0xC000+0xC04)++0x03
line.long 0x00 "IOP_ST0_3,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0xC000+0xC08)++0x03
line.long 0x00 "IOP_TP0_3,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 4"
group.long 0x10000++0x03
line.long 0x00 "IOP_PCR0_4,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x10000+0x14)++0x03
line.long 0x00 "IOP_PFS0_4,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x10000+0x1C)++0x03
line.long 0x00 "IOP_DP0_4,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x10000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_4,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x10000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_4,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x10000+0xC04)++0x03
line.long 0x00 "IOP_ST0_4,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x10000+0xC08)++0x03
line.long 0x00 "IOP_TP0_4,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 5"
group.long 0x14000++0x03
line.long 0x00 "IOP_PCR0_5,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x14000+0x14)++0x03
line.long 0x00 "IOP_PFS0_5,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x14000+0x1C)++0x03
line.long 0x00 "IOP_DP0_5,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x14000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_5,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x14000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_5,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x14000+0xC04)++0x03
line.long 0x00 "IOP_ST0_5,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x14000+0xC08)++0x03
line.long 0x00 "IOP_TP0_5,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 6"
group.long 0x18000++0x03
line.long 0x00 "IOP_PCR0_6,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x18000+0x14)++0x03
line.long 0x00 "IOP_PFS0_6,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x18000+0x1C)++0x03
line.long 0x00 "IOP_DP0_6,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x18000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_6,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x18000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_6,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x18000+0xC04)++0x03
line.long 0x00 "IOP_ST0_6,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x18000+0xC08)++0x03
line.long 0x00 "IOP_TP0_6,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 7"
group.long 0x1C000++0x03
line.long 0x00 "IOP_PCR0_7,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x1C000+0x14)++0x03
line.long 0x00 "IOP_PFS0_7,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x1C000+0x1C)++0x03
line.long 0x00 "IOP_DP0_7,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x1C000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_7,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x1C000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_7,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x1C000+0xC04)++0x03
line.long 0x00 "IOP_ST0_7,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x1C000+0xC08)++0x03
line.long 0x00 "IOP_TP0_7,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 8"
group.long 0x20000++0x03
line.long 0x00 "IOP_PCR0_8,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x20000+0x14)++0x03
line.long 0x00 "IOP_PFS0_8,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x20000+0x1C)++0x03
line.long 0x00 "IOP_DP0_8,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x20000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_8,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x20000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_8,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x20000+0xC04)++0x03
line.long 0x00 "IOP_ST0_8,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x20000+0xC08)++0x03
line.long 0x00 "IOP_TP0_8,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 9"
group.long 0x24000++0x03
line.long 0x00 "IOP_PCR0_9,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x24000+0x14)++0x03
line.long 0x00 "IOP_PFS0_9,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x24000+0x1C)++0x03
line.long 0x00 "IOP_DP0_9,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x24000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_9,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x24000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_9,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x24000+0xC04)++0x03
line.long 0x00 "IOP_ST0_9,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x24000+0xC08)++0x03
line.long 0x00 "IOP_TP0_9,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 10"
group.long 0x28000++0x03
line.long 0x00 "IOP_PCR0_10,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x28000+0x14)++0x03
line.long 0x00 "IOP_PFS0_10,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x28000+0x1C)++0x03
line.long 0x00 "IOP_DP0_10,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x28000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_10,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x28000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_10,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x28000+0xC04)++0x03
line.long 0x00 "IOP_ST0_10,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x28000+0xC08)++0x03
line.long 0x00 "IOP_TP0_10,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 11"
group.long 0x2C000++0x03
line.long 0x00 "IOP_PCR0_11,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x2C000+0x14)++0x03
line.long 0x00 "IOP_PFS0_11,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x2C000+0x1C)++0x03
line.long 0x00 "IOP_DP0_11,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x2C000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_11,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x2C000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_11,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x2C000+0xC04)++0x03
line.long 0x00 "IOP_ST0_11,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x2C000+0xC08)++0x03
line.long 0x00 "IOP_TP0_11,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 12"
group.long 0x30000++0x03
line.long 0x00 "IOP_PCR0_12,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x30000+0x14)++0x03
line.long 0x00 "IOP_PFS0_12,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x30000+0x1C)++0x03
line.long 0x00 "IOP_DP0_12,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x30000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_12,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x30000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_12,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x30000+0xC04)++0x03
line.long 0x00 "IOP_ST0_12,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x30000+0xC08)++0x03
line.long 0x00 "IOP_TP0_12,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 13"
group.long 0x34000++0x03
line.long 0x00 "IOP_PCR0_13,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x34000+0x14)++0x03
line.long 0x00 "IOP_PFS0_13,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x34000+0x1C)++0x03
line.long 0x00 "IOP_DP0_13,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x34000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_13,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x34000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_13,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x34000+0xC04)++0x03
line.long 0x00 "IOP_ST0_13,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x34000+0xC08)++0x03
line.long 0x00 "IOP_TP0_13,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 14"
group.long 0x38000++0x03
line.long 0x00 "IOP_PCR0_14,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x38000+0x14)++0x03
line.long 0x00 "IOP_PFS0_14,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x38000+0x1C)++0x03
line.long 0x00 "IOP_DP0_14,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x38000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_14,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x38000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_14,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x38000+0xC04)++0x03
line.long 0x00 "IOP_ST0_14,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x38000+0xC08)++0x03
line.long 0x00 "IOP_TP0_14,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 15"
group.long 0x3C000++0x03
line.long 0x00 "IOP_PCR0_15,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x3C000+0x14)++0x03
line.long 0x00 "IOP_PFS0_15,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x3C000+0x1C)++0x03
line.long 0x00 "IOP_DP0_15,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x3C000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_15,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x3C000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_15,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x3C000+0xC04)++0x03
line.long 0x00 "IOP_ST0_15,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x3C000+0xC08)++0x03
line.long 0x00 "IOP_TP0_15,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 16"
group.long 0x40000++0x03
line.long 0x00 "IOP_PCR0_16,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x40000+0x14)++0x03
line.long 0x00 "IOP_PFS0_16,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x40000+0x1C)++0x03
line.long 0x00 "IOP_DP0_16,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x40000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_16,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x40000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_16,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x40000+0xC04)++0x03
line.long 0x00 "IOP_ST0_16,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x40000+0xC08)++0x03
line.long 0x00 "IOP_TP0_16,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 17"
group.long 0x44000++0x03
line.long 0x00 "IOP_PCR0_17,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x44000+0x14)++0x03
line.long 0x00 "IOP_PFS0_17,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x44000+0x1C)++0x03
line.long 0x00 "IOP_DP0_17,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x44000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_17,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x44000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_17,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x44000+0xC04)++0x03
line.long 0x00 "IOP_ST0_17,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x44000+0xC08)++0x03
line.long 0x00 "IOP_TP0_17,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 18"
group.long 0x48000++0x03
line.long 0x00 "IOP_PCR0_18,Port Configuration Register"
bitfld.long 0x00 8.--11. " PRT   ,Port rate" "1/2.5G,5G,10G,20G,40G,,,,,,,,,,,Port is not operational"
bitfld.long 0x00 0.--3. "    PTY   ,Port type" "Ethernet 1/10Gbps,Ethernet 40/100Gbps,,,,,,,,,,,,,WRIOP recycle path port,?..."
group.long (0x48000+0x14)++0x03
line.long 0x00 "IOP_PFS0_18,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x48000+0x1C)++0x03
line.long 0x00 "IOP_DP0_18,DMA Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x48000+0x800)++0x03
line.long 0x00 "IOP_PDEF0_18,Port Defaults Register"
hexmask.long.word 0x00 4.--15. 1. " IFPID ,Initial interface profile ID"
group.long (0x48000+0xC00)++0x03
line.long 0x00 "IOP_CFG0_18,WRIOP Ingress Configuration Register"
bitfld.long 0x00 0. " EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x48000+0xC04)++0x03
line.long 0x00 "IOP_ST0_18,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x48000+0xC08)++0x03
line.long 0x00 "IOP_TP0_18,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree.end
tree "Egress"
tree "Port 0"
group.long (0x0+0x2004)++0x03
line.long 0x00 "IOP_CGED1_0,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x0+0x2014)++0x03
line.long 0x00 "IOP_PFS1_0,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x0+0x201C)++0x03
line.long 0x00 "IOP_DP1_0,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x0+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_0,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x0+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_0,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x0+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_0,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x0+0x2C04)++0x03
line.long 0x00 "IOP_ST1_0,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x0+0x2C08)++0x03
line.long 0x00 "IOP_TP1_0,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 1"
group.long (0x4000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_1,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x4000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_1,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x4000+0x201C)++0x03
line.long 0x00 "IOP_DP1_1,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x4000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_1,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x4000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_1,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x4000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_1,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x4000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_1,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x4000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_1,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 2"
group.long (0x8000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_2,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x8000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_2,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x8000+0x201C)++0x03
line.long 0x00 "IOP_DP1_2,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x8000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_2,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x8000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_2,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x8000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_2,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x8000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_2,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x8000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_2,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 3"
group.long (0xC000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_3,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0xC000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_3,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0xC000+0x201C)++0x03
line.long 0x00 "IOP_DP1_3,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0xC000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_3,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xC000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_3,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0xC000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_3,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0xC000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_3,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0xC000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_3,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 4"
group.long (0x10000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_4,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x10000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_4,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x10000+0x201C)++0x03
line.long 0x00 "IOP_DP1_4,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x10000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_4,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x10000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_4,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x10000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_4,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x10000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_4,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x10000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_4,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 5"
group.long (0x14000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_5,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x14000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_5,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x14000+0x201C)++0x03
line.long 0x00 "IOP_DP1_5,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x14000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_5,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x14000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_5,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x14000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_5,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x14000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_5,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x14000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_5,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 6"
group.long (0x18000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_6,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x18000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_6,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x18000+0x201C)++0x03
line.long 0x00 "IOP_DP1_6,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x18000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_6,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x18000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_6,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x18000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_6,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x18000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_6,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x18000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_6,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 7"
group.long (0x1C000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_7,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x1C000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_7,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x1C000+0x201C)++0x03
line.long 0x00 "IOP_DP1_7,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x1C000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_7,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x1C000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_7,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x1C000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_7,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x1C000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_7,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x1C000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_7,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 8"
group.long (0x20000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_8,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x20000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_8,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x20000+0x201C)++0x03
line.long 0x00 "IOP_DP1_8,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x20000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_8,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x20000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_8,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x20000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_8,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x20000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_8,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x20000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_8,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 9"
group.long (0x24000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_9,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x24000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_9,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x24000+0x201C)++0x03
line.long 0x00 "IOP_DP1_9,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x24000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_9,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x24000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_9,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x24000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_9,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x24000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_9,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x24000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_9,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 10"
group.long (0x28000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_10,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x28000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_10,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x28000+0x201C)++0x03
line.long 0x00 "IOP_DP1_10,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x28000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_10,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x28000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_10,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x28000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_10,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x28000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_10,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x28000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_10,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 11"
group.long (0x2C000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_11,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x2C000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_11,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x2C000+0x201C)++0x03
line.long 0x00 "IOP_DP1_11,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x2C000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_11,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x2C000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_11,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x2C000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_11,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x2C000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_11,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x2C000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_11,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 12"
group.long (0x30000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_12,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x30000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_12,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x30000+0x201C)++0x03
line.long 0x00 "IOP_DP1_12,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x30000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_12,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x30000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_12,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x30000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_12,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x30000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_12,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x30000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_12,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 13"
group.long (0x34000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_13,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x34000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_13,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x34000+0x201C)++0x03
line.long 0x00 "IOP_DP1_13,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x34000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_13,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x34000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_13,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x34000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_13,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x34000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_13,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x34000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_13,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 14"
group.long (0x38000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_14,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x38000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_14,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x38000+0x201C)++0x03
line.long 0x00 "IOP_DP1_14,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x38000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_14,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x38000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_14,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x38000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_14,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x38000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_14,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x38000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_14,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 15"
group.long (0x3C000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_15,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x3C000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_15,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x3C000+0x201C)++0x03
line.long 0x00 "IOP_DP1_15,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x3C000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_15,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x3C000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_15,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x3C000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_15,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x3C000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_15,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x3C000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_15,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 16"
group.long (0x40000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_16,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x40000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_16,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x40000+0x201C)++0x03
line.long 0x00 "IOP_DP1_16,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x40000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_16,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x40000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_16,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x40000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_16,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x40000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_16,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x40000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_16,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 17"
group.long (0x44000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_17,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x44000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_17,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x44000+0x201C)++0x03
line.long 0x00 "IOP_DP1_17,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x44000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_17,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x44000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_17,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x44000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_17,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x44000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_17,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x44000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_17,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree "Port 18"
group.long (0x48000+0x2004)++0x03
line.long 0x00 "IOP_CGED1_18,Frame Checksum Generation End Data Register"
bitfld.long 0x00 3.--7. " CGI   ,Checksum generation ignore" "Calculate for whole frame,Eliminate last byte,Eliminate last 2 bytes,Eliminate last 3 bytes,Eliminate last 4 bytes,Eliminate last 5 bytes,Eliminate last 6 bytes,Eliminate last 7 bytes,Eliminate last 8 bytes,Eliminate last 9 bytes,Eliminate last 10 bytes,Eliminate last 11 bytes,Eliminate last 12 bytes,Eliminate last 13 bytes,Eliminate last 14 bytes,Eliminate last 15 bytes,Eliminate last 16 bytes,?..."
group.long (0x48000+0x2014)++0x03
line.long 0x00 "IOP_PFS1_18,Port FIFO Size Register"
hexmask.long.word 0x00 22.--31. 1. " IFSZ  ,Internal FIFO size"
group.long (0x48000+0x201C)++0x03
line.long 0x00 "IOP_DP1_18,Port FIFO Size Register"
hexmask.long.byte 0x00 24.--31. 1. " MXD   ,Max DMA"
group.long (0x48000+0x2424)++0x03
line.long 0x00 "IOP_TXPFCM01_18,Tx Priority Based Flow Control Mapping Register"
bitfld.long 0x00 28.--31. " CEVM7 ,PFC class enable vector (CEV) bit 7 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                         CEVM6 ,PFC class enable vector (CEV) bit 6 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                   CEVM5 ,PFC class enable vector (CEV) bit 5 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " CEVM4 ,PFC class enable vector (CEV) bit 4 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "                         CEVM3 ,PFC class enable vector (CEV) bit 3 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                   CEVM2 ,PFC class enable vector (CEV) bit 2 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 4.--7. " CEVM1 ,PFC class enable vector (CEV) bit 1 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "                         CEVM0 ,PFC class enable vector (CEV) bit 0 to QMan traffic class (TC) mapping" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x48000+0x242C)++0x03
line.long 0x00 "IOP_FLCL1_18,FIFO Parameters Register"
hexmask.long.byte 0x00 24.--31. 1. " FLCL  ,FIFO low comfort level"
hexmask.long.byte 0x00 8.--15. 1. "                         EMFR  ,Egress maximum frames in FD queue"
group.long (0x48000+0x2C00)++0x03
line.long 0x00 "IOP_CFG1_18,WRIOP Egress Configuration Register"
bitfld.long 0x00 2. " FM    ,Flush mode" "Keep mode,Discard mode"
bitfld.long 0x00 0. "               EN    ,Port enable" "Disabled,Enabled"
rgroup.long (0x48000+0x2C04)++0x03
line.long 0x00 "IOP_ST1_18,Status Register"
hexmask.long.byte 0x00 24.--31. 1. " NTSKS ,Number of tasks"
bitfld.long 0x00 0. "                         BSY   ,Port busy" "Not busy,Busy"
rgroup.long (0x48000+0x2C08)++0x03
line.long 0x00 "IOP_TP1_18,Task Parameters Register"
hexmask.long.byte 0x00 0.--7. 1. " MXT   ,Maximum number of tasks"
tree.end
tree.end
endian.le
width 0x0B
tree.end
tree "CTLU"
tree "Ingress"
base ad:0x08B80000
width 14.
tree "CTLU Parser"
group.long 0x00++0x03 "Parser Configuration and Status"
line.long 0x00 "PAR_CFG,Parser Configuration"
bitfld.long 0x00 2. " CE     ,Clock power down enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  AD     ,Atomic fragment disable" "No,Yes"
bitfld.long 0x00 0. "  EN     ,Parser enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "PAR_IDLE,Parser Idle Register"
bitfld.long 0x00 0. " I      ,Parser idle" "Not idle,Idle"
group.long 0x08++0x03
line.long 0x00 "PAR_PCLIM,Parser Maximum Frame Parsing Cycle Limit Register"
hexmask.long.word 0x00 0.--12. 1. " PCLIM  ,Maximum frame parsing cycle limit"
rgroup.long 0x0C++0x07 "Parser Block ID"
line.long 0x00 "PAR_IP_REV_1,Parser IP Block ID"
hexmask.long.word 0x00 16.--31. 1. " IP_ID  ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "      IP_MJ  ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "   IP_MN  ,Minor revision"
line.long 0x04 "PAR_IP_REV_2,Parser IP Block ID 2"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT ,Integration options"
hexmask.long.byte 0x04 8.--15. 1. "        IP_ERR ,Errata revision level"
hexmask.long.byte 0x04 0.--7. 1. "   IP_CFG ,Configuration options"
tree.end
width 23.
tree "CTLU Control Registers"
endian.be
group.long 0x1000++0x03
line.long 0x00 "IOP_CMODE,CTLU Mode Register"
bitfld.long 0x00 0. " CINIT     ,CTLU init" "Not initialized,Initialized"
group.long 0x1004++0x07
line.long 0x00 "IOP_CTIMESTAMP_WINDOW,CTLU Timestamp Window Register"
bitfld.long 0x00 27.--31. " TWINDOW   ,Timestamp window" "Timestamp[32-63],Timestamp[31-62],Timestamp[30-61],Timestamp[29-60],Timestamp[28-59],Timestamp[27-58],Timestamp[26-57],Timestamp[25-56],Timestamp[24-55],Timestamp[23-54],Timestamp[22-53],Timestamp[21-52],Timestamp[20-51],Timestamp[19-50],Timestamp[18-49],Timestamp[17-48],Timestamp[16-47],Timestamp[15-46],Timestamp[14-45],Timestamp[13-44],Timestamp[12-43],Timestamp[11-42],Timestamp[10-41],Timestamp[9-40],Timestamp[8-39],Timestamp[7-38],Timestamp[6-37],Timestamp[5-36],Timestamp[4-35],Timestamp[3-34],Timestamp[2-33],Timestamp[1-32]"
line.long 0x04 "IOP_CMNLTH,CTLU Maximum Number Of Lookups Threshold"
hexmask.long.byte 0x04 24.--31. 1. " MNLTH     ,Maximum key composition and table lookups 'loops' threshold"
rgroup.long 0x101C++0x03
line.long 0x00 "IOP_CINITDONE,CTLU Initialization Completed Register"
bitfld.long 0x00 0. " CINITDONE ,CTLU initialization completed" "Not completed,Completed"
group.long 0x1318++0x03
line.long 0x00 "IOP_CHCDTH,CTLU Hash Chain Depth Performance Event Threshold"
hexmask.long.word 0x00 16.--31. 1. " CHCDTH    ,CTLU hash chain depth performance event threshold"
width 14.
tree "Lookup Tables Descriptors List"
group.long 0x1400++0x0B
line.long 0x00 "IOP_CTADDH_0,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_0,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_0,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1400+0x10)++0x07
line.long 0x00 "IOP_CTNCE_0,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_0,CTLU Number Of Excess Entries In Table Register"
tree.end
width 14.
tree "TCAM CTLU Lookup Tables"
group.long 0x1420++0x03
line.long 0x00 "IOP_CTADDH_1,CTLU Tables Base Address High Register"
group.long (0x1420+0x08)++0x03
line.long 0x00 "IOP_CTSIZE_1,Total CTLU Tables Size Register"
hexmask.long 0x00 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1420+0x10)++0x07
line.long 0x00 "IOP_CTNCE_1,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_1,CTLU Number Of Excess Entries In Table Register"
tree.end
width 14.
tree "Internal CTLU Lookup Tables"
group.long 0x1440++0x0B
line.long 0x00 "IOP_CTADDH_2,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_2,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_2,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1440+0x10)++0x07
line.long 0x00 "IOP_CTNCE_2,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_2,CTLU Number Of Excess Entries In Table Register"
tree.end
endian.le
tree.end
width 17.
tree "CTLU Key Composition Registers"
endian.be
group.long (0x2000+0x0)++0x03
line.long 0x00 "IOP_CKRHCNT_0,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x0)++0x03
line.long 0x00 "IOP_CKCERR_0,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x8)++0x03
line.long 0x00 "IOP_CKRHCNT_1,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x8)++0x03
line.long 0x00 "IOP_CKCERR_1,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x10)++0x03
line.long 0x00 "IOP_CKRHCNT_2,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x10)++0x03
line.long 0x00 "IOP_CKCERR_2,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x18)++0x03
line.long 0x00 "IOP_CKRHCNT_3,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x18)++0x03
line.long 0x00 "IOP_CKCERR_3,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x20)++0x03
line.long 0x00 "IOP_CKRHCNT_4,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x20)++0x03
line.long 0x00 "IOP_CKCERR_4,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x28)++0x03
line.long 0x00 "IOP_CKRHCNT_5,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x28)++0x03
line.long 0x00 "IOP_CKCERR_5,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x30)++0x03
line.long 0x00 "IOP_CKRHCNT_6,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x30)++0x03
line.long 0x00 "IOP_CKCERR_6,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x38)++0x03
line.long 0x00 "IOP_CKRHCNT_7,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x38)++0x03
line.long 0x00 "IOP_CKCERR_7,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x40)++0x03
line.long 0x00 "IOP_CKRHCNT_8,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x40)++0x03
line.long 0x00 "IOP_CKCERR_8,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x48)++0x03
line.long 0x00 "IOP_CKRHCNT_9,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x48)++0x03
line.long 0x00 "IOP_CKCERR_9,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x50)++0x03
line.long 0x00 "IOP_CKRHCNT_10,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x50)++0x03
line.long 0x00 "IOP_CKCERR_10,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x58)++0x03
line.long 0x00 "IOP_CKRHCNT_11,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x58)++0x03
line.long 0x00 "IOP_CKCERR_11,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x60)++0x03
line.long 0x00 "IOP_CKRHCNT_12,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x60)++0x03
line.long 0x00 "IOP_CKCERR_12,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x68)++0x03
line.long 0x00 "IOP_CKRHCNT_13,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x68)++0x03
line.long 0x00 "IOP_CKCERR_13,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x70)++0x03
line.long 0x00 "IOP_CKRHCNT_14,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x70)++0x03
line.long 0x00 "IOP_CKCERR_14,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x78)++0x03
line.long 0x00 "IOP_CKRHCNT_15,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x78)++0x03
line.long 0x00 "IOP_CKCERR_15,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x80)++0x03
line.long 0x00 "IOP_CKRHCNT_16,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x80)++0x03
line.long 0x00 "IOP_CKCERR_16,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x88)++0x03
line.long 0x00 "IOP_CKRHCNT_17,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x88)++0x03
line.long 0x00 "IOP_CKCERR_17,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x90)++0x03
line.long 0x00 "IOP_CKRHCNT_18,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x90)++0x03
line.long 0x00 "IOP_CKCERR_18,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x98)++0x03
line.long 0x00 "IOP_CKRHCNT_19,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x98)++0x03
line.long 0x00 "IOP_CKCERR_19,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA0)++0x03
line.long 0x00 "IOP_CKRHCNT_20,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xA0)++0x03
line.long 0x00 "IOP_CKCERR_20,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA8)++0x03
line.long 0x00 "IOP_CKRHCNT_21,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xA8)++0x03
line.long 0x00 "IOP_CKCERR_21,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB0)++0x03
line.long 0x00 "IOP_CKRHCNT_22,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xB0)++0x03
line.long 0x00 "IOP_CKCERR_22,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB8)++0x03
line.long 0x00 "IOP_CKRHCNT_23,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xB8)++0x03
line.long 0x00 "IOP_CKCERR_23,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC0)++0x03
line.long 0x00 "IOP_CKRHCNT_24,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xC0)++0x03
line.long 0x00 "IOP_CKCERR_24,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC8)++0x03
line.long 0x00 "IOP_CKRHCNT_25,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xC8)++0x03
line.long 0x00 "IOP_CKCERR_25,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD0)++0x03
line.long 0x00 "IOP_CKRHCNT_26,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xD0)++0x03
line.long 0x00 "IOP_CKCERR_26,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD8)++0x03
line.long 0x00 "IOP_CKRHCNT_27,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xD8)++0x03
line.long 0x00 "IOP_CKCERR_27,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE0)++0x03
line.long 0x00 "IOP_CKRHCNT_28,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xE0)++0x03
line.long 0x00 "IOP_CKCERR_28,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE8)++0x03
line.long 0x00 "IOP_CKRHCNT_29,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xE8)++0x03
line.long 0x00 "IOP_CKCERR_29,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF0)++0x03
line.long 0x00 "IOP_CKRHCNT_30,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xF0)++0x03
line.long 0x00 "IOP_CKCERR_30,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF8)++0x03
line.long 0x00 "IOP_CKRHCNT_31,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xF8)++0x03
line.long 0x00 "IOP_CKCERR_31,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x100)++0x03
line.long 0x00 "IOP_CKRHCNT_32,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x100)++0x03
line.long 0x00 "IOP_CKCERR_32,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x108)++0x03
line.long 0x00 "IOP_CKRHCNT_33,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x108)++0x03
line.long 0x00 "IOP_CKCERR_33,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x110)++0x03
line.long 0x00 "IOP_CKRHCNT_34,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x110)++0x03
line.long 0x00 "IOP_CKCERR_34,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x118)++0x03
line.long 0x00 "IOP_CKRHCNT_35,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x118)++0x03
line.long 0x00 "IOP_CKCERR_35,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x120)++0x03
line.long 0x00 "IOP_CKRHCNT_36,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x120)++0x03
line.long 0x00 "IOP_CKCERR_36,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x128)++0x03
line.long 0x00 "IOP_CKRHCNT_37,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x128)++0x03
line.long 0x00 "IOP_CKCERR_37,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x130)++0x03
line.long 0x00 "IOP_CKRHCNT_38,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x130)++0x03
line.long 0x00 "IOP_CKCERR_38,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x138)++0x03
line.long 0x00 "IOP_CKRHCNT_39,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x138)++0x03
line.long 0x00 "IOP_CKCERR_39,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x140)++0x03
line.long 0x00 "IOP_CKRHCNT_40,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x140)++0x03
line.long 0x00 "IOP_CKCERR_40,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x148)++0x03
line.long 0x00 "IOP_CKRHCNT_41,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x148)++0x03
line.long 0x00 "IOP_CKCERR_41,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x150)++0x03
line.long 0x00 "IOP_CKRHCNT_42,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x150)++0x03
line.long 0x00 "IOP_CKCERR_42,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x158)++0x03
line.long 0x00 "IOP_CKRHCNT_43,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x158)++0x03
line.long 0x00 "IOP_CKCERR_43,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x160)++0x03
line.long 0x00 "IOP_CKRHCNT_44,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x160)++0x03
line.long 0x00 "IOP_CKCERR_44,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x168)++0x03
line.long 0x00 "IOP_CKRHCNT_45,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x168)++0x03
line.long 0x00 "IOP_CKCERR_45,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x170)++0x03
line.long 0x00 "IOP_CKRHCNT_46,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x170)++0x03
line.long 0x00 "IOP_CKCERR_46,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x178)++0x03
line.long 0x00 "IOP_CKRHCNT_47,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x178)++0x03
line.long 0x00 "IOP_CKCERR_47,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x180)++0x03
line.long 0x00 "IOP_CKRHCNT_48,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x180)++0x03
line.long 0x00 "IOP_CKCERR_48,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x188)++0x03
line.long 0x00 "IOP_CKRHCNT_49,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x188)++0x03
line.long 0x00 "IOP_CKCERR_49,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x190)++0x03
line.long 0x00 "IOP_CKRHCNT_50,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x190)++0x03
line.long 0x00 "IOP_CKCERR_50,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x198)++0x03
line.long 0x00 "IOP_CKRHCNT_51,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x198)++0x03
line.long 0x00 "IOP_CKCERR_51,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1A0)++0x03
line.long 0x00 "IOP_CKRHCNT_52,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1A0)++0x03
line.long 0x00 "IOP_CKCERR_52,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1A8)++0x03
line.long 0x00 "IOP_CKRHCNT_53,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1A8)++0x03
line.long 0x00 "IOP_CKCERR_53,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1B0)++0x03
line.long 0x00 "IOP_CKRHCNT_54,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1B0)++0x03
line.long 0x00 "IOP_CKCERR_54,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1B8)++0x03
line.long 0x00 "IOP_CKRHCNT_55,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1B8)++0x03
line.long 0x00 "IOP_CKCERR_55,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1C0)++0x03
line.long 0x00 "IOP_CKRHCNT_56,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1C0)++0x03
line.long 0x00 "IOP_CKCERR_56,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1C8)++0x03
line.long 0x00 "IOP_CKRHCNT_57,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1C8)++0x03
line.long 0x00 "IOP_CKCERR_57,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1D0)++0x03
line.long 0x00 "IOP_CKRHCNT_58,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1D0)++0x03
line.long 0x00 "IOP_CKCERR_58,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1D8)++0x03
line.long 0x00 "IOP_CKRHCNT_59,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1D8)++0x03
line.long 0x00 "IOP_CKCERR_59,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1E0)++0x03
line.long 0x00 "IOP_CKRHCNT_60,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1E0)++0x03
line.long 0x00 "IOP_CKCERR_60,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1E8)++0x03
line.long 0x00 "IOP_CKRHCNT_61,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1E8)++0x03
line.long 0x00 "IOP_CKCERR_61,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1F0)++0x03
line.long 0x00 "IOP_CKRHCNT_62,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1F0)++0x03
line.long 0x00 "IOP_CKCERR_62,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1F8)++0x03
line.long 0x00 "IOP_CKRHCNT_63,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x1F8)++0x03
line.long 0x00 "IOP_CKCERR_63,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x200)++0x03
line.long 0x00 "IOP_CKRHCNT_64,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x200)++0x03
line.long 0x00 "IOP_CKCERR_64,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x208)++0x03
line.long 0x00 "IOP_CKRHCNT_65,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x208)++0x03
line.long 0x00 "IOP_CKCERR_65,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x210)++0x03
line.long 0x00 "IOP_CKRHCNT_66,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x210)++0x03
line.long 0x00 "IOP_CKCERR_66,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x218)++0x03
line.long 0x00 "IOP_CKRHCNT_67,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x218)++0x03
line.long 0x00 "IOP_CKCERR_67,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x220)++0x03
line.long 0x00 "IOP_CKRHCNT_68,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x220)++0x03
line.long 0x00 "IOP_CKCERR_68,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x228)++0x03
line.long 0x00 "IOP_CKRHCNT_69,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x228)++0x03
line.long 0x00 "IOP_CKCERR_69,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x230)++0x03
line.long 0x00 "IOP_CKRHCNT_70,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x230)++0x03
line.long 0x00 "IOP_CKCERR_70,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x238)++0x03
line.long 0x00 "IOP_CKRHCNT_71,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x238)++0x03
line.long 0x00 "IOP_CKCERR_71,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x240)++0x03
line.long 0x00 "IOP_CKRHCNT_72,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x240)++0x03
line.long 0x00 "IOP_CKCERR_72,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x248)++0x03
line.long 0x00 "IOP_CKRHCNT_73,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x248)++0x03
line.long 0x00 "IOP_CKCERR_73,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x250)++0x03
line.long 0x00 "IOP_CKRHCNT_74,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x250)++0x03
line.long 0x00 "IOP_CKCERR_74,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x258)++0x03
line.long 0x00 "IOP_CKRHCNT_75,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x258)++0x03
line.long 0x00 "IOP_CKCERR_75,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x260)++0x03
line.long 0x00 "IOP_CKRHCNT_76,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x260)++0x03
line.long 0x00 "IOP_CKCERR_76,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x268)++0x03
line.long 0x00 "IOP_CKRHCNT_77,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x268)++0x03
line.long 0x00 "IOP_CKCERR_77,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x270)++0x03
line.long 0x00 "IOP_CKRHCNT_78,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x270)++0x03
line.long 0x00 "IOP_CKCERR_78,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x278)++0x03
line.long 0x00 "IOP_CKRHCNT_79,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x278)++0x03
line.long 0x00 "IOP_CKCERR_79,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x280)++0x03
line.long 0x00 "IOP_CKRHCNT_80,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x280)++0x03
line.long 0x00 "IOP_CKCERR_80,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x288)++0x03
line.long 0x00 "IOP_CKRHCNT_81,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x288)++0x03
line.long 0x00 "IOP_CKCERR_81,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x290)++0x03
line.long 0x00 "IOP_CKRHCNT_82,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x290)++0x03
line.long 0x00 "IOP_CKCERR_82,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x298)++0x03
line.long 0x00 "IOP_CKRHCNT_83,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x298)++0x03
line.long 0x00 "IOP_CKCERR_83,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2A0)++0x03
line.long 0x00 "IOP_CKRHCNT_84,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2A0)++0x03
line.long 0x00 "IOP_CKCERR_84,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2A8)++0x03
line.long 0x00 "IOP_CKRHCNT_85,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2A8)++0x03
line.long 0x00 "IOP_CKCERR_85,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2B0)++0x03
line.long 0x00 "IOP_CKRHCNT_86,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2B0)++0x03
line.long 0x00 "IOP_CKCERR_86,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2B8)++0x03
line.long 0x00 "IOP_CKRHCNT_87,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2B8)++0x03
line.long 0x00 "IOP_CKCERR_87,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2C0)++0x03
line.long 0x00 "IOP_CKRHCNT_88,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2C0)++0x03
line.long 0x00 "IOP_CKCERR_88,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2C8)++0x03
line.long 0x00 "IOP_CKRHCNT_89,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2C8)++0x03
line.long 0x00 "IOP_CKCERR_89,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2D0)++0x03
line.long 0x00 "IOP_CKRHCNT_90,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2D0)++0x03
line.long 0x00 "IOP_CKCERR_90,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2D8)++0x03
line.long 0x00 "IOP_CKRHCNT_91,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2D8)++0x03
line.long 0x00 "IOP_CKCERR_91,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2E0)++0x03
line.long 0x00 "IOP_CKRHCNT_92,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2E0)++0x03
line.long 0x00 "IOP_CKCERR_92,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2E8)++0x03
line.long 0x00 "IOP_CKRHCNT_93,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2E8)++0x03
line.long 0x00 "IOP_CKCERR_93,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2F0)++0x03
line.long 0x00 "IOP_CKRHCNT_94,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2F0)++0x03
line.long 0x00 "IOP_CKCERR_94,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2F8)++0x03
line.long 0x00 "IOP_CKRHCNT_95,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x2F8)++0x03
line.long 0x00 "IOP_CKCERR_95,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x300)++0x03
line.long 0x00 "IOP_CKRHCNT_96,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x300)++0x03
line.long 0x00 "IOP_CKCERR_96,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x308)++0x03
line.long 0x00 "IOP_CKRHCNT_97,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x308)++0x03
line.long 0x00 "IOP_CKCERR_97,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x310)++0x03
line.long 0x00 "IOP_CKRHCNT_98,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x310)++0x03
line.long 0x00 "IOP_CKCERR_98,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x318)++0x03
line.long 0x00 "IOP_CKRHCNT_99,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x318)++0x03
line.long 0x00 "IOP_CKCERR_99,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x320)++0x03
line.long 0x00 "IOP_CKRHCNT_100,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x320)++0x03
line.long 0x00 "IOP_CKCERR_100,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x328)++0x03
line.long 0x00 "IOP_CKRHCNT_101,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x328)++0x03
line.long 0x00 "IOP_CKCERR_101,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x330)++0x03
line.long 0x00 "IOP_CKRHCNT_102,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x330)++0x03
line.long 0x00 "IOP_CKCERR_102,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x338)++0x03
line.long 0x00 "IOP_CKRHCNT_103,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x338)++0x03
line.long 0x00 "IOP_CKCERR_103,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x340)++0x03
line.long 0x00 "IOP_CKRHCNT_104,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x340)++0x03
line.long 0x00 "IOP_CKCERR_104,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x348)++0x03
line.long 0x00 "IOP_CKRHCNT_105,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x348)++0x03
line.long 0x00 "IOP_CKCERR_105,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x350)++0x03
line.long 0x00 "IOP_CKRHCNT_106,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x350)++0x03
line.long 0x00 "IOP_CKCERR_106,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x358)++0x03
line.long 0x00 "IOP_CKRHCNT_107,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x358)++0x03
line.long 0x00 "IOP_CKCERR_107,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x360)++0x03
line.long 0x00 "IOP_CKRHCNT_108,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x360)++0x03
line.long 0x00 "IOP_CKCERR_108,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x368)++0x03
line.long 0x00 "IOP_CKRHCNT_109,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x368)++0x03
line.long 0x00 "IOP_CKCERR_109,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x370)++0x03
line.long 0x00 "IOP_CKRHCNT_110,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x370)++0x03
line.long 0x00 "IOP_CKCERR_110,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x378)++0x03
line.long 0x00 "IOP_CKRHCNT_111,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x378)++0x03
line.long 0x00 "IOP_CKCERR_111,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x380)++0x03
line.long 0x00 "IOP_CKRHCNT_112,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x380)++0x03
line.long 0x00 "IOP_CKCERR_112,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x388)++0x03
line.long 0x00 "IOP_CKRHCNT_113,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x388)++0x03
line.long 0x00 "IOP_CKCERR_113,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x390)++0x03
line.long 0x00 "IOP_CKRHCNT_114,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x390)++0x03
line.long 0x00 "IOP_CKCERR_114,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x398)++0x03
line.long 0x00 "IOP_CKRHCNT_115,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x398)++0x03
line.long 0x00 "IOP_CKCERR_115,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3A0)++0x03
line.long 0x00 "IOP_CKRHCNT_116,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3A0)++0x03
line.long 0x00 "IOP_CKCERR_116,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3A8)++0x03
line.long 0x00 "IOP_CKRHCNT_117,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3A8)++0x03
line.long 0x00 "IOP_CKCERR_117,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3B0)++0x03
line.long 0x00 "IOP_CKRHCNT_118,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3B0)++0x03
line.long 0x00 "IOP_CKCERR_118,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3B8)++0x03
line.long 0x00 "IOP_CKRHCNT_119,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3B8)++0x03
line.long 0x00 "IOP_CKCERR_119,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3C0)++0x03
line.long 0x00 "IOP_CKRHCNT_120,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3C0)++0x03
line.long 0x00 "IOP_CKCERR_120,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3C8)++0x03
line.long 0x00 "IOP_CKRHCNT_121,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3C8)++0x03
line.long 0x00 "IOP_CKCERR_121,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3D0)++0x03
line.long 0x00 "IOP_CKRHCNT_122,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3D0)++0x03
line.long 0x00 "IOP_CKCERR_122,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3D8)++0x03
line.long 0x00 "IOP_CKRHCNT_123,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3D8)++0x03
line.long 0x00 "IOP_CKCERR_123,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3E0)++0x03
line.long 0x00 "IOP_CKRHCNT_124,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3E0)++0x03
line.long 0x00 "IOP_CKCERR_124,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3E8)++0x03
line.long 0x00 "IOP_CKRHCNT_125,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3E8)++0x03
line.long 0x00 "IOP_CKCERR_125,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3F0)++0x03
line.long 0x00 "IOP_CKRHCNT_126,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3F0)++0x03
line.long 0x00 "IOP_CKCERR_126,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3F8)++0x03
line.long 0x00 "IOP_CKRHCNT_127,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x3F8)++0x03
line.long 0x00 "IOP_CKCERR_127,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x400)++0x03
line.long 0x00 "IOP_CKRHCNT_128,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x400)++0x03
line.long 0x00 "IOP_CKCERR_128,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x408)++0x03
line.long 0x00 "IOP_CKRHCNT_129,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x408)++0x03
line.long 0x00 "IOP_CKCERR_129,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x410)++0x03
line.long 0x00 "IOP_CKRHCNT_130,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x410)++0x03
line.long 0x00 "IOP_CKCERR_130,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x418)++0x03
line.long 0x00 "IOP_CKRHCNT_131,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x418)++0x03
line.long 0x00 "IOP_CKCERR_131,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x420)++0x03
line.long 0x00 "IOP_CKRHCNT_132,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x420)++0x03
line.long 0x00 "IOP_CKCERR_132,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x428)++0x03
line.long 0x00 "IOP_CKRHCNT_133,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x428)++0x03
line.long 0x00 "IOP_CKCERR_133,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x430)++0x03
line.long 0x00 "IOP_CKRHCNT_134,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x430)++0x03
line.long 0x00 "IOP_CKCERR_134,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x438)++0x03
line.long 0x00 "IOP_CKRHCNT_135,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x438)++0x03
line.long 0x00 "IOP_CKCERR_135,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x440)++0x03
line.long 0x00 "IOP_CKRHCNT_136,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x440)++0x03
line.long 0x00 "IOP_CKCERR_136,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x448)++0x03
line.long 0x00 "IOP_CKRHCNT_137,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x448)++0x03
line.long 0x00 "IOP_CKCERR_137,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x450)++0x03
line.long 0x00 "IOP_CKRHCNT_138,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x450)++0x03
line.long 0x00 "IOP_CKCERR_138,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x458)++0x03
line.long 0x00 "IOP_CKRHCNT_139,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x458)++0x03
line.long 0x00 "IOP_CKCERR_139,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x460)++0x03
line.long 0x00 "IOP_CKRHCNT_140,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x460)++0x03
line.long 0x00 "IOP_CKCERR_140,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x468)++0x03
line.long 0x00 "IOP_CKRHCNT_141,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x468)++0x03
line.long 0x00 "IOP_CKCERR_141,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x470)++0x03
line.long 0x00 "IOP_CKRHCNT_142,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x470)++0x03
line.long 0x00 "IOP_CKCERR_142,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x478)++0x03
line.long 0x00 "IOP_CKRHCNT_143,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x478)++0x03
line.long 0x00 "IOP_CKCERR_143,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x480)++0x03
line.long 0x00 "IOP_CKRHCNT_144,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x480)++0x03
line.long 0x00 "IOP_CKCERR_144,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x488)++0x03
line.long 0x00 "IOP_CKRHCNT_145,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x488)++0x03
line.long 0x00 "IOP_CKCERR_145,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x490)++0x03
line.long 0x00 "IOP_CKRHCNT_146,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x490)++0x03
line.long 0x00 "IOP_CKCERR_146,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x498)++0x03
line.long 0x00 "IOP_CKRHCNT_147,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x498)++0x03
line.long 0x00 "IOP_CKCERR_147,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4A0)++0x03
line.long 0x00 "IOP_CKRHCNT_148,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4A0)++0x03
line.long 0x00 "IOP_CKCERR_148,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4A8)++0x03
line.long 0x00 "IOP_CKRHCNT_149,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4A8)++0x03
line.long 0x00 "IOP_CKCERR_149,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4B0)++0x03
line.long 0x00 "IOP_CKRHCNT_150,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4B0)++0x03
line.long 0x00 "IOP_CKCERR_150,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4B8)++0x03
line.long 0x00 "IOP_CKRHCNT_151,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4B8)++0x03
line.long 0x00 "IOP_CKCERR_151,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4C0)++0x03
line.long 0x00 "IOP_CKRHCNT_152,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4C0)++0x03
line.long 0x00 "IOP_CKCERR_152,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4C8)++0x03
line.long 0x00 "IOP_CKRHCNT_153,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4C8)++0x03
line.long 0x00 "IOP_CKCERR_153,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4D0)++0x03
line.long 0x00 "IOP_CKRHCNT_154,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4D0)++0x03
line.long 0x00 "IOP_CKCERR_154,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4D8)++0x03
line.long 0x00 "IOP_CKRHCNT_155,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4D8)++0x03
line.long 0x00 "IOP_CKCERR_155,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4E0)++0x03
line.long 0x00 "IOP_CKRHCNT_156,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4E0)++0x03
line.long 0x00 "IOP_CKCERR_156,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4E8)++0x03
line.long 0x00 "IOP_CKRHCNT_157,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4E8)++0x03
line.long 0x00 "IOP_CKCERR_157,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4F0)++0x03
line.long 0x00 "IOP_CKRHCNT_158,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4F0)++0x03
line.long 0x00 "IOP_CKCERR_158,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4F8)++0x03
line.long 0x00 "IOP_CKRHCNT_159,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x4F8)++0x03
line.long 0x00 "IOP_CKCERR_159,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x500)++0x03
line.long 0x00 "IOP_CKRHCNT_160,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x500)++0x03
line.long 0x00 "IOP_CKCERR_160,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x508)++0x03
line.long 0x00 "IOP_CKRHCNT_161,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x508)++0x03
line.long 0x00 "IOP_CKCERR_161,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x510)++0x03
line.long 0x00 "IOP_CKRHCNT_162,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x510)++0x03
line.long 0x00 "IOP_CKCERR_162,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x518)++0x03
line.long 0x00 "IOP_CKRHCNT_163,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x518)++0x03
line.long 0x00 "IOP_CKCERR_163,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x520)++0x03
line.long 0x00 "IOP_CKRHCNT_164,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x520)++0x03
line.long 0x00 "IOP_CKCERR_164,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x528)++0x03
line.long 0x00 "IOP_CKRHCNT_165,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x528)++0x03
line.long 0x00 "IOP_CKCERR_165,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x530)++0x03
line.long 0x00 "IOP_CKRHCNT_166,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x530)++0x03
line.long 0x00 "IOP_CKCERR_166,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x538)++0x03
line.long 0x00 "IOP_CKRHCNT_167,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x538)++0x03
line.long 0x00 "IOP_CKCERR_167,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x540)++0x03
line.long 0x00 "IOP_CKRHCNT_168,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x540)++0x03
line.long 0x00 "IOP_CKCERR_168,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x548)++0x03
line.long 0x00 "IOP_CKRHCNT_169,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x548)++0x03
line.long 0x00 "IOP_CKCERR_169,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x550)++0x03
line.long 0x00 "IOP_CKRHCNT_170,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x550)++0x03
line.long 0x00 "IOP_CKCERR_170,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x558)++0x03
line.long 0x00 "IOP_CKRHCNT_171,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x558)++0x03
line.long 0x00 "IOP_CKCERR_171,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x560)++0x03
line.long 0x00 "IOP_CKRHCNT_172,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x560)++0x03
line.long 0x00 "IOP_CKCERR_172,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x568)++0x03
line.long 0x00 "IOP_CKRHCNT_173,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x568)++0x03
line.long 0x00 "IOP_CKCERR_173,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x570)++0x03
line.long 0x00 "IOP_CKRHCNT_174,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x570)++0x03
line.long 0x00 "IOP_CKCERR_174,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x578)++0x03
line.long 0x00 "IOP_CKRHCNT_175,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x578)++0x03
line.long 0x00 "IOP_CKCERR_175,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x580)++0x03
line.long 0x00 "IOP_CKRHCNT_176,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x580)++0x03
line.long 0x00 "IOP_CKCERR_176,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x588)++0x03
line.long 0x00 "IOP_CKRHCNT_177,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x588)++0x03
line.long 0x00 "IOP_CKCERR_177,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x590)++0x03
line.long 0x00 "IOP_CKRHCNT_178,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x590)++0x03
line.long 0x00 "IOP_CKCERR_178,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x598)++0x03
line.long 0x00 "IOP_CKRHCNT_179,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x598)++0x03
line.long 0x00 "IOP_CKCERR_179,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5A0)++0x03
line.long 0x00 "IOP_CKRHCNT_180,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5A0)++0x03
line.long 0x00 "IOP_CKCERR_180,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5A8)++0x03
line.long 0x00 "IOP_CKRHCNT_181,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5A8)++0x03
line.long 0x00 "IOP_CKCERR_181,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5B0)++0x03
line.long 0x00 "IOP_CKRHCNT_182,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5B0)++0x03
line.long 0x00 "IOP_CKCERR_182,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5B8)++0x03
line.long 0x00 "IOP_CKRHCNT_183,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5B8)++0x03
line.long 0x00 "IOP_CKCERR_183,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5C0)++0x03
line.long 0x00 "IOP_CKRHCNT_184,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5C0)++0x03
line.long 0x00 "IOP_CKCERR_184,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5C8)++0x03
line.long 0x00 "IOP_CKRHCNT_185,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5C8)++0x03
line.long 0x00 "IOP_CKCERR_185,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5D0)++0x03
line.long 0x00 "IOP_CKRHCNT_186,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5D0)++0x03
line.long 0x00 "IOP_CKCERR_186,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5D8)++0x03
line.long 0x00 "IOP_CKRHCNT_187,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5D8)++0x03
line.long 0x00 "IOP_CKCERR_187,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5E0)++0x03
line.long 0x00 "IOP_CKRHCNT_188,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5E0)++0x03
line.long 0x00 "IOP_CKCERR_188,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5E8)++0x03
line.long 0x00 "IOP_CKRHCNT_189,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5E8)++0x03
line.long 0x00 "IOP_CKCERR_189,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5F0)++0x03
line.long 0x00 "IOP_CKRHCNT_190,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5F0)++0x03
line.long 0x00 "IOP_CKCERR_190,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5F8)++0x03
line.long 0x00 "IOP_CKRHCNT_191,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x5F8)++0x03
line.long 0x00 "IOP_CKCERR_191,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x600)++0x03
line.long 0x00 "IOP_CKRHCNT_192,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x600)++0x03
line.long 0x00 "IOP_CKCERR_192,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x608)++0x03
line.long 0x00 "IOP_CKRHCNT_193,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x608)++0x03
line.long 0x00 "IOP_CKCERR_193,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x610)++0x03
line.long 0x00 "IOP_CKRHCNT_194,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x610)++0x03
line.long 0x00 "IOP_CKCERR_194,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x618)++0x03
line.long 0x00 "IOP_CKRHCNT_195,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x618)++0x03
line.long 0x00 "IOP_CKCERR_195,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x620)++0x03
line.long 0x00 "IOP_CKRHCNT_196,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x620)++0x03
line.long 0x00 "IOP_CKCERR_196,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x628)++0x03
line.long 0x00 "IOP_CKRHCNT_197,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x628)++0x03
line.long 0x00 "IOP_CKCERR_197,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x630)++0x03
line.long 0x00 "IOP_CKRHCNT_198,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x630)++0x03
line.long 0x00 "IOP_CKCERR_198,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x638)++0x03
line.long 0x00 "IOP_CKRHCNT_199,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x638)++0x03
line.long 0x00 "IOP_CKCERR_199,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x640)++0x03
line.long 0x00 "IOP_CKRHCNT_200,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x640)++0x03
line.long 0x00 "IOP_CKCERR_200,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x648)++0x03
line.long 0x00 "IOP_CKRHCNT_201,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x648)++0x03
line.long 0x00 "IOP_CKCERR_201,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x650)++0x03
line.long 0x00 "IOP_CKRHCNT_202,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x650)++0x03
line.long 0x00 "IOP_CKCERR_202,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x658)++0x03
line.long 0x00 "IOP_CKRHCNT_203,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x658)++0x03
line.long 0x00 "IOP_CKCERR_203,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x660)++0x03
line.long 0x00 "IOP_CKRHCNT_204,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x660)++0x03
line.long 0x00 "IOP_CKCERR_204,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x668)++0x03
line.long 0x00 "IOP_CKRHCNT_205,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x668)++0x03
line.long 0x00 "IOP_CKCERR_205,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x670)++0x03
line.long 0x00 "IOP_CKRHCNT_206,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x670)++0x03
line.long 0x00 "IOP_CKCERR_206,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x678)++0x03
line.long 0x00 "IOP_CKRHCNT_207,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x678)++0x03
line.long 0x00 "IOP_CKCERR_207,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x680)++0x03
line.long 0x00 "IOP_CKRHCNT_208,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x680)++0x03
line.long 0x00 "IOP_CKCERR_208,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x688)++0x03
line.long 0x00 "IOP_CKRHCNT_209,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x688)++0x03
line.long 0x00 "IOP_CKCERR_209,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x690)++0x03
line.long 0x00 "IOP_CKRHCNT_210,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x690)++0x03
line.long 0x00 "IOP_CKCERR_210,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x698)++0x03
line.long 0x00 "IOP_CKRHCNT_211,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x698)++0x03
line.long 0x00 "IOP_CKCERR_211,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6A0)++0x03
line.long 0x00 "IOP_CKRHCNT_212,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6A0)++0x03
line.long 0x00 "IOP_CKCERR_212,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6A8)++0x03
line.long 0x00 "IOP_CKRHCNT_213,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6A8)++0x03
line.long 0x00 "IOP_CKCERR_213,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6B0)++0x03
line.long 0x00 "IOP_CKRHCNT_214,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6B0)++0x03
line.long 0x00 "IOP_CKCERR_214,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6B8)++0x03
line.long 0x00 "IOP_CKRHCNT_215,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6B8)++0x03
line.long 0x00 "IOP_CKCERR_215,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6C0)++0x03
line.long 0x00 "IOP_CKRHCNT_216,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6C0)++0x03
line.long 0x00 "IOP_CKCERR_216,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6C8)++0x03
line.long 0x00 "IOP_CKRHCNT_217,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6C8)++0x03
line.long 0x00 "IOP_CKCERR_217,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6D0)++0x03
line.long 0x00 "IOP_CKRHCNT_218,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6D0)++0x03
line.long 0x00 "IOP_CKCERR_218,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6D8)++0x03
line.long 0x00 "IOP_CKRHCNT_219,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6D8)++0x03
line.long 0x00 "IOP_CKCERR_219,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6E0)++0x03
line.long 0x00 "IOP_CKRHCNT_220,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6E0)++0x03
line.long 0x00 "IOP_CKCERR_220,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6E8)++0x03
line.long 0x00 "IOP_CKRHCNT_221,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6E8)++0x03
line.long 0x00 "IOP_CKCERR_221,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6F0)++0x03
line.long 0x00 "IOP_CKRHCNT_222,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6F0)++0x03
line.long 0x00 "IOP_CKCERR_222,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6F8)++0x03
line.long 0x00 "IOP_CKRHCNT_223,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x6F8)++0x03
line.long 0x00 "IOP_CKCERR_223,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x700)++0x03
line.long 0x00 "IOP_CKRHCNT_224,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x700)++0x03
line.long 0x00 "IOP_CKCERR_224,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x708)++0x03
line.long 0x00 "IOP_CKRHCNT_225,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x708)++0x03
line.long 0x00 "IOP_CKCERR_225,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x710)++0x03
line.long 0x00 "IOP_CKRHCNT_226,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x710)++0x03
line.long 0x00 "IOP_CKCERR_226,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x718)++0x03
line.long 0x00 "IOP_CKRHCNT_227,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x718)++0x03
line.long 0x00 "IOP_CKCERR_227,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x720)++0x03
line.long 0x00 "IOP_CKRHCNT_228,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x720)++0x03
line.long 0x00 "IOP_CKCERR_228,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x728)++0x03
line.long 0x00 "IOP_CKRHCNT_229,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x728)++0x03
line.long 0x00 "IOP_CKCERR_229,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x730)++0x03
line.long 0x00 "IOP_CKRHCNT_230,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x730)++0x03
line.long 0x00 "IOP_CKCERR_230,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x738)++0x03
line.long 0x00 "IOP_CKRHCNT_231,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x738)++0x03
line.long 0x00 "IOP_CKCERR_231,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x740)++0x03
line.long 0x00 "IOP_CKRHCNT_232,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x740)++0x03
line.long 0x00 "IOP_CKCERR_232,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x748)++0x03
line.long 0x00 "IOP_CKRHCNT_233,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x748)++0x03
line.long 0x00 "IOP_CKCERR_233,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x750)++0x03
line.long 0x00 "IOP_CKRHCNT_234,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x750)++0x03
line.long 0x00 "IOP_CKCERR_234,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x758)++0x03
line.long 0x00 "IOP_CKRHCNT_235,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x758)++0x03
line.long 0x00 "IOP_CKCERR_235,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x760)++0x03
line.long 0x00 "IOP_CKRHCNT_236,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x760)++0x03
line.long 0x00 "IOP_CKCERR_236,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x768)++0x03
line.long 0x00 "IOP_CKRHCNT_237,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x768)++0x03
line.long 0x00 "IOP_CKCERR_237,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x770)++0x03
line.long 0x00 "IOP_CKRHCNT_238,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x770)++0x03
line.long 0x00 "IOP_CKCERR_238,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x778)++0x03
line.long 0x00 "IOP_CKRHCNT_239,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x778)++0x03
line.long 0x00 "IOP_CKCERR_239,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x780)++0x03
line.long 0x00 "IOP_CKRHCNT_240,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x780)++0x03
line.long 0x00 "IOP_CKCERR_240,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x788)++0x03
line.long 0x00 "IOP_CKRHCNT_241,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x788)++0x03
line.long 0x00 "IOP_CKCERR_241,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x790)++0x03
line.long 0x00 "IOP_CKRHCNT_242,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x790)++0x03
line.long 0x00 "IOP_CKCERR_242,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x798)++0x03
line.long 0x00 "IOP_CKRHCNT_243,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x798)++0x03
line.long 0x00 "IOP_CKCERR_243,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7A0)++0x03
line.long 0x00 "IOP_CKRHCNT_244,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7A0)++0x03
line.long 0x00 "IOP_CKCERR_244,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7A8)++0x03
line.long 0x00 "IOP_CKRHCNT_245,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7A8)++0x03
line.long 0x00 "IOP_CKCERR_245,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7B0)++0x03
line.long 0x00 "IOP_CKRHCNT_246,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7B0)++0x03
line.long 0x00 "IOP_CKCERR_246,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7B8)++0x03
line.long 0x00 "IOP_CKRHCNT_247,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7B8)++0x03
line.long 0x00 "IOP_CKCERR_247,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7C0)++0x03
line.long 0x00 "IOP_CKRHCNT_248,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7C0)++0x03
line.long 0x00 "IOP_CKCERR_248,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7C8)++0x03
line.long 0x00 "IOP_CKRHCNT_249,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7C8)++0x03
line.long 0x00 "IOP_CKCERR_249,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7D0)++0x03
line.long 0x00 "IOP_CKRHCNT_250,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7D0)++0x03
line.long 0x00 "IOP_CKCERR_250,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7D8)++0x03
line.long 0x00 "IOP_CKRHCNT_251,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7D8)++0x03
line.long 0x00 "IOP_CKCERR_251,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7E0)++0x03
line.long 0x00 "IOP_CKRHCNT_252,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7E0)++0x03
line.long 0x00 "IOP_CKCERR_252,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7E8)++0x03
line.long 0x00 "IOP_CKRHCNT_253,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7E8)++0x03
line.long 0x00 "IOP_CKCERR_253,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7F0)++0x03
line.long 0x00 "IOP_CKRHCNT_254,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7F0)++0x03
line.long 0x00 "IOP_CKCERR_254,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7F8)++0x03
line.long 0x00 "IOP_CKRHCNT_255,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x7F8)++0x03
line.long 0x00 "IOP_CKCERR_255,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
endian.le
tree.end
width 0x0B
tree.end
tree "Egress"
base ad:0x08B84000
width 14.
tree "CTLU Parser"
group.long 0x00++0x03 "Parser Configuration and Status"
line.long 0x00 "PAR_CFG,Parser Configuration"
bitfld.long 0x00 2. " CE     ,Clock power down enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  AD     ,Atomic fragment disable" "No,Yes"
bitfld.long 0x00 0. "  EN     ,Parser enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "PAR_IDLE,Parser Idle Register"
bitfld.long 0x00 0. " I      ,Parser idle" "Not idle,Idle"
group.long 0x08++0x03
line.long 0x00 "PAR_PCLIM,Parser Maximum Frame Parsing Cycle Limit Register"
hexmask.long.word 0x00 0.--12. 1. " PCLIM  ,Maximum frame parsing cycle limit"
rgroup.long 0x0C++0x07 "Parser Block ID"
line.long 0x00 "PAR_IP_REV_1,Parser IP Block ID"
hexmask.long.word 0x00 16.--31. 1. " IP_ID  ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "      IP_MJ  ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "   IP_MN  ,Minor revision"
line.long 0x04 "PAR_IP_REV_2,Parser IP Block ID 2"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT ,Integration options"
hexmask.long.byte 0x04 8.--15. 1. "        IP_ERR ,Errata revision level"
hexmask.long.byte 0x04 0.--7. 1. "   IP_CFG ,Configuration options"
tree.end
width 23.
tree "CTLU Control Registers"
endian.be
group.long 0x1004++0x07
line.long 0x00 "IOP_CTIMESTAMP_WINDOW,CTLU Timestamp Window Register"
bitfld.long 0x00 27.--31. " TWINDOW   ,Timestamp window" "Timestamp[32-63],Timestamp[31-62],Timestamp[30-61],Timestamp[29-60],Timestamp[28-59],Timestamp[27-58],Timestamp[26-57],Timestamp[25-56],Timestamp[24-55],Timestamp[23-54],Timestamp[22-53],Timestamp[21-52],Timestamp[20-51],Timestamp[19-50],Timestamp[18-49],Timestamp[17-48],Timestamp[16-47],Timestamp[15-46],Timestamp[14-45],Timestamp[13-44],Timestamp[12-43],Timestamp[11-42],Timestamp[10-41],Timestamp[9-40],Timestamp[8-39],Timestamp[7-38],Timestamp[6-37],Timestamp[5-36],Timestamp[4-35],Timestamp[3-34],Timestamp[2-33],Timestamp[1-32]"
line.long 0x04 "IOP_CMNLTH,CTLU Maximum Number Of Lookups Threshold"
hexmask.long.byte 0x04 24.--31. 1. " MNLTH     ,Maximum key composition and table lookups 'loops' threshold"
group.long 0x1318++0x03
line.long 0x00 "IOP_CHCDTH,CTLU Hash Chain Depth Performance Event Threshold"
hexmask.long.word 0x00 16.--31. 1. " CHCDTH    ,CTLU hash chain depth performance event threshold"
width 14.
tree "Lookup Tables Descriptors List"
group.long 0x1400++0x0B
line.long 0x00 "IOP_CTADDH_0,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_0,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_0,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1400+0x10)++0x07
line.long 0x00 "IOP_CTNCE_0,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_0,CTLU Number Of Excess Entries In Table Register"
tree.end
width 14.
tree "TCAM CTLU Lookup Tables"
group.long 0x1420++0x03
line.long 0x00 "IOP_CTADDH_1,CTLU Tables Base Address High Register"
group.long (0x1420+0x08)++0x03
line.long 0x00 "IOP_CTSIZE_1,Total CTLU Tables Size Register"
hexmask.long 0x00 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1420+0x10)++0x07
line.long 0x00 "IOP_CTNCE_1,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_1,CTLU Number Of Excess Entries In Table Register"
tree.end
width 14.
tree "Internal CTLU Lookup Tables"
group.long 0x1440++0x0B
line.long 0x00 "IOP_CTADDH_2,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_2,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_2,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1440+0x10)++0x07
line.long 0x00 "IOP_CTNCE_2,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_2,CTLU Number Of Excess Entries In Table Register"
tree.end
endian.le
tree.end
width 17.
tree "CTLU Key Composition Registers"
endian.be
group.long (0x2000+0x0)++0x03
line.long 0x00 "IOP_CKRHCNT_0,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x0)++0x03
line.long 0x00 "IOP_CKCERR_0,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x8)++0x03
line.long 0x00 "IOP_CKRHCNT_1,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x8)++0x03
line.long 0x00 "IOP_CKCERR_1,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x10)++0x03
line.long 0x00 "IOP_CKRHCNT_2,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x10)++0x03
line.long 0x00 "IOP_CKCERR_2,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x18)++0x03
line.long 0x00 "IOP_CKRHCNT_3,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x18)++0x03
line.long 0x00 "IOP_CKCERR_3,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x20)++0x03
line.long 0x00 "IOP_CKRHCNT_4,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x20)++0x03
line.long 0x00 "IOP_CKCERR_4,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x28)++0x03
line.long 0x00 "IOP_CKRHCNT_5,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x28)++0x03
line.long 0x00 "IOP_CKCERR_5,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x30)++0x03
line.long 0x00 "IOP_CKRHCNT_6,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x30)++0x03
line.long 0x00 "IOP_CKCERR_6,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x38)++0x03
line.long 0x00 "IOP_CKRHCNT_7,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x38)++0x03
line.long 0x00 "IOP_CKCERR_7,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x40)++0x03
line.long 0x00 "IOP_CKRHCNT_8,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x40)++0x03
line.long 0x00 "IOP_CKCERR_8,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x48)++0x03
line.long 0x00 "IOP_CKRHCNT_9,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x48)++0x03
line.long 0x00 "IOP_CKCERR_9,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x50)++0x03
line.long 0x00 "IOP_CKRHCNT_10,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x50)++0x03
line.long 0x00 "IOP_CKCERR_10,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x58)++0x03
line.long 0x00 "IOP_CKRHCNT_11,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x58)++0x03
line.long 0x00 "IOP_CKCERR_11,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x60)++0x03
line.long 0x00 "IOP_CKRHCNT_12,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x60)++0x03
line.long 0x00 "IOP_CKCERR_12,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x68)++0x03
line.long 0x00 "IOP_CKRHCNT_13,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x68)++0x03
line.long 0x00 "IOP_CKCERR_13,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x70)++0x03
line.long 0x00 "IOP_CKRHCNT_14,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x70)++0x03
line.long 0x00 "IOP_CKCERR_14,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x78)++0x03
line.long 0x00 "IOP_CKRHCNT_15,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x78)++0x03
line.long 0x00 "IOP_CKCERR_15,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x80)++0x03
line.long 0x00 "IOP_CKRHCNT_16,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x80)++0x03
line.long 0x00 "IOP_CKCERR_16,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x88)++0x03
line.long 0x00 "IOP_CKRHCNT_17,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x88)++0x03
line.long 0x00 "IOP_CKCERR_17,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x90)++0x03
line.long 0x00 "IOP_CKRHCNT_18,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x90)++0x03
line.long 0x00 "IOP_CKCERR_18,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x98)++0x03
line.long 0x00 "IOP_CKRHCNT_19,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0x98)++0x03
line.long 0x00 "IOP_CKCERR_19,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA0)++0x03
line.long 0x00 "IOP_CKRHCNT_20,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xA0)++0x03
line.long 0x00 "IOP_CKCERR_20,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA8)++0x03
line.long 0x00 "IOP_CKRHCNT_21,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xA8)++0x03
line.long 0x00 "IOP_CKCERR_21,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB0)++0x03
line.long 0x00 "IOP_CKRHCNT_22,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xB0)++0x03
line.long 0x00 "IOP_CKCERR_22,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB8)++0x03
line.long 0x00 "IOP_CKRHCNT_23,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xB8)++0x03
line.long 0x00 "IOP_CKCERR_23,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC0)++0x03
line.long 0x00 "IOP_CKRHCNT_24,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xC0)++0x03
line.long 0x00 "IOP_CKCERR_24,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC8)++0x03
line.long 0x00 "IOP_CKRHCNT_25,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xC8)++0x03
line.long 0x00 "IOP_CKCERR_25,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD0)++0x03
line.long 0x00 "IOP_CKRHCNT_26,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xD0)++0x03
line.long 0x00 "IOP_CKCERR_26,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD8)++0x03
line.long 0x00 "IOP_CKRHCNT_27,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xD8)++0x03
line.long 0x00 "IOP_CKCERR_27,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE0)++0x03
line.long 0x00 "IOP_CKRHCNT_28,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xE0)++0x03
line.long 0x00 "IOP_CKCERR_28,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE8)++0x03
line.long 0x00 "IOP_CKRHCNT_29,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xE8)++0x03
line.long 0x00 "IOP_CKCERR_29,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF0)++0x03
line.long 0x00 "IOP_CKRHCNT_30,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xF0)++0x03
line.long 0x00 "IOP_CKCERR_30,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF8)++0x03
line.long 0x00 "IOP_CKRHCNT_31,CTLU Key Composition Rule Hit Counter"
group.long (0x2004+0xF8)++0x03
line.long 0x00 "IOP_CKCERR_31,CTLU Key Composition Rule Error"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
endian.le
tree.end
width 0x0B
tree.end
tree.end
tree.end
tree "1588 TIM IP (1588 Timer IP Module)"
base ad:0x08B95000
endian.be
width 14.
rgroup.long 0x00++0x03
line.long 0x00 "TMR_ID,Module ID Register"
hexmask.long.byte 0x00 24.--31. 1. " REV_MN      ,Value identifies the minor revision of the 1588 timer module"
hexmask.long.byte 0x00 16.--23. 1. "                REV_MJ     ,Value identifies the major revision of the 1588 timer module"
hexmask.long.word 0x00 0.--15. 1. "              TMR_ID ,Value identifying the 1588 timer module"
sif !cpuis("LS2088A")&&!cpuis("LS2084A")&&!cpuis("LS2048A")&&!cpuis("LS2044A")
hgroup.long 0x04++0x03
hide.long 0x00 "TMR_ID2,Controller ID Register"
endif
group.long 0x80++0x0B
line.long 0x00 "TMR_CTRL,Timer Control Register"
bitfld.long 0x00 30.--31. " CKSEL       ,1588 Timer reference clock source select" "TMR_1588_CLK,MAC system clock,,RTC oscillator"
newline
bitfld.long 0x00 29. " TE          ,1588 timer enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          BYP        ,Bypass drift compensated clock" "Normal,Bypassed"
bitfld.long 0x00 26. "        TMSR   ,Timer soft reset" "Normal,Reset"
newline
bitfld.long 0x00 25. " CIPH        ,External oscillator input clock phase" "Not inverted,Inverted"
bitfld.long 0x00 24. "      COPH       ,Generated clock (TMR_GCLK) output phase" "Not inverted,Inverted"
bitfld.long 0x00 23. "    ETEP1  ,External trigger 1 edge polarity" "Rising,Falling"
newline
bitfld.long 0x00 22. " ETEP2       ,External trigger 2 edge polarity" "Rising,Falling"
bitfld.long 0x00 18. "           SLV        ,Timer master/slave mode" "Master,Slave"
bitfld.long 0x00 17. "          FRD    ,FIPER realignment disable" "No,Yes"
newline
hexmask.long.word 0x00 6.--15. 1. " TCLK_PERIOD ,1588 timer reference clock period"
bitfld.long 0x00 5. "              PP2L       ,Fiper 2 pulse loopback mode enabled" "Disabled,Enabled"
bitfld.long 0x00 4. "        PP1L   ,Fiper 1 pulse loopback mode enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " FS          ,FIPER start indication" "Timer,Timer/Alarm"
bitfld.long 0x00 1. "       ALM2P      ,Alarm 2 output polarity" "Active high,Active low"
bitfld.long 0x00 0. "     ALM1P  ,Alarm 1 output polarity" "Active high,Active low"
line.long 0x04 "TMR_TEVENT,Timer Event Register"
eventfld.long 0x04 26. " PP3         ,Periodic pulse has been generated based on FIPER3 register" "Not generated,Generated"
eventfld.long 0x04 25. "     PP2        ,Indicates that a periodic pulse has been generated based on FIPER2 register" "Not generated,Generated"
eventfld.long 0x04 24. "   PP1    ,Indicates that a periodic pulse has been generated based on FIPER1 register" "Not generated,Generated"
newline
eventfld.long 0x04 15. " ALM1        ,Current time equaled alarm time register 1" "Not reached,Reached"
eventfld.long 0x04 14. "       ALM2       ,Current time equaled alarm time register 2" "Not reached,Reached"
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
newline
eventfld.long 0x04 11. " ETS1_THR    ,External trigger 1 timestamp FIFO threshold level hit" "No hit,Hit"
eventfld.long 0x04 10. "            ETS2_THR   ,External trigger 2 timestamp FIFO threshold level hit" "No hit,Hit"
endif
newline
eventfld.long 0x04 7. " ETS1        ,External trigger 1 timestamp sampled" "Not sampled,Sampled"
eventfld.long 0x04 6. "       ETS2       ,External trigger 2 timestamp sampled" "Not sampled,Sampled"
newline
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
eventfld.long 0x04 3. " ETS1_OV     ,External trigger 1 timestamp FIFO overflow" "Not overflowed,Overflowed"
eventfld.long 0x04 2. "    ETS2_OV    ,External trigger 2 timestamp FIFO overflow" "Not overflowed,Overflowed"
endif
line.long 0x08 "TMR_TEMASK,Timer Event Mask Register"
bitfld.long 0x08 26. " PP3EN       ,Periodic pulse event 3 enable" "Disabled,Enabled"
bitfld.long 0x08 25. "          PP2EN      ,Periodic pulse event 2 enable" "Disabled,Enabled"
bitfld.long 0x08 24. "        PP1EN  ,Periodic pulse event 1 enable" "Disabled,Enabled"
newline
bitfld.long 0x08 15. " ALM1EN      ,Timer ALM1 event enable" "Disabled,Enabled"
bitfld.long 0x08 14. "          ALM2EN     ,Timer ALM2 event enable" "Disabled,Enabled"
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
newline
bitfld.long 0x08 11. " ETS1_THREN  ,External trigger 1 timestamp FIFO threshold level hit sample event enable" "Disabled,Enabled"
bitfld.long 0x08 10. "          ETS2_THREN ,External trigger 2 timestamp FIFO threshold level hit sample event enable" "Disabled,Enabled"
endif
newline
bitfld.long 0x08 7. " ETS1EN      ,External trigger 1 timestamp sample event enable" "Disabled,Enabled"
bitfld.long 0x08 6. "          ETS2EN     ,External trigger 2 timestamp sample event enable" "Disabled,Enabled"
newline
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
bitfld.long 0x08 3. " ETS1_OVEN   ,External trigger 2 timestamp overflow event enable" "Disabled,Enabled"
bitfld.long 0x08 2. "          ETS2_OVEN  ,External trigger 2 timestamp overflow event enable" "Disabled,Enabled"
endif
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
rgroup.long 0x94++0x03
line.long 0x00 "TMR_STAT,Timer Status Register"
bitfld.long 0x00 7. " ETS1_VLD    ,External trigger 1 valid time-stamp read" "All read,Not all read"
bitfld.long 0x00 6. "      ETS2_VLD   ,External trigger 2 valid time-stamp read" "All read,Not all read"
bitfld.long 0x00 0. "    RCD    ,Timer reference clock detected" "Not detected,Detected"
else
group.long 0x94++0x03
line.long 0x00 "TMR_STAT,Timer Status Register"
bitfld.long 0x00 0. " RCD         ,Timer reference clock detected" "Not detected,Detected"
endif
if (((per.l.be(ad:0x08B95000+0x80))&0x40000)==0x0000)
group.long 0x98++0x07
line.long 0x00 "TMR_CNT_H,Timer Counter High Register"
line.long 0x04 "TMR_CNT_L,Timer Counter Low Register"
else
hgroup.long 0x98++0x03
hide.long 0x00 "TMR_CNT_H,Timer Counter High Register"
hgroup.long 0x9C++0x03
hide.long 0x00 "TMR_CNT_L,Timer Counter Low Register"
endif
group.long 0xA0++0x03
line.long 0x00 "TMR_ADD,Timer Drift Compensation Addend Register"
rgroup.long 0xA4++0x03
line.long 0x00 "TMR_ACC,Timer Accumulator Register"
group.long 0xA8++0x03
line.long 0x00 "TMR_PRSC,Timer Prescale Register"
hexmask.long.word 0x00 16.--31. 1. " PRSC_OCK    ,Output clock division/prescale factor"
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
group.long 0xAC++0x03
line.long 0x00 "TMR_ECTRL,Extended Timer Control Register"
bitfld.long 0x00 28.--31. " ETFF_THR    ,External trigger FIFO interrupt threshold" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
endif
if (((per.l.be(ad:0x08B95000+0x80))&0x40000)==0x0000)
group.long 0xB0++0x07
line.long 0x00 "TMROFF_H,Timer Offset High Register"
line.long 0x04 "TMROFF_L,Timer Offset Low Register"
else
hgroup.long 0xB0++0x03
hide.long 0x00 "TMROFF_H,Timer Offset High Register"
hgroup.long 0xB4++0x03
hide.long 0x00 "TMROFF_L,Timer Offset Low Register"
endif
group.long 0xB8++0x0F
line.long 0x00 "TMR_ALARM1_H,Alarm 1 Time Comparator High Register"
line.long 0x04 "TMR_ALARM1_L,Alarm 1 Time Comparator Low Register"
line.long 0x08 "TMR_ALARM2_H,Alarm 2 Time Comparator High Register"
line.long 0x0C "TMR_ALARM2_L,Alarm 2 Time Comparator Low Register"
group.long 0xD0++0x0B
line.long 0x00 "TMR_FIPER1,Timer Fixed Interval Period Register 1"
line.long 0x04 "TMR_FIPER2,Timer Fixed Interval Period Register 2"
line.long 0x08 "TMR_FIPER3,Timer Fixed Interval Period Register 3"
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
hgroup.quad 0xE0++0x07
hide.quad 0x00 "TMR_ETTS1,External Trigger Stamp 1 Register"
in
hgroup.quad 0xE8++0x07
hide.quad 0x00 "TMR_ETTS2,External Trigger Stamp 2 Register"
in
else
group.long 0xE0++0x0F
line.long 0x00 "TMR_ETTS1_H,External Trigger Stamp 1 High Register"
line.long 0x04 "TMR_ETTS1_L,External Trigger Stamp 1 Low Register"
line.long 0x08 "TMR_ETTS2_H,External Trigger Stamp 2 High Register"
line.long 0x0C "TMR_ETTS2_L,External Trigger Stamp 2 Low Register"
endif
endian.le
width 0x0B
tree.end
tree "PEBM (Packet Express Buffer Memory)"
base ad:0x08200000
width 21.
group.long 0x00++0x07
line.long 0x00 "CR,PEBM Control Register"
bitfld.long 0x00 8. " SRL                     ,Scrubber read length" "8 beats,1 beat"
bitfld.long 0x00 5. "   SBIT_DIS   ,Disable SBit detection and correction unit" "No,Yes"
bitfld.long 0x00 4. "          RDSCRB_DIS ,Disable read scrubber unit" "No,Yes"
bitfld.long 0x00 2.--3. "       AIDM      ,Address ID mode" "ADDRM,?..."
newline
bitfld.long 0x00 0.--1. " ADDR_MODE               ,Address mode" "Non-hash,Hashed,?..."
line.long 0x04 "SR,PEBM Status Register"
bitfld.long 0x04 1. " IDLE                    ,PEBM idle" "Not idle,Idle"
bitfld.long 0x04 0. "  SRAM_INIT  ,SRAM initialization in progress" "In progress,Initialized"
rgroup.long 0xBF8++0x07
line.long 0x00 "RID1,PEBM Revision ID Register 1"
hexmask.long.word 0x00 16.--31. 1. " ID                      ,PEBM identification"
hexmask.long.word 0x00 0.--15. 1. "      MAJ_REV    ,Major revision"
line.long 0x04 "PEBM_RID2,PEBM Revision ID Register 2"
group.long 0xE00++0x0B
line.long 0x00 "ECC_ERR_CR,PEBM ECC Error Control Register"
bitfld.long 0x00 2.--3. " SRAM_ECC_SEL            ,Selects the SRAM column for error injection" "0,1,2,3"
bitfld.long 0x00 0. "         ECC_INJ_EN ,ECC error inject enable" "Disabled,Enabled"
line.long 0x04 "ECC_ERR_INJ_H,PEBM ECC Error Inject Mask High Register"
bitfld.long 0x04 31. " ECC_ERR_INJ_MSK_HI[31]  ,ECC error injection mask high 31" "0,1"
bitfld.long 0x04 30. "         [30]       ,ECC error injection mask high 30" "0,1"
bitfld.long 0x04 29. "            [29]       ,ECC error injection mask high 29" "0,1"
newline
bitfld.long 0x04 28. " [28]                    ,ECC error injection mask high 28" "0,1"
bitfld.long 0x04 27. "         [27]       ,ECC error injection mask high 27" "0,1"
bitfld.long 0x04 26. "            [26]       ,ECC error injection mask high 26" "0,1"
newline
bitfld.long 0x04 25. " [25]                    ,ECC error injection mask high 25" "0,1"
bitfld.long 0x04 24. "         [24]       ,ECC error injection mask high 24" "0,1"
bitfld.long 0x04 23. "            [23]       ,ECC error injection mask high 23" "0,1"
newline
bitfld.long 0x04 22. " [22]                    ,ECC error injection mask high 22" "0,1"
bitfld.long 0x04 21. "         [21]       ,ECC error injection mask high 21" "0,1"
bitfld.long 0x04 20. "            [20]       ,ECC error injection mask high 20" "0,1"
newline
bitfld.long 0x04 19. " [19]                    ,ECC error injection mask high 19" "0,1"
bitfld.long 0x04 18. "         [18]       ,ECC error injection mask high 18" "0,1"
bitfld.long 0x04 17. "            [17]       ,ECC error injection mask high 17" "0,1"
newline
bitfld.long 0x04 16. " [16]                    ,ECC error injection mask high 16" "0,1"
bitfld.long 0x04 15. "         [15]       ,ECC error injection mask high 15" "0,1"
bitfld.long 0x04 14. "            [14]       ,ECC error injection mask high 14" "0,1"
newline
bitfld.long 0x04 13. " [13]                    ,ECC error injection mask high 13" "0,1"
bitfld.long 0x04 12. "         [12]       ,ECC error injection mask high 12" "0,1"
bitfld.long 0x04 11. "            [11]       ,ECC error injection mask high 11" "0,1"
newline
bitfld.long 0x04 10. " [10]                    ,ECC error injection mask high 10" "0,1"
bitfld.long 0x04 9. "         [9]        ,ECC error injection mask high 9" "0,1"
bitfld.long 0x04 8. "            [8]        ,ECC error injection mask high 8" "0,1"
newline
bitfld.long 0x04 7. " [7]                     ,ECC error injection mask high 7" "0,1"
bitfld.long 0x04 6. "         [6]        ,ECC error injection mask high 6" "0,1"
bitfld.long 0x04 5. "            [5]        ,ECC error injection mask high 5" "0,1"
newline
bitfld.long 0x04 4. " [4]                     ,ECC error injection mask high 4" "0,1"
bitfld.long 0x04 3. "         [3]        ,ECC error injection mask high 3" "0,1"
bitfld.long 0x04 2. "            [2]        ,ECC error injection mask high 2" "0,1"
newline
bitfld.long 0x04 1. " [1]                     ,ECC error injection mask high 1" "0,1"
bitfld.long 0x04 0. "         [0]        ,ECC error injection mask high 0" "0,1"
line.long 0x08 "ECC_ERR_INJ_L,PEBM ECC Error Inject Mask Low Register"
bitfld.long 0x08 31. " ECC_ERR_INJ_MSK_LOW[31] ,ECC error injection mask low 31" "0,1"
bitfld.long 0x08 30. "         [30]       ,ECC error injection mask low 30" "0,1"
bitfld.long 0x08 29. "            [29]       ,ECC error injection mask low 29" "0,1"
newline
bitfld.long 0x08 28. " [28]                    ,ECC error injection mask low 28" "0,1"
bitfld.long 0x08 27. "         [27]       ,ECC error injection mask low 27" "0,1"
bitfld.long 0x08 26. "            [26]       ,ECC error injection mask low 26" "0,1"
newline
bitfld.long 0x08 25. " [25]                    ,ECC error injection mask low 25" "0,1"
bitfld.long 0x08 24. "         [24]       ,ECC error injection mask low 24" "0,1"
bitfld.long 0x08 23. "            [23]       ,ECC error injection mask low 23" "0,1"
newline
bitfld.long 0x08 22. " [22]                    ,ECC error injection mask low 22" "0,1"
bitfld.long 0x08 21. "         [21]       ,ECC error injection mask low 21" "0,1"
bitfld.long 0x08 20. "            [20]       ,ECC error injection mask low 20" "0,1"
newline
bitfld.long 0x08 19. " [19]                    ,ECC error injection mask low 19" "0,1"
bitfld.long 0x08 18. "         [18]       ,ECC error injection mask low 18" "0,1"
bitfld.long 0x08 17. "            [17]       ,ECC error injection mask low 17" "0,1"
newline
bitfld.long 0x08 16. " [16]                    ,ECC error injection mask low 16" "0,1"
bitfld.long 0x08 15. "         [15]       ,ECC error injection mask low 15" "0,1"
bitfld.long 0x08 14. "            [14]       ,ECC error injection mask low 14" "0,1"
newline
bitfld.long 0x08 13. " [13]                    ,ECC error injection mask low 13" "0,1"
bitfld.long 0x08 12. "         [12]       ,ECC error injection mask low 12" "0,1"
bitfld.long 0x08 11. "            [11]       ,ECC error injection mask low 11" "0,1"
newline
bitfld.long 0x08 10. " [10]                    ,ECC error injection mask low 10" "0,1"
bitfld.long 0x08 9. "         [9]        ,ECC error injection mask low 9" "0,1"
bitfld.long 0x08 8. "            [8]        ,ECC error injection mask low 8" "0,1"
newline
bitfld.long 0x08 7. " [7]                     ,ECC error injection mask low 7" "0,1"
bitfld.long 0x08 6. "         [6]        ,ECC error injection mask low 6" "0,1"
bitfld.long 0x08 5. "            [5]        ,ECC error injection mask low 5" "0,1"
newline
bitfld.long 0x08 4. " [4]                     ,ECC error injection mask low 4" "0,1"
bitfld.long 0x08 3. "         [3]        ,ECC error injection mask low 3" "0,1"
bitfld.long 0x08 2. "            [2]        ,ECC error injection mask low 2" "0,1"
newline
bitfld.long 0x08 1. " [1]                     ,ECC error injection mask low 1" "0,1"
bitfld.long 0x08 0. "         [0]        ,ECC error injection mask low 0" "0,1"
group.long 0xE10++0x0B
line.long 0x00 "ERR_DET,PEBM Error Detect Register"
eventfld.long 0x00 5. " MBERR                   ,Multibit ECC error" "No error,Error"
eventfld.long 0x00 4. "  SBERR      ,Single bit ECC error" "No error,Error"
eventfld.long 0x00 1. "     RDERR      ,Read transaction error" "No error,Error"
eventfld.long 0x00 0. "  WRERR     ,Write transaction error" "No error,Error"
line.long 0x04 "ERR_INT_EN,PEBM Error Interrupt Enable Register"
bitfld.long 0x04 5. " MBERR_IE                ,Multibit ECC error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 1. "  RDERR_IE   ,Read transaction error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 0. "     WRERR_IE   ,Write transaction error interrupt enable" "Disabled,Enabled"
line.long 0x08 "ERR_DIS,PEBM Error Disable Register"
bitfld.long 0x08 5. " MBERR_DIS               ,Multibit ECC error disable" "No,Yes"
bitfld.long 0x08 4. "       SBERR_DIS  ,Single bit ECC error disable" "No,Yes"
bitfld.long 0x08 1. "          RDERR_DIS  ,Read transaction error disable" "No,Yes"
bitfld.long 0x08 0. "       WRERR_DIS ,Write transaction error disable" "No,Yes"
group.long 0xE20++0x03
line.long 0x00 "ERR_CAP_SR,PEBM Error Capture Status Register"
rbitfld.long 0x00 4.--7. " PORT                    ,Error port number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
eventfld.long 0x00 0. "        V          ,Error capture valid" "No error,Error"
rgroup.long 0xE24++0x0B
line.long 0x00 "ERR_CAP0,PEBM Error Capture Register 0"
line.long 0x04 "ERR_CAP1,PEBM Error Capture Register 1"
hexmask.long.word 0x04 0.--11. 0x01 " ERR_ADDR_H              ,Error address high"
line.long 0x08 "ERR_CAP2,PEBM Error Capture Register 2"
bitfld.long 0x08 21.--24. " AXI_LEN                 ,Error length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 18.--20. "        AXI_SIZE   ,Error size" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 16.--17. "            AXI_BURST  ,Error burst" "0,1,2,3"
hexmask.long.word 0x08 0.--15. 1. "         AXI_ID    ,Error id"
group.long 0xE40++0x03
line.long 0x00 "ECC_ERR_CAP_SR,PEBM ECC Error Capture Status Register"
rbitfld.long 0x00 4.--6. " PORT                    ,ECC error port number" "0,1,2,3,4,5,6,7"
eventfld.long 0x00 0. "         V          ,ECC error capture valid" "No error,Error"
rgroup.long 0xE44++0x03
line.long 0x00 "ECC_ERR_CAP0,PEBM ECC Error Capture Register 0"
width 0x0B
tree.end
;   tree "CTLU_QOS (CTLU QoS Mapping and Policer)"
;       base ad:0x00000000
;       %include ls20xx/dpaa2/ctlu_qos.ph ad:0x00000000
;   tree.end
tree.open "mEMAC (Multirate Ethernet Media Access Controller)"
base ad:0x08C03000
width 19.
endian.be
tree "mEMAC General Control and Status"
group.long 0x08++0x0B
line.long 0x00 "COMMAND_CONFIG,Command And Configuration Register"
bitfld.long 0x00 31. " TX_EN            ,MAC transmit path enable" "Disabled,Enabled"
bitfld.long 0x00 30. "       RX_EN            ,MAC receive path enable" "Disabled,Enabled"
bitfld.long 0x00 28. "          WAN         ,WAN mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 27. " PROMIS           ,Promiscuous operation enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       PAD              ,Frame padding removal in receive path enable" "Disabled,Enabled"
bitfld.long 0x00 25. "          CRC         ,Terminate/forward CRC of received frames" "Terminated,Forwarded"
newline
bitfld.long 0x00 24. " PAUSE_FWD        ,Terminate/forward received pause frames" "Terminated,Forwarded"
bitfld.long 0x00 23. "     PAUSE_IGN        ,Ignore pause frame quanta" "Not ignored,Ignored"
bitfld.long 0x00 22. "       TX_ADDR_INS ,Transmit source MAC address insertion" "Not overwritten,Overwritten"
newline
bitfld.long 0x00 21. " XGLP             ,XGMII/GMII loopback enable" "Disabled,Enabled"
bitfld.long 0x00 20. "       TXP              ,Padding of frames in transmit direction enable" "Disabled,Enabled"
eventfld.long 0x00 19. "          SWR         ,Software reset" "No effect,Reset"
newline
bitfld.long 0x00 18. " CNT_FRM_EN       ,Control frame reception enable" "Disabled,Enabled"
bitfld.long 0x00 15. "       SEND_IDLE        ,IDLE on transmission force" "Not forced,Forced"
bitfld.long 0x00 14. "        NO_LEN_CHK  ,Payload length check disable" "No,Yes"
newline
bitfld.long 0x00 12. " PFC_MODE         ,Priority flow control mode enable" "Disabled,Enabled"
bitfld.long 0x00 10. "       SFD              ,SFD character check at frame start disable" "No,Yes"
bitfld.long 0x00 8. "               TX_LOWP_ENA ,Transmit low power idle enable" "Disabled,Enabled"
newline
bitfld.long 0x00 7. " REG_LOWP_RXETY   ,RX low power indication delay" "No delay,Delay"
bitfld.long 0x00 2. "       RXSTP            ,Rx stop" "Normal mode,Discard mode"
bitfld.long 0x00 0. "      MG          ,Magic packet detection enable" "Disabled,Enabled"
line.long 0x04 "MAC_ADDR_0,First MAC Lower Address Register"
line.long 0x08 "MAC_ADDR_1,First MAC Upper Address Register"
hexmask.long.word 0x08 16.--31. 0x01 " MAC_ADDR_1       ,Upper 16-bits of the first 48-bit MAC address"
group.long 0x14++0x03
line.long 0x00 "MAXFRM,Maximum Frame Length Register"
hexmask.long.word 0x00 16.--31. 1. " MAXFRM           ,Maximum supported received frame length"
hexmask.long.word 0x00 0.--15. 1. "           TX_MTU           ,Maximum frame length on transmit"
group.long 0x1C++0x07
line.long 0x00 "RX_FIFO_SECTIONS,Receive FIFO Sections Register"
hexmask.long.word 0x00 16.--31. 1. " RX_SECTION_AVAIL ,RX section available threshold"
hexmask.long.word 0x00 0.--15. 1. "           RX_SECTION_EMPTY ,RX section empty threshold"
line.long 0x04 "TX_FIFO_SECTIONS,Transmit FIFO Sections Register"
hexmask.long.word 0x04 16.--31. 1. " TX_AVAIL         ,TX section available threshold"
hexmask.long.word 0x04 0.--15. 1. "           TX_EMPTY         ,TX section empty threshold"
wgroup.long 0x2C++0x03
line.long 0x00 "HASHTABLE_CTRL,Hash Table Control Register"
hexmask.long.byte 0x00 26.--31. 0x04 " HASH_ADDR        ,Hash table address code"
bitfld.long 0x00 23. "             MCAST            ,Multicast frame acceptance for specified hash entry" "Rejected,Accepted"
group.long 0x40++0x03
line.long 0x00 "IEVENT,Interrupt Event Register"
eventfld.long 0x00 31. " LOC_FAULT        ,Local fault event (XGMII)" "No fault,Fault"
eventfld.long 0x00 30. "       REM_FAULT        ,Remote fault event (XGMII)" "No fault,Fault"
newline
rbitfld.long 0x00 27. " RX_LOWP          ,Low power idle event interrupt" "No interrupt,Interrupt"
rbitfld.long 0x00 26. "   TX_EMPTY         ,Transmit FIFO empty event" "Not empty,Empty"
rbitfld.long 0x00 25. "         RX_EMPTY    ,Receive FIFO empty event" "Not empty,Empty"
newline
eventfld.long 0x00 24. " LI_FAULT         ,Link interruption fault event (XGMII)" "No fault,Fault"
eventfld.long 0x00 23. "       RX_ECC_E         ,Receive frame ECC error event" "No error,Error"
eventfld.long 0x00 22. "          TX_ECC_E    ,Transmit frame ECC error event" "No error,Error"
newline
eventfld.long 0x00 21. " TX_OVFL          ,Transmit FIFO overflow event" "No overflow,Overflow"
eventfld.long 0x00 20. "    TX_UNFL          ,Transmit FIFO underflow event" "No underflow,Underflow"
eventfld.long 0x00 19. "      RX_OVFL     ,Receive FIFO overflow event" "No overflow,Overflow"
newline
eventfld.long 0x00 18. " TS_ECC_ER        ,Timestamp FIFO ECC error event" "No error,Error"
eventfld.long 0x00 17. "       MGI              ,Magic packet detection indication event" "Not detected,Detected"
newline
eventfld.long 0x00 2. " LT               ,XGMII - link training event interrupt/GMII - new page received by auto-negotiation function interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 1. "   AN               ,XGMII - auto-negotiation event interrupt/GMII - auto-negotiation status interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 0. "      PCS         ,XGMII - PCS event interrupt/GMII - link synchronization event" "No interrupt,Interrupt"
group.long 0x44++0x03
line.long 0x00 "TX_IPG_LENGTH,Transmit Inter-Packet Gap Length Register"
hexmask.long.byte 0x00 25.--31. 1. " IPG_LEN          ,Transmit inter-package gap value"
group.long 0x4C++0x03
line.long 0x00 "IMASK,Interrupt Mask Register"
bitfld.long 0x00 18. " LT               ,XGMII - link training event interrupt mask/GMII - new page received by auto-negotiation function interrupt mask" "Masked,Enabled"
bitfld.long 0x00 17. "        AN               ,XGMII - auto-negotiation event interrupt mask/GMII - auto-negotiation status interrupt mask" "Masked,Enabled"
bitfld.long 0x00 16. "           PCS         ,XGMII - PCS event interrupt mask/GMII - link synchronization event interrupt mask" "Masked,Enabled"
newline
bitfld.long 0x00 1. " MGI              ,Magic packet detection indication normal interrupt mask" "Masked,Enabled"
group.long 0x54++0x03
line.long 0x00 "CL01_PAUSE_QUANTA,CL01 Pause Quanta Register"
hexmask.long.word 0x00 16.--31. 1. " CL0_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
hexmask.long.word 0x00 0.--15. 1. "           CL1_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
group.long 0x58++0x03
line.long 0x00 "CL23_PAUSE_QUANTA,CL23 Pause Quanta Register"
hexmask.long.word 0x00 16.--31. 1. " CL2_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
hexmask.long.word 0x00 0.--15. 1. "           CL3_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
group.long 0x5C++0x03
line.long 0x00 "CL45_PAUSE_QUANTA,CL45 Pause Quanta Register"
hexmask.long.word 0x00 16.--31. 1. " CL4_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
hexmask.long.word 0x00 0.--15. 1. "           CL5_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
group.long 0x60++0x03
line.long 0x00 "CL67_PAUSE_QUANTA,CL67 Pause Quanta Register"
hexmask.long.word 0x00 16.--31. 1. " CL6_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
hexmask.long.word 0x00 0.--15. 1. "           CL7_PQNT         ,Value to be sent for the PFC quanta value for that class when a class XOFF is triggered"
group.long 0x64++0x03
line.long 0x00 "CL01_PAUSE_THRESH,CL01 Pause Quanta Threshold Register"
hexmask.long.word 0x00 16.--31. 1. " CL0_QTH          ,CL01 pause quanta threshold"
hexmask.long.word 0x00 0.--15. 1. "           CL1_QTH          ,CL1 pause quanta threshold"
group.long 0x68++0x03
line.long 0x00 "CL23_PAUSE_THRESH,CL23 Pause Quanta Threshold Register"
hexmask.long.word 0x00 16.--31. 1. " CL2_QTH          ,CL23 pause quanta threshold"
hexmask.long.word 0x00 0.--15. 1. "           CL3_QTH          ,CL3 pause quanta threshold"
group.long 0x6C++0x03
line.long 0x00 "CL45_PAUSE_THRESH,CL45 Pause Quanta Threshold Register"
hexmask.long.word 0x00 16.--31. 1. " CL4_QTH          ,CL45 pause quanta threshold"
hexmask.long.word 0x00 0.--15. 1. "           CL5_QTH          ,CL5 pause quanta threshold"
group.long 0x70++0x03
line.long 0x00 "CL67_PAUSE_THRESH,CL67 Pause Quanta Threshold Register"
hexmask.long.word 0x00 16.--31. 1. " CL6_QTH          ,CL67 pause quanta threshold"
hexmask.long.word 0x00 0.--15. 1. "           CL7_QTH          ,CL7 pause quanta threshold"
rgroup.long 0x74++0x03
line.long 0x00 "RX_PAUSE_STATUS,Receive Pause Status Register"
bitfld.long 0x00 31. " PSTAT[7]         ,Pause status - class 7" "Not paused,Paused"
bitfld.long 0x00 30. "     [6]              ,Pause status - class 6" "Not paused,Paused"
bitfld.long 0x00 29. "        [5]         ,Pause status - class 5" "Not paused,Paused"
newline
bitfld.long 0x00 28. " [4]              ,Pause status - class 4" "Not paused,Paused"
bitfld.long 0x00 27. "     [3]              ,Pause status - class 3" "Not paused,Paused"
bitfld.long 0x00 26. "        [2]         ,Pause status - class 2" "Not paused,Paused"
newline
bitfld.long 0x00 25. " [1]              ,Pause status - class 1" "Not paused,Paused"
bitfld.long 0x00 24. "     [0]              ,Pause status - class 0" "Not paused,Paused"
group.long 0x80++0x47
line.long 0x00 "MAC_ADDR_2,2nd MAC Lower Address Register"
line.long 0x04 "MAC_ADDR_3,2nd MAC Upper Address Register"
hexmask.long.word 0x04 16.--31. 0x01 " MAC_ADDR_3       ,Upper 16-bits of the second 48-bit MAC address"
line.long 0x08 "MAC_ADDR_4,3rd MAC Lower Address Register"
line.long 0x0C "MAC_ADDR_5,3rd MAC Upper Address Register"
hexmask.long.word 0x0C 16.--31. 0x01 " MAC_ADDR_5       ,Upper 16-bits of the third 48-bit MAC address"
line.long 0x10 "MAC_ADDR_6,4th MAC Lower Address Register"
line.long 0x14 "MAC_ADDR_7,4th MAC Upper Address Register"
hexmask.long.word 0x14 16.--31. 0x01 " MAC_ADDR_7       ,Upper 16-bits of the fourth 48-bit MAC address"
line.long 0x18 "MAC_ADDR_8,5th MAC Lower Address Register"
line.long 0x1C "MAC_ADDR_9,5th MAC Upper Address Register"
hexmask.long.word 0x1C 16.--31. 0x01 " MAC_ADDR_9       ,Upper 16-bits of the fifth 48-bit MAC address"
line.long 0x20 "MAC_ADDR_10,6th MAC Lower Address Register"
line.long 0x24 "MAC_ADDR_11,6th MAC Upper Address Register"
hexmask.long.word 0x24 16.--31. 0x01 " MAC_ADDR_11      ,Upper 16-bits of the sixth 48-bit MAC address"
line.long 0x28 "MAC_ADDR_12,7th MAC Lower Address Register"
line.long 0x2C "MAC_ADDR_13,7th MAC Upper Address Register"
hexmask.long.word 0x2C 16.--31. 0x01 " MAC_ADDR_13      ,Upper 16-bits of the seventh 48-bit MAC address"
line.long 0x30 "MAC_ADDR_14,8th MAC Lower Address Register"
line.long 0x34 "MAC_ADDR_15,8th MAC Upper Address Register"
hexmask.long.word 0x34 16.--31. 0x01 " MAC_ADDR_15      ,Upper 16-bits of the eighth 48-bit MAC address"
line.long 0x38 "LPWAKE_TIMER,EEE Low Power Wakeup Timer Register"
hexmask.long.tbyte 0x38 8.--31. 1. " TW_SYS_TX        ,ENET_CLK cycles transmission delay after low power state end request"
line.long 0x3C "SLEEP_TIMER,Transmit EE Low Power Timer Register"
hexmask.long.tbyte 0x3C 8.--31. 1. " SLEEPT           ,ENET_CLK cycles where TX idle before MAC transmits low power EEE"
line.long 0x40 "SINGLE_STEP,IEEE-1588 Single-Step Control Register"
bitfld.long 0x40 24. " CH               ,Checksum update" "No update,Update"
hexmask.long.byte 0x40 16.--23. 0x01 "      OFFSET           ,Start offset from the beginning of a frame where the field to update is found"
bitfld.long 0x40 0. "                EN          ,IEEE-1588 single-step enable" "Disabled,Enabled"
line.long 0x44 "PEER_DELAY,IEEE-1588 Single-Step Peer Delay Register"
hexmask.long 0x44 2.--31. 1. " PEERDELAY        ,For peer-to-peer transparent clocks add this value to the correction field in addition to the transient time update"
group.long 0xE0++0x03
line.long 0x00 "STATN_CONFIG,Statistics Configuration Register"
bitfld.long 0x00 31. " SAT              ,Counter saturation" "No saturation,Saturation"
bitfld.long 0x00 30. "  COD              ,All counters read reset" "No effect,Reset after read"
eventfld.long 0x00 29. "  CLR         ,Counter clear" "No effect,Clear"
tree.end
tree "Statistics Counter Register"
width 10.
tree "Receive Counter Registers"
if (((per.l.be(ad:0x08C03000+0xE0))&0x40000000)==0x00)
rgroup.long 0x100++0xCF
line.long 0x00 "REOCT_L,Lower Receive Ethernet Octets Counter Register"
line.long 0x04 "REOCT_U,Upper Receive Ethernet Octets Counter Register"
line.long 0x08 "ROCT_L,Lower Receive Octets Counter Register"
line.long 0x0C "ROCT_U,Upper Receive Octets Counter Register"
line.long 0x10 "RALN_L,Lower Receive Alignment Error Counter Register"
line.long 0x14 "RALN_U,Upper Receive Alignment Error Counter Register"
line.long 0x18 "RXPF_L,Lower Receive Valid Pause Frame Counter Register"
line.long 0x1C "RXPF_U,Upper Receive Valid Pause Frame Counter Register"
line.long 0x20 "RFRM_L,Lower Receive Frame Counter Register"
line.long 0x24 "RFRM_U,Upper Receive Frame Counter Register"
line.long 0x28 "RFCS_L,Lower Receive Frame Check Sequence Error Counter Register"
line.long 0x2C "RFCS_U,Upper Receive Frame Check Sequence Error Counter Register"
line.long 0x30 "RVLAN_L,Lower Receive VLAN Frame Counter Register"
line.long 0x34 "RVLAN_U,Upper Receive VLAN Frame Counter Register"
line.long 0x38 "RERR_L,Lower Receive Frame Error Counter Register Register"
line.long 0x3C "RERR_U,Upper Receive Frame Error Counter Register"
line.long 0x40 "RUCA_L,Lower Receive Unicast Frame Counter Register"
line.long 0x44 "RUCA_U,Upper Receive Unicast Frame Counter Register"
line.long 0x48 "RMCA_L,Lower Receive Multicast Frame Counter Register"
line.long 0x4C "RMCA_U,Upper Receive Multicast Frame Counter Register"
line.long 0x50 "RBCA_L,Lower Receive Broadcast Frame Counter Register"
line.long 0x54 "RBCA_U,Upper Receive Broadcast Frame Counter Register"
line.long 0x58 "RDRP_L,Lower Receive Dropped Packets Counter Register"
line.long 0x5C "RDRP_U,Upper Receive Dropped Packets Counter Register"
line.long 0x60 "RPKT_L,Lower Receive Packets Counter Register"
line.long 0x64 "RPKT_U,Upper Receive Packets Counter Register"
line.long 0x68 "RUND_L,Lower Receive Undersized Packet Counter Register"
line.long 0x6C "RUND_U,Upper Receive Undersized Packet Counter Register"
line.long 0x70 "R64_L,Lower Receive 64-Octet Packet Counter Register"
line.long 0x74 "R64_U,Upper Receive 64-Octet Packet Counter Register"
line.long 0x78 "R127_L,Lower Receive 65- to 127-Octet Packet Counter Register"
line.long 0x7C "R127_U,Upper Receive 65- to 127-Octet Packet Counter Register"
line.long 0x80 "R255_L,Lower Receive 128- to 255-Octet Packet Counter Register"
line.long 0x84 "R255_U,Upper Receive 128- to 255-Octet Packet Counter Register"
line.long 0x88 "R511_L,Lower Receive 256- to 511-Octet Packet Counter Register"
line.long 0x8C "R511_U,Upper Receive 256- to 511-Octet Packet Counter Register"
line.long 0x90 "R1023_L,Lower Receive 512- to 1023-Octet Packet Counter Register"
line.long 0x94 "R1023_U,Upper Receive 512- to 1023-Octet Packet Counter Register"
line.long 0x98 "R1518_L,Lower Receive 1024- to 1518-Octet Packet Counter Register"
line.long 0x9C "R1518_U,Upper Receive 1024- to 1518-Octet Packet Counter Register"
line.long 0xA0 "R1519X_L,Lower Receive 1519- to Max-Octet Packet Counter Register"
line.long 0xA4 "R1519X_U,Upper Receive 1519- to Max-Octet Packet Counter Register"
line.long 0xA8 "ROVR_L,Lower Receive Oversized Packet Counter Register"
line.long 0xAC "ROVR_U,Upper Receive Oversized Packet Counter Register"
line.long 0xB0 "RJBR_L,Lower Receive Jabber Packet Counter Register"
line.long 0xB4 "RJBR_U,Upper Receive Jabber Packet Counter Register"
line.long 0xB8 "RFRG_L,Lower Receive Fragment Packet Counter Register"
line.long 0xBC "RFRG_U,Upper Receive Fragment Packet Counter Register"
line.long 0xC0 "RCNP_L,Lower Receive Control Packet Counter Register"
line.long 0xC4 "RCNP_U,Upper Receive Control Packet Counter Register"
line.long 0xC8 "RDRNTP_L,Lower Receive Dropped Not Truncated Packets Counter Register"
line.long 0xCC "RDRNTP_U,Upper Receive Dropped Not Truncated Packets Counter Register"
else
hgroup.long 0x100++0x03
hide.long 0x00 "REOCT_L,Lower Receive Ethernet Octets Counter Register"
in
hgroup.long 0x104++0x03
hide.long 0x00 "REOCT_U,Upper Receive Ethernet Octets Counter Register"
in
hgroup.long 0x108++0x03
hide.long 0x00 "ROCT_L,Lower Receive Octets Counter Register"
in
hgroup.long 0x10C++0x03
hide.long 0x00 "ROCT_U,Upper Receive Octets Counter Register"
in
hgroup.long 0x110++0x03
hide.long 0x00 "RALN_L,Lower Receive Alignment Error Counter Register"
in
hgroup.long 0x114++0x03
hide.long 0x00 "RALN_U,Upper Receive Alignment Error Counter Register"
in
hgroup.long 0x118++0x03
hide.long 0x00 "RXPF_L,Lower Receive Valid Pause Frame Counter Register"
in
hgroup.long 0x11C++0x03
hide.long 0x00 "RXPF_U,Upper Receive Valid Pause Frame Counter Register"
in
hgroup.long 0x120++0x03
hide.long 0x00 "RFRM_L,Lower Receive Frame Counter Register"
in
hgroup.long 0x124++0x03
hide.long 0x00 "RFRM_U,Upper Receive Frame Counter Register"
in
hgroup.long 0x128++0x03
hide.long 0x00 "RFCS_L,Lower Receive Frame Check Sequence Error Counter Register"
in
hgroup.long 0x12C++0x03
hide.long 0x00 "RFCS_U,Upper Receive Frame Check Sequence Error Counter Register"
in
hgroup.long 0x130++0x03
hide.long 0x00 "RVLAN_L,Lower Receive VLAN Frame Counter Register"
in
hgroup.long 0x134++0x03
hide.long 0x00 "RVLAN_U,Upper Receive VLAN Frame Counter Register"
in
hgroup.long 0x138++0x03
hide.long 0x00 "RERR_L,Lower Receive Frame Error Counter Register"
in
hgroup.long 0x13C++0x03
hide.long 0x00 "RERR_U,Upper Receive Frame Error Counter Register"
in
hgroup.long 0x140++0x03
hide.long 0x00 "RUCA_L,Lower Receive Unicast Frame Counter Register"
in
hgroup.long 0x144++0x03
hide.long 0x00 "RUCA_U,Upper Receive Unicast Frame Counter Register"
in
hgroup.long 0x148++0x03
hide.long 0x00 "RMCA_L,Lower Receive Multicast Frame Counter Register"
in
hgroup.long 0x14C++0x03
hide.long 0x00 "RMCA_U,Upper Receive Multicast Frame Counter Register"
in
hgroup.long 0x150++0x03
hide.long 0x00 "RBCA_L,Lower Receive Broadcast Frame Counter Register"
in
hgroup.long 0x154++0x03
hide.long 0x00 "RBCA_U,Upper Receive Broadcast Frame Counter Register"
in
hgroup.long 0x158++0x03
hide.long 0x00 "RDRP_L,Lower Receive Dropped Packets Counter Register"
in
hgroup.long 0x15C++0x03
hide.long 0x00 "RDRP_U,Upper Receive Dropped Packets Counter Register"
in
hgroup.long 0x160++0x03
hide.long 0x00 "RPKT_L,Lower Receive Packets Counter Register"
in
hgroup.long 0x164++0x03
hide.long 0x00 "RPKT_U,Upper Receive Packets Counter Register"
in
hgroup.long 0x168++0x03
hide.long 0x00 "RUND_L,Lower Receive Undersized Packet Counter Register"
in
hgroup.long 0x16C++0x03
hide.long 0x00 "RUND_U,Upper Receive Undersized Packet Counter Register"
in
hgroup.long 0x170++0x03
hide.long 0x00 "R64_L,Lower Receive 64-Octet Packet Counter Register"
in
hgroup.long 0x174++0x03
hide.long 0x00 "R64_U,Upper Receive 64-Octet Packet Counter Register"
in
hgroup.long 0x178++0x03
hide.long 0x00 "R127_L,Lower Receive 65- to 127-Octet Packet Counter Register"
in
hgroup.long 0x17C++0x03
hide.long 0x00 "R127_U,Upper Receive 65- to 127-Octet Packet Counter Register"
in
hgroup.long 0x180++0x03
hide.long 0x00 "R255_L,Lower Receive 128- to 255-Octet Packet Counter Register"
in
hgroup.long 0x184++0x03
hide.long 0x00 "R255_U,Upper Receive 128- to 255-Octet Packet Counter Register"
in
hgroup.long 0x188++0x03
hide.long 0x00 "R511_L,Lower Receive 256- to 511-Octet Packet Counter Register"
in
hgroup.long 0x18C++0x03
hide.long 0x00 "R511_U,Upper Receive 256- to 511-Octet Packet Counter Register"
in
hgroup.long 0x190++0x03
hide.long 0x00 "R1023_L,Lower Receive 512- to 1023-Octet Packet Counter Register"
in
hgroup.long 0x194++0x03
hide.long 0x00 "R1023_U,Upper Receive 512- to 1023-Octet Packet Counter Register"
in
hgroup.long 0x198++0x03
hide.long 0x00 "R1518_L,Lower Receive 1024- to 1518-Octet Packet Counter Register"
in
hgroup.long 0x19C++0x03
hide.long 0x00 "R1518_U,Upper Receive 1024- to 1518-Octet Packet Counter Register"
in
hgroup.long 0x1A0++0x03
hide.long 0x00 "R1519X_L,Lower Receive 1519- to Max-Octet Packet Counter Register"
in
hgroup.long 0x1A4++0x03
hide.long 0x00 "R1519X_U,Upper Receive 1519- to Max-Octet Packet Counter Register"
in
hgroup.long 0x1A8++0x03
hide.long 0x00 "ROVR_L,Lower Receive Oversized Packet Counter Register"
in
hgroup.long 0x1AC++0x03
hide.long 0x00 "ROVR_U,Upper Receive Oversized Packet Counter Register"
in
hgroup.long 0x1B0++0x03
hide.long 0x00 "RJBR_L,Lower Receive Jabber Packet Counter Register"
in
hgroup.long 0x1B4++0x03
hide.long 0x00 "RJBR_U,Upper Receive Jabber Packet Counter Register"
in
hgroup.long 0x1B8++0x03
hide.long 0x00 "RFRG_L,Lower Receive Fragment Packet Counter Register"
in
hgroup.long 0x1BC++0x03
hide.long 0x00 "RFRG_U,Upper Receive Fragment Packet Counter Register"
in
hgroup.long 0x1C0++0x03
hide.long 0x00 "RCNP_L,Lower Receive Control Packet Counter Register"
in
hgroup.long 0x1C4++0x03
hide.long 0x00 "RCNP_U,Upper Receive Control Packet Counter Register"
in
hgroup.long 0x1C8++0x03
hide.long 0x00 "RDRNTP_L,Lower Receive Dropped Not Truncated Packets Counter Register"
in
hgroup.long 0x1CC++0x03
hide.long 0x00 "RDRNTP_U,Upper Receive Dropped Not Truncated Packets Counter Register"
in
endif
tree.end
width 10.
tree "Transmit Counter Registers"
if (((per.l.be(ad:0x08C03000+0xE0))&0x40000000)==0x00)
rgroup.long 0x200++0x57
line.long 0x00 "TEOCT_L,Lower Transmit Ethernet Octets CounterRegister"
line.long 0x04 "TEOCT_U,Upper Transmit Ethernet Octets Counter Register"
line.long 0x08 "TOCT_L,Lower Transmit Octets Counter Register"
line.long 0x0C "TOCT_U,Upper Transmit Octets Counter Register"
line.long 0x10 "TCRSE_L,Lower Transmit Carrier Sense Error Counter Register"
line.long 0x14 "TCRSE_U,Upper Transmit Carrier Sense Error Counter Register"
line.long 0x18 "TXPF_L,Lower Transmit Valid Pause Frame Counter Register"
line.long 0x1C "TXPF_U,Upper Transmit Valid Pause Frame Counter Register"
line.long 0x20 "TFRM_L,Lower Transmit Frame Counter Register"
line.long 0x24 "TFRM_U,Upper Transmit Frame Counter Register"
line.long 0x28 "TFCS_L,Lower Transmit Frame Check Sequence Error Counter Register"
line.long 0x2C "TFCS_U,Upper Transmit Frame Check Sequence Error Counter Register"
line.long 0x30 "TVLAN_L,Lower Transmit VLAN Frame Counter Register"
line.long 0x34 "TVLAN_U,Upper Transmit VLAN Frame Counter Register"
line.long 0x38 "TERR_L,Lower Transmit Frame Error Counter Register"
line.long 0x3C "TERR_U,Upper Transmit Frame Error Counter Register"
line.long 0x40 "TUCA_L,Lower Transmit Unicast Frame Counter Register"
line.long 0x44 "TUCA_U,Upper Transmit Unicast Frame Counter Register"
line.long 0x48 "TMCA_L,Lower Transmit Multicast Frame Counter Register"
line.long 0x4C "TMCA_U,Upper Transmit Multicast Frame Counter Register"
line.long 0x50 "TBCA_L,Lower Transmit Broadcast Frame Counter Register"
line.long 0x54 "TBCA_U,Upper Transmit Broadcast Frame Counter Register"
rgroup.long 0x260++0x47
line.long 0x00 "TPKT_L,Lower Transmit Packets Counter Register"
line.long 0x04 "TPKT_U,Upper Transmit Packets Counter Register"
line.long 0x08 "TUND_L,Lower Transmit Undersized Packet Counter Register"
line.long 0x0C "TUND_U,Upper Transmit Undersized Packet Counter Register"
line.long 0x10 "T64_L,Lower Transmit 64-Octet Packet Counter Register"
line.long 0x14 "T64_U,Upper Transmit 64-Octet Packet Counter Register"
line.long 0x18 "T127_L,Lower Transmit 65- to 127-Octet Packet Counter Register"
line.long 0x1C "T127_U,Upper Transmit 65- to 127-Octet Packet Counter Register"
line.long 0x20 "T255_L,Lower Transmit 128- to 255-Octet Packet Counter Register"
line.long 0x24 "T255_U,Upper Transmit 128- to 255-Octet Packet Counter Register"
line.long 0x28 "T511_L,Lower Transmit 256- to 511-Octet Packet Counter Register"
line.long 0x2C "T511_U,Upper Transmit 256- to 511-Octet Packet Counter Register"
line.long 0x30 "T1023_L,Lower Transmit 512- to 1023-Octet Packet Counter Register"
line.long 0x34 "T1023_U,Upper Transmit 512- to 1023-Octet Packet Counter Register"
line.long 0x38 "T1518_L,Lower Transmit 1024- to 1518-Octet Packet Counter Register"
line.long 0x3C "T1518_U,Upper Transmit 1024- to 1518-Octet Packet Counter Register"
line.long 0x40 "T1519X_L,Lower Transmit 1519- to Max-Octet Packet Counter Register"
line.long 0x44 "T1519X_U,Upper Transmit 1519- to Max-Octet Packet Counter Register"
rgroup.long 0x2C0++0x07
line.long 0x00 "TCNP_L,Lower Transmit Control Packet Counter Register"
line.long 0x04 "TCNP_U,Upper Transmit Control Packet Counter Register"
rgroup.long 0x2D0++0x27
line.long 0x00 "TDFR_L,Lower Transmit Deferred Packet Counter Register"
line.long 0x04 "TDFR_U,Upper Transmit Deferred Packet Counter Register"
line.long 0x08 "TMCOL_L,Lower Transmit Multiple Collisions Counter Register"
line.long 0x0C "TMCOL_U,Upper Transmit Multiple Collisions Counter Register"
line.long 0x10 "TSCOL_L,Lower Transmit Single Collision Counter Register"
line.long 0x14 "TSCOL_U,Upper Transmit Single Collision Counter Register"
line.long 0x18 "TLCOL_L,Lower Transmit Late Collision Counter Register"
line.long 0x1C "TLCOL_U,Upper Transmit Late Collision Counter Register"
line.long 0x20 "TECOL_L,Lower Transmit Excessive Collisions Counter Register"
line.long 0x24 "TECOL_U,Upper Transmit Excessive Collisions Counter Register"
else
hgroup.long 0x200++0x03
hide.long 0x00 "TEOCT_L,Lower Transmit Ethernet Octets Counter Register"
in
hgroup.long 0x204++0x03
hide.long 0x00 "TEOCT_U,Upper Transmit Ethernet Octets Counter Register"
in
hgroup.long 0x208++0x03
hide.long 0x00 "TOCT_L,Lower Transmit Octets Counter Register"
in
hgroup.long 0x20C++0x03
hide.long 0x00 "TOCT_U,Upper Transmit Octets Counter Register"
in
hgroup.long 0x210++0x03
hide.long 0x00 "TCRSE_L,Lower Transmit Carrier Sense Error Counter Register"
in
hgroup.long 0x214++0x03
hide.long 0x00 "TCRSE_U,Upper Transmit Carrier Sense Error Counter Register"
in
hgroup.long 0x218++0x03
hide.long 0x00 "TXPF_L,Lower Transmit Valid Pause Frame Counter Register"
in
hgroup.long 0x21C++0x03
hide.long 0x00 "TXPF_U,Upper Transmit Valid Pause Frame Counter Register"
in
hgroup.long 0x220++0x03
hide.long 0x00 "TFRM_L,Lower Transmit Frame Counter Register"
in
hgroup.long 0x224++0x03
hide.long 0x00 "TFRM_U,Upper Transmit Frame Counter Register"
in
hgroup.long 0x228++0x03
hide.long 0x00 "TFCS_L,Lower Transmit Frame Check Sequence Error Counter Register"
in
hgroup.long 0x22C++0x03
hide.long 0x00 "TFCS_U,Upper Transmit Frame Check Sequence Error Counter Register"
in
hgroup.long 0x230++0x03
hide.long 0x00 "TVLAN_L,Lower Transmit VLAN Frame Counter Register"
in
hgroup.long 0x234++0x03
hide.long 0x00 "TVLAN_U,Upper Transmit VLAN Frame Counter Register"
in
hgroup.long 0x238++0x03
hide.long 0x00 "TERR_L,Lower Transmit Frame Error Counter Register"
in
hgroup.long 0x23C++0x03
hide.long 0x00 "TERR_U,Upper Transmit Frame Error Counter Register"
in
hgroup.long 0x240++0x03
hide.long 0x00 "TUCA_L,Lower Transmit Unicast Frame Counter Register"
in
hgroup.long 0x244++0x03
hide.long 0x00 "TUCA_U,Upper Transmit Unicast Frame Counter Register"
in
hgroup.long 0x248++0x03
hide.long 0x00 "TMCA_L,Lower Transmit Multicast Frame Counter Register"
in
hgroup.long 0x24C++0x03
hide.long 0x00 "TMCA_U,Upper Transmit Multicast Frame Counter Register"
in
hgroup.long 0x250++0x03
hide.long 0x00 "TBCA_L,Lower Transmit Broadcast Frame Counter Register"
in
hgroup.long 0x254++0x03
hide.long 0x00 "TBCA_U,Upper Transmit Broadcast Frame Counter Register"
in
hgroup.long 0x260++0x03
hide.long 0x00 "TPKT_L,Lower Transmit Packets Counter Register"
in
hgroup.long 0x264++0x03
hide.long 0x00 "TPKT_U,Upper Transmit Packets Counter Register"
in
hgroup.long 0x268++0x03
hide.long 0x00 "TUND_L,Lower Transmit Undersized Packet Counter Register"
in
hgroup.long 0x26C++0x03
hide.long 0x00 "TUND_U,Upper Transmit Undersized Packet Counter Register"
in
hgroup.long 0x270++0x03
hide.long 0x00 "T64_L,Lower Transmit 64-Octet Packet Counter Register"
in
hgroup.long 0x274++0x03
hide.long 0x00 "T64_U,Upper Transmit 64-Octet Packet Counter Register"
in
hgroup.long 0x278++0x03
hide.long 0x00 "T127_L,Lower Transmit 65- to 127-Octet Packet Counter Register"
in
hgroup.long 0x27C++0x03
hide.long 0x00 "T127_U,Upper Transmit 65- to 127-Octet Packet Counter Register"
in
hgroup.long 0x280++0x03
hide.long 0x00 "T255_L,Lower Transmit 128- to 255-Octet Packet Counter Register"
in
hgroup.long 0x284++0x03
hide.long 0x00 "T255_U,Upper Transmit 128- to 255-Octet Packet Counter Register"
in
hgroup.long 0x288++0x03
hide.long 0x00 "T511_L,Lower Transmit 256- to 511-Octet Packet Counter Register"
in
hgroup.long 0x28C++0x03
hide.long 0x00 "T511_U,Upper Transmit 256- to 511-Octet Packet Counter Register"
in
hgroup.long 0x290++0x03
hide.long 0x00 "T1023_L,Lower Transmit 512- to 1023-Octet Packet Counter Register"
in
hgroup.long 0x294++0x03
hide.long 0x00 "T1023_U,Upper Transmit 512- to 1023-Octet Packet Counter Register"
in
hgroup.long 0x298++0x03
hide.long 0x00 "T1518_L,Lower Transmit 1024- to 1518-Octet Packet Counter Register"
in
hgroup.long 0x29C++0x03
hide.long 0x00 "T1518_U,Upper Transmit 1024- to 1518-Octet Packet Counter Register"
in
hgroup.long 0x2A0++0x03
hide.long 0x00 "T1519X_L,Lower Transmit 1519- to Max-Octet Packet Counter Register"
in
hgroup.long 0x2A4++0x03
hide.long 0x00 "T1519X_U,Upper Transmit 1519- to Max-Octet Packet Counter Register"
in
hgroup.long 0x2C0++0x03
hide.long 0x00 "TCNP_L,Lower Transmit Control Packet Counter Register"
in
hgroup.long 0x2C4++0x03
hide.long 0x00 "TCNP_U,Upper Transmit Control Packet Counter Register"
in
hgroup.long 0x2D0++0x03
hide.long 0x00 "TDFR_L,Lower Transmit Deferred Packet Counter Register"
in
hgroup.long 0x2D4++0x03
hide.long 0x00 "TDFR_U,Upper Transmit Deferred Packet Counter Register"
in
hgroup.long 0x2D8++0x03
hide.long 0x00 "TMCOL_L,Lower Transmit Multiple Collisions Counter Register"
in
hgroup.long 0x2DC++0x03
hide.long 0x00 "TMCOL_U,Upper Transmit Multiple Collisions Counter Register"
in
hgroup.long 0x2E0++0x03
hide.long 0x00 "TSCOL_L,Lower Transmit Single Collision Counter Register"
in
hgroup.long 0x2E4++0x03
hide.long 0x00 "TSCOL_U,Upper Transmit Single Collision Counter Register"
in
hgroup.long 0x2E8++0x03
hide.long 0x00 "TLCOL_L,Lower Transmit Late Collision Counter Register"
in
hgroup.long 0x2EC++0x03
hide.long 0x00 "TLCOL_U,Upper Transmit Late Collision Counter Register"
in
hgroup.long 0x2F0++0x03
hide.long 0x00 "TECOL_L,Lower Transmit Excessive Collisions Counter Register"
in
hgroup.long 0x2F4++0x03
hide.long 0x00 "TECOL_U,Upper Transmit Excessive Collisions Counter Register"
in
endif
tree.end
tree.end
width 11.
tree "Line Interface Control Registers"
if (((per.l.be(ad:0x08C03000+0x300))&0x10000)==0x00)
group.long 0x300++0x03
line.long 0x00 "IF_MODE,Interface Mode Register"
bitfld.long 0x00 30.--31. " IFMODE ,Interface mode" "XGMII,MII,GMII (RGMII),?..."
bitfld.long 0x00 29. "     RG   ,RGMII mode enable" "Disabled,Enabled"
bitfld.long 0x00 26. "    RLP   ,RGMII internal loopback enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 25. " HD     ,Full-/Half-duplex selection" "Full-duplex,Half-duplex"
bitfld.long 0x00 19. "      SFD  ,Full-duplex RGMII mode" "Not forced,Forced"
bitfld.long 0x00 17.--18. "  SSP   ,Bit rate" "100 Mbps RGMII,10 Mbps RGMII,1 Gbps RGMII,?..."
newline
bitfld.long 0x00 16. " ENA    ,Automatic speed selection" "Disabled,Enabled"
else
group.long 0x300++0x03
line.long 0x00 "IF_MODE,Interface Mode Register"
bitfld.long 0x00 30.--31. " IFMODE ,Interface mode" "XGMII,MII,GMII (RGMII),?..."
bitfld.long 0x00 29. "     RG   ,RGMII mode enable" "Disabled,Enabled"
bitfld.long 0x00 26. "    RLP   ,RGMII internal loopback enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 25. " HD     ,Full-/Half-duplex selection" "Full-duplex,Half-duplex"
newline
bitfld.long 0x00 16. " ENA    ,Automatic speed selection" "Disabled,Enabled"
endif
rgroup.long 0x304++0x03
line.long 0x00 "IF_STATUS,Interface Status Register"
bitfld.long 0x00 19. " RGFD   ,RGMII full duplex link established" "Not established,Established"
bitfld.long 0x00 17.--18. "  RGSP ,Bit rate" "10 Mbps,100 Mbps,1 Gbps,?..."
bitfld.long 0x00 16. "    RGLNK ,Valid link established" "Not established,Established"
tree.end
tree "PFC Statistics Counter Registers"
width 9.
tree "Receive PFC Counter Registers"
rgroup.long 0x380++0x07
line.long 0x00 "RPFC0_L,Lower Receive PFC Class 0 Counter"
line.long 0x04 "RPFC0_U,Upper Receive PFC Class 0 Counter"
rgroup.long 0x388++0x07
line.long 0x00 "RPFC1_L,Lower Receive PFC Class 1 Counter"
line.long 0x04 "RPFC1_U,Upper Receive PFC Class 1 Counter"
rgroup.long 0x390++0x07
line.long 0x00 "RPFC2_L,Lower Receive PFC Class 2 Counter"
line.long 0x04 "RPFC2_U,Upper Receive PFC Class 2 Counter"
rgroup.long 0x398++0x07
line.long 0x00 "RPFC3_L,Lower Receive PFC Class 3 Counter"
line.long 0x04 "RPFC3_U,Upper Receive PFC Class 3 Counter"
rgroup.long 0x3A0++0x07
line.long 0x00 "RPFC4_L,Lower Receive PFC Class 4 Counter"
line.long 0x04 "RPFC4_U,Upper Receive PFC Class 4 Counter"
rgroup.long 0x3A8++0x07
line.long 0x00 "RPFC5_L,Lower Receive PFC Class 5 Counter"
line.long 0x04 "RPFC5_U,Upper Receive PFC Class 5 Counter"
rgroup.long 0x3B0++0x07
line.long 0x00 "RPFC6_L,Lower Receive PFC Class 6 Counter"
line.long 0x04 "RPFC6_U,Upper Receive PFC Class 6 Counter"
rgroup.long 0x3B8++0x07
line.long 0x00 "RPFC7_L,Lower Receive PFC Class 7 Counter"
line.long 0x04 "RPFC7_U,Upper Receive PFC Class 7 Counter"
tree.end
width 9.
tree "Transmit PFC Counter Registers"
rgroup.long 0x3C0++0x07
line.long 0x00 "TPFC0_L,Lower Transmit PFC Class 0 Counter"
line.long 0x04 "TPFC0_U,Upper Transmit PFC Class 0 Counter"
rgroup.long 0x3C8++0x07
line.long 0x00 "TPFC1_L,Lower Transmit PFC Class 1 Counter"
line.long 0x04 "TPFC1_U,Upper Transmit PFC Class 1 Counter"
rgroup.long 0x3D0++0x07
line.long 0x00 "TPFC2_L,Lower Transmit PFC Class 2 Counter"
line.long 0x04 "TPFC2_U,Upper Transmit PFC Class 2 Counter"
rgroup.long 0x3D8++0x07
line.long 0x00 "TPFC3_L,Lower Transmit PFC Class 3 Counter"
line.long 0x04 "TPFC3_U,Upper Transmit PFC Class 3 Counter"
rgroup.long 0x3E0++0x07
line.long 0x00 "TPFC4_L,Lower Transmit PFC Class 4 Counter"
line.long 0x04 "TPFC4_U,Upper Transmit PFC Class 4 Counter"
rgroup.long 0x3E8++0x07
line.long 0x00 "TPFC5_L,Lower Transmit PFC Class 5 Counter"
line.long 0x04 "TPFC5_U,Upper Transmit PFC Class 5 Counter"
rgroup.long 0x3F0++0x07
line.long 0x00 "TPFC6_L,Lower Transmit PFC Class 6 Counter"
line.long 0x04 "TPFC6_U,Upper Transmit PFC Class 6 Counter"
rgroup.long 0x3F8++0x07
line.long 0x00 "TPFC7_L,Lower Transmit PFC Class 7 Counter"
line.long 0x04 "TPFC7_U,Upper Transmit PFC Class 7 Counter"
tree.end
tree.end
width 11.
tree "MDIO Ethernet Management Interface Registers"
group.long 0x30++0x03
line.long 0x00 "MDIO_CFG,MDIO Configuration Register"
rbitfld.long 0x00 31. " BSY2      ,MDIO busy" "Not busy,Busy"
rbitfld.long 0x00 30. "       MDIO_RD_ER ,MDIO read error" "No error,Error"
bitfld.long 0x00 27.--29. "       MDIO_HOLD    ,MDIO hold time (Enet cycles)" "1,3,5,7,9,11,13,15"
newline
bitfld.long 0x00 26. " PRE_DIS   ,MDIO preamble disable" "No,Yes"
bitfld.long 0x00 25. "            ENC45      ,Clause 45 support enable" "Clause 22,Clause 45"
hexmask.long.word 0x00 16.--24. 1. "      MDIO_CLK_DIV ,MDIO clock divisor"
newline
rbitfld.long 0x00 9. " EHOLD     ,EHOLD" "0,1"
rbitfld.long 0x00 8. "              NEG        ,NEG" "0,1"
bitfld.long 0x00 2. "              CIM          ,MDIO command completion interrupt mask" "Masked,Not masked"
newline
eventfld.long 0x00 1. " CMP       ,MDIO command completion event" "Not completed,Completed"
rbitfld.long 0x00 0. "  BSY1       ,MDIO busy" "Not busy,Busy"
if (((per.l.be(ad:0x08C03000+0x30))&0x2000000)==0x2000000)
group.long 0x34++0x03
line.long 0x00 "MDIO_CTL,MDIO Control Register"
bitfld.long 0x00 27.--31. " DEV_ADDR  ,MDIO device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PORT_ADDR  ,MDIO port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC  ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
else
group.long 0x34++0x03
line.long 0x00 "MDIO_CTL,MDIO Control Register"
bitfld.long 0x00 27.--31. " REG_ADDR  ,MDIO register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PHY_ADDR   ,MDIO PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC  ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
endif
group.long 0x38++0x03
line.long 0x00 "MDIO_DATA,MDIO Data Register"
hexmask.long.word 0x00 16.--31. 1. " MDIO_DATA ,MDIO data"
wgroup.long 0x3C++0x03
line.long 0x00 "MDIO_ADDR,MDIO PHY Register Address Register"
tree.end
base ad:0x08B80000
width 12.
tree "EMDIO1"
if (((per.l.be(ad:0x08B80000+0x16000+0x030))&0x200)==0x00)
group.long (0x30+0x16000)++0x03
line.long 0x00 "EMDIO_CFG,External MDIO Configuration Register"
rbitfld.long 0x00 31. " BSY2         ,MDIO busy" "Not busy,Busy"
rbitfld.long 0x00 30. "       MDIO_RD_ER ,MDIO read error" "No error,Error"
newline
bitfld.long 0x00 27.--29. " MDIO_HOLD    ,MDIO hold time (Enet cycles)" "1,3,5,7,9,11,13,15"
bitfld.long 0x00 26. "             PRE_DIS    ,MDIO preamble disable" "No,Yes"
bitfld.long 0x00 25. "            ENC45 ,Clause 45 support enable" "Clause 22,Clause 45"
newline
hexmask.long.word 0x00 16.--24. 1. " MDIO_CLK_DIV ,MDIO clock divisor"
bitfld.long 0x00 9. "           EHOLD      ,Extended MDIO hold time" "Not extended,Extended"
bitfld.long 0x00 8. "   NEG   ,MDC negative edge driving enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " CIM          ,MDIO command completion interrupt mask" "Masked,Not masked"
eventfld.long 0x00 1. "     CMP        ,MDIO command completion event" "Not completed,Completed"
rbitfld.long 0x00 0. "  BSY1  ,MDIO busy" "Not busy,Busy"
else
group.long (0x30+0x16000)++0x03
line.long 0x00 "EMDIO_CFG,External MDIO Configuration Register"
rbitfld.long 0x00 31. " BSY2         ,MDIO busy" "Not busy,Busy"
rbitfld.long 0x00 30. "       MDIO_RD_ER ,MDIO read error" "No error,Error"
newline
bitfld.long 0x00 27.--29. " MDIO_HOLD    ,MDIO hold time (Enet cycles)" "1,9,17,25,33,41,49,57"
bitfld.long 0x00 26. "             PRE_DIS    ,MDIO preamble disable" "No,Yes"
bitfld.long 0x00 25. "            ENC45 ,Clause 45 support enable" "Clause 22,Clause 45"
newline
hexmask.long.word 0x00 16.--24. 1. " MDIO_CLK_DIV ,MDIO clock divisor"
bitfld.long 0x00 9. "           EHOLD      ,Extended MDIO hold time" "Not extended,Extended"
bitfld.long 0x00 8. "   NEG   ,MDC negative edge driving enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " CIM          ,MDIO command completion interrupt mask" "Masked,Not masked"
eventfld.long 0x00 1. "     CMP        ,MDIO command completion event" "Not completed,Completed"
rbitfld.long 0x00 0. "  BSY1  ,MDIO busy" "Not busy,Busy"
endif
if (((per.l.be(ad:0x08B80000+0x16000+0x30))&0x2000000)==0x2000000)
group.long (0x34+0x16000)++0x03
line.long 0x00 "EMDIO_CTL,External MDIO Control Register"
bitfld.long 0x00 27.--31. " DEV_ADDR     ,MDIO device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PORT_ADDR  ,MDIO port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC     ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
else
group.long (0x34+0x16000)++0x03
line.long 0x00 "EMDIO_CTL,External MDIO Control Register"
bitfld.long 0x00 27.--31. " REG_ADDR     ,MDIO register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PHY_ADDR   ,MDIO PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC     ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
endif
group.long (0x38+0x16000)++0x03
line.long 0x00 "EMDIO_DATA,External MDIO Data Register"
hexmask.long.word 0x00 16.--31. 1. " MDIO_DATA    ,MDIO data"
wgroup.long (0x3C+0x16000)++0x03
line.long 0x00 "EMDIO_ADDR,External MDIO Register Address Register"
tree.end
width 12.
tree "EMDIO2"
if (((per.l.be(ad:0x08B80000+0x17000+0x030))&0x200)==0x00)
group.long (0x30+0x17000)++0x03
line.long 0x00 "EMDIO_CFG,External MDIO Configuration Register"
rbitfld.long 0x00 31. " BSY2         ,MDIO busy" "Not busy,Busy"
rbitfld.long 0x00 30. "       MDIO_RD_ER ,MDIO read error" "No error,Error"
newline
bitfld.long 0x00 27.--29. " MDIO_HOLD    ,MDIO hold time (Enet cycles)" "1,3,5,7,9,11,13,15"
bitfld.long 0x00 26. "             PRE_DIS    ,MDIO preamble disable" "No,Yes"
bitfld.long 0x00 25. "            ENC45 ,Clause 45 support enable" "Clause 22,Clause 45"
newline
hexmask.long.word 0x00 16.--24. 1. " MDIO_CLK_DIV ,MDIO clock divisor"
bitfld.long 0x00 9. "           EHOLD      ,Extended MDIO hold time" "Not extended,Extended"
bitfld.long 0x00 8. "   NEG   ,MDC negative edge driving enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " CIM          ,MDIO command completion interrupt mask" "Masked,Not masked"
eventfld.long 0x00 1. "     CMP        ,MDIO command completion event" "Not completed,Completed"
rbitfld.long 0x00 0. "  BSY1  ,MDIO busy" "Not busy,Busy"
else
group.long (0x30+0x17000)++0x03
line.long 0x00 "EMDIO_CFG,External MDIO Configuration Register"
rbitfld.long 0x00 31. " BSY2         ,MDIO busy" "Not busy,Busy"
rbitfld.long 0x00 30. "       MDIO_RD_ER ,MDIO read error" "No error,Error"
newline
bitfld.long 0x00 27.--29. " MDIO_HOLD    ,MDIO hold time (Enet cycles)" "1,9,17,25,33,41,49,57"
bitfld.long 0x00 26. "             PRE_DIS    ,MDIO preamble disable" "No,Yes"
bitfld.long 0x00 25. "            ENC45 ,Clause 45 support enable" "Clause 22,Clause 45"
newline
hexmask.long.word 0x00 16.--24. 1. " MDIO_CLK_DIV ,MDIO clock divisor"
bitfld.long 0x00 9. "           EHOLD      ,Extended MDIO hold time" "Not extended,Extended"
bitfld.long 0x00 8. "   NEG   ,MDC negative edge driving enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " CIM          ,MDIO command completion interrupt mask" "Masked,Not masked"
eventfld.long 0x00 1. "     CMP        ,MDIO command completion event" "Not completed,Completed"
rbitfld.long 0x00 0. "  BSY1  ,MDIO busy" "Not busy,Busy"
endif
if (((per.l.be(ad:0x08B80000+0x17000+0x30))&0x2000000)==0x2000000)
group.long (0x34+0x17000)++0x03
line.long 0x00 "EMDIO_CTL,External MDIO Control Register"
bitfld.long 0x00 27.--31. " DEV_ADDR     ,MDIO device address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PORT_ADDR  ,MDIO port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC     ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
else
group.long (0x34+0x17000)++0x03
line.long 0x00 "EMDIO_CTL,External MDIO Control Register"
bitfld.long 0x00 27.--31. " REG_ADDR     ,MDIO register address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 22.--26. "             PHY_ADDR   ,MDIO PHY address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 17. " POST_INC     ,MDIO read with address post-increment initiation" "Not initiated,Initiated"
bitfld.long 0x00 16. "  READ       ,MDIO read initiation" "Not initiated,Initiated"
endif
group.long (0x38+0x17000)++0x03
line.long 0x00 "EMDIO_DATA,External MDIO Data Register"
hexmask.long.word 0x00 16.--31. 1. " MDIO_DATA    ,MDIO data"
wgroup.long (0x3C+0x17000)++0x03
line.long 0x00 "EMDIO_ADDR,External MDIO Register Address Register"
tree.end
endian.le
width 0x0B
tree.end
tree.open "MACSec"
base ad:0x08C03800
endian.be
width 14.
tree "MACsec Configuration Registers"
group.long 0x00++0x07
line.long 0x00 "MACSEC_CFG,MACsec Configuration Register"
bitfld.long 0x00 31. " SOI       ,RX SCI0 is the implicit SCI for point to point" "Disabled,Enabled"
newline
bitfld.long 0x00 30. " BYPN      ,Bypass mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. " KSS       ,Key store secured" "Not secured,Secured"
newline
bitfld.long 0x00 26.--27. " UFT       ,MAC security tag free frames configuration [Uncontrolled/Controlled]" "Delivered/discarded,Discarded/discarded,Delivered/delivered,?..."
newline
bitfld.long 0x00 25. " KFT       ,Frames received with the encryption (E) bit set and the changed text (C) configuration [uncontrolled/controlled]" "Delivered/discarded,Discarded/discarded"
newline
bitfld.long 0x00 24. " ITT       ,Frames received with an invalid sectag or a zero value PN configuration [uncontrolled/controlled]" "Discarded/discarded,Delivered/discarded"
newline
bitfld.long 0x00 22.--23. " USFT      ,Frames received with unknown SCI configuration [uncontrolled/controlled]" "Discarded/discarded,Discarded/delivered,Delivered/discarded,Delivered(C bit set)/discarded"
newline
bitfld.long 0x00 21. " ESCBT     ,Frames received with the Secure Channel (SC) bit cleared the End Station (ES) bit cleared and the Single Copy Broadcast bit set (SCB) configuration [Uncontrolled/Controlled]" "Discarded/discarded,Delivered/discarded"
newline
bitfld.long 0x00 20. " UECT      ,Frames received with the encryption (E) bit cleared and the changed text (C) bit [uncontrolled/controlled]" "Discarded/discarded,Delivered/discarded"
newline
bitfld.long 0x00 15. " SLC       ,SL check (SL octet verification)" "2 MSB==b00 & 6 LSB<48,6 LSB<48"
line.long 0x04 "MACSEC_ET,MACsec EtherType Register"
hexmask.long.word 0x04 16.--31. 1. " MACSEC_ET ,MACsec ethertype"
group.long 0x40++0x07
line.long 0x00 "MACSEC_MFL,Maximum Frame Length Register"
hexmask.long.word 0x00 16.--31. 1. " MAX_LEN   ,Maximum frame length in bytes"
line.long 0x04 "MACSEC_TPNET,TX Packet Number Exhaustion Threshold Register"
group.long 0x80++0x03
line.long 0x00 "MACSEC_RXSCA,RX SC Access Select Register"
bitfld.long 0x00 28.--31. " SC_SEL    ,SC select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0xC0++0x03
line.long 0x00 "MACSEC_TXSCA,TX SC Access Select Register"
bitfld.long 0x00 28.--31. " SC_SEL    ,SC select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
width 16.
tree "RX Configuration,Status and Statistic"
group.long 0x100++0x07
line.long 0x00 "MACSEC_RXSCI1H,RX Secure Channel Identifier First Half Register"
line.long 0x04 "MACSEC_RXSCI2H,RX Secure Channel Identifier Second Half Register"
tree.end
width 16.
tree "SecY Controlled Port Statistics (RX)"
group.long 0x110++0x0B
line.long 0x00 "MACSEC_IFIO1HS,IfInOctets First Half Statistic Register"
line.long 0x04 "MACSEC_IFIO2HS,IfInOctets Second Half Statistic Register"
line.long 0x08 "MACSEC_IFIUPS,IfInUcastPkts Statistic Register"
group.long 0x120++0x0F
line.long 0x00 "MACSEC_IFIMPS,IfInMulticastPkts Statistic Register"
line.long 0x04 "MACSEC_IFIBPS,IfInBroadcastPkts Statistic Register"
line.long 0x08 "MACSEC_RXSCCFG,RX Secure Channel Configuration Register"
bitfld.long 0x08 26.--31. " CO ,Confidentiality offset (the number of initial octets of each MSDU without confidentiality protection)" "No offset,1 byte,2 byte,3 byte,4 byte,5 byte,6 byte,7 byte,8 byte,9 byte,10 byte,11 byte,12 byte,13 byte,14 byte,15 byte,16 byte,17 byte,18 byte,19 byte,20 byte,21 byte,22 byte,23 byte,24 byte,25 byte,26 byte,27 byte,28 byte,29 byte,30 byte,31 byte,32 byte,33 byte,34 byte,35 byte,36 byte,37 byte,38 byte,39 byte,40 byte,41 byte,42 byte,43 byte,44 byte,45 byte,46 byte,47 byte,48 byte,49 byte,50 byte,51 byte,52 byte,53 byte,54 byte,55 byte,56 byte,57 byte,58 byte,59 byte,60 byte,61 byte,62 byte,63 byte"
bitfld.long 0x08 22.--23. "  VF     ,Validate frames control" "Disabled,Check,Strict,?..."
newline
bitfld.long 0x08 21. " RP ,Replay protection function enable" "Disabled,Enabled"
bitfld.long 0x08 20. "   SCI_EN ,SCI enable" "Disabled,Enabled"
bitfld.long 0x08 7. "  CS ,Cipher suite select" "GCM-AES-128,GCM-AES-256"
line.long 0x0C "MACSEC_RPW,Replay Window Register"
group.long 0x140++0x0F
line.long 0x00 "MACSEC_INOV1HS,InOctetsValidated First Half Statistic Register"
line.long 0x04 "MACSEC_INOV2HS,InOctetsValidated Second Half Statistic Register"
line.long 0x08 "MACSEC_INOD1HS,InOctetsDecrypted First Half Statistic Register"
line.long 0x0C "MACSEC_INOD2HS,InOctetsDecrypted Second Half Statistic Register"
tree.end
width 19.
tree "Per RX SC Statistics"
group.long 0x150++0x0B
line.long 0x00 "MACSEC_RXSCIPUS,RX Secure Channel InPktsUnchecked Statistic Register"
line.long 0x04 "MACSEC_RXSCIPDS,RX Secure Channel InPktsDelayed Statistic Register"
line.long 0x08 "MACSEC_RXSCIPLS,RX Secure Channel InPktsLate Statistic Register"
group.long 0x160++0x03
line.long 0x00 "MACSEC_RXAN0INUSS,RX AN 0 InNotUsingSA Statistic Register"
group.long 0x164++0x03
line.long 0x00 "MACSEC_RXAN1INUSS,RX AN 1 InNotUsingSA Statistic Register"
group.long 0x168++0x03
line.long 0x00 "MACSEC_RXAN2INUSS,RX AN 2 InNotUsingSA Statistic Register"
group.long 0x16C++0x03
line.long 0x00 "MACSEC_RXAN3INUSS,RX AN 3 InNotUsingSA Statistic Register"
group.long 0x170++0x03
line.long 0x00 "MACSEC_RXAN0IPUSS,RX AN 0 InPktsUnusedSA Statistic Register"
group.long 0x174++0x03
line.long 0x00 "MACSEC_RXAN1IPUSS,RX AN 1 InPktsUnusedSA Statistic Register"
group.long 0x178++0x03
line.long 0x00 "MACSEC_RXAN2IPUSS,RX AN 2 InPktsUnusedSA Statistic Register"
group.long 0x17C++0x03
line.long 0x00 "MACSEC_RXAN3IPUSS,RX AN 3 InPktsUnusedSA Statistic Register"
group.long 0x180++0x0F
line.long 0x00 "MACSEC_RXSAACS,RX Security Association A Configuration And Status Register"
bitfld.long 0x00 31. " EN ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "  AN ,AN association" "0,1,2,3"
eventfld.long 0x00 0. "  A ,Active" "0,1"
line.long 0x04 "MACSEC_RXSAANPN,RX Security Association A Next PN Register"
line.long 0x08 "MACSEC_RXSAALPN,RX Security Association A Lowest PN Register"
line.long 0x0C "MACSEC_RXSAAIPOS,RX Security Association A InPktsOK Statistic Register"
group.long (0x180+0x20)++0x17
line.long 0x00 "MACSEC_RXSAHA1Q,RX Security Association A Hash 1 Register (bits 0-31)"
line.long 0x04 "MACSEC_RXSAHA2Q,RX Security Association A Hash 2 Register (bits 32-63)"
line.long 0x08 "MACSEC_RXSAHA3Q,RX Security Association A Hash 3 Register (bits 64-95)"
line.long 0x0C "MACSEC_RXSAHA4Q,RX Security Association A Hash 4 Register (bits 96-127)"
line.long 0x10 "MACSEC_RXSAAIPIS,RX Security Association A InPktsInvalid Statistic Register"
line.long 0x14 "MACSEC_RXSAAIPNVS,RX Security Association A InPktsNotValid Statistic Register"
group.long 0x1C0++0x0F
line.long 0x00 "MACSEC_RXSABCS,RX Security Association B Configuration And Status Register"
bitfld.long 0x00 31. " EN ,Receive enable" "Disabled,Enabled"
bitfld.long 0x00 29.--30. "  AN ,AN association" "0,1,2,3"
eventfld.long 0x00 0. "  A ,Active" "0,1"
line.long 0x04 "MACSEC_RXSABNPN,RX Security Association B Next PN Register"
line.long 0x08 "MACSEC_RXSABLPN,RX Security Association B Lowest PN Register"
line.long 0x0C "MACSEC_RXSABIPOS,RX Security Association B InPktsOK Statistic Register"
group.long (0x1C0+0x20)++0x17
line.long 0x00 "MACSEC_RXSAHB1Q,RX Security Association B Hash 1 Register (bits 0-31)"
line.long 0x04 "MACSEC_RXSAHB2Q,RX Security Association B Hash 2 Register (bits 32-63)"
line.long 0x08 "MACSEC_RXSAHB3Q,RX Security Association B Hash 3 Register (bits 64-95)"
line.long 0x0C "MACSEC_RXSAHB4Q,RX Security Association B Hash 4 Register (bits 96-127)"
line.long 0x10 "MACSEC_RXSABIPIS,RX Security Association B InPktsInvalid Statistic Register"
line.long 0x14 "MACSEC_RXSABIPNVS,RX Security Association B InPktsNotValid Statistic Register"
tree.end
width 17.
tree "TX Configuration,Status and Statistic"
group.long 0x200++0x07
line.long 0x00 "MACSEC_TXSCI1H,TX Secure Channel Identifier First Half"
line.long 0x04 "MACSEC_TXSCI2H,TX Secure Channel Identifier Second Half"
tree.end
width 18.
tree "SecY Controlled Port Statistics (TX)"
group.long 0x210++0x0F
line.long 0x00 "MACSEC_IFOO1HS,IfOutOctets First Half Statistic Register"
line.long 0x04 "MACSEC_IFOO2HS,IfOutOctets Second Half Statistic Register"
line.long 0x08 "MACSEC_IFOUPS,IfOutUcastPkts Statistic Register"
line.long 0x0C "MACESC_OPUS,OutPktsUntagged Statistic Register"
group.long 0x220++0x0F
line.long 0x00 "MACSEC_IFOMPS,IfOutMulticastPkts Statistic Register"
line.long 0x04 "MACSEC_IFOBPS,IfOutBroadcastPkts Statistic Register"
line.long 0x08 "MACSEC_TXSCCFG,TX Secure Channel Configuration Register"
bitfld.long 0x08 31. " USCB ,Use SCB" "Not used,Used"
bitfld.long 0x08 30. "  UES ,Use ES" "Not used,Used"
newline
bitfld.long 0x08 29. " AIS  ,Always include SCI" "0,1"
bitfld.long 0x08 28. "         PF  ,Frames protection enable" "Disabled,Enabled"
newline
bitfld.long 0x08 27. " CE   ,Confidentiality protection enable" "Disabled,Enabled"
bitfld.long 0x08 18.--23. "  CO  ,Confidentiality offset (the number of initial octets of each MSDU without confidentiality protection)" "No offset,1 byte,2 byte,3 byte,4 byte,5 byte,6 byte,7 byte,8 byte,9 byte,10 byte,11 byte,12 byte,13 byte,14 byte,15 byte,16 byte,17 byte,18 byte,19 byte,20 byte,21 byte,22 byte,23 byte,24 byte,25 byte,26 byte,27 byte,28 byte,29 byte,30 byte,31 byte,32 byte,33 byte,34 byte,35 byte,36 byte,37 byte,38 byte,39 byte,40 byte,41 byte,42 byte,43 byte,44 byte,45 byte,46 byte,47 byte,48 byte,49 byte,50 byte,51 byte,52 byte,53 byte,54 byte,55 byte,56 byte,57 byte,58 byte,59 byte,60 byte,61 byte,62 byte,63 byte"
bitfld.long 0x08 15. "  SCE ,TX SC enable" "Disabled,Enabled"
newline
bitfld.long 0x08 14. " ASA  ,Active SA to be used on TX for SC" "A,B"
bitfld.long 0x08 12.--13. "         ANA ,AN association" "0,1,2,3"
bitfld.long 0x08 7. "          CS  ,Cipher suite select" "GCM-AES-128,GCM-AES-256"
line.long 0x0C "MACSEC_OPTLS,OutPktsTooLong Statistic Register"
group.long 0x240++0x0F
line.long 0x00 "MACSEC_OOP1HS,OutOctetsProtected First Half Statistic Register"
line.long 0x04 "MACSEC_OOP2HS,OutOctetsProtected Second Half Statistic Register"
line.long 0x08 "MACSEC_OOE1HS,OutOCtetsEncrypted First Half Statistic Register"
line.long 0x0C "MACSEC_OOE2HS,OutOCtetsEncrypted Second Half Statistic Register"
group.long 0x280++0x0F
line.long 0x00 "MACSEC_TXSAACS,TX Security Association A Configuration And Status Register"
eventfld.long 0x00 0. " A    ,Active" "0,1"
line.long 0x04 "MACSEC_TXSAANPN,TX Security Association A Next PN Register"
line.long 0x08 "MACSEC_TXSAAOPPS,TX Security Association A OutPktsProtected Statistic Register"
line.long 0x0C "MACSEC_TXSAAOPES,TX Security Association A OutPktsEncrypted Statistic Register"
group.long (0x280+0x20)++0x0F
line.long 0x00 "MACSEC_TXSAHA1Q,TX Security Association A Hash 1 Register (bits 0-31)"
line.long 0x04 "MACSEC_TXSAHA2Q,TX Security Association A Hash 2 Register (bits 32-63)"
line.long 0x08 "MACSEC_TXSAHA3Q,TX Security Association A Hash 3 Register (bits 64-95)"
line.long 0x0C "MACSEC_TXSAHA4Q,TX Security Association A Hash 4 Register (bits 96-127)"
group.long 0x2C0++0x0F
line.long 0x00 "MACSEC_TXSABCS,TX Security Association B Configuration And Status Register"
eventfld.long 0x00 0. " A    ,Active" "0,1"
line.long 0x04 "MACSEC_TXSABNPN,TX Security Association B Next PN Register"
line.long 0x08 "MACSEC_TXSABOPPS,TX Security Association B OutPktsProtected Statistic Register"
line.long 0x0C "MACSEC_TXSABOPES,TX Security Association B OutPktsEncrypted Statistic Register"
group.long (0x2C0+0x20)++0x0F
line.long 0x00 "MACSEC_TXSAHB1Q,TX Security Association B Hash 1 Register (bits 0-31)"
line.long 0x04 "MACSEC_TXSAHB2Q,TX Security Association B Hash 2 Register (bits 32-63)"
line.long 0x08 "MACSEC_TXSAHB3Q,TX Security Association B Hash 3 Register (bits 64-95)"
line.long 0x0C "MACSEC_TXSAHB4Q,TX Security Association B Hash 4 Register (bits 96-127)"
tree.end
width 17.
tree "Global Configuration and Status"
rgroup.long 0x3F8++0x07
line.long 0x00 "MACSEC_IP_REV_1,MACsec IP Block Revision 1 Register"
hexmask.long.byte 0x00 24.--31. 1. " IP_MN  ,Minor revision"
hexmask.long.byte 0x00 16.--23. 1. "            IP_MJ   ,Major revision"
newline
hexmask.long.word 0x00 0.--15. 1. " IP_ID  ,IP block ID"
line.long 0x04 "MACSEC_IP_REV_2,MACsec IP Block Revision 2 Register"
hexmask.long.byte 0x04 24.--31. 1. " IP_CFG ,Configuration options"
hexmask.long.byte 0x04 16.--23. 1. "            IP_ERR  ,Errata revision level"
newline
hexmask.long.byte 0x04 8.--15. 1. " IP_INT ,Integration options"
group.long 0x400++0x07
line.long 0x00 "MACSEC_EVR,MACsec Event Register"
eventfld.long 0x00 15. " TS15R  ,TX SC 15 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 14. "  TS14R   ,TX SC 14 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 13. " TS13R  ,TX SC 13 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 12. "  TS12R   ,TX SC 12 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 11. " TS11R  ,TX SC 11 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  TS10R   ,TX SC 10 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 9. "    TS9R  ,TX SC 9 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 8. " TS8R   ,TX SC 8 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 7. "  TS7R    ,TX SC 7 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 6. "    TS6R  ,TX SC 6 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 5. " TS5R   ,TX SC 5 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 4. "  TS4R    ,TX SC 4 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 3. "    TS3R  ,TX SC 3 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 2. " TS2R   ,TX SC 2 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 1. "  TS1R    ,TX SC 1 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 0. "    TS0R  ,TX SC 0 next_PN exhaustion threshold reached interrupt" "No interrupt,Interrupt"
line.long 0x04 "MACSEC_EVER,MACsec Event Enable Register"
bitfld.long 0x04 15. " TS15R  ,TX SC 15 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 14. "      TS14R   ,TX SC 14 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 13. " TS13R  ,TX SC 13 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 12. "      TS12R   ,TX SC 12 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 11. " TS11R  ,TX SC 11 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 10. "      TS10R   ,TX SC 10 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 9. "        TS9R  ,TX SC 9 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 8. " TS8R   ,TX SC 8 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 7. "      TS7R    ,TX SC 7 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 6. "        TS6R  ,TX SC 6 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 5. " TS5R   ,TX SC 5 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 4. "      TS4R    ,TX SC 4 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 3. "        TS3R  ,TX SC 3 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 2. " TS2R   ,TX SC 2 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      TS1R    ,TX SC 1 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 0. "        TS0R  ,TX SC 0 next_PN exhaustion threshold reached interrupt enable" "Disabled,Enabled"
group.long 0x40C++0x07
line.long 0x00 "MACSEC_ERR,MACsec Error Register"
eventfld.long 0x00 31. " ECCE   ,MACsec memory ECC multiple-bit error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 15. "  TS15E   ,TX SC 15 frame error interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 14. " TS14E  ,TX SC 14 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 13. "  TS13E   ,TX SC 13 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 12. "    TS12E ,TX SC 12 frame error interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 11. " TS11E  ,TX SC 11 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 10. "  TS10E   ,TX SC 10 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 9. "    TS9E  ,TX SC 9 frame error interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 8. " TS8E   ,TX SC 8 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 7. "  TS7E    ,TX SC 7 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 6. "    TS6E  ,TX SC 6 frame error interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 5. " TS5E   ,TX SC 5 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 4. "  TS4E    ,TX SC 4 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 3. "    TS3E  ,TX SC 3 frame error interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 2. " TS2E   ,TX SC 2 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 1. "  TS1E    ,TX SC 1 frame error interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 0. "    TS0E  ,TX SC 0 frame error interrupt" "No interrupt,Interrupt"
line.long 0x04 "MACSEC_ERER,MACsec Error Enable Register"
bitfld.long 0x04 31. " ECCE   ,MACsec memory ECC multiple-bit error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 15. "      TS15E   ,TX SC 15 frame error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 14. " TS14E  ,TX SC 14 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 13. "      TS13E   ,TX SC 13 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 12. "        TS12E ,TX SC 12 frame error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 11. " TS11E  ,TX SC 11 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 10. "      TS10E   ,TX SC 10 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 9. "        TS9E  ,TX SC 9 frame error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 8. " TS8E   ,TX SC 8 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 7. "      TS7E    ,TX SC 7 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 6. "        TS6E  ,TX SC 6 frame error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 5. " TS5E   ,TX SC 5 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 4. "      TS4E    ,TX SC 4 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 3. "        TS3E  ,TX SC 3 frame error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 2. " TS2E   ,TX SC 2 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 1. "      TS1E    ,TX SC 1 frame error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 0. "        TS0E  ,TX SC 0 frame error interrupt enable" "Disabled,Enabled"
if (((per.l.be(ad:0x08C03800+0x440))&0x01)==0x01)
rgroup.long 0x440++0x03
line.long 0x00 "MACSEC_MEEC,MACSec Memory ECC Error Capture Register"
bitfld.long 0x00 0. " CAP    ,Captured error indication" "No error,Error"
bitfld.long 0x00 1. "      CET     ,Captured error type" "Single-bit ECC,Multi-bit ECC"
newline
hexmask.long.byte 0x00 8.--15. 1. " SERCNT ,Soft error counter"
hexmask.long.word 0x00 23.--31. 0x80 "            MEMADDR ,Captured memory address in the MACsec internal memory that caused the ECC error"
else
rgroup.long 0x440++0x03
line.long 0x00 "MACSEC_MEEC,MACSec Memory ECC Error Capture Register"
bitfld.long 0x00 0. " CAP    ,Captured error indication" "No error,Error"
bitfld.long 0x00 1. "      CET     ,Captured error type" "No error,?..."
newline
hexmask.long.byte 0x00 8.--15. 1. " SERCNT ,Soft error counter"
hexmask.long.word 0x00 23.--31. 0x80 "            MEMADDR ,Captured memory address in the MACsec internal memory that caused the ECC error"
endif
rgroup.long 0x444++0x03
line.long 0x00 "MACSEC_IDLE,MACsec Idle Status Register"
bitfld.long 0x00 31. " I      ,MACsec idle" "Not idle,Idle"
tree.end
width 18.
tree "MACSec RX Global Statistics"
group.long 0x600++0x0B
line.long 0x00 "MACSEC_IFIOCP1HS,IfInOctetsCp First Half Statistic Register"
line.long 0x04 "MACSEC_IFIOCP2HS,IfInOctetsCp Second Half Statistic Register"
line.long 0x08 "MACSEC_IFIUPCPS,IfInUcastPktsCp Statistic Register"
group.long 0x610++0x0B
line.long 0x00 "MACSEC_IFIOUP1HS,IfInOctetsUp First Half Statistic Register"
line.long 0x04 "MACSEC_IFIOUP2HS,IfInOctetsUp Second Half Statistic Register"
line.long 0x08 "MACSEC_IFIUPUPS,IfInUcastPktsUp Statistic Register"
group.long 0x620++0x2B
line.long 0x00 "MACSEC_IFIMPCPS,IfInMulticastPktsCp Statistic Register"
line.long 0x04 "MACSEC_IFIBPCPS,IfInBroadcastPktsCp Statistic Register"
line.long 0x08 "MACSEC_IFIMPUPS,IfInMulticastPktsUp Statistic Register"
line.long 0x0C "MACSEC_IFIBPUPS,IfInBroadcastPktsUp Statistic Register"
line.long 0x10 "MACSEC_INPWTS,InPktsWithoutTag Statistic Register"
line.long 0x14 "MACSEC_INPKAYS,InPktsKaY Statistic Register"
line.long 0x18 "MACSEC_INPBTS,InPktsBadTag Statistic Register"
line.long 0x1C "MACSEC_IPSNFS,InPktsSCINotFound Statistic Register"
line.long 0x20 "MACSEC_IPUECS,InPktsUnsupportedEC Statistic Register"
line.long 0x24 "MACSEC_IPESCBS,InPktsEponSingleCopyBroadcast Statistic Register"
line.long 0x28 "MACSEC_IPTLS,InPktsTooLong Statistic Register"
tree.end
width 13.
tree "MACSec TX Global Statistics"
group.long 0x680++0x03
line.long 0x00 "MACSEC_OPDS,OutPktsDiscarded Statistic Register"
tree.end
width 17.
tree "MACSec RX Keys"
group.long 0x700++0x03
line.long 0x00 "MACSEC_RXSAKA1Q,RX Security Association A Key 1 (bits 0-31)"
group.long 0x704++0x03
line.long 0x00 "MACSEC_RXSAKA2Q,RX Security Association A Key 2 (bits 32-63)"
group.long 0x708++0x03
line.long 0x00 "MACSEC_RXSAKA3Q,RX Security Association A Key 3 (bits 64-95)"
group.long 0x70C++0x03
line.long 0x00 "MACSEC_RXSAKA4Q,RX Security Association A Key 4 (bits 96-127)"
group.long 0x710++0x03
line.long 0x00 "MACSEC_RXSAKA5Q,RX Security Association A Key 5 (bits 128-159)"
group.long 0x714++0x03
line.long 0x00 "MACSEC_RXSAKA6Q,RX Security Association A Key 6 (bits 160-191)"
group.long 0x718++0x03
line.long 0x00 "MACSEC_RXSAKA7Q,RX Security Association A Key 7 (bits 192-223)"
group.long 0x71C++0x03
line.long 0x00 "MACSEC_RXSAKA8Q,RX Security Association A Key 8 (bits 224-255)"
group.long 0x740++0x03
line.long 0x00 "MACSEC_RXSAKB1Q,RX Security Association B Key 1 (bits 0-31)"
group.long 0x744++0x03
line.long 0x00 "MACSEC_RXSAKB2Q,RX Security Association B Key 2 (bits 32-63)"
group.long 0x748++0x03
line.long 0x00 "MACSEC_RXSAKB3Q,RX Security Association B Key 3 (bits 64-95)"
group.long 0x74C++0x03
line.long 0x00 "MACSEC_RXSAKB4Q,RX Security Association B Key 4 (bits 96-127)"
group.long 0x750++0x03
line.long 0x00 "MACSEC_RXSAKB5Q,RX Security Association B Key 5 (bits 128-159)"
group.long 0x754++0x03
line.long 0x00 "MACSEC_RXSAKB6Q,RX Security Association B Key 6 (bits 160-191)"
group.long 0x758++0x03
line.long 0x00 "MACSEC_RXSAKB7Q,RX Security Association B Key 7 (bits 192-223)"
group.long 0x75C++0x03
line.long 0x00 "MACSEC_RXSAKB8Q,RX Security Association B Key 8 (bits 224-255)"
tree.end
width 17.
tree "MACSec TX Keys"
group.long 0x780++0x03
line.long 0x00 "MACSEC_TXSAKA1Q,TX Security Association A Key 1 (bits 0-31)"
group.long 0x784++0x03
line.long 0x00 "MACSEC_TXSAKA2Q,TX Security Association A Key 2 (bits 32-63)"
group.long 0x788++0x03
line.long 0x00 "MACSEC_TXSAKA3Q,TX Security Association A Key 3 (bits 64-95)"
group.long 0x78C++0x03
line.long 0x00 "MACSEC_TXSAKA4Q,TX Security Association A Key 4 (bits 96-127)"
group.long 0x790++0x03
line.long 0x00 "MACSEC_TXSAKA5Q,TX Security Association A Key 5 (bits 128-159)"
group.long 0x794++0x03
line.long 0x00 "MACSEC_TXSAKA6Q,TX Security Association A Key 6 (bits 160-191)"
group.long 0x798++0x03
line.long 0x00 "MACSEC_TXSAKA7Q,TX Security Association A Key 7 (bits 192-223)"
group.long 0x79C++0x03
line.long 0x00 "MACSEC_TXSAKA8Q,TX Security Association A Key 8 (bits 224-255)"
group.long 0x7C0++0x03
line.long 0x00 "MACSEC_TXSAKB1Q,TX Security Association B Key 1 (bits 0-31)"
group.long 0x7C4++0x03
line.long 0x00 "MACSEC_TXSAKB2Q,TX Security Association B Key 2 (bits 32-63)"
group.long 0x7C8++0x03
line.long 0x00 "MACSEC_TXSAKB3Q,TX Security Association B Key 3 (bits 64-95)"
group.long 0x7CC++0x03
line.long 0x00 "MACSEC_TXSAKB4Q,TX Security Association B Key 4 (bits 96-127)"
group.long 0x7D0++0x03
line.long 0x00 "MACSEC_TXSAKB5Q,TX Security Association B Key 5 (bits 128-159)"
group.long 0x7D4++0x03
line.long 0x00 "MACSEC_TXSAKB6Q,TX Security Association B Key 6 (bits 160-191)"
group.long 0x7D8++0x03
line.long 0x00 "MACSEC_TXSAKB7Q,TX Security Association B Key 7 (bits 192-223)"
group.long 0x7DC++0x03
line.long 0x00 "MACSEC_TXSAKB8Q,TX Security Association B Key 8 (bits 224-255)"
tree.end
endian.le
width 0x0B
tree.end
sif cpuis("LS2088A")
tree.open "AIOP (Advanced IO Processor)"
tree "CTLU"
base ad:0x08900000
endian.be
width 14.
tree "CTLU Parser"
group.long 0x00++0x03 "Parser Configuration and Status"
line.long 0x00 "PAR_CFG,Parser Configuration Register"
bitfld.long 0x00 2. " CE     ,Clock power down enable" "Disabled,Enabled"
bitfld.long 0x00 1. "  AD     ,Atomic fragment disable" "No,Yes"
bitfld.long 0x00 0. "  EN     ,Parser enable" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "PAR_IDLE,Parser Idle Register"
bitfld.long 0x00 0. " I      ,Parser idle" "Not idle,Idle"
group.long 0x08++0x03
line.long 0x00 "PAR_PCLIM,RX Parsing Cycle Limit Register"
hexmask.long.word 0x00 0.--12. 1. " PCLIM  ,Maximum frame parsing cycle limit"
rgroup.long 0x0C++0x07 "Parser Block ID"
line.long 0x00 "PAR_IP_REV_1,Parser IP Block ID Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID  ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "      IP_MJ  ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "   IP_MN  ,Minor revision"
line.long 0x04 "PAR_IP_REV_2,Parser IP Block ID 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT ,Integration options"
hexmask.long.byte 0x04 8.--15. 1. "        IP_ERR ,Errata revision level"
hexmask.long.byte 0x04 0.--7. 1. "   IP_CFG ,Configuration options"
tree.end
width 23.
tree "Control Registers"
group.long 0x1000++0x1B
line.long 0x00 "IOP_CMODE,CTLU Mode Register"
bitfld.long 0x00 0. " CINIT     ,CTLU init" "Not initialized,Initialized"
line.long 0x04 "IOP_CTIMESTAMP_WINDOW,CTLU Timestamp Window Register"
bitfld.long 0x04 27.--31. " TWINDOW   ,Timestamp window" "Timestamp[32-63],Timestamp[31-62],Timestamp[30-61],Timestamp[29-60],Timestamp[28-59],Timestamp[27-58],Timestamp[26-57],Timestamp[25-56],Timestamp[24-55],Timestamp[23-54],Timestamp[22-53],Timestamp[21-52],Timestamp[20-51],Timestamp[19-50],Timestamp[18-49],Timestamp[17-48],Timestamp[16-47],Timestamp[15-46],Timestamp[14-45],Timestamp[13-44],Timestamp[12-43],Timestamp[11-42],Timestamp[10-41],Timestamp[9-40],Timestamp[8-39],Timestamp[7-38],Timestamp[6-37],Timestamp[5-36],Timestamp[4-35],Timestamp[3-34],Timestamp[2-33],Timestamp[1-32]"
line.long 0x08 "IOP_CMNLTH,CTLU Maximum Number Of Lookups Threshold Register"
hexmask.long.byte 0x08 24.--31. 1. " MNLTH     ,Maximum key composition and table lookups 'loops' threshold"
line.long 0x0C "IOP_CTICID,CTLU Lookup Tables ICID Register"
hexmask.long.word 0x0C 17.--31. 1. " ICID      ,External memory access for the lookup tables"
bitfld.long 0x0C 16. "              BDI   ,Global protection on table updates enable" "Disabled,Enabled"
newline
bitfld.long 0x0C 14. " BMT       ,Bypass memory translation" "0,1"
bitfld.long 0x0C 13. "                 PL    ,Privilege level" "BMT unused,BMT used"
line.long 0x10 "IOP_CAGTIM,CTLU Aging Timer Register"
line.long 0x14 "IOP_CMFMG,CTLU Memory Fill Margin Register"
line.long 0x18 "IOP_CLLCK,CTLU Local Lock Register"
bitfld.long 0x18 16. " GLFG      ,Acceleration control" "Acceleration,No acceleration"
bitfld.long 0x18 0. "   CLLCK ,CTLU memory fill margin" "Local lock,Non-local lock"
rgroup.long 0x101C++0x03
line.long 0x00 "IOP_CINITDONE,CTLU Initialization Completed Register"
bitfld.long 0x00 0. " CINITDONE ,CTLU initialization completed" "Not completed,Completed"
tree.end
width 14.
tree "Memory Access Attribute Registers"
group.long 0x1318++0x03
line.long 0x00 "IOP_CHCDTH,CTLU Hash Chain Depth Performance Event Threshold Register"
hexmask.long.word 0x00 16.--31. 1. " CHCDTH ,CTLU hash chain depth performance event threshold"
tree "External Lookup Tables Descriptors List"
group.long 0x1400++0x0B
line.long 0x00 "IOP_CTADDH_0,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_0,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_0,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1400+0x10)++0x07
line.long 0x00 "IOP_CTNCE_0,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_0,CTLU Number Of Excess Entries In Table Register"
tree.end
tree "CTLU/MFLU: Internal MFLU Algorithmic Cache"
group.long 0x1440++0x0B
line.long 0x00 "IOP_CTADDH_2,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_2,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_2,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1440+0x10)++0x07
line.long 0x00 "IOP_CTNCE_2,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_2,CTLU Number Of Excess Entries In Table Register"
tree.end
tree "External CTLU Lookup Tables Memory Region 0"
group.long 0x1460++0x0B
line.long 0x00 "IOP_CTADDH_3,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_3,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_3,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1460+0x10)++0x07
line.long 0x00 "IOP_CTNCE_3,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_3,CTLU Number Of Excess Entries In Table Register"
tree.end
tree "External CTLU Lookup Tables Memory Region 1"
group.long 0x1480++0x0B
line.long 0x00 "IOP_CTADDH_4,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_4,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_4,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x1480+0x10)++0x07
line.long 0x00 "IOP_CTNCE_4,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_4,CTLU Number Of Excess Entries In Table Register"
tree.end
tree "External CTLU Lookup Tables Memory Region 2"
group.long 0x14A0++0x0B
line.long 0x00 "IOP_CTADDH_5,CTLU Tables Base Address High Register"
line.long 0x04 "IOP_CTADDL_5,CTLU Tables Base Address Low Register"
line.long 0x08 "IOP_CTSIZE_5,Total CTLU Tables Size Register"
hexmask.long 0x08 4.--31. 1. " CTSIZE ,The size of the memory allocated for lookup tables is a function of the value in this field"
rgroup.long (0x14A0+0x10)++0x07
line.long 0x00 "IOP_CTNCE_5,CTLU Number Of Committed Entries In Table Register"
line.long 0x04 "IOP_CTNEE_5,CTLU Number Of Excess Entries In Table Register"
tree.end
tree.end
width 11.
tree "CTLU DMA Registers"
group.long 0x1800++0x07
line.long 0x00 "IOP_CSBEV,CTLU External Bus Error Event Register"
eventfld.long 0x00 0. " SBEV ,System bus error event" "No error,Error"
line.long 0x04 "IOP_CSBEM,CTLU External Bus Error Event Mask Register"
bitfld.long 0x04 0. " SBEM ,System bus error event mask" "Masked,Not masked"
tree.end
width 17.
tree "CTLU Key Composition Registers"
group.long (0x2000+0x0)++0x03
line.long 0x00 "IOP_CKRHCNT_0,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x0)++0x03
line.long 0x00 "IOP_CKCERR_0,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x8)++0x03
line.long 0x00 "IOP_CKRHCNT_1,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x8)++0x03
line.long 0x00 "IOP_CKCERR_1,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x10)++0x03
line.long 0x00 "IOP_CKRHCNT_2,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x10)++0x03
line.long 0x00 "IOP_CKCERR_2,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x18)++0x03
line.long 0x00 "IOP_CKRHCNT_3,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x18)++0x03
line.long 0x00 "IOP_CKCERR_3,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x20)++0x03
line.long 0x00 "IOP_CKRHCNT_4,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x20)++0x03
line.long 0x00 "IOP_CKCERR_4,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x28)++0x03
line.long 0x00 "IOP_CKRHCNT_5,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x28)++0x03
line.long 0x00 "IOP_CKCERR_5,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x30)++0x03
line.long 0x00 "IOP_CKRHCNT_6,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x30)++0x03
line.long 0x00 "IOP_CKCERR_6,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x38)++0x03
line.long 0x00 "IOP_CKRHCNT_7,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x38)++0x03
line.long 0x00 "IOP_CKCERR_7,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x40)++0x03
line.long 0x00 "IOP_CKRHCNT_8,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x40)++0x03
line.long 0x00 "IOP_CKCERR_8,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x48)++0x03
line.long 0x00 "IOP_CKRHCNT_9,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x48)++0x03
line.long 0x00 "IOP_CKCERR_9,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x50)++0x03
line.long 0x00 "IOP_CKRHCNT_10,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x50)++0x03
line.long 0x00 "IOP_CKCERR_10,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x58)++0x03
line.long 0x00 "IOP_CKRHCNT_11,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x58)++0x03
line.long 0x00 "IOP_CKCERR_11,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x60)++0x03
line.long 0x00 "IOP_CKRHCNT_12,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x60)++0x03
line.long 0x00 "IOP_CKCERR_12,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x68)++0x03
line.long 0x00 "IOP_CKRHCNT_13,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x68)++0x03
line.long 0x00 "IOP_CKCERR_13,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x70)++0x03
line.long 0x00 "IOP_CKRHCNT_14,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x70)++0x03
line.long 0x00 "IOP_CKCERR_14,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x78)++0x03
line.long 0x00 "IOP_CKRHCNT_15,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x78)++0x03
line.long 0x00 "IOP_CKCERR_15,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x80)++0x03
line.long 0x00 "IOP_CKRHCNT_16,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x80)++0x03
line.long 0x00 "IOP_CKCERR_16,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x88)++0x03
line.long 0x00 "IOP_CKRHCNT_17,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x88)++0x03
line.long 0x00 "IOP_CKCERR_17,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x90)++0x03
line.long 0x00 "IOP_CKRHCNT_18,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x90)++0x03
line.long 0x00 "IOP_CKCERR_18,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x98)++0x03
line.long 0x00 "IOP_CKRHCNT_19,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x98)++0x03
line.long 0x00 "IOP_CKCERR_19,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA0)++0x03
line.long 0x00 "IOP_CKRHCNT_20,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xA0)++0x03
line.long 0x00 "IOP_CKCERR_20,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xA8)++0x03
line.long 0x00 "IOP_CKRHCNT_21,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xA8)++0x03
line.long 0x00 "IOP_CKCERR_21,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB0)++0x03
line.long 0x00 "IOP_CKRHCNT_22,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xB0)++0x03
line.long 0x00 "IOP_CKCERR_22,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xB8)++0x03
line.long 0x00 "IOP_CKRHCNT_23,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xB8)++0x03
line.long 0x00 "IOP_CKCERR_23,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC0)++0x03
line.long 0x00 "IOP_CKRHCNT_24,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xC0)++0x03
line.long 0x00 "IOP_CKCERR_24,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xC8)++0x03
line.long 0x00 "IOP_CKRHCNT_25,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xC8)++0x03
line.long 0x00 "IOP_CKCERR_25,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD0)++0x03
line.long 0x00 "IOP_CKRHCNT_26,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xD0)++0x03
line.long 0x00 "IOP_CKCERR_26,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xD8)++0x03
line.long 0x00 "IOP_CKRHCNT_27,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xD8)++0x03
line.long 0x00 "IOP_CKCERR_27,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE0)++0x03
line.long 0x00 "IOP_CKRHCNT_28,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xE0)++0x03
line.long 0x00 "IOP_CKCERR_28,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xE8)++0x03
line.long 0x00 "IOP_CKRHCNT_29,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xE8)++0x03
line.long 0x00 "IOP_CKCERR_29,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF0)++0x03
line.long 0x00 "IOP_CKRHCNT_30,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xF0)++0x03
line.long 0x00 "IOP_CKCERR_30,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0xF8)++0x03
line.long 0x00 "IOP_CKRHCNT_31,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0xF8)++0x03
line.long 0x00 "IOP_CKCERR_31,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x100)++0x03
line.long 0x00 "IOP_CKRHCNT_32,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x100)++0x03
line.long 0x00 "IOP_CKCERR_32,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x108)++0x03
line.long 0x00 "IOP_CKRHCNT_33,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x108)++0x03
line.long 0x00 "IOP_CKCERR_33,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x110)++0x03
line.long 0x00 "IOP_CKRHCNT_34,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x110)++0x03
line.long 0x00 "IOP_CKCERR_34,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x118)++0x03
line.long 0x00 "IOP_CKRHCNT_35,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x118)++0x03
line.long 0x00 "IOP_CKCERR_35,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x120)++0x03
line.long 0x00 "IOP_CKRHCNT_36,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x120)++0x03
line.long 0x00 "IOP_CKCERR_36,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x128)++0x03
line.long 0x00 "IOP_CKRHCNT_37,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x128)++0x03
line.long 0x00 "IOP_CKCERR_37,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x130)++0x03
line.long 0x00 "IOP_CKRHCNT_38,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x130)++0x03
line.long 0x00 "IOP_CKCERR_38,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x138)++0x03
line.long 0x00 "IOP_CKRHCNT_39,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x138)++0x03
line.long 0x00 "IOP_CKCERR_39,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x140)++0x03
line.long 0x00 "IOP_CKRHCNT_40,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x140)++0x03
line.long 0x00 "IOP_CKCERR_40,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x148)++0x03
line.long 0x00 "IOP_CKRHCNT_41,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x148)++0x03
line.long 0x00 "IOP_CKCERR_41,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x150)++0x03
line.long 0x00 "IOP_CKRHCNT_42,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x150)++0x03
line.long 0x00 "IOP_CKCERR_42,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x158)++0x03
line.long 0x00 "IOP_CKRHCNT_43,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x158)++0x03
line.long 0x00 "IOP_CKCERR_43,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x160)++0x03
line.long 0x00 "IOP_CKRHCNT_44,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x160)++0x03
line.long 0x00 "IOP_CKCERR_44,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x168)++0x03
line.long 0x00 "IOP_CKRHCNT_45,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x168)++0x03
line.long 0x00 "IOP_CKCERR_45,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x170)++0x03
line.long 0x00 "IOP_CKRHCNT_46,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x170)++0x03
line.long 0x00 "IOP_CKCERR_46,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x178)++0x03
line.long 0x00 "IOP_CKRHCNT_47,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x178)++0x03
line.long 0x00 "IOP_CKCERR_47,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x180)++0x03
line.long 0x00 "IOP_CKRHCNT_48,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x180)++0x03
line.long 0x00 "IOP_CKCERR_48,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x188)++0x03
line.long 0x00 "IOP_CKRHCNT_49,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x188)++0x03
line.long 0x00 "IOP_CKCERR_49,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x190)++0x03
line.long 0x00 "IOP_CKRHCNT_50,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x190)++0x03
line.long 0x00 "IOP_CKCERR_50,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x198)++0x03
line.long 0x00 "IOP_CKRHCNT_51,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x198)++0x03
line.long 0x00 "IOP_CKCERR_51,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1A0)++0x03
line.long 0x00 "IOP_CKRHCNT_52,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1A0)++0x03
line.long 0x00 "IOP_CKCERR_52,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1A8)++0x03
line.long 0x00 "IOP_CKRHCNT_53,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1A8)++0x03
line.long 0x00 "IOP_CKCERR_53,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1B0)++0x03
line.long 0x00 "IOP_CKRHCNT_54,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1B0)++0x03
line.long 0x00 "IOP_CKCERR_54,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1B8)++0x03
line.long 0x00 "IOP_CKRHCNT_55,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1B8)++0x03
line.long 0x00 "IOP_CKCERR_55,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1C0)++0x03
line.long 0x00 "IOP_CKRHCNT_56,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1C0)++0x03
line.long 0x00 "IOP_CKCERR_56,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1C8)++0x03
line.long 0x00 "IOP_CKRHCNT_57,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1C8)++0x03
line.long 0x00 "IOP_CKCERR_57,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1D0)++0x03
line.long 0x00 "IOP_CKRHCNT_58,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1D0)++0x03
line.long 0x00 "IOP_CKCERR_58,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1D8)++0x03
line.long 0x00 "IOP_CKRHCNT_59,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1D8)++0x03
line.long 0x00 "IOP_CKCERR_59,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1E0)++0x03
line.long 0x00 "IOP_CKRHCNT_60,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1E0)++0x03
line.long 0x00 "IOP_CKCERR_60,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1E8)++0x03
line.long 0x00 "IOP_CKRHCNT_61,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1E8)++0x03
line.long 0x00 "IOP_CKCERR_61,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1F0)++0x03
line.long 0x00 "IOP_CKRHCNT_62,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1F0)++0x03
line.long 0x00 "IOP_CKCERR_62,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x1F8)++0x03
line.long 0x00 "IOP_CKRHCNT_63,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x1F8)++0x03
line.long 0x00 "IOP_CKCERR_63,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x200)++0x03
line.long 0x00 "IOP_CKRHCNT_64,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x200)++0x03
line.long 0x00 "IOP_CKCERR_64,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x208)++0x03
line.long 0x00 "IOP_CKRHCNT_65,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x208)++0x03
line.long 0x00 "IOP_CKCERR_65,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x210)++0x03
line.long 0x00 "IOP_CKRHCNT_66,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x210)++0x03
line.long 0x00 "IOP_CKCERR_66,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x218)++0x03
line.long 0x00 "IOP_CKRHCNT_67,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x218)++0x03
line.long 0x00 "IOP_CKCERR_67,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x220)++0x03
line.long 0x00 "IOP_CKRHCNT_68,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x220)++0x03
line.long 0x00 "IOP_CKCERR_68,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x228)++0x03
line.long 0x00 "IOP_CKRHCNT_69,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x228)++0x03
line.long 0x00 "IOP_CKCERR_69,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x230)++0x03
line.long 0x00 "IOP_CKRHCNT_70,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x230)++0x03
line.long 0x00 "IOP_CKCERR_70,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x238)++0x03
line.long 0x00 "IOP_CKRHCNT_71,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x238)++0x03
line.long 0x00 "IOP_CKCERR_71,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x240)++0x03
line.long 0x00 "IOP_CKRHCNT_72,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x240)++0x03
line.long 0x00 "IOP_CKCERR_72,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x248)++0x03
line.long 0x00 "IOP_CKRHCNT_73,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x248)++0x03
line.long 0x00 "IOP_CKCERR_73,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x250)++0x03
line.long 0x00 "IOP_CKRHCNT_74,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x250)++0x03
line.long 0x00 "IOP_CKCERR_74,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x258)++0x03
line.long 0x00 "IOP_CKRHCNT_75,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x258)++0x03
line.long 0x00 "IOP_CKCERR_75,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x260)++0x03
line.long 0x00 "IOP_CKRHCNT_76,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x260)++0x03
line.long 0x00 "IOP_CKCERR_76,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x268)++0x03
line.long 0x00 "IOP_CKRHCNT_77,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x268)++0x03
line.long 0x00 "IOP_CKCERR_77,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x270)++0x03
line.long 0x00 "IOP_CKRHCNT_78,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x270)++0x03
line.long 0x00 "IOP_CKCERR_78,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x278)++0x03
line.long 0x00 "IOP_CKRHCNT_79,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x278)++0x03
line.long 0x00 "IOP_CKCERR_79,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x280)++0x03
line.long 0x00 "IOP_CKRHCNT_80,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x280)++0x03
line.long 0x00 "IOP_CKCERR_80,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x288)++0x03
line.long 0x00 "IOP_CKRHCNT_81,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x288)++0x03
line.long 0x00 "IOP_CKCERR_81,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x290)++0x03
line.long 0x00 "IOP_CKRHCNT_82,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x290)++0x03
line.long 0x00 "IOP_CKCERR_82,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x298)++0x03
line.long 0x00 "IOP_CKRHCNT_83,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x298)++0x03
line.long 0x00 "IOP_CKCERR_83,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2A0)++0x03
line.long 0x00 "IOP_CKRHCNT_84,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2A0)++0x03
line.long 0x00 "IOP_CKCERR_84,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2A8)++0x03
line.long 0x00 "IOP_CKRHCNT_85,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2A8)++0x03
line.long 0x00 "IOP_CKCERR_85,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2B0)++0x03
line.long 0x00 "IOP_CKRHCNT_86,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2B0)++0x03
line.long 0x00 "IOP_CKCERR_86,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2B8)++0x03
line.long 0x00 "IOP_CKRHCNT_87,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2B8)++0x03
line.long 0x00 "IOP_CKCERR_87,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2C0)++0x03
line.long 0x00 "IOP_CKRHCNT_88,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2C0)++0x03
line.long 0x00 "IOP_CKCERR_88,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2C8)++0x03
line.long 0x00 "IOP_CKRHCNT_89,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2C8)++0x03
line.long 0x00 "IOP_CKCERR_89,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2D0)++0x03
line.long 0x00 "IOP_CKRHCNT_90,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2D0)++0x03
line.long 0x00 "IOP_CKCERR_90,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2D8)++0x03
line.long 0x00 "IOP_CKRHCNT_91,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2D8)++0x03
line.long 0x00 "IOP_CKCERR_91,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2E0)++0x03
line.long 0x00 "IOP_CKRHCNT_92,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2E0)++0x03
line.long 0x00 "IOP_CKCERR_92,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2E8)++0x03
line.long 0x00 "IOP_CKRHCNT_93,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2E8)++0x03
line.long 0x00 "IOP_CKCERR_93,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2F0)++0x03
line.long 0x00 "IOP_CKRHCNT_94,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2F0)++0x03
line.long 0x00 "IOP_CKCERR_94,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x2F8)++0x03
line.long 0x00 "IOP_CKRHCNT_95,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x2F8)++0x03
line.long 0x00 "IOP_CKCERR_95,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x300)++0x03
line.long 0x00 "IOP_CKRHCNT_96,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x300)++0x03
line.long 0x00 "IOP_CKCERR_96,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x308)++0x03
line.long 0x00 "IOP_CKRHCNT_97,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x308)++0x03
line.long 0x00 "IOP_CKCERR_97,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x310)++0x03
line.long 0x00 "IOP_CKRHCNT_98,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x310)++0x03
line.long 0x00 "IOP_CKCERR_98,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x318)++0x03
line.long 0x00 "IOP_CKRHCNT_99,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x318)++0x03
line.long 0x00 "IOP_CKCERR_99,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x320)++0x03
line.long 0x00 "IOP_CKRHCNT_100,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x320)++0x03
line.long 0x00 "IOP_CKCERR_100,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x328)++0x03
line.long 0x00 "IOP_CKRHCNT_101,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x328)++0x03
line.long 0x00 "IOP_CKCERR_101,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x330)++0x03
line.long 0x00 "IOP_CKRHCNT_102,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x330)++0x03
line.long 0x00 "IOP_CKCERR_102,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x338)++0x03
line.long 0x00 "IOP_CKRHCNT_103,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x338)++0x03
line.long 0x00 "IOP_CKCERR_103,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x340)++0x03
line.long 0x00 "IOP_CKRHCNT_104,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x340)++0x03
line.long 0x00 "IOP_CKCERR_104,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x348)++0x03
line.long 0x00 "IOP_CKRHCNT_105,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x348)++0x03
line.long 0x00 "IOP_CKCERR_105,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x350)++0x03
line.long 0x00 "IOP_CKRHCNT_106,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x350)++0x03
line.long 0x00 "IOP_CKCERR_106,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x358)++0x03
line.long 0x00 "IOP_CKRHCNT_107,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x358)++0x03
line.long 0x00 "IOP_CKCERR_107,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x360)++0x03
line.long 0x00 "IOP_CKRHCNT_108,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x360)++0x03
line.long 0x00 "IOP_CKCERR_108,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x368)++0x03
line.long 0x00 "IOP_CKRHCNT_109,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x368)++0x03
line.long 0x00 "IOP_CKCERR_109,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x370)++0x03
line.long 0x00 "IOP_CKRHCNT_110,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x370)++0x03
line.long 0x00 "IOP_CKCERR_110,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x378)++0x03
line.long 0x00 "IOP_CKRHCNT_111,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x378)++0x03
line.long 0x00 "IOP_CKCERR_111,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x380)++0x03
line.long 0x00 "IOP_CKRHCNT_112,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x380)++0x03
line.long 0x00 "IOP_CKCERR_112,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x388)++0x03
line.long 0x00 "IOP_CKRHCNT_113,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x388)++0x03
line.long 0x00 "IOP_CKCERR_113,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x390)++0x03
line.long 0x00 "IOP_CKRHCNT_114,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x390)++0x03
line.long 0x00 "IOP_CKCERR_114,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x398)++0x03
line.long 0x00 "IOP_CKRHCNT_115,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x398)++0x03
line.long 0x00 "IOP_CKCERR_115,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3A0)++0x03
line.long 0x00 "IOP_CKRHCNT_116,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3A0)++0x03
line.long 0x00 "IOP_CKCERR_116,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3A8)++0x03
line.long 0x00 "IOP_CKRHCNT_117,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3A8)++0x03
line.long 0x00 "IOP_CKCERR_117,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3B0)++0x03
line.long 0x00 "IOP_CKRHCNT_118,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3B0)++0x03
line.long 0x00 "IOP_CKCERR_118,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3B8)++0x03
line.long 0x00 "IOP_CKRHCNT_119,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3B8)++0x03
line.long 0x00 "IOP_CKCERR_119,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3C0)++0x03
line.long 0x00 "IOP_CKRHCNT_120,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3C0)++0x03
line.long 0x00 "IOP_CKCERR_120,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3C8)++0x03
line.long 0x00 "IOP_CKRHCNT_121,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3C8)++0x03
line.long 0x00 "IOP_CKCERR_121,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3D0)++0x03
line.long 0x00 "IOP_CKRHCNT_122,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3D0)++0x03
line.long 0x00 "IOP_CKCERR_122,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3D8)++0x03
line.long 0x00 "IOP_CKRHCNT_123,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3D8)++0x03
line.long 0x00 "IOP_CKCERR_123,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3E0)++0x03
line.long 0x00 "IOP_CKRHCNT_124,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3E0)++0x03
line.long 0x00 "IOP_CKCERR_124,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3E8)++0x03
line.long 0x00 "IOP_CKRHCNT_125,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3E8)++0x03
line.long 0x00 "IOP_CKCERR_125,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3F0)++0x03
line.long 0x00 "IOP_CKRHCNT_126,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3F0)++0x03
line.long 0x00 "IOP_CKCERR_126,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x3F8)++0x03
line.long 0x00 "IOP_CKRHCNT_127,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x3F8)++0x03
line.long 0x00 "IOP_CKCERR_127,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x400)++0x03
line.long 0x00 "IOP_CKRHCNT_128,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x400)++0x03
line.long 0x00 "IOP_CKCERR_128,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x408)++0x03
line.long 0x00 "IOP_CKRHCNT_129,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x408)++0x03
line.long 0x00 "IOP_CKCERR_129,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x410)++0x03
line.long 0x00 "IOP_CKRHCNT_130,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x410)++0x03
line.long 0x00 "IOP_CKCERR_130,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x418)++0x03
line.long 0x00 "IOP_CKRHCNT_131,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x418)++0x03
line.long 0x00 "IOP_CKCERR_131,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x420)++0x03
line.long 0x00 "IOP_CKRHCNT_132,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x420)++0x03
line.long 0x00 "IOP_CKCERR_132,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x428)++0x03
line.long 0x00 "IOP_CKRHCNT_133,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x428)++0x03
line.long 0x00 "IOP_CKCERR_133,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x430)++0x03
line.long 0x00 "IOP_CKRHCNT_134,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x430)++0x03
line.long 0x00 "IOP_CKCERR_134,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x438)++0x03
line.long 0x00 "IOP_CKRHCNT_135,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x438)++0x03
line.long 0x00 "IOP_CKCERR_135,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x440)++0x03
line.long 0x00 "IOP_CKRHCNT_136,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x440)++0x03
line.long 0x00 "IOP_CKCERR_136,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x448)++0x03
line.long 0x00 "IOP_CKRHCNT_137,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x448)++0x03
line.long 0x00 "IOP_CKCERR_137,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x450)++0x03
line.long 0x00 "IOP_CKRHCNT_138,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x450)++0x03
line.long 0x00 "IOP_CKCERR_138,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x458)++0x03
line.long 0x00 "IOP_CKRHCNT_139,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x458)++0x03
line.long 0x00 "IOP_CKCERR_139,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x460)++0x03
line.long 0x00 "IOP_CKRHCNT_140,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x460)++0x03
line.long 0x00 "IOP_CKCERR_140,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x468)++0x03
line.long 0x00 "IOP_CKRHCNT_141,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x468)++0x03
line.long 0x00 "IOP_CKCERR_141,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x470)++0x03
line.long 0x00 "IOP_CKRHCNT_142,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x470)++0x03
line.long 0x00 "IOP_CKCERR_142,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x478)++0x03
line.long 0x00 "IOP_CKRHCNT_143,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x478)++0x03
line.long 0x00 "IOP_CKCERR_143,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x480)++0x03
line.long 0x00 "IOP_CKRHCNT_144,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x480)++0x03
line.long 0x00 "IOP_CKCERR_144,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x488)++0x03
line.long 0x00 "IOP_CKRHCNT_145,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x488)++0x03
line.long 0x00 "IOP_CKCERR_145,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x490)++0x03
line.long 0x00 "IOP_CKRHCNT_146,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x490)++0x03
line.long 0x00 "IOP_CKCERR_146,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x498)++0x03
line.long 0x00 "IOP_CKRHCNT_147,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x498)++0x03
line.long 0x00 "IOP_CKCERR_147,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4A0)++0x03
line.long 0x00 "IOP_CKRHCNT_148,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4A0)++0x03
line.long 0x00 "IOP_CKCERR_148,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4A8)++0x03
line.long 0x00 "IOP_CKRHCNT_149,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4A8)++0x03
line.long 0x00 "IOP_CKCERR_149,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4B0)++0x03
line.long 0x00 "IOP_CKRHCNT_150,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4B0)++0x03
line.long 0x00 "IOP_CKCERR_150,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4B8)++0x03
line.long 0x00 "IOP_CKRHCNT_151,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4B8)++0x03
line.long 0x00 "IOP_CKCERR_151,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4C0)++0x03
line.long 0x00 "IOP_CKRHCNT_152,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4C0)++0x03
line.long 0x00 "IOP_CKCERR_152,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4C8)++0x03
line.long 0x00 "IOP_CKRHCNT_153,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4C8)++0x03
line.long 0x00 "IOP_CKCERR_153,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4D0)++0x03
line.long 0x00 "IOP_CKRHCNT_154,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4D0)++0x03
line.long 0x00 "IOP_CKCERR_154,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4D8)++0x03
line.long 0x00 "IOP_CKRHCNT_155,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4D8)++0x03
line.long 0x00 "IOP_CKCERR_155,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4E0)++0x03
line.long 0x00 "IOP_CKRHCNT_156,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4E0)++0x03
line.long 0x00 "IOP_CKCERR_156,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4E8)++0x03
line.long 0x00 "IOP_CKRHCNT_157,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4E8)++0x03
line.long 0x00 "IOP_CKCERR_157,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4F0)++0x03
line.long 0x00 "IOP_CKRHCNT_158,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4F0)++0x03
line.long 0x00 "IOP_CKCERR_158,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x4F8)++0x03
line.long 0x00 "IOP_CKRHCNT_159,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x4F8)++0x03
line.long 0x00 "IOP_CKCERR_159,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x500)++0x03
line.long 0x00 "IOP_CKRHCNT_160,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x500)++0x03
line.long 0x00 "IOP_CKCERR_160,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x508)++0x03
line.long 0x00 "IOP_CKRHCNT_161,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x508)++0x03
line.long 0x00 "IOP_CKCERR_161,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x510)++0x03
line.long 0x00 "IOP_CKRHCNT_162,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x510)++0x03
line.long 0x00 "IOP_CKCERR_162,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x518)++0x03
line.long 0x00 "IOP_CKRHCNT_163,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x518)++0x03
line.long 0x00 "IOP_CKCERR_163,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x520)++0x03
line.long 0x00 "IOP_CKRHCNT_164,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x520)++0x03
line.long 0x00 "IOP_CKCERR_164,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x528)++0x03
line.long 0x00 "IOP_CKRHCNT_165,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x528)++0x03
line.long 0x00 "IOP_CKCERR_165,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x530)++0x03
line.long 0x00 "IOP_CKRHCNT_166,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x530)++0x03
line.long 0x00 "IOP_CKCERR_166,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x538)++0x03
line.long 0x00 "IOP_CKRHCNT_167,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x538)++0x03
line.long 0x00 "IOP_CKCERR_167,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x540)++0x03
line.long 0x00 "IOP_CKRHCNT_168,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x540)++0x03
line.long 0x00 "IOP_CKCERR_168,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x548)++0x03
line.long 0x00 "IOP_CKRHCNT_169,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x548)++0x03
line.long 0x00 "IOP_CKCERR_169,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x550)++0x03
line.long 0x00 "IOP_CKRHCNT_170,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x550)++0x03
line.long 0x00 "IOP_CKCERR_170,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x558)++0x03
line.long 0x00 "IOP_CKRHCNT_171,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x558)++0x03
line.long 0x00 "IOP_CKCERR_171,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x560)++0x03
line.long 0x00 "IOP_CKRHCNT_172,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x560)++0x03
line.long 0x00 "IOP_CKCERR_172,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x568)++0x03
line.long 0x00 "IOP_CKRHCNT_173,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x568)++0x03
line.long 0x00 "IOP_CKCERR_173,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x570)++0x03
line.long 0x00 "IOP_CKRHCNT_174,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x570)++0x03
line.long 0x00 "IOP_CKCERR_174,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x578)++0x03
line.long 0x00 "IOP_CKRHCNT_175,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x578)++0x03
line.long 0x00 "IOP_CKCERR_175,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x580)++0x03
line.long 0x00 "IOP_CKRHCNT_176,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x580)++0x03
line.long 0x00 "IOP_CKCERR_176,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x588)++0x03
line.long 0x00 "IOP_CKRHCNT_177,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x588)++0x03
line.long 0x00 "IOP_CKCERR_177,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x590)++0x03
line.long 0x00 "IOP_CKRHCNT_178,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x590)++0x03
line.long 0x00 "IOP_CKCERR_178,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x598)++0x03
line.long 0x00 "IOP_CKRHCNT_179,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x598)++0x03
line.long 0x00 "IOP_CKCERR_179,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5A0)++0x03
line.long 0x00 "IOP_CKRHCNT_180,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5A0)++0x03
line.long 0x00 "IOP_CKCERR_180,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5A8)++0x03
line.long 0x00 "IOP_CKRHCNT_181,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5A8)++0x03
line.long 0x00 "IOP_CKCERR_181,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5B0)++0x03
line.long 0x00 "IOP_CKRHCNT_182,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5B0)++0x03
line.long 0x00 "IOP_CKCERR_182,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5B8)++0x03
line.long 0x00 "IOP_CKRHCNT_183,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5B8)++0x03
line.long 0x00 "IOP_CKCERR_183,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5C0)++0x03
line.long 0x00 "IOP_CKRHCNT_184,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5C0)++0x03
line.long 0x00 "IOP_CKCERR_184,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5C8)++0x03
line.long 0x00 "IOP_CKRHCNT_185,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5C8)++0x03
line.long 0x00 "IOP_CKCERR_185,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5D0)++0x03
line.long 0x00 "IOP_CKRHCNT_186,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5D0)++0x03
line.long 0x00 "IOP_CKCERR_186,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5D8)++0x03
line.long 0x00 "IOP_CKRHCNT_187,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5D8)++0x03
line.long 0x00 "IOP_CKCERR_187,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5E0)++0x03
line.long 0x00 "IOP_CKRHCNT_188,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5E0)++0x03
line.long 0x00 "IOP_CKCERR_188,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5E8)++0x03
line.long 0x00 "IOP_CKRHCNT_189,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5E8)++0x03
line.long 0x00 "IOP_CKCERR_189,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5F0)++0x03
line.long 0x00 "IOP_CKRHCNT_190,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5F0)++0x03
line.long 0x00 "IOP_CKCERR_190,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x5F8)++0x03
line.long 0x00 "IOP_CKRHCNT_191,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x5F8)++0x03
line.long 0x00 "IOP_CKCERR_191,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x600)++0x03
line.long 0x00 "IOP_CKRHCNT_192,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x600)++0x03
line.long 0x00 "IOP_CKCERR_192,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x608)++0x03
line.long 0x00 "IOP_CKRHCNT_193,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x608)++0x03
line.long 0x00 "IOP_CKCERR_193,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x610)++0x03
line.long 0x00 "IOP_CKRHCNT_194,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x610)++0x03
line.long 0x00 "IOP_CKCERR_194,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x618)++0x03
line.long 0x00 "IOP_CKRHCNT_195,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x618)++0x03
line.long 0x00 "IOP_CKCERR_195,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x620)++0x03
line.long 0x00 "IOP_CKRHCNT_196,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x620)++0x03
line.long 0x00 "IOP_CKCERR_196,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x628)++0x03
line.long 0x00 "IOP_CKRHCNT_197,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x628)++0x03
line.long 0x00 "IOP_CKCERR_197,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x630)++0x03
line.long 0x00 "IOP_CKRHCNT_198,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x630)++0x03
line.long 0x00 "IOP_CKCERR_198,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x638)++0x03
line.long 0x00 "IOP_CKRHCNT_199,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x638)++0x03
line.long 0x00 "IOP_CKCERR_199,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x640)++0x03
line.long 0x00 "IOP_CKRHCNT_200,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x640)++0x03
line.long 0x00 "IOP_CKCERR_200,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x648)++0x03
line.long 0x00 "IOP_CKRHCNT_201,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x648)++0x03
line.long 0x00 "IOP_CKCERR_201,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x650)++0x03
line.long 0x00 "IOP_CKRHCNT_202,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x650)++0x03
line.long 0x00 "IOP_CKCERR_202,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x658)++0x03
line.long 0x00 "IOP_CKRHCNT_203,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x658)++0x03
line.long 0x00 "IOP_CKCERR_203,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x660)++0x03
line.long 0x00 "IOP_CKRHCNT_204,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x660)++0x03
line.long 0x00 "IOP_CKCERR_204,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x668)++0x03
line.long 0x00 "IOP_CKRHCNT_205,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x668)++0x03
line.long 0x00 "IOP_CKCERR_205,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x670)++0x03
line.long 0x00 "IOP_CKRHCNT_206,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x670)++0x03
line.long 0x00 "IOP_CKCERR_206,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x678)++0x03
line.long 0x00 "IOP_CKRHCNT_207,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x678)++0x03
line.long 0x00 "IOP_CKCERR_207,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x680)++0x03
line.long 0x00 "IOP_CKRHCNT_208,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x680)++0x03
line.long 0x00 "IOP_CKCERR_208,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x688)++0x03
line.long 0x00 "IOP_CKRHCNT_209,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x688)++0x03
line.long 0x00 "IOP_CKCERR_209,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x690)++0x03
line.long 0x00 "IOP_CKRHCNT_210,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x690)++0x03
line.long 0x00 "IOP_CKCERR_210,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x698)++0x03
line.long 0x00 "IOP_CKRHCNT_211,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x698)++0x03
line.long 0x00 "IOP_CKCERR_211,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6A0)++0x03
line.long 0x00 "IOP_CKRHCNT_212,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6A0)++0x03
line.long 0x00 "IOP_CKCERR_212,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6A8)++0x03
line.long 0x00 "IOP_CKRHCNT_213,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6A8)++0x03
line.long 0x00 "IOP_CKCERR_213,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6B0)++0x03
line.long 0x00 "IOP_CKRHCNT_214,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6B0)++0x03
line.long 0x00 "IOP_CKCERR_214,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6B8)++0x03
line.long 0x00 "IOP_CKRHCNT_215,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6B8)++0x03
line.long 0x00 "IOP_CKCERR_215,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6C0)++0x03
line.long 0x00 "IOP_CKRHCNT_216,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6C0)++0x03
line.long 0x00 "IOP_CKCERR_216,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6C8)++0x03
line.long 0x00 "IOP_CKRHCNT_217,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6C8)++0x03
line.long 0x00 "IOP_CKCERR_217,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6D0)++0x03
line.long 0x00 "IOP_CKRHCNT_218,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6D0)++0x03
line.long 0x00 "IOP_CKCERR_218,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6D8)++0x03
line.long 0x00 "IOP_CKRHCNT_219,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6D8)++0x03
line.long 0x00 "IOP_CKCERR_219,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6E0)++0x03
line.long 0x00 "IOP_CKRHCNT_220,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6E0)++0x03
line.long 0x00 "IOP_CKCERR_220,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6E8)++0x03
line.long 0x00 "IOP_CKRHCNT_221,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6E8)++0x03
line.long 0x00 "IOP_CKCERR_221,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6F0)++0x03
line.long 0x00 "IOP_CKRHCNT_222,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6F0)++0x03
line.long 0x00 "IOP_CKCERR_222,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x6F8)++0x03
line.long 0x00 "IOP_CKRHCNT_223,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x6F8)++0x03
line.long 0x00 "IOP_CKCERR_223,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x700)++0x03
line.long 0x00 "IOP_CKRHCNT_224,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x700)++0x03
line.long 0x00 "IOP_CKCERR_224,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x708)++0x03
line.long 0x00 "IOP_CKRHCNT_225,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x708)++0x03
line.long 0x00 "IOP_CKCERR_225,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x710)++0x03
line.long 0x00 "IOP_CKRHCNT_226,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x710)++0x03
line.long 0x00 "IOP_CKCERR_226,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x718)++0x03
line.long 0x00 "IOP_CKRHCNT_227,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x718)++0x03
line.long 0x00 "IOP_CKCERR_227,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x720)++0x03
line.long 0x00 "IOP_CKRHCNT_228,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x720)++0x03
line.long 0x00 "IOP_CKCERR_228,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x728)++0x03
line.long 0x00 "IOP_CKRHCNT_229,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x728)++0x03
line.long 0x00 "IOP_CKCERR_229,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x730)++0x03
line.long 0x00 "IOP_CKRHCNT_230,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x730)++0x03
line.long 0x00 "IOP_CKCERR_230,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x738)++0x03
line.long 0x00 "IOP_CKRHCNT_231,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x738)++0x03
line.long 0x00 "IOP_CKCERR_231,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x740)++0x03
line.long 0x00 "IOP_CKRHCNT_232,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x740)++0x03
line.long 0x00 "IOP_CKCERR_232,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x748)++0x03
line.long 0x00 "IOP_CKRHCNT_233,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x748)++0x03
line.long 0x00 "IOP_CKCERR_233,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x750)++0x03
line.long 0x00 "IOP_CKRHCNT_234,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x750)++0x03
line.long 0x00 "IOP_CKCERR_234,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x758)++0x03
line.long 0x00 "IOP_CKRHCNT_235,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x758)++0x03
line.long 0x00 "IOP_CKCERR_235,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x760)++0x03
line.long 0x00 "IOP_CKRHCNT_236,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x760)++0x03
line.long 0x00 "IOP_CKCERR_236,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x768)++0x03
line.long 0x00 "IOP_CKRHCNT_237,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x768)++0x03
line.long 0x00 "IOP_CKCERR_237,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x770)++0x03
line.long 0x00 "IOP_CKRHCNT_238,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x770)++0x03
line.long 0x00 "IOP_CKCERR_238,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x778)++0x03
line.long 0x00 "IOP_CKRHCNT_239,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x778)++0x03
line.long 0x00 "IOP_CKCERR_239,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x780)++0x03
line.long 0x00 "IOP_CKRHCNT_240,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x780)++0x03
line.long 0x00 "IOP_CKCERR_240,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x788)++0x03
line.long 0x00 "IOP_CKRHCNT_241,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x788)++0x03
line.long 0x00 "IOP_CKCERR_241,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x790)++0x03
line.long 0x00 "IOP_CKRHCNT_242,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x790)++0x03
line.long 0x00 "IOP_CKCERR_242,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x798)++0x03
line.long 0x00 "IOP_CKRHCNT_243,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x798)++0x03
line.long 0x00 "IOP_CKCERR_243,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7A0)++0x03
line.long 0x00 "IOP_CKRHCNT_244,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7A0)++0x03
line.long 0x00 "IOP_CKCERR_244,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7A8)++0x03
line.long 0x00 "IOP_CKRHCNT_245,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7A8)++0x03
line.long 0x00 "IOP_CKCERR_245,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7B0)++0x03
line.long 0x00 "IOP_CKRHCNT_246,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7B0)++0x03
line.long 0x00 "IOP_CKCERR_246,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7B8)++0x03
line.long 0x00 "IOP_CKRHCNT_247,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7B8)++0x03
line.long 0x00 "IOP_CKCERR_247,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7C0)++0x03
line.long 0x00 "IOP_CKRHCNT_248,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7C0)++0x03
line.long 0x00 "IOP_CKCERR_248,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7C8)++0x03
line.long 0x00 "IOP_CKRHCNT_249,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7C8)++0x03
line.long 0x00 "IOP_CKCERR_249,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7D0)++0x03
line.long 0x00 "IOP_CKRHCNT_250,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7D0)++0x03
line.long 0x00 "IOP_CKCERR_250,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7D8)++0x03
line.long 0x00 "IOP_CKRHCNT_251,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7D8)++0x03
line.long 0x00 "IOP_CKCERR_251,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7E0)++0x03
line.long 0x00 "IOP_CKRHCNT_252,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7E0)++0x03
line.long 0x00 "IOP_CKCERR_252,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7E8)++0x03
line.long 0x00 "IOP_CKRHCNT_253,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7E8)++0x03
line.long 0x00 "IOP_CKCERR_253,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7F0)++0x03
line.long 0x00 "IOP_CKRHCNT_254,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7F0)++0x03
line.long 0x00 "IOP_CKCERR_254,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
group.long (0x2000+0x7F8)++0x03
line.long 0x00 "IOP_CKRHCNT_255,CTLU Key Composition Rule Hit Counter Register"
group.long (0x2004+0x7F8)++0x03
line.long 0x00 "IOP_CKCERR_255,CTLU Key Composition Rule Error Register"
bitfld.long 0x00 1. " EOFHE ,Extract out of frame header error" "No error,Error"
bitfld.long 0x00 0. "  KSE ,Key size error" "No error,Error"
tree.end
width 14.
tree "CTLU Policer"
group.long 0x1C00++0x03
line.long 0x00 "IOP_CPLDROP0,Packet Counter Register 0"
group.long 0x1C04++0x03
line.long 0x00 "IOP_CPLDROP1,Packet Counter Register 1"
group.long 0x1C08++0x03
line.long 0x00 "IOP_CPLDROP2,Packet Counter Register 2"
group.long 0x1C0C++0x03
line.long 0x00 "IOP_CPLDROP3,Packet Counter Register 3"
group.long 0x1C10++0x03
line.long 0x00 "IOP_CPLDROP4,Packet Counter Register 4"
group.long 0x1C14++0x03
line.long 0x00 "IOP_CPLDROP5,Packet Counter Register 5"
group.long 0x1C18++0x03
line.long 0x00 "IOP_CPLDROP6,Packet Counter Register 6"
group.long 0x1C1C++0x03
line.long 0x00 "IOP_CPLDROP7,Packet Counter Register 7"
tree.end
endian.le
width 0x0B
tree.end
tree.end
endif
tree "SEC (Security and Encryption)"
base ad:0x08000000
width 8.
group.long 0x04++0x03
line.long 0x00 "MCFGR,Master Configuration Register"
bitfld.long 0x00 31. " SWRST       ,Software reset" "Normal,Reset"
bitfld.long 0x00 30. "                     WDE          ,DECO watchdog enable" "Disabled,Enabled"
bitfld.long 0x00 29. "         WDF        ,Watchdog fast" "Normal,Fast"
newline
bitfld.long 0x00 28. " DMA_RST     ,DMA reset" "No effect,Reset"
bitfld.long 0x00 27. "                  WRHD         ,Write handoff disable" "No,Yes"
bitfld.long 0x00 21. "              DJPC       ,Disable job performance counters" "No,Yes"
newline
bitfld.long 0x00 20. " DBPC        ,Disable byte performance counters" "No,Yes"
bitfld.long 0x00 17. "                        NSP          ,No snoop" "Snooped,Not snooped"
bitfld.long 0x00 16. "      PS         ,Pointer size" "32-bit,49-bit"
newline
bitfld.long 0x00 15. " ARCACHE[3]  ,Check for already cached" "Not cached,Cached"
bitfld.long 0x00 14. "                 [2]          ,Read data allocate recommended" "Not recommended,Recommended"
bitfld.long 0x00 13. "  [1]        ,Cacheable/Modifiable" "Not modified,Modified"
newline
bitfld.long 0x00 12. " [0]         ,Bufferable" "Not Fetched,Fetched"
bitfld.long 0x00 11. "                AWCACHE[3]   ,Write data allocate recommended" "Not recommended,Recommended"
bitfld.long 0x00 10. "  [2]        ,Check for already cached" "Not cached,Cached"
newline
bitfld.long 0x00 9. " [1]         ,Cacheable/Modifiable" "Not modified,Modified"
bitfld.long 0x00 8. "               [0]          ,Bufferable" "Not Generated,GEnerated"
bitfld.long 0x00 4.--7. "    AXIPIPE    ,AXI pipeline depth" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 2. " LARGE_BURST ,Enable large bursts" "Disabled,Enabled"
bitfld.long 0x00 0. "                   NORMAL_BURST ,Maximum burst size" "32 byte,64 byte"
group.long 0x0C++0x03
line.long 0x00 "SCFGR,Security Configuration Register"
rbitfld.long 0x00 28.--31. " MPCURVE     ,Manufacturing protection curve" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 27. "                         MPPKRC       ,Manufacturing protection private key register clear" "No effect,Clear"
bitfld.long 0x00 26. "        MPMRL      ,Manufacturing protection message register lock" "Not locked,Locked"
newline
bitfld.long 0x00 15. " VIRT_EN     ,Virtualization enable" "Disabled,Enabled"
bitfld.long 0x00 11. "                   LCK_TRNG     ,Lock TRNG program mode" "Not locked,Locked"
bitfld.long 0x00 10. "       RDB        ,Enable random data buffer" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " RNGSH0      ,Random number generator state handle 0" "Any mode,Not in deterministic mode"
bitfld.long 0x00 8. "  RANDDPAR     ,Random differential power analysis resistance (DPAR) mask" "Default seed,State Handle 0"
newline
bitfld.long 0x00 0.--1. " PRIBLOB     ,Private blob type during trusted mode selection" "Secure boot,Provisioning type 1,Provisioning type 2,Normal operation"
width 12.
tree "Job Ring ICID Registers"
if ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x80000000)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x80000000)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x00)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x00)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x80000000)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x80000000)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x00)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x10)&0x80000000)==0x00)
group.long 0x10++0x03
line.long 0x00 "JR0ICID_MS,Job Ring 0 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
endif
if ((per.l(ad:0x08000000+0x10)&0x80000000)==0x80000000)
rgroup.long (0x10+0x04)++0x03
line.long 0x00 "JR0ICID_LS,Job Ring 0 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
else
group.long (0x10+0x04)++0x03
line.long 0x00 "JR0ICID_LS,Job Ring 0 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
endif
if ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x80000000)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x80000000)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x00)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x00)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x80000000)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x80000000)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x00)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x18)&0x80000000)==0x00)
group.long 0x18++0x03
line.long 0x00 "JR1ICID_MS,Job Ring 1 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
endif
if ((per.l(ad:0x08000000+0x18)&0x80000000)==0x80000000)
rgroup.long (0x18+0x04)++0x03
line.long 0x00 "JR1ICID_LS,Job Ring 1 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
else
group.long (0x18+0x04)++0x03
line.long 0x00 "JR1ICID_LS,Job Ring 1 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
endif
if ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x80000000)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x80000000)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x00)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x00)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x80000000)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x80000000)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x00)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x20)&0x80000000)==0x00)
group.long 0x20++0x03
line.long 0x00 "JR2ICID_MS,Job Ring 2 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
endif
if ((per.l(ad:0x08000000+0x20)&0x80000000)==0x80000000)
rgroup.long (0x20+0x04)++0x03
line.long 0x00 "JR2ICID_LS,Job Ring 2 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
else
group.long (0x20+0x04)++0x03
line.long 0x00 "JR2ICID_LS,Job Ring 2 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
endif
if ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x80000000)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x80000000)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x00)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x8000)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x00)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x80000000)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x80000000)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
rbitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone secureworld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x20000)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x00)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
rbitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
elif ((per.l(ad:0x08000000+0x0C)&0x8000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x20000)==0x00)&&((per.l(ad:0x08000000+0x28)&0x80000000)==0x00)
group.long 0x28++0x03
line.long 0x00 "JR3ICID_MS,Job Ring 3 ICID Register - Most Significant Half"
bitfld.long 0x00 31. " LICID ,Lock ICID" "Not locked,Locked"
bitfld.long 0x00 17. "    LAMTD ,Lock AMTD" "Not locked,Locked"
bitfld.long 0x00 16. "  AMTD ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 15. " TZ    ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "      SDID  ,Security domain identifier"
endif
if ((per.l(ad:0x08000000+0x28)&0x80000000)==0x80000000)
rgroup.long (0x28+0x04)++0x03
line.long 0x00 "JR3ICID_LS,Job Ring 3 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
else
group.long (0x28+0x04)++0x03
line.long 0x00 "JR3ICID_LS,Job Ring 3 ICID Register - Least Significant Half"
bitfld.long 0x00 16. " BMT   ,Bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x00 15. "  PL    ,Privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "           ICID ,ICID"
endif
tree.end
newline
width 18.
group.long 0x50++0x03
line.long 0x00 "QISDID,Queue Manager Interface SDID Register"
bitfld.long 0x00 15. " TZ          ,TrustZone SecureWorld" "Disabled,Enabled"
hexmask.long.word 0x00 0.--11. 1. "       SDID      ,Security domain identifier"
group.long 0x58++0x03
line.long 0x00 "DEBUGCTL,Debug Control Register"
rbitfld.long 0x00 17. " STOP_ACK    ,Job queue controller stop acknowledge" "Not stopped,Stopped"
bitfld.long 0x00 16. "    STOP      ,Stop jobs processing request" "Not requested,Requested"
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0x5C++0x03
line.long 0x00 "JRSTARTR,Job Ring Start Register"
bitfld.long 0x00 3. " START_JR3   ,Start job ring 3" "Stop mode,Start mode"
bitfld.long 0x00 2. "     START_JR2 ,Start job ring 2" "Stop mode,Start mode"
newline
bitfld.long 0x00 1. " START_JR1   ,Start job ring 1" "Stop mode,Start mode"
bitfld.long 0x00 0. "     START_JR0 ,Start job ring 0" "Stop mode,Start mode"
else
rgroup.long 0x5C++0x03
line.long 0x00 "JRSTARTR,Job Ring Start Register"
bitfld.long 0x00 3. " START_JR3   ,Start job ring 3" "Stop mode,Start mode"
bitfld.long 0x00 2. "     START_JR2 ,Start job ring 2" "Stop mode,Start mode"
newline
bitfld.long 0x00 1. " START_JR1   ,Start job ring 1" "Stop mode,Start mode"
bitfld.long 0x00 0. "     START_JR0 ,Start job ring 0" "Stop mode,Start mode"
endif
group.long 0x60++0x07
line.long 0x00 "RTICAICID_MS,RTIC ICID Register For Block A"
bitfld.long 0x00 31. " LCK         ,RTIC ICID lock" "Not locked,Locked"
bitfld.long 0x00 30. "     TZCTL     ,TrustZone control" "Disabled,Enabled"
line.long 0x04 "RTICAICID_LS,RTIC ICID Register For Block A"
bitfld.long 0x04 16. " BMT         ,RTIC bypass memory translation" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              R_ICID    ,RTIC ICID"
group.long 0x68++0x07
line.long 0x00 "RTICBICID_MS,RTIC ICID Register For Block B"
bitfld.long 0x00 31. " LCK         ,RTIC ICID lock" "Not locked,Locked"
line.long 0x04 "RTICBICID_LS,RTIC ICID Register For Block B"
bitfld.long 0x04 16. " BMT         ,RTIC bypass memory translation" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              R_ICID    ,RTIC ICID"
group.long 0x70++0x07
line.long 0x00 "RTICCICID_MS,RTIC ICID Register For Block C"
bitfld.long 0x00 31. " LCK         ,RTIC ICID lock" "Not locked,Locked"
line.long 0x04 "RTICCICID_LS,RTIC ICID Register For Block C"
bitfld.long 0x04 16. " BMT         ,RTIC bypass memory translation" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              R_ICID    ,RTIC ICID"
group.long 0x78++0x07
line.long 0x00 "RTICDICID_MS,RTIC ICID Register For Block D"
bitfld.long 0x00 31. " LCK         ,RTIC ICID lock" "Not locked,Locked"
line.long 0x04 "RTICDICID_LS,RTIC ICID Register For Block D"
bitfld.long 0x04 16. " BMT         ,RTIC bypass memory translation" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              R_ICID    ,RTIC ICID"
group.long 0x84++0x03
line.long 0x00 "PROTCFG,Protocol Configuration Register"
bitfld.long 0x00 0. " IPSEC_CKSUM ,Configure the IPSEC checksum calculation" "Included,Not included"
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)||(((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x94++0x03
line.long 0x00 "DECORSR,DECO Request Source Register"
rbitfld.long 0x00 31. " VALID       ,Job ring number in JR field validity" "Invalid,Valid"
bitfld.long 0x00 0.--1. "        JR        ,Job ring number" "0,1,2,3"
else
rgroup.long 0x94++0x03
line.long 0x00 "DECORSR,DECO Request Source Register"
bitfld.long 0x00 31. " VALID       ,Job ring number in JR field validity" "Invalid,Valid"
bitfld.long 0x00 0.--1. "        JR        ,Job ring number" "0,1,2,3"
endif
if (((per.l(ad:0x08000000+0x94))&0x80000000)==0x80000000)
group.long 0x9C++0x03
line.long 0x00 "DECORR,DECO Request Register"
rbitfld.long 0x00 21. " DEN5        ,Permission for the software to directly access DECO 5/CCB 5 granted" "Not granted,Granted"
rbitfld.long 0x00 20. "    DEN4      ,Permission for the software to directly access DECO 4/CCB 4 granted" "Not granted,Granted"
rbitfld.long 0x00 19. "    DEN3      ,Permission for the software to directly access DECO 3/CCB 3 granted" "Not granted,Granted"
newline
rbitfld.long 0x00 18. " DEN2        ,Permission for the software to directly access DECO 2/CCB 2 granted" "Not granted,Granted"
rbitfld.long 0x00 17. "    DEN1      ,Permission for the software to directly access DECO 1/CCB 1 granted" "Not granted,Granted"
rbitfld.long 0x00 16. "    DEN0      ,Permission for the software to directly access DECO 0/CCB 0 granted" "Not granted,Granted"
newline
bitfld.long 0x00 5. " RQD5        ,Direct access to DECO 5/CCB 5 request" "Not requested,Requested"
bitfld.long 0x00 4. "  RQD4      ,Direct access to DECO 4/CCB 4 request" "Not requested,Requested"
bitfld.long 0x00 3. "  RQD3      ,Direct access to DECO 3/CCB 3 request" "Not requested,Requested"
newline
bitfld.long 0x00 2. " RQD2        ,Direct access to DECO 2/CCB 2 request" "Not requested,Requested"
bitfld.long 0x00 1. "  RQD1      ,Direct access to DECO 1/CCB 1 request" "Not requested,Requested"
bitfld.long 0x00 0. "  RQD0      ,Direct access to DECO 0/CCB 0 request" "Not requested,Requested"
else
rgroup.long 0x9C++0x03
line.long 0x00 "DECORR,DECO Request Register"
bitfld.long 0x00 21. " DEN5        ,Permission for the software to directly access DECO 5/CCB 5 granted" "Not granted,Granted"
bitfld.long 0x00 20. "    DEN4      ,Permission for the software to directly access DECO 4/CCB 4 granted" "Not granted,Granted"
bitfld.long 0x00 19. "    DEN3      ,Permission for the software to directly access DECO 3/CCB 3 granted" "Not granted,Granted"
newline
bitfld.long 0x00 18. " DEN2        ,Permission for the software to directly access DECO 2/CCB 2 granted" "Not granted,Granted"
bitfld.long 0x00 17. "    DEN1      ,Permission for the software to directly access DECO 1/CCB 1 granted" "Not granted,Granted"
bitfld.long 0x00 16. "    DEN0      ,Permission for the software to directly access DECO 0/CCB 0 granted" "Not granted,Granted"
newline
bitfld.long 0x00 5. " RQD5        ,Direct access to DECO 5/CCB 5 request" "Not requested,Requested"
bitfld.long 0x00 4. "  RQD4      ,Direct access to DECO 4/CCB 4 request" "Not requested,Requested"
bitfld.long 0x00 3. "  RQD3      ,Direct access to DECO 3/CCB 3 request" "Not requested,Requested"
newline
bitfld.long 0x00 2. " RQD2        ,Direct access to DECO 2/CCB 2 request" "Not requested,Requested"
bitfld.long 0x00 1. "  RQD1      ,Direct access to DECO 1/CCB 1 request" "Not requested,Requested"
bitfld.long 0x00 0. "  RQD0      ,Direct access to DECO 0/CCB 0 request" "Not requested,Requested"
endif
tree "DECO ICID Registers"
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xA0++0x07
line.long 0x00 "DECO0ICID_MS,DECO0 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO0ICID_LS,DECO0 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xA0++0x07
line.long 0x00 "DECO0ICID_MS,DECO0 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO0ICID_LS,DECO0 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xA8++0x07
line.long 0x00 "DECO1ICID_MS,DECO1 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO1ICID_LS,DECO1 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xA8++0x07
line.long 0x00 "DECO1ICID_MS,DECO1 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO1ICID_LS,DECO1 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xB0++0x07
line.long 0x00 "DECO2ICID_MS,DECO2 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO2ICID_LS,DECO2 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xB0++0x07
line.long 0x00 "DECO2ICID_MS,DECO2 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO2ICID_LS,DECO2 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xB8++0x07
line.long 0x00 "DECO3ICID_MS,DECO3 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO3ICID_LS,DECO3 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xB8++0x07
line.long 0x00 "DECO3ICID_MS,DECO3 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO3ICID_LS,DECO3 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xC0++0x07
line.long 0x00 "DECO4ICID_MS,DECO4 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO4ICID_LS,DECO4 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xC0++0x07
line.long 0x00 "DECO4ICID_MS,DECO4 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO4ICID_LS,DECO4 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
if (((per.l(ad:0x08000000+0x0C))&0x8000)==0x8000)
group.long 0xC8++0x07
line.long 0x00 "DECO5ICID_MS,DECO5 ICID Most Significant Half Register"
rbitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO5ICID_LS,DECO5 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
else
group.long 0xC8++0x07
line.long 0x00 "DECO5ICID_MS,DECO5 ICID Most Significant Half Register"
bitfld.long 0x00 31. " LCK         ,Lock" "Not locked,Locked"
line.long 0x04 "DECO5ICID_LS,DECO5 ICID Least Significant Half Register"
bitfld.long 0x04 16. " DBMT        ,DECO bypass memory translation" "Not bypassed,Bypassed"
bitfld.long 0x04 15. "   DPL       ,DECO privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              D_ICID    ,ICID"
endif
tree.end
newline
group.long 0x120++0x03
line.long 0x00 "DAR,DECO Availability Register"
bitfld.long 0x00 5. " NYA5        ,Start polling for the availability of DECO 5" "Not started,Started"
bitfld.long 0x00 4. "    NYA4      ,Start polling for the availability of DECO 4" "Not started,Started"
bitfld.long 0x00 3. "    NYA3      ,Start polling for the availability of DECO 3" "Not started,Started"
newline
bitfld.long 0x00 2. " NYA2        ,Start polling for the availability of DECO 2" "Not started,Started"
bitfld.long 0x00 1. "    NYA1      ,Start polling for the availability of DECO 1" "Not started,Started"
bitfld.long 0x00 0. "    NYA0      ,Start polling for the availability of DECO 0" "Not started,Started"
wgroup.long 0x124++0x03
line.long 0x00 "DRR,DECO Reset Register"
bitfld.long 0x00 5. " RST5        ,Soft reset of DECO 5" "No reset,Reset"
bitfld.long 0x00 4. "       RST4      ,Soft reset of DECO 4" "No reset,Reset"
bitfld.long 0x00 3. "       RST3      ,Soft reset of DECO 3" "No reset,Reset"
newline
bitfld.long 0x00 2. " RST2        ,Soft reset of DECO 2" "No reset,Reset"
bitfld.long 0x00 1. "       RST1      ,Soft reset of DECO 1" "No reset,Reset"
bitfld.long 0x00 0. "       RST0      ,Soft reset of DECO 0" "No reset,Reset"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
rgroup.long 0x1F0++0x03
line.long 0x00 "ARRR,Adaptive Resource Reservation Register"
bitfld.long 0x00 31. " AR_EN       ,Adaptive resource reservation enable" "Disabled,Enabled"
bitfld.long 0x00 16.--18. "       AR_MIN    ,Minimum number of DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 8.--10. " AR_DELTA    ,Number of additional DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "              AR_MAX    ,Maximum number of DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
else
group.long 0x1F0++0x03
line.long 0x00 "ARRR,Adaptive Resource Reservation Register"
bitfld.long 0x00 31. " AR_EN       ,Adaptive resource reservation enable" "Disabled,Enabled"
bitfld.long 0x00 16.--18. "       AR_MIN    ,Minimum number of DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 8.--10. " AR_DELTA    ,Number of additional DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--2. "              AR_MAX    ,Maximum number of DECOs to be reserved for use by AI" "0,1,2,3,4,5,6,7"
endif
group.long 0x204++0x03
line.long 0x00 "DMAC,DMA Control Register"
bitfld.long 0x00 8. " DAI         ,DMA access index" "0,1"
bitfld.long 0x00 1. "              WSE       ,Write safe enable" "Disabled,Enabled"
bitfld.long 0x00 0. "       RSE       ,Read safe enable" "Disabled,Enabled"
group.long 0x504++0x03
line.long 0x00 "DMA_CTRL,DMA Control Register"
bitfld.long 0x00 8. " DAI         ,DMA access index" "0,1"
bitfld.long 0x00 1. "              WSE       ,Write safe enable" "Disabled,Enabled"
bitfld.long 0x00 0. "       RSE       ,Read safe enable" "Disabled,Enabled"
group.long 0x220++0x03
line.long 0x00 "PBSL,Peak Bandwidth Smoothing Limit Register"
hexmask.long.byte 0x00 0.--6. 1. " PBSL        ,Read safe enable"
width 17.
tree "DMA AXI ID Mapping Low Registers"
rgroup.long 0x240++0x13
line.long 0x00 "DMA0AIDL_MAP_MS,Mapping For DMA AXI IDs 7-4"
hexmask.long.byte 0x00 24.--31. 1. " AID7_BID  ,SEC block ID using AXI ID 7"
hexmask.long.byte 0x00 16.--23. 1. "        AID6_BID  ,SEC block ID using AXI ID 6"
hexmask.long.byte 0x00 8.--15. 1. "        AID5_BID  ,SEC block ID using AXI ID 5"
newline
hexmask.long.byte 0x00 0.--7. 1. " AID4_BID  ,SEC block ID using AXI ID 4"
line.long 0x04 "DMA0AIDL_MAP_LS,Mapping For DMA AXI IDs 3-0"
hexmask.long.byte 0x04 24.--31. 1. " AID3_BID  ,SEC block ID using AXI ID 3"
hexmask.long.byte 0x04 16.--23. 1. "        AID2_BID  ,SEC block ID using AXI ID 2"
hexmask.long.byte 0x04 8.--15. 1. "        AID1_BID  ,SEC block ID using AXI ID 1"
newline
hexmask.long.byte 0x04 0.--7. 1. " AID0_BID  ,SEC block ID using AXI ID 0"
line.long 0x08 "DMA0AIDM_MAP_MS,Mapping For DMA AXI IDs 15-12"
hexmask.long.byte 0x08 24.--31. 1. " AID15_BID ,SEC block ID using AXI ID 15"
hexmask.long.byte 0x08 16.--23. 1. "        AID14_BID ,SEC block ID using AXI ID 14"
hexmask.long.byte 0x08 8.--15. 1. "        AID13_BID ,SEC block ID using AXI ID 13"
newline
hexmask.long.byte 0x08 0.--7. 1. " AID12_BID ,SEC block ID using AXI ID 12"
line.long 0x0C "DMA0AIDM_MAP_LS,Mapping For DMA AXI IDs 11-8"
hexmask.long.byte 0x0C 24.--31. 1. " AID11_BID ,SEC block ID using AXI ID 11"
hexmask.long.byte 0x0C 16.--23. 1. "        AID10_BID ,SEC block ID using AXI ID 10"
hexmask.long.byte 0x0C 8.--15. 1. "        AID9_BID  ,SEC block ID using AXI ID 9"
newline
hexmask.long.byte 0x0C 0.--7. 1. " AID8_BID  ,SEC block ID using AXI ID 8"
line.long 0x10 "DMA0_AID_ENB,DMA0 AXI ID Enable Register"
bitfld.long 0x10 15. " AID15E    ,AXI ID 15 enable" "Disabled,Enabled"
bitfld.long 0x10 14. "  AID14E    ,AXI ID 14 enable" "Disabled,Enabled"
bitfld.long 0x10 13. "  AID13E    ,AXI ID 13 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 12. " AID12E    ,AXI ID 12 enable" "Disabled,Enabled"
bitfld.long 0x10 11. "  AID11E    ,AXI ID 11 enable" "Disabled,Enabled"
bitfld.long 0x10 10. "  AID10E    ,AXI ID 10 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 9. " AID9E     ,AXI ID 9 enable" "Disabled,Enabled"
bitfld.long 0x10 8. "  AID8E     ,AXI ID 8 enable" "Disabled,Enabled"
bitfld.long 0x10 7. "  AID7E     ,AXI ID 7 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 6. " AID6E     ,AXI ID 6 enable" "Disabled,Enabled"
bitfld.long 0x10 5. "  AID5E     ,AXI ID 5 enable" "Disabled,Enabled"
bitfld.long 0x10 4. "  AID4E     ,AXI ID 4 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 3. " AID3E     ,AXI ID 3 enable" "Disabled,Enabled"
bitfld.long 0x10 2. "  AID2E     ,AXI ID 2 enable" "Disabled,Enabled"
bitfld.long 0x10 1. "  AID1E     ,AXI ID 1 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 0. " AID0E     ,AXI ID 0 enable" "Disabled,Enabled"
newline
group.quad (0x240+0x20)++0x07
line.quad 0x00 "DMA0_ARD_TC,DMA0 AXI Read Timing Check Register"
bitfld.quad 0x00 63. " ARTCE    ,AXI read timing check enable" "Disabled,Enabled"
bitfld.quad 0x00 62. "  ARCT     ,AXI read counter test" "No test,Test"
bitfld.quad 0x00 61. "   ARTT     ,AXI read timer test" "No test,Test"
newline
bitfld.quad 0x00 60. " ARTL     ,AXI read timer last" "First,Last"
hexmask.quad.word 0x00 48.--59. 1. "     ARL      ,AXI read limit"
hexmask.quad.tbyte 0x00 24.--43. 1. "      ARLC     ,AXI read late count"
newline
hexmask.quad.tbyte 0x00 0.--19. 1. " ARSC     ,AXI read sample count"
if (((per.l(ad:0x08000000+0x240+0x20))&0x8000000000000000)==0x00)
group.long (0x240+0x2C)++0x03
line.long 0x00 "DMA0_ARD_LAT,DMA0 Read Timing Check Latency Register"
else
rgroup.long (0x240+0x2C)++0x03
line.long 0x00 "DMA0_ARD_LAT,DMA0 Read Timing Check Latency Register"
endif
group.quad (0x240+0x30)++0x07
line.quad 0x00 "DMA0_AWR_TC,DMA0 AXI Write Timing Check Register"
bitfld.quad 0x00 63. " AWTCE    ,AXI write timing check enable" "Disabled,Enabled"
bitfld.quad 0x00 62. "  AWCT     ,AXI write counter test" "No test,Test"
newline
bitfld.quad 0x00 61. " AWTT     ,AXI write timer test" "No test,Test"
hexmask.quad.word 0x00 48.--59. 1. "   AWL      ,AXI write limit"
newline
hexmask.quad.tbyte 0x00 24.--43. 1. " AWLC     ,AXI write late count"
hexmask.quad.tbyte 0x00 0.--19. 1. "    AWSC     ,AXI write sample count"
if (((per.l(ad:0x08000000+0x240+0x30))&0x8000000000000000)==0x00)
group.long (0x240+0x3C)++0x03
line.long 0x00 "DMA0_AWR_LAT,DMA0 Write Timing Check Latency Register"
else
rgroup.long (0x240+0x3C)++0x03
line.long 0x00 "DMA0_AWR_LAT,DMA0 Write Timing Check Latency Register"
endif
rgroup.long 0x280++0x13
line.long 0x00 "DMA1AIDL_MAP_MS,Mapping For DMA AXI IDs 7-4"
hexmask.long.byte 0x00 24.--31. 1. " AID7_BID  ,SEC block ID using AXI ID 7"
hexmask.long.byte 0x00 16.--23. 1. "        AID6_BID  ,SEC block ID using AXI ID 6"
hexmask.long.byte 0x00 8.--15. 1. "        AID5_BID  ,SEC block ID using AXI ID 5"
newline
hexmask.long.byte 0x00 0.--7. 1. " AID4_BID  ,SEC block ID using AXI ID 4"
line.long 0x04 "DMA1AIDL_MAP_LS,Mapping For DMA AXI IDs 3-0"
hexmask.long.byte 0x04 24.--31. 1. " AID3_BID  ,SEC block ID using AXI ID 3"
hexmask.long.byte 0x04 16.--23. 1. "        AID2_BID  ,SEC block ID using AXI ID 2"
hexmask.long.byte 0x04 8.--15. 1. "        AID1_BID  ,SEC block ID using AXI ID 1"
newline
hexmask.long.byte 0x04 0.--7. 1. " AID0_BID  ,SEC block ID using AXI ID 0"
line.long 0x08 "DMA1AIDM_MAP_MS,Mapping For DMA AXI IDs 15-12"
hexmask.long.byte 0x08 24.--31. 1. " AID15_BID ,SEC block ID using AXI ID 15"
hexmask.long.byte 0x08 16.--23. 1. "        AID14_BID ,SEC block ID using AXI ID 14"
hexmask.long.byte 0x08 8.--15. 1. "        AID13_BID ,SEC block ID using AXI ID 13"
newline
hexmask.long.byte 0x08 0.--7. 1. " AID12_BID ,SEC block ID using AXI ID 12"
line.long 0x0C "DMA1AIDM_MAP_LS,Mapping For DMA AXI IDs 11-8"
hexmask.long.byte 0x0C 24.--31. 1. " AID11_BID ,SEC block ID using AXI ID 11"
hexmask.long.byte 0x0C 16.--23. 1. "        AID10_BID ,SEC block ID using AXI ID 10"
hexmask.long.byte 0x0C 8.--15. 1. "        AID9_BID  ,SEC block ID using AXI ID 9"
newline
hexmask.long.byte 0x0C 0.--7. 1. " AID8_BID  ,SEC block ID using AXI ID 8"
line.long 0x10 "DMA1_AID_ENB,DMA1 AXI ID Enable Register"
bitfld.long 0x10 15. " AID15E    ,AXI ID 15 enable" "Disabled,Enabled"
bitfld.long 0x10 14. "  AID14E    ,AXI ID 14 enable" "Disabled,Enabled"
bitfld.long 0x10 13. "  AID13E    ,AXI ID 13 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 12. " AID12E    ,AXI ID 12 enable" "Disabled,Enabled"
bitfld.long 0x10 11. "  AID11E    ,AXI ID 11 enable" "Disabled,Enabled"
bitfld.long 0x10 10. "  AID10E    ,AXI ID 10 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 9. " AID9E     ,AXI ID 9 enable" "Disabled,Enabled"
bitfld.long 0x10 8. "  AID8E     ,AXI ID 8 enable" "Disabled,Enabled"
bitfld.long 0x10 7. "  AID7E     ,AXI ID 7 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 6. " AID6E     ,AXI ID 6 enable" "Disabled,Enabled"
bitfld.long 0x10 5. "  AID5E     ,AXI ID 5 enable" "Disabled,Enabled"
bitfld.long 0x10 4. "  AID4E     ,AXI ID 4 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 3. " AID3E     ,AXI ID 3 enable" "Disabled,Enabled"
bitfld.long 0x10 2. "  AID2E     ,AXI ID 2 enable" "Disabled,Enabled"
bitfld.long 0x10 1. "  AID1E     ,AXI ID 1 enable" "Disabled,Enabled"
newline
bitfld.long 0x10 0. " AID0E     ,AXI ID 0 enable" "Disabled,Enabled"
newline
group.quad (0x280+0x20)++0x07
line.quad 0x00 "DMA1_ARD_TC,DMA1 AXI Read Timing Check Register"
bitfld.quad 0x00 63. " ARTCE    ,AXI read timing check enable" "Disabled,Enabled"
bitfld.quad 0x00 62. "  ARCT     ,AXI read counter test" "No test,Test"
bitfld.quad 0x00 61. "   ARTT     ,AXI read timer test" "No test,Test"
newline
bitfld.quad 0x00 60. " ARTL     ,AXI read timer last" "First,Last"
hexmask.quad.word 0x00 48.--59. 1. "     ARL      ,AXI read limit"
hexmask.quad.tbyte 0x00 24.--43. 1. "      ARLC     ,AXI read late count"
newline
hexmask.quad.tbyte 0x00 0.--19. 1. " ARSC     ,AXI read sample count"
if (((per.l(ad:0x08000000+0x280+0x20))&0x8000000000000000)==0x00)
group.long (0x280+0x2C)++0x03
line.long 0x00 "DMA1_ARD_LAT,DMA1 Read Timing Check Latency Register"
else
rgroup.long (0x280+0x2C)++0x03
line.long 0x00 "DMA1_ARD_LAT,DMA1 Read Timing Check Latency Register"
endif
group.quad (0x280+0x30)++0x07
line.quad 0x00 "DMA1_AWR_TC,DMA1 AXI Write Timing Check Register"
bitfld.quad 0x00 63. " AWTCE    ,AXI write timing check enable" "Disabled,Enabled"
bitfld.quad 0x00 62. "  AWCT     ,AXI write counter test" "No test,Test"
newline
bitfld.quad 0x00 61. " AWTT     ,AXI write timer test" "No test,Test"
hexmask.quad.word 0x00 48.--59. 1. "   AWL      ,AXI write limit"
newline
hexmask.quad.tbyte 0x00 24.--43. 1. " AWLC     ,AXI write late count"
hexmask.quad.tbyte 0x00 0.--19. 1. "    AWSC     ,AXI write sample count"
if (((per.l(ad:0x08000000+0x280+0x30))&0x8000000000000000)==0x00)
group.long (0x280+0x3C)++0x03
line.long 0x00 "DMA1_AWR_LAT,DMA1 Write Timing Check Latency Register"
else
rgroup.long (0x280+0x3C)++0x03
line.long 0x00 "DMA1_AWR_LAT,DMA1 Write Timing Check Latency Register"
endif
tree.end
width 10.
tree "Manufacturing Protection Registers"
group.byte 0x300++0x00
line.byte 0x00 "MPPKR0,Manufacturing Protection Private Key Register"
group.byte 0x301++0x00
line.byte 0x00 "MPPKR1,Manufacturing Protection Private Key Register"
group.byte 0x302++0x00
line.byte 0x00 "MPPKR2,Manufacturing Protection Private Key Register"
group.byte 0x303++0x00
line.byte 0x00 "MPPKR3,Manufacturing Protection Private Key Register"
group.byte 0x304++0x00
line.byte 0x00 "MPPKR4,Manufacturing Protection Private Key Register"
group.byte 0x305++0x00
line.byte 0x00 "MPPKR5,Manufacturing Protection Private Key Register"
group.byte 0x306++0x00
line.byte 0x00 "MPPKR6,Manufacturing Protection Private Key Register"
group.byte 0x307++0x00
line.byte 0x00 "MPPKR7,Manufacturing Protection Private Key Register"
group.byte 0x308++0x00
line.byte 0x00 "MPPKR8,Manufacturing Protection Private Key Register"
group.byte 0x309++0x00
line.byte 0x00 "MPPKR9,Manufacturing Protection Private Key Register"
group.byte 0x30A++0x00
line.byte 0x00 "MPPKR10,Manufacturing Protection Private Key Register"
group.byte 0x30B++0x00
line.byte 0x00 "MPPKR11,Manufacturing Protection Private Key Register"
group.byte 0x30C++0x00
line.byte 0x00 "MPPKR12,Manufacturing Protection Private Key Register"
group.byte 0x30D++0x00
line.byte 0x00 "MPPKR13,Manufacturing Protection Private Key Register"
group.byte 0x30E++0x00
line.byte 0x00 "MPPKR14,Manufacturing Protection Private Key Register"
group.byte 0x30F++0x00
line.byte 0x00 "MPPKR15,Manufacturing Protection Private Key Register"
group.byte 0x310++0x00
line.byte 0x00 "MPPKR16,Manufacturing Protection Private Key Register"
group.byte 0x311++0x00
line.byte 0x00 "MPPKR17,Manufacturing Protection Private Key Register"
group.byte 0x312++0x00
line.byte 0x00 "MPPKR18,Manufacturing Protection Private Key Register"
group.byte 0x313++0x00
line.byte 0x00 "MPPKR19,Manufacturing Protection Private Key Register"
group.byte 0x314++0x00
line.byte 0x00 "MPPKR20,Manufacturing Protection Private Key Register"
group.byte 0x315++0x00
line.byte 0x00 "MPPKR21,Manufacturing Protection Private Key Register"
group.byte 0x316++0x00
line.byte 0x00 "MPPKR22,Manufacturing Protection Private Key Register"
group.byte 0x317++0x00
line.byte 0x00 "MPPKR23,Manufacturing Protection Private Key Register"
group.byte 0x318++0x00
line.byte 0x00 "MPPKR24,Manufacturing Protection Private Key Register"
group.byte 0x319++0x00
line.byte 0x00 "MPPKR25,Manufacturing Protection Private Key Register"
group.byte 0x31A++0x00
line.byte 0x00 "MPPKR26,Manufacturing Protection Private Key Register"
group.byte 0x31B++0x00
line.byte 0x00 "MPPKR27,Manufacturing Protection Private Key Register"
group.byte 0x31C++0x00
line.byte 0x00 "MPPKR28,Manufacturing Protection Private Key Register"
group.byte 0x31D++0x00
line.byte 0x00 "MPPKR29,Manufacturing Protection Private Key Register"
group.byte 0x31E++0x00
line.byte 0x00 "MPPKR30,Manufacturing Protection Private Key Register"
group.byte 0x31F++0x00
line.byte 0x00 "MPPKR31,Manufacturing Protection Private Key Register"
group.byte 0x320++0x00
line.byte 0x00 "MPPKR32,Manufacturing Protection Private Key Register"
group.byte 0x321++0x00
line.byte 0x00 "MPPKR33,Manufacturing Protection Private Key Register"
group.byte 0x322++0x00
line.byte 0x00 "MPPKR34,Manufacturing Protection Private Key Register"
group.byte 0x323++0x00
line.byte 0x00 "MPPKR35,Manufacturing Protection Private Key Register"
group.byte 0x324++0x00
line.byte 0x00 "MPPKR36,Manufacturing Protection Private Key Register"
group.byte 0x325++0x00
line.byte 0x00 "MPPKR37,Manufacturing Protection Private Key Register"
group.byte 0x326++0x00
line.byte 0x00 "MPPKR38,Manufacturing Protection Private Key Register"
group.byte 0x327++0x00
line.byte 0x00 "MPPKR39,Manufacturing Protection Private Key Register"
group.byte 0x328++0x00
line.byte 0x00 "MPPKR40,Manufacturing Protection Private Key Register"
group.byte 0x329++0x00
line.byte 0x00 "MPPKR41,Manufacturing Protection Private Key Register"
group.byte 0x32A++0x00
line.byte 0x00 "MPPKR42,Manufacturing Protection Private Key Register"
group.byte 0x32B++0x00
line.byte 0x00 "MPPKR43,Manufacturing Protection Private Key Register"
group.byte 0x32C++0x00
line.byte 0x00 "MPPKR44,Manufacturing Protection Private Key Register"
group.byte 0x32D++0x00
line.byte 0x00 "MPPKR45,Manufacturing Protection Private Key Register"
group.byte 0x32E++0x00
line.byte 0x00 "MPPKR46,Manufacturing Protection Private Key Register"
group.byte 0x32F++0x00
line.byte 0x00 "MPPKR47,Manufacturing Protection Private Key Register"
group.byte 0x330++0x00
line.byte 0x00 "MPPKR48,Manufacturing Protection Private Key Register"
group.byte 0x331++0x00
line.byte 0x00 "MPPKR49,Manufacturing Protection Private Key Register"
group.byte 0x332++0x00
line.byte 0x00 "MPPKR50,Manufacturing Protection Private Key Register"
group.byte 0x333++0x00
line.byte 0x00 "MPPKR51,Manufacturing Protection Private Key Register"
group.byte 0x334++0x00
line.byte 0x00 "MPPKR52,Manufacturing Protection Private Key Register"
group.byte 0x335++0x00
line.byte 0x00 "MPPKR53,Manufacturing Protection Private Key Register"
group.byte 0x336++0x00
line.byte 0x00 "MPPKR54,Manufacturing Protection Private Key Register"
group.byte 0x337++0x00
line.byte 0x00 "MPPKR55,Manufacturing Protection Private Key Register"
group.byte 0x338++0x00
line.byte 0x00 "MPPKR56,Manufacturing Protection Private Key Register"
group.byte 0x339++0x00
line.byte 0x00 "MPPKR57,Manufacturing Protection Private Key Register"
group.byte 0x33A++0x00
line.byte 0x00 "MPPKR58,Manufacturing Protection Private Key Register"
group.byte 0x33B++0x00
line.byte 0x00 "MPPKR59,Manufacturing Protection Private Key Register"
group.byte 0x33C++0x00
line.byte 0x00 "MPPKR60,Manufacturing Protection Private Key Register"
group.byte 0x33D++0x00
line.byte 0x00 "MPPKR61,Manufacturing Protection Private Key Register"
group.byte 0x33E++0x00
line.byte 0x00 "MPPKR62,Manufacturing Protection Private Key Register"
group.byte 0x33F++0x00
line.byte 0x00 "MPPKR63,Manufacturing Protection Private Key Register"
group.byte 0x380++0x00
line.byte 0x00 "MPMR0,Manufacturing Protection Message Register"
rgroup.byte (0x380+0x40)++0x00
line.byte 0x00 "MPTESTR0,Manufacturing Protection Test Register"
group.byte 0x381++0x00
line.byte 0x00 "MPMR1,Manufacturing Protection Message Register"
rgroup.byte (0x381+0x40)++0x00
line.byte 0x00 "MPTESTR1,Manufacturing Protection Test Register"
group.byte 0x382++0x00
line.byte 0x00 "MPMR2,Manufacturing Protection Message Register"
rgroup.byte (0x382+0x40)++0x00
line.byte 0x00 "MPTESTR2,Manufacturing Protection Test Register"
group.byte 0x383++0x00
line.byte 0x00 "MPMR3,Manufacturing Protection Message Register"
rgroup.byte (0x383+0x40)++0x00
line.byte 0x00 "MPTESTR3,Manufacturing Protection Test Register"
group.byte 0x384++0x00
line.byte 0x00 "MPMR4,Manufacturing Protection Message Register"
rgroup.byte (0x384+0x40)++0x00
line.byte 0x00 "MPTESTR4,Manufacturing Protection Test Register"
group.byte 0x385++0x00
line.byte 0x00 "MPMR5,Manufacturing Protection Message Register"
rgroup.byte (0x385+0x40)++0x00
line.byte 0x00 "MPTESTR5,Manufacturing Protection Test Register"
group.byte 0x386++0x00
line.byte 0x00 "MPMR6,Manufacturing Protection Message Register"
rgroup.byte (0x386+0x40)++0x00
line.byte 0x00 "MPTESTR6,Manufacturing Protection Test Register"
group.byte 0x387++0x00
line.byte 0x00 "MPMR7,Manufacturing Protection Message Register"
rgroup.byte (0x387+0x40)++0x00
line.byte 0x00 "MPTESTR7,Manufacturing Protection Test Register"
group.byte 0x388++0x00
line.byte 0x00 "MPMR8,Manufacturing Protection Message Register"
rgroup.byte (0x388+0x40)++0x00
line.byte 0x00 "MPTESTR8,Manufacturing Protection Test Register"
group.byte 0x389++0x00
line.byte 0x00 "MPMR9,Manufacturing Protection Message Register"
rgroup.byte (0x389+0x40)++0x00
line.byte 0x00 "MPTESTR9,Manufacturing Protection Test Register"
group.byte 0x38A++0x00
line.byte 0x00 "MPMR10,Manufacturing Protection Message Register"
rgroup.byte (0x38A+0x40)++0x00
line.byte 0x00 "MPTESTR10,Manufacturing Protection Test Register"
group.byte 0x38B++0x00
line.byte 0x00 "MPMR11,Manufacturing Protection Message Register"
rgroup.byte (0x38B+0x40)++0x00
line.byte 0x00 "MPTESTR11,Manufacturing Protection Test Register"
group.byte 0x38C++0x00
line.byte 0x00 "MPMR12,Manufacturing Protection Message Register"
rgroup.byte (0x38C+0x40)++0x00
line.byte 0x00 "MPTESTR12,Manufacturing Protection Test Register"
group.byte 0x38D++0x00
line.byte 0x00 "MPMR13,Manufacturing Protection Message Register"
rgroup.byte (0x38D+0x40)++0x00
line.byte 0x00 "MPTESTR13,Manufacturing Protection Test Register"
group.byte 0x38E++0x00
line.byte 0x00 "MPMR14,Manufacturing Protection Message Register"
rgroup.byte (0x38E+0x40)++0x00
line.byte 0x00 "MPTESTR14,Manufacturing Protection Test Register"
group.byte 0x38F++0x00
line.byte 0x00 "MPMR15,Manufacturing Protection Message Register"
rgroup.byte (0x38F+0x40)++0x00
line.byte 0x00 "MPTESTR15,Manufacturing Protection Test Register"
group.byte 0x390++0x00
line.byte 0x00 "MPMR16,Manufacturing Protection Message Register"
rgroup.byte (0x390+0x40)++0x00
line.byte 0x00 "MPTESTR16,Manufacturing Protection Test Register"
group.byte 0x391++0x00
line.byte 0x00 "MPMR17,Manufacturing Protection Message Register"
rgroup.byte (0x391+0x40)++0x00
line.byte 0x00 "MPTESTR17,Manufacturing Protection Test Register"
group.byte 0x392++0x00
line.byte 0x00 "MPMR18,Manufacturing Protection Message Register"
rgroup.byte (0x392+0x40)++0x00
line.byte 0x00 "MPTESTR18,Manufacturing Protection Test Register"
group.byte 0x393++0x00
line.byte 0x00 "MPMR19,Manufacturing Protection Message Register"
rgroup.byte (0x393+0x40)++0x00
line.byte 0x00 "MPTESTR19,Manufacturing Protection Test Register"
group.byte 0x394++0x00
line.byte 0x00 "MPMR20,Manufacturing Protection Message Register"
rgroup.byte (0x394+0x40)++0x00
line.byte 0x00 "MPTESTR20,Manufacturing Protection Test Register"
group.byte 0x395++0x00
line.byte 0x00 "MPMR21,Manufacturing Protection Message Register"
rgroup.byte (0x395+0x40)++0x00
line.byte 0x00 "MPTESTR21,Manufacturing Protection Test Register"
group.byte 0x396++0x00
line.byte 0x00 "MPMR22,Manufacturing Protection Message Register"
rgroup.byte (0x396+0x40)++0x00
line.byte 0x00 "MPTESTR22,Manufacturing Protection Test Register"
group.byte 0x397++0x00
line.byte 0x00 "MPMR23,Manufacturing Protection Message Register"
rgroup.byte (0x397+0x40)++0x00
line.byte 0x00 "MPTESTR23,Manufacturing Protection Test Register"
group.byte 0x398++0x00
line.byte 0x00 "MPMR24,Manufacturing Protection Message Register"
rgroup.byte (0x398+0x40)++0x00
line.byte 0x00 "MPTESTR24,Manufacturing Protection Test Register"
group.byte 0x399++0x00
line.byte 0x00 "MPMR25,Manufacturing Protection Message Register"
rgroup.byte (0x399+0x40)++0x00
line.byte 0x00 "MPTESTR25,Manufacturing Protection Test Register"
group.byte 0x39A++0x00
line.byte 0x00 "MPMR26,Manufacturing Protection Message Register"
rgroup.byte (0x39A+0x40)++0x00
line.byte 0x00 "MPTESTR26,Manufacturing Protection Test Register"
group.byte 0x39B++0x00
line.byte 0x00 "MPMR27,Manufacturing Protection Message Register"
rgroup.byte (0x39B+0x40)++0x00
line.byte 0x00 "MPTESTR27,Manufacturing Protection Test Register"
group.byte 0x39C++0x00
line.byte 0x00 "MPMR28,Manufacturing Protection Message Register"
rgroup.byte (0x39C+0x40)++0x00
line.byte 0x00 "MPTESTR28,Manufacturing Protection Test Register"
group.byte 0x39D++0x00
line.byte 0x00 "MPMR29,Manufacturing Protection Message Register"
rgroup.byte (0x39D+0x40)++0x00
line.byte 0x00 "MPTESTR29,Manufacturing Protection Test Register"
group.byte 0x39E++0x00
line.byte 0x00 "MPMR30,Manufacturing Protection Message Register"
rgroup.byte (0x39E+0x40)++0x00
line.byte 0x00 "MPTESTR30,Manufacturing Protection Test Register"
group.byte 0x39F++0x00
line.byte 0x00 "MPMR31,Manufacturing Protection Message Register"
rgroup.byte (0x39F+0x40)++0x00
line.byte 0x00 "MPTESTR31,Manufacturing Protection Test Register"
tree.end
tree "Descriptor Key Encryption Key Registers"
if (((per.l(ad:0x08000000+0xFD4))&0x300)==0x00)
group.long 0x400++0x03
line.long 0x00 "JDKEKR0,Job Descriptor Key Encryption Key Register 0"
group.long 0x404++0x03
line.long 0x00 "JDKEKR1,Job Descriptor Key Encryption Key Register 1"
group.long 0x408++0x03
line.long 0x00 "JDKEKR2,Job Descriptor Key Encryption Key Register 2"
group.long 0x40C++0x03
line.long 0x00 "JDKEKR3,Job Descriptor Key Encryption Key Register 3"
group.long 0x410++0x03
line.long 0x00 "JDKEKR4,Job Descriptor Key Encryption Key Register 4"
group.long 0x414++0x03
line.long 0x00 "JDKEKR5,Job Descriptor Key Encryption Key Register 5"
group.long 0x418++0x03
line.long 0x00 "JDKEKR6,Job Descriptor Key Encryption Key Register 6"
group.long 0x41C++0x03
line.long 0x00 "JDKEKR7,Job Descriptor Key Encryption Key Register 7"
newline
group.long 0x420++0x03
line.long 0x00 "TDKEKR00,Trusted Descriptor Key Encryption Key Register 0"
group.long 0x424++0x03
line.long 0x00 "TDKEKR01,Trusted Descriptor Key Encryption Key Register 1"
group.long 0x428++0x03
line.long 0x00 "TDKEKR02,Trusted Descriptor Key Encryption Key Register 2"
group.long 0x42C++0x03
line.long 0x00 "TDKEKR03,Trusted Descriptor Key Encryption Key Register 3"
group.long 0x430++0x03
line.long 0x00 "TDKEKR04,Trusted Descriptor Key Encryption Key Register 4"
group.long 0x434++0x03
line.long 0x00 "TDKEKR05,Trusted Descriptor Key Encryption Key Register 5"
group.long 0x438++0x03
line.long 0x00 "TDKEKR06,Trusted Descriptor Key Encryption Key Register 6"
group.long 0x43C++0x03
line.long 0x00 "TDKEKR07,Trusted Descriptor Key Encryption Key Register 7"
newline
group.long 0x440++0x03
line.long 0x00 "TDSKR0,Trusted Descriptor Signing Key Register 0"
group.long 0x444++0x03
line.long 0x00 "TDSKR1,Trusted Descriptor Signing Key Register 1"
group.long 0x448++0x03
line.long 0x00 "TDSKR2,Trusted Descriptor Signing Key Register 2"
group.long 0x44C++0x03
line.long 0x00 "TDSKR3,Trusted Descriptor Signing Key Register 3"
group.long 0x450++0x03
line.long 0x00 "TDSKR4,Trusted Descriptor Signing Key Register 4"
group.long 0x454++0x03
line.long 0x00 "TDSKR5,Trusted Descriptor Signing Key Register 5"
group.long 0x458++0x03
line.long 0x00 "TDSKR6,Trusted Descriptor Signing Key Register 6"
group.long 0x45C++0x03
line.long 0x00 "TDSKR7,Trusted Descriptor Signing Key Register 7"
else
hgroup.long 0x400++0x03
hide.long 0x00 "JDKEKR0,Job Descriptor Key Encryption Key Register 0"
hgroup.long 0x404++0x03
hide.long 0x00 "JDKEKR1,Job Descriptor Key Encryption Key Register 1"
hgroup.long 0x408++0x03
hide.long 0x00 "JDKEKR2,Job Descriptor Key Encryption Key Register 2"
hgroup.long 0x40C++0x03
hide.long 0x00 "JDKEKR3,Job Descriptor Key Encryption Key Register 3"
hgroup.long 0x410++0x03
hide.long 0x00 "JDKEKR4,Job Descriptor Key Encryption Key Register 4"
hgroup.long 0x414++0x03
hide.long 0x00 "JDKEKR5,Job Descriptor Key Encryption Key Register 5"
hgroup.long 0x418++0x03
hide.long 0x00 "JDKEKR6,Job Descriptor Key Encryption Key Register 6"
hgroup.long 0x41C++0x03
hide.long 0x00 "JDKEKR7,Job Descriptor Key Encryption Key Register 7"
newline
hgroup.long 0x420++0x03
hide.long 0x00 "TDKEKR00,Trusted Descriptor Key Encryption Key Register 0"
hgroup.long 0x424++0x03
hide.long 0x00 "TDKEKR01,Trusted Descriptor Key Encryption Key Register 1"
hgroup.long 0x428++0x03
hide.long 0x00 "TDKEKR02,Trusted Descriptor Key Encryption Key Register 2"
hgroup.long 0x42C++0x03
hide.long 0x00 "TDKEKR03,Trusted Descriptor Key Encryption Key Register 3"
hgroup.long 0x430++0x03
hide.long 0x00 "TDKEKR04,Trusted Descriptor Key Encryption Key Register 4"
hgroup.long 0x434++0x03
hide.long 0x00 "TDKEKR05,Trusted Descriptor Key Encryption Key Register 5"
hgroup.long 0x438++0x03
hide.long 0x00 "TDKEKR06,Trusted Descriptor Key Encryption Key Register 6"
hgroup.long 0x43C++0x03
hide.long 0x00 "TDKEKR07,Trusted Descriptor Key Encryption Key Register 7"
newline
hgroup.long 0x440++0x03
hide.long 0x00 "TDSKR0,Trusted Descriptor Signing Key Register 0"
hgroup.long 0x444++0x03
hide.long 0x00 "TDSKR1,Trusted Descriptor Signing Key Register 1"
hgroup.long 0x448++0x03
hide.long 0x00 "TDSKR2,Trusted Descriptor Signing Key Register 2"
hgroup.long 0x44C++0x03
hide.long 0x00 "TDSKR3,Trusted Descriptor Signing Key Register 3"
hgroup.long 0x450++0x03
hide.long 0x00 "TDSKR4,Trusted Descriptor Signing Key Register 4"
hgroup.long 0x454++0x03
hide.long 0x00 "TDSKR5,Trusted Descriptor Signing Key Register 5"
hgroup.long 0x458++0x03
hide.long 0x00 "TDSKR6,Trusted Descriptor Signing Key Register 6"
hgroup.long 0x45C++0x03
hide.long 0x00 "TDSKR7,Trusted Descriptor Signing Key Register 7"
endif
tree.end
newline
width 20.
if (((per.l(ad:0x08000000+0xFD4))&0x300)==0x00)
group.quad 0x4E0++0x07
line.quad 0x00 "SKNR,Secure Key Nonce Register"
hexmask.quad.word 0x00 32.--44. 1. " SK_NONCE_MS     ,Secure key nonce most significant bits"
hexmask.quad.long 0x00 0.--31. 1. "                     SK_NONCE_LS  ,Secure key nonce least significant bits"
newline
else
hgroup.quad 0x4E0++0x07
hide.quad 0x00 "SKNR,Secure Key Nonce Register"
newline
endif
rgroup.long 0x50C++0x13
line.long 0x00 "DMA_STA,DMA Status Register"
bitfld.long 0x00 15. " DMA1_IDLE   ,DMA1 is idle" "Busy,Idle"
bitfld.long 0x00 8.--12. "                     DMA1_ETIF    ,DMA1 external transactions in flight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 7. "               DMA0_IDLE ,DMA0 is idle" "Busy,Idle"
newline
bitfld.long 0x00 0.--4. " DMA0_ETIF   ,DMA0 external transactions in flight" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "DMA_X_AID_7_4_MAP,Mapping For DMA AXI IDs 7-4 Register"
hexmask.long.byte 0x04 24.--31. 1. " AID7_BID    ,SEC block ID using AXI ID 7"
hexmask.long.byte 0x04 16.--23. 1. "                       AID6_BID     ,SEC block ID using AXI ID 6"
hexmask.long.byte 0x04 8.--15. 1. "               AID5_BID  ,SEC block ID using AXI ID 5"
newline
hexmask.long.byte 0x04 0.--7. 1. " AID4_BID    ,SEC block ID using AXI ID 4"
line.long 0x08 "DMA_X_AID_3_0_MAP,Mapping For DMA AXI IDs 3-0 Register"
hexmask.long.byte 0x08 24.--31. 1. " AID3_BID    ,SEC block ID using AXI ID 3"
hexmask.long.byte 0x08 16.--23. 1. "                       AID2_BID     ,SEC block ID using AXI ID 2"
hexmask.long.byte 0x08 8.--15. 1. "               AID1_BID  ,SEC block ID using AXI ID 1"
newline
hexmask.long.byte 0x08 0.--7. 1. " AID0_BID    ,SEC block ID using AXI ID 0"
line.long 0x0C "DMA_X_AID_15_12_MAP,Mapping For DMA AXI IDs 15-12 Register"
hexmask.long.byte 0x0C 24.--31. 1. " AID15_BID   ,SEC block ID using AXI ID 15"
hexmask.long.byte 0x0C 16.--23. 1. "                       AID14_BID    ,SEC block ID using AXI ID 14"
hexmask.long.byte 0x0C 8.--15. 1. "               AID13_BID ,SEC block ID using AXI ID 13"
newline
hexmask.long.byte 0x0C 0.--7. 1. " AID12_BID   ,SEC block ID using AXI ID 12"
line.long 0x10 "DMA_X_AID_11_8_MAP,Mapping For DMA AXI IDs 11-8 Register"
hexmask.long.byte 0x10 24.--31. 1. " AID11_BID   ,SEC block ID using AXI ID 11"
hexmask.long.byte 0x10 16.--23. 1. "                       AID10_BID    ,SEC block ID using AXI ID 10"
hexmask.long.byte 0x10 8.--15. 1. "               AID9_BID  ,SEC block ID using AXI ID 9"
newline
hexmask.long.byte 0x10 0.--7. 1. " AID8_BID    ,SEC block ID using AXI ID 8"
rgroup.long 0x524++0x03
line.long 0x00 "DMA_X_AID_15_0_EN,DMA_X AXI ID Map Enable Register"
bitfld.long 0x00 15. " AID15E      ,DMA engine 15 enabled" "Disabled,Enabled"
bitfld.long 0x00 14. "                 AID14E       ,DMA engine 14 enabled" "Disabled,Enabled"
bitfld.long 0x00 13. "         AID13E    ,DMA engine 13 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 12. " AID12E      ,DMA engine 12 enabled" "Disabled,Enabled"
bitfld.long 0x00 11. "                 AID11E       ,DMA engine 11 enabled" "Disabled,Enabled"
bitfld.long 0x00 10. "         AID10E    ,DMA engine 10 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " AID9E       ,DMA engine 9 enabled" "Disabled,Enabled"
bitfld.long 0x00 8. "                 AID8E        ,DMA engine 8 enabled" "Disabled,Enabled"
bitfld.long 0x00 7. "         AID7E     ,DMA engine 7 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " AID6E       ,DMA engine 6 enabled" "Disabled,Enabled"
bitfld.long 0x00 5. "                 AID5E        ,DMA engine 5 enabled" "Disabled,Enabled"
bitfld.long 0x00 4. "         AID4E     ,DMA engine 4 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " AID3E       ,DMA engine 3 enabled" "Disabled,Enabled"
bitfld.long 0x00 2. "                 AID2E        ,DMA engine 2 enabled" "Disabled,Enabled"
bitfld.long 0x00 1. "         AID1E     ,DMA engine 1 enabled" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " AID0E       ,DMA engine 0 enabled" "Disabled,Enabled"
wgroup.long 0x530++0x03
line.long 0x00 "DMA_X_ARTC_CTL,DMA_X AXI Read Timing Check Control Register"
bitfld.long 0x00 31. " ARTCE       ,AXI read timing check enable" "Disabled,Enabled"
bitfld.long 0x00 30. "                 ARCT         ,AXI read counter test" "No test,Test"
bitfld.long 0x00 29. "          ARTT      ,AXI read timer test" "No test,Test"
newline
bitfld.long 0x00 28. " ARTL        ,AXI read timer last" "First,Last"
hexmask.long.word 0x00 16.--27. 1. "                    ARL          ,AXI read limit"
hexmask.long.word 0x00 0.--11. 1. "             ART       ,AXI read timer"
if (((per.l(ad:0x08000000+0x530))&0x80000000)==0x00)
group.long 0x534++0x03
line.long 0x00 "DMA_X_ARTC_LC,DMA_X AXI Read Timing Check Late Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " ARLC        ,AXI read late count"
wgroup.long 0x538++0x03
line.long 0x00 "DMA_X_ARTC_SC,DMA_X AXI Read Timing Check Sample Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " ARSC        ,AXI read sample count"
group.long 0x53C++0x03
line.long 0x00 "DMA_X_ARTC_LAT,DMA_X Read Timing Check Latency Register"
else
rgroup.long 0x534++0x03
line.long 0x00 "DMA_X_ARTC_LC,DMA_X AXI Read Timing Check Late Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " ARLC        ,AXI read late count"
rgroup.long 0x538++0x03
line.long 0x00 "DMA_X_ARTC_SC,DMA_X AXI Read Timing Check Sample Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " ARSC        ,AXI read sample count"
rgroup.long 0x53C++0x03
line.long 0x00 "DMA_X_ARTC_LAT,DMA_X Read Timing Check Latency Register"
endif
group.long 0x540++0x03
line.long 0x00 "DMA_X_AWTC_CTL,DMA_X AXI Write Timing Check Control Register"
bitfld.long 0x00 31. " AWTCE       ,AXI write timing check enable" "Disabled,Enabled"
bitfld.long 0x00 30. "                 AWCT         ,AXI write counter test" "No test,Test"
bitfld.long 0x00 29. "          AWTT      ,AXI write timer test" "No test,Test"
newline
hexmask.long.word 0x00 16.--27. 1. " AWL         ,AXI write limit"
hexmask.long.word 0x00 0.--11. 1. "                     AWT          ,AXI write timer"
if (((per.l(ad:0x08000000+0x540))&0x80000000)==0x00)
group.long 0x544++0x03
line.long 0x00 "DMA_X_AWTC_LC,DMA_X AXI Write Timing Check Late Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " AWLC        ,AXI write late count"
wgroup.long 0x548++0x03
line.long 0x00 "DMA_X_AWTC_SC,DMA_X AXI Write Timing Check Sample Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " AWSC        ,AXI write sample count"
group.long 0x54C++0x03
line.long 0x00 "DMA_X_AWTC_LAT,DMA_X Write Timing Check Latency Register"
else
rgroup.long 0x544++0x03
line.long 0x00 "DMA_X_AWTC_LC,DMA_X AXI Write Timing Check Late Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " AWLC        ,AXI write late count"
rgroup.long 0x548++0x03
line.long 0x00 "DMA_X_AWTC_SC,DMA_X AXI Write Timing Check Sample Count Register"
hexmask.long.tbyte 0x00 0.--19. 1. " AWSC        ,AXI write sample count"
rgroup.long 0x54C++0x03
line.long 0x00 "DMA_X_AWTC_LAT,DMA_X Write Timing Check Latency Register"
endif
tree "RNG (Random-Number Generator) Registers"
if ((per.l(ad:0x08000000+0x600)&0x10000)==0x10000)
group.long 0x600++0x03
line.long 0x00 "RTMCTL,RNG TRNG Miscellaneous Control Register"
bitfld.long 0x00 16. " PRGM        ,Programming mode select" "Run mode,Program mode"
rbitfld.long 0x00 13. "             TSTOP_OK     ,TRNG ring oscillator stopped" "Running,Stopped"
eventfld.long 0x00 12. "          ERR       ,Error status" "Not detected,Detected"
newline
rbitfld.long 0x00 11. " TST_OUT     ,Test point inside ring oscillator" "0,1"
rbitfld.long 0x00 10. "                        ENT_VAL      ,Entropy valid" "Not valid,Valid"
rbitfld.long 0x00 9. "        FCT_VAL   ,Frequency count valid" "Not valid,Valid"
newline
rbitfld.long 0x00 8. " FCT_FAIL    ,Frequency count fail" "Not failed,Failed"
bitfld.long 0x00 7. "               FORCE_SYSCLK ,Force system clock" "Ring oscillator,TRNG"
bitfld.long 0x00 6. "  RST_DEF   ,Reset defaults" "No reset,Reset"
newline
bitfld.long 0x00 5. " TRNG_ACC    ,TRNG access mode" "Not set,Set"
bitfld.long 0x00 4. "                  CLK_OUT_EN   ,Clock output enable" "Disabled,Enabled"
bitfld.long 0x00 2.--3. "         OSC_DIV   ,Oscillator divide" "No divide,/2,/4,/8"
newline
bitfld.long 0x00 0.--1. " SAMP_MODE   ,Sample mode [entropy shifter/statistical checker]" "Von Neumann/Von Neumann,Raw/Von Neumann,Von Neumann/Raw,?..."
group.long 0x604++0x03
line.long 0x00 "RTSCMISC,RNG TRNG Statistical Check Miscellaneous Register"
bitfld.long 0x00 16.--19. " RTY_CNT     ,RETRY COUNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "                       LRUN_MAX     ,LONG RUN MAX LIMIT"
group.long 0x608++0x03
line.long 0x00 "RTPKRRNG,RNG TRNG Poker Range Register"
hexmask.long.word 0x00 0.--15. 1. " PKR_RNG     ,Poker range"
group.long 0x60C++0x03
line.long 0x00 "RTPKRMAX,RNG TRNG Poker Maximum Limit Register"
hexmask.long.tbyte 0x00 0.--23. 1. " PKR_RNG     ,Poker maximum limit"
else
group.long 0x600++0x03
line.long 0x00 "RTMCTL,RNG TRNG Miscellaneous Control Register"
bitfld.long 0x00 16. " PRGM        ,Programming mode select" "Run mode,Program mode"
rbitfld.long 0x00 13. "             TSTOP_OK     ,TRNG ring oscillator stopped" "Running,Stopped"
eventfld.long 0x00 12. "          ERR       ,Error status" "Not detected,Detected"
newline
rbitfld.long 0x00 11. " TST_OUT     ,Test point inside ring oscillator" "0,1"
rbitfld.long 0x00 10. "                        ENT_VAL      ,Entropy valid" "Not valid,Valid"
rbitfld.long 0x00 9. "        FCT_VAL   ,Frequency count valid" "Not valid,Valid"
newline
rbitfld.long 0x00 8. " FCT_FAIL    ,Frequency count fail" "Not failed,Failed"
rbitfld.long 0x00 7. "               FORCE_SYSCLK ,Force system clock" "Ring oscillator,TRNG"
rbitfld.long 0x00 6. "  RST_DEF   ,Reset defaults" "No reset,Reset"
newline
bitfld.long 0x00 5. " TRNG_ACC    ,TRNG access mode" "Not set,Set"
bitfld.long 0x00 4. "                  CLK_OUT_EN   ,Clock output enable" "Disabled,Enabled"
rbitfld.long 0x00 2.--3. "         OSC_DIV   ,Oscillator divide" "No divide,/2,/4,/8"
newline
rbitfld.long 0x00 0.--1. " SAMP_MODE   ,Sample mode [entropy shifter/statistical checker]" "Von Neumann/Von Neumann,Raw/Von Neumann,Von Neumann/Raw,?..."
hgroup.long 0x604++0x03
hide.long 0x00 "RTSCMISC,RNG TRNG Statistical Check Miscellaneous Register"
rgroup.long 0x608++0x03
line.long 0x00 "RTPKRRNG,RNG TRNG Poker Range Register"
hexmask.long.word 0x00 0.--15. 1. " PKR_RNG     ,Poker range"
rgroup.long 0x60C++0x03
line.long 0x00 "RTPKRSQ,RNG TRNG Poker Square Calculation Result Register"
hexmask.long.tbyte 0x00 0.--23. 1. " PKR_SQ      ,Poker square calculation result"
endif
group.long 0x610++0x03
line.long 0x00 "RTSDCTL,RNG TRNG Seed Control Register"
hexmask.long.word 0x00 16.--31. 1. " ENT_DLY     ,Entropy delay"
hexmask.long.word 0x00 0.--15. 1. "                     SAMP_SIZE    ,Sample size"
if ((per.l(ad:0x08000000+0x600)&0x10000)==0x10000)
group.long 0x614++0x03
line.long 0x00 "RTSBLIM,RNG TRNG Sparse Bit Limit Register"
hexmask.long.word 0x00 0.--9. 1. " SB_LIM      ,Sparse bit limit"
else
rgroup.long 0x614++0x03
line.long 0x00 "RTTOTSAM,RNG TRNG Total Samples Register"
hexmask.long.tbyte 0x00 0.--19. 1. " TOT_SAM     ,Total samples"
endif
if ((per.l(ad:0x08000000+0x600)&0x10000)==0x10000)
group.long 0x618++0x23
line.long 0x00 "RTFRQMIN,RNG TRNG Frequency Count Minimum Limit Register"
hexmask.long.tbyte 0x00 0.--21. 1. " FRQ_MIN     ,Frequency count minimum limit"
line.long 0x04 "RTFRQMAX,RNG TRNG Frequency Count Maximum Limit Register"
hexmask.long.tbyte 0x04 0.--21. 1. " FRQ_MAX     ,Frequency counter maximum limit"
line.long 0x08 "RTSCML,RNG TRNG Statistical Check Monobit Limit Register"
hexmask.long.word 0x08 16.--31. 1. " MONO_RNG    ,Monobit range"
hexmask.long.word 0x08 0.--15. 1. "                     MONO_MAX     ,Monobit maximum limit"
line.long 0x0C "RTSCR1L,RNG TRNG Statistical Check Run Length 1 Limit Register"
hexmask.long.word 0x0C 16.--30. 1. " RUN1_RNG    ,Run length 1 range"
hexmask.long.word 0x0C 0.--14. 1. "                     RUN1_MAX     ,Run length 1 maximum limit"
line.long 0x10 "RTSCR2L,RNG TRNG Statistical Check Run Length 2 Limit Register"
hexmask.long.word 0x10 16.--29. 1. " RUN2_RNG    ,Run length 2 range"
hexmask.long.word 0x10 0.--13. 1. "                     RUN2_MAX     ,Run length 2 maximum limit"
line.long 0x14 "RTSCR3L,RNG TRNG Statistical Check Run Length 3 Limit Register"
hexmask.long.word 0x14 16.--28. 1. " RUN3_RNG    ,Run length 3 range"
hexmask.long.word 0x14 0.--12. 1. "                     RUN3_MAX     ,Run length 3 maximum limit"
line.long 0x18 "RTSCR4L,RNG TRNG Statistical Check Run Length 4 Limit Register"
hexmask.long.word 0x18 16.--27. 1. " RUN4_RNG    ,Run length 4 range"
hexmask.long.word 0x18 0.--11. 1. "                     RUN4_MAX     ,Run length 4 maximum limit"
line.long 0x1C "RTSCR5L,RNG TRNG Statistical Check Run Length 5 Limit Register"
hexmask.long.word 0x1C 16.--26. 1. " RUN5_RNG    ,Run length 5 range"
hexmask.long.word 0x1C 0.--10. 1. "                     RUN5_MAX     ,Run length 5 maximum limit"
line.long 0x20 "RTSCR6PL,RNG TRNG Statistical Check Run Length 6+ Limit Register"
hexmask.long.word 0x20 16.--26. 1. " RUN6P_RNG   ,Run length 6+ range"
hexmask.long.word 0x20 0.--10. 1. "                     RUN6P_MAX    ,Run length 6+ maximum limit"
else
rgroup.long 0x618++0x23
line.long 0x00 "RTFRQMIN,RNG TRNG Frequency Count Minimum Limit Register"
hexmask.long.tbyte 0x00 0.--21. 1. " FRQ_MIN     ,Frequency count minimum limit"
line.long 0x04 "RTFRQCNT,RNG TRNG Frequency Count Register"
hexmask.long.tbyte 0x04 0.--21. 1. " FRQ_CNT     ,Frequency count"
line.long 0x08 "RTSCMC,RNG TRNG Statistical Check Monobit Count Register"
hexmask.long.word 0x08 0.--15. 1. " MONO_CNT    ,Monobit count"
line.long 0x0C "RTSCR1C,RNG TRNG Statistical Check Run Length 1 Count Register"
hexmask.long.word 0x0C 16.--30. 1. " R1_1_COUNT  ,Runs of one length 1 count"
hexmask.long.word 0x0C 0.--14. 1. "                     R1_0_COUNT   ,Runs of zero length 1 count"
line.long 0x10 "RTSCR2C,RNG TRNG Statistical Check Run Length 2 Count Register"
hexmask.long.word 0x10 16.--29. 1. " R2_1_COUNT  ,Runs of one length 2 count"
hexmask.long.word 0x10 0.--13. 1. "                     R2_0_COUNT   ,Runs of zero length 2 count"
line.long 0x14 "RTSCR3C,RNG TRNG Statistical Check Run Length 3 Count Register"
hexmask.long.word 0x14 16.--28. 1. " R3_1_COUNT  ,Runs of one length 3 count"
hexmask.long.word 0x14 0.--12. 1. "                     R3_0_COUNT   ,Runs of zero length 3 count"
line.long 0x18 "RTSCR4C,RNG TRNG Statistical Check Run Length 4 Count Register"
hexmask.long.word 0x18 16.--27. 1. " R4_1_COUNT  ,Runs of one length 4 count"
hexmask.long.word 0x18 0.--11. 1. "                     R4_0_COUNT   ,Runs of zero length 4 count"
line.long 0x1C "RTSCR5C,RNG TRNG Statistical Check Run Length 5 Count Register"
hexmask.long.word 0x1C 16.--26. 1. " R5_1_COUNT  ,Runs of one length 5 count"
hexmask.long.word 0x1C 0.--10. 1. "                     R5_0_COUNT   ,Runs of zero length 5 count"
line.long 0x20 "RTSCR6PC,RNG TRNG Statistical Check Run Length 6+ Count Register"
hexmask.long.word 0x20 16.--26. 1. " R6P_1_COUNT ,Runs of one length 6+ count"
hexmask.long.word 0x20 0.--10. 1. "                     R6P_0_COUNT  ,Runs of zero length 6+ count"
endif
rgroup.long 0x63C++0x03
line.long 0x00 "RTSTATUS,RNG TRNG Status Register"
bitfld.long 0x00 16.--19. " RETRY_COUNT ,RETRY COUNT" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 15. "                       FMBTF        ,Mono bit test fail" "Not failed,Failed"
bitfld.long 0x00 14. "       FPTF      ,Poker test fail" "Not failed,Failed"
newline
bitfld.long 0x00 13. " FLRTF       ,Long run test fail" "Not failed,Failed"
bitfld.long 0x00 12. "               FSBTF        ,Sparse bit test fail" "Not failed,Failed"
bitfld.long 0x00 11. "       F6PBR1TF  ,6 plus bit run sampling 1s test fail" "Not failed,Failed"
newline
bitfld.long 0x00 10. " F6PBR0TF    ,6 plus bit run sampling 0s test fail" "Not failed,Failed"
bitfld.long 0x00 9. "               F5BR1TF      ,5-Bit run sampling 1s test fail" "Not failed,Failed"
bitfld.long 0x00 8. "       F5BR0TF   ,5-Bit run sampling 0s test fail" "Not failed,Failed"
newline
bitfld.long 0x00 7. " F4BR1TF     ,4-Bit run sampling 1s test fail" "Not failed,Failed"
bitfld.long 0x00 6. "               F4BR0TF      ,4-Bit run sampling 0s test fail" "Not failed,Failed"
bitfld.long 0x00 5. "       F3BR1TF   ,3-Bit run sampling 1s test fail" "Not failed,Failed"
newline
bitfld.long 0x00 4. " F3BR01TF    ,3-Bit run sampling 0s test fail" "Not failed,Failed"
bitfld.long 0x00 3. "               F2BR1TF      ,2-Bit run sampling 1s test fail" "Not failed,Failed"
bitfld.long 0x00 2. "       F2BR0TF   ,2-Bit run sampling 0s test fail" "Not failed,Failed"
newline
bitfld.long 0x00 1. " F1BR1TF     ,1-Bit run sampling 1s test fail" "Not failed,Failed"
bitfld.long 0x00 0. "               F1BR0TF      ,1-Bit run sampling 0s test fail" "Not failed,Failed"
newline
rgroup.long 0x640++0x03
line.long 0x00 "RTENT0,RNG TRNG Entropy Read Register 0"
rgroup.long 0x644++0x03
line.long 0x00 "RTENT1,RNG TRNG Entropy Read Register 1"
rgroup.long 0x648++0x03
line.long 0x00 "RTENT2,RNG TRNG Entropy Read Register 2"
rgroup.long 0x64C++0x03
line.long 0x00 "RTENT3,RNG TRNG Entropy Read Register 3"
rgroup.long 0x650++0x03
line.long 0x00 "RTENT4,RNG TRNG Entropy Read Register 4"
rgroup.long 0x654++0x03
line.long 0x00 "RTENT5,RNG TRNG Entropy Read Register 5"
rgroup.long 0x658++0x03
line.long 0x00 "RTENT6,RNG TRNG Entropy Read Register 6"
rgroup.long 0x65C++0x03
line.long 0x00 "RTENT7,RNG TRNG Entropy Read Register 7"
rgroup.long 0x660++0x03
line.long 0x00 "RTENT8,RNG TRNG Entropy Read Register 8"
rgroup.long 0x664++0x03
line.long 0x00 "RTENT9,RNG TRNG Entropy Read Register 9"
rgroup.long 0x668++0x03
line.long 0x00 "RTENT10,RNG TRNG Entropy Read Register 10"
rgroup.long 0x66C++0x03
line.long 0x00 "RTENT11,RNG TRNG Entropy Read Register 11"
rgroup.long 0x670++0x03
line.long 0x00 "RTENT12,RNG TRNG Entropy Read Register 12"
rgroup.long 0x674++0x03
line.long 0x00 "RTENT13,RNG TRNG Entropy Read Register 13"
rgroup.long 0x678++0x03
line.long 0x00 "RTENT14,RNG TRNG Entropy Read Register 14"
hgroup.long 0x67C++0x03
hide.long 0x00 "RTENT15,RNG TRNG Entropy Read Register 15"
in
newline
if (((per.l(ad:0x08000000+0x600))&0x10000)==0x00)
rgroup.long 0x680++0x1F
line.long 0x00 "RTPKRCNT10,RNG TRNG Statistical Check Poker Count 1 And 0 Register"
hexmask.long.word 0x00 16.--31. 1. " PKR_1_CNT   ,Poker 1h count"
hexmask.long.word 0x00 0.--15. 1. "                     PKR_0_CNT    ,Poker 0h count"
line.long 0x04 "RTPKRCNT32,RNG TRNG Statistical Check Poker Count 3 And 2 Register"
hexmask.long.word 0x04 16.--31. 1. " PKR_3_CNT   ,Poker 3h count"
hexmask.long.word 0x04 0.--15. 1. "                     PKR_2_CNT    ,Poker 2h count"
line.long 0x08 "RTPKRCNT54,RNG TRNG Statistical Check Poker Count 5 And 4 Register"
hexmask.long.word 0x08 16.--31. 1. " PKR_5_CNT   ,Poker 5h count"
hexmask.long.word 0x08 0.--15. 1. "                     PKR_4_CNT    ,Poker 4h count"
line.long 0x0C "RTPKRCNT76,RNG TRNG Statistical Check Poker Count 7 And 6 Register"
hexmask.long.word 0x0C 16.--31. 1. " PKR_7_CNT   ,Poker 7h count"
hexmask.long.word 0x0C 0.--15. 1. "                     PKR_6_CNT    ,Poker 6h count"
line.long 0x10 "RTPKRCNT98,RNG TRNG Statistical Check Poker Count 9 And 8 Register"
hexmask.long.word 0x10 16.--31. 1. " PKR_9_CNT   ,Poker 9h count"
hexmask.long.word 0x10 0.--15. 1. "                     PKR_8_CNT    ,Poker 8h count"
line.long 0x14 "RTPKRCNTBA,RNG TRNG Statistical Check Poker Count B And A Register"
hexmask.long.word 0x14 16.--31. 1. " PKR_B_CNT   ,Poker bh count"
hexmask.long.word 0x14 0.--15. 1. "                     PKR_A_CNT    ,Poker Ah count"
line.long 0x18 "RTPKRCNTDC,RNG TRNG Statistical Check Poker Count D And C Register"
hexmask.long.word 0x18 16.--31. 1. " PKR_D_CNT   ,Poker Dh count"
hexmask.long.word 0x18 0.--15. 1. "                     PKR_C_CNT    ,Poker Ch count"
line.long 0x1C "RTPKRCNTFE,RNG TRNG Statistical Check Poker Count F And E Register"
hexmask.long.word 0x1C 16.--31. 1. " PKR_F_CNT   ,Poker Fh count"
hexmask.long.word 0x1C 0.--15. 1. "                     PKR_E_CNT    ,Poker Eh count"
rgroup.long 0x6C0++0x03
line.long 0x00 "RDSTA,RNG DRNG Status Register"
bitfld.long 0x00 31. " SKVT        ,Secure key valid test" "Not generated,Generated"
bitfld.long 0x00 30. "            SKVN         ,Secure Key valid non-test" "Not generated,Generated"
bitfld.long 0x00 20. "    CE        ,Catastrophic error" "No error,Error"
newline
bitfld.long 0x00 16.--19. " ERRCODE     ,Error code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 9. "                       TF1          ,Test flag state handle 1." "No test,Test"
bitfld.long 0x00 8. "          TF0       ,Test flag state handle 0" "No test,Test"
newline
bitfld.long 0x00 5. " PR1         ,Prediction resistance flag state handle 1" "0,1"
bitfld.long 0x00 4. "                        PR0          ,Prediction resistance flag state handle 0" "0,1"
bitfld.long 0x00 1. "                IF1       ,Instantiated flag state handle 1" "Not instantiated,Instantiated"
newline
bitfld.long 0x00 0. " IF0         ,Instantiated flag state handle 0" "Not instantiated,Instantiated"
else
hgroup.long 0x680++0x1F
hide.long 0x00 "RTPKRCNT10,RNG TRNG Statistical Check Poker Count 1 And 0 Register"
hide.long 0x04 "RTPKRCNT32,RNG TRNG Statistical Check Poker Count 3 And 2 Register"
hide.long 0x08 "RTPKRCNT54,RNG TRNG Statistical Check Poker Count 5 And 4 Register"
hide.long 0x0C "RTPKRCNT76,RNG TRNG Statistical Check Poker Count 7 And 6 Register"
hide.long 0x10 "RTPKRCNT98,RNG TRNG Statistical Check Poker Count 9 And 8 Register"
hide.long 0x14 "RTPKRCNTBA,RNG TRNG Statistical Check Poker Count B And A Register"
hide.long 0x18 "RTPKRCNTDC,RNG TRNG Statistical Check Poker Count D And C Register"
hide.long 0x1C "RTPKRCNTFE,RNG TRNG Statistical Check Poker Count F And E Register"
hgroup.long 0x6C0++0x03
hide.long 0x00 "RDSTA,RNG DRNG Status Register"
endif
rgroup.long 0x6D0++0x07
line.long 0x00 "RDINT0,RNG DRNG State Handle 0 Reseed Interval Register"
line.long 0x04 "RDINT1,RNG DRNG State Handle 1 Reseed Interval Register"
group.long 0x6E0++0x03
line.long 0x00 "RDHCNTL,RNG DRNG Hash Control Register"
bitfld.long 0x00 4. " HTC         ,Hashing test mode clear" "No effect,Clear"
bitfld.long 0x00 3. "                HTM          ,Hashing test mode" "Disabled,Enabled"
bitfld.long 0x00 2. "         HI        ,Hashing initialize" "No effect,Initialize"
newline
bitfld.long 0x00 1. " HB          ,Hashing begin" "No effect,Begin"
rbitfld.long 0x00 0. "                HD           ,Hashing done" "Not done,Done"
if (((per.l(ad:0x08000000+0x6E0))&0x09)==(0x08||0x01))
hgroup.long 0x6E4++0x03
hide.long 0x00 "RDHDIG,RNG DRNG Hash Digest Register"
in
else
hgroup.long 0x6E4++0x03
hide.long 0x00 "RDHDIG,RNG DRNG Hash Digest Register"
endif
if (((per.l(ad:0x08000000+0x6E0))&0x08)==0x08)
wgroup.long 0x6E8++0x03
line.long 0x00 "RDHBUF,RNG DRNG Hash Buffer Register"
else
hgroup.long 0x6E8++0x03
hide.long 0x00 "RDHBUF,RNG DRNG Hash Buffer Register"
endif
tree.end
newline
group.long 0xB00++0x07
line.long 0x00 "REIS,Recoverable Error Interrupt Status"
eventfld.long 0x00 27. " JBAE3       ,Job ring 3 bus access error" "No error,Error"
eventfld.long 0x00 26. "     JBAE2    ,Job ring 2 bus access error" "No error,Error"
eventfld.long 0x00 25. "  JBAE1   ,Job ring 1 bus access error" "No error,Error"
newline
eventfld.long 0x00 24. " JBAE0       ,Job ring 0 bus access error" "No error,Error"
eventfld.long 0x00 16. "     RBAE     ,SEC RTIC bus access error" "No error,Error"
rbitfld.long 0x00 11. "  QFDD    ,SEC queue manager interface frame descriptor dropped" "Not dropped,Dropped"
newline
eventfld.long 0x00 10. " QIVE        ,SEC queue manager interface isolation violation error occurred" "No error,Error"
eventfld.long 0x00 9. "     QBAE     ,SEC's queue manager interface bus access error" "No error,Error"
eventfld.long 0x00 8. "  QHLT    ,SEC's queue manager interface halted due to stop or stop on error" "Not halted,Halted"
newline
eventfld.long 0x00 0. " CWDE        ,The SEC watchdog timer expired" "Not expired,Expired"
line.long 0x04 "REIE,Recoverable Error Interrupt Enable"
bitfld.long 0x04 27. " JBAE3       ,JR3-initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 26. "     JBAE2    ,JR2-initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 25. "  JBAE1   ,JR1-initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 24. " JBAE0       ,JR0-initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 16. "     RBAE     ,RTIC initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
rbitfld.long 0x04 11. "  QFDD    ,QI frame descriptor dropped interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 10. " QIVE        ,QI isolation violation error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 9. "     QBAE     ,QI initiated job execution caused bus access error interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 8. "  QHLT    ,QI halted interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " CWDE        ,SEC watchdog timer expired interrupt enable" "Disabled,Enabled"
rgroup.long 0xB08++0x03
line.long 0x00 "REIF,Recoverable Error Interrupt Force"
bitfld.long 0x00 27. " JBAE3       ,JR3 initiated job execution caused bus access error" "No error,Error"
bitfld.long 0x00 26. "     JBAE2    ,JR2 initiated job execution caused bus access error" "No error,Error"
bitfld.long 0x00 25. "  JBAE1   ,JR1 initiated job execution caused bus access error" "No error,Error"
newline
bitfld.long 0x00 24. " JBAE0       ,JR0 initiated job execution caused bus access error" "No error,Error"
bitfld.long 0x00 16. "     RBAE     ,RTIC initiated job execution caused bus access error" "No error,Error"
bitfld.long 0x00 11. "  QFDD    ,QI frame descriptor dropped" "0,1"
newline
bitfld.long 0x00 10. " QIVE        ,QI isolation violation error" "No error,Error"
bitfld.long 0x00 9. "     QBAE     ,QI initiated job execution caused bus access error" "No error,Error"
bitfld.long 0x00 8. "  QHLT    ,QI halted" "0,1"
newline
bitfld.long 0x00 0. " CWDE        ,SEC watchdog timer expired" "0,1"
group.long 0xB0C++0x03
line.long 0x00 "REIH,Recoverable Error Interrupt Halt"
bitfld.long 0x00 27. " JBAE3       ,Halt SEC if JR3-initiated job execution caused bus access error" "No halt,Halt"
bitfld.long 0x00 26. "      JBAE2    ,Halt SEC if JR2-initiated job execution caused bus access error" "No halt,Halt"
bitfld.long 0x00 25. "   JBAE1   ,Halt SEC if JR1-initiated job execution caused bus access error" "No halt,Halt"
newline
bitfld.long 0x00 24. " JBAE0       ,Halt SEC if JR0-initiated job execution caused bus access error" "No halt,Halt"
bitfld.long 0x00 16. "      RBAE     ,Halt SEC if RTIC-initiated job execution caused bus access error" "No halt,Halt"
rbitfld.long 0x00 11. "   QFDD    ,Halt SEC if QI frame descriptor dropped" "No halt,Halt"
newline
bitfld.long 0x00 10. " QIVE        ,Halt SEC if QI isolation violation error" "No halt,Halt"
bitfld.long 0x00 9. "      QBAE     ,Halt SEC if QI-initiated job execution caused bus access error" "No halt,Halt"
bitfld.long 0x00 8. "   QHLT    ,Halt SEC if QI halted" "No halt,Halt"
newline
bitfld.long 0x00 0. " CWDE        ,Halt SEC if SEC watchdog timer expires" "No halt,Halt"
rgroup.long 0xBF8++0x07
line.long 0x00 "SECVID_MS,SEC Version ID Register Most Significant Half"
hexmask.long.word 0x00 16.--31. 1. " IP_ID       ,ID for SEC"
hexmask.long.byte 0x00 8.--15. 1. "         MAJ_REV  ,Major revision number for SEC"
hexmask.long.byte 0x00 0.--7. 1. "        MIN_REV ,Minor revision number for SEC"
line.long 0x04 "SECVID_LS,SEC Version ID Register Least Significant Half"
hexmask.long.byte 0x04 24.--31. 1. " COMPILE_OPT ,Compile options for SEC"
hexmask.long.byte 0x04 16.--23. 1. "           INTG_OPT ,Integration options for SEC"
hexmask.long.byte 0x04 8.--15. 1. "        ECO_REV ,ECO revision for SEC"
newline
hexmask.long.byte 0x04 0.--7. 1. " CONFIG_OPT  ,Configuration options for SEC"
newline
hgroup.quad 0xC00++0x07
hide.quad 0x00 "HT0_JD_ADDR,Holding Tank 0 Job Descriptor Address"
in
newline
rgroup.quad 0xC08++0x07
line.quad 0x00 "HT0_SD_ADDR,Holding Tank 0 Shared Descriptor Address"
hexmask.quad 0x00 0.--48. 0x01 " SD_ADDR         ,Shared descriptor address"
newline
rgroup.long 0xC10++0x07
line.long 0x00 "HT0_JQ_CTRL_MS,Holding Tank 0 Job Queue Control Most Significant Half Register"
bitfld.long 0x00 29. " WHL          ,Whole descriptor" "0,1"
bitfld.long 0x00 28. "            FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "     ILE      ,Immediate little endian" "Not swapped,Swapped"
newline
bitfld.long 0x00 22.--26. " SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 19. "           DWORD_SWAP ,Double word swap" "MS-LS,LS-MS"
bitfld.long 0x00 17.--18. "        HT_ERROR ,Holding tank error" "None,Job/Shared Desc. length,Job Ring/QI Shared/Job Ring Job Desc.,AXI error on QI/AI in. frame"
newline
bitfld.long 0x00 16. " SOB          ,Shared or burst" "0,1"
bitfld.long 0x00 15. "            AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
bitfld.long 0x00 8.--10. "  SRC      ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
newline
bitfld.long 0x00 0.--4. " ID           ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "HT0_JQ_CTRL_LS,Holding Tank 0 Job Queue Control Least Significant Half Register"
bitfld.long 0x04 31. " CTL_PL       ,Control privilege level" "Low,High"
hexmask.long.byte 0x04 16.--22. 1. "         CTL_ICID   ,Control ICID"
bitfld.long 0x04 15. "           OUT_PL   ,Output privilege level" "Low,High"
newline
hexmask.long.byte 0x04 0.--6. 1. " OUT_ICID     ,Output ICID value"
newline
hgroup.long 0xC1C++0x03
hide.long 0x00 "HT0_STATUS,Holding Tank Status"
in
newline
group.long 0xC24++0x03
line.long 0x00 "JQ_DEBUG_SEL,Job Queue Debug Select Register"
rbitfld.long 0x00 16.--20. " JOB_ID       ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--2. "           HT_SEL     ,Holding tank select" "0,1,2,3,4,5,6,7"
rgroup.long 0xDBC++0x03
line.long 0x00 "JRJIDU_LS,Job Ring Job IDs In Use Register Least Significant Half"
bitfld.long 0x00 15. " JID15        ,Job ID 15 is currently in use" "Not in use,In use"
bitfld.long 0x00 14. "   JID14      ,Job ID 14 is currently in use" "Not in use,In use"
bitfld.long 0x00 13. "   JID13    ,Job ID 13 is currently in use" "Not in use,In use"
newline
bitfld.long 0x00 12. " JID12        ,Job ID 12 is currently in use" "Not in use,In use"
bitfld.long 0x00 11. "   JID11      ,Job ID 11 is currently in use" "Not in use,In use"
bitfld.long 0x00 10. "   JID10    ,Job ID 10 is currently in use" "Not in use,In use"
newline
bitfld.long 0x00 9. " JID9         ,Job ID 9 is currently in use" "Not in use,In use"
bitfld.long 0x00 8. "   JID8       ,Job ID 8 is currently in use" "Not in use,In use"
bitfld.long 0x00 7. "   JID7     ,Job ID 7 is currently in use" "Not in use,In use"
newline
bitfld.long 0x00 6. " JID6         ,Job ID 6 is currently in use" "Not in use,In use"
bitfld.long 0x00 5. "   JID5       ,Job ID 5 is currently in use" "Not in use,In use"
bitfld.long 0x00 4. "   JID4     ,Job ID 4 is currently in use" "Not in use,In use"
newline
bitfld.long 0x00 3. " JID3         ,Job ID 3 is currently in use" "Not in use,In use"
bitfld.long 0x00 2. "   JID2       ,Job ID 2 is currently in use" "Not in use,In use"
bitfld.long 0x00 1. "   JID1     ,Job ID 1 is currently in use" "Not in use,In use"
newline
bitfld.long 0x00 0. " JID0         ,Job ID 0 is currently in use" "Not in use,In use"
rgroup.long 0xDC0++0x07
line.long 0x00 "JRJDJIFBC,Job Ring Job-Done Job ID FIFO BC"
bitfld.long 0x00 31. " BC           ,Been changed" "Not changed,Changed"
line.long 0x04 "JRJDJIF,Job Ring Job-Done Job ID FIFO"
bitfld.long 0x04 0.--4. " JOB_ID_ENTRY ,Job ID entry" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0xDE4++0x03
line.long 0x00 "JRJDS1,Job Ring Job-Done Source 1"
bitfld.long 0x00 31. " VALID        ,JQ_DEBUG_SEL.JOB_ID-specified job completion-status" "Not valid,Valid"
bitfld.long 0x00 0.--1. "    SRC        ,Number of the job ring being the source of a job with completion status waiting to be written to an output ring" "0,1,2,3"
newline
hgroup.quad 0xE00++0x07
hide.quad 0x00 "JRJDDA,Job Ring Job-Done Descriptor Address 0 Register"
in
newline
group.quad 0xF00++0x37
line.quad 0x00 "PC_REQ_DEQ,Performance Counter Number Of Requests Dequeued"
hexmask.quad 0x00 0.--47. 1. " PC_REQ_DEQ      ,Performance counter requests dequeued"
line.quad 0x08 "PC_OB_ENC_REQ,Performance Counter Number Of Outbound Encrypt Requests"
hexmask.quad 0x08 0.--47. 1. " PC_OB_ENC_REQ   ,Performance counter outbound encryption requests"
line.quad 0x10 "PC_IB_DEC_REQ,Performance Counter Number Of Inbound Decrypt Requests"
hexmask.quad 0x10 0.--47. 1. " PC_IB_DEC_REQ   ,Performance counter inbound decryptions requested"
line.quad 0x18 "PC_OB_ENCRYPT,Performance Counter Number Of Outbound Bytes Encrypted"
hexmask.quad 0x18 0.--47. 1. " PC_OB_ENCRYPT   ,Performance counter outbound bytes encrypted"
line.quad 0x20 "PC_OB_PROTECT,Performance Counter Number Of Outbound Bytes Protected"
hexmask.quad 0x20 0.--47. 1. " PC_OB_PROTECT   ,Performance counter outbound bytes encrypted"
line.quad 0x28 "PC_IB_DECRYPT,Performance Counter Number Of Inbound Bytes Decrypted"
hexmask.quad 0x28 0.--47. 1. " PC_IB_DECRYPT   ,Performance counter inbound bytes decrypted"
line.quad 0x30 "PC_IB_VALIDATED,Performance Counter Number Of Inbound Bytes Validated"
hexmask.quad 0x30 0.--47. 1. " PC_IB_VALIDATED ,Performance counter inbound bytes validated"
newline
rgroup.long 0xFA0++0x0F
line.long 0x00 "CRNR_MS,CHA Revision Number Register Most Significant Half"
bitfld.long 0x00 28.--31. " JRRN           ,Job ring revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "               DECORN      ,DECO revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "               ZARN              ,ZUC authentication hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 8.--11. " ZERN           ,ZUC encryption hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "               SNW9RN      ,SNOW-f9 hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               CRCRN             ,CRC hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "CRNR_LS,CHA Revision Number Register Least Significant Half"
bitfld.long 0x04 28.--31. " PKRN           ,Public key hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "               KASRN       ,Kasumi f8/f9 hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 20.--23. "               SNW8RN            ,SNOW-f8 hardware accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 16.--19. " RNGRN          ,Random number generator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 12.--15. "               MDRN        ,Message digest hardware accelerator module revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "               DESRN             ,DES accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " AESRN          ,AES accelerator revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "CTPR_MS,Compile Time Parameters Register Most Significant Half"
bitfld.long 0x08 28.--31. " AXI_PIPE_DEPTH ,AXI pipeline depth" "Maximum,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 27. "          AXI_LIODN   ,LIODN logic included" "Not implemented,Implemented"
bitfld.long 0x08 26. "  AXI_PRI           ,AXI master priority implemented" "Not implemented,Implemented"
newline
bitfld.long 0x08 25. " QI             ,Queue manager interface (QI)" "Not implemented,Implemented"
bitfld.long 0x08 24. "  ACC_CTL     ,ICID-based access control" "Not implemented,Implemented"
bitfld.long 0x08 23. "  C1C2              ,Separate C1 and C2 registers" "Shared,Separated"
newline
bitfld.long 0x08 21. " PC             ,Performance counter registers implemented" "Not implemented,Implemented"
bitfld.long 0x08 20. "  DECO_WD     ,DECO watchdog counter implemented" "Not implemented,Implemented"
bitfld.long 0x08 19. "  PM_EVT_BUS        ,Performance monitor event bus implemented" "Not implemented,Implemented"
newline
bitfld.long 0x08 18. " SG8            ,Eight scatter-gather tables implemented" "1 table,8 tables"
bitfld.long 0x08 17. "         MCFG_PS     ,Pointer size field implemented" "Not implemented,Implemented"
bitfld.long 0x08 16. "  MCFG_BURST        ,Support for large AXI bursts" "Not implemented,Implemented"
newline
bitfld.long 0x08 14. " IP_CLK         ,IP bus slave clock to SEC's AXI bus clock ratio" "1:1,1:2"
bitfld.long 0x08 13. "              DPAA2       ,DPAA2 architecture supported" "Not supported,Supported"
bitfld.long 0x08 11. "    AI_INCL           ,AIOP interface implemented" "Not implemented,Implemented"
newline
bitfld.long 0x08 8.--10. " RNG_I          ,RNG instantiations" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 4. "                REG_PG_SIZE ,SEC register page size" "4Kbyte,64Kbyte"
bitfld.long 0x08 1. "          VIRT_EN_POR_VALUE ,Job ring virtualization POR state" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " VIRT_EN_INCL   ,Job ring virtualization programmable" "Not included,Included"
line.long 0x0C "CTPR_LS,Compile Time Parameters Register Least Significant Half"
bitfld.long 0x0C 14. " SPLIT_KEY      ,Split key protocol" "Not implemented,Implemented"
bitfld.long 0x0C 13. "  MAN_PROT    ,Manufacturing protection protocol" "Not implemented,Implemented"
bitfld.long 0x0C 12. "  DBL_CRC           ,Double CRC protocol" "Not implemented,Implemented"
newline
bitfld.long 0x0C 11. " P3G_LTE        ,3GPP/LTE protocol" "Not implemented,Implemented"
bitfld.long 0x0C 10. "  RSA         ,RSA protocol" "Not implemented,Implemented"
bitfld.long 0x0C 9. "  MACSEC            ,MACSEC protocol" "Not implemented,Implemented"
newline
bitfld.long 0x0C 8. " TLS_PRF        ,TLS PRF protocol" "Not implemented,Implemented"
bitfld.long 0x0C 7. "  SSL_TLS     ,SSL/TLS protocol" "Not implemented,Implemented"
bitfld.long 0x0C 6. "  IKE               ,IKE protocols" "Not implemented,Implemented"
newline
bitfld.long 0x0C 5. " IPSEC          ,IPSEC protocols" "Not implemented,Implemented"
bitfld.long 0x0C 4. "  SRTP        ,SRTP protocol" "Not implemented,Implemented"
bitfld.long 0x0C 3. "  WIMAX             ,WiMax protocol" "Not implemented,Implemented"
newline
bitfld.long 0x0C 2. " WIFI           ,WiFi protocol" "Not implemented,Implemented"
bitfld.long 0x0C 1. "  BLOB        ,Blob protocol" "Not implemented,Implemented"
bitfld.long 0x0C 0. "  KG_DS             ,PK generation and digital signature protocols" "Not implemented,Implemented"
newline
hgroup.quad 0xFC0++0x07
hide.quad 0x00 "FAR,Fault Address Register"
in
newline
hgroup.long 0xFC8++0x03
hide.long 0x00 "FAICID,Fault Address ICID Register"
in
hgroup.long 0xFCC++0x03
hide.long 0x00 "FADR,Fault Address Detail Register"
in
newline
rgroup.long 0xFD4++0x03
line.long 0x00 "SSTA,SEC Status Register"
bitfld.long 0x00 10. " PLEND   ,Platform endianness" "Little,Big"
bitfld.long 0x00 8.--9. "         MOO     ,Mode of operation" "Non secure,Secure,Trusted,Fail"
bitfld.long 0x00 2. "     TRNG_IDLE ,TRNG idle" "Not idle,Idle"
newline
bitfld.long 0x00 1. " IDLE    ,SEC is idle" "Not idle,Idle"
bitfld.long 0x00 0. "       BSY     ,SEC busy" "Not busy,Busy"
rgroup.long 0xFE0++0x17
line.long 0x00 "RVID,RTIC Version ID Register"
bitfld.long 0x00 27. " MD      ,Memory block D available" "Not available,Available"
bitfld.long 0x00 26. "  MC      ,Memory block C available" "Not available,Available"
bitfld.long 0x00 25. "  MB        ,Memory block B available" "Not available,Available"
newline
bitfld.long 0x00 24. " MA      ,Memory block A available" "Not available,Available"
bitfld.long 0x00 19. "  SHA_512 ,SHA-512" "Not usable,Usable"
bitfld.long 0x00 17. "     SHA_256   ,SHA-256" "Not usable,Usable"
newline
hexmask.long.byte 0x00 8.--15. 1. " RMJV    ,RTIC major version"
hexmask.long.byte 0x00 0.--7. 1. "             RMNV    ,RTIC minor version"
line.long 0x04 "CCBVID,CHA Cluster Block Version ID Register"
hexmask.long.byte 0x04 24.--31. 1. " SEC_ERA ,SEC era"
hexmask.long.byte 0x04 8.--15. 1. "             AMJV    ,Accelerator major revision number"
hexmask.long.byte 0x04 0.--7. 1. "             AMNV      ,Accelerator minor revision number"
line.long 0x08 "CHAVID_MS,CHA Version ID Register Most Significant Half"
bitfld.long 0x08 28.--31. " JRVID   ,Job ring version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 24.--27. "             DECOVID ,DECO version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 12.--15. "             ZAVID     ,ZUC authentication hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 8.--11. " ZEVID   ,ZUC encryption hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 4.--7. "             SNW9VID ,SNOW-f9 hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "             CRCVID    ,CRC hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "CHAVID_LS,CHA Version ID Register Least Significant Half"
bitfld.long 0x0C 28.--31. " PKVID   ,Public key hardware accelerator version ID" "PKHA-XT 32-bit,PKHA-SD 32-bit,PKHA-SD 64-bit,PKHA-SD 128-bit,?..."
newline
bitfld.long 0x0C 24.--27. " KASVID  ,Kasumi f8/f9 hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x0C 20.--23. " SNW8VID ,SNOW-f8 hardware accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x0C 16.--19. " RNGVID  ,Random number generator version ID" ",,RNGB,,RNG4,?..."
newline
bitfld.long 0x0C 12.--15. " MDVID   ,Message digest hardware accelerator version ID" "Low-power,Low-power (+ SHA-512/SHA-512/224/SHA-512/256/SHA-384),Medium-performance,High-performance,?..."
newline
bitfld.long 0x0C 4.--7. " DESVID  ,DES accelerator version ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x0C 0.--3. " AESVID  ,AES accelerator version ID" ",,,Low-power,High-performance,?..."
line.long 0x10 "CHANUM_MS,CHA Number Register Most Significant Half"
bitfld.long 0x10 28.--31. " JRNUM   ,Job ring number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 24.--27. "             DECONUM ,DECO number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 12.--15. "             ZANUM     ,ZUC authentication hardware accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x10 8.--11. " ZENUM   ,ZUC encryption hardware accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 4.--7. "             SNW9NUM ,SNOW-f9 hardware accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 0.--3. "             CRCNUM    ,CRC hardware accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x14 "CHANUM_LS,CHA Number Register Least Significant Half"
bitfld.long 0x14 28.--31. " PKNUM   ,Public key number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 24.--27. "             KASNUM  ,Kasumi f8/f9 number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 20.--23. "             SNW8NUM   ,SNOW-f8 number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x14 16.--19. " RNGNUM  ,Random number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 12.--15. "             MDNUM   ,Message digest number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 8.--11. "             ARC4NUM   ,DES accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x14 4.--7. " DESNUM  ,DES accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x14 0.--3. "             AESNUM  ,AES accelerator number of copies implemented" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 15.
tree "Job Ring Registers"
tree "Job Ring 0"
group.quad 0x10000++0x07
line.quad 0x00 "IRBAR_JR0,Input Ring Base Address Register For Job Ring 0"
hexmask.quad 0x00 0.--48. 0x01 " IRBA         ,Input ring base address"
newline
group.long (0x10000+0x0C)++0x03
line.long 0x00 "IRSR_JR0,Input Ring Size Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " IRS  ,Input ring size"
group.long (0x10000+0x14)++0x03
line.long 0x00 "IRSAR_JR0,Input Ring Slots Available Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " IRSA ,Input ring slots available"
group.long (0x10000+0x1C)++0x03
line.long 0x00 "IRJAR_JR0,Input Ring Jobs Added Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " IRJA ,Input ring jobs added"
newline
group.quad (0x10000+0x20)++0x07
line.quad 0x00 "ORBAR_JR0,Output Ring Base Address Register For Job Ring 0"
hexmask.quad 0x00 0.--48. 0x01 " ORBA         ,Output ring base address"
newline
group.long (0x10000+0x2C)++0x03
line.long 0x00 "ORSR_JR0,Output Ring Size Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " ORS          ,Output ring size"
group.long (0x10000+0x34)++0x03
line.long 0x00 "ORJRR_JR0,Output Ring Jobs Removed Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " ORJR         ,Output ring jobs removed"
group.long (0x10000+0x3C)++0x03
line.long 0x00 "ORSFR_JR0,Output Ring Slots Full Register For Job Ring 0"
hexmask.long.word 0x00 0.--9. 1. " ORSF         ,Output ring slots full"
if (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x00)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR0,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x10000000)||(((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR01,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
hexmask.long.byte 0x00 0.--7. 1. "  ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x20000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR02,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
bitfld.long 0x00 4.--7. "                         CHAID        ,Algorithm that generated the error" "CCB,AESA,DESA,,MDHA,RNG,SNOWf8,KFHA f8/9,PKHA,CRCA,SNOWf9,ZUCE,ZUCA,?..."
bitfld.long 0x00 0.--3. "          ERRID ,Descriptor error ID" "None,Mode,Data size,Key size/Instantiate,Not instantiated/A size,Test instantiate/B size,Prediction resistance/Data out of sequence /ECC F2M,Prediction resistance and test request/Divide by 0,Modulus even,Key parity/Secure Key generation,ICV check failed,Hardware,CCM AAD size/Continuous check/Invalid key write,Class 1 or class 2 CHA is not reset,Invalid CHA combination selected,Invalid CHA"
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x30000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR03,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         LOCAL_OFFSET ,User defined value"
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x40000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR04,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x60000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR06,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 8.--11. "  NADDR        ,Number of descriptor addresses requested" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "            ERROR ,Error code"
elif (((per.l(ad:0x08000000+0x10000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x10000+0x44)++0x03
line.long 0x00 "JRSTAR_JR07,Job Ring Output Status Register For Job Ring 0"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         COND         ,PKHA/Math condition codes field from JUMP HALT command"
endif
group.long (0x10000+0x4C)++0x03
line.long 0x00 "JRINTR_JR0,Job Ring Interrupt Status Register For Job Ring 0"
hexmask.long.word 0x00 16.--29. 1. " ERR_ORWI     ,Output ring write index with error"
rbitfld.long 0x00 8.--12. "                       ERR_TYPE     ,Error type" ",Error writing status to Output Ring,,Bad input ring base address,Bad output ring base address,Invalid write to IRBAR_JR or IRSR_JR,Invalid write to ORBAR_JR or ORSR_JR,Job Ring reset released before halted,ORJRR > ORSFR,IRJAR > IRSAR,Writing ORSF > ORS,Writing IRSA > IRS,Writing ORWI > ORS in bytes,Writing IRRI > IRS in bytes,Writing IRSA when ring is active,Writing IRRI when ring is active,Writing ORSF when ring is active,Writing ORWI when ring is active,?..."
newline
eventfld.long 0x00 5. " EXIT_FAIL    ,Exit secmon fail state" "Not exited,Exited"
eventfld.long 0x00 4. "                 ENTER_FAIL   ,Enter secmon fail state" "Not entered,Entered"
newline
eventfld.long 0x00 3. " HALT[1]      ,Halt the job ring 1" ",Requested"
eventfld.long 0x00 2. "                  HALT[0]      ,Halt the job ring 0" ",Flushed-Halted/Clear"
newline
eventfld.long 0x00 1. " JRE          ,Job ring error" "No error,Error"
eventfld.long 0x00 0. "                   JRI          ,Job ring interrupt" "No interrupt,Interrupt"
group.long (0x10000+0x50)++0x03
line.long 0x00 "JRCFGR_JR0_MS,Job Ring Configuration Register For Job Ring 0 Most Significant Half"
bitfld.long 0x00 30. " INCL_SEQ_OUT ,Include sequence out length" "Not included,Included"
bitfld.long 0x00 29. "               FAIL_MODE    ,Fail mode control" "Halt,Continue"
group.long (0x10000+0x54)++0x03
line.long 0x00 "JRCFGR_JR0_LS,Job Ring Configuration Register For Job Ring 0 Least Significant Half"
hexmask.long.word 0x00 16.--31. 1. " ICTT         ,Interrupt coalescing timer threshold"
hexmask.long.byte 0x00 8.--15. 1. "                       ICDCT        ,Interrupt coalescing descriptor count threshold"
newline
bitfld.long 0x00 1. " ICEN         ,Interrupt coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   IMSK         ,Interrupt mask" "Not masked,Masked"
group.long (0x10000+0x5C)++0x03
line.long 0x00 "IRRIR_JR0,Input Ring Read Index Register For Job Ring 0"
hexmask.long.word 0x00 0.--12. 1. " IRRI         ,Input ring read index"
group.long (0x10000+0x64)++0x03
line.long 0x00 "ORWIR_JR0,Output Ring Write Index Register For Job Ring 0"
hexmask.long.word 0x00 0.--13. 1. " ORWI         ,Output ring write index"
wgroup.long (0x10000+0x6C)++0x03
line.long 0x00 "JRCR_JR0,Job Ring Command Register For Job Ring 0"
bitfld.long 0x00 1. " PARK         ,Park" "No effect,Park"
bitfld.long 0x00 0. "                  RESET        ,Reset" "No effect,Rese"
newline
hgroup.long (0x10000+0x704)++0x03
hide.long 0x00 "JR0AAV,Job Ring 0 Address-Array Valid Register"
in
newline
hgroup.quad (0x10000+0x800)++0x07
hide.quad 0x00 "JR0AAAV0,Job Ring 0 Address-Array Address 0 Register"
in
newline
rgroup.quad (0x10000+0x808)++0x37
line.quad 0x00 "JR0AAAV1,Job Ring 0 Address-Array Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x08 "JR0AAAV2,Job Ring 0 Address-Array Address 2 Register"
hexmask.quad 0x08 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x10 "JR0AAAV3,Job Ring 0 Address-Array Address 3 Register"
hexmask.quad 0x10 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x18 "JR0AAAV4,Job Ring 0 Address-Array Address 4 Register"
hexmask.quad 0x18 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x20 "JR0AAAV5,Job Ring 0 Address-Array Address 5 Register"
hexmask.quad 0x20 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x28 "JR0AAAV6,Job Ring 0 Address-Array Address 6 Register"
hexmask.quad 0x28 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x30 "JR0AAAV7,Job Ring 0 Address-Array Address 7 Register"
hexmask.quad 0x30 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
rgroup.long (0x10000+0xE00)++0x03
line.long 0x00 "REIR0JR0,Recoverable Error Interrupt Record 0 For Job Ring 0"
bitfld.long 0x00 31. "         MISS    ,Miss" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "      TYPE   ,Type of the recoverable error" ",Memory access,?..."
rgroup.quad (0x10000+0xE08)++0x07
line.quad 0x00 "REIR2JR0,Recoverable Error Interrupt Record 2 For Job Ring 0"
rgroup.long (0x10000+0xE10)++0x03
line.long 0x00 "REIR4JR0,Recoverable Error Interrupt Record 4 For Job Ring 0"
bitfld.long 0x00 30.--31. "         MIX     ,Memory interface index" "0,1,2,3"
bitfld.long 0x00 28.--29. "                 ERR    ,AXI error response" "0,1,2,3"
newline
bitfld.long 0x00 25. "         BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "                 PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. "         RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "                 AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. "         AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "                ICID   ,ICID"
rgroup.long (0x10000+0xE14)++0x03
line.long 0x00 "REIR5JR0,Recoverable Error Interrupt Record 5 For Job Ring 0"
bitfld.long 0x00 24. "         SAFE    ,Safe" "0,1"
bitfld.long 0x00 16.--19. "                 BID    ,Block identifier of the source of the AXI transaction" "General registers,Job Ring registers,Job Ring registers,Job Ring registers,Job Ring registers,AIOP interface registers,Real-time integrity check registers,Queue interface registers,DECO 0/CHA CCB 0,DECO 1/CHA CCB 1,DECO 2/CHA CCB 2,DECO 3/CHA CCB 3,DECO 4/CHA CCB 4,DECO 5/CHA CCB 5,?..."
tree.end
tree "Job Ring 1"
group.quad 0x20000++0x07
line.quad 0x00 "IRBAR_JR1,Input Ring Base Address Register For Job Ring 1"
hexmask.quad 0x00 0.--48. 0x01 " IRBA         ,Input ring base address"
newline
group.long (0x20000+0x0C)++0x03
line.long 0x00 "IRSR_JR1,Input Ring Size Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " IRS  ,Input ring size"
group.long (0x20000+0x14)++0x03
line.long 0x00 "IRSAR_JR1,Input Ring Slots Available Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " IRSA ,Input ring slots available"
group.long (0x20000+0x1C)++0x03
line.long 0x00 "IRJAR_JR1,Input Ring Jobs Added Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " IRJA ,Input ring jobs added"
newline
group.quad (0x20000+0x20)++0x07
line.quad 0x00 "ORBAR_JR1,Output Ring Base Address Register For Job Ring 1"
hexmask.quad 0x00 0.--48. 0x01 " ORBA         ,Output ring base address"
newline
group.long (0x20000+0x2C)++0x03
line.long 0x00 "ORSR_JR1,Output Ring Size Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " ORS          ,Output ring size"
group.long (0x20000+0x34)++0x03
line.long 0x00 "ORJRR_JR1,Output Ring Jobs Removed Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " ORJR         ,Output ring jobs removed"
group.long (0x20000+0x3C)++0x03
line.long 0x00 "ORSFR_JR1,Output Ring Slots Full Register For Job Ring 1"
hexmask.long.word 0x00 0.--9. 1. " ORSF         ,Output ring slots full"
if (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x00)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR1,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x10000000)||(((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR11,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
hexmask.long.byte 0x00 0.--7. 1. "  ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x20000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR12,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
bitfld.long 0x00 4.--7. "                         CHAID        ,Algorithm that generated the error" "CCB,AESA,DESA,,MDHA,RNG,SNOWf8,KFHA f8/9,PKHA,CRCA,SNOWf9,ZUCE,ZUCA,?..."
bitfld.long 0x00 0.--3. "          ERRID ,Descriptor error ID" "None,Mode,Data size,Key size/Instantiate,Not instantiated/A size,Test instantiate/B size,Prediction resistance/Data out of sequence /ECC F2M,Prediction resistance and test request/Divide by 0,Modulus even,Key parity/Secure Key generation,ICV check failed,Hardware,CCM AAD size/Continuous check/Invalid key write,Class 1 or class 2 CHA is not reset,Invalid CHA combination selected,Invalid CHA"
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x30000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR13,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         LOCAL_OFFSET ,User defined value"
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x40000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR14,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x60000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR16,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 8.--11. "  NADDR        ,Number of descriptor addresses requested" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "            ERROR ,Error code"
elif (((per.l(ad:0x08000000+0x20000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x20000+0x44)++0x03
line.long 0x00 "JRSTAR_JR17,Job Ring Output Status Register For Job Ring 1"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         COND         ,PKHA/Math condition codes field from JUMP HALT command"
endif
group.long (0x20000+0x4C)++0x03
line.long 0x00 "JRINTR_JR1,Job Ring Interrupt Status Register For Job Ring 1"
hexmask.long.word 0x00 16.--29. 1. " ERR_ORWI     ,Output ring write index with error"
rbitfld.long 0x00 8.--12. "                       ERR_TYPE     ,Error type" ",Error writing status to Output Ring,,Bad input ring base address,Bad output ring base address,Invalid write to IRBAR_JR or IRSR_JR,Invalid write to ORBAR_JR or ORSR_JR,Job Ring reset released before halted,ORJRR > ORSFR,IRJAR > IRSAR,Writing ORSF > ORS,Writing IRSA > IRS,Writing ORWI > ORS in bytes,Writing IRRI > IRS in bytes,Writing IRSA when ring is active,Writing IRRI when ring is active,Writing ORSF when ring is active,Writing ORWI when ring is active,?..."
newline
eventfld.long 0x00 5. " EXIT_FAIL    ,Exit secmon fail state" "Not exited,Exited"
eventfld.long 0x00 4. "                 ENTER_FAIL   ,Enter secmon fail state" "Not entered,Entered"
newline
eventfld.long 0x00 3. " HALT[1]      ,Halt the job ring 1" ",Requested"
eventfld.long 0x00 2. "                  HALT[0]      ,Halt the job ring 0" ",Flushed-Halted/Clear"
newline
eventfld.long 0x00 1. " JRE          ,Job ring error" "No error,Error"
eventfld.long 0x00 0. "                   JRI          ,Job ring interrupt" "No interrupt,Interrupt"
group.long (0x20000+0x50)++0x03
line.long 0x00 "JRCFGR_JR1_MS,Job Ring Configuration Register For Job Ring 1 Most Significant Half"
bitfld.long 0x00 30. " INCL_SEQ_OUT ,Include sequence out length" "Not included,Included"
bitfld.long 0x00 29. "               FAIL_MODE    ,Fail mode control" "Halt,Continue"
group.long (0x20000+0x54)++0x03
line.long 0x00 "JRCFGR_JR1_LS,Job Ring Configuration Register For Job Ring 1 Least Significant Half"
hexmask.long.word 0x00 16.--31. 1. " ICTT         ,Interrupt coalescing timer threshold"
hexmask.long.byte 0x00 8.--15. 1. "                       ICDCT        ,Interrupt coalescing descriptor count threshold"
newline
bitfld.long 0x00 1. " ICEN         ,Interrupt coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   IMSK         ,Interrupt mask" "Not masked,Masked"
group.long (0x20000+0x5C)++0x03
line.long 0x00 "IRRIR_JR1,Input Ring Read Index Register For Job Ring 1"
hexmask.long.word 0x00 0.--12. 1. " IRRI         ,Input ring read index"
group.long (0x20000+0x64)++0x03
line.long 0x00 "ORWIR_JR1,Output Ring Write Index Register For Job Ring 1"
hexmask.long.word 0x00 0.--13. 1. " ORWI         ,Output ring write index"
wgroup.long (0x20000+0x6C)++0x03
line.long 0x00 "JRCR_JR1,Job Ring Command Register For Job Ring 1"
bitfld.long 0x00 1. " PARK         ,Park" "No effect,Park"
bitfld.long 0x00 0. "                  RESET        ,Reset" "No effect,Rese"
newline
hgroup.long (0x20000+0x704)++0x03
hide.long 0x00 "JR1AAV,Job Ring 1 Address-Array Valid Register"
in
newline
hgroup.quad (0x20000+0x800)++0x07
hide.quad 0x00 "JR1AAAV0,Job Ring 1 Address-Array Address 0 Register"
in
newline
rgroup.quad (0x20000+0x808)++0x37
line.quad 0x00 "JR1AAAV1,Job Ring 1 Address-Array Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x08 "JR1AAAV2,Job Ring 1 Address-Array Address 2 Register"
hexmask.quad 0x08 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x10 "JR1AAAV3,Job Ring 1 Address-Array Address 3 Register"
hexmask.quad 0x10 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x18 "JR1AAAV4,Job Ring 1 Address-Array Address 4 Register"
hexmask.quad 0x18 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x20 "JR1AAAV5,Job Ring 1 Address-Array Address 5 Register"
hexmask.quad 0x20 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x28 "JR1AAAV6,Job Ring 1 Address-Array Address 6 Register"
hexmask.quad 0x28 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x30 "JR1AAAV7,Job Ring 1 Address-Array Address 7 Register"
hexmask.quad 0x30 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
rgroup.long (0x20000+0xE00)++0x03
line.long 0x00 "REIR0JR1,Recoverable Error Interrupt Record 0 For Job Ring 1"
bitfld.long 0x00 31. "         MISS    ,Miss" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "      TYPE   ,Type of the recoverable error" ",Memory access,?..."
rgroup.quad (0x20000+0xE08)++0x07
line.quad 0x00 "REIR2JR1,Recoverable Error Interrupt Record 2 For Job Ring 1"
rgroup.long (0x20000+0xE10)++0x03
line.long 0x00 "REIR4JR1,Recoverable Error Interrupt Record 4 For Job Ring 1"
bitfld.long 0x00 30.--31. "         MIX     ,Memory interface index" "0,1,2,3"
bitfld.long 0x00 28.--29. "                 ERR    ,AXI error response" "0,1,2,3"
newline
bitfld.long 0x00 25. "         BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "                 PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. "         RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "                 AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. "         AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "                ICID   ,ICID"
rgroup.long (0x20000+0xE14)++0x03
line.long 0x00 "REIR5JR1,Recoverable Error Interrupt Record 5 For Job Ring 1"
bitfld.long 0x00 24. "         SAFE    ,Safe" "0,1"
bitfld.long 0x00 16.--19. "                 BID    ,Block identifier of the source of the AXI transaction" "General registers,Job Ring registers,Job Ring registers,Job Ring registers,Job Ring registers,AIOP interface registers,Real-time integrity check registers,Queue interface registers,DECO 0/CHA CCB 0,DECO 1/CHA CCB 1,DECO 2/CHA CCB 2,DECO 3/CHA CCB 3,DECO 4/CHA CCB 4,DECO 5/CHA CCB 5,?..."
tree.end
tree "Job Ring 2"
group.quad 0x30000++0x07
line.quad 0x00 "IRBAR_JR2,Input Ring Base Address Register For Job Ring 2"
hexmask.quad 0x00 0.--48. 0x01 " IRBA         ,Input ring base address"
newline
group.long (0x30000+0x0C)++0x03
line.long 0x00 "IRSR_JR2,Input Ring Size Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " IRS  ,Input ring size"
group.long (0x30000+0x14)++0x03
line.long 0x00 "IRSAR_JR2,Input Ring Slots Available Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " IRSA ,Input ring slots available"
group.long (0x30000+0x1C)++0x03
line.long 0x00 "IRJAR_JR2,Input Ring Jobs Added Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " IRJA ,Input ring jobs added"
newline
group.quad (0x30000+0x20)++0x07
line.quad 0x00 "ORBAR_JR2,Output Ring Base Address Register For Job Ring 2"
hexmask.quad 0x00 0.--48. 0x01 " ORBA         ,Output ring base address"
newline
group.long (0x30000+0x2C)++0x03
line.long 0x00 "ORSR_JR2,Output Ring Size Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " ORS          ,Output ring size"
group.long (0x30000+0x34)++0x03
line.long 0x00 "ORJRR_JR2,Output Ring Jobs Removed Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " ORJR         ,Output ring jobs removed"
group.long (0x30000+0x3C)++0x03
line.long 0x00 "ORSFR_JR2,Output Ring Slots Full Register For Job Ring 2"
hexmask.long.word 0x00 0.--9. 1. " ORSF         ,Output ring slots full"
if (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x00)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR2,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x10000000)||(((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR21,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
hexmask.long.byte 0x00 0.--7. 1. "  ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x20000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR22,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
bitfld.long 0x00 4.--7. "                         CHAID        ,Algorithm that generated the error" "CCB,AESA,DESA,,MDHA,RNG,SNOWf8,KFHA f8/9,PKHA,CRCA,SNOWf9,ZUCE,ZUCA,?..."
bitfld.long 0x00 0.--3. "          ERRID ,Descriptor error ID" "None,Mode,Data size,Key size/Instantiate,Not instantiated/A size,Test instantiate/B size,Prediction resistance/Data out of sequence /ECC F2M,Prediction resistance and test request/Divide by 0,Modulus even,Key parity/Secure Key generation,ICV check failed,Hardware,CCM AAD size/Continuous check/Invalid key write,Class 1 or class 2 CHA is not reset,Invalid CHA combination selected,Invalid CHA"
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x30000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR23,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         LOCAL_OFFSET ,User defined value"
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x40000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR24,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x60000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR26,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 8.--11. "  NADDR        ,Number of descriptor addresses requested" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "            ERROR ,Error code"
elif (((per.l(ad:0x08000000+0x30000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x30000+0x44)++0x03
line.long 0x00 "JRSTAR_JR27,Job Ring Output Status Register For Job Ring 2"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         COND         ,PKHA/Math condition codes field from JUMP HALT command"
endif
group.long (0x30000+0x4C)++0x03
line.long 0x00 "JRINTR_JR2,Job Ring Interrupt Status Register For Job Ring 2"
hexmask.long.word 0x00 16.--29. 1. " ERR_ORWI     ,Output ring write index with error"
rbitfld.long 0x00 8.--12. "                       ERR_TYPE     ,Error type" ",Error writing status to Output Ring,,Bad input ring base address,Bad output ring base address,Invalid write to IRBAR_JR or IRSR_JR,Invalid write to ORBAR_JR or ORSR_JR,Job Ring reset released before halted,ORJRR > ORSFR,IRJAR > IRSAR,Writing ORSF > ORS,Writing IRSA > IRS,Writing ORWI > ORS in bytes,Writing IRRI > IRS in bytes,Writing IRSA when ring is active,Writing IRRI when ring is active,Writing ORSF when ring is active,Writing ORWI when ring is active,?..."
newline
eventfld.long 0x00 5. " EXIT_FAIL    ,Exit secmon fail state" "Not exited,Exited"
eventfld.long 0x00 4. "                 ENTER_FAIL   ,Enter secmon fail state" "Not entered,Entered"
newline
eventfld.long 0x00 3. " HALT[1]      ,Halt the job ring 1" ",Requested"
eventfld.long 0x00 2. "                  HALT[0]      ,Halt the job ring 0" ",Flushed-Halted/Clear"
newline
eventfld.long 0x00 1. " JRE          ,Job ring error" "No error,Error"
eventfld.long 0x00 0. "                   JRI          ,Job ring interrupt" "No interrupt,Interrupt"
group.long (0x30000+0x50)++0x03
line.long 0x00 "JRCFGR_JR2_MS,Job Ring Configuration Register For Job Ring 2 Most Significant Half"
bitfld.long 0x00 30. " INCL_SEQ_OUT ,Include sequence out length" "Not included,Included"
bitfld.long 0x00 29. "               FAIL_MODE    ,Fail mode control" "Halt,Continue"
group.long (0x30000+0x54)++0x03
line.long 0x00 "JRCFGR_JR2_LS,Job Ring Configuration Register For Job Ring 2 Least Significant Half"
hexmask.long.word 0x00 16.--31. 1. " ICTT         ,Interrupt coalescing timer threshold"
hexmask.long.byte 0x00 8.--15. 1. "                       ICDCT        ,Interrupt coalescing descriptor count threshold"
newline
bitfld.long 0x00 1. " ICEN         ,Interrupt coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   IMSK         ,Interrupt mask" "Not masked,Masked"
group.long (0x30000+0x5C)++0x03
line.long 0x00 "IRRIR_JR2,Input Ring Read Index Register For Job Ring 2"
hexmask.long.word 0x00 0.--12. 1. " IRRI         ,Input ring read index"
group.long (0x30000+0x64)++0x03
line.long 0x00 "ORWIR_JR2,Output Ring Write Index Register For Job Ring 2"
hexmask.long.word 0x00 0.--13. 1. " ORWI         ,Output ring write index"
wgroup.long (0x30000+0x6C)++0x03
line.long 0x00 "JRCR_JR2,Job Ring Command Register For Job Ring 2"
bitfld.long 0x00 1. " PARK         ,Park" "No effect,Park"
bitfld.long 0x00 0. "                  RESET        ,Reset" "No effect,Rese"
newline
hgroup.long (0x30000+0x704)++0x03
hide.long 0x00 "JR2AAV,Job Ring 2 Address-Array Valid Register"
in
newline
hgroup.quad (0x30000+0x800)++0x07
hide.quad 0x00 "JR2AAAV0,Job Ring 2 Address-Array Address 0 Register"
in
newline
rgroup.quad (0x30000+0x808)++0x37
line.quad 0x00 "JR2AAAV1,Job Ring 2 Address-Array Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x08 "JR2AAAV2,Job Ring 2 Address-Array Address 2 Register"
hexmask.quad 0x08 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x10 "JR2AAAV3,Job Ring 2 Address-Array Address 3 Register"
hexmask.quad 0x10 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x18 "JR2AAAV4,Job Ring 2 Address-Array Address 4 Register"
hexmask.quad 0x18 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x20 "JR2AAAV5,Job Ring 2 Address-Array Address 5 Register"
hexmask.quad 0x20 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x28 "JR2AAAV6,Job Ring 2 Address-Array Address 6 Register"
hexmask.quad 0x28 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x30 "JR2AAAV7,Job Ring 2 Address-Array Address 7 Register"
hexmask.quad 0x30 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
rgroup.long (0x30000+0xE00)++0x03
line.long 0x00 "REIR0JR2,Recoverable Error Interrupt Record 0 For Job Ring 2"
bitfld.long 0x00 31. "         MISS    ,Miss" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "      TYPE   ,Type of the recoverable error" ",Memory access,?..."
rgroup.quad (0x30000+0xE08)++0x07
line.quad 0x00 "REIR2JR2,Recoverable Error Interrupt Record 2 For Job Ring 2"
rgroup.long (0x30000+0xE10)++0x03
line.long 0x00 "REIR4JR2,Recoverable Error Interrupt Record 4 For Job Ring 2"
bitfld.long 0x00 30.--31. "         MIX     ,Memory interface index" "0,1,2,3"
bitfld.long 0x00 28.--29. "                 ERR    ,AXI error response" "0,1,2,3"
newline
bitfld.long 0x00 25. "         BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "                 PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. "         RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "                 AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. "         AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "                ICID   ,ICID"
rgroup.long (0x30000+0xE14)++0x03
line.long 0x00 "REIR5JR2,Recoverable Error Interrupt Record 5 For Job Ring 2"
bitfld.long 0x00 24. "         SAFE    ,Safe" "0,1"
bitfld.long 0x00 16.--19. "                 BID    ,Block identifier of the source of the AXI transaction" "General registers,Job Ring registers,Job Ring registers,Job Ring registers,Job Ring registers,AIOP interface registers,Real-time integrity check registers,Queue interface registers,DECO 0/CHA CCB 0,DECO 1/CHA CCB 1,DECO 2/CHA CCB 2,DECO 3/CHA CCB 3,DECO 4/CHA CCB 4,DECO 5/CHA CCB 5,?..."
tree.end
tree "Job Ring 3"
group.quad 0x40000++0x07
line.quad 0x00 "IRBAR_JR3,Input Ring Base Address Register For Job Ring 3"
hexmask.quad 0x00 0.--48. 0x01 " IRBA         ,Input ring base address"
newline
group.long (0x40000+0x0C)++0x03
line.long 0x00 "IRSR_JR3,Input Ring Size Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " IRS  ,Input ring size"
group.long (0x40000+0x14)++0x03
line.long 0x00 "IRSAR_JR3,Input Ring Slots Available Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " IRSA ,Input ring slots available"
group.long (0x40000+0x1C)++0x03
line.long 0x00 "IRJAR_JR3,Input Ring Jobs Added Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " IRJA ,Input ring jobs added"
newline
group.quad (0x40000+0x20)++0x07
line.quad 0x00 "ORBAR_JR3,Output Ring Base Address Register For Job Ring 3"
hexmask.quad 0x00 0.--48. 0x01 " ORBA         ,Output ring base address"
newline
group.long (0x40000+0x2C)++0x03
line.long 0x00 "ORSR_JR3,Output Ring Size Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " ORS          ,Output ring size"
group.long (0x40000+0x34)++0x03
line.long 0x00 "ORJRR_JR3,Output Ring Jobs Removed Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " ORJR         ,Output ring jobs removed"
group.long (0x40000+0x3C)++0x03
line.long 0x00 "ORSFR_JR3,Output Ring Slots Full Register For Job Ring 3"
hexmask.long.word 0x00 0.--9. 1. " ORSF         ,Output ring slots full"
if (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x00)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR3,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x10000000)||(((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR31,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
hexmask.long.byte 0x00 0.--7. 1. "  ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x20000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR32,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
bitfld.long 0x00 4.--7. "                         CHAID        ,Algorithm that generated the error" "CCB,AESA,DESA,,MDHA,RNG,SNOWf8,KFHA f8/9,PKHA,CRCA,SNOWf9,ZUCE,ZUCA,?..."
bitfld.long 0x00 0.--3. "          ERRID ,Descriptor error ID" "None,Mode,Data size,Key size/Instantiate,Not instantiated/A size,Test instantiate/B size,Prediction resistance/Data out of sequence /ECC F2M,Prediction resistance and test request/Divide by 0,Modulus even,Key parity/Secure Key generation,ICV check failed,Hardware,CCM AAD size/Continuous check/Invalid key write,Class 1 or class 2 CHA is not reset,Invalid CHA combination selected,Invalid CHA"
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x30000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR33,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         LOCAL_OFFSET ,User defined value"
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x40000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR34,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to an error within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         ERROR        ,Error code"
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x60000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR36,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 8.--11. "  NADDR        ,Number of descriptor addresses requested" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--7. 1. "            ERROR ,Error code"
elif (((per.l(ad:0x08000000+0x40000+0x44))&0xF0000000)==0x70000000)
rgroup.long (0x40000+0x44)++0x03
line.long 0x00 "JRSTAR_JR37,Job Ring Output Status Register For Job Ring 3"
bitfld.long 0x00 28.--31. " SSRC         ,Status source" "None,AI,CCB,Jump Halt User,DECO,QI,Job Ring,Jump Halt Condition Codes,?..."
bitfld.long 0x00 27. "  JMP          ,Jump to another descriptor" "Not occurred,Occurred"
bitfld.long 0x00 26. "  MLK   ,Memory leak" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--15. 1. " DESCINDEX    ,Index to JUMP HALT command within the descriptor (number of words)"
hexmask.long.byte 0x00 0.--7. 1. "                         COND         ,PKHA/Math condition codes field from JUMP HALT command"
endif
group.long (0x40000+0x4C)++0x03
line.long 0x00 "JRINTR_JR3,Job Ring Interrupt Status Register For Job Ring 3"
hexmask.long.word 0x00 16.--29. 1. " ERR_ORWI     ,Output ring write index with error"
rbitfld.long 0x00 8.--12. "                       ERR_TYPE     ,Error type" ",Error writing status to Output Ring,,Bad input ring base address,Bad output ring base address,Invalid write to IRBAR_JR or IRSR_JR,Invalid write to ORBAR_JR or ORSR_JR,Job Ring reset released before halted,ORJRR > ORSFR,IRJAR > IRSAR,Writing ORSF > ORS,Writing IRSA > IRS,Writing ORWI > ORS in bytes,Writing IRRI > IRS in bytes,Writing IRSA when ring is active,Writing IRRI when ring is active,Writing ORSF when ring is active,Writing ORWI when ring is active,?..."
newline
eventfld.long 0x00 5. " EXIT_FAIL    ,Exit secmon fail state" "Not exited,Exited"
eventfld.long 0x00 4. "                 ENTER_FAIL   ,Enter secmon fail state" "Not entered,Entered"
newline
eventfld.long 0x00 3. " HALT[1]      ,Halt the job ring 1" ",Requested"
eventfld.long 0x00 2. "                  HALT[0]      ,Halt the job ring 0" ",Flushed-Halted/Clear"
newline
eventfld.long 0x00 1. " JRE          ,Job ring error" "No error,Error"
eventfld.long 0x00 0. "                   JRI          ,Job ring interrupt" "No interrupt,Interrupt"
group.long (0x40000+0x50)++0x03
line.long 0x00 "JRCFGR_JR3_MS,Job Ring Configuration Register For Job Ring 3 Most Significant Half"
bitfld.long 0x00 30. " INCL_SEQ_OUT ,Include sequence out length" "Not included,Included"
bitfld.long 0x00 29. "               FAIL_MODE    ,Fail mode control" "Halt,Continue"
group.long (0x40000+0x54)++0x03
line.long 0x00 "JRCFGR_JR3_LS,Job Ring Configuration Register For Job Ring 3 Least Significant Half"
hexmask.long.word 0x00 16.--31. 1. " ICTT         ,Interrupt coalescing timer threshold"
hexmask.long.byte 0x00 8.--15. 1. "                       ICDCT        ,Interrupt coalescing descriptor count threshold"
newline
bitfld.long 0x00 1. " ICEN         ,Interrupt coalescing enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                   IMSK         ,Interrupt mask" "Not masked,Masked"
group.long (0x40000+0x5C)++0x03
line.long 0x00 "IRRIR_JR3,Input Ring Read Index Register For Job Ring 3"
hexmask.long.word 0x00 0.--12. 1. " IRRI         ,Input ring read index"
group.long (0x40000+0x64)++0x03
line.long 0x00 "ORWIR_JR3,Output Ring Write Index Register For Job Ring 3"
hexmask.long.word 0x00 0.--13. 1. " ORWI         ,Output ring write index"
wgroup.long (0x40000+0x6C)++0x03
line.long 0x00 "JRCR_JR3,Job Ring Command Register For Job Ring 3"
bitfld.long 0x00 1. " PARK         ,Park" "No effect,Park"
bitfld.long 0x00 0. "                  RESET        ,Reset" "No effect,Rese"
newline
hgroup.long (0x40000+0x704)++0x03
hide.long 0x00 "JR3AAV,Job Ring 3 Address-Array Valid Register"
in
newline
hgroup.quad (0x40000+0x800)++0x07
hide.quad 0x00 "JR3AAAV0,Job Ring 3 Address-Array Address 0 Register"
in
newline
rgroup.quad (0x40000+0x808)++0x37
line.quad 0x00 "JR3AAAV1,Job Ring 3 Address-Array Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x08 "JR3AAAV2,Job Ring 3 Address-Array Address 2 Register"
hexmask.quad 0x08 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x10 "JR3AAAV3,Job Ring 3 Address-Array Address 3 Register"
hexmask.quad 0x10 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x18 "JR3AAAV4,Job Ring 3 Address-Array Address 4 Register"
hexmask.quad 0x18 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x20 "JR3AAAV5,Job Ring 3 Address-Array Address 5 Register"
hexmask.quad 0x20 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x28 "JR3AAAV6,Job Ring 3 Address-Array Address 6 Register"
hexmask.quad 0x28 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
line.quad 0x30 "JR3AAAV7,Job Ring 3 Address-Array Address 7 Register"
hexmask.quad 0x30 0.--48. 0x01 " JD_ADDR ,Job descriptor address"
rgroup.long (0x40000+0xE00)++0x03
line.long 0x00 "REIR0JR3,Recoverable Error Interrupt Record 0 For Job Ring 3"
bitfld.long 0x00 31. "         MISS    ,Miss" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "      TYPE   ,Type of the recoverable error" ",Memory access,?..."
rgroup.quad (0x40000+0xE08)++0x07
line.quad 0x00 "REIR2JR3,Recoverable Error Interrupt Record 2 For Job Ring 3"
rgroup.long (0x40000+0xE10)++0x03
line.long 0x00 "REIR4JR3,Recoverable Error Interrupt Record 4 For Job Ring 3"
bitfld.long 0x00 30.--31. "         MIX     ,Memory interface index" "0,1,2,3"
bitfld.long 0x00 28.--29. "                 ERR    ,AXI error response" "0,1,2,3"
newline
bitfld.long 0x00 25. "         BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "                 PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. "         RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "                 AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. "         AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "                ICID   ,ICID"
rgroup.long (0x40000+0xE14)++0x03
line.long 0x00 "REIR5JR3,Recoverable Error Interrupt Record 5 For Job Ring 3"
bitfld.long 0x00 24. "         SAFE    ,Safe" "0,1"
bitfld.long 0x00 16.--19. "                 BID    ,Block identifier of the source of the AXI transaction" "General registers,Job Ring registers,Job Ring registers,Job Ring registers,Job Ring registers,AIOP interface registers,Real-time integrity check registers,Queue interface registers,DECO 0/CHA CCB 0,DECO 1/CHA CCB 1,DECO 2/CHA CCB 2,DECO 3/CHA CCB 3,DECO 4/CHA CCB 4,DECO 5/CHA CCB 5,?..."
tree.end
tree.end
width 9.
tree "AI (Advanced IO Processor Interface) Registers"
group.long 0x50000++0x07
line.long 0x00 "AICFG,AIOP Interface Configuration Register"
bitfld.long 0x00 28. " EOP   ,Enable order preservation" "Disabled,Enabled"
bitfld.long 0x00 24. "      RSIDE   ,Report SEC ID on error" "Not reported,Reported"
line.long 0x04 "AICTL,AIOP Interface Control Register"
bitfld.long 0x04 16. " CROV  ,Critical resource override" "No override,Override"
bitfld.long 0x04 3. "   FLUSH   ,Flush the AI jobs" "Not requested,Requested"
newline
bitfld.long 0x04 2. " SOE   ,Stop on error" "Not requested,Requested"
bitfld.long 0x04 1. " STOP    ,Stop" "Not requested,Requested"
newline
bitfld.long 0x04 0. " DQEN  ,Dequeue enable" "Disabled,Enabled"
rgroup.long 0x5000C++0x03
line.long 0x00 "AISTA,AIOP Interface Status Register"
bitfld.long 0x00 31. " STOPD ,Stopped" "Not stopped,Stopped"
bitfld.long 0x00 30. "   STOPDOE ,Stopped on error" "Not stopped,Stopped"
tree "AIOP Interface Dequeue/Enqueue Event Filter Control Registers"
group.long 0x50030++0x03
line.long 0x00 "ADQEFC0,AIOP Interface Dequeue Event Filter Control Register 0"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50034++0x03
line.long 0x00 "ADQEFC1,AIOP Interface Dequeue Event Filter Control Register 1"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50038++0x03
line.long 0x00 "ADQEFC2,AIOP Interface Dequeue Event Filter Control Register 2"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50050++0x03
line.long 0x00 "AEQEFC0,AIOP Interface Enqueue Event Filter Control Register 0"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50054++0x03
line.long 0x00 "AEQEFC1,AIOP Interface Enqueue Event Filter Control Register 1"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x50058++0x03
line.long 0x00 "AEQEFC2,AIOP Interface Enqueue Event Filter Control Register 2"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
newline
width 21.
rgroup.long 0x50500++0x03
line.long 0x00 "JOBS_IN_USE_AI,Jobs In Use Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_IN_USE[24]      ,Job buffer 24 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 23. "         [23]       ,Job buffer 23 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 22. " [22]                 ,Job buffer 22 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 21. "         [21]       ,Job buffer 21 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 20. " [20]                 ,Job buffer 20 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 19. "         [19]       ,Job buffer 19 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 18. " [18]                 ,Job buffer 18 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 17. "         [17]       ,Job buffer 17 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 16. " [16]                 ,Job buffer 16 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 15. "         [15]       ,Job buffer 15 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 14. " [14]                 ,Job buffer 14 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 13. "         [13]       ,Job buffer 13 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 12. " [12]                 ,Job buffer 12 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 11. "         [11]       ,Job buffer 11 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 10. " [10]                 ,Job buffer 10 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 9. "         [9]        ,Job buffer 9 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 8. " [8]                  ,Job buffer 8 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 7. "         [7]        ,Job buffer 7 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 6. " [6]                  ,Job buffer 6 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 5. "         [5]        ,Job buffer 5 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 4. " [4]                  ,Job buffer 4 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 3. "         [3]        ,Job buffer 3 are in use for active AI jobs" "Not used,Used"
newline
bitfld.long 0x00 2. " [2]                  ,Job buffer 2 are in use for active AI jobs" "Not used,Used"
bitfld.long 0x00 1. "         [1]        ,Job buffer 1 are in use for active AI jobs" "Not used,Used"
rgroup.long 0x50508++0x03
line.long 0x00 "JOBS_READY_AI,Jobs Ready Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_READY[24]       ,AI jobs 24 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 23. "        [23]       ,AI jobs 23 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 22. " [22]                 ,AI jobs 22 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 21. "        [21]       ,AI jobs 21 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 20. " [20]                 ,AI jobs 20 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 19. "        [19]       ,AI jobs 19 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 18. " [18]                 ,AI jobs 18 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 17. "        [17]       ,AI jobs 17 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 16. " [16]                 ,AI jobs 16 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 15. "        [15]       ,AI jobs 15 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 14. " [14]                 ,AI jobs 14 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 13. "        [13]       ,AI jobs 13 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 12. " [12]                 ,AI jobs 12 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 11. "        [11]       ,AI jobs 11 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 10. " [10]                 ,AI jobs 10 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 9. "        [9]        ,AI jobs 9 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 8. " [8]                  ,AI jobs 8 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 7. "        [7]        ,AI jobs 7 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 6. " [6]                  ,AI jobs 6 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 5. "        [5]        ,AI jobs 5 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 4. " [4]                  ,AI jobs 4 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 3. "        [3]        ,AI jobs 3 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 2. " [2]                  ,AI jobs 2 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 1. "        [1]        ,AI jobs 1 are ready for transfer to the job queue controller" "Not ready,Ready"
rgroup.long 0x50510++0x03
line.long 0x00 "JOBS_XFR_BLK_DIS_AI,Jobs Transfer Blocking Disabled Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_XFR_BLK_DIS[24] ,AI job buffers 24 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 23. "              [23]       ,AI job buffers 23 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 22. " [22]                 ,AI job buffers 22 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 21. "              [21]       ,AI job buffers 21 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 20. " [20]                 ,AI job buffers 20 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 19. "              [19]       ,AI job buffers 19 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 18. " [18]                 ,AI job buffers 18 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 17. "              [17]       ,AI job buffers 17 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 16. " [16]                 ,AI job buffers 16 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 15. "              [15]       ,AI job buffers 15 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 14. " [14]                 ,AI job buffers 14 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 13. "              [13]       ,AI job buffers 13 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 12. " [12]                 ,AI job buffers 12 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 11. "              [11]       ,AI job buffers 11 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 10. " [10]                 ,AI job buffers 10 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 9. "              [9]        ,AI job buffers 9 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 8. " [8]                  ,AI job buffers 8 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 7. "              [7]        ,AI job buffers 7 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 6. " [6]                  ,AI job buffers 6 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 5. "              [5]        ,AI job buffers 5 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 4. " [4]                  ,AI job buffers 4 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 3. "              [3]        ,AI job buffers 3 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 2. " [2]                  ,AI job buffers 2 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 1. "              [1]        ,AI job buffers 1 hold jobs with transfer blocking disabled" "No,Yes"
rgroup.long 0x50518++0x03
line.long 0x00 "JOBS_XFRD_AI,Jobs Transferred Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_XFRD[24]        ,AI jobs 24 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 23. "  [23]       ,AI jobs 23 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 22. " [22]                 ,AI jobs 22 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 21. "  [21]       ,AI jobs 21 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 20. " [20]                 ,AI jobs 20 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 19. "  [19]       ,AI jobs 19 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 18. " [18]                 ,AI jobs 18 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 17. "  [17]       ,AI jobs 17 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 16. " [16]                 ,AI jobs 16 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 15. "  [15]       ,AI jobs 15 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 14. " [14]                 ,AI jobs 14 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 13. "  [13]       ,AI jobs 13 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 12. " [12]                 ,AI jobs 12 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 11. "  [11]       ,AI jobs 11 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 10. " [10]                 ,AI jobs 10 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 9. "  [9]        ,AI jobs 9 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 8. " [8]                  ,AI jobs 8 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 7. "  [7]        ,AI jobs 7 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 6. " [6]                  ,AI jobs 6 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 5. "  [5]        ,AI jobs 5 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 4. " [4]                  ,AI jobs 4 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 3. "  [3]        ,AI jobs 3 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 2. " [2]                  ,AI jobs 2 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 1. "  [1]        ,AI jobs 1 transferred to the job controller" "Not transferred,Transferred"
rgroup.long 0x50520++0x03
line.long 0x00 "JOBS_EXEC_AI,Jobs Executing Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_EXEC[24]        ,AI jobs 24 are currently executing" "Not executing,Executing"
bitfld.long 0x00 23. "    [23]       ,AI jobs 23 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 22. " [22]                 ,AI jobs 22 are currently executing" "Not executing,Executing"
bitfld.long 0x00 21. "    [21]       ,AI jobs 21 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 20. " [20]                 ,AI jobs 20 are currently executing" "Not executing,Executing"
bitfld.long 0x00 19. "    [19]       ,AI jobs 19 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 18. " [18]                 ,AI jobs 18 are currently executing" "Not executing,Executing"
bitfld.long 0x00 17. "    [17]       ,AI jobs 17 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 16. " [16]                 ,AI jobs 16 are currently executing" "Not executing,Executing"
bitfld.long 0x00 15. "    [15]       ,AI jobs 15 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 14. " [14]                 ,AI jobs 14 are currently executing" "Not executing,Executing"
bitfld.long 0x00 13. "    [13]       ,AI jobs 13 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 12. " [12]                 ,AI jobs 12 are currently executing" "Not executing,Executing"
bitfld.long 0x00 11. "    [11]       ,AI jobs 11 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 10. " [10]                 ,AI jobs 10 are currently executing" "Not executing,Executing"
bitfld.long 0x00 9. "    [9]        ,AI jobs 9 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 8. " [8]                  ,AI jobs 8 are currently executing" "Not executing,Executing"
bitfld.long 0x00 7. "    [7]        ,AI jobs 7 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 6. " [6]                  ,AI jobs 6 are currently executing" "Not executing,Executing"
bitfld.long 0x00 5. "    [5]        ,AI jobs 5 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 4. " [4]                  ,AI jobs 4 are currently executing" "Not executing,Executing"
bitfld.long 0x00 3. "    [3]        ,AI jobs 3 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 2. " [2]                  ,AI jobs 2 are currently executing" "Not executing,Executing"
bitfld.long 0x00 1. "    [1]        ,AI jobs 1 are currently executing" "Not executing,Executing"
rgroup.long 0x50528++0x03
line.long 0x00 "JOBS_DONE_AI,Jobs Done Register For AIOP Interface"
bitfld.long 0x00 24. " JOBS_DONE[24]        ,AI jobs 24 are done" "Not done,Done"
bitfld.long 0x00 23. "         [23]       ,AI jobs 23 are done" "Not done,Done"
newline
bitfld.long 0x00 22. " [22]                 ,AI jobs 22 are done" "Not done,Done"
bitfld.long 0x00 21. "         [21]       ,AI jobs 21 are done" "Not done,Done"
newline
bitfld.long 0x00 20. " [20]                 ,AI jobs 20 are done" "Not done,Done"
bitfld.long 0x00 19. "         [19]       ,AI jobs 19 are done" "Not done,Done"
newline
bitfld.long 0x00 18. " [18]                 ,AI jobs 18 are done" "Not done,Done"
bitfld.long 0x00 17. "         [17]       ,AI jobs 17 are done" "Not done,Done"
newline
bitfld.long 0x00 16. " [16]                 ,AI jobs 16 are done" "Not done,Done"
bitfld.long 0x00 15. "         [15]       ,AI jobs 15 are done" "Not done,Done"
newline
bitfld.long 0x00 14. " [14]                 ,AI jobs 14 are done" "Not done,Done"
bitfld.long 0x00 13. "         [13]       ,AI jobs 13 are done" "Not done,Done"
newline
bitfld.long 0x00 12. " [12]                 ,AI jobs 12 are done" "Not done,Done"
bitfld.long 0x00 11. "         [11]       ,AI jobs 11 are done" "Not done,Done"
newline
bitfld.long 0x00 10. " [10]                 ,AI jobs 10 are done" "Not done,Done"
bitfld.long 0x00 9. "         [9]        ,AI jobs 9 are done" "Not done,Done"
newline
bitfld.long 0x00 8. " [8]                  ,AI jobs 8 are done" "Not done,Done"
bitfld.long 0x00 7. "         [7]        ,AI jobs 7 are done" "Not done,Done"
newline
bitfld.long 0x00 6. " [6]                  ,AI jobs 6 are done" "Not done,Done"
bitfld.long 0x00 5. "         [5]        ,AI jobs 5 are done" "Not done,Done"
newline
bitfld.long 0x00 4. " [4]                  ,AI jobs 4 are done" "Not done,Done"
bitfld.long 0x00 3. "         [3]        ,AI jobs 3 are done" "Not done,Done"
newline
bitfld.long 0x00 2. " [2]                  ,AI jobs 2 are done" "Not done,Done"
bitfld.long 0x00 1. "         [1]        ,AI jobs 1 are done" "Not done,Done"
group.long 0x50570++0x03
line.long 0x00 "JOB_SELECT_AI,Job Select Register For AIOP Interface"
rbitfld.long 0x00 8.--12. " JOBIDMAX             ,Maximum job ID for AI jobs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "               JOB_SELECT ,Job for which data is displayed in the AI job data registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 12.
tree "AIOP Interface Job Data Registers"
rgroup.long 0x50574++0x07
line.long 0x00 "AIJOBD0,AIOP Interface Job Data Register 0"
hexmask.long.byte 0x00 16.--23. 1. " ERR     ,Error"
bitfld.long 0x00 13. "             EQ_IN_RSP   ,Enqueue input response" "No,Yes"
newline
bitfld.long 0x00 12. " EQDQ    ,Enqueue dequeued" "Not dequeued,Dequeued"
bitfld.long 0x00 11. "   BRP         ,Buffer release pending" "Not pending,Pending"
newline
bitfld.long 0x00 10. " FLEP    ,FLE write pending" "Not pending,Pending"
bitfld.long 0x00 9. "    ASAP        ,ASA write pending" "Not pending,Pending"
newline
bitfld.long 0x00 8. " PTAP    ,PTA copy pending" "Not pending,Pending"
bitfld.long 0x00 5. "    DONE        ,Job done" "No,Yes"
newline
bitfld.long 0x00 4. " EXEC    ,Job executing" "Not executing,Executing"
bitfld.long 0x00 3. "  XFRD        ,Job transferred to job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 2. " TBD     ,Transfer blocking disable" "No,Yes"
bitfld.long 0x00 1. "            RDY         ,Job ready" "Not ready,Ready"
newline
bitfld.long 0x00 0. " USE     ,AI job buffer in use" "Not in use,In use"
line.long 0x04 "AIJOBD1,AIOP Interface Job Data Register 1"
bitfld.long 0x04 23. " BDI     ,Datapath isolation bypassed" "Not bypassed,Bypassed"
hgroup.long 0x5057C++0x0B
hide.long 0x00 "AIJOBD2,AIOP Interface Job Data Register 2"
hide.long 0x04 "AIJOBD3,AIOP Interface Job Data Register 3"
hide.long 0x08 "AIJOBD4,AIOP Interface Job Data Register 4"
rgroup.long 0x50588++0x57
line.long 0x00 "AIJOBD5,AIOP Interface Job Data Register 5"
bitfld.long 0x00 24.--25. " AUC     ,Input partition AMQ usage control" "0,1,2,3"
bitfld.long 0x00 20. "              IVA         ,Input partition virtual address enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " IPL     ,Input partition ICID" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "              IICID       ,ICID of the input partition"
line.long 0x04 "AIJOBD6,AIOP Interface Job Data Register 6"
bitfld.long 0x04 24.--25. " AUC     ,Output partition AMQ usage control" "0,1,2,3"
bitfld.long 0x04 20. "              OVA         ,Output partition virtual address enable" "Disabled,Enabled"
newline
bitfld.long 0x04 16. " OPL     ,Output partition privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "              OICID       ,ICID of the output partition"
line.long 0x08 "AIJOBD7,AIOP Interface Job Data Register 7"
bitfld.long 0x08 24.--25. " AUC     ,Control partition AMQ usage control" "0,1,2,3"
bitfld.long 0x08 20. "              OVA         ,Control partition virtual address enable" "Disabled,Enabled"
newline
bitfld.long 0x08 16. " CPL     ,Control partition privilege level" "0,1"
hexmask.long.byte 0x08 0.--6. 1. "              CICID       ,Control partition ICID"
line.long 0x0C "AIJOBD8,AIOP Interface Job Data Register 8"
hexmask.long.word 0x0C 0.--11. 1. " SDID    ,Security domain identifier"
line.long 0x10 "AIJOBD9,AIOP Interface Job Data Register 9"
line.long 0x14 "AIJOBD10,AIOP Interface Job Data Register 10"
line.long 0x18 "AIJOBD11,AIOP Interface Job Data Register 11"
line.long 0x1C "AIJOBD12,AIOP Interface Job Data Register 12"
bitfld.long 0x1C 30. " SL      ,Dequeued frame having a short-length form" "False,True"
bitfld.long 0x1C 28.--29. "          FMT         ,Format of the dequeued frame" "0,1,2,3"
newline
hexmask.long.word 0x1C 16.--27. 1. " OFS     ,Data offset"
bitfld.long 0x1C 15. "           BMT         ,Memory address translation bypassed" "Not bypassed,Bypassed"
newline
bitfld.long 0x1C 14. " FD_IVP  ,Dequeued frame invalid" "Valid,Invalid"
hexmask.long.word 0x1C 0.--13. 1. "        FD_BPID     ,Buffer pool ID"
line.long 0x20 "AIJOBD13,AIOP Interface Job Data Register 13"
line.long 0x24 "AIJOBD14,AIOP Interface Job Data Register 14"
bitfld.long 0x24 28.--31. " DD      ,Dynamic debug mark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x24 27. "             SC          ,Stashing control" "0,1"
newline
bitfld.long 0x24 24.--26. " DROPP   ,Drop priority" "0,1,2,3,4,5,6,7"
bitfld.long 0x24 23. "              PTA         ,Pass-Through annotation" "0,1"
newline
bitfld.long 0x24 22. " PVT1    ,Pass-through annotation 1 validity" "Not valid,Valid"
bitfld.long 0x24 21. "      PVT2        ,Pass-through annotation 2 validity" "Not valid,Valid"
newline
bitfld.long 0x24 16.--19. " FD_ASAL ,Dequeued frame accelerator-specific annotation length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x24 15. "             FD_CBMT     ,Memory address translation bypassed for the dequeued frame flow context" "Not bypassed,Bypassed"
line.long 0x28 "AIJOBD15,AIOP Interface Job Data Register 15"
line.long 0x2C "AIJOBD16,AIOP Interface Job Data Register 16"
line.long 0x30 "AIJOBD17,AIOP Interface Job Data Register 17"
line.long 0x34 "AIJOBD18,AIOP Interface Job Data Register 18"
line.long 0x38 "AIJOBD19,AIOP Interface Job Data Register 19"
line.long 0x3C "AIJOBD20,AIOP Interface Job Data Register 20"
bitfld.long 0x3C 30. " OSL     ,Output frame having a short-length form" "False,True"
bitfld.long 0x3C 28.--29. "          OFMT        ,Format of the output frame" "0,1,2,3"
newline
hexmask.long.word 0x3C 16.--27. 1. " OOFS    ,Data offset for the output frame"
bitfld.long 0x3C 15. "           OBMT        ,Memory address translation bypassed for the output frame" "Not bypassed,Bypassed"
newline
bitfld.long 0x3C 14. " FD_OIVP ,Output frame validity" "Valid,Invalid"
hexmask.long.word 0x3C 0.--13. 1. "        FD_OBPID    ,Output frame buffer pool ID"
line.long 0x40 "AIJOBD21,AIOP Interface Job Data Register 21"
bitfld.long 0x40 23. " OPTA    ,Pass-through annotation for the output frame" "0,1"
bitfld.long 0x40 22. "              OPVT1       ,Output frame pass-through annotation 1 validity" "Not valid,Valid"
newline
bitfld.long 0x40 21. " OPVT2   ,Output frame pass-through annotation 2 validity" "Not valid,Valid"
bitfld.long 0x40 16.--19. "      FD_ASAL     ,Length of the accelerator-specific annotation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x40 15. " FD_BMT  ,Memory address translation bypassed" "Not bypassed,Bypassed"
bitfld.long 0x40 14. "   FD_OVA_FDC1 ,FL OF FD-compatibility field 1 / output partition virtual address usage" "0,1"
line.long 0x44 "AIJOBD22,AIOP Interface Job Data Register 22"
bitfld.long 0x44 18. " EAO     ,Annotation output is enabled" "Disabled,Enabled"
bitfld.long 0x44 17. "       DAC         ,Annotation (PTA) copy is disabled" "No,Yes"
newline
bitfld.long 0x44 16. " EWS     ,AXI write-safe is enabled" "Disabled,Enabled"
hexmask.long.byte 0x44 8.--15. 1. "       CRID        ,Identifier for a critical resource"
newline
bitfld.long 0x44 0.--5. " SDL     ,Length of the shared descriptor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x48 "AIJOBD23,AIOP Interface Job Data Register 23"
line.long 0x4C "AIJOBD24,AIOP Interface Job Data Register 24"
line.long 0x50 "AIJOBD25,AIOP Interface Job Data Register 25"
line.long 0x54 "AIJOBD26,AIOP Interface Job Data Register 26"
hgroup.long 0x505E0++0x13
hide.long 0x00 "AIJOBD27,AIOP Interface Job Data Register 27"
hide.long 0x04 "AIJOBD28,AIOP Interface Job Data Register 28"
hide.long 0x08 "AIJOBD29,AIOP Interface Job Data Register 29"
hide.long 0x0C "AIJOBD30,AIOP Interface Job Data Register 30"
hide.long 0x10 "AIJOBD31,AIOP Interface Job Data Register 31"
rgroup.long 0x505F4++0x0B
line.long 0x00 "AIJOBD32,AIOP Interface Job Data Register 32"
hexmask.long.byte 0x00 16.--23. 1. " DQ_IDX  ,The dequeue order index of the job awaiting transfer to the job queue controller"
hexmask.long.byte 0x00 8.--15. 1. "             PREV_IDX    ,The job buffer index of the previous job in the enqueue order list"
newline
hexmask.long.byte 0x00 0.--7. 1. " SFAID   ,The job buffer index of the next job in the enqueue order list"
line.long 0x04 "AIJOBD33,AIOP Interface Job Data Register 33"
bitfld.long 0x04 4. " FICID   ,Job requested a flush of all AI" "Not requested,Requested"
bitfld.long 0x04 2. "  FFLW        ,Job requested a flow flush" "Not requested,Requested"
newline
bitfld.long 0x04 1. " FABT    ,Job requested either ICID flush" "Not requested,Requested"
bitfld.long 0x04 0. "  FL          ,ID of the subportal" "0,1"
line.long 0x08 "AIJOBD34,AIOP Interface Job Data Register 34"
hexmask.long.byte 0x08 16.--23. 1. " TSKNUM  ,Task number"
hexmask.long.word 0x08 0.--15. 1. "             SEC_CMP_PTR ,SEC completion pointer"
tree.end
newline
rgroup.long 0x50700++0x07
line.long 0x00 "REIR0AI,Recoverable Error Interrupt Record 0 For The AIOP Interface"
bitfld.long 0x00 31. " MISS ,Second AI recoverable error" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "  TYPE    ,Type of the recoverable error" "None,Memory access,Isolation,?..."
line.long 0x04 "REIR1AI,Recoverable Error Interrupt Record 1 For The AIOP Interface"
bitfld.long 0x04 15. " BDI  ,BDI for the job associated with the recoverable error" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "             IN_ICID ,Input ICID"
newline
rgroup.quad 0x50708++0x07
line.quad 0x00 "REIR2AI,Recoverable Error Interrupt Record 2 For The AIOP Interface"
if (((per.l(ad:0x08000000+0x50700))&0x3000000)==0x2000000)
rgroup.long 0x50710++0x03
line.long 0x00 "REIR4AI,Recoverable Error Interrupt Record 4 For The AIOP Interface"
bitfld.long 0x00 30.--31. " MIX     ,Memory interface index associated" "0,1,2,3"
bitfld.long 0x00 28.--29. "   ERR    ,AXI error response associated" "0,1,2,3"
newline
bitfld.long 0x00 25. " BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "   PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. " RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "   AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. " AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "  ICID   ,ICID transaction attribute associated"
else
rgroup.long 0x50710++0x03
line.long 0x00 "REIR4AI,Recoverable Error Interrupt Record 4 For The AIOP Interface"
endif
rgroup.long 0x50714++0x03
line.long 0x00 "REIR5AI,Recoverable Error Interrupt Record 5 For The AIOP Interface"
bitfld.long 0x00 24. " SAFE    ,AXI transaction associated being a read-safe or write-safe transaction" "0,1"
bitfld.long 0x00 16.--19. "   BID    ,Block identifier of the source of the AXI transaction associated" "General,Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,AIOP,Real-time,Queue,DECO0/CCB0,DECO1/CCB1,DECO2/CCB2,DECO3/CCB3,DECO4/CCB4,DECO5/CCB5,?..."
tree.end
tree "RTIC (Run-Time Integrity Checker) Registers"
hgroup.long 0x60004++0x03
hide.long 0x00 "RSTA,RTIC Status Register"
in
group.long 0x6000C++0x03
line.long 0x00 "RCMD,RTIC Command Register"
bitfld.long 0x00 3. " RTD     ,Run time disable" "No,Yes"
bitfld.long 0x00 2. "                   RTC     ,Run time check" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " HO      ,Hash once" "Disabled,Enabled"
bitfld.long 0x00 0. "              CINT    ,Clear interrupt" "No clear,Clear"
group.long 0x60014++0x03
line.long 0x00 "RCTL,RTIC Control Register"
bitfld.long 0x00 31. " DSV     ,DECOSEL valid" "Not valid,Valid"
bitfld.long 0x00 24.--26. "             DECOSEL ,DECO select" "DECO 0,DECO 1,DECO 2,DECO 3,DECO 4,DECO 5,?..."
newline
bitfld.long 0x00 20. " RIDLE   ,RTIC setting for the IPG_IDLE signal" "Neg when hashing,Neg when in Run-Time"
bitfld.long 0x00 19. "  RALG[3] ,RTIC algorithm select for memory block D" "SHA-256,SHA-512"
newline
bitfld.long 0x00 18. " [2]     ,RTIC algorithm select for memory block C" "SHA-256,SHA-512"
bitfld.long 0x00 17. "               [1]     ,RTIC algorithm select for memory block B" "SHA-256,SHA-512"
newline
bitfld.long 0x00 16. " [0]     ,RTIC algorithm select for memory block A" "SHA-256,SHA-512"
bitfld.long 0x00 15. "               RTMU[3] ,Run time unlock memory block D" "Not unlocked,Unlocked"
newline
bitfld.long 0x00 14. " [2]     ,Run time unlock memory block C" "Not unlocked,Unlocked"
bitfld.long 0x00 13. "          [1]     ,Run time unlock memory block B" "Not unlocked,Unlocked"
newline
bitfld.long 0x00 12. " [0]     ,Run time unlock memory block A" "Not unlocked,Unlocked"
bitfld.long 0x00 11. "          RTME[3] ,Run time enable memory block D" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " [2]     ,Run time enable memory block C" "Disabled,Enabled"
bitfld.long 0x00 9. "              [1]     ,Run time enable memory block B" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " [0]     ,Run time enable memory block A" "Disabled,Enabled"
bitfld.long 0x00 7. "              HOME[3] ,Hash once enable memory block D" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " [2]     ,Hash once enable memory block C" "Disabled,Enabled"
bitfld.long 0x00 5. "              [1]     ,Hash once enable memory block B" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " [0]     ,Hash once enable memory block A" "Disabled,Enabled"
bitfld.long 0x00 1.--3. "              RREQS   ,RTIC request size" "1 block,1 block,2 blocks,3 blocks,4 blocks,5 blocks,6 blocks,7 blocks"
newline
bitfld.long 0x00 0. " IE      ,Interrupt enable" "Disabled,Enabled"
group.long 0x6001C++0x03
line.long 0x00 "RTHR,RTIC Throttle Register"
group.quad 0x60028++0x07
line.quad 0x00 "RWDOG,RTIC Watchdog Timer"
hexmask.quad 0x00 0.--47. 1. " RWDOG      ,Run time watchdog time-out value"
tree "RTIC Memory Block Registers"
group.quad 0x60100++0x07
line.quad 0x00 "RMAA0,RTIC Memory Block A Address 0 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60100+0x0C)++0x03
line.long 0x00 "RMAL0,RTIC Memory Block A Length 0 Register"
group.quad 0x60110++0x07
line.quad 0x00 "RMAA1,RTIC Memory Block A Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60110+0x0C)++0x03
line.long 0x00 "RMAL1,RTIC Memory Block A Length 1 Register"
group.quad 0x60120++0x07
line.quad 0x00 "RMBA0,RTIC Memory Block B Address 0 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60120+0x0C)++0x03
line.long 0x00 "RMBL0,RTIC Memory Block B Length 0 Register"
group.quad 0x60130++0x07
line.quad 0x00 "RMBA1,RTIC Memory Block B Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60130+0x0C)++0x03
line.long 0x00 "RMBL1,RTIC Memory Block B Length 1 Register"
group.quad 0x60140++0x07
line.quad 0x00 "RMCA0,RTIC Memory Block C Address 0 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60140+0x0C)++0x03
line.long 0x00 "RMCL0,RTIC Memory Block C Length 0 Register"
group.quad 0x60150++0x07
line.quad 0x00 "RMCA1,RTIC Memory Block C Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60150+0x0C)++0x03
line.long 0x00 "RMCL1,RTIC Memory Block C Length 1 Register"
group.quad 0x60160++0x07
line.quad 0x00 "RMDA0,RTIC Memory Block D Address 0 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60160+0x0C)++0x03
line.long 0x00 "RMDL0,RTIC Memory Block D Length 0 Register"
group.quad 0x60170++0x07
line.quad 0x00 "RMDA1,RTIC Memory Block D Address 1 Register"
hexmask.quad 0x00 0.--48. 0x01 " MEMBLKADDR ,Memory block address"
group.long (0x60170+0x0C)++0x03
line.long 0x00 "RMDL1,RTIC Memory Block D Length 1 Register"
tree.end
tree "Endian Format Registers"
tree "Big Endian Format"
group.long 0x60200++0x03
line.long 0x00 "RAMDB_0,RTIC Memory Block A Hash Result Big Endian Format Register 0"
group.long 0x60204++0x03
line.long 0x00 "RAMDB_1,RTIC Memory Block A Hash Result Big Endian Format Register 1"
group.long 0x60208++0x03
line.long 0x00 "RAMDB_2,RTIC Memory Block A Hash Result Big Endian Format Register 2"
group.long 0x6020C++0x03
line.long 0x00 "RAMDB_3,RTIC Memory Block A Hash Result Big Endian Format Register 3"
group.long 0x60210++0x03
line.long 0x00 "RAMDB_4,RTIC Memory Block A Hash Result Big Endian Format Register 4"
group.long 0x60214++0x03
line.long 0x00 "RAMDB_5,RTIC Memory Block A Hash Result Big Endian Format Register 5"
group.long 0x60218++0x03
line.long 0x00 "RAMDB_6,RTIC Memory Block A Hash Result Big Endian Format Register 6"
group.long 0x6021C++0x03
line.long 0x00 "RAMDB_7,RTIC Memory Block A Hash Result Big Endian Format Register 7"
group.long 0x60220++0x03
line.long 0x00 "RAMDB_8,RTIC Memory Block A Hash Result Big Endian Format Register 8"
group.long 0x60224++0x03
line.long 0x00 "RAMDB_9,RTIC Memory Block A Hash Result Big Endian Format Register 9"
group.long 0x60228++0x03
line.long 0x00 "RAMDB_10,RTIC Memory Block A Hash Result Big Endian Format Register 10"
group.long 0x6022C++0x03
line.long 0x00 "RAMDB_11,RTIC Memory Block A Hash Result Big Endian Format Register 11"
group.long 0x60230++0x03
line.long 0x00 "RAMDB_12,RTIC Memory Block A Hash Result Big Endian Format Register 12"
group.long 0x60234++0x03
line.long 0x00 "RAMDB_13,RTIC Memory Block A Hash Result Big Endian Format Register 13"
group.long 0x60238++0x03
line.long 0x00 "RAMDB_14,RTIC Memory Block A Hash Result Big Endian Format Register 14"
group.long 0x6023C++0x03
line.long 0x00 "RAMDB_15,RTIC Memory Block A Hash Result Big Endian Format Register 15"
group.long 0x60240++0x03
line.long 0x00 "RAMDB_16,RTIC Memory Block A Hash Result Big Endian Format Register 16"
group.long 0x60244++0x03
line.long 0x00 "RAMDB_17,RTIC Memory Block A Hash Result Big Endian Format Register 17"
group.long 0x60248++0x03
line.long 0x00 "RAMDB_18,RTIC Memory Block A Hash Result Big Endian Format Register 18"
group.long 0x6024C++0x03
line.long 0x00 "RAMDB_19,RTIC Memory Block A Hash Result Big Endian Format Register 19"
group.long 0x60250++0x03
line.long 0x00 "RAMDB_20,RTIC Memory Block A Hash Result Big Endian Format Register 20"
group.long 0x60254++0x03
line.long 0x00 "RAMDB_21,RTIC Memory Block A Hash Result Big Endian Format Register 21"
group.long 0x60258++0x03
line.long 0x00 "RAMDB_22,RTIC Memory Block A Hash Result Big Endian Format Register 22"
group.long 0x6025C++0x03
line.long 0x00 "RAMDB_23,RTIC Memory Block A Hash Result Big Endian Format Register 23"
group.long 0x60260++0x03
line.long 0x00 "RAMDB_24,RTIC Memory Block A Hash Result Big Endian Format Register 24"
group.long 0x60264++0x03
line.long 0x00 "RAMDB_25,RTIC Memory Block A Hash Result Big Endian Format Register 25"
group.long 0x60268++0x03
line.long 0x00 "RAMDB_26,RTIC Memory Block A Hash Result Big Endian Format Register 26"
group.long 0x6026C++0x03
line.long 0x00 "RAMDB_27,RTIC Memory Block A Hash Result Big Endian Format Register 27"
group.long 0x60270++0x03
line.long 0x00 "RAMDB_28,RTIC Memory Block A Hash Result Big Endian Format Register 28"
group.long 0x60274++0x03
line.long 0x00 "RAMDB_29,RTIC Memory Block A Hash Result Big Endian Format Register 29"
group.long 0x60278++0x03
line.long 0x00 "RAMDB_30,RTIC Memory Block A Hash Result Big Endian Format Register 30"
group.long 0x6027C++0x03
line.long 0x00 "RAMDB_31,RTIC Memory Block A Hash Result Big Endian Format Register 31"
group.long 0x60300++0x03
line.long 0x00 "RBMDB_0,RTIC Memory Block B Hash Result Big Endian Format Register 0"
group.long 0x60304++0x03
line.long 0x00 "RBMDB_1,RTIC Memory Block B Hash Result Big Endian Format Register 1"
group.long 0x60308++0x03
line.long 0x00 "RBMDB_2,RTIC Memory Block B Hash Result Big Endian Format Register 2"
group.long 0x6030C++0x03
line.long 0x00 "RBMDB_3,RTIC Memory Block B Hash Result Big Endian Format Register 3"
group.long 0x60310++0x03
line.long 0x00 "RBMDB_4,RTIC Memory Block B Hash Result Big Endian Format Register 4"
group.long 0x60314++0x03
line.long 0x00 "RBMDB_5,RTIC Memory Block B Hash Result Big Endian Format Register 5"
group.long 0x60318++0x03
line.long 0x00 "RBMDB_6,RTIC Memory Block B Hash Result Big Endian Format Register 6"
group.long 0x6031C++0x03
line.long 0x00 "RBMDB_7,RTIC Memory Block B Hash Result Big Endian Format Register 7"
group.long 0x60320++0x03
line.long 0x00 "RBMDB_8,RTIC Memory Block B Hash Result Big Endian Format Register 8"
group.long 0x60324++0x03
line.long 0x00 "RBMDB_9,RTIC Memory Block B Hash Result Big Endian Format Register 9"
group.long 0x60328++0x03
line.long 0x00 "RBMDB_10,RTIC Memory Block B Hash Result Big Endian Format Register 10"
group.long 0x6032C++0x03
line.long 0x00 "RBMDB_11,RTIC Memory Block B Hash Result Big Endian Format Register 11"
group.long 0x60330++0x03
line.long 0x00 "RBMDB_12,RTIC Memory Block B Hash Result Big Endian Format Register 12"
group.long 0x60334++0x03
line.long 0x00 "RBMDB_13,RTIC Memory Block B Hash Result Big Endian Format Register 13"
group.long 0x60338++0x03
line.long 0x00 "RBMDB_14,RTIC Memory Block B Hash Result Big Endian Format Register 14"
group.long 0x6033C++0x03
line.long 0x00 "RBMDB_15,RTIC Memory Block B Hash Result Big Endian Format Register 15"
group.long 0x60340++0x03
line.long 0x00 "RBMDB_16,RTIC Memory Block B Hash Result Big Endian Format Register 16"
group.long 0x60344++0x03
line.long 0x00 "RBMDB_17,RTIC Memory Block B Hash Result Big Endian Format Register 17"
group.long 0x60348++0x03
line.long 0x00 "RBMDB_18,RTIC Memory Block B Hash Result Big Endian Format Register 18"
group.long 0x6034C++0x03
line.long 0x00 "RBMDB_19,RTIC Memory Block B Hash Result Big Endian Format Register 19"
group.long 0x60350++0x03
line.long 0x00 "RBMDB_20,RTIC Memory Block B Hash Result Big Endian Format Register 20"
group.long 0x60354++0x03
line.long 0x00 "RBMDB_21,RTIC Memory Block B Hash Result Big Endian Format Register 21"
group.long 0x60358++0x03
line.long 0x00 "RBMDB_22,RTIC Memory Block B Hash Result Big Endian Format Register 22"
group.long 0x6035C++0x03
line.long 0x00 "RBMDB_23,RTIC Memory Block B Hash Result Big Endian Format Register 23"
group.long 0x60360++0x03
line.long 0x00 "RBMDB_24,RTIC Memory Block B Hash Result Big Endian Format Register 24"
group.long 0x60364++0x03
line.long 0x00 "RBMDB_25,RTIC Memory Block B Hash Result Big Endian Format Register 25"
group.long 0x60368++0x03
line.long 0x00 "RBMDB_26,RTIC Memory Block B Hash Result Big Endian Format Register 26"
group.long 0x6036C++0x03
line.long 0x00 "RBMDB_27,RTIC Memory Block B Hash Result Big Endian Format Register 27"
group.long 0x60370++0x03
line.long 0x00 "RBMDB_28,RTIC Memory Block B Hash Result Big Endian Format Register 28"
group.long 0x60374++0x03
line.long 0x00 "RBMDB_29,RTIC Memory Block B Hash Result Big Endian Format Register 29"
group.long 0x60378++0x03
line.long 0x00 "RBMDB_30,RTIC Memory Block B Hash Result Big Endian Format Register 30"
group.long 0x6037C++0x03
line.long 0x00 "RBMDB_31,RTIC Memory Block B Hash Result Big Endian Format Register 31"
group.long 0x60400++0x03
line.long 0x00 "RCMDB_0,RTIC Memory Block C Hash Result Big Endian Format Register 0"
group.long 0x60404++0x03
line.long 0x00 "RCMDB_1,RTIC Memory Block C Hash Result Big Endian Format Register 1"
group.long 0x60408++0x03
line.long 0x00 "RCMDB_2,RTIC Memory Block C Hash Result Big Endian Format Register 2"
group.long 0x6040C++0x03
line.long 0x00 "RCMDB_3,RTIC Memory Block C Hash Result Big Endian Format Register 3"
group.long 0x60410++0x03
line.long 0x00 "RCMDB_4,RTIC Memory Block C Hash Result Big Endian Format Register 4"
group.long 0x60414++0x03
line.long 0x00 "RCMDB_5,RTIC Memory Block C Hash Result Big Endian Format Register 5"
group.long 0x60418++0x03
line.long 0x00 "RCMDB_6,RTIC Memory Block C Hash Result Big Endian Format Register 6"
group.long 0x6041C++0x03
line.long 0x00 "RCMDB_7,RTIC Memory Block C Hash Result Big Endian Format Register 7"
group.long 0x60420++0x03
line.long 0x00 "RCMDB_8,RTIC Memory Block C Hash Result Big Endian Format Register 8"
group.long 0x60424++0x03
line.long 0x00 "RCMDB_9,RTIC Memory Block C Hash Result Big Endian Format Register 9"
group.long 0x60428++0x03
line.long 0x00 "RCMDB_10,RTIC Memory Block C Hash Result Big Endian Format Register 10"
group.long 0x6042C++0x03
line.long 0x00 "RCMDB_11,RTIC Memory Block C Hash Result Big Endian Format Register 11"
group.long 0x60430++0x03
line.long 0x00 "RCMDB_12,RTIC Memory Block C Hash Result Big Endian Format Register 12"
group.long 0x60434++0x03
line.long 0x00 "RCMDB_13,RTIC Memory Block C Hash Result Big Endian Format Register 13"
group.long 0x60438++0x03
line.long 0x00 "RCMDB_14,RTIC Memory Block C Hash Result Big Endian Format Register 14"
group.long 0x6043C++0x03
line.long 0x00 "RCMDB_15,RTIC Memory Block C Hash Result Big Endian Format Register 15"
group.long 0x60440++0x03
line.long 0x00 "RCMDB_16,RTIC Memory Block C Hash Result Big Endian Format Register 16"
group.long 0x60444++0x03
line.long 0x00 "RCMDB_17,RTIC Memory Block C Hash Result Big Endian Format Register 17"
group.long 0x60448++0x03
line.long 0x00 "RCMDB_18,RTIC Memory Block C Hash Result Big Endian Format Register 18"
group.long 0x6044C++0x03
line.long 0x00 "RCMDB_19,RTIC Memory Block C Hash Result Big Endian Format Register 19"
group.long 0x60450++0x03
line.long 0x00 "RCMDB_20,RTIC Memory Block C Hash Result Big Endian Format Register 20"
group.long 0x60454++0x03
line.long 0x00 "RCMDB_21,RTIC Memory Block C Hash Result Big Endian Format Register 21"
group.long 0x60458++0x03
line.long 0x00 "RCMDB_22,RTIC Memory Block C Hash Result Big Endian Format Register 22"
group.long 0x6045C++0x03
line.long 0x00 "RCMDB_23,RTIC Memory Block C Hash Result Big Endian Format Register 23"
group.long 0x60460++0x03
line.long 0x00 "RCMDB_24,RTIC Memory Block C Hash Result Big Endian Format Register 24"
group.long 0x60464++0x03
line.long 0x00 "RCMDB_25,RTIC Memory Block C Hash Result Big Endian Format Register 25"
group.long 0x60468++0x03
line.long 0x00 "RCMDB_26,RTIC Memory Block C Hash Result Big Endian Format Register 26"
group.long 0x6046C++0x03
line.long 0x00 "RCMDB_27,RTIC Memory Block C Hash Result Big Endian Format Register 27"
group.long 0x60470++0x03
line.long 0x00 "RCMDB_28,RTIC Memory Block C Hash Result Big Endian Format Register 28"
group.long 0x60474++0x03
line.long 0x00 "RCMDB_29,RTIC Memory Block C Hash Result Big Endian Format Register 29"
group.long 0x60478++0x03
line.long 0x00 "RCMDB_30,RTIC Memory Block C Hash Result Big Endian Format Register 30"
group.long 0x6047C++0x03
line.long 0x00 "RCMDB_31,RTIC Memory Block C Hash Result Big Endian Format Register 31"
group.long 0x60500++0x03
line.long 0x00 "RDMDB_0,RTIC Memory Block D Hash Result Big Endian Format Register 0"
group.long 0x60504++0x03
line.long 0x00 "RDMDB_1,RTIC Memory Block D Hash Result Big Endian Format Register 1"
group.long 0x60508++0x03
line.long 0x00 "RDMDB_2,RTIC Memory Block D Hash Result Big Endian Format Register 2"
group.long 0x6050C++0x03
line.long 0x00 "RDMDB_3,RTIC Memory Block D Hash Result Big Endian Format Register 3"
group.long 0x60510++0x03
line.long 0x00 "RDMDB_4,RTIC Memory Block D Hash Result Big Endian Format Register 4"
group.long 0x60514++0x03
line.long 0x00 "RDMDB_5,RTIC Memory Block D Hash Result Big Endian Format Register 5"
group.long 0x60518++0x03
line.long 0x00 "RDMDB_6,RTIC Memory Block D Hash Result Big Endian Format Register 6"
group.long 0x6051C++0x03
line.long 0x00 "RDMDB_7,RTIC Memory Block D Hash Result Big Endian Format Register 7"
group.long 0x60520++0x03
line.long 0x00 "RDMDB_8,RTIC Memory Block D Hash Result Big Endian Format Register 8"
group.long 0x60524++0x03
line.long 0x00 "RDMDB_9,RTIC Memory Block D Hash Result Big Endian Format Register 9"
group.long 0x60528++0x03
line.long 0x00 "RDMDB_10,RTIC Memory Block D Hash Result Big Endian Format Register 10"
group.long 0x6052C++0x03
line.long 0x00 "RDMDB_11,RTIC Memory Block D Hash Result Big Endian Format Register 11"
group.long 0x60530++0x03
line.long 0x00 "RDMDB_12,RTIC Memory Block D Hash Result Big Endian Format Register 12"
group.long 0x60534++0x03
line.long 0x00 "RDMDB_13,RTIC Memory Block D Hash Result Big Endian Format Register 13"
group.long 0x60538++0x03
line.long 0x00 "RDMDB_14,RTIC Memory Block D Hash Result Big Endian Format Register 14"
group.long 0x6053C++0x03
line.long 0x00 "RDMDB_15,RTIC Memory Block D Hash Result Big Endian Format Register 15"
group.long 0x60540++0x03
line.long 0x00 "RDMDB_16,RTIC Memory Block D Hash Result Big Endian Format Register 16"
group.long 0x60544++0x03
line.long 0x00 "RDMDB_17,RTIC Memory Block D Hash Result Big Endian Format Register 17"
group.long 0x60548++0x03
line.long 0x00 "RDMDB_18,RTIC Memory Block D Hash Result Big Endian Format Register 18"
group.long 0x6054C++0x03
line.long 0x00 "RDMDB_19,RTIC Memory Block D Hash Result Big Endian Format Register 19"
group.long 0x60550++0x03
line.long 0x00 "RDMDB_20,RTIC Memory Block D Hash Result Big Endian Format Register 20"
group.long 0x60554++0x03
line.long 0x00 "RDMDB_21,RTIC Memory Block D Hash Result Big Endian Format Register 21"
group.long 0x60558++0x03
line.long 0x00 "RDMDB_22,RTIC Memory Block D Hash Result Big Endian Format Register 22"
group.long 0x6055C++0x03
line.long 0x00 "RDMDB_23,RTIC Memory Block D Hash Result Big Endian Format Register 23"
group.long 0x60560++0x03
line.long 0x00 "RDMDB_24,RTIC Memory Block D Hash Result Big Endian Format Register 24"
group.long 0x60564++0x03
line.long 0x00 "RDMDB_25,RTIC Memory Block D Hash Result Big Endian Format Register 25"
group.long 0x60568++0x03
line.long 0x00 "RDMDB_26,RTIC Memory Block D Hash Result Big Endian Format Register 26"
group.long 0x6056C++0x03
line.long 0x00 "RDMDB_27,RTIC Memory Block D Hash Result Big Endian Format Register 27"
group.long 0x60570++0x03
line.long 0x00 "RDMDB_28,RTIC Memory Block D Hash Result Big Endian Format Register 28"
group.long 0x60574++0x03
line.long 0x00 "RDMDB_29,RTIC Memory Block D Hash Result Big Endian Format Register 29"
group.long 0x60578++0x03
line.long 0x00 "RDMDB_30,RTIC Memory Block D Hash Result Big Endian Format Register 30"
group.long 0x6057C++0x03
line.long 0x00 "RDMDB_31,RTIC Memory Block D Hash Result Big Endian Format Register 31"
tree.end
tree "Little Endian Format"
group.long 0x60280++0x03
line.long 0x00 "RAMDL_0,RTIC Memory Block A Hash Result Little Endian Format Register 0"
group.long 0x60284++0x03
line.long 0x00 "RAMDL_1,RTIC Memory Block A Hash Result Little Endian Format Register 1"
group.long 0x60288++0x03
line.long 0x00 "RAMDL_2,RTIC Memory Block A Hash Result Little Endian Format Register 2"
group.long 0x6028C++0x03
line.long 0x00 "RAMDL_3,RTIC Memory Block A Hash Result Little Endian Format Register 3"
group.long 0x60290++0x03
line.long 0x00 "RAMDL_4,RTIC Memory Block A Hash Result Little Endian Format Register 4"
group.long 0x60294++0x03
line.long 0x00 "RAMDL_5,RTIC Memory Block A Hash Result Little Endian Format Register 5"
group.long 0x60298++0x03
line.long 0x00 "RAMDL_6,RTIC Memory Block A Hash Result Little Endian Format Register 6"
group.long 0x6029C++0x03
line.long 0x00 "RAMDL_7,RTIC Memory Block A Hash Result Little Endian Format Register 7"
group.long 0x602A0++0x03
line.long 0x00 "RAMDL_8,RTIC Memory Block A Hash Result Little Endian Format Register 8"
group.long 0x602A4++0x03
line.long 0x00 "RAMDL_9,RTIC Memory Block A Hash Result Little Endian Format Register 9"
group.long 0x602A8++0x03
line.long 0x00 "RAMDL_10,RTIC Memory Block A Hash Result Little Endian Format Register 10"
group.long 0x602AC++0x03
line.long 0x00 "RAMDL_11,RTIC Memory Block A Hash Result Little Endian Format Register 11"
group.long 0x602B0++0x03
line.long 0x00 "RAMDL_12,RTIC Memory Block A Hash Result Little Endian Format Register 12"
group.long 0x602B4++0x03
line.long 0x00 "RAMDL_13,RTIC Memory Block A Hash Result Little Endian Format Register 13"
group.long 0x602B8++0x03
line.long 0x00 "RAMDL_14,RTIC Memory Block A Hash Result Little Endian Format Register 14"
group.long 0x602BC++0x03
line.long 0x00 "RAMDL_15,RTIC Memory Block A Hash Result Little Endian Format Register 15"
group.long 0x602C0++0x03
line.long 0x00 "RAMDL_16,RTIC Memory Block A Hash Result Little Endian Format Register 16"
group.long 0x602C4++0x03
line.long 0x00 "RAMDL_17,RTIC Memory Block A Hash Result Little Endian Format Register 17"
group.long 0x602C8++0x03
line.long 0x00 "RAMDL_18,RTIC Memory Block A Hash Result Little Endian Format Register 18"
group.long 0x602CC++0x03
line.long 0x00 "RAMDL_19,RTIC Memory Block A Hash Result Little Endian Format Register 19"
group.long 0x602D0++0x03
line.long 0x00 "RAMDL_20,RTIC Memory Block A Hash Result Little Endian Format Register 20"
group.long 0x602D4++0x03
line.long 0x00 "RAMDL_21,RTIC Memory Block A Hash Result Little Endian Format Register 21"
group.long 0x602D8++0x03
line.long 0x00 "RAMDL_22,RTIC Memory Block A Hash Result Little Endian Format Register 22"
group.long 0x602DC++0x03
line.long 0x00 "RAMDL_23,RTIC Memory Block A Hash Result Little Endian Format Register 23"
group.long 0x602E0++0x03
line.long 0x00 "RAMDL_24,RTIC Memory Block A Hash Result Little Endian Format Register 24"
group.long 0x602E4++0x03
line.long 0x00 "RAMDL_25,RTIC Memory Block A Hash Result Little Endian Format Register 25"
group.long 0x602E8++0x03
line.long 0x00 "RAMDL_26,RTIC Memory Block A Hash Result Little Endian Format Register 26"
group.long 0x602EC++0x03
line.long 0x00 "RAMDL_27,RTIC Memory Block A Hash Result Little Endian Format Register 27"
group.long 0x602F0++0x03
line.long 0x00 "RAMDL_28,RTIC Memory Block A Hash Result Little Endian Format Register 28"
group.long 0x602F4++0x03
line.long 0x00 "RAMDL_29,RTIC Memory Block A Hash Result Little Endian Format Register 29"
group.long 0x602F8++0x03
line.long 0x00 "RAMDL_30,RTIC Memory Block A Hash Result Little Endian Format Register 30"
group.long 0x602FC++0x03
line.long 0x00 "RAMDL_31,RTIC Memory Block A Hash Result Little Endian Format Register 31"
group.long 0x60380++0x03
line.long 0x00 "RBMDL_0,RTIC Memory Block B Hash Result Little Endian Format Register 0"
group.long 0x60384++0x03
line.long 0x00 "RBMDL_1,RTIC Memory Block B Hash Result Little Endian Format Register 1"
group.long 0x60388++0x03
line.long 0x00 "RBMDL_2,RTIC Memory Block B Hash Result Little Endian Format Register 2"
group.long 0x6038C++0x03
line.long 0x00 "RBMDL_3,RTIC Memory Block B Hash Result Little Endian Format Register 3"
group.long 0x60390++0x03
line.long 0x00 "RBMDL_4,RTIC Memory Block B Hash Result Little Endian Format Register 4"
group.long 0x60394++0x03
line.long 0x00 "RBMDL_5,RTIC Memory Block B Hash Result Little Endian Format Register 5"
group.long 0x60398++0x03
line.long 0x00 "RBMDL_6,RTIC Memory Block B Hash Result Little Endian Format Register 6"
group.long 0x6039C++0x03
line.long 0x00 "RBMDL_7,RTIC Memory Block B Hash Result Little Endian Format Register 7"
group.long 0x603A0++0x03
line.long 0x00 "RBMDL_8,RTIC Memory Block B Hash Result Little Endian Format Register 8"
group.long 0x603A4++0x03
line.long 0x00 "RBMDL_9,RTIC Memory Block B Hash Result Little Endian Format Register 9"
group.long 0x603A8++0x03
line.long 0x00 "RBMDL_10,RTIC Memory Block B Hash Result Little Endian Format Register 10"
group.long 0x603AC++0x03
line.long 0x00 "RBMDL_11,RTIC Memory Block B Hash Result Little Endian Format Register 11"
group.long 0x603B0++0x03
line.long 0x00 "RBMDL_12,RTIC Memory Block B Hash Result Little Endian Format Register 12"
group.long 0x603B4++0x03
line.long 0x00 "RBMDL_13,RTIC Memory Block B Hash Result Little Endian Format Register 13"
group.long 0x603B8++0x03
line.long 0x00 "RBMDL_14,RTIC Memory Block B Hash Result Little Endian Format Register 14"
group.long 0x603BC++0x03
line.long 0x00 "RBMDL_15,RTIC Memory Block B Hash Result Little Endian Format Register 15"
group.long 0x603C0++0x03
line.long 0x00 "RBMDL_16,RTIC Memory Block B Hash Result Little Endian Format Register 16"
group.long 0x603C4++0x03
line.long 0x00 "RBMDL_17,RTIC Memory Block B Hash Result Little Endian Format Register 17"
group.long 0x603C8++0x03
line.long 0x00 "RBMDL_18,RTIC Memory Block B Hash Result Little Endian Format Register 18"
group.long 0x603CC++0x03
line.long 0x00 "RBMDL_19,RTIC Memory Block B Hash Result Little Endian Format Register 19"
group.long 0x603D0++0x03
line.long 0x00 "RBMDL_20,RTIC Memory Block B Hash Result Little Endian Format Register 20"
group.long 0x603D4++0x03
line.long 0x00 "RBMDL_21,RTIC Memory Block B Hash Result Little Endian Format Register 21"
group.long 0x603D8++0x03
line.long 0x00 "RBMDL_22,RTIC Memory Block B Hash Result Little Endian Format Register 22"
group.long 0x603DC++0x03
line.long 0x00 "RBMDL_23,RTIC Memory Block B Hash Result Little Endian Format Register 23"
group.long 0x603E0++0x03
line.long 0x00 "RBMDL_24,RTIC Memory Block B Hash Result Little Endian Format Register 24"
group.long 0x603E4++0x03
line.long 0x00 "RBMDL_25,RTIC Memory Block B Hash Result Little Endian Format Register 25"
group.long 0x603E8++0x03
line.long 0x00 "RBMDL_26,RTIC Memory Block B Hash Result Little Endian Format Register 26"
group.long 0x603EC++0x03
line.long 0x00 "RBMDL_27,RTIC Memory Block B Hash Result Little Endian Format Register 27"
group.long 0x603F0++0x03
line.long 0x00 "RBMDL_28,RTIC Memory Block B Hash Result Little Endian Format Register 28"
group.long 0x603F4++0x03
line.long 0x00 "RBMDL_29,RTIC Memory Block B Hash Result Little Endian Format Register 29"
group.long 0x603F8++0x03
line.long 0x00 "RBMDL_30,RTIC Memory Block B Hash Result Little Endian Format Register 30"
group.long 0x603FC++0x03
line.long 0x00 "RBMDL_31,RTIC Memory Block B Hash Result Little Endian Format Register 31"
group.long 0x60480++0x03
line.long 0x00 "RCMDL_0,RTIC Memory Block C Hash Result Little Endian Format Register 0"
group.long 0x60484++0x03
line.long 0x00 "RCMDL_1,RTIC Memory Block C Hash Result Little Endian Format Register 1"
group.long 0x60488++0x03
line.long 0x00 "RCMDL_2,RTIC Memory Block C Hash Result Little Endian Format Register 2"
group.long 0x6048C++0x03
line.long 0x00 "RCMDL_3,RTIC Memory Block C Hash Result Little Endian Format Register 3"
group.long 0x60490++0x03
line.long 0x00 "RCMDL_4,RTIC Memory Block C Hash Result Little Endian Format Register 4"
group.long 0x60494++0x03
line.long 0x00 "RCMDL_5,RTIC Memory Block C Hash Result Little Endian Format Register 5"
group.long 0x60498++0x03
line.long 0x00 "RCMDL_6,RTIC Memory Block C Hash Result Little Endian Format Register 6"
group.long 0x6049C++0x03
line.long 0x00 "RCMDL_7,RTIC Memory Block C Hash Result Little Endian Format Register 7"
group.long 0x604A0++0x03
line.long 0x00 "RCMDL_8,RTIC Memory Block C Hash Result Little Endian Format Register 8"
group.long 0x604A4++0x03
line.long 0x00 "RCMDL_9,RTIC Memory Block C Hash Result Little Endian Format Register 9"
group.long 0x604A8++0x03
line.long 0x00 "RCMDL_10,RTIC Memory Block C Hash Result Little Endian Format Register 10"
group.long 0x604AC++0x03
line.long 0x00 "RCMDL_11,RTIC Memory Block C Hash Result Little Endian Format Register 11"
group.long 0x604B0++0x03
line.long 0x00 "RCMDL_12,RTIC Memory Block C Hash Result Little Endian Format Register 12"
group.long 0x604B4++0x03
line.long 0x00 "RCMDL_13,RTIC Memory Block C Hash Result Little Endian Format Register 13"
group.long 0x604B8++0x03
line.long 0x00 "RCMDL_14,RTIC Memory Block C Hash Result Little Endian Format Register 14"
group.long 0x604BC++0x03
line.long 0x00 "RCMDL_15,RTIC Memory Block C Hash Result Little Endian Format Register 15"
group.long 0x604C0++0x03
line.long 0x00 "RCMDL_16,RTIC Memory Block C Hash Result Little Endian Format Register 16"
group.long 0x604C4++0x03
line.long 0x00 "RCMDL_17,RTIC Memory Block C Hash Result Little Endian Format Register 17"
group.long 0x604C8++0x03
line.long 0x00 "RCMDL_18,RTIC Memory Block C Hash Result Little Endian Format Register 18"
group.long 0x604CC++0x03
line.long 0x00 "RCMDL_19,RTIC Memory Block C Hash Result Little Endian Format Register 19"
group.long 0x604D0++0x03
line.long 0x00 "RCMDL_20,RTIC Memory Block C Hash Result Little Endian Format Register 20"
group.long 0x604D4++0x03
line.long 0x00 "RCMDL_21,RTIC Memory Block C Hash Result Little Endian Format Register 21"
group.long 0x604D8++0x03
line.long 0x00 "RCMDL_22,RTIC Memory Block C Hash Result Little Endian Format Register 22"
group.long 0x604DC++0x03
line.long 0x00 "RCMDL_23,RTIC Memory Block C Hash Result Little Endian Format Register 23"
group.long 0x604E0++0x03
line.long 0x00 "RCMDL_24,RTIC Memory Block C Hash Result Little Endian Format Register 24"
group.long 0x604E4++0x03
line.long 0x00 "RCMDL_25,RTIC Memory Block C Hash Result Little Endian Format Register 25"
group.long 0x604E8++0x03
line.long 0x00 "RCMDL_26,RTIC Memory Block C Hash Result Little Endian Format Register 26"
group.long 0x604EC++0x03
line.long 0x00 "RCMDL_27,RTIC Memory Block C Hash Result Little Endian Format Register 27"
group.long 0x604F0++0x03
line.long 0x00 "RCMDL_28,RTIC Memory Block C Hash Result Little Endian Format Register 28"
group.long 0x604F4++0x03
line.long 0x00 "RCMDL_29,RTIC Memory Block C Hash Result Little Endian Format Register 29"
group.long 0x604F8++0x03
line.long 0x00 "RCMDL_30,RTIC Memory Block C Hash Result Little Endian Format Register 30"
group.long 0x604FC++0x03
line.long 0x00 "RCMDL_31,RTIC Memory Block C Hash Result Little Endian Format Register 31"
group.long 0x60580++0x03
line.long 0x00 "RDMDL_0,RTIC Memory Block D Hash Result Little Endian Format Register 0"
group.long 0x60584++0x03
line.long 0x00 "RDMDL_1,RTIC Memory Block D Hash Result Little Endian Format Register 1"
group.long 0x60588++0x03
line.long 0x00 "RDMDL_2,RTIC Memory Block D Hash Result Little Endian Format Register 2"
group.long 0x6058C++0x03
line.long 0x00 "RDMDL_3,RTIC Memory Block D Hash Result Little Endian Format Register 3"
group.long 0x60590++0x03
line.long 0x00 "RDMDL_4,RTIC Memory Block D Hash Result Little Endian Format Register 4"
group.long 0x60594++0x03
line.long 0x00 "RDMDL_5,RTIC Memory Block D Hash Result Little Endian Format Register 5"
group.long 0x60598++0x03
line.long 0x00 "RDMDL_6,RTIC Memory Block D Hash Result Little Endian Format Register 6"
group.long 0x6059C++0x03
line.long 0x00 "RDMDL_7,RTIC Memory Block D Hash Result Little Endian Format Register 7"
group.long 0x605A0++0x03
line.long 0x00 "RDMDL_8,RTIC Memory Block D Hash Result Little Endian Format Register 8"
group.long 0x605A4++0x03
line.long 0x00 "RDMDL_9,RTIC Memory Block D Hash Result Little Endian Format Register 9"
group.long 0x605A8++0x03
line.long 0x00 "RDMDL_10,RTIC Memory Block D Hash Result Little Endian Format Register 10"
group.long 0x605AC++0x03
line.long 0x00 "RDMDL_11,RTIC Memory Block D Hash Result Little Endian Format Register 11"
group.long 0x605B0++0x03
line.long 0x00 "RDMDL_12,RTIC Memory Block D Hash Result Little Endian Format Register 12"
group.long 0x605B4++0x03
line.long 0x00 "RDMDL_13,RTIC Memory Block D Hash Result Little Endian Format Register 13"
group.long 0x605B8++0x03
line.long 0x00 "RDMDL_14,RTIC Memory Block D Hash Result Little Endian Format Register 14"
group.long 0x605BC++0x03
line.long 0x00 "RDMDL_15,RTIC Memory Block D Hash Result Little Endian Format Register 15"
group.long 0x605C0++0x03
line.long 0x00 "RDMDL_16,RTIC Memory Block D Hash Result Little Endian Format Register 16"
group.long 0x605C4++0x03
line.long 0x00 "RDMDL_17,RTIC Memory Block D Hash Result Little Endian Format Register 17"
group.long 0x605C8++0x03
line.long 0x00 "RDMDL_18,RTIC Memory Block D Hash Result Little Endian Format Register 18"
group.long 0x605CC++0x03
line.long 0x00 "RDMDL_19,RTIC Memory Block D Hash Result Little Endian Format Register 19"
group.long 0x605D0++0x03
line.long 0x00 "RDMDL_20,RTIC Memory Block D Hash Result Little Endian Format Register 20"
group.long 0x605D4++0x03
line.long 0x00 "RDMDL_21,RTIC Memory Block D Hash Result Little Endian Format Register 21"
group.long 0x605D8++0x03
line.long 0x00 "RDMDL_22,RTIC Memory Block D Hash Result Little Endian Format Register 22"
group.long 0x605DC++0x03
line.long 0x00 "RDMDL_23,RTIC Memory Block D Hash Result Little Endian Format Register 23"
group.long 0x605E0++0x03
line.long 0x00 "RDMDL_24,RTIC Memory Block D Hash Result Little Endian Format Register 24"
group.long 0x605E4++0x03
line.long 0x00 "RDMDL_25,RTIC Memory Block D Hash Result Little Endian Format Register 25"
group.long 0x605E8++0x03
line.long 0x00 "RDMDL_26,RTIC Memory Block D Hash Result Little Endian Format Register 26"
group.long 0x605EC++0x03
line.long 0x00 "RDMDL_27,RTIC Memory Block D Hash Result Little Endian Format Register 27"
group.long 0x605F0++0x03
line.long 0x00 "RDMDL_28,RTIC Memory Block D Hash Result Little Endian Format Register 28"
group.long 0x605F4++0x03
line.long 0x00 "RDMDL_29,RTIC Memory Block D Hash Result Little Endian Format Register 29"
group.long 0x605F8++0x03
line.long 0x00 "RDMDL_30,RTIC Memory Block D Hash Result Little Endian Format Register 30"
group.long 0x605FC++0x03
line.long 0x00 "RDMDL_31,RTIC Memory Block D Hash Result Little Endian Format Register 31"
tree.end
tree.end
newline
rgroup.long 0x60E00++0x03
line.long 0x00 "REIR0RTIC,Recoverable Error Interrupt Record 0 For RTIC"
bitfld.long 0x00 31. "         MISS    ,Second RTIC recoverable error occurrence" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "  TYPE   ,This field indicates the type of the recoverable error" ",Memory access,?..."
rgroup.quad 0x60E08++0x07
line.quad 0x00 "REIR2RTIC,Recoverable Error Interrupt Record 2 For RTIC"
rgroup.long 0x60E10++0x03
line.long 0x00 "REIR4RTIC,Recoverable Error Interrupt Record 4 For RTIC"
bitfld.long 0x00 30.--31. "         MIX     ,Memory interface index associated" "0,1,2,3"
bitfld.long 0x00 28.--29. "             ERR    ,AXI error response associated" "0,1,2,3"
newline
bitfld.long 0x00 25. "         BMT     ,Bypass memory translation transaction attribute" "Not in use,In use"
bitfld.long 0x00 24. "    PL     ,Privilege level transaction attribute" "Not in use,In use"
newline
bitfld.long 0x00 23. "         RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "             AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. "         AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "            ICID   ,ICID transaction attribute associated"
rgroup.long 0x60E14++0x03
line.long 0x00 "REIR5RTIC,Recoverable Error Interrupt Record 5 For RTIC"
bitfld.long 0x00 24. "         SAFE    ,AXI transaction associated being a safe transaction" "0,1"
bitfld.long 0x00 16.--19. "             BID    ,Block identifier of the source of the AXI transaction associated" "General,Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,AIOP,Real-time,Queue,DECO0/CCB0,DECO1/CCB1,DECO2/CCB2,DECO3/CCB3,DECO4/CCB4,DECO5/CCB5,?..."
tree.end
tree "QI (Queue Manager Interface) Registers"
group.long 0x70000++0x07
line.long 0x00 "QICFG,Queue Interface Configuration Register"
bitfld.long 0x00 24. " RSIDE ,Report SEC ID on error" "Not reported,Reported"
line.long 0x04 "QICTL,Queue Interface Control Register"
bitfld.long 0x04 16. " CROV  ,Critical resource override" "Not override,Override"
bitfld.long 0x04 3. "   FLUSH   ,Flush QI jobs" "No requested,Requested"
newline
bitfld.long 0x04 2. " SOE   ,Stop on error" "Not requested,Requested"
bitfld.long 0x04 1. "  STOP    ,Stop" "Not requested,Requested"
newline
bitfld.long 0x04 0. " DQEN  ,Dequeue enable" "Disabled,Enabled"
rgroup.long 0x7000C++0x03
line.long 0x00 "QISTA,Queue Interface Status Register"
bitfld.long 0x00 31. " STOPD ,Stopped" "Not stopped,Stopped"
bitfld.long 0x00 30. "    STOPDOE ,Stopped on error" "Not stopped,Stopped"
group.long 0x70014++0x03
line.long 0x00 "QIDQC,Queue Interface Dequeue Configuration Register"
hexmask.long.word 0x00 16.--31. 1. " BCNT  ,Dequeue command byte count"
bitfld.long 0x00 8.--10. "           SPFCNT  ,Subportal frame count threshold" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 4. " FCNT  ,Dequeue command frame count" "1,Up to 3"
bitfld.long 0x00 0.--1. "        VERB    ,Dequeue command verb" "0,1,2,3"
tree "Queue Interface Dequeue/Enqueue Event Filter Control Registers"
group.long 0x70030++0x03
line.long 0x00 "QDQEFC0,Queue Interface Dequeue Event Filter Control Register 0"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70034++0x03
line.long 0x00 "QDQEFC1,Queue Interface Dequeue Event Filter Control Register 1"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70038++0x03
line.long 0x00 "QDQEFC2,Queue Interface Dequeue Event Filter Control Register 2"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70050++0x03
line.long 0x00 "QEQEFC0,Queue Interface Enqueue Event Filter Control Register 0"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70054++0x03
line.long 0x00 "QEQEFC1,Queue Interface Enqueue Event Filter Control Register 1"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70058++0x03
line.long 0x00 "QEQEFC2,Queue Interface Enqueue Event Filter Control Register 2"
bitfld.long 0x00 11. " MASK[3] ,Mask 3 value" "Masked,Not masked"
bitfld.long 0x00 10. " [2] ,Mask 2 value" "Masked,Not masked"
newline
bitfld.long 0x00 9. " [1]     ,Mask 1 value" "Masked,Not masked"
bitfld.long 0x00 8. " [0] ,Mask 0 value" "Masked,Not masked"
newline
bitfld.long 0x00 0.--3. " CMPV    ,Compare value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
newline
width 21.
rgroup.long 0x70500++0x03
line.long 0x00 "JOBS_IN_USE_QI,Jobs In Use Register For QM Interface"
bitfld.long 0x00 24. " JOBS_IN_USE[24]      ,Job buffer 24 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 23. "         [23]          ,Job buffer 23 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 22. " [22]                 ,Job buffer 22 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 21. "         [21]          ,Job buffer 21 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 20. " [20]                 ,Job buffer 20 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 19. "         [19]          ,Job buffer 19 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 18. " [18]                 ,Job buffer 18 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 17. "         [17]          ,Job buffer 17 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 16. " [16]                 ,Job buffer 16 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 15. "         [15]          ,Job buffer 15 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 14. " [14]                 ,Job buffer 14 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 13. "         [13]          ,Job buffer 13 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 12. " [12]                 ,Job buffer 12 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 11. "         [11]          ,Job buffer 11 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 10. " [10]                 ,Job buffer 10 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 9. "         [9]           ,Job buffer 9 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 8. " [8]                  ,Job buffer 8 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 7. "         [7]           ,Job buffer 7 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 6. " [6]                  ,Job buffer 6 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 5. "         [5]           ,Job buffer 5 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 4. " [4]                  ,Job buffer 4 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 3. "         [3]           ,Job buffer 3 are in use for active QI jobs" "Not used,Used"
newline
bitfld.long 0x00 2. " [2]                  ,Job buffer 2 are in use for active QI jobs" "Not used,Used"
bitfld.long 0x00 1. "         [1]           ,Job buffer 1 are in use for active QI jobs" "Not used,Used"
rgroup.long 0x70508++0x03
line.long 0x00 "JOBS_READY_QI,Jobs Ready Register For QM Interface"
bitfld.long 0x00 24. " JOBS_READY[24]       ,QI jobs 24 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 23. "        [23]          ,QI jobs 23 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 22. " [22]                 ,QI jobs 22 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 21. "        [21]          ,QI jobs 21 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 20. " [20]                 ,QI jobs 20 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 19. "        [19]          ,QI jobs 19 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 18. " [18]                 ,QI jobs 18 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 17. "        [17]          ,QI jobs 17 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 16. " [16]                 ,QI jobs 16 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 15. "        [15]          ,QI jobs 15 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 14. " [14]                 ,QI jobs 14 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 13. "        [13]          ,QI jobs 13 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 12. " [12]                 ,QI jobs 12 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 11. "        [11]          ,QI jobs 11 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 10. " [10]                 ,QI jobs 10 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 9. "        [9]           ,QI jobs 9 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 8. " [8]                  ,QI jobs 8 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 7. "        [7]           ,QI jobs 7 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 6. " [6]                  ,QI jobs 6 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 5. "        [5]           ,QI jobs 5 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 4. " [4]                  ,QI jobs 4 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 3. "        [3]           ,QI jobs 3 are ready for transfer to the job queue controller" "Not ready,Ready"
newline
bitfld.long 0x00 2. " [2]                  ,QI jobs 2 are ready for transfer to the job queue controller" "Not ready,Ready"
bitfld.long 0x00 1. "        [1]           ,QI jobs 1 are ready for transfer to the job queue controller" "Not ready,Ready"
rgroup.long 0x70510++0x03
line.long 0x00 "JOBS_XFR_BLK_DIS_QI,Jobs Transfer Blocking Disabled Register For QM Interface"
bitfld.long 0x00 24. " JOBS_XFR_BLK_DIS[24] ,QI job buffers 24 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 23. "              [23]          ,QI job buffers 23 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 22. " [22]                 ,QI job buffers 22 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 21. "              [21]          ,QI job buffers 21 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 20. " [20]                 ,QI job buffers 20 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 19. "              [19]          ,QI job buffers 19 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 18. " [18]                 ,QI job buffers 18 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 17. "              [17]          ,QI job buffers 17 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 16. " [16]                 ,QI job buffers 16 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 15. "              [15]          ,QI job buffers 15 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 14. " [14]                 ,QI job buffers 14 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 13. "              [13]          ,QI job buffers 13 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 12. " [12]                 ,QI job buffers 12 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 11. "              [11]          ,QI job buffers 11 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 10. " [10]                 ,QI job buffers 10 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 9. "              [9]           ,QI job buffers 9 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 8. " [8]                  ,QI job buffers 8 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 7. "              [7]           ,QI job buffers 7 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 6. " [6]                  ,QI job buffers 6 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 5. "              [5]           ,QI job buffers 5 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 4. " [4]                  ,QI job buffers 4 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 3. "              [3]           ,QI job buffers 3 hold jobs with transfer blocking disabled" "No,Yes"
newline
bitfld.long 0x00 2. " [2]                  ,QI job buffers 2 hold jobs with transfer blocking disabled" "No,Yes"
bitfld.long 0x00 1. "              [1]           ,QI job buffers 1 hold jobs with transfer blocking disabled" "No,Yes"
rgroup.long 0x70518++0x03
line.long 0x00 "JOBS_XFRD_QI,Jobs Transferred Register For QM Interface"
bitfld.long 0x00 24. " JOBS_XFRD[24]        ,QI jobs 24 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 23. "  [23]          ,QI jobs 23 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 22. " [22]                 ,QI jobs 22 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 21. "  [21]          ,QI jobs 21 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 20. " [20]                 ,QI jobs 20 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 19. "  [19]          ,QI jobs 19 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 18. " [18]                 ,QI jobs 18 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 17. "  [17]          ,QI jobs 17 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 16. " [16]                 ,QI jobs 16 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 15. "  [15]          ,QI jobs 15 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 14. " [14]                 ,QI jobs 14 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 13. "  [13]          ,QI jobs 13 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 12. " [12]                 ,QI jobs 12 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 11. "  [11]          ,QI jobs 11 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 10. " [10]                 ,QI jobs 10 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 9. "  [9]           ,QI jobs 9 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 8. " [8]                  ,QI jobs 8 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 7. "  [7]           ,QI jobs 7 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 6. " [6]                  ,QI jobs 6 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 5. "  [5]           ,QI jobs 5 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 4. " [4]                  ,QI jobs 4 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 3. "  [3]           ,QI jobs 3 transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 2. " [2]                  ,QI jobs 2 transferred to the job controller" "Not transferred,Transferred"
bitfld.long 0x00 1. "  [1]           ,QI jobs 1 transferred to the job controller" "Not transferred,Transferred"
rgroup.long 0x70520++0x03
line.long 0x00 "JOBS_EXEC_QI,Jobs Executing Register For QM Interface"
bitfld.long 0x00 24. " JOBS_EXEC[24]        ,QI jobs 24 are currently executing" "Not executing,Executing"
bitfld.long 0x00 23. "    [23]          ,QI jobs 23 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 22. " [22]                 ,QI jobs 22 are currently executing" "Not executing,Executing"
bitfld.long 0x00 21. "    [21]          ,QI jobs 21 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 20. " [20]                 ,QI jobs 20 are currently executing" "Not executing,Executing"
bitfld.long 0x00 19. "    [19]          ,QI jobs 19 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 18. " [18]                 ,QI jobs 18 are currently executing" "Not executing,Executing"
bitfld.long 0x00 17. "    [17]          ,QI jobs 17 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 16. " [16]                 ,QI jobs 16 are currently executing" "Not executing,Executing"
bitfld.long 0x00 15. "    [15]          ,QI jobs 15 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 14. " [14]                 ,QI jobs 14 are currently executing" "Not executing,Executing"
bitfld.long 0x00 13. "    [13]          ,QI jobs 13 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 12. " [12]                 ,QI jobs 12 are currently executing" "Not executing,Executing"
bitfld.long 0x00 11. "    [11]          ,QI jobs 11 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 10. " [10]                 ,QI jobs 10 are currently executing" "Not executing,Executing"
bitfld.long 0x00 9. "    [9]           ,QI jobs 9 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 8. " [8]                  ,QI jobs 8 are currently executing" "Not executing,Executing"
bitfld.long 0x00 7. "    [7]           ,QI jobs 7 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 6. " [6]                  ,QI jobs 6 are currently executing" "Not executing,Executing"
bitfld.long 0x00 5. "    [5]           ,QI jobs 5 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 4. " [4]                  ,QI jobs 4 are currently executing" "Not executing,Executing"
bitfld.long 0x00 3. "    [3]           ,QI jobs 3 are currently executing" "Not executing,Executing"
newline
bitfld.long 0x00 2. " [2]                  ,QI jobs 2 are currently executing" "Not executing,Executing"
bitfld.long 0x00 1. "    [1]           ,QI jobs 1 are currently executing" "Not executing,Executing"
rgroup.long 0x70528++0x03
line.long 0x00 "JOBS_DONE_QI,Jobs Done Register For QM Interface"
bitfld.long 0x00 24. " JOBS_DONE[24]        ,QI jobs 24 are done" "Not done,Done"
bitfld.long 0x00 23. "         [23]          ,QI jobs 23 are done" "Not done,Done"
newline
bitfld.long 0x00 22. " [22]                 ,QI jobs 22 are done" "Not done,Done"
bitfld.long 0x00 21. "         [21]          ,QI jobs 21 are done" "Not done,Done"
newline
bitfld.long 0x00 20. " [20]                 ,QI jobs 20 are done" "Not done,Done"
bitfld.long 0x00 19. "         [19]          ,QI jobs 19 are done" "Not done,Done"
newline
bitfld.long 0x00 18. " [18]                 ,QI jobs 18 are done" "Not done,Done"
bitfld.long 0x00 17. "         [17]          ,QI jobs 17 are done" "Not done,Done"
newline
bitfld.long 0x00 16. " [16]                 ,QI jobs 16 are done" "Not done,Done"
bitfld.long 0x00 15. "         [15]          ,QI jobs 15 are done" "Not done,Done"
newline
bitfld.long 0x00 14. " [14]                 ,QI jobs 14 are done" "Not done,Done"
bitfld.long 0x00 13. "         [13]          ,QI jobs 13 are done" "Not done,Done"
newline
bitfld.long 0x00 12. " [12]                 ,QI jobs 12 are done" "Not done,Done"
bitfld.long 0x00 11. "         [11]          ,QI jobs 11 are done" "Not done,Done"
newline
bitfld.long 0x00 10. " [10]                 ,QI jobs 10 are done" "Not done,Done"
bitfld.long 0x00 9. "         [9]           ,QI jobs 9 are done" "Not done,Done"
newline
bitfld.long 0x00 8. " [8]                  ,QI jobs 8 are done" "Not done,Done"
bitfld.long 0x00 7. "         [7]           ,QI jobs 7 are done" "Not done,Done"
newline
bitfld.long 0x00 6. " [6]                  ,QI jobs 6 are done" "Not done,Done"
bitfld.long 0x00 5. "         [5]           ,QI jobs 5 are done" "Not done,Done"
newline
bitfld.long 0x00 4. " [4]                  ,QI jobs 4 are done" "Not done,Done"
bitfld.long 0x00 3. "         [3]           ,QI jobs 3 are done" "Not done,Done"
newline
bitfld.long 0x00 2. " [2]                  ,QI jobs 2 are done" "Not done,Done"
bitfld.long 0x00 1. "         [1]           ,QI jobs 1 are done" "Not done,Done"
rgroup.long 0x70530++0x03
line.long 0x00 "SUBPORT_FC_QI,Subportal Frame Count Register For Queue Interface"
bitfld.long 0x00 20.--23. " SUBPORT_FC_05        ,Frame count for subportal 0x05" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16.--19. "               SUBPORT_FC_04 ,Frame count for subportal 0x04" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 12.--15. "               SUBPORT_FC_03 ,Frame count for subportal 0x03" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 8.--11. " SUBPORT_FC_02        ,Frame count for subportal 0x02" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "               SUBPORT_FC_01 ,Frame count for subportal 0x01" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0.--3. "               SUBPORT_FC_00 ,Frame count for subportal 0x00" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x70570++0x03
line.long 0x00 "JOB_SELECT_QI,Job Select Register For QI Interface"
rbitfld.long 0x00 8.--12. " JOBIDMAX             ,Maximum job ID for QI jobs" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "               JOB_SELECT    ,Job for which data is displayed in the QI job data registers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
width 12.
tree "Queue Interface Job Data Registers"
rgroup.long 0x70574++0x87
line.long 0x00 "QIJOBD0,Queue Interface Job Data Register 0"
hexmask.long.byte 0x00 16.--23. 1. " ERR     ,Error"
bitfld.long 0x00 13. "             EQ_IN_RSP   ,Enqueue frame using input partition response parameters for this job" "Disabled,Enabled"
newline
bitfld.long 0x00 12. " EQDQ    ,Enqueued dequeued frame for this job" "Not dequeued,Dequeued"
bitfld.long 0x00 11. "   BRP         ,Buffer release is pending for this job" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " FLEP    ,FLE write is pending for this job" "Disabled,Enabled"
bitfld.long 0x00 9. "       ASAP        ,ASA write is pending for this job" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " PTAP    ,PTA copy is pending for this job" "Disabled,Enabled"
bitfld.long 0x00 5. "       DONE        ,Job is done" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " EXEC    ,Job is executing" "Not executing,Executing"
bitfld.long 0x00 3. "  XFRD        ,Job has been transferred to the job controller" "Not transferred,Transferred"
newline
bitfld.long 0x00 2. " TBD     ,Job transfer blocking disabled" "Disabled,Enabled"
bitfld.long 0x00 1. "       RDY         ,Job ready for transfer to the job controller" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " USE     ,QI job buffer is currently in use" "Disabled,Enabled"
line.long 0x04 "QIJOBD1,Queue Interface Job Data Register 1"
bitfld.long 0x04 23. " BDI     ,Datapath isolation is bypassed for this job" "Not bypassed,Bypassed"
hexmask.long.tbyte 0x04 0.--22. 1. "   SFQID       ,ID of the source frame queue"
line.long 0x08 "QIJOBD2,Queue Interface Job Data Register 2"
bitfld.long 0x08 8. " FRM1    ,Frame is first in a dequeue" "0,1"
bitfld.long 0x08 0.--4. "              SPID        ,ID of the subportal" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x0C "QIJOBD3,Queue Interface Job Data Register 3"
bitfld.long 0x0C 23. " BDI     ,Datapath isolation is bypassed for this job" "Not bypassed,Bypassed"
hexmask.long.tbyte 0x0C 0.--22. 1. "   IRFQID      ,ID of the input partition return frame queue"
line.long 0x10 "QIJOBD4,Queue Interface Job Data Register 4"
bitfld.long 0x10 23. " BDI     ,Datapath isolation is bypassed for this job" "Not bypassed,Bypassed"
hexmask.long.tbyte 0x10 0.--22. 1. "   IRFQID      ,ID of the input partition return frame queue"
line.long 0x14 "QIJOBD5,Queue Interface Job Data Register 5"
bitfld.long 0x14 24.--25. " AUC     ,Input partition AMQ usage control" "0,1,2,3"
bitfld.long 0x14 20. "              IVA         ,Input partition virtual address enable" "Disabled,Enabled"
newline
bitfld.long 0x14 16. " IPL     ,Input partition ICID" "0,1"
hexmask.long.byte 0x14 0.--6. 1. "              IICID       ,ID of the input partition return frame queue"
line.long 0x18 "QIJOBD6,Queue Interface Job Data Register 6"
bitfld.long 0x18 24.--25. " AUC     ,Control partition AMQ usage control" "0,1,2,3"
bitfld.long 0x18 20. "              OVA         ,Output partition privilege level" "0,1"
newline
bitfld.long 0x18 16. " OPL     ,Output partition ICID" "0,1"
hexmask.long.byte 0x18 0.--6. 1. "              OICID       ,ICID of the output partition return frame queue"
line.long 0x1C "QIJOBD7,Queue Interface Job Data Register 7"
bitfld.long 0x1C 24.--25. " AUC     ,Input partition AMQ usage control" "0,1,2,3"
bitfld.long 0x1C 20. "              OVA         ,Control partition virtual address enable" "Disabled,Enabled"
newline
bitfld.long 0x1C 16. " CPL     ,Control partition privilege level" "0,1"
hexmask.long.byte 0x1C 0.--6. 1. "              CICID       ,ICID of the control partition"
line.long 0x20 "QIJOBD8,Queue Interface Job Data Register 8"
hexmask.long.word 0x20 0.--11. 1. " SDID    ,Security domain identifier"
line.long 0x24 "QIJOBD9,Queue Interface Job Data Register 9"
line.long 0x28 "QIJOBD10,Queue Interface Job Data Register 10"
line.long 0x2C "QIJOBD11,Queue Interface Job Data Register 11"
line.long 0x30 "QIJOBD12,Queue Interface Job Data Register 12"
bitfld.long 0x30 30. " SL      ,Dequeued frame having a short-length form" "False,True"
bitfld.long 0x30 28.--29. "          FMT         ,Format of the dequeued frame" "0,1,2,3"
newline
hexmask.long.word 0x30 16.--27. 1. " OFS     ,Data offset"
bitfld.long 0x30 15. "           BMT         ,Memory address translation is bypassed" "Not bypassed,Bypassed"
newline
bitfld.long 0x30 14. " FD_IVP  ,Dequeued frame for this job is invalid" "Valid,Invalid"
hexmask.long.word 0x30 0.--13. 1. "        FD_BPID     ,Buffer pool ID"
line.long 0x34 "QIJOBD13,Queue Interface Job Data Register 13"
line.long 0x38 "QIJOBD14,Queue Interface Job Data Register 14"
bitfld.long 0x38 28.--31. " DD      ,Dynamic debug mark" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 27. "             SC          ,Stashing control" "0,1"
newline
bitfld.long 0x38 24.--26. " DROPP   ,Drop priority" "0,1,2,3,4,5,6,7"
bitfld.long 0x38 23. "              PTA         ,Pass-Through annotation" "0,1"
newline
bitfld.long 0x38 22. " PVT1    ,Pass-through annotation 1 validity" "Not valid,Valid"
bitfld.long 0x38 21. "      PVT2        ,Pass-through annotation 2 validity" "Not valid,Valid"
newline
bitfld.long 0x38 16.--19. " FD_ASAL ,Dequeued frame accelerator-specific annotation length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x38 15. "             FD_CBMT     ,Dequeued frame flow context memory address translation bypass" "Not bypassed,Bypassed"
line.long 0x3C "QIJOBD15,Queue Interface Job Data Register 15"
line.long 0x40 "QIJOBD16,Queue Interface Job Data Register 16"
line.long 0x44 "QIJOBD17,Queue Interface Job Data Register 17"
line.long 0x48 "QIJOBD18,Queue Interface Job Data Register 18"
line.long 0x4C "QIJOBD19,Queue Interface Job Data Register 19"
line.long 0x50 "QIJOBD20,Queue Interface Job Data Register 20"
bitfld.long 0x50 30. " OSL     ,Output frame having a short-length form" "False,True"
bitfld.long 0x50 28.--29. "          OFMT        ,Output format of the dequeued frame" "0,1,2,3"
newline
hexmask.long.word 0x50 16.--27. 1. " OOFS    ,Data offset for the output frame"
bitfld.long 0x50 15. "           OBMT        ,Memory address translation bypassed for the output frame" "Not bypassed,Bypassed"
newline
bitfld.long 0x50 14. " FD_OIVP ,Output frame validity" "Valid,Invalid"
hexmask.long.word 0x50 0.--13. 1. "        FD_OBPID    ,Output frame buffer pool ID"
line.long 0x54 "QIJOBD21,Queue Interface Job Data Register 21"
bitfld.long 0x54 23. " OPTA    ,Pass-through annotation for the output frame" "0,1"
bitfld.long 0x54 22. "              OPVT1       ,Output frame pass-through annotation 1 validity" "Not valid,Valid"
newline
bitfld.long 0x54 21. " OPVT2   ,Output frame pass-through annotation 2 validity" "Not valid,Valid"
bitfld.long 0x54 16.--19. "      FD_ASAL     ,Length of the accelerator-specific annotation" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x54 15. " FD_BMT  ,Memory address translation bypassed" "Not bypassed,Bypassed"
bitfld.long 0x54 14. "   FD_OVA_FDC1 ,FL OF FD-compatibility field 1 / output partition virtual address usage" "0,1"
line.long 0x58 "QIJOBD22,Queue Interface Job Data Register 22"
bitfld.long 0x58 18. " EAO     ,Enable annotation output" "Disabled,Enabled"
bitfld.long 0x58 17. "       DAC         ,Disable annotation copy" "No,Yes"
newline
bitfld.long 0x58 16. " EWS     ,Enable write safe" "Disabled,Enabled"
hexmask.long.byte 0x58 8.--15. 1. "       CRID        ,Critical resource identifier"
newline
bitfld.long 0x58 0.--5. " SDL     ,Shared descriptor length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x5C "QIJOBD23,Queue Interface Job Data Register 23"
line.long 0x60 "QIJOBD24,Queue Interface Job Data Register 24"
line.long 0x64 "QIJOBD25,Queue Interface Job Data Register 25"
line.long 0x68 "QIJOBD26,Queue Interface Job Data Register 26"
line.long 0x6C "QIJOBD27,Queue Interface Job Data Register 27"
line.long 0x70 "QIJOBD28,Queue Interface Job Data Register 28"
line.long 0x74 "QIJOBD29,Queue Interface Job Data Register 29"
line.long 0x78 "QIJOBD30,Queue Interface Job Data Register 30"
line.long 0x7C "QIJOBD31,Queue Interface Job Data Register 31"
bitfld.long 0x7C 5. " ORSC    ,Output partition response stashing control enable" "Disabled,Enabled"
bitfld.long 0x7C 4. "       ORBMT       ,Output partition response memory address translation bypassed" "Not bypassed,Bypassed"
newline
bitfld.long 0x7C 1. " IRSC    ,Input partition response stashing control enable" "Disabled,Enabled"
bitfld.long 0x7C 0. "       IRBMT       ,Input partition response memory address translation bypassed" "Not bypassed,Bypassed"
line.long 0x80 "QIJOBD32,Queue Interface Job Data Register 32"
hexmask.long.byte 0x80 16.--23. 1. " DQ_IDX  ,The dequeue order index of the job awaiting transfer to the job queue controller"
hexmask.long.byte 0x80 8.--15. 1. "             PREV_IDX    ,The job buffer index of the previous job in the enqueue order list"
newline
hexmask.long.byte 0x80 0.--7. 1. " SFQID   ,The job buffer index of the next job in the enqueue order list"
line.long 0x84 "QIJOBD33,Queue Interface Job Data Register 33"
bitfld.long 0x84 4. " FICID   ,Job requested a flush of all QI jobs" "Not requested,Requested"
bitfld.long 0x84 3. "  FFQ         ,Job requested a flush of all jobs for this frame queue" "Not requested,Requested"
newline
bitfld.long 0x84 2. " FFLW    ,Job requested a flow flush" "Not requested,Requested"
bitfld.long 0x84 1. "  FABT        ,Job requested either ICID flush" "Not requested,Requested"
newline
bitfld.long 0x84 0. " FL      ,ID of the subportal" "0,1"
tree.end
newline
rgroup.long 0x70700++0x07
line.long 0x00 "REIR0QI,Recoverable Error Interrupt Record 0 For The Queue Interface"
bitfld.long 0x00 31. " MISS ,Second QI recoverable error occurrence" "Not occurred,Occurred"
bitfld.long 0x00 24.--25. "  TYPE    ,Indicates the type of the recoverable error" ",Memory access,Isolation,Dropped frame"
newline
hexmask.long.tbyte 0x00 0.--23. 1. " FQID ,Frame queue ID for isolation/dropped frame errors"
line.long 0x04 "REIR1QI,Recoverable Error Interrupt Record 1 For The Queue Interface"
bitfld.long 0x04 15. " BDI  ,BDI for the job associated with the recoverable error" "No error,Error"
hexmask.long.byte 0x04 0.--6. 1. "      IN_ICID ,Input ICID"
newline
rgroup.quad 0x70708++0x07
line.quad 0x00 "REIR2QI,Recoverable Error Interrupt Record 2 For The Queue Interface"
if (((per.l(ad:0x08000000+0x70700))&0x3000000)==0x2000000)
rgroup.long 0x70710++0x03
line.long 0x00 "REIR4QI,Recoverable Error Interrupt Record 4 For The Queue Interface"
bitfld.long 0x00 30.--31. " MIX     ,Memory interface index" "0,1,2,3"
bitfld.long 0x00 28.--29. "   ERR    ,AXI error response" "0,1,2,3"
newline
bitfld.long 0x00 25. " BMT     ,Bypass memory translation transaction attribute" "0,1"
bitfld.long 0x00 24. "   PL     ,Privilege level transaction attribute" "0,1"
newline
bitfld.long 0x00 23. " RWB     ,Read or write" "0,1"
bitfld.long 0x00 20.--22. "   AXPROT ,AXI protection transaction attribute" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 16.--19. " AXCACHE ,AXI cache control transaction attribute" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "  ICID   ,ICID transaction attribute associated"
else
rgroup.long 0x70710++0x03
line.long 0x00 "REIR4QI,Recoverable Error Interrupt Record 4 For The Queue Interface"
endif
rgroup.long 0x70714++0x03
line.long 0x00 "REIR5QI,Recoverable Error Interrupt Record 5 For The Queue Interface"
bitfld.long 0x00 24. " SAFE    ,AXI transaction associated being a read-safe or write-safe transaction" "0,1"
bitfld.long 0x00 16.--19. "   BID    ,Block identifier of the source of the AXI transaction associated" "General,Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,AIOP,Real-time,Queue,DECO0/CCB0,DECO1/CCB1,DECO2/CCB2,DECO3/CCB3,DECO4/CCB4,DECO5/CCB5,?..."
tree.end
width 12.
tree "CCB Mode Control And Status Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_NPK,CCB 0 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0x80004))&0x01)==0x01)
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0x80004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0x80004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0x80004))&0x0C)==0x08)
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0x80004++0x03
line.long 0x00 "C0C1MR_RNG,CCB 0 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0x80004+0x08)++0x03
line.long 0x00 "C0C1KSR,CCB 0 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0x80004+0x0C)++0x07
line.quad 0x00 "C0C1DSR,CCB 0 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0x80004+0x18)++0x03
line.long 0x00 "C0C1ICVSR,CCB 0 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0x80004+0x30)++0x03
line.long 0x00 "C0CCTRL,CCB 0 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0x80004+0x38)++0x03
line.long 0x00 "C0ICTL,CCB 0 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0x80004+0x40)++0x03
line.long 0x00 "C0CWR,CCB 0 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0x80004+0x44)++0x07
line.long 0x00 "C0CSTA_MS,CCB 0 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C0CSTA_LS,CCB 0 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0x80004+0x58)++0x03
line.long 0x00 "C0AADSZR,CCB 0 AAD Size Register 0"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x80004+0x60)++0x03
line.long 0x00 "C0C1IVSZR,Class 1 IV Size Register 0"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x80004+0x80)++0x03
line.long 0x00 "C0PKASZR,PKHA A Size Register 0"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0x80004+0x88)++0x03
line.long 0x00 "C0PKBSZR,PKHA B Size Register 0"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0x80004+0x90)++0x03
line.long 0x00 "C0PKNSZR,PKHA N Size Register 0"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0x80004+0x98)++0x03
line.long 0x00 "C0PKESZR,PKHA E Size Register 0"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0x80004++0x03
hide.long 0x00 "C0C1MR_NPK,CCB 0 Class 0 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0x80004++0x03
hide.long 0x00 "C0C1MR_PK,CCB 0 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0x80004++0x03
hide.long 0x00 "C0C1MR_RNG,CCB 0 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0x80004+0x08)++0x03
hide.long 0x00 "C0C1KSR,CCB 0 Class 1 Key Size Register"
newline
hgroup.quad (0x80004+0x0C)++0x07
hide.quad 0x00 "C0C1DSR,CCB 0 Class 1 Data Size Register"
newline
newline
hgroup.long (0x80004+0x18)++0x03
hide.long 0x00 "C0C1ICVSR,CCB 0 Class 1 ICV Size Register"
hgroup.long (0x80004+0x30)++0x03
hide.long 0x00 "C0CCTRL,CCB 0 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x80004+0x38)++0x03
hide.long 0x00 "C0ICTL,CCB 0 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x80004+0x40)++0x03
hide.long 0x00 "C0CWR,CCB 0 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x80004+0x44)++0x03
hide.long 0x00 "C0CSTA_MS,CCB 0 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0x80004+0x48)++0x03
hide.long 0x00 "C0CSTA_LS,CCB 0 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x80004+0x58)++0x03
hide.long 0x00 "C0AADSZR,CCB 0 AAD Size Register 0"
hgroup.long (0x80004+0x60)++0x03
hide.long 0x00 "C0C1IVSZR,Class 1 IV Size Register 0"
hgroup.long (0x80004+0x80)++0x03
hide.long 0x00 "C0PKASZR,PKHA A Size Register 0"
hgroup.long (0x80004+0x88)++0x03
hide.long 0x00 "C0PKBSZR,PKHA B Size Register 0"
hgroup.long (0x80004+0x90)++0x03
hide.long 0x00 "C0PKNSZR,PKHA N Size Register 0"
hgroup.long (0x80004+0x98)++0x03
hide.long 0x00 "C0PKESZR,PKHA E Size Register 0"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_NPK,CCB 1 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0x90004))&0x01)==0x01)
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0x90004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0x90004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0x90004))&0x0C)==0x08)
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0x90004++0x03
line.long 0x00 "C1C1MR_RNG,CCB 1 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0x90004+0x08)++0x03
line.long 0x00 "C1C1KSR,CCB 1 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0x90004+0x0C)++0x07
line.quad 0x00 "C1C1DSR,CCB 1 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0x90004+0x18)++0x03
line.long 0x00 "C1C1ICVSR,CCB 1 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0x90004+0x30)++0x03
line.long 0x00 "C1CCTRL,CCB 1 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0x90004+0x38)++0x03
line.long 0x00 "C1ICTL,CCB 1 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0x90004+0x40)++0x03
line.long 0x00 "C1CWR,CCB 1 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0x90004+0x44)++0x07
line.long 0x00 "C1CSTA_MS,CCB 1 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C1CSTA_LS,CCB 1 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0x90004+0x58)++0x03
line.long 0x00 "C1AADSZR,CCB 1 AAD Size Register 1"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x90004+0x60)++0x03
line.long 0x00 "C1C1IVSZR,Class 1 IV Size Register 1"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0x90004+0x80)++0x03
line.long 0x00 "C1PKASZR,PKHA A Size Register 1"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0x90004+0x88)++0x03
line.long 0x00 "C1PKBSZR,PKHA B Size Register 1"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0x90004+0x90)++0x03
line.long 0x00 "C1PKNSZR,PKHA N Size Register 1"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0x90004+0x98)++0x03
line.long 0x00 "C1PKESZR,PKHA E Size Register 1"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0x90004++0x03
hide.long 0x00 "C1C1MR_NPK,CCB 1 Class 1 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0x90004++0x03
hide.long 0x00 "C1C1MR_PK,CCB 1 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0x90004++0x03
hide.long 0x00 "C1C1MR_RNG,CCB 1 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0x90004+0x08)++0x03
hide.long 0x00 "C1C1KSR,CCB 1 Class 1 Key Size Register"
newline
hgroup.quad (0x90004+0x0C)++0x07
hide.quad 0x00 "C1C1DSR,CCB 1 Class 1 Data Size Register"
newline
newline
hgroup.long (0x90004+0x18)++0x03
hide.long 0x00 "C1C1ICVSR,CCB 1 Class 1 ICV Size Register"
hgroup.long (0x90004+0x30)++0x03
hide.long 0x00 "C1CCTRL,CCB 1 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x90004+0x38)++0x03
hide.long 0x00 "C1ICTL,CCB 1 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x90004+0x40)++0x03
hide.long 0x00 "C1CWR,CCB 1 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x90004+0x44)++0x03
hide.long 0x00 "C1CSTA_MS,CCB 1 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0x90004+0x48)++0x03
hide.long 0x00 "C1CSTA_LS,CCB 1 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0x90004+0x58)++0x03
hide.long 0x00 "C1AADSZR,CCB 1 AAD Size Register 1"
hgroup.long (0x90004+0x60)++0x03
hide.long 0x00 "C1C1IVSZR,Class 1 IV Size Register 1"
hgroup.long (0x90004+0x80)++0x03
hide.long 0x00 "C1PKASZR,PKHA A Size Register 1"
hgroup.long (0x90004+0x88)++0x03
hide.long 0x00 "C1PKBSZR,PKHA B Size Register 1"
hgroup.long (0x90004+0x90)++0x03
hide.long 0x00 "C1PKNSZR,PKHA N Size Register 1"
hgroup.long (0x90004+0x98)++0x03
hide.long 0x00 "C1PKESZR,PKHA E Size Register 1"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_NPK,CCB 2 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0xA0004))&0x01)==0x01)
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xA0004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xA0004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0xA0004))&0x0C)==0x08)
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0xA0004++0x03
line.long 0x00 "C2C1MR_RNG,CCB 2 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0xA0004+0x08)++0x03
line.long 0x00 "C2C1KSR,CCB 2 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0xA0004+0x0C)++0x07
line.quad 0x00 "C2C1DSR,CCB 2 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0xA0004+0x18)++0x03
line.long 0x00 "C2C1ICVSR,CCB 2 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0xA0004+0x30)++0x03
line.long 0x00 "C2CCTRL,CCB 2 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0xA0004+0x38)++0x03
line.long 0x00 "C2ICTL,CCB 2 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0xA0004+0x40)++0x03
line.long 0x00 "C2CWR,CCB 2 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0xA0004+0x44)++0x07
line.long 0x00 "C2CSTA_MS,CCB 2 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C2CSTA_LS,CCB 2 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0xA0004+0x58)++0x03
line.long 0x00 "C2AADSZR,CCB 2 AAD Size Register 2"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xA0004+0x60)++0x03
line.long 0x00 "C2C1IVSZR,Class 1 IV Size Register 2"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xA0004+0x80)++0x03
line.long 0x00 "C2PKASZR,PKHA A Size Register 2"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0xA0004+0x88)++0x03
line.long 0x00 "C2PKBSZR,PKHA B Size Register 2"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0xA0004+0x90)++0x03
line.long 0x00 "C2PKNSZR,PKHA N Size Register 2"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0xA0004+0x98)++0x03
line.long 0x00 "C2PKESZR,PKHA E Size Register 2"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0xA0004++0x03
hide.long 0x00 "C2C1MR_NPK,CCB 2 Class 2 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0xA0004++0x03
hide.long 0x00 "C2C1MR_PK,CCB 2 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0xA0004++0x03
hide.long 0x00 "C2C1MR_RNG,CCB 2 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0xA0004+0x08)++0x03
hide.long 0x00 "C2C1KSR,CCB 2 Class 1 Key Size Register"
newline
hgroup.quad (0xA0004+0x0C)++0x07
hide.quad 0x00 "C2C1DSR,CCB 2 Class 1 Data Size Register"
newline
newline
hgroup.long (0xA0004+0x18)++0x03
hide.long 0x00 "C2C1ICVSR,CCB 2 Class 1 ICV Size Register"
hgroup.long (0xA0004+0x30)++0x03
hide.long 0x00 "C2CCTRL,CCB 2 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xA0004+0x38)++0x03
hide.long 0x00 "C2ICTL,CCB 2 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xA0004+0x40)++0x03
hide.long 0x00 "C2CWR,CCB 2 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xA0004+0x44)++0x03
hide.long 0x00 "C2CSTA_MS,CCB 2 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0xA0004+0x48)++0x03
hide.long 0x00 "C2CSTA_LS,CCB 2 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xA0004+0x58)++0x03
hide.long 0x00 "C2AADSZR,CCB 2 AAD Size Register 2"
hgroup.long (0xA0004+0x60)++0x03
hide.long 0x00 "C2C1IVSZR,Class 1 IV Size Register 2"
hgroup.long (0xA0004+0x80)++0x03
hide.long 0x00 "C2PKASZR,PKHA A Size Register 2"
hgroup.long (0xA0004+0x88)++0x03
hide.long 0x00 "C2PKBSZR,PKHA B Size Register 2"
hgroup.long (0xA0004+0x90)++0x03
hide.long 0x00 "C2PKNSZR,PKHA N Size Register 2"
hgroup.long (0xA0004+0x98)++0x03
hide.long 0x00 "C2PKESZR,PKHA E Size Register 2"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_NPK,CCB 3 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0xB0004))&0x01)==0x01)
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xB0004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xB0004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0xB0004))&0x0C)==0x08)
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0xB0004++0x03
line.long 0x00 "C3C1MR_RNG,CCB 3 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0xB0004+0x08)++0x03
line.long 0x00 "C3C1KSR,CCB 3 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0xB0004+0x0C)++0x07
line.quad 0x00 "C3C1DSR,CCB 3 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0xB0004+0x18)++0x03
line.long 0x00 "C3C1ICVSR,CCB 3 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0xB0004+0x30)++0x03
line.long 0x00 "C3CCTRL,CCB 3 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0xB0004+0x38)++0x03
line.long 0x00 "C3ICTL,CCB 3 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0xB0004+0x40)++0x03
line.long 0x00 "C3CWR,CCB 3 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0xB0004+0x44)++0x07
line.long 0x00 "C3CSTA_MS,CCB 3 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C3CSTA_LS,CCB 3 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0xB0004+0x58)++0x03
line.long 0x00 "C3AADSZR,CCB 3 AAD Size Register 3"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xB0004+0x60)++0x03
line.long 0x00 "C3C1IVSZR,Class 1 IV Size Register 3"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xB0004+0x80)++0x03
line.long 0x00 "C3PKASZR,PKHA A Size Register 3"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0xB0004+0x88)++0x03
line.long 0x00 "C3PKBSZR,PKHA B Size Register 3"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0xB0004+0x90)++0x03
line.long 0x00 "C3PKNSZR,PKHA N Size Register 3"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0xB0004+0x98)++0x03
line.long 0x00 "C3PKESZR,PKHA E Size Register 3"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0xB0004++0x03
hide.long 0x00 "C3C1MR_NPK,CCB 3 Class 3 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0xB0004++0x03
hide.long 0x00 "C3C1MR_PK,CCB 3 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0xB0004++0x03
hide.long 0x00 "C3C1MR_RNG,CCB 3 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0xB0004+0x08)++0x03
hide.long 0x00 "C3C1KSR,CCB 3 Class 1 Key Size Register"
newline
hgroup.quad (0xB0004+0x0C)++0x07
hide.quad 0x00 "C3C1DSR,CCB 3 Class 1 Data Size Register"
newline
newline
hgroup.long (0xB0004+0x18)++0x03
hide.long 0x00 "C3C1ICVSR,CCB 3 Class 1 ICV Size Register"
hgroup.long (0xB0004+0x30)++0x03
hide.long 0x00 "C3CCTRL,CCB 3 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xB0004+0x38)++0x03
hide.long 0x00 "C3ICTL,CCB 3 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xB0004+0x40)++0x03
hide.long 0x00 "C3CWR,CCB 3 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xB0004+0x44)++0x03
hide.long 0x00 "C3CSTA_MS,CCB 3 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0xB0004+0x48)++0x03
hide.long 0x00 "C3CSTA_LS,CCB 3 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xB0004+0x58)++0x03
hide.long 0x00 "C3AADSZR,CCB 3 AAD Size Register 3"
hgroup.long (0xB0004+0x60)++0x03
hide.long 0x00 "C3C1IVSZR,Class 1 IV Size Register 3"
hgroup.long (0xB0004+0x80)++0x03
hide.long 0x00 "C3PKASZR,PKHA A Size Register 3"
hgroup.long (0xB0004+0x88)++0x03
hide.long 0x00 "C3PKBSZR,PKHA B Size Register 3"
hgroup.long (0xB0004+0x90)++0x03
hide.long 0x00 "C3PKNSZR,PKHA N Size Register 3"
hgroup.long (0xB0004+0x98)++0x03
hide.long 0x00 "C3PKESZR,PKHA E Size Register 3"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_NPK,CCB 4 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0xC0004))&0x01)==0x01)
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xC0004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xC0004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0xC0004))&0x0C)==0x08)
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0xC0004++0x03
line.long 0x00 "C4C1MR_RNG,CCB 4 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0xC0004+0x08)++0x03
line.long 0x00 "C4C1KSR,CCB 4 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0xC0004+0x0C)++0x07
line.quad 0x00 "C4C1DSR,CCB 4 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0xC0004+0x18)++0x03
line.long 0x00 "C4C1ICVSR,CCB 4 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0xC0004+0x30)++0x03
line.long 0x00 "C4CCTRL,CCB 4 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0xC0004+0x38)++0x03
line.long 0x00 "C4ICTL,CCB 4 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0xC0004+0x40)++0x03
line.long 0x00 "C4CWR,CCB 4 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0xC0004+0x44)++0x07
line.long 0x00 "C4CSTA_MS,CCB 4 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C4CSTA_LS,CCB 4 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0xC0004+0x58)++0x03
line.long 0x00 "C4AADSZR,CCB 4 AAD Size Register 4"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xC0004+0x60)++0x03
line.long 0x00 "C4C1IVSZR,Class 1 IV Size Register 4"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xC0004+0x80)++0x03
line.long 0x00 "C4PKASZR,PKHA A Size Register 4"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0xC0004+0x88)++0x03
line.long 0x00 "C4PKBSZR,PKHA B Size Register 4"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0xC0004+0x90)++0x03
line.long 0x00 "C4PKNSZR,PKHA N Size Register 4"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0xC0004+0x98)++0x03
line.long 0x00 "C4PKESZR,PKHA E Size Register 4"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0xC0004++0x03
hide.long 0x00 "C4C1MR_NPK,CCB 4 Class 4 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0xC0004++0x03
hide.long 0x00 "C4C1MR_PK,CCB 4 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0xC0004++0x03
hide.long 0x00 "C4C1MR_RNG,CCB 4 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0xC0004+0x08)++0x03
hide.long 0x00 "C4C1KSR,CCB 4 Class 1 Key Size Register"
newline
hgroup.quad (0xC0004+0x0C)++0x07
hide.quad 0x00 "C4C1DSR,CCB 4 Class 1 Data Size Register"
newline
newline
hgroup.long (0xC0004+0x18)++0x03
hide.long 0x00 "C4C1ICVSR,CCB 4 Class 1 ICV Size Register"
hgroup.long (0xC0004+0x30)++0x03
hide.long 0x00 "C4CCTRL,CCB 4 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xC0004+0x38)++0x03
hide.long 0x00 "C4ICTL,CCB 4 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xC0004+0x40)++0x03
hide.long 0x00 "C4CWR,CCB 4 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xC0004+0x44)++0x03
hide.long 0x00 "C4CSTA_MS,CCB 4 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0xC0004+0x48)++0x03
hide.long 0x00 "C4CSTA_LS,CCB 4 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xC0004+0x58)++0x03
hide.long 0x00 "C4AADSZR,CCB 4 AAD Size Register 4"
hgroup.long (0xC0004+0x60)++0x03
hide.long 0x00 "C4C1IVSZR,Class 1 IV Size Register 4"
hgroup.long (0xC0004+0x80)++0x03
hide.long 0x00 "C4PKASZR,PKHA A Size Register 4"
hgroup.long (0xC0004+0x88)++0x03
hide.long 0x00 "C4PKBSZR,PKHA B Size Register 4"
hgroup.long (0xC0004+0x90)++0x03
hide.long 0x00 "C4PKNSZR,PKHA N Size Register 4"
hgroup.long (0xC0004+0x98)++0x03
hide.long 0x00 "C4PKESZR,PKHA E Size Register 4"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_NPK,CCB 5 Class 1 Mode Register Format For Non-Public Key Algorithms"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm selection"
bitfld.long 0x00 13. "             C2K                  ,Class 2 Key" "Class 1,Class 2"
newline
hexmask.long.word 0x00 4.--12. 1. " AAI             ,Additional algorithm information"
bitfld.long 0x00 2.--3. "           AS                   ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
newline
bitfld.long 0x00 1. " ICV_TEST        ,ICV checking / test AES fault detection" "No,Yes"
bitfld.long 0x00 0. "            ENC                  ,Encryption or decryption" "Decrypt,Encrypt"
if (((per.l(ad:0x08000000+0xD0004))&0x01)==0x01)
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " ARAM            ,A RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 18. "   BRAM                 ,B RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 17. " ERAM            ,E RAM for zeroization" "Not selected,Selected"
bitfld.long 0x00 16. "   NRAM                 ,N RAM for zeroization" "Not selected,Selected"
newline
bitfld.long 0x00 9. " QUADRANT_3      ,Quadrant 3" "Not selected,Selected"
bitfld.long 0x00 8. "   QUADRANT_2           ,Quadrant 2" "Not selected,Selected"
newline
bitfld.long 0x00 7. " QUADRANT_1      ,Quadrant 1" "Not selected,Selected"
bitfld.long 0x00 6. "   QUADRANT_0           ,Quadrant 0" "Not selected,Selected"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xD0004))&0x1F)==(0x02||0x03||0x04||0x05||0x06||0x07||0x08||0x0C||0x0E||0x0F||0x16||0x18||0x19||0x1A||0x1B||0x1D||0x1E||0x1F))
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 19. " INM             ,Inputs in montgomery form" "Normal,Montgomery"
bitfld.long 0x00 18. "     OUTM                 ,Outputs in montgomery form" "Normal,Montgomery"
newline
bitfld.long 0x00 17. " F2M             ,Integer or binary polynomial arithmetic" "Integer,Binary"
bitfld.long 0x00 10. "        TEQ                  ,Timing equalized" "Not selected,Selected"
newline
bitfld.long 0x00 8.--9. " OUTSEL          ,Output destination select" "B,A,?..."
bitfld.long 0x00 0.--5. "              FUNCTION             ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
elif (((per.l(ad:0x08000000+0xD0004))&0x1F)==(0x10||0x11))
if (((per.l(ad:0x08000000+0xD0004))&0x0C)==0x08)
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,?..."
bitfld.long 0x00 6.--7. "           DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
else
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 17.--19. " SOURCE_REGISTER ,Source register" "A,B,N,?..."
bitfld.long 0x00 10.--11. "              DESTINATION_REGISTER ,B RAM for zeroization" "A,B,E,N,?..."
newline
bitfld.long 0x00 8.--9. " SOURCE_SEGMENT  ,Source segment" "0,1,2,3"
bitfld.long 0x00 6.--7. "              DESTINATION_SEGMENT  ,Destination segment" "0,1,2,3"
newline
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
else
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
bitfld.long 0x00 0.--5. " FUNCTION        ,Function" ",Clear mem,Add,Sub 1,Sub 2,Multip,Exp,Reduction,Inv,Point Add,Point Double,Point Multiply,Montgomery,,GCD,Miller-Rabin,N-Size,SRC-Size,,,,,Simultaneous Exp,,Double A,Double B,Square A,Cube A,Check Point,Shift Right A,Compare A B,Evaluate A,?..."
endif
group.long 0xD0004++0x03
line.long 0x00 "C5C1MR_RNG,CCB 5 Class 1 Mode Register Format For RNG4"
hexmask.long.byte 0x00 16.--23. 1. " ALG             ,Algorithm"
bitfld.long 0x00 13. "             C2K                  ,Class 2 key" "Class 1,Class 2"
newline
bitfld.long 0x00 12. " SK              ,Secure key" "Disabled,Enabled"
bitfld.long 0x00 11. "       AI                   ,Additional input included" "Not included,Included"
newline
bitfld.long 0x00 10. " PS              ,Personalization string included" "Not included,Included"
bitfld.long 0x00 9. "   OBP                  ,Odd byte parity" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " NZB             ,NonZero bytes" "Disabled,Enabled"
bitfld.long 0x00 4.--5. "       SH                   ,State handle" "SH0,SH1,?..."
newline
bitfld.long 0x00 2.--3. " AS              ,Algorithm state" "Generate,Instantiate,Reseed,Uninstantiate"
bitfld.long 0x00 1. "  PR                   ,Prediction resistance" "0,1"
newline
bitfld.long 0x00 0. " TST             ,Test mode request" "Not requested,Requested"
group.long (0xD0004+0x08)++0x03
line.long 0x00 "C5C1KSR,CCB 5 Class 1 Key Size Register"
hexmask.long.byte 0x00 0.--6. 1. " C1KS            ,Class 1 key size in bytes"
newline
group.quad (0xD0004+0x0C)++0x07
line.quad 0x00 "C5C1DSR,CCB 5 Class 1 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS         ,Class 1 data size number of bits" "0,1,2,3,4,5,6,7"
rbitfld.quad 0x00 32. "         C1CY            ,Class 1 data size carry" "No carry,Carry"
newline
hexmask.quad.long 0x00 0.--31. 1. " C1DS            ,Class 1 data size"
newline
group.long (0xD0004+0x18)++0x03
line.long 0x00 "C5C1ICVSR,CCB 5 Class 1 ICV Size Register"
bitfld.long 0x00 0.--4. " C1ICVS ,Class 1 ICV size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long (0xD0004+0x30)++0x03
line.long 0x00 "C5CCTRL,CCB 5 CHA Control Register"
bitfld.long 0x00 27. " UB     ,Unload the PKHA B memory" "No effect,Unload"
bitfld.long 0x00 26. "     UA     ,Unload the PKHA A memory" "No effect,Unload"
newline
bitfld.long 0x00 24. " UN     ,Unload the PKHA N memory" "No effect,Unload"
bitfld.long 0x00 23. "     UB3    ,Unload the public key b3 memory" "No effect,Unload"
newline
bitfld.long 0x00 22. " UB2    ,Unload the PKHA B2 Memory" "No effect,Unload"
bitfld.long 0x00 21. "     UB1    ,Unload the PKHA B1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 20. " UB0    ,Unload the PKHA B0 Memory" "No effect,Unload"
bitfld.long 0x00 19. "     UA3    ,Unload the PKHA A3 Memory" "No effect,Unload"
newline
bitfld.long 0x00 18. " UA2    ,Unload the PKHA A2 Memory" "No effect,Unload"
bitfld.long 0x00 17. "     UA1    ,Unload the PKHA A1 Memory" "No effect,Unload"
newline
bitfld.long 0x00 16. " UA0    ,Unload the PKHA A0 Memory" "No effect,Unload"
bitfld.long 0x00 13. "     AES_C2 ,Reset AES class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 12. " ZUCA   ,Reset ZUCA authentication accelerator" "No effect,Reset"
bitfld.long 0x00 11. "     ZUCE   ,Reset ZUCE encryption accelerator" "No effect,Reset"
newline
bitfld.long 0x00 10. " SNF9   ,Reset SNOW f9 block" "No effect,Reset"
bitfld.long 0x00 9. "     RNG    ,Reset random number generator" "No effect,Reset"
newline
bitfld.long 0x00 8. " CRC    ,Reset CRCA block" "No effect,Reset"
bitfld.long 0x00 7. "     MD     ,Reset MDHA hashing block" "No effect,Reset"
newline
bitfld.long 0x00 6. " PK     ,Reset PKHA block" "No effect,Reset"
bitfld.long 0x00 5. "     SNF8   ,Reset SNOW f8 block" "No effect,Reset"
newline
bitfld.long 0x00 4. " KAS    ,Reset KFHA kasumi" "No effect,Reset"
bitfld.long 0x00 2. "     DES    ,Reset DESA" "No effect,Reset"
newline
bitfld.long 0x00 1. " AES    ,Reset AESA" "No effect,Reset"
bitfld.long 0x00 0. "     ALL    ,Reset all internal CHAs" "No effect,Reset"
group.long (0xD0004+0x38)++0x03
line.long 0x00 "C5ICTL,CCB 5 Interrupt Control Register"
eventfld.long 0x00 28. " ZAEI   ,ZUCA error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 27. "  ZEEI   ,ZUCE error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 26. " S9EI   ,SNOW-f9 error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 25. "  RNEI   ,RNG error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 24. " CEI    ,CRC error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 23. "  MEI    ,Hashing error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 22. " PEI    ,Public key error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 21. "  S8EI   ,SNOW-f8 error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 20. " KEI    ,Kasumi error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 18. "  DEI    ,DES error interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 17. " AEI    ,AES error interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 12. "  ZADI   ,ZUCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 11. " ZEDI   ,ZUCE done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 10. "  S9DI   ,SNOW-f9 done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 9. " RNDI   ,RNG done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 8. "  CDI    ,CRCA done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 7. " MDI    ,MDHA hashing done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 6. "  PDI    ,PKHA public key done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 5. " S8DI   ,SNOW-f8 done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 4. "  KDI    ,KFHA kasumi done interrupt occurrence" "Not occurred,Occurred"
newline
eventfld.long 0x00 2. " DDI    ,DESA done interrupt occurrence" "Not occurred,Occurred"
eventfld.long 0x00 1. "  ADI    ,AESA done interrupt occurrence" "Not occurred,Occurred"
wgroup.long (0xD0004+0x40)++0x03
line.long 0x00 "C5CWR,CCB 5 Clear Written Register"
bitfld.long 0x00 31. " CIF    ,Clear input FIFO (and NFIFO)" "No effect,Reset"
bitfld.long 0x00 30. "     COF    ,Clear output FIFO" "No effect,Reset"
newline
bitfld.long 0x00 29. " C1RST  ,Reset class 1 CHA" "No effect,Reset"
bitfld.long 0x00 28. "     C2RST  ,Reset class 2 CHA" "No effect,Reset"
newline
bitfld.long 0x00 27. " C1D    ,Clear class 1 done interrupt" "No effect,Reset"
bitfld.long 0x00 26. "     C2D    ,Clear class 2 done interrupt" "No effect,Reset"
newline
bitfld.long 0x00 25. " CDS    ,Clear descriptor sharing signal" "No effect,Reset"
bitfld.long 0x00 22. "     C2K    ,Clear the class 2 key register" "No effect,Reset"
newline
bitfld.long 0x00 21. " C2C    ,Clear the class 2 context register" "No effect,Reset"
bitfld.long 0x00 18. "     C2DS   ,Clear the class 2 data size registers" "No effect,Reset"
newline
bitfld.long 0x00 16. " C2M    ,Clear the class 2 mode register" "No effect,Reset"
bitfld.long 0x00 15. "     CPKE   ,Clear the PKHA A size register" "No effect,Reset"
newline
bitfld.long 0x00 14. " CPKN   ,Clear the PKHA N size register" "No effect,Reset"
bitfld.long 0x00 13. "     CPKB   ,Clear the PKHA B size register" "No effect,Reset"
newline
bitfld.long 0x00 12. " CPKA   ,Clear the PKHA E size register" "No effect,Reset"
bitfld.long 0x00 6. "     C1K    ,Clear the class 1 key register" "No effect,Reset"
newline
bitfld.long 0x00 5. " C1C    ,Clear the class 1 context register" "No effect,Reset"
bitfld.long 0x00 3. "     C1ICV  ,Clear the class 1 ICV size register" "No effect,Reset"
newline
bitfld.long 0x00 2. " C1DS   ,Clear the class 1 data size register" "No effect,Reset"
bitfld.long 0x00 0. "     C1M    ,Clear the class 1 mode register" "No effect,Reset"
rgroup.long (0xD0004+0x44)++0x07
line.long 0x00 "C5CSTA_MS,CCB 5 Status And Error Register Most Significant Half"
bitfld.long 0x00 28.--31. " CL2    ,Class 2 algorithms" ",,,,MD5/SHA-[1/224/256/384/512[(/224)/(/256)]],,,,,CRC,SNOW f9,,ZUC authentication,?..."
newline
bitfld.long 0x00 16.--19. " ERRID2 ,Error ID 2" ",Mode,Data size,Key size,,,Data arrived out of sequence,,,,ICV check failed,Internal hardware failure,,,Invalid CHA combination was selected,Invalid CHA selected"
newline
bitfld.long 0x00 12.--15. " CL1    ,Class 1 algorithms" ",AES,DES,,,RNG,SNOW,Kasumi,Public key,,,ZUC encryption,?..."
newline
bitfld.long 0x00 0.--3. " ERRID1 ,Error ID 1" ",Mode,Data size,Key size,PKHA A memory size,PKHA B memory size,Data arrived out of sequence,PKHA divide by zero,PKHA modulus even,DES key parity,ICV check failed,Internal hardware failure,CCM AAD size,Class 1 CHA not reset,Invalid CHA combination,Invalid CHA"
line.long 0x04 "C5CSTA_LS,CCB 5 Status And Error Register Least-Significant Half"
bitfld.long 0x04 30. " PIZ    ,Public key operation is zero" "No,Yes"
bitfld.long 0x04 29. "           GCD    ,Greates common divisor is one" "No,Yes"
newline
bitfld.long 0x04 28. " PRM    ,Public key is prime" "No,Yes"
bitfld.long 0x04 21. "           SEI    ,Class 2 error interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 20. " PEI    ,Class 1 error interrupt" "Not occurred,Occurred"
bitfld.long 0x04 17. "  SDI    ,Class 2 done interrupt" "Not occurred,Occurred"
newline
bitfld.long 0x04 16. " PDI    ,Class 1 done interrupt" "Not occurred,Occurred"
bitfld.long 0x04 12. "  ZAB    ,ZUCA block busy" "Idle,Busy"
newline
bitfld.long 0x04 11. " ZEB    ,ZUCE block busy" "Idle,Busy"
bitfld.long 0x04 10. "          S9B    ,SNOW f9 busy" "Idle,Busy"
newline
bitfld.long 0x04 9. " RNB    ,RNG block busy" "Idle,Busy"
bitfld.long 0x04 8. "          CB     ,CRC block busy" "Idle,Busy"
newline
bitfld.long 0x04 7. " MB     ,MDHA busy" "Idle,Busy"
bitfld.long 0x04 6. "          PB     ,PKHA busy" "Idle,Busy"
newline
bitfld.long 0x04 5. " S8B    ,SNOW f8" "Idle,Busy"
bitfld.long 0x04 4. "          KB     ,KFHA busy" "Idle,Busy"
newline
bitfld.long 0x04 2. " DB     ,DESA busy" "Idle,Busy"
bitfld.long 0x04 1. "          AB     ,AESA busy" "Idle,Busy"
group.long (0xD0004+0x58)++0x03
line.long 0x00 "C5AADSZR,CCB 5 AAD Size Register 5"
bitfld.long 0x00 0.--3. " AASZ   ,AAD size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xD0004+0x60)++0x03
line.long 0x00 "C5C1IVSZR,Class 1 IV Size Register 5"
bitfld.long 0x00 0.--3. " IVSZ   ,IV size in bytes mod 16" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long (0xD0004+0x80)++0x03
line.long 0x00 "C5PKASZR,PKHA A Size Register 5"
hexmask.long.word 0x00 0.--9. 1. " PKASZ  ,PKHA A memory key size in bytes"
group.long (0xD0004+0x88)++0x03
line.long 0x00 "C5PKBSZR,PKHA B Size Register 5"
hexmask.long.word 0x00 0.--9. 1. " PKBSZ  ,PKHA B memory key size in bytes"
group.long (0xD0004+0x90)++0x03
line.long 0x00 "C5PKNSZR,PKHA N Size Register 5"
hexmask.long.word 0x00 0.--9. 1. " PKNSZ  ,PKHA N memory key size in bytes"
group.long (0xD0004+0x98)++0x03
line.long 0x00 "C5PKESZR,PKHA E Size Register 5"
hexmask.long.word 0x00 0.--9. 1. " PKESZ  ,PKHA E memory key size in bytes"
newline
else
hgroup.long 0xD0004++0x03
hide.long 0x00 "C5C1MR_NPK,CCB 5 Class 5 Mode Register Format For Non-Public Key Algorithms"
newline
newline
hgroup.long 0xD0004++0x03
hide.long 0x00 "C5C1MR_PK,CCB 5 Class 1 Mode Register Format For Public Key Algorithms"
newline
newline
newline
newline
hgroup.long 0xD0004++0x03
hide.long 0x00 "C5C1MR_RNG,CCB 5 Class 1 Mode Register Format For RNG4"
newline
newline
newline
newline
newline
hgroup.long (0xD0004+0x08)++0x03
hide.long 0x00 "C5C1KSR,CCB 5 Class 1 Key Size Register"
newline
hgroup.quad (0xD0004+0x0C)++0x07
hide.quad 0x00 "C5C1DSR,CCB 5 Class 1 Data Size Register"
newline
newline
hgroup.long (0xD0004+0x18)++0x03
hide.long 0x00 "C5C1ICVSR,CCB 5 Class 1 ICV Size Register"
hgroup.long (0xD0004+0x30)++0x03
hide.long 0x00 "C5CCTRL,CCB 5 CHA Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xD0004+0x38)++0x03
hide.long 0x00 "C5ICTL,CCB 5 Interrupt Control Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xD0004+0x40)++0x03
hide.long 0x00 "C5CWR,CCB 5 Clear Written Register"
newline
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xD0004+0x44)++0x03
hide.long 0x00 "C5CSTA_MS,CCB 5 Status And Error Register Most Significant Half"
newline
newline
newline
hgroup.long (0xD0004+0x48)++0x03
hide.long 0x00 "C5CSTA_LS,CCB 5 Status And Error Register Least-Significant Half"
newline
newline
newline
newline
newline
newline
newline
newline
hgroup.long (0xD0004+0x58)++0x03
hide.long 0x00 "C5AADSZR,CCB 5 AAD Size Register 5"
hgroup.long (0xD0004+0x60)++0x03
hide.long 0x00 "C5C1IVSZR,Class 1 IV Size Register 5"
hgroup.long (0xD0004+0x80)++0x03
hide.long 0x00 "C5PKASZR,PKHA A Size Register 5"
hgroup.long (0xD0004+0x88)++0x03
hide.long 0x00 "C5PKBSZR,PKHA B Size Register 5"
hgroup.long (0xD0004+0x90)++0x03
hide.long 0x00 "C5PKNSZR,PKHA N Size Register 5"
hgroup.long (0xD0004+0x98)++0x03
hide.long 0x00 "C5PKESZR,PKHA E Size Register 5"
newline
endif
tree.end
tree "CCB Class 1 Context Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80100++0x3F
line.long 0x00 "C0C1CTXR0,CCB 0 Class 1 Context Register Word 0"
line.long 0x04 "C0C1CTXR1,CCB 0 Class 1 Context Register Word 1"
line.long 0x08 "C0C1CTXR2,CCB 0 Class 1 Context Register Word 2"
line.long 0x0C "C0C1CTXR3,CCB 0 Class 1 Context Register Word 3"
line.long 0x10 "C0C1CTXR4,CCB 0 Class 1 Context Register Word 4"
line.long 0x14 "C0C1CTXR5,CCB 0 Class 1 Context Register Word 5"
line.long 0x18 "C0C1CTXR6,CCB 0 Class 1 Context Register Word 6"
line.long 0x1C "C0C1CTXR7,CCB 0 Class 1 Context Register Word 7"
line.long 0x20 "C0C1CTXR8,CCB 0 Class 1 Context Register Word 8"
line.long 0x24 "C0C1CTXR9,CCB 0 Class 1 Context Register Word 9"
line.long 0x28 "C0C1CTXR10,CCB 0 Class 1 Context Register Word 10"
line.long 0x2C "C0C1CTXR11,CCB 0 Class 1 Context Register Word 11"
line.long 0x30 "C0C1CTXR12,CCB 0 Class 1 Context Register Word 12"
line.long 0x34 "C0C1CTXR13,CCB 0 Class 1 Context Register Word 13"
line.long 0x38 "C0C1CTXR14,CCB 0 Class 1 Context Register Word 14"
line.long 0x3C "C0C1CTXR15,CCB 0 Class 1 Context Register Word 15"
else
hgroup.long 0x80100++0x03
hide.long 0x00 "C0C1CTXR0,CCB 0 Class 1 Context Register Word 0"
hgroup.long (0x80100+0x04)++0x03
hide.long 0x00 "C0C1CTXR1,CCB 0 Class 1 Context Register Word 1"
hgroup.long (0x80100+0x08)++0x03
hide.long 0x00 "C0C1CTXR2,CCB 0 Class 1 Context Register Word 2"
hgroup.long (0x80100+0x0C)++0x03
hide.long 0x00 "C0C1CTXR3,CCB 0 Class 1 Context Register Word 3"
hgroup.long (0x80100+0x10)++0x03
hide.long 0x00 "C0C1CTXR4,CCB 0 Class 1 Context Register Word 4"
hgroup.long (0x80100+0x14)++0x03
hide.long 0x00 "C0C1CTXR5,CCB 0 Class 1 Context Register Word 5"
hgroup.long (0x80100+0x18)++0x03
hide.long 0x00 "C0C1CTXR6,CCB 0 Class 1 Context Register Word 6"
hgroup.long (0x80100+0x1C)++0x03
hide.long 0x00 "C0C1CTXR7,CCB 0 Class 1 Context Register Word 7"
hgroup.long (0x80100+0x20)++0x03
hide.long 0x00 "C0C1CTXR8,CCB 0 Class 1 Context Register Word 8"
hgroup.long (0x80100+0x24)++0x03
hide.long 0x00 "C0C1CTXR9,CCB 0 Class 1 Context Register Word 9"
hgroup.long (0x80100+0x28)++0x03
hide.long 0x00 "C0C1CTXR10,CCB 0 Class 1 Context Register Word 10"
hgroup.long (0x80100+0x2C)++0x03
hide.long 0x00 "C0C1CTXR11,CCB 0 Class 1 Context Register Word 11"
hgroup.long (0x80100+0x30)++0x03
hide.long 0x00 "C0C1CTXR12,CCB 0 Class 1 Context Register Word 12"
hgroup.long (0x80100+0x34)++0x03
hide.long 0x00 "C0C1CTXR13,CCB 0 Class 1 Context Register Word 13"
hgroup.long (0x80100+0x38)++0x03
hide.long 0x00 "C0C1CTXR14,CCB 0 Class 1 Context Register Word 14"
hgroup.long (0x80100+0x3C)++0x03
hide.long 0x00 "C0C1CTXR15,CCB 0 Class 1 Context Register Word 15"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90100++0x3F
line.long 0x00 "C1C1CTXR0,CCB 1 Class 1 Context Register Word 0"
line.long 0x04 "C1C1CTXR1,CCB 1 Class 1 Context Register Word 1"
line.long 0x08 "C1C1CTXR2,CCB 1 Class 1 Context Register Word 2"
line.long 0x0C "C1C1CTXR3,CCB 1 Class 1 Context Register Word 3"
line.long 0x10 "C1C1CTXR4,CCB 1 Class 1 Context Register Word 4"
line.long 0x14 "C1C1CTXR5,CCB 1 Class 1 Context Register Word 5"
line.long 0x18 "C1C1CTXR6,CCB 1 Class 1 Context Register Word 6"
line.long 0x1C "C1C1CTXR7,CCB 1 Class 1 Context Register Word 7"
line.long 0x20 "C1C1CTXR8,CCB 1 Class 1 Context Register Word 8"
line.long 0x24 "C1C1CTXR9,CCB 1 Class 1 Context Register Word 9"
line.long 0x28 "C1C1CTXR10,CCB 1 Class 1 Context Register Word 10"
line.long 0x2C "C1C1CTXR11,CCB 1 Class 1 Context Register Word 11"
line.long 0x30 "C1C1CTXR12,CCB 1 Class 1 Context Register Word 12"
line.long 0x34 "C1C1CTXR13,CCB 1 Class 1 Context Register Word 13"
line.long 0x38 "C1C1CTXR14,CCB 1 Class 1 Context Register Word 14"
line.long 0x3C "C1C1CTXR15,CCB 1 Class 1 Context Register Word 15"
else
hgroup.long 0x90100++0x03
hide.long 0x00 "C1C1CTXR0,CCB 1 Class 1 Context Register Word 0"
hgroup.long (0x90100+0x04)++0x03
hide.long 0x00 "C1C1CTXR1,CCB 1 Class 1 Context Register Word 1"
hgroup.long (0x90100+0x08)++0x03
hide.long 0x00 "C1C1CTXR2,CCB 1 Class 1 Context Register Word 2"
hgroup.long (0x90100+0x0C)++0x03
hide.long 0x00 "C1C1CTXR3,CCB 1 Class 1 Context Register Word 3"
hgroup.long (0x90100+0x10)++0x03
hide.long 0x00 "C1C1CTXR4,CCB 1 Class 1 Context Register Word 4"
hgroup.long (0x90100+0x14)++0x03
hide.long 0x00 "C1C1CTXR5,CCB 1 Class 1 Context Register Word 5"
hgroup.long (0x90100+0x18)++0x03
hide.long 0x00 "C1C1CTXR6,CCB 1 Class 1 Context Register Word 6"
hgroup.long (0x90100+0x1C)++0x03
hide.long 0x00 "C1C1CTXR7,CCB 1 Class 1 Context Register Word 7"
hgroup.long (0x90100+0x20)++0x03
hide.long 0x00 "C1C1CTXR8,CCB 1 Class 1 Context Register Word 8"
hgroup.long (0x90100+0x24)++0x03
hide.long 0x00 "C1C1CTXR9,CCB 1 Class 1 Context Register Word 9"
hgroup.long (0x90100+0x28)++0x03
hide.long 0x00 "C1C1CTXR10,CCB 1 Class 1 Context Register Word 10"
hgroup.long (0x90100+0x2C)++0x03
hide.long 0x00 "C1C1CTXR11,CCB 1 Class 1 Context Register Word 11"
hgroup.long (0x90100+0x30)++0x03
hide.long 0x00 "C1C1CTXR12,CCB 1 Class 1 Context Register Word 12"
hgroup.long (0x90100+0x34)++0x03
hide.long 0x00 "C1C1CTXR13,CCB 1 Class 1 Context Register Word 13"
hgroup.long (0x90100+0x38)++0x03
hide.long 0x00 "C1C1CTXR14,CCB 1 Class 1 Context Register Word 14"
hgroup.long (0x90100+0x3C)++0x03
hide.long 0x00 "C1C1CTXR15,CCB 1 Class 1 Context Register Word 15"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0100++0x3F
line.long 0x00 "C2C1CTXR0,CCB 2 Class 1 Context Register Word 0"
line.long 0x04 "C2C1CTXR1,CCB 2 Class 1 Context Register Word 1"
line.long 0x08 "C2C1CTXR2,CCB 2 Class 1 Context Register Word 2"
line.long 0x0C "C2C1CTXR3,CCB 2 Class 1 Context Register Word 3"
line.long 0x10 "C2C1CTXR4,CCB 2 Class 1 Context Register Word 4"
line.long 0x14 "C2C1CTXR5,CCB 2 Class 1 Context Register Word 5"
line.long 0x18 "C2C1CTXR6,CCB 2 Class 1 Context Register Word 6"
line.long 0x1C "C2C1CTXR7,CCB 2 Class 1 Context Register Word 7"
line.long 0x20 "C2C1CTXR8,CCB 2 Class 1 Context Register Word 8"
line.long 0x24 "C2C1CTXR9,CCB 2 Class 1 Context Register Word 9"
line.long 0x28 "C2C1CTXR10,CCB 2 Class 1 Context Register Word 10"
line.long 0x2C "C2C1CTXR11,CCB 2 Class 1 Context Register Word 11"
line.long 0x30 "C2C1CTXR12,CCB 2 Class 1 Context Register Word 12"
line.long 0x34 "C2C1CTXR13,CCB 2 Class 1 Context Register Word 13"
line.long 0x38 "C2C1CTXR14,CCB 2 Class 1 Context Register Word 14"
line.long 0x3C "C2C1CTXR15,CCB 2 Class 1 Context Register Word 15"
else
hgroup.long 0xA0100++0x03
hide.long 0x00 "C2C1CTXR0,CCB 2 Class 1 Context Register Word 0"
hgroup.long (0xA0100+0x04)++0x03
hide.long 0x00 "C2C1CTXR1,CCB 2 Class 1 Context Register Word 1"
hgroup.long (0xA0100+0x08)++0x03
hide.long 0x00 "C2C1CTXR2,CCB 2 Class 1 Context Register Word 2"
hgroup.long (0xA0100+0x0C)++0x03
hide.long 0x00 "C2C1CTXR3,CCB 2 Class 1 Context Register Word 3"
hgroup.long (0xA0100+0x10)++0x03
hide.long 0x00 "C2C1CTXR4,CCB 2 Class 1 Context Register Word 4"
hgroup.long (0xA0100+0x14)++0x03
hide.long 0x00 "C2C1CTXR5,CCB 2 Class 1 Context Register Word 5"
hgroup.long (0xA0100+0x18)++0x03
hide.long 0x00 "C2C1CTXR6,CCB 2 Class 1 Context Register Word 6"
hgroup.long (0xA0100+0x1C)++0x03
hide.long 0x00 "C2C1CTXR7,CCB 2 Class 1 Context Register Word 7"
hgroup.long (0xA0100+0x20)++0x03
hide.long 0x00 "C2C1CTXR8,CCB 2 Class 1 Context Register Word 8"
hgroup.long (0xA0100+0x24)++0x03
hide.long 0x00 "C2C1CTXR9,CCB 2 Class 1 Context Register Word 9"
hgroup.long (0xA0100+0x28)++0x03
hide.long 0x00 "C2C1CTXR10,CCB 2 Class 1 Context Register Word 10"
hgroup.long (0xA0100+0x2C)++0x03
hide.long 0x00 "C2C1CTXR11,CCB 2 Class 1 Context Register Word 11"
hgroup.long (0xA0100+0x30)++0x03
hide.long 0x00 "C2C1CTXR12,CCB 2 Class 1 Context Register Word 12"
hgroup.long (0xA0100+0x34)++0x03
hide.long 0x00 "C2C1CTXR13,CCB 2 Class 1 Context Register Word 13"
hgroup.long (0xA0100+0x38)++0x03
hide.long 0x00 "C2C1CTXR14,CCB 2 Class 1 Context Register Word 14"
hgroup.long (0xA0100+0x3C)++0x03
hide.long 0x00 "C2C1CTXR15,CCB 2 Class 1 Context Register Word 15"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0100++0x3F
line.long 0x00 "C3C1CTXR0,CCB 3 Class 1 Context Register Word 0"
line.long 0x04 "C3C1CTXR1,CCB 3 Class 1 Context Register Word 1"
line.long 0x08 "C3C1CTXR2,CCB 3 Class 1 Context Register Word 2"
line.long 0x0C "C3C1CTXR3,CCB 3 Class 1 Context Register Word 3"
line.long 0x10 "C3C1CTXR4,CCB 3 Class 1 Context Register Word 4"
line.long 0x14 "C3C1CTXR5,CCB 3 Class 1 Context Register Word 5"
line.long 0x18 "C3C1CTXR6,CCB 3 Class 1 Context Register Word 6"
line.long 0x1C "C3C1CTXR7,CCB 3 Class 1 Context Register Word 7"
line.long 0x20 "C3C1CTXR8,CCB 3 Class 1 Context Register Word 8"
line.long 0x24 "C3C1CTXR9,CCB 3 Class 1 Context Register Word 9"
line.long 0x28 "C3C1CTXR10,CCB 3 Class 1 Context Register Word 10"
line.long 0x2C "C3C1CTXR11,CCB 3 Class 1 Context Register Word 11"
line.long 0x30 "C3C1CTXR12,CCB 3 Class 1 Context Register Word 12"
line.long 0x34 "C3C1CTXR13,CCB 3 Class 1 Context Register Word 13"
line.long 0x38 "C3C1CTXR14,CCB 3 Class 1 Context Register Word 14"
line.long 0x3C "C3C1CTXR15,CCB 3 Class 1 Context Register Word 15"
else
hgroup.long 0xB0100++0x03
hide.long 0x00 "C3C1CTXR0,CCB 3 Class 1 Context Register Word 0"
hgroup.long (0xB0100+0x04)++0x03
hide.long 0x00 "C3C1CTXR1,CCB 3 Class 1 Context Register Word 1"
hgroup.long (0xB0100+0x08)++0x03
hide.long 0x00 "C3C1CTXR2,CCB 3 Class 1 Context Register Word 2"
hgroup.long (0xB0100+0x0C)++0x03
hide.long 0x00 "C3C1CTXR3,CCB 3 Class 1 Context Register Word 3"
hgroup.long (0xB0100+0x10)++0x03
hide.long 0x00 "C3C1CTXR4,CCB 3 Class 1 Context Register Word 4"
hgroup.long (0xB0100+0x14)++0x03
hide.long 0x00 "C3C1CTXR5,CCB 3 Class 1 Context Register Word 5"
hgroup.long (0xB0100+0x18)++0x03
hide.long 0x00 "C3C1CTXR6,CCB 3 Class 1 Context Register Word 6"
hgroup.long (0xB0100+0x1C)++0x03
hide.long 0x00 "C3C1CTXR7,CCB 3 Class 1 Context Register Word 7"
hgroup.long (0xB0100+0x20)++0x03
hide.long 0x00 "C3C1CTXR8,CCB 3 Class 1 Context Register Word 8"
hgroup.long (0xB0100+0x24)++0x03
hide.long 0x00 "C3C1CTXR9,CCB 3 Class 1 Context Register Word 9"
hgroup.long (0xB0100+0x28)++0x03
hide.long 0x00 "C3C1CTXR10,CCB 3 Class 1 Context Register Word 10"
hgroup.long (0xB0100+0x2C)++0x03
hide.long 0x00 "C3C1CTXR11,CCB 3 Class 1 Context Register Word 11"
hgroup.long (0xB0100+0x30)++0x03
hide.long 0x00 "C3C1CTXR12,CCB 3 Class 1 Context Register Word 12"
hgroup.long (0xB0100+0x34)++0x03
hide.long 0x00 "C3C1CTXR13,CCB 3 Class 1 Context Register Word 13"
hgroup.long (0xB0100+0x38)++0x03
hide.long 0x00 "C3C1CTXR14,CCB 3 Class 1 Context Register Word 14"
hgroup.long (0xB0100+0x3C)++0x03
hide.long 0x00 "C3C1CTXR15,CCB 3 Class 1 Context Register Word 15"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0100++0x3F
line.long 0x00 "C4C1CTXR0,CCB 4 Class 1 Context Register Word 0"
line.long 0x04 "C4C1CTXR1,CCB 4 Class 1 Context Register Word 1"
line.long 0x08 "C4C1CTXR2,CCB 4 Class 1 Context Register Word 2"
line.long 0x0C "C4C1CTXR3,CCB 4 Class 1 Context Register Word 3"
line.long 0x10 "C4C1CTXR4,CCB 4 Class 1 Context Register Word 4"
line.long 0x14 "C4C1CTXR5,CCB 4 Class 1 Context Register Word 5"
line.long 0x18 "C4C1CTXR6,CCB 4 Class 1 Context Register Word 6"
line.long 0x1C "C4C1CTXR7,CCB 4 Class 1 Context Register Word 7"
line.long 0x20 "C4C1CTXR8,CCB 4 Class 1 Context Register Word 8"
line.long 0x24 "C4C1CTXR9,CCB 4 Class 1 Context Register Word 9"
line.long 0x28 "C4C1CTXR10,CCB 4 Class 1 Context Register Word 10"
line.long 0x2C "C4C1CTXR11,CCB 4 Class 1 Context Register Word 11"
line.long 0x30 "C4C1CTXR12,CCB 4 Class 1 Context Register Word 12"
line.long 0x34 "C4C1CTXR13,CCB 4 Class 1 Context Register Word 13"
line.long 0x38 "C4C1CTXR14,CCB 4 Class 1 Context Register Word 14"
line.long 0x3C "C4C1CTXR15,CCB 4 Class 1 Context Register Word 15"
else
hgroup.long 0xC0100++0x03
hide.long 0x00 "C4C1CTXR0,CCB 4 Class 1 Context Register Word 0"
hgroup.long (0xC0100+0x04)++0x03
hide.long 0x00 "C4C1CTXR1,CCB 4 Class 1 Context Register Word 1"
hgroup.long (0xC0100+0x08)++0x03
hide.long 0x00 "C4C1CTXR2,CCB 4 Class 1 Context Register Word 2"
hgroup.long (0xC0100+0x0C)++0x03
hide.long 0x00 "C4C1CTXR3,CCB 4 Class 1 Context Register Word 3"
hgroup.long (0xC0100+0x10)++0x03
hide.long 0x00 "C4C1CTXR4,CCB 4 Class 1 Context Register Word 4"
hgroup.long (0xC0100+0x14)++0x03
hide.long 0x00 "C4C1CTXR5,CCB 4 Class 1 Context Register Word 5"
hgroup.long (0xC0100+0x18)++0x03
hide.long 0x00 "C4C1CTXR6,CCB 4 Class 1 Context Register Word 6"
hgroup.long (0xC0100+0x1C)++0x03
hide.long 0x00 "C4C1CTXR7,CCB 4 Class 1 Context Register Word 7"
hgroup.long (0xC0100+0x20)++0x03
hide.long 0x00 "C4C1CTXR8,CCB 4 Class 1 Context Register Word 8"
hgroup.long (0xC0100+0x24)++0x03
hide.long 0x00 "C4C1CTXR9,CCB 4 Class 1 Context Register Word 9"
hgroup.long (0xC0100+0x28)++0x03
hide.long 0x00 "C4C1CTXR10,CCB 4 Class 1 Context Register Word 10"
hgroup.long (0xC0100+0x2C)++0x03
hide.long 0x00 "C4C1CTXR11,CCB 4 Class 1 Context Register Word 11"
hgroup.long (0xC0100+0x30)++0x03
hide.long 0x00 "C4C1CTXR12,CCB 4 Class 1 Context Register Word 12"
hgroup.long (0xC0100+0x34)++0x03
hide.long 0x00 "C4C1CTXR13,CCB 4 Class 1 Context Register Word 13"
hgroup.long (0xC0100+0x38)++0x03
hide.long 0x00 "C4C1CTXR14,CCB 4 Class 1 Context Register Word 14"
hgroup.long (0xC0100+0x3C)++0x03
hide.long 0x00 "C4C1CTXR15,CCB 4 Class 1 Context Register Word 15"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0100++0x3F
line.long 0x00 "C5C1CTXR0,CCB 5 Class 1 Context Register Word 0"
line.long 0x04 "C5C1CTXR1,CCB 5 Class 1 Context Register Word 1"
line.long 0x08 "C5C1CTXR2,CCB 5 Class 1 Context Register Word 2"
line.long 0x0C "C5C1CTXR3,CCB 5 Class 1 Context Register Word 3"
line.long 0x10 "C5C1CTXR4,CCB 5 Class 1 Context Register Word 4"
line.long 0x14 "C5C1CTXR5,CCB 5 Class 1 Context Register Word 5"
line.long 0x18 "C5C1CTXR6,CCB 5 Class 1 Context Register Word 6"
line.long 0x1C "C5C1CTXR7,CCB 5 Class 1 Context Register Word 7"
line.long 0x20 "C5C1CTXR8,CCB 5 Class 1 Context Register Word 8"
line.long 0x24 "C5C1CTXR9,CCB 5 Class 1 Context Register Word 9"
line.long 0x28 "C5C1CTXR10,CCB 5 Class 1 Context Register Word 10"
line.long 0x2C "C5C1CTXR11,CCB 5 Class 1 Context Register Word 11"
line.long 0x30 "C5C1CTXR12,CCB 5 Class 1 Context Register Word 12"
line.long 0x34 "C5C1CTXR13,CCB 5 Class 1 Context Register Word 13"
line.long 0x38 "C5C1CTXR14,CCB 5 Class 1 Context Register Word 14"
line.long 0x3C "C5C1CTXR15,CCB 5 Class 1 Context Register Word 15"
else
hgroup.long 0xD0100++0x03
hide.long 0x00 "C5C1CTXR0,CCB 5 Class 1 Context Register Word 0"
hgroup.long (0xD0100+0x04)++0x03
hide.long 0x00 "C5C1CTXR1,CCB 5 Class 1 Context Register Word 1"
hgroup.long (0xD0100+0x08)++0x03
hide.long 0x00 "C5C1CTXR2,CCB 5 Class 1 Context Register Word 2"
hgroup.long (0xD0100+0x0C)++0x03
hide.long 0x00 "C5C1CTXR3,CCB 5 Class 1 Context Register Word 3"
hgroup.long (0xD0100+0x10)++0x03
hide.long 0x00 "C5C1CTXR4,CCB 5 Class 1 Context Register Word 4"
hgroup.long (0xD0100+0x14)++0x03
hide.long 0x00 "C5C1CTXR5,CCB 5 Class 1 Context Register Word 5"
hgroup.long (0xD0100+0x18)++0x03
hide.long 0x00 "C5C1CTXR6,CCB 5 Class 1 Context Register Word 6"
hgroup.long (0xD0100+0x1C)++0x03
hide.long 0x00 "C5C1CTXR7,CCB 5 Class 1 Context Register Word 7"
hgroup.long (0xD0100+0x20)++0x03
hide.long 0x00 "C5C1CTXR8,CCB 5 Class 1 Context Register Word 8"
hgroup.long (0xD0100+0x24)++0x03
hide.long 0x00 "C5C1CTXR9,CCB 5 Class 1 Context Register Word 9"
hgroup.long (0xD0100+0x28)++0x03
hide.long 0x00 "C5C1CTXR10,CCB 5 Class 1 Context Register Word 10"
hgroup.long (0xD0100+0x2C)++0x03
hide.long 0x00 "C5C1CTXR11,CCB 5 Class 1 Context Register Word 11"
hgroup.long (0xD0100+0x30)++0x03
hide.long 0x00 "C5C1CTXR12,CCB 5 Class 1 Context Register Word 12"
hgroup.long (0xD0100+0x34)++0x03
hide.long 0x00 "C5C1CTXR13,CCB 5 Class 1 Context Register Word 13"
hgroup.long (0xD0100+0x38)++0x03
hide.long 0x00 "C5C1CTXR14,CCB 5 Class 1 Context Register Word 14"
hgroup.long (0xD0100+0x3C)++0x03
hide.long 0x00 "C5C1CTXR15,CCB 5 Class 1 Context Register Word 15"
endif
tree.end
tree "CCB Class 1 Key Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80200++0x1F
line.long 0x00 "C0C1KR0,CCB 0 Class 1 Key Register Word 0"
line.long 0x04 "C0C1KR1,CCB 0 Class 1 Key Register Word 1"
line.long 0x08 "C0C1KR2,CCB 0 Class 1 Key Register Word 2"
line.long 0x0C "C0C1KR3,CCB 0 Class 1 Key Register Word 3"
line.long 0x10 "C0C1KR4,CCB 0 Class 1 Key Register Word 4"
line.long 0x14 "C0C1KR5,CCB 0 Class 1 Key Register Word 5"
line.long 0x18 "C0C1KR6,CCB 0 Class 1 Key Register Word 6"
line.long 0x1C "C0C1KR7,CCB 0 Class 1 Key Register Word 7"
else
hgroup.long 0x80200++0x03
hide.long 0x00 "C0C1KR0,CCB 0 Class 1 Key Register Word 0"
hgroup.long (0x80200+0x04)++0x03
hide.long 0x00 "C0C1KR1,CCB 0 Class 1 Key Register Word 1"
hgroup.long (0x80200+0x08)++0x03
hide.long 0x00 "C0C1KR2,CCB 0 Class 1 Key Register Word 2"
hgroup.long (0x80200+0x0C)++0x03
hide.long 0x00 "C0C1KR3,CCB 0 Class 1 Key Register Word 3"
hgroup.long (0x80200+0x10)++0x03
hide.long 0x00 "C0C1KR4,CCB 0 Class 1 Key Register Word 4"
hgroup.long (0x80200+0x14)++0x03
hide.long 0x00 "C0C1KR5,CCB 0 Class 1 Key Register Word 5"
hgroup.long (0x80200+0x18)++0x03
hide.long 0x00 "C0C1KR6,CCB 0 Class 1 Key Register Word 6"
hgroup.long (0x80200+0x1C)++0x03
hide.long 0x00 "C0C1KR7,CCB 0 Class 1 Key Register Word 7"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90200++0x1F
line.long 0x00 "C1C1KR0,CCB 1 Class 1 Key Register Word 0"
line.long 0x04 "C1C1KR1,CCB 1 Class 1 Key Register Word 1"
line.long 0x08 "C1C1KR2,CCB 1 Class 1 Key Register Word 2"
line.long 0x0C "C1C1KR3,CCB 1 Class 1 Key Register Word 3"
line.long 0x10 "C1C1KR4,CCB 1 Class 1 Key Register Word 4"
line.long 0x14 "C1C1KR5,CCB 1 Class 1 Key Register Word 5"
line.long 0x18 "C1C1KR6,CCB 1 Class 1 Key Register Word 6"
line.long 0x1C "C1C1KR7,CCB 1 Class 1 Key Register Word 7"
else
hgroup.long 0x90200++0x03
hide.long 0x00 "C1C1KR0,CCB 1 Class 1 Key Register Word 0"
hgroup.long (0x90200+0x04)++0x03
hide.long 0x00 "C1C1KR1,CCB 1 Class 1 Key Register Word 1"
hgroup.long (0x90200+0x08)++0x03
hide.long 0x00 "C1C1KR2,CCB 1 Class 1 Key Register Word 2"
hgroup.long (0x90200+0x0C)++0x03
hide.long 0x00 "C1C1KR3,CCB 1 Class 1 Key Register Word 3"
hgroup.long (0x90200+0x10)++0x03
hide.long 0x00 "C1C1KR4,CCB 1 Class 1 Key Register Word 4"
hgroup.long (0x90200+0x14)++0x03
hide.long 0x00 "C1C1KR5,CCB 1 Class 1 Key Register Word 5"
hgroup.long (0x90200+0x18)++0x03
hide.long 0x00 "C1C1KR6,CCB 1 Class 1 Key Register Word 6"
hgroup.long (0x90200+0x1C)++0x03
hide.long 0x00 "C1C1KR7,CCB 1 Class 1 Key Register Word 7"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0200++0x1F
line.long 0x00 "C2C1KR0,CCB 2 Class 1 Key Register Word 0"
line.long 0x04 "C2C1KR1,CCB 2 Class 1 Key Register Word 1"
line.long 0x08 "C2C1KR2,CCB 2 Class 1 Key Register Word 2"
line.long 0x0C "C2C1KR3,CCB 2 Class 1 Key Register Word 3"
line.long 0x10 "C2C1KR4,CCB 2 Class 1 Key Register Word 4"
line.long 0x14 "C2C1KR5,CCB 2 Class 1 Key Register Word 5"
line.long 0x18 "C2C1KR6,CCB 2 Class 1 Key Register Word 6"
line.long 0x1C "C2C1KR7,CCB 2 Class 1 Key Register Word 7"
else
hgroup.long 0xA0200++0x03
hide.long 0x00 "C2C1KR0,CCB 2 Class 1 Key Register Word 0"
hgroup.long (0xA0200+0x04)++0x03
hide.long 0x00 "C2C1KR1,CCB 2 Class 1 Key Register Word 1"
hgroup.long (0xA0200+0x08)++0x03
hide.long 0x00 "C2C1KR2,CCB 2 Class 1 Key Register Word 2"
hgroup.long (0xA0200+0x0C)++0x03
hide.long 0x00 "C2C1KR3,CCB 2 Class 1 Key Register Word 3"
hgroup.long (0xA0200+0x10)++0x03
hide.long 0x00 "C2C1KR4,CCB 2 Class 1 Key Register Word 4"
hgroup.long (0xA0200+0x14)++0x03
hide.long 0x00 "C2C1KR5,CCB 2 Class 1 Key Register Word 5"
hgroup.long (0xA0200+0x18)++0x03
hide.long 0x00 "C2C1KR6,CCB 2 Class 1 Key Register Word 6"
hgroup.long (0xA0200+0x1C)++0x03
hide.long 0x00 "C2C1KR7,CCB 2 Class 1 Key Register Word 7"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0200++0x1F
line.long 0x00 "C3C1KR0,CCB 3 Class 1 Key Register Word 0"
line.long 0x04 "C3C1KR1,CCB 3 Class 1 Key Register Word 1"
line.long 0x08 "C3C1KR2,CCB 3 Class 1 Key Register Word 2"
line.long 0x0C "C3C1KR3,CCB 3 Class 1 Key Register Word 3"
line.long 0x10 "C3C1KR4,CCB 3 Class 1 Key Register Word 4"
line.long 0x14 "C3C1KR5,CCB 3 Class 1 Key Register Word 5"
line.long 0x18 "C3C1KR6,CCB 3 Class 1 Key Register Word 6"
line.long 0x1C "C3C1KR7,CCB 3 Class 1 Key Register Word 7"
else
hgroup.long 0xB0200++0x03
hide.long 0x00 "C3C1KR0,CCB 3 Class 1 Key Register Word 0"
hgroup.long (0xB0200+0x04)++0x03
hide.long 0x00 "C3C1KR1,CCB 3 Class 1 Key Register Word 1"
hgroup.long (0xB0200+0x08)++0x03
hide.long 0x00 "C3C1KR2,CCB 3 Class 1 Key Register Word 2"
hgroup.long (0xB0200+0x0C)++0x03
hide.long 0x00 "C3C1KR3,CCB 3 Class 1 Key Register Word 3"
hgroup.long (0xB0200+0x10)++0x03
hide.long 0x00 "C3C1KR4,CCB 3 Class 1 Key Register Word 4"
hgroup.long (0xB0200+0x14)++0x03
hide.long 0x00 "C3C1KR5,CCB 3 Class 1 Key Register Word 5"
hgroup.long (0xB0200+0x18)++0x03
hide.long 0x00 "C3C1KR6,CCB 3 Class 1 Key Register Word 6"
hgroup.long (0xB0200+0x1C)++0x03
hide.long 0x00 "C3C1KR7,CCB 3 Class 1 Key Register Word 7"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0200++0x1F
line.long 0x00 "C4C1KR0,CCB 4 Class 1 Key Register Word 0"
line.long 0x04 "C4C1KR1,CCB 4 Class 1 Key Register Word 1"
line.long 0x08 "C4C1KR2,CCB 4 Class 1 Key Register Word 2"
line.long 0x0C "C4C1KR3,CCB 4 Class 1 Key Register Word 3"
line.long 0x10 "C4C1KR4,CCB 4 Class 1 Key Register Word 4"
line.long 0x14 "C4C1KR5,CCB 4 Class 1 Key Register Word 5"
line.long 0x18 "C4C1KR6,CCB 4 Class 1 Key Register Word 6"
line.long 0x1C "C4C1KR7,CCB 4 Class 1 Key Register Word 7"
else
hgroup.long 0xC0200++0x03
hide.long 0x00 "C4C1KR0,CCB 4 Class 1 Key Register Word 0"
hgroup.long (0xC0200+0x04)++0x03
hide.long 0x00 "C4C1KR1,CCB 4 Class 1 Key Register Word 1"
hgroup.long (0xC0200+0x08)++0x03
hide.long 0x00 "C4C1KR2,CCB 4 Class 1 Key Register Word 2"
hgroup.long (0xC0200+0x0C)++0x03
hide.long 0x00 "C4C1KR3,CCB 4 Class 1 Key Register Word 3"
hgroup.long (0xC0200+0x10)++0x03
hide.long 0x00 "C4C1KR4,CCB 4 Class 1 Key Register Word 4"
hgroup.long (0xC0200+0x14)++0x03
hide.long 0x00 "C4C1KR5,CCB 4 Class 1 Key Register Word 5"
hgroup.long (0xC0200+0x18)++0x03
hide.long 0x00 "C4C1KR6,CCB 4 Class 1 Key Register Word 6"
hgroup.long (0xC0200+0x1C)++0x03
hide.long 0x00 "C4C1KR7,CCB 4 Class 1 Key Register Word 7"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0200++0x1F
line.long 0x00 "C5C1KR0,CCB 5 Class 1 Key Register Word 0"
line.long 0x04 "C5C1KR1,CCB 5 Class 1 Key Register Word 1"
line.long 0x08 "C5C1KR2,CCB 5 Class 1 Key Register Word 2"
line.long 0x0C "C5C1KR3,CCB 5 Class 1 Key Register Word 3"
line.long 0x10 "C5C1KR4,CCB 5 Class 1 Key Register Word 4"
line.long 0x14 "C5C1KR5,CCB 5 Class 1 Key Register Word 5"
line.long 0x18 "C5C1KR6,CCB 5 Class 1 Key Register Word 6"
line.long 0x1C "C5C1KR7,CCB 5 Class 1 Key Register Word 7"
else
hgroup.long 0xD0200++0x03
hide.long 0x00 "C5C1KR0,CCB 5 Class 1 Key Register Word 0"
hgroup.long (0xD0200+0x04)++0x03
hide.long 0x00 "C5C1KR1,CCB 5 Class 1 Key Register Word 1"
hgroup.long (0xD0200+0x08)++0x03
hide.long 0x00 "C5C1KR2,CCB 5 Class 1 Key Register Word 2"
hgroup.long (0xD0200+0x0C)++0x03
hide.long 0x00 "C5C1KR3,CCB 5 Class 1 Key Register Word 3"
hgroup.long (0xD0200+0x10)++0x03
hide.long 0x00 "C5C1KR4,CCB 5 Class 1 Key Register Word 4"
hgroup.long (0xD0200+0x14)++0x03
hide.long 0x00 "C5C1KR5,CCB 5 Class 1 Key Register Word 5"
hgroup.long (0xD0200+0x18)++0x03
hide.long 0x00 "C5C1KR6,CCB 5 Class 1 Key Register Word 6"
hgroup.long (0xD0200+0x1C)++0x03
hide.long 0x00 "C5C1KR7,CCB 5 Class 1 Key Register Word 7"
endif
tree.end
tree "CCB Class 2 Mode And Size Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80404++0x03
line.long 0x00 "C0C2MR,CCB 0 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0x80404+0x08)++0x03
line.long 0x00 "C0C2KSR,CCB 0 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0x80404+0x0C)++0x07
line.quad 0x00 "C0C2DSR,CCB 0 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0x80404+0x18)++0x03
line.long 0x00 "C0C2ICVSZR,CCB 0 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0x80404++0x03
hide.long 0x00 "C0C2MR,CCB 0 Class 2 Mode Register"
newline
newline
hgroup.long (0x80404+0x08)++0x03
hide.long 0x00 "C0C2KSR,CCB 0 Class 2 Key Size Register"
hgroup.quad (0x80404+0x0C)++0x07
hide.quad 0x00 "C0C2DSR,CCB 0 Class 2 Data Size Register"
newline
hgroup.long (0x80404+0x18)++0x03
hide.long 0x00 "C0C2ICVSZR,CCB 0 Class 2 ICV Size (mod 8) In Bytes"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90404++0x03
line.long 0x00 "C1C2MR,CCB 1 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0x90404+0x08)++0x03
line.long 0x00 "C1C2KSR,CCB 1 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0x90404+0x0C)++0x07
line.quad 0x00 "C1C2DSR,CCB 1 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0x90404+0x18)++0x03
line.long 0x00 "C1C2ICVSZR,CCB 1 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0x90404++0x03
hide.long 0x00 "C1C2MR,CCB 1 Class 2 Mode Register"
newline
newline
hgroup.long (0x90404+0x08)++0x03
hide.long 0x00 "C1C2KSR,CCB 1 Class 2 Key Size Register"
hgroup.quad (0x90404+0x0C)++0x07
hide.quad 0x00 "C1C2DSR,CCB 1 Class 2 Data Size Register"
newline
hgroup.long (0x90404+0x18)++0x03
hide.long 0x00 "C1C2ICVSZR,CCB 1 Class 2 ICV Size (mod 8) In Bytes"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0404++0x03
line.long 0x00 "C2C2MR,CCB 2 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0xA0404+0x08)++0x03
line.long 0x00 "C2C2KSR,CCB 2 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0xA0404+0x0C)++0x07
line.quad 0x00 "C2C2DSR,CCB 2 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0xA0404+0x18)++0x03
line.long 0x00 "C2C2ICVSZR,CCB 2 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0xA0404++0x03
hide.long 0x00 "C2C2MR,CCB 2 Class 2 Mode Register"
newline
newline
hgroup.long (0xA0404+0x08)++0x03
hide.long 0x00 "C2C2KSR,CCB 2 Class 2 Key Size Register"
hgroup.quad (0xA0404+0x0C)++0x07
hide.quad 0x00 "C2C2DSR,CCB 2 Class 2 Data Size Register"
newline
hgroup.long (0xA0404+0x18)++0x03
hide.long 0x00 "C2C2ICVSZR,CCB 2 Class 2 ICV Size (mod 8) In Bytes"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0404++0x03
line.long 0x00 "C3C2MR,CCB 3 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0xB0404+0x08)++0x03
line.long 0x00 "C3C2KSR,CCB 3 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0xB0404+0x0C)++0x07
line.quad 0x00 "C3C2DSR,CCB 3 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0xB0404+0x18)++0x03
line.long 0x00 "C3C2ICVSZR,CCB 3 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0xB0404++0x03
hide.long 0x00 "C3C2MR,CCB 3 Class 2 Mode Register"
newline
newline
hgroup.long (0xB0404+0x08)++0x03
hide.long 0x00 "C3C2KSR,CCB 3 Class 2 Key Size Register"
hgroup.quad (0xB0404+0x0C)++0x07
hide.quad 0x00 "C3C2DSR,CCB 3 Class 2 Data Size Register"
newline
hgroup.long (0xB0404+0x18)++0x03
hide.long 0x00 "C3C2ICVSZR,CCB 3 Class 2 ICV Size (mod 8) In Bytes"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0404++0x03
line.long 0x00 "C4C2MR,CCB 4 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0xC0404+0x08)++0x03
line.long 0x00 "C4C2KSR,CCB 4 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0xC0404+0x0C)++0x07
line.quad 0x00 "C4C2DSR,CCB 4 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0xC0404+0x18)++0x03
line.long 0x00 "C4C2ICVSZR,CCB 4 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0xC0404++0x03
hide.long 0x00 "C4C2MR,CCB 4 Class 2 Mode Register"
newline
newline
hgroup.long (0xC0404+0x08)++0x03
hide.long 0x00 "C4C2KSR,CCB 4 Class 2 Key Size Register"
hgroup.quad (0xC0404+0x0C)++0x07
hide.quad 0x00 "C4C2DSR,CCB 4 Class 2 Data Size Register"
newline
hgroup.long (0xC0404+0x18)++0x03
hide.long 0x00 "C4C2ICVSZR,CCB 4 Class 2 ICV Size (mod 8) In Bytes"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0404++0x03
line.long 0x00 "C5C2MR,CCB 5 Class 2 Mode Register"
hexmask.long.byte 0x00 16.--23. 1. "         ALG     ,Algorithm"
hexmask.long.word 0x00 4.--12. 1. "                     AAI  ,Additional algorithm information"
newline
bitfld.long 0x00 2.--3. "         AS      ,Algorithm state" "Updated,Initialized,Finalized,Initialized/Finalized"
bitfld.long 0x00 1. "  ICV  ,ICV checking" "Not compared,Compared"
newline
bitfld.long 0x00 0. "         AP      ,Authenticate / protect" "Authenticated,Protected"
group.long (0xD0404+0x08)++0x03
line.long 0x00 "C5C2KSR,CCB 5 Class 2 Key Size Register"
hexmask.long.byte 0x00 0.--7. 1. "         C2KS    ,Class 2 key size in bytes"
group.quad (0xD0404+0x0C)++0x07
line.quad 0x00 "C5C2DSR,CCB 5 Class 2 Data Size Register"
rbitfld.quad 0x00 61.--63. " NUMBITS ,Class 2 data size number of bits" "0,1,2,3,4,5,6,7"
bitfld.quad 0x00 32. "                      C2CY ,Class 2 data size carry" "No carry,Carry"
newline
hexmask.quad.byte 0x00 0.--7. 1. " C2DS    ,Class 2 data size"
group.long (0xD0404+0x18)++0x03
line.long 0x00 "C5C2ICVSZR,CCB 5 Class 2 ICV Size (mod 8) In Bytes"
bitfld.long 0x00 0.--3. "         ICVSZ   ,Class 2 ICV size in bytes" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
hgroup.long 0xD0404++0x03
hide.long 0x00 "C5C2MR,CCB 5 Class 2 Mode Register"
newline
newline
hgroup.long (0xD0404+0x08)++0x03
hide.long 0x00 "C5C2KSR,CCB 5 Class 2 Key Size Register"
hgroup.quad (0xD0404+0x0C)++0x07
hide.quad 0x00 "C5C2DSR,CCB 5 Class 2 Data Size Register"
newline
hgroup.long (0xD0404+0x18)++0x03
hide.long 0x00 "C5C2ICVSZR,CCB 5 Class 2 ICV Size (mod 8) In Bytes"
endif
tree.end
tree "CCB Class 2 Context Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80500++0x47
line.long 0x00 "C0C2CTXR0,CCB 0 Class 2 Context Register Word 0"
line.long 0x04 "C0C2CTXR1,CCB 0 Class 2 Context Register Word 1"
line.long 0x08 "C0C2CTXR2,CCB 0 Class 2 Context Register Word 2"
line.long 0x0C "C0C2CTXR3,CCB 0 Class 2 Context Register Word 3"
line.long 0x10 "C0C2CTXR4,CCB 0 Class 2 Context Register Word 4"
line.long 0x14 "C0C2CTXR5,CCB 0 Class 2 Context Register Word 5"
line.long 0x18 "C0C2CTXR6,CCB 0 Class 2 Context Register Word 6"
line.long 0x1C "C0C2CTXR7,CCB 0 Class 2 Context Register Word 7"
line.long 0x20 "C0C2CTXR8,CCB 0 Class 2 Context Register Word 8"
line.long 0x24 "C0C2CTXR9,CCB 0 Class 2 Context Register Word 9"
line.long 0x28 "C0C2CTXR10,CCB 0 Class 2 Context Register Word 10"
line.long 0x2C "C0C2CTXR11,CCB 0 Class 2 Context Register Word 11"
line.long 0x30 "C0C2CTXR12,CCB 0 Class 2 Context Register Word 12"
line.long 0x34 "C0C2CTXR13,CCB 0 Class 2 Context Register Word 13"
line.long 0x38 "C0C2CTXR14,CCB 0 Class 2 Context Register Word 14"
line.long 0x3C "C0C2CTXR15,CCB 0 Class 2 Context Register Word 15"
line.long 0x40 "C0C2CTXR16,CCB 0 Class 2 Context Register Word 16"
line.long 0x44 "C0C2CTXR17,CCB 0 Class 2 Context Register Word 17"
else
hgroup.long 0x80500++0x03
hide.long 0x00 "C0C2CTXR0,CCB 0 Class 2 Context Register Word 0"
hgroup.long (0x80500+0x04)++0x03
hide.long 0x00 "C0C2CTXR1,CCB 0 Class 2 Context Register Word 1"
hgroup.long (0x80500+0x08)++0x03
hide.long 0x00 "C0C2CTXR2,CCB 0 Class 2 Context Register Word 2"
hgroup.long (0x80500+0x0C)++0x03
hide.long 0x00 "C0C2CTXR3,CCB 0 Class 2 Context Register Word 3"
hgroup.long (0x80500+0x10)++0x03
hide.long 0x00 "C0C2CTXR4,CCB 0 Class 2 Context Register Word 4"
hgroup.long (0x80500+0x14)++0x03
hide.long 0x00 "C0C2CTXR5,CCB 0 Class 2 Context Register Word 5"
hgroup.long (0x80500+0x18)++0x03
hide.long 0x00 "C0C2CTXR6,CCB 0 Class 2 Context Register Word 6"
hgroup.long (0x80500+0x1C)++0x03
hide.long 0x00 "C0C2CTXR7,CCB 0 Class 2 Context Register Word 7"
hgroup.long (0x80500+0x20)++0x03
hide.long 0x00 "C0C2CTXR8,CCB 0 Class 2 Context Register Word 8"
hgroup.long (0x80500+0x24)++0x03
hide.long 0x00 "C0C2CTXR9,CCB 0 Class 2 Context Register Word 9"
hgroup.long (0x80500+0x28)++0x03
hide.long 0x00 "C0C2CTXR10,CCB 0 Class 2 Context Register Word 10"
hgroup.long (0x80500+0x2C)++0x03
hide.long 0x00 "C0C2CTXR11,CCB 0 Class 2 Context Register Word 11"
hgroup.long (0x80500+0x30)++0x03
hide.long 0x00 "C0C2CTXR12,CCB 0 Class 2 Context Register Word 12"
hgroup.long (0x80500+0x34)++0x03
hide.long 0x00 "C0C2CTXR13,CCB 0 Class 2 Context Register Word 13"
hgroup.long (0x80500+0x38)++0x03
hide.long 0x00 "C0C2CTXR14,CCB 0 Class 2 Context Register Word 14"
hgroup.long (0x80500+0x3C)++0x03
hide.long 0x00 "C0C2CTXR15,CCB 0 Class 2 Context Register Word 15"
hgroup.long (0x80500+0x40)++0x03
hide.long 0x00 "C0C2CTXR16,CCB 0 Class 2 Context Register Word 16"
hgroup.long (0x80500+0x44)++0x03
hide.long 0x00 "C0C2CTXR17,CCB 0 Class 2 Context Register Word 17"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90500++0x47
line.long 0x00 "C1C2CTXR0,CCB 1 Class 2 Context Register Word 0"
line.long 0x04 "C1C2CTXR1,CCB 1 Class 2 Context Register Word 1"
line.long 0x08 "C1C2CTXR2,CCB 1 Class 2 Context Register Word 2"
line.long 0x0C "C1C2CTXR3,CCB 1 Class 2 Context Register Word 3"
line.long 0x10 "C1C2CTXR4,CCB 1 Class 2 Context Register Word 4"
line.long 0x14 "C1C2CTXR5,CCB 1 Class 2 Context Register Word 5"
line.long 0x18 "C1C2CTXR6,CCB 1 Class 2 Context Register Word 6"
line.long 0x1C "C1C2CTXR7,CCB 1 Class 2 Context Register Word 7"
line.long 0x20 "C1C2CTXR8,CCB 1 Class 2 Context Register Word 8"
line.long 0x24 "C1C2CTXR9,CCB 1 Class 2 Context Register Word 9"
line.long 0x28 "C1C2CTXR10,CCB 1 Class 2 Context Register Word 10"
line.long 0x2C "C1C2CTXR11,CCB 1 Class 2 Context Register Word 11"
line.long 0x30 "C1C2CTXR12,CCB 1 Class 2 Context Register Word 12"
line.long 0x34 "C1C2CTXR13,CCB 1 Class 2 Context Register Word 13"
line.long 0x38 "C1C2CTXR14,CCB 1 Class 2 Context Register Word 14"
line.long 0x3C "C1C2CTXR15,CCB 1 Class 2 Context Register Word 15"
line.long 0x40 "C1C2CTXR16,CCB 1 Class 2 Context Register Word 16"
line.long 0x44 "C1C2CTXR17,CCB 1 Class 2 Context Register Word 17"
else
hgroup.long 0x90500++0x03
hide.long 0x00 "C1C2CTXR0,CCB 1 Class 2 Context Register Word 0"
hgroup.long (0x90500+0x04)++0x03
hide.long 0x00 "C1C2CTXR1,CCB 1 Class 2 Context Register Word 1"
hgroup.long (0x90500+0x08)++0x03
hide.long 0x00 "C1C2CTXR2,CCB 1 Class 2 Context Register Word 2"
hgroup.long (0x90500+0x0C)++0x03
hide.long 0x00 "C1C2CTXR3,CCB 1 Class 2 Context Register Word 3"
hgroup.long (0x90500+0x10)++0x03
hide.long 0x00 "C1C2CTXR4,CCB 1 Class 2 Context Register Word 4"
hgroup.long (0x90500+0x14)++0x03
hide.long 0x00 "C1C2CTXR5,CCB 1 Class 2 Context Register Word 5"
hgroup.long (0x90500+0x18)++0x03
hide.long 0x00 "C1C2CTXR6,CCB 1 Class 2 Context Register Word 6"
hgroup.long (0x90500+0x1C)++0x03
hide.long 0x00 "C1C2CTXR7,CCB 1 Class 2 Context Register Word 7"
hgroup.long (0x90500+0x20)++0x03
hide.long 0x00 "C1C2CTXR8,CCB 1 Class 2 Context Register Word 8"
hgroup.long (0x90500+0x24)++0x03
hide.long 0x00 "C1C2CTXR9,CCB 1 Class 2 Context Register Word 9"
hgroup.long (0x90500+0x28)++0x03
hide.long 0x00 "C1C2CTXR10,CCB 1 Class 2 Context Register Word 10"
hgroup.long (0x90500+0x2C)++0x03
hide.long 0x00 "C1C2CTXR11,CCB 1 Class 2 Context Register Word 11"
hgroup.long (0x90500+0x30)++0x03
hide.long 0x00 "C1C2CTXR12,CCB 1 Class 2 Context Register Word 12"
hgroup.long (0x90500+0x34)++0x03
hide.long 0x00 "C1C2CTXR13,CCB 1 Class 2 Context Register Word 13"
hgroup.long (0x90500+0x38)++0x03
hide.long 0x00 "C1C2CTXR14,CCB 1 Class 2 Context Register Word 14"
hgroup.long (0x90500+0x3C)++0x03
hide.long 0x00 "C1C2CTXR15,CCB 1 Class 2 Context Register Word 15"
hgroup.long (0x90500+0x40)++0x03
hide.long 0x00 "C1C2CTXR16,CCB 1 Class 2 Context Register Word 16"
hgroup.long (0x90500+0x44)++0x03
hide.long 0x00 "C1C2CTXR17,CCB 1 Class 2 Context Register Word 17"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0500++0x47
line.long 0x00 "C2C2CTXR0,CCB 2 Class 2 Context Register Word 0"
line.long 0x04 "C2C2CTXR1,CCB 2 Class 2 Context Register Word 1"
line.long 0x08 "C2C2CTXR2,CCB 2 Class 2 Context Register Word 2"
line.long 0x0C "C2C2CTXR3,CCB 2 Class 2 Context Register Word 3"
line.long 0x10 "C2C2CTXR4,CCB 2 Class 2 Context Register Word 4"
line.long 0x14 "C2C2CTXR5,CCB 2 Class 2 Context Register Word 5"
line.long 0x18 "C2C2CTXR6,CCB 2 Class 2 Context Register Word 6"
line.long 0x1C "C2C2CTXR7,CCB 2 Class 2 Context Register Word 7"
line.long 0x20 "C2C2CTXR8,CCB 2 Class 2 Context Register Word 8"
line.long 0x24 "C2C2CTXR9,CCB 2 Class 2 Context Register Word 9"
line.long 0x28 "C2C2CTXR10,CCB 2 Class 2 Context Register Word 10"
line.long 0x2C "C2C2CTXR11,CCB 2 Class 2 Context Register Word 11"
line.long 0x30 "C2C2CTXR12,CCB 2 Class 2 Context Register Word 12"
line.long 0x34 "C2C2CTXR13,CCB 2 Class 2 Context Register Word 13"
line.long 0x38 "C2C2CTXR14,CCB 2 Class 2 Context Register Word 14"
line.long 0x3C "C2C2CTXR15,CCB 2 Class 2 Context Register Word 15"
line.long 0x40 "C2C2CTXR16,CCB 2 Class 2 Context Register Word 16"
line.long 0x44 "C2C2CTXR17,CCB 2 Class 2 Context Register Word 17"
else
hgroup.long 0xA0500++0x03
hide.long 0x00 "C2C2CTXR0,CCB 2 Class 2 Context Register Word 0"
hgroup.long (0xA0500+0x04)++0x03
hide.long 0x00 "C2C2CTXR1,CCB 2 Class 2 Context Register Word 1"
hgroup.long (0xA0500+0x08)++0x03
hide.long 0x00 "C2C2CTXR2,CCB 2 Class 2 Context Register Word 2"
hgroup.long (0xA0500+0x0C)++0x03
hide.long 0x00 "C2C2CTXR3,CCB 2 Class 2 Context Register Word 3"
hgroup.long (0xA0500+0x10)++0x03
hide.long 0x00 "C2C2CTXR4,CCB 2 Class 2 Context Register Word 4"
hgroup.long (0xA0500+0x14)++0x03
hide.long 0x00 "C2C2CTXR5,CCB 2 Class 2 Context Register Word 5"
hgroup.long (0xA0500+0x18)++0x03
hide.long 0x00 "C2C2CTXR6,CCB 2 Class 2 Context Register Word 6"
hgroup.long (0xA0500+0x1C)++0x03
hide.long 0x00 "C2C2CTXR7,CCB 2 Class 2 Context Register Word 7"
hgroup.long (0xA0500+0x20)++0x03
hide.long 0x00 "C2C2CTXR8,CCB 2 Class 2 Context Register Word 8"
hgroup.long (0xA0500+0x24)++0x03
hide.long 0x00 "C2C2CTXR9,CCB 2 Class 2 Context Register Word 9"
hgroup.long (0xA0500+0x28)++0x03
hide.long 0x00 "C2C2CTXR10,CCB 2 Class 2 Context Register Word 10"
hgroup.long (0xA0500+0x2C)++0x03
hide.long 0x00 "C2C2CTXR11,CCB 2 Class 2 Context Register Word 11"
hgroup.long (0xA0500+0x30)++0x03
hide.long 0x00 "C2C2CTXR12,CCB 2 Class 2 Context Register Word 12"
hgroup.long (0xA0500+0x34)++0x03
hide.long 0x00 "C2C2CTXR13,CCB 2 Class 2 Context Register Word 13"
hgroup.long (0xA0500+0x38)++0x03
hide.long 0x00 "C2C2CTXR14,CCB 2 Class 2 Context Register Word 14"
hgroup.long (0xA0500+0x3C)++0x03
hide.long 0x00 "C2C2CTXR15,CCB 2 Class 2 Context Register Word 15"
hgroup.long (0xA0500+0x40)++0x03
hide.long 0x00 "C2C2CTXR16,CCB 2 Class 2 Context Register Word 16"
hgroup.long (0xA0500+0x44)++0x03
hide.long 0x00 "C2C2CTXR17,CCB 2 Class 2 Context Register Word 17"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0500++0x47
line.long 0x00 "C3C2CTXR0,CCB 3 Class 2 Context Register Word 0"
line.long 0x04 "C3C2CTXR1,CCB 3 Class 2 Context Register Word 1"
line.long 0x08 "C3C2CTXR2,CCB 3 Class 2 Context Register Word 2"
line.long 0x0C "C3C2CTXR3,CCB 3 Class 2 Context Register Word 3"
line.long 0x10 "C3C2CTXR4,CCB 3 Class 2 Context Register Word 4"
line.long 0x14 "C3C2CTXR5,CCB 3 Class 2 Context Register Word 5"
line.long 0x18 "C3C2CTXR6,CCB 3 Class 2 Context Register Word 6"
line.long 0x1C "C3C2CTXR7,CCB 3 Class 2 Context Register Word 7"
line.long 0x20 "C3C2CTXR8,CCB 3 Class 2 Context Register Word 8"
line.long 0x24 "C3C2CTXR9,CCB 3 Class 2 Context Register Word 9"
line.long 0x28 "C3C2CTXR10,CCB 3 Class 2 Context Register Word 10"
line.long 0x2C "C3C2CTXR11,CCB 3 Class 2 Context Register Word 11"
line.long 0x30 "C3C2CTXR12,CCB 3 Class 2 Context Register Word 12"
line.long 0x34 "C3C2CTXR13,CCB 3 Class 2 Context Register Word 13"
line.long 0x38 "C3C2CTXR14,CCB 3 Class 2 Context Register Word 14"
line.long 0x3C "C3C2CTXR15,CCB 3 Class 2 Context Register Word 15"
line.long 0x40 "C3C2CTXR16,CCB 3 Class 2 Context Register Word 16"
line.long 0x44 "C3C2CTXR17,CCB 3 Class 2 Context Register Word 17"
else
hgroup.long 0xB0500++0x03
hide.long 0x00 "C3C2CTXR0,CCB 3 Class 2 Context Register Word 0"
hgroup.long (0xB0500+0x04)++0x03
hide.long 0x00 "C3C2CTXR1,CCB 3 Class 2 Context Register Word 1"
hgroup.long (0xB0500+0x08)++0x03
hide.long 0x00 "C3C2CTXR2,CCB 3 Class 2 Context Register Word 2"
hgroup.long (0xB0500+0x0C)++0x03
hide.long 0x00 "C3C2CTXR3,CCB 3 Class 2 Context Register Word 3"
hgroup.long (0xB0500+0x10)++0x03
hide.long 0x00 "C3C2CTXR4,CCB 3 Class 2 Context Register Word 4"
hgroup.long (0xB0500+0x14)++0x03
hide.long 0x00 "C3C2CTXR5,CCB 3 Class 2 Context Register Word 5"
hgroup.long (0xB0500+0x18)++0x03
hide.long 0x00 "C3C2CTXR6,CCB 3 Class 2 Context Register Word 6"
hgroup.long (0xB0500+0x1C)++0x03
hide.long 0x00 "C3C2CTXR7,CCB 3 Class 2 Context Register Word 7"
hgroup.long (0xB0500+0x20)++0x03
hide.long 0x00 "C3C2CTXR8,CCB 3 Class 2 Context Register Word 8"
hgroup.long (0xB0500+0x24)++0x03
hide.long 0x00 "C3C2CTXR9,CCB 3 Class 2 Context Register Word 9"
hgroup.long (0xB0500+0x28)++0x03
hide.long 0x00 "C3C2CTXR10,CCB 3 Class 2 Context Register Word 10"
hgroup.long (0xB0500+0x2C)++0x03
hide.long 0x00 "C3C2CTXR11,CCB 3 Class 2 Context Register Word 11"
hgroup.long (0xB0500+0x30)++0x03
hide.long 0x00 "C3C2CTXR12,CCB 3 Class 2 Context Register Word 12"
hgroup.long (0xB0500+0x34)++0x03
hide.long 0x00 "C3C2CTXR13,CCB 3 Class 2 Context Register Word 13"
hgroup.long (0xB0500+0x38)++0x03
hide.long 0x00 "C3C2CTXR14,CCB 3 Class 2 Context Register Word 14"
hgroup.long (0xB0500+0x3C)++0x03
hide.long 0x00 "C3C2CTXR15,CCB 3 Class 2 Context Register Word 15"
hgroup.long (0xB0500+0x40)++0x03
hide.long 0x00 "C3C2CTXR16,CCB 3 Class 2 Context Register Word 16"
hgroup.long (0xB0500+0x44)++0x03
hide.long 0x00 "C3C2CTXR17,CCB 3 Class 2 Context Register Word 17"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0500++0x47
line.long 0x00 "C4C2CTXR0,CCB 4 Class 2 Context Register Word 0"
line.long 0x04 "C4C2CTXR1,CCB 4 Class 2 Context Register Word 1"
line.long 0x08 "C4C2CTXR2,CCB 4 Class 2 Context Register Word 2"
line.long 0x0C "C4C2CTXR3,CCB 4 Class 2 Context Register Word 3"
line.long 0x10 "C4C2CTXR4,CCB 4 Class 2 Context Register Word 4"
line.long 0x14 "C4C2CTXR5,CCB 4 Class 2 Context Register Word 5"
line.long 0x18 "C4C2CTXR6,CCB 4 Class 2 Context Register Word 6"
line.long 0x1C "C4C2CTXR7,CCB 4 Class 2 Context Register Word 7"
line.long 0x20 "C4C2CTXR8,CCB 4 Class 2 Context Register Word 8"
line.long 0x24 "C4C2CTXR9,CCB 4 Class 2 Context Register Word 9"
line.long 0x28 "C4C2CTXR10,CCB 4 Class 2 Context Register Word 10"
line.long 0x2C "C4C2CTXR11,CCB 4 Class 2 Context Register Word 11"
line.long 0x30 "C4C2CTXR12,CCB 4 Class 2 Context Register Word 12"
line.long 0x34 "C4C2CTXR13,CCB 4 Class 2 Context Register Word 13"
line.long 0x38 "C4C2CTXR14,CCB 4 Class 2 Context Register Word 14"
line.long 0x3C "C4C2CTXR15,CCB 4 Class 2 Context Register Word 15"
line.long 0x40 "C4C2CTXR16,CCB 4 Class 2 Context Register Word 16"
line.long 0x44 "C4C2CTXR17,CCB 4 Class 2 Context Register Word 17"
else
hgroup.long 0xC0500++0x03
hide.long 0x00 "C4C2CTXR0,CCB 4 Class 2 Context Register Word 0"
hgroup.long (0xC0500+0x04)++0x03
hide.long 0x00 "C4C2CTXR1,CCB 4 Class 2 Context Register Word 1"
hgroup.long (0xC0500+0x08)++0x03
hide.long 0x00 "C4C2CTXR2,CCB 4 Class 2 Context Register Word 2"
hgroup.long (0xC0500+0x0C)++0x03
hide.long 0x00 "C4C2CTXR3,CCB 4 Class 2 Context Register Word 3"
hgroup.long (0xC0500+0x10)++0x03
hide.long 0x00 "C4C2CTXR4,CCB 4 Class 2 Context Register Word 4"
hgroup.long (0xC0500+0x14)++0x03
hide.long 0x00 "C4C2CTXR5,CCB 4 Class 2 Context Register Word 5"
hgroup.long (0xC0500+0x18)++0x03
hide.long 0x00 "C4C2CTXR6,CCB 4 Class 2 Context Register Word 6"
hgroup.long (0xC0500+0x1C)++0x03
hide.long 0x00 "C4C2CTXR7,CCB 4 Class 2 Context Register Word 7"
hgroup.long (0xC0500+0x20)++0x03
hide.long 0x00 "C4C2CTXR8,CCB 4 Class 2 Context Register Word 8"
hgroup.long (0xC0500+0x24)++0x03
hide.long 0x00 "C4C2CTXR9,CCB 4 Class 2 Context Register Word 9"
hgroup.long (0xC0500+0x28)++0x03
hide.long 0x00 "C4C2CTXR10,CCB 4 Class 2 Context Register Word 10"
hgroup.long (0xC0500+0x2C)++0x03
hide.long 0x00 "C4C2CTXR11,CCB 4 Class 2 Context Register Word 11"
hgroup.long (0xC0500+0x30)++0x03
hide.long 0x00 "C4C2CTXR12,CCB 4 Class 2 Context Register Word 12"
hgroup.long (0xC0500+0x34)++0x03
hide.long 0x00 "C4C2CTXR13,CCB 4 Class 2 Context Register Word 13"
hgroup.long (0xC0500+0x38)++0x03
hide.long 0x00 "C4C2CTXR14,CCB 4 Class 2 Context Register Word 14"
hgroup.long (0xC0500+0x3C)++0x03
hide.long 0x00 "C4C2CTXR15,CCB 4 Class 2 Context Register Word 15"
hgroup.long (0xC0500+0x40)++0x03
hide.long 0x00 "C4C2CTXR16,CCB 4 Class 2 Context Register Word 16"
hgroup.long (0xC0500+0x44)++0x03
hide.long 0x00 "C4C2CTXR17,CCB 4 Class 2 Context Register Word 17"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0500++0x47
line.long 0x00 "C5C2CTXR0,CCB 5 Class 2 Context Register Word 0"
line.long 0x04 "C5C2CTXR1,CCB 5 Class 2 Context Register Word 1"
line.long 0x08 "C5C2CTXR2,CCB 5 Class 2 Context Register Word 2"
line.long 0x0C "C5C2CTXR3,CCB 5 Class 2 Context Register Word 3"
line.long 0x10 "C5C2CTXR4,CCB 5 Class 2 Context Register Word 4"
line.long 0x14 "C5C2CTXR5,CCB 5 Class 2 Context Register Word 5"
line.long 0x18 "C5C2CTXR6,CCB 5 Class 2 Context Register Word 6"
line.long 0x1C "C5C2CTXR7,CCB 5 Class 2 Context Register Word 7"
line.long 0x20 "C5C2CTXR8,CCB 5 Class 2 Context Register Word 8"
line.long 0x24 "C5C2CTXR9,CCB 5 Class 2 Context Register Word 9"
line.long 0x28 "C5C2CTXR10,CCB 5 Class 2 Context Register Word 10"
line.long 0x2C "C5C2CTXR11,CCB 5 Class 2 Context Register Word 11"
line.long 0x30 "C5C2CTXR12,CCB 5 Class 2 Context Register Word 12"
line.long 0x34 "C5C2CTXR13,CCB 5 Class 2 Context Register Word 13"
line.long 0x38 "C5C2CTXR14,CCB 5 Class 2 Context Register Word 14"
line.long 0x3C "C5C2CTXR15,CCB 5 Class 2 Context Register Word 15"
line.long 0x40 "C5C2CTXR16,CCB 5 Class 2 Context Register Word 16"
line.long 0x44 "C5C2CTXR17,CCB 5 Class 2 Context Register Word 17"
else
hgroup.long 0xD0500++0x03
hide.long 0x00 "C5C2CTXR0,CCB 5 Class 2 Context Register Word 0"
hgroup.long (0xD0500+0x04)++0x03
hide.long 0x00 "C5C2CTXR1,CCB 5 Class 2 Context Register Word 1"
hgroup.long (0xD0500+0x08)++0x03
hide.long 0x00 "C5C2CTXR2,CCB 5 Class 2 Context Register Word 2"
hgroup.long (0xD0500+0x0C)++0x03
hide.long 0x00 "C5C2CTXR3,CCB 5 Class 2 Context Register Word 3"
hgroup.long (0xD0500+0x10)++0x03
hide.long 0x00 "C5C2CTXR4,CCB 5 Class 2 Context Register Word 4"
hgroup.long (0xD0500+0x14)++0x03
hide.long 0x00 "C5C2CTXR5,CCB 5 Class 2 Context Register Word 5"
hgroup.long (0xD0500+0x18)++0x03
hide.long 0x00 "C5C2CTXR6,CCB 5 Class 2 Context Register Word 6"
hgroup.long (0xD0500+0x1C)++0x03
hide.long 0x00 "C5C2CTXR7,CCB 5 Class 2 Context Register Word 7"
hgroup.long (0xD0500+0x20)++0x03
hide.long 0x00 "C5C2CTXR8,CCB 5 Class 2 Context Register Word 8"
hgroup.long (0xD0500+0x24)++0x03
hide.long 0x00 "C5C2CTXR9,CCB 5 Class 2 Context Register Word 9"
hgroup.long (0xD0500+0x28)++0x03
hide.long 0x00 "C5C2CTXR10,CCB 5 Class 2 Context Register Word 10"
hgroup.long (0xD0500+0x2C)++0x03
hide.long 0x00 "C5C2CTXR11,CCB 5 Class 2 Context Register Word 11"
hgroup.long (0xD0500+0x30)++0x03
hide.long 0x00 "C5C2CTXR12,CCB 5 Class 2 Context Register Word 12"
hgroup.long (0xD0500+0x34)++0x03
hide.long 0x00 "C5C2CTXR13,CCB 5 Class 2 Context Register Word 13"
hgroup.long (0xD0500+0x38)++0x03
hide.long 0x00 "C5C2CTXR14,CCB 5 Class 2 Context Register Word 14"
hgroup.long (0xD0500+0x3C)++0x03
hide.long 0x00 "C5C2CTXR15,CCB 5 Class 2 Context Register Word 15"
hgroup.long (0xD0500+0x40)++0x03
hide.long 0x00 "C5C2CTXR16,CCB 5 Class 2 Context Register Word 16"
hgroup.long (0xD0500+0x44)++0x03
hide.long 0x00 "C5C2CTXR17,CCB 5 Class 2 Context Register Word 17"
endif
tree.end
tree "CCB Class 2 Key Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x80600++0x7F
line.long 0x00 "C0C2KEYR0,CCB 0 Class 2 Key Register Word 0"
line.long 0x04 "C0C2KEYR1,CCB 0 Class 2 Key Register Word 1"
line.long 0x08 "C0C2KEYR2,CCB 0 Class 2 Key Register Word 2"
line.long 0x0C "C0C2KEYR3,CCB 0 Class 2 Key Register Word 3"
line.long 0x10 "C0C2KEYR4,CCB 0 Class 2 Key Register Word 4"
line.long 0x14 "C0C2KEYR5,CCB 0 Class 2 Key Register Word 5"
line.long 0x18 "C0C2KEYR6,CCB 0 Class 2 Key Register Word 6"
line.long 0x1C "C0C2KEYR7,CCB 0 Class 2 Key Register Word 7"
line.long 0x20 "C0C2KEYR8,CCB 0 Class 2 Key Register Word 8"
line.long 0x24 "C0C2KEYR9,CCB 0 Class 2 Key Register Word 9"
line.long 0x28 "C0C2KEYR10,CCB 0 Class 2 Key Register Word 10"
line.long 0x2C "C0C2KEYR11,CCB 0 Class 2 Key Register Word 11"
line.long 0x30 "C0C2KEYR12,CCB 0 Class 2 Key Register Word 12"
line.long 0x34 "C0C2KEYR13,CCB 0 Class 2 Key Register Word 13"
line.long 0x38 "C0C2KEYR14,CCB 0 Class 2 Key Register Word 14"
line.long 0x3C "C0C2KEYR15,CCB 0 Class 2 Key Register Word 15"
line.long 0x40 "C0C2KEYR16,CCB 0 Class 2 Key Register Word 16"
line.long 0x44 "C0C2KEYR17,CCB 0 Class 2 Key Register Word 17"
line.long 0x48 "C0C2KEYR18,CCB 0 Class 2 Key Register Word 18"
line.long 0x4C "C0C2KEYR19,CCB 0 Class 2 Key Register Word 19"
line.long 0x50 "C0C2KEYR20,CCB 0 Class 2 Key Register Word 20"
line.long 0x54 "C0C2KEYR21,CCB 0 Class 2 Key Register Word 21"
line.long 0x58 "C0C2KEYR22,CCB 0 Class 2 Key Register Word 22"
line.long 0x5C "C0C2KEYR23,CCB 0 Class 2 Key Register Word 23"
line.long 0x60 "C0C2KEYR24,CCB 0 Class 2 Key Register Word 24"
line.long 0x64 "C0C2KEYR25,CCB 0 Class 2 Key Register Word 25"
line.long 0x68 "C0C2KEYR26,CCB 0 Class 2 Key Register Word 26"
line.long 0x6C "C0C2KEYR27,CCB 0 Class 2 Key Register Word 27"
line.long 0x70 "C0C2KEYR28,CCB 0 Class 2 Key Register Word 28"
line.long 0x74 "C0C2KEYR29,CCB 0 Class 2 Key Register Word 29"
line.long 0x78 "C0C2KEYR30,CCB 0 Class 2 Key Register Word 30"
line.long 0x7C "C0C2KEYR31,CCB 0 Class 2 Key Register Word 31"
else
hgroup.long 0x80600++0x03
hide.long 0x00 "C0C2KEYR0,CCB 0 Class 2 Key Register Word 0"
hgroup.long (0x80600+0x04)++0x03
hide.long 0x00 "C0C2KEYR1,CCB 0 Class 2 Key Register Word 1"
hgroup.long (0x80600+0x08)++0x03
hide.long 0x00 "C0C2KEYR2,CCB 0 Class 2 Key Register Word 2"
hgroup.long (0x80600+0x0C)++0x03
hide.long 0x00 "C0C2KEYR3,CCB 0 Class 2 Key Register Word 3"
hgroup.long (0x80600+0x10)++0x03
hide.long 0x00 "C0C2KEYR4,CCB 0 Class 2 Key Register Word 4"
hgroup.long (0x80600+0x14)++0x03
hide.long 0x00 "C0C2KEYR5,CCB 0 Class 2 Key Register Word 5"
hgroup.long (0x80600+0x18)++0x03
hide.long 0x00 "C0C2KEYR6,CCB 0 Class 2 Key Register Word 6"
hgroup.long (0x80600+0x1C)++0x03
hide.long 0x00 "C0C2KEYR7,CCB 0 Class 2 Key Register Word 7"
hgroup.long (0x80600+0x20)++0x03
hide.long 0x00 "C0C2KEYR8,CCB 0 Class 2 Key Register Word 8"
hgroup.long (0x80600+0x24)++0x03
hide.long 0x00 "C0C2KEYR9,CCB 0 Class 2 Key Register Word 9"
hgroup.long (0x80600+0x28)++0x03
hide.long 0x00 "C0C2KEYR10,CCB 0 Class 2 Key Register Word 10"
hgroup.long (0x80600+0x2C)++0x03
hide.long 0x00 "C0C2KEYR11,CCB 0 Class 2 Key Register Word 11"
hgroup.long (0x80600+0x30)++0x03
hide.long 0x00 "C0C2KEYR12,CCB 0 Class 2 Key Register Word 12"
hgroup.long (0x80600+0x34)++0x03
hide.long 0x00 "C0C2KEYR13,CCB 0 Class 2 Key Register Word 13"
hgroup.long (0x80600+0x38)++0x03
hide.long 0x00 "C0C2KEYR14,CCB 0 Class 2 Key Register Word 14"
hgroup.long (0x80600+0x3C)++0x03
hide.long 0x00 "C0C2KEYR15,CCB 0 Class 2 Key Register Word 15"
hgroup.long (0x80600+0x40)++0x03
hide.long 0x00 "C0C2KEYR16,CCB 0 Class 2 Key Register Word 16"
hgroup.long (0x80600+0x44)++0x03
hide.long 0x00 "C0C2KEYR17,CCB 0 Class 2 Key Register Word 17"
hgroup.long (0x80600+0x48)++0x03
hide.long 0x00 "C0C2KEYR18,CCB 0 Class 2 Key Register Word 18"
hgroup.long (0x80600+0x4C)++0x03
hide.long 0x00 "C0C2KEYR19,CCB 0 Class 2 Key Register Word 19"
hgroup.long (0x80600+0x50)++0x03
hide.long 0x00 "C0C2KEYR20,CCB 0 Class 2 Key Register Word 20"
hgroup.long (0x80600+0x54)++0x03
hide.long 0x00 "C0C2KEYR21,CCB 0 Class 2 Key Register Word 21"
hgroup.long (0x80600+0x58)++0x03
hide.long 0x00 "C0C2KEYR22,CCB 0 Class 2 Key Register Word 22"
hgroup.long (0x80600+0x5C)++0x03
hide.long 0x00 "C0C2KEYR23,CCB 0 Class 2 Key Register Word 23"
hgroup.long (0x80600+0x60)++0x03
hide.long 0x00 "C0C2KEYR24,CCB 0 Class 2 Key Register Word 24"
hgroup.long (0x80600+0x64)++0x03
hide.long 0x00 "C0C2KEYR25,CCB 0 Class 2 Key Register Word 25"
hgroup.long (0x80600+0x68)++0x03
hide.long 0x00 "C0C2KEYR26,CCB 0 Class 2 Key Register Word 26"
hgroup.long (0x80600+0x6C)++0x03
hide.long 0x00 "C0C2KEYR27,CCB 0 Class 2 Key Register Word 27"
hgroup.long (0x80600+0x70)++0x03
hide.long 0x00 "C0C2KEYR28,CCB 0 Class 2 Key Register Word 28"
hgroup.long (0x80600+0x74)++0x03
hide.long 0x00 "C0C2KEYR29,CCB 0 Class 2 Key Register Word 29"
hgroup.long (0x80600+0x78)++0x03
hide.long 0x00 "C0C2KEYR30,CCB 0 Class 2 Key Register Word 30"
hgroup.long (0x80600+0x7C)++0x03
hide.long 0x00 "C0C2KEYR31,CCB 0 Class 2 Key Register Word 31"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x90600++0x7F
line.long 0x00 "C1C2KEYR0,CCB 1 Class 2 Key Register Word 0"
line.long 0x04 "C1C2KEYR1,CCB 1 Class 2 Key Register Word 1"
line.long 0x08 "C1C2KEYR2,CCB 1 Class 2 Key Register Word 2"
line.long 0x0C "C1C2KEYR3,CCB 1 Class 2 Key Register Word 3"
line.long 0x10 "C1C2KEYR4,CCB 1 Class 2 Key Register Word 4"
line.long 0x14 "C1C2KEYR5,CCB 1 Class 2 Key Register Word 5"
line.long 0x18 "C1C2KEYR6,CCB 1 Class 2 Key Register Word 6"
line.long 0x1C "C1C2KEYR7,CCB 1 Class 2 Key Register Word 7"
line.long 0x20 "C1C2KEYR8,CCB 1 Class 2 Key Register Word 8"
line.long 0x24 "C1C2KEYR9,CCB 1 Class 2 Key Register Word 9"
line.long 0x28 "C1C2KEYR10,CCB 1 Class 2 Key Register Word 10"
line.long 0x2C "C1C2KEYR11,CCB 1 Class 2 Key Register Word 11"
line.long 0x30 "C1C2KEYR12,CCB 1 Class 2 Key Register Word 12"
line.long 0x34 "C1C2KEYR13,CCB 1 Class 2 Key Register Word 13"
line.long 0x38 "C1C2KEYR14,CCB 1 Class 2 Key Register Word 14"
line.long 0x3C "C1C2KEYR15,CCB 1 Class 2 Key Register Word 15"
line.long 0x40 "C1C2KEYR16,CCB 1 Class 2 Key Register Word 16"
line.long 0x44 "C1C2KEYR17,CCB 1 Class 2 Key Register Word 17"
line.long 0x48 "C1C2KEYR18,CCB 1 Class 2 Key Register Word 18"
line.long 0x4C "C1C2KEYR19,CCB 1 Class 2 Key Register Word 19"
line.long 0x50 "C1C2KEYR20,CCB 1 Class 2 Key Register Word 20"
line.long 0x54 "C1C2KEYR21,CCB 1 Class 2 Key Register Word 21"
line.long 0x58 "C1C2KEYR22,CCB 1 Class 2 Key Register Word 22"
line.long 0x5C "C1C2KEYR23,CCB 1 Class 2 Key Register Word 23"
line.long 0x60 "C1C2KEYR24,CCB 1 Class 2 Key Register Word 24"
line.long 0x64 "C1C2KEYR25,CCB 1 Class 2 Key Register Word 25"
line.long 0x68 "C1C2KEYR26,CCB 1 Class 2 Key Register Word 26"
line.long 0x6C "C1C2KEYR27,CCB 1 Class 2 Key Register Word 27"
line.long 0x70 "C1C2KEYR28,CCB 1 Class 2 Key Register Word 28"
line.long 0x74 "C1C2KEYR29,CCB 1 Class 2 Key Register Word 29"
line.long 0x78 "C1C2KEYR30,CCB 1 Class 2 Key Register Word 30"
line.long 0x7C "C1C2KEYR31,CCB 1 Class 2 Key Register Word 31"
else
hgroup.long 0x90600++0x03
hide.long 0x00 "C1C2KEYR0,CCB 1 Class 2 Key Register Word 0"
hgroup.long (0x90600+0x04)++0x03
hide.long 0x00 "C1C2KEYR1,CCB 1 Class 2 Key Register Word 1"
hgroup.long (0x90600+0x08)++0x03
hide.long 0x00 "C1C2KEYR2,CCB 1 Class 2 Key Register Word 2"
hgroup.long (0x90600+0x0C)++0x03
hide.long 0x00 "C1C2KEYR3,CCB 1 Class 2 Key Register Word 3"
hgroup.long (0x90600+0x10)++0x03
hide.long 0x00 "C1C2KEYR4,CCB 1 Class 2 Key Register Word 4"
hgroup.long (0x90600+0x14)++0x03
hide.long 0x00 "C1C2KEYR5,CCB 1 Class 2 Key Register Word 5"
hgroup.long (0x90600+0x18)++0x03
hide.long 0x00 "C1C2KEYR6,CCB 1 Class 2 Key Register Word 6"
hgroup.long (0x90600+0x1C)++0x03
hide.long 0x00 "C1C2KEYR7,CCB 1 Class 2 Key Register Word 7"
hgroup.long (0x90600+0x20)++0x03
hide.long 0x00 "C1C2KEYR8,CCB 1 Class 2 Key Register Word 8"
hgroup.long (0x90600+0x24)++0x03
hide.long 0x00 "C1C2KEYR9,CCB 1 Class 2 Key Register Word 9"
hgroup.long (0x90600+0x28)++0x03
hide.long 0x00 "C1C2KEYR10,CCB 1 Class 2 Key Register Word 10"
hgroup.long (0x90600+0x2C)++0x03
hide.long 0x00 "C1C2KEYR11,CCB 1 Class 2 Key Register Word 11"
hgroup.long (0x90600+0x30)++0x03
hide.long 0x00 "C1C2KEYR12,CCB 1 Class 2 Key Register Word 12"
hgroup.long (0x90600+0x34)++0x03
hide.long 0x00 "C1C2KEYR13,CCB 1 Class 2 Key Register Word 13"
hgroup.long (0x90600+0x38)++0x03
hide.long 0x00 "C1C2KEYR14,CCB 1 Class 2 Key Register Word 14"
hgroup.long (0x90600+0x3C)++0x03
hide.long 0x00 "C1C2KEYR15,CCB 1 Class 2 Key Register Word 15"
hgroup.long (0x90600+0x40)++0x03
hide.long 0x00 "C1C2KEYR16,CCB 1 Class 2 Key Register Word 16"
hgroup.long (0x90600+0x44)++0x03
hide.long 0x00 "C1C2KEYR17,CCB 1 Class 2 Key Register Word 17"
hgroup.long (0x90600+0x48)++0x03
hide.long 0x00 "C1C2KEYR18,CCB 1 Class 2 Key Register Word 18"
hgroup.long (0x90600+0x4C)++0x03
hide.long 0x00 "C1C2KEYR19,CCB 1 Class 2 Key Register Word 19"
hgroup.long (0x90600+0x50)++0x03
hide.long 0x00 "C1C2KEYR20,CCB 1 Class 2 Key Register Word 20"
hgroup.long (0x90600+0x54)++0x03
hide.long 0x00 "C1C2KEYR21,CCB 1 Class 2 Key Register Word 21"
hgroup.long (0x90600+0x58)++0x03
hide.long 0x00 "C1C2KEYR22,CCB 1 Class 2 Key Register Word 22"
hgroup.long (0x90600+0x5C)++0x03
hide.long 0x00 "C1C2KEYR23,CCB 1 Class 2 Key Register Word 23"
hgroup.long (0x90600+0x60)++0x03
hide.long 0x00 "C1C2KEYR24,CCB 1 Class 2 Key Register Word 24"
hgroup.long (0x90600+0x64)++0x03
hide.long 0x00 "C1C2KEYR25,CCB 1 Class 2 Key Register Word 25"
hgroup.long (0x90600+0x68)++0x03
hide.long 0x00 "C1C2KEYR26,CCB 1 Class 2 Key Register Word 26"
hgroup.long (0x90600+0x6C)++0x03
hide.long 0x00 "C1C2KEYR27,CCB 1 Class 2 Key Register Word 27"
hgroup.long (0x90600+0x70)++0x03
hide.long 0x00 "C1C2KEYR28,CCB 1 Class 2 Key Register Word 28"
hgroup.long (0x90600+0x74)++0x03
hide.long 0x00 "C1C2KEYR29,CCB 1 Class 2 Key Register Word 29"
hgroup.long (0x90600+0x78)++0x03
hide.long 0x00 "C1C2KEYR30,CCB 1 Class 2 Key Register Word 30"
hgroup.long (0x90600+0x7C)++0x03
hide.long 0x00 "C1C2KEYR31,CCB 1 Class 2 Key Register Word 31"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA0600++0x7F
line.long 0x00 "C2C2KEYR0,CCB 2 Class 2 Key Register Word 0"
line.long 0x04 "C2C2KEYR1,CCB 2 Class 2 Key Register Word 1"
line.long 0x08 "C2C2KEYR2,CCB 2 Class 2 Key Register Word 2"
line.long 0x0C "C2C2KEYR3,CCB 2 Class 2 Key Register Word 3"
line.long 0x10 "C2C2KEYR4,CCB 2 Class 2 Key Register Word 4"
line.long 0x14 "C2C2KEYR5,CCB 2 Class 2 Key Register Word 5"
line.long 0x18 "C2C2KEYR6,CCB 2 Class 2 Key Register Word 6"
line.long 0x1C "C2C2KEYR7,CCB 2 Class 2 Key Register Word 7"
line.long 0x20 "C2C2KEYR8,CCB 2 Class 2 Key Register Word 8"
line.long 0x24 "C2C2KEYR9,CCB 2 Class 2 Key Register Word 9"
line.long 0x28 "C2C2KEYR10,CCB 2 Class 2 Key Register Word 10"
line.long 0x2C "C2C2KEYR11,CCB 2 Class 2 Key Register Word 11"
line.long 0x30 "C2C2KEYR12,CCB 2 Class 2 Key Register Word 12"
line.long 0x34 "C2C2KEYR13,CCB 2 Class 2 Key Register Word 13"
line.long 0x38 "C2C2KEYR14,CCB 2 Class 2 Key Register Word 14"
line.long 0x3C "C2C2KEYR15,CCB 2 Class 2 Key Register Word 15"
line.long 0x40 "C2C2KEYR16,CCB 2 Class 2 Key Register Word 16"
line.long 0x44 "C2C2KEYR17,CCB 2 Class 2 Key Register Word 17"
line.long 0x48 "C2C2KEYR18,CCB 2 Class 2 Key Register Word 18"
line.long 0x4C "C2C2KEYR19,CCB 2 Class 2 Key Register Word 19"
line.long 0x50 "C2C2KEYR20,CCB 2 Class 2 Key Register Word 20"
line.long 0x54 "C2C2KEYR21,CCB 2 Class 2 Key Register Word 21"
line.long 0x58 "C2C2KEYR22,CCB 2 Class 2 Key Register Word 22"
line.long 0x5C "C2C2KEYR23,CCB 2 Class 2 Key Register Word 23"
line.long 0x60 "C2C2KEYR24,CCB 2 Class 2 Key Register Word 24"
line.long 0x64 "C2C2KEYR25,CCB 2 Class 2 Key Register Word 25"
line.long 0x68 "C2C2KEYR26,CCB 2 Class 2 Key Register Word 26"
line.long 0x6C "C2C2KEYR27,CCB 2 Class 2 Key Register Word 27"
line.long 0x70 "C2C2KEYR28,CCB 2 Class 2 Key Register Word 28"
line.long 0x74 "C2C2KEYR29,CCB 2 Class 2 Key Register Word 29"
line.long 0x78 "C2C2KEYR30,CCB 2 Class 2 Key Register Word 30"
line.long 0x7C "C2C2KEYR31,CCB 2 Class 2 Key Register Word 31"
else
hgroup.long 0xA0600++0x03
hide.long 0x00 "C2C2KEYR0,CCB 2 Class 2 Key Register Word 0"
hgroup.long (0xA0600+0x04)++0x03
hide.long 0x00 "C2C2KEYR1,CCB 2 Class 2 Key Register Word 1"
hgroup.long (0xA0600+0x08)++0x03
hide.long 0x00 "C2C2KEYR2,CCB 2 Class 2 Key Register Word 2"
hgroup.long (0xA0600+0x0C)++0x03
hide.long 0x00 "C2C2KEYR3,CCB 2 Class 2 Key Register Word 3"
hgroup.long (0xA0600+0x10)++0x03
hide.long 0x00 "C2C2KEYR4,CCB 2 Class 2 Key Register Word 4"
hgroup.long (0xA0600+0x14)++0x03
hide.long 0x00 "C2C2KEYR5,CCB 2 Class 2 Key Register Word 5"
hgroup.long (0xA0600+0x18)++0x03
hide.long 0x00 "C2C2KEYR6,CCB 2 Class 2 Key Register Word 6"
hgroup.long (0xA0600+0x1C)++0x03
hide.long 0x00 "C2C2KEYR7,CCB 2 Class 2 Key Register Word 7"
hgroup.long (0xA0600+0x20)++0x03
hide.long 0x00 "C2C2KEYR8,CCB 2 Class 2 Key Register Word 8"
hgroup.long (0xA0600+0x24)++0x03
hide.long 0x00 "C2C2KEYR9,CCB 2 Class 2 Key Register Word 9"
hgroup.long (0xA0600+0x28)++0x03
hide.long 0x00 "C2C2KEYR10,CCB 2 Class 2 Key Register Word 10"
hgroup.long (0xA0600+0x2C)++0x03
hide.long 0x00 "C2C2KEYR11,CCB 2 Class 2 Key Register Word 11"
hgroup.long (0xA0600+0x30)++0x03
hide.long 0x00 "C2C2KEYR12,CCB 2 Class 2 Key Register Word 12"
hgroup.long (0xA0600+0x34)++0x03
hide.long 0x00 "C2C2KEYR13,CCB 2 Class 2 Key Register Word 13"
hgroup.long (0xA0600+0x38)++0x03
hide.long 0x00 "C2C2KEYR14,CCB 2 Class 2 Key Register Word 14"
hgroup.long (0xA0600+0x3C)++0x03
hide.long 0x00 "C2C2KEYR15,CCB 2 Class 2 Key Register Word 15"
hgroup.long (0xA0600+0x40)++0x03
hide.long 0x00 "C2C2KEYR16,CCB 2 Class 2 Key Register Word 16"
hgroup.long (0xA0600+0x44)++0x03
hide.long 0x00 "C2C2KEYR17,CCB 2 Class 2 Key Register Word 17"
hgroup.long (0xA0600+0x48)++0x03
hide.long 0x00 "C2C2KEYR18,CCB 2 Class 2 Key Register Word 18"
hgroup.long (0xA0600+0x4C)++0x03
hide.long 0x00 "C2C2KEYR19,CCB 2 Class 2 Key Register Word 19"
hgroup.long (0xA0600+0x50)++0x03
hide.long 0x00 "C2C2KEYR20,CCB 2 Class 2 Key Register Word 20"
hgroup.long (0xA0600+0x54)++0x03
hide.long 0x00 "C2C2KEYR21,CCB 2 Class 2 Key Register Word 21"
hgroup.long (0xA0600+0x58)++0x03
hide.long 0x00 "C2C2KEYR22,CCB 2 Class 2 Key Register Word 22"
hgroup.long (0xA0600+0x5C)++0x03
hide.long 0x00 "C2C2KEYR23,CCB 2 Class 2 Key Register Word 23"
hgroup.long (0xA0600+0x60)++0x03
hide.long 0x00 "C2C2KEYR24,CCB 2 Class 2 Key Register Word 24"
hgroup.long (0xA0600+0x64)++0x03
hide.long 0x00 "C2C2KEYR25,CCB 2 Class 2 Key Register Word 25"
hgroup.long (0xA0600+0x68)++0x03
hide.long 0x00 "C2C2KEYR26,CCB 2 Class 2 Key Register Word 26"
hgroup.long (0xA0600+0x6C)++0x03
hide.long 0x00 "C2C2KEYR27,CCB 2 Class 2 Key Register Word 27"
hgroup.long (0xA0600+0x70)++0x03
hide.long 0x00 "C2C2KEYR28,CCB 2 Class 2 Key Register Word 28"
hgroup.long (0xA0600+0x74)++0x03
hide.long 0x00 "C2C2KEYR29,CCB 2 Class 2 Key Register Word 29"
hgroup.long (0xA0600+0x78)++0x03
hide.long 0x00 "C2C2KEYR30,CCB 2 Class 2 Key Register Word 30"
hgroup.long (0xA0600+0x7C)++0x03
hide.long 0x00 "C2C2KEYR31,CCB 2 Class 2 Key Register Word 31"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB0600++0x7F
line.long 0x00 "C3C2KEYR0,CCB 3 Class 2 Key Register Word 0"
line.long 0x04 "C3C2KEYR1,CCB 3 Class 2 Key Register Word 1"
line.long 0x08 "C3C2KEYR2,CCB 3 Class 2 Key Register Word 2"
line.long 0x0C "C3C2KEYR3,CCB 3 Class 2 Key Register Word 3"
line.long 0x10 "C3C2KEYR4,CCB 3 Class 2 Key Register Word 4"
line.long 0x14 "C3C2KEYR5,CCB 3 Class 2 Key Register Word 5"
line.long 0x18 "C3C2KEYR6,CCB 3 Class 2 Key Register Word 6"
line.long 0x1C "C3C2KEYR7,CCB 3 Class 2 Key Register Word 7"
line.long 0x20 "C3C2KEYR8,CCB 3 Class 2 Key Register Word 8"
line.long 0x24 "C3C2KEYR9,CCB 3 Class 2 Key Register Word 9"
line.long 0x28 "C3C2KEYR10,CCB 3 Class 2 Key Register Word 10"
line.long 0x2C "C3C2KEYR11,CCB 3 Class 2 Key Register Word 11"
line.long 0x30 "C3C2KEYR12,CCB 3 Class 2 Key Register Word 12"
line.long 0x34 "C3C2KEYR13,CCB 3 Class 2 Key Register Word 13"
line.long 0x38 "C3C2KEYR14,CCB 3 Class 2 Key Register Word 14"
line.long 0x3C "C3C2KEYR15,CCB 3 Class 2 Key Register Word 15"
line.long 0x40 "C3C2KEYR16,CCB 3 Class 2 Key Register Word 16"
line.long 0x44 "C3C2KEYR17,CCB 3 Class 2 Key Register Word 17"
line.long 0x48 "C3C2KEYR18,CCB 3 Class 2 Key Register Word 18"
line.long 0x4C "C3C2KEYR19,CCB 3 Class 2 Key Register Word 19"
line.long 0x50 "C3C2KEYR20,CCB 3 Class 2 Key Register Word 20"
line.long 0x54 "C3C2KEYR21,CCB 3 Class 2 Key Register Word 21"
line.long 0x58 "C3C2KEYR22,CCB 3 Class 2 Key Register Word 22"
line.long 0x5C "C3C2KEYR23,CCB 3 Class 2 Key Register Word 23"
line.long 0x60 "C3C2KEYR24,CCB 3 Class 2 Key Register Word 24"
line.long 0x64 "C3C2KEYR25,CCB 3 Class 2 Key Register Word 25"
line.long 0x68 "C3C2KEYR26,CCB 3 Class 2 Key Register Word 26"
line.long 0x6C "C3C2KEYR27,CCB 3 Class 2 Key Register Word 27"
line.long 0x70 "C3C2KEYR28,CCB 3 Class 2 Key Register Word 28"
line.long 0x74 "C3C2KEYR29,CCB 3 Class 2 Key Register Word 29"
line.long 0x78 "C3C2KEYR30,CCB 3 Class 2 Key Register Word 30"
line.long 0x7C "C3C2KEYR31,CCB 3 Class 2 Key Register Word 31"
else
hgroup.long 0xB0600++0x03
hide.long 0x00 "C3C2KEYR0,CCB 3 Class 2 Key Register Word 0"
hgroup.long (0xB0600+0x04)++0x03
hide.long 0x00 "C3C2KEYR1,CCB 3 Class 2 Key Register Word 1"
hgroup.long (0xB0600+0x08)++0x03
hide.long 0x00 "C3C2KEYR2,CCB 3 Class 2 Key Register Word 2"
hgroup.long (0xB0600+0x0C)++0x03
hide.long 0x00 "C3C2KEYR3,CCB 3 Class 2 Key Register Word 3"
hgroup.long (0xB0600+0x10)++0x03
hide.long 0x00 "C3C2KEYR4,CCB 3 Class 2 Key Register Word 4"
hgroup.long (0xB0600+0x14)++0x03
hide.long 0x00 "C3C2KEYR5,CCB 3 Class 2 Key Register Word 5"
hgroup.long (0xB0600+0x18)++0x03
hide.long 0x00 "C3C2KEYR6,CCB 3 Class 2 Key Register Word 6"
hgroup.long (0xB0600+0x1C)++0x03
hide.long 0x00 "C3C2KEYR7,CCB 3 Class 2 Key Register Word 7"
hgroup.long (0xB0600+0x20)++0x03
hide.long 0x00 "C3C2KEYR8,CCB 3 Class 2 Key Register Word 8"
hgroup.long (0xB0600+0x24)++0x03
hide.long 0x00 "C3C2KEYR9,CCB 3 Class 2 Key Register Word 9"
hgroup.long (0xB0600+0x28)++0x03
hide.long 0x00 "C3C2KEYR10,CCB 3 Class 2 Key Register Word 10"
hgroup.long (0xB0600+0x2C)++0x03
hide.long 0x00 "C3C2KEYR11,CCB 3 Class 2 Key Register Word 11"
hgroup.long (0xB0600+0x30)++0x03
hide.long 0x00 "C3C2KEYR12,CCB 3 Class 2 Key Register Word 12"
hgroup.long (0xB0600+0x34)++0x03
hide.long 0x00 "C3C2KEYR13,CCB 3 Class 2 Key Register Word 13"
hgroup.long (0xB0600+0x38)++0x03
hide.long 0x00 "C3C2KEYR14,CCB 3 Class 2 Key Register Word 14"
hgroup.long (0xB0600+0x3C)++0x03
hide.long 0x00 "C3C2KEYR15,CCB 3 Class 2 Key Register Word 15"
hgroup.long (0xB0600+0x40)++0x03
hide.long 0x00 "C3C2KEYR16,CCB 3 Class 2 Key Register Word 16"
hgroup.long (0xB0600+0x44)++0x03
hide.long 0x00 "C3C2KEYR17,CCB 3 Class 2 Key Register Word 17"
hgroup.long (0xB0600+0x48)++0x03
hide.long 0x00 "C3C2KEYR18,CCB 3 Class 2 Key Register Word 18"
hgroup.long (0xB0600+0x4C)++0x03
hide.long 0x00 "C3C2KEYR19,CCB 3 Class 2 Key Register Word 19"
hgroup.long (0xB0600+0x50)++0x03
hide.long 0x00 "C3C2KEYR20,CCB 3 Class 2 Key Register Word 20"
hgroup.long (0xB0600+0x54)++0x03
hide.long 0x00 "C3C2KEYR21,CCB 3 Class 2 Key Register Word 21"
hgroup.long (0xB0600+0x58)++0x03
hide.long 0x00 "C3C2KEYR22,CCB 3 Class 2 Key Register Word 22"
hgroup.long (0xB0600+0x5C)++0x03
hide.long 0x00 "C3C2KEYR23,CCB 3 Class 2 Key Register Word 23"
hgroup.long (0xB0600+0x60)++0x03
hide.long 0x00 "C3C2KEYR24,CCB 3 Class 2 Key Register Word 24"
hgroup.long (0xB0600+0x64)++0x03
hide.long 0x00 "C3C2KEYR25,CCB 3 Class 2 Key Register Word 25"
hgroup.long (0xB0600+0x68)++0x03
hide.long 0x00 "C3C2KEYR26,CCB 3 Class 2 Key Register Word 26"
hgroup.long (0xB0600+0x6C)++0x03
hide.long 0x00 "C3C2KEYR27,CCB 3 Class 2 Key Register Word 27"
hgroup.long (0xB0600+0x70)++0x03
hide.long 0x00 "C3C2KEYR28,CCB 3 Class 2 Key Register Word 28"
hgroup.long (0xB0600+0x74)++0x03
hide.long 0x00 "C3C2KEYR29,CCB 3 Class 2 Key Register Word 29"
hgroup.long (0xB0600+0x78)++0x03
hide.long 0x00 "C3C2KEYR30,CCB 3 Class 2 Key Register Word 30"
hgroup.long (0xB0600+0x7C)++0x03
hide.long 0x00 "C3C2KEYR31,CCB 3 Class 2 Key Register Word 31"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC0600++0x7F
line.long 0x00 "C4C2KEYR0,CCB 4 Class 2 Key Register Word 0"
line.long 0x04 "C4C2KEYR1,CCB 4 Class 2 Key Register Word 1"
line.long 0x08 "C4C2KEYR2,CCB 4 Class 2 Key Register Word 2"
line.long 0x0C "C4C2KEYR3,CCB 4 Class 2 Key Register Word 3"
line.long 0x10 "C4C2KEYR4,CCB 4 Class 2 Key Register Word 4"
line.long 0x14 "C4C2KEYR5,CCB 4 Class 2 Key Register Word 5"
line.long 0x18 "C4C2KEYR6,CCB 4 Class 2 Key Register Word 6"
line.long 0x1C "C4C2KEYR7,CCB 4 Class 2 Key Register Word 7"
line.long 0x20 "C4C2KEYR8,CCB 4 Class 2 Key Register Word 8"
line.long 0x24 "C4C2KEYR9,CCB 4 Class 2 Key Register Word 9"
line.long 0x28 "C4C2KEYR10,CCB 4 Class 2 Key Register Word 10"
line.long 0x2C "C4C2KEYR11,CCB 4 Class 2 Key Register Word 11"
line.long 0x30 "C4C2KEYR12,CCB 4 Class 2 Key Register Word 12"
line.long 0x34 "C4C2KEYR13,CCB 4 Class 2 Key Register Word 13"
line.long 0x38 "C4C2KEYR14,CCB 4 Class 2 Key Register Word 14"
line.long 0x3C "C4C2KEYR15,CCB 4 Class 2 Key Register Word 15"
line.long 0x40 "C4C2KEYR16,CCB 4 Class 2 Key Register Word 16"
line.long 0x44 "C4C2KEYR17,CCB 4 Class 2 Key Register Word 17"
line.long 0x48 "C4C2KEYR18,CCB 4 Class 2 Key Register Word 18"
line.long 0x4C "C4C2KEYR19,CCB 4 Class 2 Key Register Word 19"
line.long 0x50 "C4C2KEYR20,CCB 4 Class 2 Key Register Word 20"
line.long 0x54 "C4C2KEYR21,CCB 4 Class 2 Key Register Word 21"
line.long 0x58 "C4C2KEYR22,CCB 4 Class 2 Key Register Word 22"
line.long 0x5C "C4C2KEYR23,CCB 4 Class 2 Key Register Word 23"
line.long 0x60 "C4C2KEYR24,CCB 4 Class 2 Key Register Word 24"
line.long 0x64 "C4C2KEYR25,CCB 4 Class 2 Key Register Word 25"
line.long 0x68 "C4C2KEYR26,CCB 4 Class 2 Key Register Word 26"
line.long 0x6C "C4C2KEYR27,CCB 4 Class 2 Key Register Word 27"
line.long 0x70 "C4C2KEYR28,CCB 4 Class 2 Key Register Word 28"
line.long 0x74 "C4C2KEYR29,CCB 4 Class 2 Key Register Word 29"
line.long 0x78 "C4C2KEYR30,CCB 4 Class 2 Key Register Word 30"
line.long 0x7C "C4C2KEYR31,CCB 4 Class 2 Key Register Word 31"
else
hgroup.long 0xC0600++0x03
hide.long 0x00 "C4C2KEYR0,CCB 4 Class 2 Key Register Word 0"
hgroup.long (0xC0600+0x04)++0x03
hide.long 0x00 "C4C2KEYR1,CCB 4 Class 2 Key Register Word 1"
hgroup.long (0xC0600+0x08)++0x03
hide.long 0x00 "C4C2KEYR2,CCB 4 Class 2 Key Register Word 2"
hgroup.long (0xC0600+0x0C)++0x03
hide.long 0x00 "C4C2KEYR3,CCB 4 Class 2 Key Register Word 3"
hgroup.long (0xC0600+0x10)++0x03
hide.long 0x00 "C4C2KEYR4,CCB 4 Class 2 Key Register Word 4"
hgroup.long (0xC0600+0x14)++0x03
hide.long 0x00 "C4C2KEYR5,CCB 4 Class 2 Key Register Word 5"
hgroup.long (0xC0600+0x18)++0x03
hide.long 0x00 "C4C2KEYR6,CCB 4 Class 2 Key Register Word 6"
hgroup.long (0xC0600+0x1C)++0x03
hide.long 0x00 "C4C2KEYR7,CCB 4 Class 2 Key Register Word 7"
hgroup.long (0xC0600+0x20)++0x03
hide.long 0x00 "C4C2KEYR8,CCB 4 Class 2 Key Register Word 8"
hgroup.long (0xC0600+0x24)++0x03
hide.long 0x00 "C4C2KEYR9,CCB 4 Class 2 Key Register Word 9"
hgroup.long (0xC0600+0x28)++0x03
hide.long 0x00 "C4C2KEYR10,CCB 4 Class 2 Key Register Word 10"
hgroup.long (0xC0600+0x2C)++0x03
hide.long 0x00 "C4C2KEYR11,CCB 4 Class 2 Key Register Word 11"
hgroup.long (0xC0600+0x30)++0x03
hide.long 0x00 "C4C2KEYR12,CCB 4 Class 2 Key Register Word 12"
hgroup.long (0xC0600+0x34)++0x03
hide.long 0x00 "C4C2KEYR13,CCB 4 Class 2 Key Register Word 13"
hgroup.long (0xC0600+0x38)++0x03
hide.long 0x00 "C4C2KEYR14,CCB 4 Class 2 Key Register Word 14"
hgroup.long (0xC0600+0x3C)++0x03
hide.long 0x00 "C4C2KEYR15,CCB 4 Class 2 Key Register Word 15"
hgroup.long (0xC0600+0x40)++0x03
hide.long 0x00 "C4C2KEYR16,CCB 4 Class 2 Key Register Word 16"
hgroup.long (0xC0600+0x44)++0x03
hide.long 0x00 "C4C2KEYR17,CCB 4 Class 2 Key Register Word 17"
hgroup.long (0xC0600+0x48)++0x03
hide.long 0x00 "C4C2KEYR18,CCB 4 Class 2 Key Register Word 18"
hgroup.long (0xC0600+0x4C)++0x03
hide.long 0x00 "C4C2KEYR19,CCB 4 Class 2 Key Register Word 19"
hgroup.long (0xC0600+0x50)++0x03
hide.long 0x00 "C4C2KEYR20,CCB 4 Class 2 Key Register Word 20"
hgroup.long (0xC0600+0x54)++0x03
hide.long 0x00 "C4C2KEYR21,CCB 4 Class 2 Key Register Word 21"
hgroup.long (0xC0600+0x58)++0x03
hide.long 0x00 "C4C2KEYR22,CCB 4 Class 2 Key Register Word 22"
hgroup.long (0xC0600+0x5C)++0x03
hide.long 0x00 "C4C2KEYR23,CCB 4 Class 2 Key Register Word 23"
hgroup.long (0xC0600+0x60)++0x03
hide.long 0x00 "C4C2KEYR24,CCB 4 Class 2 Key Register Word 24"
hgroup.long (0xC0600+0x64)++0x03
hide.long 0x00 "C4C2KEYR25,CCB 4 Class 2 Key Register Word 25"
hgroup.long (0xC0600+0x68)++0x03
hide.long 0x00 "C4C2KEYR26,CCB 4 Class 2 Key Register Word 26"
hgroup.long (0xC0600+0x6C)++0x03
hide.long 0x00 "C4C2KEYR27,CCB 4 Class 2 Key Register Word 27"
hgroup.long (0xC0600+0x70)++0x03
hide.long 0x00 "C4C2KEYR28,CCB 4 Class 2 Key Register Word 28"
hgroup.long (0xC0600+0x74)++0x03
hide.long 0x00 "C4C2KEYR29,CCB 4 Class 2 Key Register Word 29"
hgroup.long (0xC0600+0x78)++0x03
hide.long 0x00 "C4C2KEYR30,CCB 4 Class 2 Key Register Word 30"
hgroup.long (0xC0600+0x7C)++0x03
hide.long 0x00 "C4C2KEYR31,CCB 4 Class 2 Key Register Word 31"
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD0600++0x7F
line.long 0x00 "C5C2KEYR0,CCB 5 Class 2 Key Register Word 0"
line.long 0x04 "C5C2KEYR1,CCB 5 Class 2 Key Register Word 1"
line.long 0x08 "C5C2KEYR2,CCB 5 Class 2 Key Register Word 2"
line.long 0x0C "C5C2KEYR3,CCB 5 Class 2 Key Register Word 3"
line.long 0x10 "C5C2KEYR4,CCB 5 Class 2 Key Register Word 4"
line.long 0x14 "C5C2KEYR5,CCB 5 Class 2 Key Register Word 5"
line.long 0x18 "C5C2KEYR6,CCB 5 Class 2 Key Register Word 6"
line.long 0x1C "C5C2KEYR7,CCB 5 Class 2 Key Register Word 7"
line.long 0x20 "C5C2KEYR8,CCB 5 Class 2 Key Register Word 8"
line.long 0x24 "C5C2KEYR9,CCB 5 Class 2 Key Register Word 9"
line.long 0x28 "C5C2KEYR10,CCB 5 Class 2 Key Register Word 10"
line.long 0x2C "C5C2KEYR11,CCB 5 Class 2 Key Register Word 11"
line.long 0x30 "C5C2KEYR12,CCB 5 Class 2 Key Register Word 12"
line.long 0x34 "C5C2KEYR13,CCB 5 Class 2 Key Register Word 13"
line.long 0x38 "C5C2KEYR14,CCB 5 Class 2 Key Register Word 14"
line.long 0x3C "C5C2KEYR15,CCB 5 Class 2 Key Register Word 15"
line.long 0x40 "C5C2KEYR16,CCB 5 Class 2 Key Register Word 16"
line.long 0x44 "C5C2KEYR17,CCB 5 Class 2 Key Register Word 17"
line.long 0x48 "C5C2KEYR18,CCB 5 Class 2 Key Register Word 18"
line.long 0x4C "C5C2KEYR19,CCB 5 Class 2 Key Register Word 19"
line.long 0x50 "C5C2KEYR20,CCB 5 Class 2 Key Register Word 20"
line.long 0x54 "C5C2KEYR21,CCB 5 Class 2 Key Register Word 21"
line.long 0x58 "C5C2KEYR22,CCB 5 Class 2 Key Register Word 22"
line.long 0x5C "C5C2KEYR23,CCB 5 Class 2 Key Register Word 23"
line.long 0x60 "C5C2KEYR24,CCB 5 Class 2 Key Register Word 24"
line.long 0x64 "C5C2KEYR25,CCB 5 Class 2 Key Register Word 25"
line.long 0x68 "C5C2KEYR26,CCB 5 Class 2 Key Register Word 26"
line.long 0x6C "C5C2KEYR27,CCB 5 Class 2 Key Register Word 27"
line.long 0x70 "C5C2KEYR28,CCB 5 Class 2 Key Register Word 28"
line.long 0x74 "C5C2KEYR29,CCB 5 Class 2 Key Register Word 29"
line.long 0x78 "C5C2KEYR30,CCB 5 Class 2 Key Register Word 30"
line.long 0x7C "C5C2KEYR31,CCB 5 Class 2 Key Register Word 31"
else
hgroup.long 0xD0600++0x03
hide.long 0x00 "C5C2KEYR0,CCB 5 Class 2 Key Register Word 0"
hgroup.long (0xD0600+0x04)++0x03
hide.long 0x00 "C5C2KEYR1,CCB 5 Class 2 Key Register Word 1"
hgroup.long (0xD0600+0x08)++0x03
hide.long 0x00 "C5C2KEYR2,CCB 5 Class 2 Key Register Word 2"
hgroup.long (0xD0600+0x0C)++0x03
hide.long 0x00 "C5C2KEYR3,CCB 5 Class 2 Key Register Word 3"
hgroup.long (0xD0600+0x10)++0x03
hide.long 0x00 "C5C2KEYR4,CCB 5 Class 2 Key Register Word 4"
hgroup.long (0xD0600+0x14)++0x03
hide.long 0x00 "C5C2KEYR5,CCB 5 Class 2 Key Register Word 5"
hgroup.long (0xD0600+0x18)++0x03
hide.long 0x00 "C5C2KEYR6,CCB 5 Class 2 Key Register Word 6"
hgroup.long (0xD0600+0x1C)++0x03
hide.long 0x00 "C5C2KEYR7,CCB 5 Class 2 Key Register Word 7"
hgroup.long (0xD0600+0x20)++0x03
hide.long 0x00 "C5C2KEYR8,CCB 5 Class 2 Key Register Word 8"
hgroup.long (0xD0600+0x24)++0x03
hide.long 0x00 "C5C2KEYR9,CCB 5 Class 2 Key Register Word 9"
hgroup.long (0xD0600+0x28)++0x03
hide.long 0x00 "C5C2KEYR10,CCB 5 Class 2 Key Register Word 10"
hgroup.long (0xD0600+0x2C)++0x03
hide.long 0x00 "C5C2KEYR11,CCB 5 Class 2 Key Register Word 11"
hgroup.long (0xD0600+0x30)++0x03
hide.long 0x00 "C5C2KEYR12,CCB 5 Class 2 Key Register Word 12"
hgroup.long (0xD0600+0x34)++0x03
hide.long 0x00 "C5C2KEYR13,CCB 5 Class 2 Key Register Word 13"
hgroup.long (0xD0600+0x38)++0x03
hide.long 0x00 "C5C2KEYR14,CCB 5 Class 2 Key Register Word 14"
hgroup.long (0xD0600+0x3C)++0x03
hide.long 0x00 "C5C2KEYR15,CCB 5 Class 2 Key Register Word 15"
hgroup.long (0xD0600+0x40)++0x03
hide.long 0x00 "C5C2KEYR16,CCB 5 Class 2 Key Register Word 16"
hgroup.long (0xD0600+0x44)++0x03
hide.long 0x00 "C5C2KEYR17,CCB 5 Class 2 Key Register Word 17"
hgroup.long (0xD0600+0x48)++0x03
hide.long 0x00 "C5C2KEYR18,CCB 5 Class 2 Key Register Word 18"
hgroup.long (0xD0600+0x4C)++0x03
hide.long 0x00 "C5C2KEYR19,CCB 5 Class 2 Key Register Word 19"
hgroup.long (0xD0600+0x50)++0x03
hide.long 0x00 "C5C2KEYR20,CCB 5 Class 2 Key Register Word 20"
hgroup.long (0xD0600+0x54)++0x03
hide.long 0x00 "C5C2KEYR21,CCB 5 Class 2 Key Register Word 21"
hgroup.long (0xD0600+0x58)++0x03
hide.long 0x00 "C5C2KEYR22,CCB 5 Class 2 Key Register Word 22"
hgroup.long (0xD0600+0x5C)++0x03
hide.long 0x00 "C5C2KEYR23,CCB 5 Class 2 Key Register Word 23"
hgroup.long (0xD0600+0x60)++0x03
hide.long 0x00 "C5C2KEYR24,CCB 5 Class 2 Key Register Word 24"
hgroup.long (0xD0600+0x64)++0x03
hide.long 0x00 "C5C2KEYR25,CCB 5 Class 2 Key Register Word 25"
hgroup.long (0xD0600+0x68)++0x03
hide.long 0x00 "C5C2KEYR26,CCB 5 Class 2 Key Register Word 26"
hgroup.long (0xD0600+0x6C)++0x03
hide.long 0x00 "C5C2KEYR27,CCB 5 Class 2 Key Register Word 27"
hgroup.long (0xD0600+0x70)++0x03
hide.long 0x00 "C5C2KEYR28,CCB 5 Class 2 Key Register Word 28"
hgroup.long (0xD0600+0x74)++0x03
hide.long 0x00 "C5C2KEYR29,CCB 5 Class 2 Key Register Word 29"
hgroup.long (0xD0600+0x78)++0x03
hide.long 0x00 "C5C2KEYR30,CCB 5 Class 2 Key Register Word 30"
hgroup.long (0xD0600+0x7C)++0x03
hide.long 0x00 "C5C2KEYR31,CCB 5 Class 2 Key Register Word 31"
endif
tree.end
width 13.
tree "FIFO / DECO Registers"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x807C0++0x03
line.long 0x00 "C0FIFOSTA,CCB 0 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0x807C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0x807C0+0x10)++0x03
line.long 0x00 "C0NFIFO_2,CCB 0 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0x807C0+0x10)++0x03
line.long 0x00 "C0NFIFO,CCB 0 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0x807C0+0x20)++0x03
line.long 0x00 "C0IFIFO,CCB 0 Input Data FIFO"
endian.le
hgroup.quad (0x807C0+0x30)++0x07
hide.quad 0x00 "C0OFIFO,CCB 0 Output Data FIFO"
in
group.long (0x807C0+0x40)++0x03
line.long 0x00 "D0JQCR_MS,DECO0 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x807C0+0x44)++0x03
line.long 0x00 "D0JQCR_LS,DECO0 Job Queue Control Register Least Significant Half"
rgroup.quad (0x807C0+0x48)++0x07
line.quad 0x00 "D0DAR,DECO0 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0x807C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0x807C0+0x50)++0x03
line.long 0x00 "D0OPSTA_MS,DECO0 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0x807C0+0x50)++0x03
line.long 0x00 "D0OPSTA_MS,DECO0 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0x807C0+0x54)++0x03
line.long 0x00 "D0OPSTA_LS,DECO0 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0x807C0+0x58)++0x03
line.long 0x00 "D0CKSUMR,DECO0 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0x807C0+0x60)++0x07
line.long 0x00 "D0COICIDSR,DECO0 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D0SIICIDSR,DECO0 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0x807C0++0x03
hide.long 0x00 "C0FIFOSTA,CCB 0 FIFO Status"
newline
if (((per.l(ad:0x08000000+0x807C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0x807C0+0x10)++0x03
hide.long 0x00 "C0NFIFO_2,CCB 0 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0x807C0+0x10)++0x03
hide.long 0x00 "C0NFIFO,CCB 0 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0x807C0+0x20)++0x03
hide.long 0x00 "C0IFIFO,CCB 0 Input Data FIFO"
endian.le
hgroup.quad (0x807C0+0x30)++0x07
hide.quad 0x00 "C0OFIFO,CCB 0 Output Data FIFO"
in
hgroup.long (0x807C0+0x40)++0x03
hide.long 0x00 "D0JQCR_MS,DECO0 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0x807C0+0x44)++0x03
hide.long 0x00 "D0JQCR_LS,DECO0 Job Queue Control Register Least Significant Half"
hgroup.quad (0x807C0+0x48)++0x07
hide.quad 0x00 "D0DAR,DECO0 Descriptor Address Register"
hgroup.long (0x807C0+0x50)++0x03
hide.long 0x00 "D0OPSTA_MS,DECO0 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0x807C0+0x54)++0x03
hide.long 0x00 "D0OPSTA_LS,DECO0 Operation Status Register Least Significant Half"
hgroup.long (0x807C0+0x58)++0x03
hide.long 0x00 "D0CKSUMR,DECO0 Checksum Register"
hgroup.long (0x807C0+0x60)++0x03
hide.long 0x00 "D0COICIDSR,DECO0 Control And Output ICID Status Register"
newline
hgroup.long (0x807C0+0x64)++0x03
hide.long 0x00 "D0SIICIDSR,DECO0 SDID And Input ICID Status Register"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0x907C0++0x03
line.long 0x00 "C1FIFOSTA,CCB 1 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0x907C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0x907C0+0x10)++0x03
line.long 0x00 "C1NFIFO_2,CCB 1 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0x907C0+0x10)++0x03
line.long 0x00 "C1NFIFO,CCB 1 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0x907C0+0x20)++0x03
line.long 0x00 "C1IFIFO,CCB 1 Input Data FIFO"
endian.le
hgroup.quad (0x907C0+0x30)++0x07
hide.quad 0x00 "C1OFIFO,CCB 1 Output Data FIFO"
in
group.long (0x907C0+0x40)++0x03
line.long 0x00 "D1JQCR_MS,DECO1 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x907C0+0x44)++0x03
line.long 0x00 "D1JQCR_LS,DECO1 Job Queue Control Register Least Significant Half"
rgroup.quad (0x907C0+0x48)++0x07
line.quad 0x00 "D1DAR,DECO1 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0x907C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0x907C0+0x50)++0x03
line.long 0x00 "D1OPSTA_MS,DECO1 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0x907C0+0x50)++0x03
line.long 0x00 "D1OPSTA_MS,DECO1 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0x907C0+0x54)++0x03
line.long 0x00 "D1OPSTA_LS,DECO1 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0x907C0+0x58)++0x03
line.long 0x00 "D1CKSUMR,DECO1 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0x907C0+0x60)++0x07
line.long 0x00 "D1COICIDSR,DECO1 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D1SIICIDSR,DECO1 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0x907C0++0x03
hide.long 0x00 "C1FIFOSTA,CCB 1 FIFO Status"
newline
if (((per.l(ad:0x08000000+0x907C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0x907C0+0x10)++0x03
hide.long 0x00 "C1NFIFO_2,CCB 1 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0x907C0+0x10)++0x03
hide.long 0x00 "C1NFIFO,CCB 1 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0x907C0+0x20)++0x03
hide.long 0x00 "C1IFIFO,CCB 1 Input Data FIFO"
endian.le
hgroup.quad (0x907C0+0x30)++0x07
hide.quad 0x00 "C1OFIFO,CCB 1 Output Data FIFO"
in
hgroup.long (0x907C0+0x40)++0x03
hide.long 0x00 "D1JQCR_MS,DECO1 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0x907C0+0x44)++0x03
hide.long 0x00 "D1JQCR_LS,DECO1 Job Queue Control Register Least Significant Half"
hgroup.quad (0x907C0+0x48)++0x07
hide.quad 0x00 "D1DAR,DECO1 Descriptor Address Register"
hgroup.long (0x907C0+0x50)++0x03
hide.long 0x00 "D1OPSTA_MS,DECO1 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0x907C0+0x54)++0x03
hide.long 0x00 "D1OPSTA_LS,DECO1 Operation Status Register Least Significant Half"
hgroup.long (0x907C0+0x58)++0x03
hide.long 0x00 "D1CKSUMR,DECO1 Checksum Register"
hgroup.long (0x907C0+0x60)++0x03
hide.long 0x00 "D1COICIDSR,DECO1 Control And Output ICID Status Register"
newline
hgroup.long (0x907C0+0x64)++0x03
hide.long 0x00 "D1SIICIDSR,DECO1 SDID And Input ICID Status Register"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xA07C0++0x03
line.long 0x00 "C2FIFOSTA,CCB 2 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0xA07C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0xA07C0+0x10)++0x03
line.long 0x00 "C2NFIFO_2,CCB 2 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0xA07C0+0x10)++0x03
line.long 0x00 "C2NFIFO,CCB 2 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0xA07C0+0x20)++0x03
line.long 0x00 "C2IFIFO,CCB 2 Input Data FIFO"
endian.le
hgroup.quad (0xA07C0+0x30)++0x07
hide.quad 0x00 "C2OFIFO,CCB 2 Output Data FIFO"
in
group.long (0xA07C0+0x40)++0x03
line.long 0x00 "D2JQCR_MS,DECO2 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0xA07C0+0x44)++0x03
line.long 0x00 "D2JQCR_LS,DECO2 Job Queue Control Register Least Significant Half"
rgroup.quad (0xA07C0+0x48)++0x07
line.quad 0x00 "D2DAR,DECO2 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0xA07C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0xA07C0+0x50)++0x03
line.long 0x00 "D2OPSTA_MS,DECO2 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0xA07C0+0x50)++0x03
line.long 0x00 "D2OPSTA_MS,DECO2 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0xA07C0+0x54)++0x03
line.long 0x00 "D2OPSTA_LS,DECO2 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0xA07C0+0x58)++0x03
line.long 0x00 "D2CKSUMR,DECO2 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0xA07C0+0x60)++0x07
line.long 0x00 "D2COICIDSR,DECO2 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D2SIICIDSR,DECO2 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0xA07C0++0x03
hide.long 0x00 "C2FIFOSTA,CCB 2 FIFO Status"
newline
if (((per.l(ad:0x08000000+0xA07C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0xA07C0+0x10)++0x03
hide.long 0x00 "C2NFIFO_2,CCB 2 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0xA07C0+0x10)++0x03
hide.long 0x00 "C2NFIFO,CCB 2 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0xA07C0+0x20)++0x03
hide.long 0x00 "C2IFIFO,CCB 2 Input Data FIFO"
endian.le
hgroup.quad (0xA07C0+0x30)++0x07
hide.quad 0x00 "C2OFIFO,CCB 2 Output Data FIFO"
in
hgroup.long (0xA07C0+0x40)++0x03
hide.long 0x00 "D2JQCR_MS,DECO2 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0xA07C0+0x44)++0x03
hide.long 0x00 "D2JQCR_LS,DECO2 Job Queue Control Register Least Significant Half"
hgroup.quad (0xA07C0+0x48)++0x07
hide.quad 0x00 "D2DAR,DECO2 Descriptor Address Register"
hgroup.long (0xA07C0+0x50)++0x03
hide.long 0x00 "D2OPSTA_MS,DECO2 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0xA07C0+0x54)++0x03
hide.long 0x00 "D2OPSTA_LS,DECO2 Operation Status Register Least Significant Half"
hgroup.long (0xA07C0+0x58)++0x03
hide.long 0x00 "D2CKSUMR,DECO2 Checksum Register"
hgroup.long (0xA07C0+0x60)++0x03
hide.long 0x00 "D2COICIDSR,DECO2 Control And Output ICID Status Register"
newline
hgroup.long (0xA07C0+0x64)++0x03
hide.long 0x00 "D2SIICIDSR,DECO2 SDID And Input ICID Status Register"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xB07C0++0x03
line.long 0x00 "C3FIFOSTA,CCB 3 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0xB07C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0xB07C0+0x10)++0x03
line.long 0x00 "C3NFIFO_2,CCB 3 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0xB07C0+0x10)++0x03
line.long 0x00 "C3NFIFO,CCB 3 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0xB07C0+0x20)++0x03
line.long 0x00 "C3IFIFO,CCB 3 Input Data FIFO"
endian.le
hgroup.quad (0xB07C0+0x30)++0x07
hide.quad 0x00 "C3OFIFO,CCB 3 Output Data FIFO"
in
group.long (0xB07C0+0x40)++0x03
line.long 0x00 "D3JQCR_MS,DECO3 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0xB07C0+0x44)++0x03
line.long 0x00 "D3JQCR_LS,DECO3 Job Queue Control Register Least Significant Half"
rgroup.quad (0xB07C0+0x48)++0x07
line.quad 0x00 "D3DAR,DECO3 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0xB07C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0xB07C0+0x50)++0x03
line.long 0x00 "D3OPSTA_MS,DECO3 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0xB07C0+0x50)++0x03
line.long 0x00 "D3OPSTA_MS,DECO3 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0xB07C0+0x54)++0x03
line.long 0x00 "D3OPSTA_LS,DECO3 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0xB07C0+0x58)++0x03
line.long 0x00 "D3CKSUMR,DECO3 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0xB07C0+0x60)++0x07
line.long 0x00 "D3COICIDSR,DECO3 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D3SIICIDSR,DECO3 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0xB07C0++0x03
hide.long 0x00 "C3FIFOSTA,CCB 3 FIFO Status"
newline
if (((per.l(ad:0x08000000+0xB07C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0xB07C0+0x10)++0x03
hide.long 0x00 "C3NFIFO_2,CCB 3 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0xB07C0+0x10)++0x03
hide.long 0x00 "C3NFIFO,CCB 3 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0xB07C0+0x20)++0x03
hide.long 0x00 "C3IFIFO,CCB 3 Input Data FIFO"
endian.le
hgroup.quad (0xB07C0+0x30)++0x07
hide.quad 0x00 "C3OFIFO,CCB 3 Output Data FIFO"
in
hgroup.long (0xB07C0+0x40)++0x03
hide.long 0x00 "D3JQCR_MS,DECO3 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0xB07C0+0x44)++0x03
hide.long 0x00 "D3JQCR_LS,DECO3 Job Queue Control Register Least Significant Half"
hgroup.quad (0xB07C0+0x48)++0x07
hide.quad 0x00 "D3DAR,DECO3 Descriptor Address Register"
hgroup.long (0xB07C0+0x50)++0x03
hide.long 0x00 "D3OPSTA_MS,DECO3 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0xB07C0+0x54)++0x03
hide.long 0x00 "D3OPSTA_LS,DECO3 Operation Status Register Least Significant Half"
hgroup.long (0xB07C0+0x58)++0x03
hide.long 0x00 "D3CKSUMR,DECO3 Checksum Register"
hgroup.long (0xB07C0+0x60)++0x03
hide.long 0x00 "D3COICIDSR,DECO3 Control And Output ICID Status Register"
newline
hgroup.long (0xB07C0+0x64)++0x03
hide.long 0x00 "D3SIICIDSR,DECO3 SDID And Input ICID Status Register"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xC07C0++0x03
line.long 0x00 "C4FIFOSTA,CCB 4 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0xC07C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0xC07C0+0x10)++0x03
line.long 0x00 "C4NFIFO_2,CCB 4 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0xC07C0+0x10)++0x03
line.long 0x00 "C4NFIFO,CCB 4 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0xC07C0+0x20)++0x03
line.long 0x00 "C4IFIFO,CCB 4 Input Data FIFO"
endian.le
hgroup.quad (0xC07C0+0x30)++0x07
hide.quad 0x00 "C4OFIFO,CCB 4 Output Data FIFO"
in
group.long (0xC07C0+0x40)++0x03
line.long 0x00 "D4JQCR_MS,DECO4 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0xC07C0+0x44)++0x03
line.long 0x00 "D4JQCR_LS,DECO4 Job Queue Control Register Least Significant Half"
rgroup.quad (0xC07C0+0x48)++0x07
line.quad 0x00 "D4DAR,DECO4 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0xC07C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0xC07C0+0x50)++0x03
line.long 0x00 "D4OPSTA_MS,DECO4 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0xC07C0+0x50)++0x03
line.long 0x00 "D4OPSTA_MS,DECO4 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0xC07C0+0x54)++0x03
line.long 0x00 "D4OPSTA_LS,DECO4 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0xC07C0+0x58)++0x03
line.long 0x00 "D4CKSUMR,DECO4 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0xC07C0+0x60)++0x07
line.long 0x00 "D4COICIDSR,DECO4 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D4SIICIDSR,DECO4 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0xC07C0++0x03
hide.long 0x00 "C4FIFOSTA,CCB 4 FIFO Status"
newline
if (((per.l(ad:0x08000000+0xC07C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0xC07C0+0x10)++0x03
hide.long 0x00 "C4NFIFO_2,CCB 4 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0xC07C0+0x10)++0x03
hide.long 0x00 "C4NFIFO,CCB 4 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0xC07C0+0x20)++0x03
hide.long 0x00 "C4IFIFO,CCB 4 Input Data FIFO"
endian.le
hgroup.quad (0xC07C0+0x30)++0x07
hide.quad 0x00 "C4OFIFO,CCB 4 Output Data FIFO"
in
hgroup.long (0xC07C0+0x40)++0x03
hide.long 0x00 "D4JQCR_MS,DECO4 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0xC07C0+0x44)++0x03
hide.long 0x00 "D4JQCR_LS,DECO4 Job Queue Control Register Least Significant Half"
hgroup.quad (0xC07C0+0x48)++0x07
hide.quad 0x00 "D4DAR,DECO4 Descriptor Address Register"
hgroup.long (0xC07C0+0x50)++0x03
hide.long 0x00 "D4OPSTA_MS,DECO4 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0xC07C0+0x54)++0x03
hide.long 0x00 "D4OPSTA_LS,DECO4 Operation Status Register Least Significant Half"
hgroup.long (0xC07C0+0x58)++0x03
hide.long 0x00 "D4CKSUMR,DECO4 Checksum Register"
hgroup.long (0xC07C0+0x60)++0x03
hide.long 0x00 "D4COICIDSR,DECO4 Control And Output ICID Status Register"
newline
hgroup.long (0xC07C0+0x64)++0x03
hide.long 0x00 "D4SIICIDSR,DECO4 SDID And Input ICID Status Register"
newline
endif
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long 0xD07C0++0x03
line.long 0x00 "C5FIFOSTA,CCB 5 FIFO Status"
hexmask.long.byte 0x00 24.--31. 1. "         C1IQHEAD      ,Current head of the class 1 alignment block queue located within the input data FIFO"
hexmask.long.byte 0x00 16.--23. 1. "                         C2IQHEAD     ,Current head of the class 2 alignment block queue located within the input data FIFO"
newline
hexmask.long.byte 0x00 8.--15. 1. "         DMAOQHEAD     ,Current head of the DMA queue located within the output data FIFO"
hexmask.long.byte 0x00 0.--7. 1. "                         DECOOQHEAD   ,Current head of the DECO alignment block queue located within the output data FIFO"
if (((per.l(ad:0x08000000+0xD07C0+0x10))&0x3000000)==0x2000000)
wgroup.long (0xD07C0+0x10)++0x03
line.long 0x00 "C5NFIFO_2,CCB 5 INformation FIFO When STYPE Is 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           PR           ,Prediction resistance" "Disabled,Enabled"
newline
bitfld.long 0x00 11. "         BM            ,Boundary minus 1" "Disabled,Enabled"
bitfld.long 0x00 10. "                   PS           ,Pad snoop" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--6. 1. "         PL            ,Pad length"
else
wgroup.long (0xD07C0+0x10)++0x03
line.long 0x00 "C5NFIFO,CCB 5 Information FIFO When STYPE Is Not 10"
bitfld.long 0x00 30.--31. "         DEST          ,Destination" "DECO alignment block,Class 1,Class 2,Both Classes"
bitfld.long 0x00 29. "       LC2          ,Last class 2" "Not last,Last"
newline
bitfld.long 0x00 28. "         LC1           ,Last class 1" "Not last,Last"
bitfld.long 0x00 27. "                   FC2          ,Flush class 2" "No flush,Flush"
newline
bitfld.long 0x00 26. "         FC1           ,Flush class 1" "No flush,Flush"
bitfld.long 0x00 24.--25. "                   STYPE        ,Source type [AST=0/AST=1]" "Input/Aux data FIFO,Output data FIFO / -,Padding block,Outsnooping"
newline
bitfld.long 0x00 20.--23. "         DTYPE         ,Data type [PKHA/other CHAs]" "PKHA A0/-,PKHA A1/ADD,PKHA A2/IV,PKHA A3/SAD,PKHA B0/-,PKHA B1/-,PKHA B2/-,PKHA B3/-,PKHA N/-,PKHA E/-,-/ICV,,PKHA A/-,PKHA B/-,-/DECO Ignore,-/Message Data"
bitfld.long 0x00 19. "             BND          ,Boundary padding" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--18. "         PTYPE         ,Pad type" "All 0,Random non-0,Incremented,Random,All 0 + num,Random non-0 + 0,N-1,Random non-0 + N"
bitfld.long 0x00 15. "           OC           ,OFIFO continuation" "Disabled,Enabled"
newline
bitfld.long 0x00 14. "         AST           ,Additional source types" "0,1"
hexmask.long.word 0x00 0.--11. 1. "                          DL           ,Data length"
endif
endian.be
wgroup.long (0xD07C0+0x20)++0x03
line.long 0x00 "C5IFIFO,CCB 5 Input Data FIFO"
endian.le
hgroup.quad (0xD07C0+0x30)++0x07
hide.quad 0x00 "C5OFIFO,CCB 5 Output Data FIFO"
in
group.long (0xD07C0+0x40)++0x03
line.long 0x00 "D5JQCR_MS,DECO5 Job Queue Control Register Most Significant Half"
bitfld.long 0x00 31. "         STEP          ,Step" "No effect,Step"
bitfld.long 0x00 30. "                  SING         ,Single Step mode" "Disabled,Enabled"
newline
bitfld.long 0x00 29. "         WHL           ,Whole descriptor" "Not occurred,Occurred"
bitfld.long 0x00 28. "               FOUR         ,Four words" "Less,At least"
newline
bitfld.long 0x00 27. "         ILE           ,Immediate little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "                SHR_FROM     ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. "         DWS           ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "                SOB          ,Shared descriptor or input frame burst" "Not passed,Passed"
newline
rbitfld.long 0x00 15. "         AMTD          ,Allow make trusted descriptor" "Not allowed,Allowed"
rbitfld.long 0x00 8.--10. "                SRC          ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,Queue Interface,AI,?..."
newline
bitfld.long 0x00 0.--4. "         ID            ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0xD07C0+0x44)++0x03
line.long 0x00 "D5JQCR_LS,DECO5 Job Queue Control Register Least Significant Half"
rgroup.quad (0xD07C0+0x48)++0x07
line.quad 0x00 "D5DAR,DECO5 Descriptor Address Register"
hexmask.quad 0x00 0.--48. 1. " DPTR          ,Descriptor pointer"
if (((per.l(ad:0x08000000+0xD07C0+0x50))&0xF0000000)==(0x10000000||0x20000000||0x40000000))
rgroup.long (0xD07C0+0x50)++0x03
line.long 0x00 "D5OPSTA_MS,DECO5 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
hexmask.long.byte 0x00 0.--7. 1. "                         STATUS       ,Error status"
else
rgroup.long (0xD07C0+0x50)++0x03
line.long 0x00 "D5OPSTA_MS,DECO5 Operation Status Register Most Significant Half"
bitfld.long 0x00 28.--31. "         STATUS_TYPE   ,Status type" "No error,DMA error,CCB error,Jump halt user status,DECO error,,,Jump halt condition code,?..."
bitfld.long 0x00 27. "   NLJ          ,Non-Local jump" "Not occurred,Occurred"
newline
hexmask.long.byte 0x00 8.--14. 1. "         COMMAND_INDEX ,Command index"
bitfld.long 0x00 7. "                         PIZ          ,Public key operation is zero" "No,Yes"
newline
bitfld.long 0x00 6. "         GCD           ,Greates common divisor is one" "No,Yes"
bitfld.long 0x00 5. "                        PRM          ,Public key is prime" "No,Yes"
newline
bitfld.long 0x00 3. "         MN            ,Math negative" "Positive,Negative"
bitfld.long 0x00 2. "                   MZ           ,Math zero" "Not zero,Zero"
newline
bitfld.long 0x00 1. "         MC            ,Math carry" "No carry,Carry"
bitfld.long 0x00 0. "                   MNV          ,Math NV" "No overflow,Overflow"
endif
rgroup.long (0xD07C0+0x54)++0x03
line.long 0x00 "D5OPSTA_LS,DECO5 Operation Status Register Least Significant Half"
hexmask.long 0x00 0.--28. 1. "         OUT_CT        ,Output count"
group.long (0xD07C0+0x58)++0x03
line.long 0x00 "D5CKSUMR,DECO5 Checksum Register"
hexmask.long.word 0x00 0.--15. 1. "         CKSUM         ,Checksum"
rgroup.long (0xD07C0+0x60)++0x07
line.long 0x00 "D5COICIDSR,DECO5 Control And Output ICID Status Register"
bitfld.long 0x00 31. "         CPL           ,Control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "                          CICID        ,Control ICID"
newline
bitfld.long 0x00 15. "         OPL           ,Output privilege level" "0,1"
hexmask.long.byte 0x00 0.--6. 1. "                          OICID        ,Output ICID"
line.long 0x04 "D5SIICIDSR,DECO5 SDID And Input ICID Status Register"
bitfld.long 0x04 31. "         TZ            ,TrustZone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "                   SDID         ,Security domain identifier"
newline
bitfld.long 0x04 15. "         IPL           ,Input privilege level" "0,1"
hexmask.long.byte 0x04 0.--6. 1. "                          IICID        ,ICID value"
else
hgroup.long 0xD07C0++0x03
hide.long 0x00 "C5FIFOSTA,CCB 5 FIFO Status"
newline
if (((per.l(ad:0x08000000+0xD07C0+0x10))&0x3000000)==0x2000000)
hgroup.long (0xD07C0+0x10)++0x03
hide.long 0x00 "C5NFIFO_2,CCB 5 Information FIFO When STYPE Is 10"
newline
newline
newline
newline
newline
newline
else
hgroup.long (0xD07C0+0x10)++0x03
hide.long 0x00 "C5NFIFO,CCB 5 Information FIFO When STYPE Is Not 10"
newline
newline
newline
newline
newline
endif
endian.be
hgroup.long (0xD07C0+0x20)++0x03
hide.long 0x00 "C5IFIFO,CCB 5 Input Data FIFO"
endian.le
hgroup.quad (0xD07C0+0x30)++0x07
hide.quad 0x00 "C5OFIFO,CCB 5 Output Data FIFO"
in
hgroup.long (0xD07C0+0x40)++0x03
hide.long 0x00 "D5JQCR_MS,DECO5 Job Queue Control Register Most Significant Half"
newline
newline
newline
newline
newline
hgroup.long (0xD07C0+0x44)++0x03
hide.long 0x00 "D5JQCR_LS,DECO5 Job Queue Control Register Least Significant Half"
hgroup.quad (0xD07C0+0x48)++0x07
hide.quad 0x00 "D5DAR,DECO5 Descriptor Address Register"
hgroup.long (0xD07C0+0x50)++0x03
hide.long 0x00 "D5OPSTA_MS,DECO5 Operation Status Register Most Significant Half"
newline
newline
newline
newline
hgroup.long (0xD07C0+0x54)++0x03
hide.long 0x00 "D5OPSTA_LS,DECO5 Operation Status Register Least Significant Half"
hgroup.long (0xD07C0+0x58)++0x03
hide.long 0x00 "D5CKSUMR,DECO5 Checksum Register"
hgroup.long (0xD07C0+0x60)++0x03
hide.long 0x00 "D5COICIDSR,DECO5 Control And Output ICID Status Register"
newline
hgroup.long (0xD07C0+0x64)++0x03
hide.long 0x00 "D5SIICIDSR,DECO5 SDID And Input ICID Status Register"
newline
endif
tree.end
tree "DECO Math Registers"
tree "DECO0"
group.long 0x80840++0x3F
line.long 0x00 "D0MTH0_MS,DECO0 Math Register 0_MS"
line.long 0x04 "D0MTH0_LS,DECO0 Math Register 0_LS"
line.long 0x08 "D0MTH1_MS,DECO0 Math Register 1_MS"
line.long 0x0C "D0MTH1_LS,DECO0 Math Register 1_LS"
line.long 0x10 "D0MTH2_MS,DECO0 Math Register 2_MS"
line.long 0x14 "D0MTH2_LS,DECO0 Math Register 2_LS"
line.long 0x18 "D0MTH3_MS,DECO0 Math Register 3_MS"
line.long 0x1C "D0MTH3_LS,DECO0 Math Register 3_LS"
line.long 0x20 "D0MTH4_MS,DECO0 Math Register 4_MS"
line.long 0x24 "D0MTH4_LS,DECO0 Math Register 4_LS"
line.long 0x28 "D0MTH5_MS,DECO0 Math Register 5_MS"
line.long 0x2C "D0MTH5_LS,DECO0 Math Register 5_LS"
line.long 0x30 "D0MTH6_MS,DECO0 Math Register 6_MS"
line.long 0x34 "D0MTH6_LS,DECO0 Math Register 6_LS"
line.long 0x38 "D0MTH7_MS,DECO0 Math Register 7_MS"
line.long 0x3C "D0MTH7_LS,DECO0 Math Register 7_LS"
tree.end
tree "DECO1"
group.long 0x90840++0x3F
line.long 0x00 "D1MTH0_MS,DECO1 Math Register 0_MS"
line.long 0x04 "D1MTH0_LS,DECO1 Math Register 0_LS"
line.long 0x08 "D1MTH1_MS,DECO1 Math Register 1_MS"
line.long 0x0C "D1MTH1_LS,DECO1 Math Register 1_LS"
line.long 0x10 "D1MTH2_MS,DECO1 Math Register 2_MS"
line.long 0x14 "D1MTH2_LS,DECO1 Math Register 2_LS"
line.long 0x18 "D1MTH3_MS,DECO1 Math Register 3_MS"
line.long 0x1C "D1MTH3_LS,DECO1 Math Register 3_LS"
line.long 0x20 "D1MTH4_MS,DECO1 Math Register 4_MS"
line.long 0x24 "D1MTH4_LS,DECO1 Math Register 4_LS"
line.long 0x28 "D1MTH5_MS,DECO1 Math Register 5_MS"
line.long 0x2C "D1MTH5_LS,DECO1 Math Register 5_LS"
line.long 0x30 "D1MTH6_MS,DECO1 Math Register 6_MS"
line.long 0x34 "D1MTH6_LS,DECO1 Math Register 6_LS"
line.long 0x38 "D1MTH7_MS,DECO1 Math Register 7_MS"
line.long 0x3C "D1MTH7_LS,DECO1 Math Register 7_LS"
tree.end
tree "DECO2"
group.long 0xA0840++0x3F
line.long 0x00 "D2MTH0_MS,DECO2 Math Register 0_MS"
line.long 0x04 "D2MTH0_LS,DECO2 Math Register 0_LS"
line.long 0x08 "D2MTH1_MS,DECO2 Math Register 1_MS"
line.long 0x0C "D2MTH1_LS,DECO2 Math Register 1_LS"
line.long 0x10 "D2MTH2_MS,DECO2 Math Register 2_MS"
line.long 0x14 "D2MTH2_LS,DECO2 Math Register 2_LS"
line.long 0x18 "D2MTH3_MS,DECO2 Math Register 3_MS"
line.long 0x1C "D2MTH3_LS,DECO2 Math Register 3_LS"
line.long 0x20 "D2MTH4_MS,DECO2 Math Register 4_MS"
line.long 0x24 "D2MTH4_LS,DECO2 Math Register 4_LS"
line.long 0x28 "D2MTH5_MS,DECO2 Math Register 5_MS"
line.long 0x2C "D2MTH5_LS,DECO2 Math Register 5_LS"
line.long 0x30 "D2MTH6_MS,DECO2 Math Register 6_MS"
line.long 0x34 "D2MTH6_LS,DECO2 Math Register 6_LS"
line.long 0x38 "D2MTH7_MS,DECO2 Math Register 7_MS"
line.long 0x3C "D2MTH7_LS,DECO2 Math Register 7_LS"
tree.end
tree "DECO3"
group.long 0xB0840++0x3F
line.long 0x00 "D3MTH0_MS,DECO3 Math Register 0_MS"
line.long 0x04 "D3MTH0_LS,DECO3 Math Register 0_LS"
line.long 0x08 "D3MTH1_MS,DECO3 Math Register 1_MS"
line.long 0x0C "D3MTH1_LS,DECO3 Math Register 1_LS"
line.long 0x10 "D3MTH2_MS,DECO3 Math Register 2_MS"
line.long 0x14 "D3MTH2_LS,DECO3 Math Register 2_LS"
line.long 0x18 "D3MTH3_MS,DECO3 Math Register 3_MS"
line.long 0x1C "D3MTH3_LS,DECO3 Math Register 3_LS"
line.long 0x20 "D3MTH4_MS,DECO3 Math Register 4_MS"
line.long 0x24 "D3MTH4_LS,DECO3 Math Register 4_LS"
line.long 0x28 "D3MTH5_MS,DECO3 Math Register 5_MS"
line.long 0x2C "D3MTH5_LS,DECO3 Math Register 5_LS"
line.long 0x30 "D3MTH6_MS,DECO3 Math Register 6_MS"
line.long 0x34 "D3MTH6_LS,DECO3 Math Register 6_LS"
line.long 0x38 "D3MTH7_MS,DECO3 Math Register 7_MS"
line.long 0x3C "D3MTH7_LS,DECO3 Math Register 7_LS"
tree.end
tree "DECO4"
group.long 0xC0840++0x3F
line.long 0x00 "D4MTH0_MS,DECO4 Math Register 0_MS"
line.long 0x04 "D4MTH0_LS,DECO4 Math Register 0_LS"
line.long 0x08 "D4MTH1_MS,DECO4 Math Register 1_MS"
line.long 0x0C "D4MTH1_LS,DECO4 Math Register 1_LS"
line.long 0x10 "D4MTH2_MS,DECO4 Math Register 2_MS"
line.long 0x14 "D4MTH2_LS,DECO4 Math Register 2_LS"
line.long 0x18 "D4MTH3_MS,DECO4 Math Register 3_MS"
line.long 0x1C "D4MTH3_LS,DECO4 Math Register 3_LS"
line.long 0x20 "D4MTH4_MS,DECO4 Math Register 4_MS"
line.long 0x24 "D4MTH4_LS,DECO4 Math Register 4_LS"
line.long 0x28 "D4MTH5_MS,DECO4 Math Register 5_MS"
line.long 0x2C "D4MTH5_LS,DECO4 Math Register 5_LS"
line.long 0x30 "D4MTH6_MS,DECO4 Math Register 6_MS"
line.long 0x34 "D4MTH6_LS,DECO4 Math Register 6_LS"
line.long 0x38 "D4MTH7_MS,DECO4 Math Register 7_MS"
line.long 0x3C "D4MTH7_LS,DECO4 Math Register 7_LS"
tree.end
tree "DECO5"
group.long 0xD0840++0x3F
line.long 0x00 "D5MTH0_MS,DECO5 Math Register 0_MS"
line.long 0x04 "D5MTH0_LS,DECO5 Math Register 0_LS"
line.long 0x08 "D5MTH1_MS,DECO5 Math Register 1_MS"
line.long 0x0C "D5MTH1_LS,DECO5 Math Register 1_LS"
line.long 0x10 "D5MTH2_MS,DECO5 Math Register 2_MS"
line.long 0x14 "D5MTH2_LS,DECO5 Math Register 2_LS"
line.long 0x18 "D5MTH3_MS,DECO5 Math Register 3_MS"
line.long 0x1C "D5MTH3_LS,DECO5 Math Register 3_LS"
line.long 0x20 "D5MTH4_MS,DECO5 Math Register 4_MS"
line.long 0x24 "D5MTH4_LS,DECO5 Math Register 4_LS"
line.long 0x28 "D5MTH5_MS,DECO5 Math Register 5_MS"
line.long 0x2C "D5MTH5_LS,DECO5 Math Register 5_LS"
line.long 0x30 "D5MTH6_MS,DECO5 Math Register 6_MS"
line.long 0x34 "D5MTH6_LS,DECO5 Math Register 6_LS"
line.long 0x38 "D5MTH7_MS,DECO5 Math Register 7_MS"
line.long 0x3C "D5MTH7_LS,DECO5 Math Register 7_LS"
tree.end
tree.end
tree "DECO Gather Table Registers"
group.long 0x80880++0x07
line.long 0x00 "D0GTR0_0,DECO0 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0GTR0_1,DECO0 Gather Table Register 0"
if ((per.l(ad:0x08000000+0x80880+0x08)&0x40000000)==0x00)
group.long (0x80880+0x08)++0x07
line.long 0x00 "D0GTR0_2,DECO0 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR0_3,DECO0 Gather Table Register 0"
else
group.long (0x80880+0x08)++0x07
line.long 0x00 "D0GTR0_2,DECO0 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR0_3,DECO0 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0x80880+0x10)++0x07
line.long 0x00 "D0GTR1_0,DECO0 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0GTR1_1,DECO0 Gather Table Register 1"
if ((per.l(ad:0x08000000+0x80880+0x18)&0x40000000)==0x00)
group.long (0x80880+0x18)++0x07
line.long 0x00 "D0GTR1_2,DECO0 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR1_3,DECO0 Gather Table Register 1"
else
group.long (0x80880+0x18)++0x07
line.long 0x00 "D0GTR1_2,DECO0 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR1_3,DECO0 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0x80880+0x20)++0x07
line.long 0x00 "D0GTR2_0,DECO0 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0GTR2_1,DECO0 Gather Table Register 2"
if ((per.l(ad:0x08000000+0x80880+0x28)&0x40000000)==0x00)
group.long (0x80880+0x28)++0x07
line.long 0x00 "D0GTR2_2,DECO0 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR2_3,DECO0 Gather Table Register 2"
else
group.long (0x80880+0x28)++0x07
line.long 0x00 "D0GTR2_2,DECO0 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR2_3,DECO0 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0x80880+0x30)++0x07
line.long 0x00 "D0GTR3_0,DECO0 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0GTR3_1,DECO0 Gather Table Register 3"
if ((per.l(ad:0x08000000+0x80880+0x38)&0x40000000)==0x00)
group.long (0x80880+0x38)++0x07
line.long 0x00 "D0GTR3_2,DECO0 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR3_3,DECO0 Gather Table Register 3"
else
group.long (0x80880+0x38)++0x07
line.long 0x00 "D0GTR3_2,DECO0 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0GTR3_3,DECO0 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long 0x90880++0x07
line.long 0x00 "D1GTR0_0,DECO1 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1GTR0_1,DECO1 Gather Table Register 0"
if ((per.l(ad:0x08000000+0x90880+0x08)&0x40000000)==0x00)
group.long (0x90880+0x08)++0x07
line.long 0x00 "D1GTR0_2,DECO1 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR0_3,DECO1 Gather Table Register 0"
else
group.long (0x90880+0x08)++0x07
line.long 0x00 "D1GTR0_2,DECO1 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR0_3,DECO1 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0x90880+0x10)++0x07
line.long 0x00 "D1GTR1_0,DECO1 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1GTR1_1,DECO1 Gather Table Register 1"
if ((per.l(ad:0x08000000+0x90880+0x18)&0x40000000)==0x00)
group.long (0x90880+0x18)++0x07
line.long 0x00 "D1GTR1_2,DECO1 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR1_3,DECO1 Gather Table Register 1"
else
group.long (0x90880+0x18)++0x07
line.long 0x00 "D1GTR1_2,DECO1 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR1_3,DECO1 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0x90880+0x20)++0x07
line.long 0x00 "D1GTR2_0,DECO1 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1GTR2_1,DECO1 Gather Table Register 2"
if ((per.l(ad:0x08000000+0x90880+0x28)&0x40000000)==0x00)
group.long (0x90880+0x28)++0x07
line.long 0x00 "D1GTR2_2,DECO1 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR2_3,DECO1 Gather Table Register 2"
else
group.long (0x90880+0x28)++0x07
line.long 0x00 "D1GTR2_2,DECO1 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR2_3,DECO1 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0x90880+0x30)++0x07
line.long 0x00 "D1GTR3_0,DECO1 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1GTR3_1,DECO1 Gather Table Register 3"
if ((per.l(ad:0x08000000+0x90880+0x38)&0x40000000)==0x00)
group.long (0x90880+0x38)++0x07
line.long 0x00 "D1GTR3_2,DECO1 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR3_3,DECO1 Gather Table Register 3"
else
group.long (0x90880+0x38)++0x07
line.long 0x00 "D1GTR3_2,DECO1 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1GTR3_3,DECO1 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long 0xA0880++0x07
line.long 0x00 "D2GTR0_0,DECO2 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2GTR0_1,DECO2 Gather Table Register 0"
if ((per.l(ad:0x08000000+0xA0880+0x08)&0x40000000)==0x00)
group.long (0xA0880+0x08)++0x07
line.long 0x00 "D2GTR0_2,DECO2 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR0_3,DECO2 Gather Table Register 0"
else
group.long (0xA0880+0x08)++0x07
line.long 0x00 "D2GTR0_2,DECO2 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR0_3,DECO2 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xA0880+0x10)++0x07
line.long 0x00 "D2GTR1_0,DECO2 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2GTR1_1,DECO2 Gather Table Register 1"
if ((per.l(ad:0x08000000+0xA0880+0x18)&0x40000000)==0x00)
group.long (0xA0880+0x18)++0x07
line.long 0x00 "D2GTR1_2,DECO2 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR1_3,DECO2 Gather Table Register 1"
else
group.long (0xA0880+0x18)++0x07
line.long 0x00 "D2GTR1_2,DECO2 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR1_3,DECO2 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xA0880+0x20)++0x07
line.long 0x00 "D2GTR2_0,DECO2 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2GTR2_1,DECO2 Gather Table Register 2"
if ((per.l(ad:0x08000000+0xA0880+0x28)&0x40000000)==0x00)
group.long (0xA0880+0x28)++0x07
line.long 0x00 "D2GTR2_2,DECO2 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR2_3,DECO2 Gather Table Register 2"
else
group.long (0xA0880+0x28)++0x07
line.long 0x00 "D2GTR2_2,DECO2 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR2_3,DECO2 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xA0880+0x30)++0x07
line.long 0x00 "D2GTR3_0,DECO2 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2GTR3_1,DECO2 Gather Table Register 3"
if ((per.l(ad:0x08000000+0xA0880+0x38)&0x40000000)==0x00)
group.long (0xA0880+0x38)++0x07
line.long 0x00 "D2GTR3_2,DECO2 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR3_3,DECO2 Gather Table Register 3"
else
group.long (0xA0880+0x38)++0x07
line.long 0x00 "D2GTR3_2,DECO2 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2GTR3_3,DECO2 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long 0xB0880++0x07
line.long 0x00 "D3GTR0_0,DECO3 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3GTR0_1,DECO3 Gather Table Register 0"
if ((per.l(ad:0x08000000+0xB0880+0x08)&0x40000000)==0x00)
group.long (0xB0880+0x08)++0x07
line.long 0x00 "D3GTR0_2,DECO3 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR0_3,DECO3 Gather Table Register 0"
else
group.long (0xB0880+0x08)++0x07
line.long 0x00 "D3GTR0_2,DECO3 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR0_3,DECO3 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xB0880+0x10)++0x07
line.long 0x00 "D3GTR1_0,DECO3 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3GTR1_1,DECO3 Gather Table Register 1"
if ((per.l(ad:0x08000000+0xB0880+0x18)&0x40000000)==0x00)
group.long (0xB0880+0x18)++0x07
line.long 0x00 "D3GTR1_2,DECO3 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR1_3,DECO3 Gather Table Register 1"
else
group.long (0xB0880+0x18)++0x07
line.long 0x00 "D3GTR1_2,DECO3 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR1_3,DECO3 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xB0880+0x20)++0x07
line.long 0x00 "D3GTR2_0,DECO3 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3GTR2_1,DECO3 Gather Table Register 2"
if ((per.l(ad:0x08000000+0xB0880+0x28)&0x40000000)==0x00)
group.long (0xB0880+0x28)++0x07
line.long 0x00 "D3GTR2_2,DECO3 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR2_3,DECO3 Gather Table Register 2"
else
group.long (0xB0880+0x28)++0x07
line.long 0x00 "D3GTR2_2,DECO3 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR2_3,DECO3 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xB0880+0x30)++0x07
line.long 0x00 "D3GTR3_0,DECO3 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3GTR3_1,DECO3 Gather Table Register 3"
if ((per.l(ad:0x08000000+0xB0880+0x38)&0x40000000)==0x00)
group.long (0xB0880+0x38)++0x07
line.long 0x00 "D3GTR3_2,DECO3 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR3_3,DECO3 Gather Table Register 3"
else
group.long (0xB0880+0x38)++0x07
line.long 0x00 "D3GTR3_2,DECO3 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3GTR3_3,DECO3 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long 0xC0880++0x07
line.long 0x00 "D4GTR0_0,DECO4 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4GTR0_1,DECO4 Gather Table Register 0"
if ((per.l(ad:0x08000000+0xC0880+0x08)&0x40000000)==0x00)
group.long (0xC0880+0x08)++0x07
line.long 0x00 "D4GTR0_2,DECO4 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR0_3,DECO4 Gather Table Register 0"
else
group.long (0xC0880+0x08)++0x07
line.long 0x00 "D4GTR0_2,DECO4 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR0_3,DECO4 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xC0880+0x10)++0x07
line.long 0x00 "D4GTR1_0,DECO4 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4GTR1_1,DECO4 Gather Table Register 1"
if ((per.l(ad:0x08000000+0xC0880+0x18)&0x40000000)==0x00)
group.long (0xC0880+0x18)++0x07
line.long 0x00 "D4GTR1_2,DECO4 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR1_3,DECO4 Gather Table Register 1"
else
group.long (0xC0880+0x18)++0x07
line.long 0x00 "D4GTR1_2,DECO4 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR1_3,DECO4 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xC0880+0x20)++0x07
line.long 0x00 "D4GTR2_0,DECO4 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4GTR2_1,DECO4 Gather Table Register 2"
if ((per.l(ad:0x08000000+0xC0880+0x28)&0x40000000)==0x00)
group.long (0xC0880+0x28)++0x07
line.long 0x00 "D4GTR2_2,DECO4 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR2_3,DECO4 Gather Table Register 2"
else
group.long (0xC0880+0x28)++0x07
line.long 0x00 "D4GTR2_2,DECO4 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR2_3,DECO4 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xC0880+0x30)++0x07
line.long 0x00 "D4GTR3_0,DECO4 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4GTR3_1,DECO4 Gather Table Register 3"
if ((per.l(ad:0x08000000+0xC0880+0x38)&0x40000000)==0x00)
group.long (0xC0880+0x38)++0x07
line.long 0x00 "D4GTR3_2,DECO4 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR3_3,DECO4 Gather Table Register 3"
else
group.long (0xC0880+0x38)++0x07
line.long 0x00 "D4GTR3_2,DECO4 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4GTR3_3,DECO4 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long 0xD0880++0x07
line.long 0x00 "D5GTR0_0,DECO5 Gather Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5GTR0_1,DECO5 Gather Table Register 0"
if ((per.l(ad:0x08000000+0xD0880+0x08)&0x40000000)==0x00)
group.long (0xD0880+0x08)++0x07
line.long 0x00 "D5GTR0_2,DECO5 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR0_3,DECO5 Gather Table Register 0"
else
group.long (0xD0880+0x08)++0x07
line.long 0x00 "D5GTR0_2,DECO5 Gather Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR0_3,DECO5 Gather Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xD0880+0x10)++0x07
line.long 0x00 "D5GTR1_0,DECO5 Gather Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5GTR1_1,DECO5 Gather Table Register 1"
if ((per.l(ad:0x08000000+0xD0880+0x18)&0x40000000)==0x00)
group.long (0xD0880+0x18)++0x07
line.long 0x00 "D5GTR1_2,DECO5 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR1_3,DECO5 Gather Table Register 1"
else
group.long (0xD0880+0x18)++0x07
line.long 0x00 "D5GTR1_2,DECO5 Gather Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR1_3,DECO5 Gather Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xD0880+0x20)++0x07
line.long 0x00 "D5GTR2_0,DECO5 Gather Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5GTR2_1,DECO5 Gather Table Register 2"
if ((per.l(ad:0x08000000+0xD0880+0x28)&0x40000000)==0x00)
group.long (0xD0880+0x28)++0x07
line.long 0x00 "D5GTR2_2,DECO5 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR2_3,DECO5 Gather Table Register 2"
else
group.long (0xD0880+0x28)++0x07
line.long 0x00 "D5GTR2_2,DECO5 Gather Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR2_3,DECO5 Gather Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
group.long (0xD0880+0x30)++0x07
line.long 0x00 "D5GTR3_0,DECO5 Gather Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5GTR3_1,DECO5 Gather Table Register 3"
if ((per.l(ad:0x08000000+0xD0880+0x38)&0x40000000)==0x00)
group.long (0xD0880+0x38)++0x07
line.long 0x00 "D5GTR3_2,DECO5 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR3_3,DECO5 Gather Table Register 3"
else
group.long (0xD0880+0x38)++0x07
line.long 0x00 "D5GTR3_2,DECO5 Gather Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5GTR3_3,DECO5 Gather Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer Length"
endif
tree.end
tree "DECO Scatter Table Registers"
group.long 0x80900++0x07
line.long 0x00 "D0STR0_0,DECO0 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0STR0_1,DECO0 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0x80900+0x08)&0x40000000)==0x00)
group.long (0x80900+0x08)++0x07
line.long 0x00 "D0STR0_2,DECO0 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR0_3,DECO0 Scatter Table Register 0"
else
group.long (0x80900+0x08)++0x07
line.long 0x00 "D0STR0_2,DECO0 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR0_3,DECO0 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0x80900+0x10)++0x07
line.long 0x00 "D0STR1_0,DECO0 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0STR1_1,DECO0 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0x80900+0x18)&0x40000000)==0x00)
group.long (0x80900+0x18)++0x07
line.long 0x00 "D0STR1_2,DECO0 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR1_3,DECO0 Scatter Table Register 1"
else
group.long (0x80900+0x18)++0x07
line.long 0x00 "D0STR1_2,DECO0 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR1_3,DECO0 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0x80900+0x20)++0x07
line.long 0x00 "D0STR2_0,DECO0 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0STR2_1,DECO0 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0x80900+0x28)&0x40000000)==0x00)
group.long (0x80900+0x28)++0x07
line.long 0x00 "D0STR2_2,DECO0 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR2_3,DECO0 Scatter Table Register 2"
else
group.long (0x80900+0x28)++0x07
line.long 0x00 "D0STR2_2,DECO0 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR2_3,DECO0 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0x80900+0x30)++0x07
line.long 0x00 "D0STR3_0,DECO0 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D0STR3_1,DECO0 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0x80900+0x38)&0x40000000)==0x00)
group.long (0x80900+0x38)++0x07
line.long 0x00 "D0STR3_2,DECO0 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR3_3,DECO0 Scatter Table Register 3"
else
group.long (0x80900+0x38)++0x07
line.long 0x00 "D0STR3_2,DECO0 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D0STR3_3,DECO0 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long 0x90900++0x07
line.long 0x00 "D1STR0_0,DECO1 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1STR0_1,DECO1 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0x90900+0x08)&0x40000000)==0x00)
group.long (0x90900+0x08)++0x07
line.long 0x00 "D1STR0_2,DECO1 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR0_3,DECO1 Scatter Table Register 0"
else
group.long (0x90900+0x08)++0x07
line.long 0x00 "D1STR0_2,DECO1 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR0_3,DECO1 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0x90900+0x10)++0x07
line.long 0x00 "D1STR1_0,DECO1 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1STR1_1,DECO1 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0x90900+0x18)&0x40000000)==0x00)
group.long (0x90900+0x18)++0x07
line.long 0x00 "D1STR1_2,DECO1 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR1_3,DECO1 Scatter Table Register 1"
else
group.long (0x90900+0x18)++0x07
line.long 0x00 "D1STR1_2,DECO1 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR1_3,DECO1 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0x90900+0x20)++0x07
line.long 0x00 "D1STR2_0,DECO1 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1STR2_1,DECO1 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0x90900+0x28)&0x40000000)==0x00)
group.long (0x90900+0x28)++0x07
line.long 0x00 "D1STR2_2,DECO1 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR2_3,DECO1 Scatter Table Register 2"
else
group.long (0x90900+0x28)++0x07
line.long 0x00 "D1STR2_2,DECO1 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR2_3,DECO1 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0x90900+0x30)++0x07
line.long 0x00 "D1STR3_0,DECO1 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D1STR3_1,DECO1 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0x90900+0x38)&0x40000000)==0x00)
group.long (0x90900+0x38)++0x07
line.long 0x00 "D1STR3_2,DECO1 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR3_3,DECO1 Scatter Table Register 3"
else
group.long (0x90900+0x38)++0x07
line.long 0x00 "D1STR3_2,DECO1 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D1STR3_3,DECO1 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long 0xA0900++0x07
line.long 0x00 "D2STR0_0,DECO2 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2STR0_1,DECO2 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0xA0900+0x08)&0x40000000)==0x00)
group.long (0xA0900+0x08)++0x07
line.long 0x00 "D2STR0_2,DECO2 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR0_3,DECO2 Scatter Table Register 0"
else
group.long (0xA0900+0x08)++0x07
line.long 0x00 "D2STR0_2,DECO2 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR0_3,DECO2 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xA0900+0x10)++0x07
line.long 0x00 "D2STR1_0,DECO2 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2STR1_1,DECO2 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0xA0900+0x18)&0x40000000)==0x00)
group.long (0xA0900+0x18)++0x07
line.long 0x00 "D2STR1_2,DECO2 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR1_3,DECO2 Scatter Table Register 1"
else
group.long (0xA0900+0x18)++0x07
line.long 0x00 "D2STR1_2,DECO2 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR1_3,DECO2 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xA0900+0x20)++0x07
line.long 0x00 "D2STR2_0,DECO2 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2STR2_1,DECO2 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0xA0900+0x28)&0x40000000)==0x00)
group.long (0xA0900+0x28)++0x07
line.long 0x00 "D2STR2_2,DECO2 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR2_3,DECO2 Scatter Table Register 2"
else
group.long (0xA0900+0x28)++0x07
line.long 0x00 "D2STR2_2,DECO2 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR2_3,DECO2 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xA0900+0x30)++0x07
line.long 0x00 "D2STR3_0,DECO2 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D2STR3_1,DECO2 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0xA0900+0x38)&0x40000000)==0x00)
group.long (0xA0900+0x38)++0x07
line.long 0x00 "D2STR3_2,DECO2 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR3_3,DECO2 Scatter Table Register 3"
else
group.long (0xA0900+0x38)++0x07
line.long 0x00 "D2STR3_2,DECO2 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D2STR3_3,DECO2 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long 0xB0900++0x07
line.long 0x00 "D3STR0_0,DECO3 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3STR0_1,DECO3 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0xB0900+0x08)&0x40000000)==0x00)
group.long (0xB0900+0x08)++0x07
line.long 0x00 "D3STR0_2,DECO3 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR0_3,DECO3 Scatter Table Register 0"
else
group.long (0xB0900+0x08)++0x07
line.long 0x00 "D3STR0_2,DECO3 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR0_3,DECO3 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xB0900+0x10)++0x07
line.long 0x00 "D3STR1_0,DECO3 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3STR1_1,DECO3 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0xB0900+0x18)&0x40000000)==0x00)
group.long (0xB0900+0x18)++0x07
line.long 0x00 "D3STR1_2,DECO3 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR1_3,DECO3 Scatter Table Register 1"
else
group.long (0xB0900+0x18)++0x07
line.long 0x00 "D3STR1_2,DECO3 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR1_3,DECO3 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xB0900+0x20)++0x07
line.long 0x00 "D3STR2_0,DECO3 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3STR2_1,DECO3 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0xB0900+0x28)&0x40000000)==0x00)
group.long (0xB0900+0x28)++0x07
line.long 0x00 "D3STR2_2,DECO3 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR2_3,DECO3 Scatter Table Register 2"
else
group.long (0xB0900+0x28)++0x07
line.long 0x00 "D3STR2_2,DECO3 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR2_3,DECO3 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xB0900+0x30)++0x07
line.long 0x00 "D3STR3_0,DECO3 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D3STR3_1,DECO3 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0xB0900+0x38)&0x40000000)==0x00)
group.long (0xB0900+0x38)++0x07
line.long 0x00 "D3STR3_2,DECO3 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR3_3,DECO3 Scatter Table Register 3"
else
group.long (0xB0900+0x38)++0x07
line.long 0x00 "D3STR3_2,DECO3 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D3STR3_3,DECO3 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long 0xC0900++0x07
line.long 0x00 "D4STR0_0,DECO4 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4STR0_1,DECO4 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0xC0900+0x08)&0x40000000)==0x00)
group.long (0xC0900+0x08)++0x07
line.long 0x00 "D4STR0_2,DECO4 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR0_3,DECO4 Scatter Table Register 0"
else
group.long (0xC0900+0x08)++0x07
line.long 0x00 "D4STR0_2,DECO4 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR0_3,DECO4 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xC0900+0x10)++0x07
line.long 0x00 "D4STR1_0,DECO4 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4STR1_1,DECO4 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0xC0900+0x18)&0x40000000)==0x00)
group.long (0xC0900+0x18)++0x07
line.long 0x00 "D4STR1_2,DECO4 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR1_3,DECO4 Scatter Table Register 1"
else
group.long (0xC0900+0x18)++0x07
line.long 0x00 "D4STR1_2,DECO4 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR1_3,DECO4 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xC0900+0x20)++0x07
line.long 0x00 "D4STR2_0,DECO4 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4STR2_1,DECO4 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0xC0900+0x28)&0x40000000)==0x00)
group.long (0xC0900+0x28)++0x07
line.long 0x00 "D4STR2_2,DECO4 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR2_3,DECO4 Scatter Table Register 2"
else
group.long (0xC0900+0x28)++0x07
line.long 0x00 "D4STR2_2,DECO4 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR2_3,DECO4 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xC0900+0x30)++0x07
line.long 0x00 "D4STR3_0,DECO4 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D4STR3_1,DECO4 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0xC0900+0x38)&0x40000000)==0x00)
group.long (0xC0900+0x38)++0x07
line.long 0x00 "D4STR3_2,DECO4 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR3_3,DECO4 Scatter Table Register 3"
else
group.long (0xC0900+0x38)++0x07
line.long 0x00 "D4STR3_2,DECO4 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D4STR3_3,DECO4 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long 0xD0900++0x07
line.long 0x00 "D5STR0_0,DECO5 Scatter Table Register 0"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5STR0_1,DECO5 Scatter Table Register 0"
if ((per.l(ad:0x08000000+0xD0900+0x08)&0x40000000)==0x00)
group.long (0xD0900+0x08)++0x07
line.long 0x00 "D5STR0_2,DECO5 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR0_3,DECO5 Scatter Table Register 0"
else
group.long (0xD0900+0x08)++0x07
line.long 0x00 "D5STR0_2,DECO5 Scatter Table Register 0"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR0_3,DECO5 Scatter Table Register 0"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available Buffer length"
endif
group.long (0xD0900+0x10)++0x07
line.long 0x00 "D5STR1_0,DECO5 Scatter Table Register 1"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5STR1_1,DECO5 Scatter Table Register 1"
if ((per.l(ad:0x08000000+0xD0900+0x18)&0x40000000)==0x00)
group.long (0xD0900+0x18)++0x07
line.long 0x00 "D5STR1_2,DECO5 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR1_3,DECO5 Scatter Table Register 1"
else
group.long (0xD0900+0x18)++0x07
line.long 0x00 "D5STR1_2,DECO5 Scatter Table Register 1"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR1_3,DECO5 Scatter Table Register 1"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xD0900+0x20)++0x07
line.long 0x00 "D5STR2_0,DECO5 Scatter Table Register 2"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5STR2_1,DECO5 Scatter Table Register 2"
if ((per.l(ad:0x08000000+0xD0900+0x28)&0x40000000)==0x00)
group.long (0xD0900+0x28)++0x07
line.long 0x00 "D5STR2_2,DECO5 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR2_3,DECO5 Scatter Table Register 2"
else
group.long (0xD0900+0x28)++0x07
line.long 0x00 "D5STR2_2,DECO5 Scatter Table Register 2"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR2_3,DECO5 Scatter Table Register 2"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
group.long (0xD0900+0x30)++0x07
line.long 0x00 "D5STR3_0,DECO5 Scatter Table Register 3"
hexmask.long.word 0x00 17.--31. 1. " SW_TOKEN     ,Software token"
hexmask.long.tbyte 0x00 0.--16. 1. "     ADDR ,49-bit address pointer"
line.long 0x04 "D5STR3_1,DECO5 Scatter Table Register 3"
if ((per.l(ad:0x08000000+0xD0900+0x38)&0x40000000)==0x00)
group.long (0xD0900+0x38)++0x07
line.long 0x00 "D5STR3_2,DECO5 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR3_3,DECO5 Scatter Table Register 3"
else
group.long (0xD0900+0x38)++0x07
line.long 0x00 "D5STR3_2,DECO5 Scatter Table Register 3"
bitfld.long 0x00 31. " F            ,Final bit" "Not set,Set"
bitfld.long 0x00 30. "  SL   ,Short length" "32,17"
bitfld.long 0x00 28.--29. "           FMT ,Target format" "Single Data Buffer,Frame Data Section,SGT Extension,Unused"
newline
hexmask.long.word 0x00 17.--27. 1. " OFFSET       ,Data offset"
bitfld.long 0x00 16. "     BMT  ,Bypass memory translation" "Accelerator,System MMU"
bitfld.long 0x00 15. "  IVP ,Invalid pool ID" "0,1"
newline
hexmask.long.word 0x00 0.--14. 1. " BPID         ,Buffer pool ID"
line.long 0x04 "D5STR3_3,DECO5 Scatter Table Register 3"
hexmask.long.word 0x04 22.--31. 1. " BUFF_SIZE    ,Buffer size"
bitfld.long 0x04 21. "     SR   ,Scarce resource" "0,1"
bitfld.long 0x04 20. "            SF  ,Start of fragment" "0,1"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " AVAIL_LENGTH ,Available buffer length"
endif
tree.end
tree "DECO Descriptor Buffer Word Registers"
tree "DECO0"
group.long 0x80A00++0xFF
line.long 0x00 "D0DESB0,DECO0 Descriptor Buffer Word 0"
line.long 0x04 "D0DESB1,DECO0 Descriptor Buffer Word 1"
line.long 0x08 "D0DESB2,DECO0 Descriptor Buffer Word 2"
line.long 0x0C "D0DESB3,DECO0 Descriptor Buffer Word 3"
line.long 0x10 "D0DESB4,DECO0 Descriptor Buffer Word 4"
line.long 0x14 "D0DESB5,DECO0 Descriptor Buffer Word 5"
line.long 0x18 "D0DESB6,DECO0 Descriptor Buffer Word 6"
line.long 0x1C "D0DESB7,DECO0 Descriptor Buffer Word 7"
line.long 0x20 "D0DESB8,DECO0 Descriptor Buffer Word 8"
line.long 0x24 "D0DESB9,DECO0 Descriptor Buffer Word 9"
line.long 0x28 "D0DESB10,DECO0 Descriptor Buffer Word 10"
line.long 0x2C "D0DESB11,DECO0 Descriptor Buffer Word 11"
line.long 0x30 "D0DESB12,DECO0 Descriptor Buffer Word 12"
line.long 0x34 "D0DESB13,DECO0 Descriptor Buffer Word 13"
line.long 0x38 "D0DESB14,DECO0 Descriptor Buffer Word 14"
line.long 0x3C "D0DESB15,DECO0 Descriptor Buffer Word 15"
line.long 0x40 "D0DESB16,DECO0 Descriptor Buffer Word 16"
line.long 0x44 "D0DESB17,DECO0 Descriptor Buffer Word 17"
line.long 0x48 "D0DESB18,DECO0 Descriptor Buffer Word 18"
line.long 0x4C "D0DESB19,DECO0 Descriptor Buffer Word 19"
line.long 0x50 "D0DESB20,DECO0 Descriptor Buffer Word 20"
line.long 0x54 "D0DESB21,DECO0 Descriptor Buffer Word 21"
line.long 0x58 "D0DESB22,DECO0 Descriptor Buffer Word 22"
line.long 0x5C "D0DESB23,DECO0 Descriptor Buffer Word 23"
line.long 0x60 "D0DESB24,DECO0 Descriptor Buffer Word 24"
line.long 0x64 "D0DESB25,DECO0 Descriptor Buffer Word 25"
line.long 0x68 "D0DESB26,DECO0 Descriptor Buffer Word 26"
line.long 0x6C "D0DESB27,DECO0 Descriptor Buffer Word 27"
line.long 0x70 "D0DESB28,DECO0 Descriptor Buffer Word 28"
line.long 0x74 "D0DESB29,DECO0 Descriptor Buffer Word 29"
line.long 0x78 "D0DESB30,DECO0 Descriptor Buffer Word 30"
line.long 0x7C "D0DESB31,DECO0 Descriptor Buffer Word 31"
line.long 0x80 "D0DESB32,DECO0 Descriptor Buffer Word 32"
line.long 0x84 "D0DESB33,DECO0 Descriptor Buffer Word 33"
line.long 0x88 "D0DESB34,DECO0 Descriptor Buffer Word 34"
line.long 0x8C "D0DESB35,DECO0 Descriptor Buffer Word 35"
line.long 0x90 "D0DESB36,DECO0 Descriptor Buffer Word 36"
line.long 0x94 "D0DESB37,DECO0 Descriptor Buffer Word 37"
line.long 0x98 "D0DESB38,DECO0 Descriptor Buffer Word 38"
line.long 0x9C "D0DESB39,DECO0 Descriptor Buffer Word 39"
line.long 0xA0 "D0DESB40,DECO0 Descriptor Buffer Word 40"
line.long 0xA4 "D0DESB41,DECO0 Descriptor Buffer Word 41"
line.long 0xA8 "D0DESB42,DECO0 Descriptor Buffer Word 42"
line.long 0xAC "D0DESB43,DECO0 Descriptor Buffer Word 43"
line.long 0xB0 "D0DESB44,DECO0 Descriptor Buffer Word 44"
line.long 0xB4 "D0DESB45,DECO0 Descriptor Buffer Word 45"
line.long 0xB8 "D0DESB46,DECO0 Descriptor Buffer Word 46"
line.long 0xBC "D0DESB47,DECO0 Descriptor Buffer Word 47"
line.long 0xC0 "D0DESB48,DECO0 Descriptor Buffer Word 48"
line.long 0xC4 "D0DESB49,DECO0 Descriptor Buffer Word 49"
line.long 0xC8 "D0DESB50,DECO0 Descriptor Buffer Word 50"
line.long 0xCC "D0DESB51,DECO0 Descriptor Buffer Word 51"
line.long 0xD0 "D0DESB52,DECO0 Descriptor Buffer Word 52"
line.long 0xD4 "D0DESB53,DECO0 Descriptor Buffer Word 53"
line.long 0xD8 "D0DESB54,DECO0 Descriptor Buffer Word 54"
line.long 0xDC "D0DESB55,DECO0 Descriptor Buffer Word 55"
line.long 0xE0 "D0DESB56,DECO0 Descriptor Buffer Word 56"
line.long 0xE4 "D0DESB57,DECO0 Descriptor Buffer Word 57"
line.long 0xE8 "D0DESB58,DECO0 Descriptor Buffer Word 58"
line.long 0xEC "D0DESB59,DECO0 Descriptor Buffer Word 59"
line.long 0xF0 "D0DESB60,DECO0 Descriptor Buffer Word 60"
line.long 0xF4 "D0DESB61,DECO0 Descriptor Buffer Word 61"
line.long 0xF8 "D0DESB62,DECO0 Descriptor Buffer Word 62"
line.long 0xFC "D0DESB63,DECO0 Descriptor Buffer Word 63"
tree.end
tree "DECO1"
group.long 0x90A00++0xFF
line.long 0x00 "D1DESB0,DECO1 Descriptor Buffer Word 0"
line.long 0x04 "D1DESB1,DECO1 Descriptor Buffer Word 1"
line.long 0x08 "D1DESB2,DECO1 Descriptor Buffer Word 2"
line.long 0x0C "D1DESB3,DECO1 Descriptor Buffer Word 3"
line.long 0x10 "D1DESB4,DECO1 Descriptor Buffer Word 4"
line.long 0x14 "D1DESB5,DECO1 Descriptor Buffer Word 5"
line.long 0x18 "D1DESB6,DECO1 Descriptor Buffer Word 6"
line.long 0x1C "D1DESB7,DECO1 Descriptor Buffer Word 7"
line.long 0x20 "D1DESB8,DECO1 Descriptor Buffer Word 8"
line.long 0x24 "D1DESB9,DECO1 Descriptor Buffer Word 9"
line.long 0x28 "D1DESB10,DECO1 Descriptor Buffer Word 10"
line.long 0x2C "D1DESB11,DECO1 Descriptor Buffer Word 11"
line.long 0x30 "D1DESB12,DECO1 Descriptor Buffer Word 12"
line.long 0x34 "D1DESB13,DECO1 Descriptor Buffer Word 13"
line.long 0x38 "D1DESB14,DECO1 Descriptor Buffer Word 14"
line.long 0x3C "D1DESB15,DECO1 Descriptor Buffer Word 15"
line.long 0x40 "D1DESB16,DECO1 Descriptor Buffer Word 16"
line.long 0x44 "D1DESB17,DECO1 Descriptor Buffer Word 17"
line.long 0x48 "D1DESB18,DECO1 Descriptor Buffer Word 18"
line.long 0x4C "D1DESB19,DECO1 Descriptor Buffer Word 19"
line.long 0x50 "D1DESB20,DECO1 Descriptor Buffer Word 20"
line.long 0x54 "D1DESB21,DECO1 Descriptor Buffer Word 21"
line.long 0x58 "D1DESB22,DECO1 Descriptor Buffer Word 22"
line.long 0x5C "D1DESB23,DECO1 Descriptor Buffer Word 23"
line.long 0x60 "D1DESB24,DECO1 Descriptor Buffer Word 24"
line.long 0x64 "D1DESB25,DECO1 Descriptor Buffer Word 25"
line.long 0x68 "D1DESB26,DECO1 Descriptor Buffer Word 26"
line.long 0x6C "D1DESB27,DECO1 Descriptor Buffer Word 27"
line.long 0x70 "D1DESB28,DECO1 Descriptor Buffer Word 28"
line.long 0x74 "D1DESB29,DECO1 Descriptor Buffer Word 29"
line.long 0x78 "D1DESB30,DECO1 Descriptor Buffer Word 30"
line.long 0x7C "D1DESB31,DECO1 Descriptor Buffer Word 31"
line.long 0x80 "D1DESB32,DECO1 Descriptor Buffer Word 32"
line.long 0x84 "D1DESB33,DECO1 Descriptor Buffer Word 33"
line.long 0x88 "D1DESB34,DECO1 Descriptor Buffer Word 34"
line.long 0x8C "D1DESB35,DECO1 Descriptor Buffer Word 35"
line.long 0x90 "D1DESB36,DECO1 Descriptor Buffer Word 36"
line.long 0x94 "D1DESB37,DECO1 Descriptor Buffer Word 37"
line.long 0x98 "D1DESB38,DECO1 Descriptor Buffer Word 38"
line.long 0x9C "D1DESB39,DECO1 Descriptor Buffer Word 39"
line.long 0xA0 "D1DESB40,DECO1 Descriptor Buffer Word 40"
line.long 0xA4 "D1DESB41,DECO1 Descriptor Buffer Word 41"
line.long 0xA8 "D1DESB42,DECO1 Descriptor Buffer Word 42"
line.long 0xAC "D1DESB43,DECO1 Descriptor Buffer Word 43"
line.long 0xB0 "D1DESB44,DECO1 Descriptor Buffer Word 44"
line.long 0xB4 "D1DESB45,DECO1 Descriptor Buffer Word 45"
line.long 0xB8 "D1DESB46,DECO1 Descriptor Buffer Word 46"
line.long 0xBC "D1DESB47,DECO1 Descriptor Buffer Word 47"
line.long 0xC0 "D1DESB48,DECO1 Descriptor Buffer Word 48"
line.long 0xC4 "D1DESB49,DECO1 Descriptor Buffer Word 49"
line.long 0xC8 "D1DESB50,DECO1 Descriptor Buffer Word 50"
line.long 0xCC "D1DESB51,DECO1 Descriptor Buffer Word 51"
line.long 0xD0 "D1DESB52,DECO1 Descriptor Buffer Word 52"
line.long 0xD4 "D1DESB53,DECO1 Descriptor Buffer Word 53"
line.long 0xD8 "D1DESB54,DECO1 Descriptor Buffer Word 54"
line.long 0xDC "D1DESB55,DECO1 Descriptor Buffer Word 55"
line.long 0xE0 "D1DESB56,DECO1 Descriptor Buffer Word 56"
line.long 0xE4 "D1DESB57,DECO1 Descriptor Buffer Word 57"
line.long 0xE8 "D1DESB58,DECO1 Descriptor Buffer Word 58"
line.long 0xEC "D1DESB59,DECO1 Descriptor Buffer Word 59"
line.long 0xF0 "D1DESB60,DECO1 Descriptor Buffer Word 60"
line.long 0xF4 "D1DESB61,DECO1 Descriptor Buffer Word 61"
line.long 0xF8 "D1DESB62,DECO1 Descriptor Buffer Word 62"
line.long 0xFC "D1DESB63,DECO1 Descriptor Buffer Word 63"
tree.end
tree "DECO2"
group.long 0xA0A00++0xFF
line.long 0x00 "D2DESB0,DECO2 Descriptor Buffer Word 0"
line.long 0x04 "D2DESB1,DECO2 Descriptor Buffer Word 1"
line.long 0x08 "D2DESB2,DECO2 Descriptor Buffer Word 2"
line.long 0x0C "D2DESB3,DECO2 Descriptor Buffer Word 3"
line.long 0x10 "D2DESB4,DECO2 Descriptor Buffer Word 4"
line.long 0x14 "D2DESB5,DECO2 Descriptor Buffer Word 5"
line.long 0x18 "D2DESB6,DECO2 Descriptor Buffer Word 6"
line.long 0x1C "D2DESB7,DECO2 Descriptor Buffer Word 7"
line.long 0x20 "D2DESB8,DECO2 Descriptor Buffer Word 8"
line.long 0x24 "D2DESB9,DECO2 Descriptor Buffer Word 9"
line.long 0x28 "D2DESB10,DECO2 Descriptor Buffer Word 10"
line.long 0x2C "D2DESB11,DECO2 Descriptor Buffer Word 11"
line.long 0x30 "D2DESB12,DECO2 Descriptor Buffer Word 12"
line.long 0x34 "D2DESB13,DECO2 Descriptor Buffer Word 13"
line.long 0x38 "D2DESB14,DECO2 Descriptor Buffer Word 14"
line.long 0x3C "D2DESB15,DECO2 Descriptor Buffer Word 15"
line.long 0x40 "D2DESB16,DECO2 Descriptor Buffer Word 16"
line.long 0x44 "D2DESB17,DECO2 Descriptor Buffer Word 17"
line.long 0x48 "D2DESB18,DECO2 Descriptor Buffer Word 18"
line.long 0x4C "D2DESB19,DECO2 Descriptor Buffer Word 19"
line.long 0x50 "D2DESB20,DECO2 Descriptor Buffer Word 20"
line.long 0x54 "D2DESB21,DECO2 Descriptor Buffer Word 21"
line.long 0x58 "D2DESB22,DECO2 Descriptor Buffer Word 22"
line.long 0x5C "D2DESB23,DECO2 Descriptor Buffer Word 23"
line.long 0x60 "D2DESB24,DECO2 Descriptor Buffer Word 24"
line.long 0x64 "D2DESB25,DECO2 Descriptor Buffer Word 25"
line.long 0x68 "D2DESB26,DECO2 Descriptor Buffer Word 26"
line.long 0x6C "D2DESB27,DECO2 Descriptor Buffer Word 27"
line.long 0x70 "D2DESB28,DECO2 Descriptor Buffer Word 28"
line.long 0x74 "D2DESB29,DECO2 Descriptor Buffer Word 29"
line.long 0x78 "D2DESB30,DECO2 Descriptor Buffer Word 30"
line.long 0x7C "D2DESB31,DECO2 Descriptor Buffer Word 31"
line.long 0x80 "D2DESB32,DECO2 Descriptor Buffer Word 32"
line.long 0x84 "D2DESB33,DECO2 Descriptor Buffer Word 33"
line.long 0x88 "D2DESB34,DECO2 Descriptor Buffer Word 34"
line.long 0x8C "D2DESB35,DECO2 Descriptor Buffer Word 35"
line.long 0x90 "D2DESB36,DECO2 Descriptor Buffer Word 36"
line.long 0x94 "D2DESB37,DECO2 Descriptor Buffer Word 37"
line.long 0x98 "D2DESB38,DECO2 Descriptor Buffer Word 38"
line.long 0x9C "D2DESB39,DECO2 Descriptor Buffer Word 39"
line.long 0xA0 "D2DESB40,DECO2 Descriptor Buffer Word 40"
line.long 0xA4 "D2DESB41,DECO2 Descriptor Buffer Word 41"
line.long 0xA8 "D2DESB42,DECO2 Descriptor Buffer Word 42"
line.long 0xAC "D2DESB43,DECO2 Descriptor Buffer Word 43"
line.long 0xB0 "D2DESB44,DECO2 Descriptor Buffer Word 44"
line.long 0xB4 "D2DESB45,DECO2 Descriptor Buffer Word 45"
line.long 0xB8 "D2DESB46,DECO2 Descriptor Buffer Word 46"
line.long 0xBC "D2DESB47,DECO2 Descriptor Buffer Word 47"
line.long 0xC0 "D2DESB48,DECO2 Descriptor Buffer Word 48"
line.long 0xC4 "D2DESB49,DECO2 Descriptor Buffer Word 49"
line.long 0xC8 "D2DESB50,DECO2 Descriptor Buffer Word 50"
line.long 0xCC "D2DESB51,DECO2 Descriptor Buffer Word 51"
line.long 0xD0 "D2DESB52,DECO2 Descriptor Buffer Word 52"
line.long 0xD4 "D2DESB53,DECO2 Descriptor Buffer Word 53"
line.long 0xD8 "D2DESB54,DECO2 Descriptor Buffer Word 54"
line.long 0xDC "D2DESB55,DECO2 Descriptor Buffer Word 55"
line.long 0xE0 "D2DESB56,DECO2 Descriptor Buffer Word 56"
line.long 0xE4 "D2DESB57,DECO2 Descriptor Buffer Word 57"
line.long 0xE8 "D2DESB58,DECO2 Descriptor Buffer Word 58"
line.long 0xEC "D2DESB59,DECO2 Descriptor Buffer Word 59"
line.long 0xF0 "D2DESB60,DECO2 Descriptor Buffer Word 60"
line.long 0xF4 "D2DESB61,DECO2 Descriptor Buffer Word 61"
line.long 0xF8 "D2DESB62,DECO2 Descriptor Buffer Word 62"
line.long 0xFC "D2DESB63,DECO2 Descriptor Buffer Word 63"
tree.end
tree "DECO3"
group.long 0xB0A00++0xFF
line.long 0x00 "D3DESB0,DECO3 Descriptor Buffer Word 0"
line.long 0x04 "D3DESB1,DECO3 Descriptor Buffer Word 1"
line.long 0x08 "D3DESB2,DECO3 Descriptor Buffer Word 2"
line.long 0x0C "D3DESB3,DECO3 Descriptor Buffer Word 3"
line.long 0x10 "D3DESB4,DECO3 Descriptor Buffer Word 4"
line.long 0x14 "D3DESB5,DECO3 Descriptor Buffer Word 5"
line.long 0x18 "D3DESB6,DECO3 Descriptor Buffer Word 6"
line.long 0x1C "D3DESB7,DECO3 Descriptor Buffer Word 7"
line.long 0x20 "D3DESB8,DECO3 Descriptor Buffer Word 8"
line.long 0x24 "D3DESB9,DECO3 Descriptor Buffer Word 9"
line.long 0x28 "D3DESB10,DECO3 Descriptor Buffer Word 10"
line.long 0x2C "D3DESB11,DECO3 Descriptor Buffer Word 11"
line.long 0x30 "D3DESB12,DECO3 Descriptor Buffer Word 12"
line.long 0x34 "D3DESB13,DECO3 Descriptor Buffer Word 13"
line.long 0x38 "D3DESB14,DECO3 Descriptor Buffer Word 14"
line.long 0x3C "D3DESB15,DECO3 Descriptor Buffer Word 15"
line.long 0x40 "D3DESB16,DECO3 Descriptor Buffer Word 16"
line.long 0x44 "D3DESB17,DECO3 Descriptor Buffer Word 17"
line.long 0x48 "D3DESB18,DECO3 Descriptor Buffer Word 18"
line.long 0x4C "D3DESB19,DECO3 Descriptor Buffer Word 19"
line.long 0x50 "D3DESB20,DECO3 Descriptor Buffer Word 20"
line.long 0x54 "D3DESB21,DECO3 Descriptor Buffer Word 21"
line.long 0x58 "D3DESB22,DECO3 Descriptor Buffer Word 22"
line.long 0x5C "D3DESB23,DECO3 Descriptor Buffer Word 23"
line.long 0x60 "D3DESB24,DECO3 Descriptor Buffer Word 24"
line.long 0x64 "D3DESB25,DECO3 Descriptor Buffer Word 25"
line.long 0x68 "D3DESB26,DECO3 Descriptor Buffer Word 26"
line.long 0x6C "D3DESB27,DECO3 Descriptor Buffer Word 27"
line.long 0x70 "D3DESB28,DECO3 Descriptor Buffer Word 28"
line.long 0x74 "D3DESB29,DECO3 Descriptor Buffer Word 29"
line.long 0x78 "D3DESB30,DECO3 Descriptor Buffer Word 30"
line.long 0x7C "D3DESB31,DECO3 Descriptor Buffer Word 31"
line.long 0x80 "D3DESB32,DECO3 Descriptor Buffer Word 32"
line.long 0x84 "D3DESB33,DECO3 Descriptor Buffer Word 33"
line.long 0x88 "D3DESB34,DECO3 Descriptor Buffer Word 34"
line.long 0x8C "D3DESB35,DECO3 Descriptor Buffer Word 35"
line.long 0x90 "D3DESB36,DECO3 Descriptor Buffer Word 36"
line.long 0x94 "D3DESB37,DECO3 Descriptor Buffer Word 37"
line.long 0x98 "D3DESB38,DECO3 Descriptor Buffer Word 38"
line.long 0x9C "D3DESB39,DECO3 Descriptor Buffer Word 39"
line.long 0xA0 "D3DESB40,DECO3 Descriptor Buffer Word 40"
line.long 0xA4 "D3DESB41,DECO3 Descriptor Buffer Word 41"
line.long 0xA8 "D3DESB42,DECO3 Descriptor Buffer Word 42"
line.long 0xAC "D3DESB43,DECO3 Descriptor Buffer Word 43"
line.long 0xB0 "D3DESB44,DECO3 Descriptor Buffer Word 44"
line.long 0xB4 "D3DESB45,DECO3 Descriptor Buffer Word 45"
line.long 0xB8 "D3DESB46,DECO3 Descriptor Buffer Word 46"
line.long 0xBC "D3DESB47,DECO3 Descriptor Buffer Word 47"
line.long 0xC0 "D3DESB48,DECO3 Descriptor Buffer Word 48"
line.long 0xC4 "D3DESB49,DECO3 Descriptor Buffer Word 49"
line.long 0xC8 "D3DESB50,DECO3 Descriptor Buffer Word 50"
line.long 0xCC "D3DESB51,DECO3 Descriptor Buffer Word 51"
line.long 0xD0 "D3DESB52,DECO3 Descriptor Buffer Word 52"
line.long 0xD4 "D3DESB53,DECO3 Descriptor Buffer Word 53"
line.long 0xD8 "D3DESB54,DECO3 Descriptor Buffer Word 54"
line.long 0xDC "D3DESB55,DECO3 Descriptor Buffer Word 55"
line.long 0xE0 "D3DESB56,DECO3 Descriptor Buffer Word 56"
line.long 0xE4 "D3DESB57,DECO3 Descriptor Buffer Word 57"
line.long 0xE8 "D3DESB58,DECO3 Descriptor Buffer Word 58"
line.long 0xEC "D3DESB59,DECO3 Descriptor Buffer Word 59"
line.long 0xF0 "D3DESB60,DECO3 Descriptor Buffer Word 60"
line.long 0xF4 "D3DESB61,DECO3 Descriptor Buffer Word 61"
line.long 0xF8 "D3DESB62,DECO3 Descriptor Buffer Word 62"
line.long 0xFC "D3DESB63,DECO3 Descriptor Buffer Word 63"
tree.end
tree "DECO4"
group.long 0xC0A00++0xFF
line.long 0x00 "D4DESB0,DECO4 Descriptor Buffer Word 0"
line.long 0x04 "D4DESB1,DECO4 Descriptor Buffer Word 1"
line.long 0x08 "D4DESB2,DECO4 Descriptor Buffer Word 2"
line.long 0x0C "D4DESB3,DECO4 Descriptor Buffer Word 3"
line.long 0x10 "D4DESB4,DECO4 Descriptor Buffer Word 4"
line.long 0x14 "D4DESB5,DECO4 Descriptor Buffer Word 5"
line.long 0x18 "D4DESB6,DECO4 Descriptor Buffer Word 6"
line.long 0x1C "D4DESB7,DECO4 Descriptor Buffer Word 7"
line.long 0x20 "D4DESB8,DECO4 Descriptor Buffer Word 8"
line.long 0x24 "D4DESB9,DECO4 Descriptor Buffer Word 9"
line.long 0x28 "D4DESB10,DECO4 Descriptor Buffer Word 10"
line.long 0x2C "D4DESB11,DECO4 Descriptor Buffer Word 11"
line.long 0x30 "D4DESB12,DECO4 Descriptor Buffer Word 12"
line.long 0x34 "D4DESB13,DECO4 Descriptor Buffer Word 13"
line.long 0x38 "D4DESB14,DECO4 Descriptor Buffer Word 14"
line.long 0x3C "D4DESB15,DECO4 Descriptor Buffer Word 15"
line.long 0x40 "D4DESB16,DECO4 Descriptor Buffer Word 16"
line.long 0x44 "D4DESB17,DECO4 Descriptor Buffer Word 17"
line.long 0x48 "D4DESB18,DECO4 Descriptor Buffer Word 18"
line.long 0x4C "D4DESB19,DECO4 Descriptor Buffer Word 19"
line.long 0x50 "D4DESB20,DECO4 Descriptor Buffer Word 20"
line.long 0x54 "D4DESB21,DECO4 Descriptor Buffer Word 21"
line.long 0x58 "D4DESB22,DECO4 Descriptor Buffer Word 22"
line.long 0x5C "D4DESB23,DECO4 Descriptor Buffer Word 23"
line.long 0x60 "D4DESB24,DECO4 Descriptor Buffer Word 24"
line.long 0x64 "D4DESB25,DECO4 Descriptor Buffer Word 25"
line.long 0x68 "D4DESB26,DECO4 Descriptor Buffer Word 26"
line.long 0x6C "D4DESB27,DECO4 Descriptor Buffer Word 27"
line.long 0x70 "D4DESB28,DECO4 Descriptor Buffer Word 28"
line.long 0x74 "D4DESB29,DECO4 Descriptor Buffer Word 29"
line.long 0x78 "D4DESB30,DECO4 Descriptor Buffer Word 30"
line.long 0x7C "D4DESB31,DECO4 Descriptor Buffer Word 31"
line.long 0x80 "D4DESB32,DECO4 Descriptor Buffer Word 32"
line.long 0x84 "D4DESB33,DECO4 Descriptor Buffer Word 33"
line.long 0x88 "D4DESB34,DECO4 Descriptor Buffer Word 34"
line.long 0x8C "D4DESB35,DECO4 Descriptor Buffer Word 35"
line.long 0x90 "D4DESB36,DECO4 Descriptor Buffer Word 36"
line.long 0x94 "D4DESB37,DECO4 Descriptor Buffer Word 37"
line.long 0x98 "D4DESB38,DECO4 Descriptor Buffer Word 38"
line.long 0x9C "D4DESB39,DECO4 Descriptor Buffer Word 39"
line.long 0xA0 "D4DESB40,DECO4 Descriptor Buffer Word 40"
line.long 0xA4 "D4DESB41,DECO4 Descriptor Buffer Word 41"
line.long 0xA8 "D4DESB42,DECO4 Descriptor Buffer Word 42"
line.long 0xAC "D4DESB43,DECO4 Descriptor Buffer Word 43"
line.long 0xB0 "D4DESB44,DECO4 Descriptor Buffer Word 44"
line.long 0xB4 "D4DESB45,DECO4 Descriptor Buffer Word 45"
line.long 0xB8 "D4DESB46,DECO4 Descriptor Buffer Word 46"
line.long 0xBC "D4DESB47,DECO4 Descriptor Buffer Word 47"
line.long 0xC0 "D4DESB48,DECO4 Descriptor Buffer Word 48"
line.long 0xC4 "D4DESB49,DECO4 Descriptor Buffer Word 49"
line.long 0xC8 "D4DESB50,DECO4 Descriptor Buffer Word 50"
line.long 0xCC "D4DESB51,DECO4 Descriptor Buffer Word 51"
line.long 0xD0 "D4DESB52,DECO4 Descriptor Buffer Word 52"
line.long 0xD4 "D4DESB53,DECO4 Descriptor Buffer Word 53"
line.long 0xD8 "D4DESB54,DECO4 Descriptor Buffer Word 54"
line.long 0xDC "D4DESB55,DECO4 Descriptor Buffer Word 55"
line.long 0xE0 "D4DESB56,DECO4 Descriptor Buffer Word 56"
line.long 0xE4 "D4DESB57,DECO4 Descriptor Buffer Word 57"
line.long 0xE8 "D4DESB58,DECO4 Descriptor Buffer Word 58"
line.long 0xEC "D4DESB59,DECO4 Descriptor Buffer Word 59"
line.long 0xF0 "D4DESB60,DECO4 Descriptor Buffer Word 60"
line.long 0xF4 "D4DESB61,DECO4 Descriptor Buffer Word 61"
line.long 0xF8 "D4DESB62,DECO4 Descriptor Buffer Word 62"
line.long 0xFC "D4DESB63,DECO4 Descriptor Buffer Word 63"
tree.end
tree "DECO5"
group.long 0xD0A00++0xFF
line.long 0x00 "D5DESB0,DECO5 Descriptor Buffer Word 0"
line.long 0x04 "D5DESB1,DECO5 Descriptor Buffer Word 1"
line.long 0x08 "D5DESB2,DECO5 Descriptor Buffer Word 2"
line.long 0x0C "D5DESB3,DECO5 Descriptor Buffer Word 3"
line.long 0x10 "D5DESB4,DECO5 Descriptor Buffer Word 4"
line.long 0x14 "D5DESB5,DECO5 Descriptor Buffer Word 5"
line.long 0x18 "D5DESB6,DECO5 Descriptor Buffer Word 6"
line.long 0x1C "D5DESB7,DECO5 Descriptor Buffer Word 7"
line.long 0x20 "D5DESB8,DECO5 Descriptor Buffer Word 8"
line.long 0x24 "D5DESB9,DECO5 Descriptor Buffer Word 9"
line.long 0x28 "D5DESB10,DECO5 Descriptor Buffer Word 10"
line.long 0x2C "D5DESB11,DECO5 Descriptor Buffer Word 11"
line.long 0x30 "D5DESB12,DECO5 Descriptor Buffer Word 12"
line.long 0x34 "D5DESB13,DECO5 Descriptor Buffer Word 13"
line.long 0x38 "D5DESB14,DECO5 Descriptor Buffer Word 14"
line.long 0x3C "D5DESB15,DECO5 Descriptor Buffer Word 15"
line.long 0x40 "D5DESB16,DECO5 Descriptor Buffer Word 16"
line.long 0x44 "D5DESB17,DECO5 Descriptor Buffer Word 17"
line.long 0x48 "D5DESB18,DECO5 Descriptor Buffer Word 18"
line.long 0x4C "D5DESB19,DECO5 Descriptor Buffer Word 19"
line.long 0x50 "D5DESB20,DECO5 Descriptor Buffer Word 20"
line.long 0x54 "D5DESB21,DECO5 Descriptor Buffer Word 21"
line.long 0x58 "D5DESB22,DECO5 Descriptor Buffer Word 22"
line.long 0x5C "D5DESB23,DECO5 Descriptor Buffer Word 23"
line.long 0x60 "D5DESB24,DECO5 Descriptor Buffer Word 24"
line.long 0x64 "D5DESB25,DECO5 Descriptor Buffer Word 25"
line.long 0x68 "D5DESB26,DECO5 Descriptor Buffer Word 26"
line.long 0x6C "D5DESB27,DECO5 Descriptor Buffer Word 27"
line.long 0x70 "D5DESB28,DECO5 Descriptor Buffer Word 28"
line.long 0x74 "D5DESB29,DECO5 Descriptor Buffer Word 29"
line.long 0x78 "D5DESB30,DECO5 Descriptor Buffer Word 30"
line.long 0x7C "D5DESB31,DECO5 Descriptor Buffer Word 31"
line.long 0x80 "D5DESB32,DECO5 Descriptor Buffer Word 32"
line.long 0x84 "D5DESB33,DECO5 Descriptor Buffer Word 33"
line.long 0x88 "D5DESB34,DECO5 Descriptor Buffer Word 34"
line.long 0x8C "D5DESB35,DECO5 Descriptor Buffer Word 35"
line.long 0x90 "D5DESB36,DECO5 Descriptor Buffer Word 36"
line.long 0x94 "D5DESB37,DECO5 Descriptor Buffer Word 37"
line.long 0x98 "D5DESB38,DECO5 Descriptor Buffer Word 38"
line.long 0x9C "D5DESB39,DECO5 Descriptor Buffer Word 39"
line.long 0xA0 "D5DESB40,DECO5 Descriptor Buffer Word 40"
line.long 0xA4 "D5DESB41,DECO5 Descriptor Buffer Word 41"
line.long 0xA8 "D5DESB42,DECO5 Descriptor Buffer Word 42"
line.long 0xAC "D5DESB43,DECO5 Descriptor Buffer Word 43"
line.long 0xB0 "D5DESB44,DECO5 Descriptor Buffer Word 44"
line.long 0xB4 "D5DESB45,DECO5 Descriptor Buffer Word 45"
line.long 0xB8 "D5DESB46,DECO5 Descriptor Buffer Word 46"
line.long 0xBC "D5DESB47,DECO5 Descriptor Buffer Word 47"
line.long 0xC0 "D5DESB48,DECO5 Descriptor Buffer Word 48"
line.long 0xC4 "D5DESB49,DECO5 Descriptor Buffer Word 49"
line.long 0xC8 "D5DESB50,DECO5 Descriptor Buffer Word 50"
line.long 0xCC "D5DESB51,DECO5 Descriptor Buffer Word 51"
line.long 0xD0 "D5DESB52,DECO5 Descriptor Buffer Word 52"
line.long 0xD4 "D5DESB53,DECO5 Descriptor Buffer Word 53"
line.long 0xD8 "D5DESB54,DECO5 Descriptor Buffer Word 54"
line.long 0xDC "D5DESB55,DECO5 Descriptor Buffer Word 55"
line.long 0xE0 "D5DESB56,DECO5 Descriptor Buffer Word 56"
line.long 0xE4 "D5DESB57,DECO5 Descriptor Buffer Word 57"
line.long 0xE8 "D5DESB58,DECO5 Descriptor Buffer Word 58"
line.long 0xEC "D5DESB59,DECO5 Descriptor Buffer Word 59"
line.long 0xF0 "D5DESB60,DECO5 Descriptor Buffer Word 60"
line.long 0xF4 "D5DESB61,DECO5 Descriptor Buffer Word 61"
line.long 0xF8 "D5DESB62,DECO5 Descriptor Buffer Word 62"
line.long 0xFC "D5DESB63,DECO5 Descriptor Buffer Word 63"
tree.end
tree.end
newline
rgroup.long 0x80E00++0x07
line.long 0x00 "D0DJR,DECO0 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D0DDR,DECO0 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0x80E00+0x08)++0x0F
line.quad 0x00 "D0DJP,DECO0 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D0SDP,DECO0 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0x80E00+0x18)++0x07
line.long 0x00 "D0DIR_MS,DECO0 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D0DIR_LS,DECO0 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0x80E00+0x20)++0x1B
line.long 0x00 "SOL0,Sequence Output Length Register 0"
line.long 0x04 "VSOL0,Variable Sequence Output Length Register 0"
line.long 0x08 "SIL0,Sequence Input Length Register 0"
line.long 0x0C "VSIL0,Variable Sequence Input Length Register 0"
line.long 0x10 "D0POVRD,Protocol Override Register 0"
line.long 0x14 "UVSOL0,Variable Sequence Output Length Register 0; Upper 32 Bits"
line.long 0x18 "UVSIL0,Variable Sequence Input Length Register 0; Upper 32 Bits"
else
hgroup.long (0x80E00+0x20)++0x03
hide.long 0x00 "SOL0,Sequence Output Length Register 0"
hgroup.long (0x80E00+0x24)++0x03
hide.long 0x00 "VSOL0,Variable Sequence Output Length Register 0"
hgroup.long (0x80E00+0x28)++0x03
hide.long 0x00 "SIL0,Sequence Input Length Register 0"
hgroup.long (0x80E00+0x2C)++0x03
hide.long 0x00 "VSIL0,Variable Sequence Input Length Register 0"
hgroup.long (0x80E00+0x30)++0x03
hide.long 0x00 "D0POVRD,Protocol Override Register 0"
hgroup.long (0x80E00+0x34)++0x03
hide.long 0x00 "UVSOL0,Variable Sequence Output Length Register 0; Upper 32 Bits"
hgroup.long (0x80E00+0x38)++0x03
hide.long 0x00 "UVSIL0,Variable Sequence Input Length Register 0; Upper 32 Bits"
endif
rgroup.long 0x90E00++0x07
line.long 0x00 "D1DJR,DECO1 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D1DDR,DECO1 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0x90E00+0x08)++0x0F
line.quad 0x00 "D1DJP,DECO1 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D1SDP,DECO1 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0x90E00+0x18)++0x07
line.long 0x00 "D1DIR_MS,DECO1 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D1DIR_LS,DECO1 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0x90E00+0x20)++0x1B
line.long 0x00 "SOL1,Sequence Output Length Register 1"
line.long 0x04 "VSOL1,Variable Sequence Output Length Register 1"
line.long 0x08 "SIL1,Sequence Input Length Register 1"
line.long 0x0C "VSIL1,Variable Sequence Input Length Register 1"
line.long 0x10 "D1POVRD,Protocol Override Register 1"
line.long 0x14 "UVSOL1,Variable Sequence Output Length Register 1; Upper 32 Bits"
line.long 0x18 "UVSIL1,Variable Sequence Input Length Register 1; Upper 32 Bits"
else
hgroup.long (0x90E00+0x20)++0x03
hide.long 0x00 "SOL1,Sequence Output Length Register 1"
hgroup.long (0x90E00+0x24)++0x03
hide.long 0x00 "VSOL1,Variable Sequence Output Length Register 1"
hgroup.long (0x90E00+0x28)++0x03
hide.long 0x00 "SIL1,Sequence Input Length Register 1"
hgroup.long (0x90E00+0x2C)++0x03
hide.long 0x00 "VSIL1,Variable Sequence Input Length Register 1"
hgroup.long (0x90E00+0x30)++0x03
hide.long 0x00 "D1POVRD,Protocol Override Register 1"
hgroup.long (0x90E00+0x34)++0x03
hide.long 0x00 "UVSOL1,Variable Sequence Output Length Register 1; Upper 32 Bits"
hgroup.long (0x90E00+0x38)++0x03
hide.long 0x00 "UVSIL1,Variable Sequence Input Length Register 1; Upper 32 Bits"
endif
rgroup.long 0xA0E00++0x07
line.long 0x00 "D2DJR,DECO2 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D2DDR,DECO2 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0xA0E00+0x08)++0x0F
line.quad 0x00 "D2DJP,DECO2 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D2SDP,DECO2 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0xA0E00+0x18)++0x07
line.long 0x00 "D2DIR_MS,DECO2 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D2DIR_LS,DECO2 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0xA0E00+0x20)++0x1B
line.long 0x00 "SOL2,Sequence Output Length Register 2"
line.long 0x04 "VSOL2,Variable Sequence Output Length Register 2"
line.long 0x08 "SIL2,Sequence Input Length Register 2"
line.long 0x0C "VSIL2,Variable Sequence Input Length Register 2"
line.long 0x10 "D2POVRD,Protocol Override Register 2"
line.long 0x14 "UVSOL2,Variable Sequence Output Length Register 2; Upper 32 Bits"
line.long 0x18 "UVSIL2,Variable Sequence Input Length Register 2; Upper 32 Bits"
else
hgroup.long (0xA0E00+0x20)++0x03
hide.long 0x00 "SOL2,Sequence Output Length Register 2"
hgroup.long (0xA0E00+0x24)++0x03
hide.long 0x00 "VSOL2,Variable Sequence Output Length Register 2"
hgroup.long (0xA0E00+0x28)++0x03
hide.long 0x00 "SIL2,Sequence Input Length Register 2"
hgroup.long (0xA0E00+0x2C)++0x03
hide.long 0x00 "VSIL2,Variable Sequence Input Length Register 2"
hgroup.long (0xA0E00+0x30)++0x03
hide.long 0x00 "D2POVRD,Protocol Override Register 2"
hgroup.long (0xA0E00+0x34)++0x03
hide.long 0x00 "UVSOL2,Variable Sequence Output Length Register 2; Upper 32 Bits"
hgroup.long (0xA0E00+0x38)++0x03
hide.long 0x00 "UVSIL2,Variable Sequence Input Length Register 2; Upper 32 Bits"
endif
rgroup.long 0xB0E00++0x07
line.long 0x00 "D3DJR,DECO3 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D3DDR,DECO3 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0xB0E00+0x08)++0x0F
line.quad 0x00 "D3DJP,DECO3 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D3SDP,DECO3 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0xB0E00+0x18)++0x07
line.long 0x00 "D3DIR_MS,DECO3 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D3DIR_LS,DECO3 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0xB0E00+0x20)++0x1B
line.long 0x00 "SOL3,Sequence Output Length Register 3"
line.long 0x04 "VSOL3,Variable Sequence Output Length Register 3"
line.long 0x08 "SIL3,Sequence Input Length Register 3"
line.long 0x0C "VSIL3,Variable Sequence Input Length Register 3"
line.long 0x10 "D3POVRD,Protocol Override Register 3"
line.long 0x14 "UVSOL3,Variable Sequence Output Length Register 3; Upper 32 Bits"
line.long 0x18 "UVSIL3,Variable Sequence Input Length Register 3; Upper 32 Bits"
else
hgroup.long (0xB0E00+0x20)++0x03
hide.long 0x00 "SOL3,Sequence Output Length Register 3"
hgroup.long (0xB0E00+0x24)++0x03
hide.long 0x00 "VSOL3,Variable Sequence Output Length Register 3"
hgroup.long (0xB0E00+0x28)++0x03
hide.long 0x00 "SIL3,Sequence Input Length Register 3"
hgroup.long (0xB0E00+0x2C)++0x03
hide.long 0x00 "VSIL3,Variable Sequence Input Length Register 3"
hgroup.long (0xB0E00+0x30)++0x03
hide.long 0x00 "D3POVRD,Protocol Override Register 3"
hgroup.long (0xB0E00+0x34)++0x03
hide.long 0x00 "UVSOL3,Variable Sequence Output Length Register 3; Upper 32 Bits"
hgroup.long (0xB0E00+0x38)++0x03
hide.long 0x00 "UVSIL3,Variable Sequence Input Length Register 3; Upper 32 Bits"
endif
rgroup.long 0xC0E00++0x07
line.long 0x00 "D4DJR,DECO4 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D4DDR,DECO4 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0xC0E00+0x08)++0x0F
line.quad 0x00 "D4DJP,DECO4 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D4SDP,DECO4 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0xC0E00+0x18)++0x07
line.long 0x00 "D4DIR_MS,DECO4 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D4DIR_LS,DECO4 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0xC0E00+0x20)++0x1B
line.long 0x00 "SOL4,Sequence Output Length Register 4"
line.long 0x04 "VSOL4,Variable Sequence Output Length Register 4"
line.long 0x08 "SIL4,Sequence Input Length Register 4"
line.long 0x0C "VSIL4,Variable Sequence Input Length Register 4"
line.long 0x10 "D4POVRD,Protocol Override Register 4"
line.long 0x14 "UVSOL4,Variable Sequence Output Length Register 4; Upper 32 Bits"
line.long 0x18 "UVSIL4,Variable Sequence Input Length Register 4; Upper 32 Bits"
else
hgroup.long (0xC0E00+0x20)++0x03
hide.long 0x00 "SOL4,Sequence Output Length Register 4"
hgroup.long (0xC0E00+0x24)++0x03
hide.long 0x00 "VSOL4,Variable Sequence Output Length Register 4"
hgroup.long (0xC0E00+0x28)++0x03
hide.long 0x00 "SIL4,Sequence Input Length Register 4"
hgroup.long (0xC0E00+0x2C)++0x03
hide.long 0x00 "VSIL4,Variable Sequence Input Length Register 4"
hgroup.long (0xC0E00+0x30)++0x03
hide.long 0x00 "D4POVRD,Protocol Override Register 4"
hgroup.long (0xC0E00+0x34)++0x03
hide.long 0x00 "UVSOL4,Variable Sequence Output Length Register 4; Upper 32 Bits"
hgroup.long (0xC0E00+0x38)++0x03
hide.long 0x00 "UVSIL4,Variable Sequence Input Length Register 4; Upper 32 Bits"
endif
rgroup.long 0xD0E00++0x07
line.long 0x00 "D5DJR,DECO5 Debug Job"
bitfld.long 0x00 31. " STEP       ,Step" "No effect,Step"
bitfld.long 0x00 30. "     SING      ,Single step mode" "Disabled,Enabled"
bitfld.long 0x00 29. "      WHL        ,Whole descriptor" "Not occurred,Occurred"
newline
bitfld.long 0x00 28. " FOUR       ,Four words" "Less,At least"
bitfld.long 0x00 27. "      ILE       ,Immediate Little endian" "Not swapped,Swapped"
bitfld.long 0x00 24.--26. "   SHR_FROM   ,Share from" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 19. " DWS        ,Double word swap" "Not swapped,Swapped"
bitfld.long 0x00 16. "   GSD       ,Got shared descriptor" "No,Yes"
bitfld.long 0x00 15. "           AMTD       ,Allow make trusted descriptor" "Not allowed,Allowed"
newline
bitfld.long 0x00 14. " JDIS       ,Job descriptor ICID select" "Non-SEQ ICID,SEQ ICID"
bitfld.long 0x00 8.--10. "  SRC       ,Job source" "Job Ring 0,Job Ring 1,Job Ring 2,Job Ring 3,RTIC,QI,AI,?..."
bitfld.long 0x00 0.--4. "    ID         ,Job ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "D5DDR,DECO5 Debug DECO"
bitfld.long 0x04 31. " VALID      ,Valid" "Not valid,Valid"
bitfld.long 0x04 30. "     SD        ,Shared descriptor" "Not received,Received"
bitfld.long 0x04 28.--29. "  TRCT       ,DMA transaction count" "0,1,2,3"
newline
bitfld.long 0x04 20.--23. " DECO_STATE ,DECO state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 18.--19. "            PDB_WB_ST ,PDB writeback state" "0,1,2,3"
bitfld.long 0x04 16.--17. "             PDB_STALL  ,PDB stall state" "0,1,2,3"
newline
bitfld.long 0x04 15. " PTCL_RUN   ,Protocol running" "Not running,Running"
bitfld.long 0x04 14. "   NLJ       ,Took non-local JUMP" "Not occurred,Occurred"
bitfld.long 0x04 8.--13. "  CMD_INDEDX ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x04 5.--7. " CMD_STAGE  ,Command stage" "0,1,2,3,4,5,6,7"
bitfld.long 0x04 4. "             CSA       ,Command stage aux" "0,1"
bitfld.long 0x04 3. "             NC         ,No command" "No,Yes"
newline
bitfld.long 0x04 2. " BWB        ,Burster write busy" "Idle,Busy"
bitfld.long 0x04 1. "          BRB       ,Burster read busy" "Idle,Busy"
bitfld.long 0x04 0. "          CT         ,Checking trusted" "Not checking,Checking"
newline
rgroup.quad (0xD0E00+0x08)++0x0F
line.quad 0x00 "D5DJP,DECO5 Debug Job Pointer"
hexmask.quad 0x00 0.--48. 1. " JDPTR        ,Job descriptor pointer"
line.quad 0x08 "D5SDP,DECO5 Debug Shared Pointer"
hexmask.quad 0x08 0.--48. 1. " SDPTR        ,Shared descriptor pointer"
newline
rgroup.long (0xD0E00+0x18)++0x07
line.long 0x00 "D5DIR_MS,DECO5 Debug_ICID Most Significant Half"
bitfld.long 0x00 31. " DCPL  ,DECO control privilege level" "0,1"
hexmask.long.byte 0x00 16.--22. 1. "         CICID ,DECO control ICID"
bitfld.long 0x00 15. "    DOPL ,DECO output privilege level" "0,1"
newline
hexmask.long.byte 0x00 0.--6. 1. " OICID ,DECO output ICID"
line.long 0x04 "D5DIR_LS,DECO5 Debug ICID Least Significant Half"
bitfld.long 0x04 31. " TZ    ,DECO trustzone" "Disabled,Enabled"
hexmask.long.word 0x04 16.--27. 1. "  SDID  ,DECO SDID"
bitfld.long 0x04 15. "  DIPL ,DECO input privilege level" "0,1"
newline
hexmask.long.byte 0x04 0.--6. 1. " IICID ,DECO input ICID"
if (((per.l(ad:0x08000000+0x9C))&0x3F001F)==0x3F001F)
group.long (0xD0E00+0x20)++0x1B
line.long 0x00 "SOL5,Sequence Output Length Register 5"
line.long 0x04 "VSOL5,Variable Sequence Output Length Register 5"
line.long 0x08 "SIL5,Sequence Input Length Register 5"
line.long 0x0C "VSIL5,Variable Sequence Input Length Register 5"
line.long 0x10 "D5POVRD,Protocol Override Register 5"
line.long 0x14 "UVSOL5,Variable Sequence Output Length Register 5; Upper 32 Bits"
line.long 0x18 "UVSIL5,Variable Sequence Input Length Register 5; Upper 32 Bits"
else
hgroup.long (0xD0E00+0x20)++0x03
hide.long 0x00 "SOL5,Sequence Output Length Register 5"
hgroup.long (0xD0E00+0x24)++0x03
hide.long 0x00 "VSOL5,Variable Sequence Output Length Register 5"
hgroup.long (0xD0E00+0x28)++0x03
hide.long 0x00 "SIL5,Sequence Input Length Register 5"
hgroup.long (0xD0E00+0x2C)++0x03
hide.long 0x00 "VSIL5,Variable Sequence Input Length Register 5"
hgroup.long (0xD0E00+0x30)++0x03
hide.long 0x00 "D5POVRD,Protocol Override Register 5"
hgroup.long (0xD0E00+0x34)++0x03
hide.long 0x00 "UVSOL5,Variable Sequence Output Length Register 5; Upper 32 Bits"
hgroup.long (0xD0E00+0x38)++0x03
hide.long 0x00 "UVSIL5,Variable Sequence Input Length Register 5; Upper 32 Bits"
endif
width 0x0B
tree.end
tree "qDMA (Queue Direct Memory Access Controller)"
base ad:0x08380000
width 10.
if (((per.l.le(ad:0x08380000+0x04))&0x80000000)==0x00)
group.long 0x00++0x03
line.long 0x00 "DMR,DMA Mode Register"
bitfld.long 0x00 31. " SR  ,Soft reset" "No effect,Reset"
bitfld.long 0x00 30. "       DQD  ,Dequeue disable" "No,Yes"
bitfld.long 0x00 29. "                      GBT   ,Global bandwidth throttle enable" "Disabled,Enabled"
newline
sif !cpuis("LS2088A")&&!cpuis("LS2084A")&&!cpuis("LS2048A")&&!cpuis("LS2044A")
bitfld.long 0x00 28. " SO  ,Strict ordering" "Not required,Required"
newline
endif
bitfld.long 0x00 27. " PL  ,Privileged level" "Non-privileged,Privileged"
bitfld.long 0x00 24. "  HED  ,Hardware engine disable" "Two operational engines,One operational engine"
bitfld.long 0x00 20. "  DSD   ,Snoop disable for memory descriptor access" "No,Yes"
newline
bitfld.long 0x00 16. " TCD ,Throttle control disable" "No,Yes"
bitfld.long 0x00 8.--10. "             DQOS ,QoS for memory descriptor access" "Lowest,1,2,3,4,5,6,Highest"
else
group.long 0x00++0x03
line.long 0x00 "DMR,DMA Mode Register"
bitfld.long 0x00 31. " SR  ,Soft reset" "No effect,Reset"
bitfld.long 0x00 30. "       DQD  ,Dequeue disable" "No,Yes"
bitfld.long 0x00 29. "                      GBT   ,Global bandwidth throttle enable" "Disabled,Enabled"
newline
sif !cpuis("LS2088A")&&!cpuis("LS2084A")&&!cpuis("LS2048A")&&!cpuis("LS2044A")
bitfld.long 0x00 28. " SO  ,Strict ordering" "Not required,Required"
newline
endif
bitfld.long 0x00 27. " PL  ,Privileged level" "Non-privileged,Privileged"
rbitfld.long 0x00 24. "  HED  ,Hardware engine disable" "Two operational engines,One operational engine"
bitfld.long 0x00 20. "  DSD   ,Snoop disable for memory descriptor access" "No,Yes"
newline
bitfld.long 0x00 16. " TCD ,Throttle control disable" "No,Yes"
bitfld.long 0x00 8.--10. "             DQOS ,QoS for memory descriptor access" "Lowest,1,2,3,4,5,6,Highest"
endif
rgroup.long 0x04++0x03
line.long 0x00 "DSR_P,DMA Status Register"
bitfld.long 0x00 31. " DB  ,DMA busy" "Idle,Busy"
sif !cpuis("LS2088A")&&!cpuis("LS2084A")&&!cpuis("LS2048A")&&!cpuis("LS2044A")
group.long 0x14++0x03
line.long 0x00 "DLAMQR,DMA Legacy Access Management Qualifier Register"
bitfld.long 0x00 31. " VA  ,Virtual address" "Physical,Virtual"
bitfld.long 0x00 30. "        BMT  ,Bypass memory translation" "Not bypassed,Bypassed"
hexmask.long.word 0x00 0.--14. 1. "             ICID  ,Isolation context ID for data transactions issued in legacy mode"
endif
group.long 0x40++0x03
line.long 0x00 "DLPFR,DMA Logical Partition Flush Register"
bitfld.long 0x00 30.--31. " FM  ,Flush mode" "Disabled,ICID match,?..."
hexmask.long.word 0x00 0.--14. 1. "      ICID ,Isolation context ID"
rgroup.long 0x10004++0x03
line.long 0x00 "DSR_M,DMA Status Register"
bitfld.long 0x00 31. " DB  ,DMA busy" "Idle,Busy"
group.long 0x10040++0x07
line.long 0x00 "DGBTR,DMA Global Bandwidth Throttle Register"
bitfld.long 0x00 16.--19. " TBC ,Token bucket capacity" ",,,,,,,,256 bytes,512 bytes,1K bytes,2K bytes,4K bytes,?..."
bitfld.long 0x00 8.--10. "       MULT ,Token addition rate multiplier" "1,2,4,8,16,32,64,128"
bitfld.long 0x00 0.--2. "                      SCALE ,Token addition rate scaler" "1,2,4,8,16,32,64,128"
newline
line.long 0x04 "DDPCR,DMA Debug Port Control Register"
bitfld.long 0x04 16.--17. " PMPC ,Performance monitor port control" "0,1,2,3"
newline
sif cpuis("LS2088A")||cpuis("LS2084A")||cpuis("LS2048A")||cpuis("LS2044A")
bitfld.long 0x04 0.--4. " DDPC ,Descriptor prefetch" "AXI address read ch.,AXI read data ch. bits 127-0,AXI read data ch. bits 255-128,,,Internal state,,Engine 0 AXI address read ch.,Engine 0 AXI address write ch.,Engine 0 AXI read data ch. bits 127-0,Engine 0 AXI read data ch. bits 255-128,Engine 0 AXI write data ch. bits 127-0,Engine 0 AXI write data ch. bits 255-128,Internal state,Engine 1 AXI address read ch.,Engine 1 AXI address write ch.,Engine 1 AXI read data ch. bits 127-0,Engine 1 AXI read data ch. bits 255-128,Engine 1 AXI write data ch. bits 127-0,Engine 1 AXI write data ch. bits 255-128,?..."
else
bitfld.long 0x04 0.--4. " DDPC ,Descriptor prefetch" "AXI address read ch.,AXI read data ch. bits 127-0,AXI read data ch. bits 255-128,,,Internal state,Engine 0 AXI address read ch.,Engine 0 AXI address write ch.,Engine 0 AXI read data ch. bits 127-0,Engine 0 AXI read data ch. bits 255-128,Engine 0 AXI write data ch. bits 127-0,Engine 0 AXI write data ch. bits 255-128,Internal state,Engine 1 AXI address read ch.,Engine 1 AXI address write ch.,Engine 1 AXI read data ch. bits 127-0,Engine 1 AXI read data ch. bits 255-128,Engine 1 AXI write data ch. bits 127-0,Engine 1 AXI write data ch. bits 255-128,?..."
endif
newline
sif !cpuis("LS2088A")&&!cpuis("LS2084A")&&!cpuis("LS2048A")&&!cpuis("LS2044A")
if (((per.l.le(ad:0x08380000+0x10100))&0x40000)==0x40000)
group.long 0x10100++0x03
line.long 0x00 "DLMR,DMA Legacy Mode Register"
bitfld.long 0x00 24.--27. " PC    ,Indicates how many bytes are allowed to transfer before pausing the channel" "1 byte,2 bytes,4 bytes,8 bytes,16 bytes,32 bytes,64 bytes,128 bytes,256 bytes,512 bytes,1024 bytes,,,,,Disabled"
newline
bitfld.long 0x00 21. " EMP   ,External master pause mode" "Disabled,Enabled"
bitfld.long 0x00 18. "    EMC   ,External master control" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes"
bitfld.long 0x00 14.--15. "     SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes"
bitfld.long 0x00 13. "       DAHE  ,Destination address hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. " SAHE  ,Source address hold enable" "Disabled,Enabled"
bitfld.long 0x00 10. "    SRW   ,Single register write" "Normal,Enabled"
bitfld.long 0x00 9. "       EOSIE ,End-of-segments interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " EIE   ,Error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 4. "    SWSM  ,Single write start mode" "Source,Destination"
bitfld.long 0x00 0. "   CS    ,Channel start" "Halted,Started"
else
group.long 0x10100++0x03
line.long 0x00 "DLMR,DMA Legacy Mode Register"
bitfld.long 0x00 21. " EMP   ,External master pause mode" "Disabled,Enabled"
bitfld.long 0x00 18. "    EMC   ,External master control" "Disabled,Enabled"
newline
bitfld.long 0x00 16.--17. " DAHTS ,Destination address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes"
bitfld.long 0x00 14.--15. "     SAHTS ,Source address hold transfer size" "1 byte,2 bytes,4 bytes,8 bytes"
bitfld.long 0x00 13. "       DAHE  ,Destination address hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 12. " SAHE  ,Source address hold enable" "Disabled,Enabled"
bitfld.long 0x00 10. "    SRW   ,Single register write" "Normal,Enabled"
bitfld.long 0x00 9. "       EOSIE ,End-of-segments interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " EIE   ,Error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 4. "    SWSM  ,Single write start mode" "Source,Destination"
bitfld.long 0x00 0. "   CS    ,Channel start" "Halted,Started"
endif
group.long 0x10104++0x03
line.long 0x00 "DLSR,DMA Legacy Status Register"
eventfld.long 0x00 7. " TE    ,Transfer error" "No error,Error"
rbitfld.long 0x00 5. "    CH    ,Channel halted" "Not halted,Halted"
eventfld.long 0x00 4. "    PE    ,Programming error" "No error,Error"
newline
rbitfld.long 0x00 2. " CB    ,Channel busy" "Idle,Busy"
eventfld.long 0x00 1. "        EOSI  ,End-of-segment interrupt" "No interrupt,Interrupt"
newline
group.long 0x10110++0x13
line.long 0x00 "DLSATR,DMA Legacy Source Attributes Register"
bitfld.long 0x00 16.--19. " SRTTYPE ,DMA source transaction type" "Non-cacheable non-coherent register space access,Non-cacheable non-coherent register space access,Non-coherent copy of cacheable memory,Non-coherent copy of cacheable memory,,,Coherent copy of cacheable memory allocated to in-line cache,Coherent copy of cacheable memory allocated to in-line cache,,,Coherent copy of cacheable memory,Coherent copy of cacheable memory,?..."
newline
hexmask.long.word 0x00 0.--15. 0x01 " ESAD    ,Represents address bits 47-32 of a 49-bit source address"
line.long 0x04 "DLSAR,DMA Legacy Source Address Register"
line.long 0x08 "DLDATR,DMA Legacy Destination Attributes Register"
bitfld.long 0x08 30. " NLWR    ,No last write with response" "Write-with-response,Write-without-response"
newline
bitfld.long 0x08 16.--19. " DWTTYPE ,DMA destination transaction type" "Non-cacheable non-coherent/register space access,Non-cacheable non-coherent/register space access,Non-coherent copy of cacheable memory,Non-coherent copy of cacheable memory,,,Coherent copy of cacheable memory,Coherent copy of cacheable memory,,,Coherent copy of cacheable memory allocated to in-line cache,Coherent copy of cacheable memory allocated to in-line cache,,,Coherent copy of cacheable memory allocated to in-line cache,Coherent copy of cacheable memory allocated to in-line cache"
newline
hexmask.long.word 0x08 0.--15. 0x01 " EDAD    ,Extended destination address"
line.long 0x0C "DLDAR,DMA Legacy Destination Address Register"
line.long 0x10 "DLBCR,DMA Legacy Byte Count Register"
group.long 0x10148++0x07
line.long 0x00 "DLESAD,DMA Legacy Extended Source Address Register"
bitfld.long 0x00 0. " ESAD    ,Represents bit 48 of the 49-bit source address" "0,1"
line.long 0x04 "DLEDAD,DMA Legacy Extended Destination Address Register"
bitfld.long 0x04 0. " EDAD    ,Represents bit 48 of the 49-bit destination address" "0,1"
endif
newline
rgroup.long 0x10BF8++0x07
line.long 0x00 "IPBRR0,IP Block Revision Register 0"
hexmask.long.word 0x00 16.--31. 1. " IP_ID       ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "       IP_MJ  ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "        IP_MN ,Minor revision"
line.long 0x04 "IPBRR1,IP Block Revision Register 1"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT      ,IP block integration options"
hexmask.long.byte 0x04 8.--15. 1. "         IP_MNT ,IP block maintenance version"
newline
bitfld.long 0x04 6.--7. " IP_CFG[7:6] ,DMA engines count" "1 engine,2 engines,4 engines,8 engines"
sif !cpuis("LS208*")&&!cpuis("LS204*")
bitfld.long 0x04 4.--5. " IP_CFG[4:5] ,Legacy mode capable DMA engines" "1 engine,2 engines,4 engines,?..."
endif
group.long 0x10E00++0x07
line.long 0x00 "DEIER,DMA Error Interrupt Enable Register"
bitfld.long 0x00 31. " MEIE        ,Multiple error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 30. "   SBEIE  ,System bus error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 29. "  FDEIE ,Frame descriptor error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 28. " FSEIE       ,Frame size error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 27. "   SDEIE  ,Source descriptor error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 26. "  DDEIE ,Destination descriptor error interrupt enable" "Disabled,Enabled"
line.long 0x04 "DEDR,DMA Error Detect Register"
eventfld.long 0x04 31. " ME          ,Multiple errors of the same type" "No error,Error"
eventfld.long 0x04 30. "   SBE    ,System bus error" "No error,Error"
eventfld.long 0x04 29. "  FDE   ,Frame descriptor or frame format error" "No error,Error"
newline
eventfld.long 0x04 28. " FSE         ,Frame size error" "No error,Error"
eventfld.long 0x04 27. "   SDE    ,Source descriptor error" "No error,Error"
eventfld.long 0x04 26. "  DDE   ,Destination descriptor error" "No error,Error"
rgroup.long 0x10E10++0x03
line.long 0x00 "DECFDW0R,DMA Error Capture Descriptor Word 0 Register"
rgroup.long 0x10E14++0x03
line.long 0x00 "DECFDW1R,DMA Error Capture Descriptor Word 1 Register"
rgroup.long 0x10E18++0x03
line.long 0x00 "DECFDW2R,DMA Error Capture Descriptor Word 2 Register"
rgroup.long 0x10E1C++0x03
line.long 0x00 "DECFDW3R,DMA Error Capture Descriptor Word 3 Register"
rgroup.long 0x10E20++0x03
line.long 0x00 "DECFDW4R,DMA Error Capture Descriptor Word 4 Register"
rgroup.long 0x10E24++0x03
line.long 0x00 "DECFDW5R,DMA Error Capture Descriptor Word 5 Register"
rgroup.long 0x10E28++0x03
line.long 0x00 "DECFDW6R,DMA Error Capture Descriptor Word 6 Register"
rgroup.long 0x10E2C++0x03
line.long 0x00 "DECFDW7R,DMA Error Capture Descriptor Word 7 Register"
rgroup.long 0x10E30++0x07
line.long 0x00 "DECFQIDR,DMA Error Capture Frame Queue ID Register"
hexmask.long.tbyte 0x00 0.--23. 1. " FQID        ,Frame queue ID"
line.long 0x04 "DECBR,DMA Error Capture Byte Count Register"
width 0x0B
tree.end
tree "PME (Pattern Matching Engine)"
base ad:0x08160000
width 14.
tree "Pattern Matcher Frame Agent Control Registers"
group.long 0x00++0x0F
line.long 0x00 "ISR,Interrupt Status Register"
eventfld.long 0x00 24. " SBE                  ,Single bit error" "No error,Error"
eventfld.long 0x00 23. "                DBE               ,Double bit error" "No error,Error"
eventfld.long 0x00 8. "                PME    ,Pattern matching error" "No error,Error"
line.long 0x04 "IER,Interrupt Enable Register"
bitfld.long 0x04 24. " SBE                  ,Single bit error enable" "Disabled,Enabled"
bitfld.long 0x04 23. "                DBE               ,Double bit error enable" "Disabled,Enabled"
bitfld.long 0x04 8. "                PME    ,Pattern matching error enable" "Disabled,Enabled"
line.long 0x08 "ISDR,Interrupt Status Disable Register"
bitfld.long 0x08 24. " SBE                  ,Single bit error disable" "Enabled,Disabled"
bitfld.long 0x08 23. "                DBE               ,Double bit error disable" "Enabled,Disabled"
bitfld.long 0x08 8. "                PME    ,Pattern matching error disable" "Enabled,Disabled"
line.long 0x0C "IIR,Interrupt Inhibit Register"
bitfld.long 0x0C 0. " I                    ,Inhibit" "Not inhibited,Inhibited"
wgroup.long 0x10++0x03
line.long 0x00 "IFR,Interrupt Force Register"
bitfld.long 0x00 24. " SBE                  ,Single bit error" "No effect,Interrupt"
bitfld.long 0x00 23. "               DBE               ,Double bit error" "No effect,Interrupt"
bitfld.long 0x00 8. "               PME    ,Pattern matcher interrupt status force" "No effect,Interrupt"
group.long 0x14++0x03
line.long 0x00 "RLL,Report Length Limit"
hexmask.long.word 0x00 0.--15. 1. " LIMIT                ,Limit"
group.long 0x18++0x03
line.long 0x00 "CDCR,Caching Disable Control Register"
bitfld.long 0x00 9. " SRC                  ,Stateful rule context prevents the SRE from caching any stateful rule context table entries" "Disabled,Enabled"
bitfld.long 0x00 6. "                PDSR              ,Pattern description and stateful rule prevents the DXE from caching any pattern description and stateful rule table entries" "Disabled,Enabled"
bitfld.long 0x00 3. "                FC     ,Flow context prevents the PMFA from caching any flow context entries" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " RES                  ,Residue prevents the PMFA from caching any residue data" "Disabled,Enabled"
newline
hgroup.long 0x24++0x03
hide.long 0x00 "TRUNCI,Output Truncated Incidence Counter"
in
hgroup.long 0x28++0x03
hide.long 0x00 "RBC,Read Byte Counter"
in
newline
group.long 0x2C++0x03
line.long 0x00 "ESR,Error Status Register"
hexmask.long.byte 0x00 0.--7. 1. " ERR                  ,Status code"
rgroup.long 0x30++0x07
line.long 0x00 "ECR0,Error Capture Register 0"
line.long 0x04 "ECR1,Error Capture Register 1"
group.long 0x4C++0x03
line.long 0x00 "EFQICID,Exclusive Frame Queue ICID"
bitfld.long 0x00 15. " BDI                  ,Bypass datapath isolation" "0,1"
hexmask.long.word 0x00 0.--14. 1. "                       ICID              ,Isolation context ID"
group.long 0x50++0x07
line.long 0x00 "EFQC,Exclusive Frame Queue Control"
bitfld.long 0x00 31. " EN                   ,Enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "                INT               ,Interval" "No delay,64 cycles,128 cycles,256 cycles,512 cycles,?..."
hexmask.long.tbyte 0x00 0.--23. 1. "              FQID   ,Frame queue ID"
line.long 0x04 "SRAM_ADDR,SRAM Address"
bitfld.long 0x04 31. " I                    ,Memory read data invalid" "Valid,Invalid"
bitfld.long 0x04 24.--25. "                 SS                ,SRAM select" "MEM_DXCM (160x48),,MEM_DXEM (512x176),?..."
bitfld.long 0x04 15. "      WE     ,Memory write enable" "Disabled,Enabled"
newline
hexmask.long.word 0x04 3.--14. 1. " WORD                 ,Word"
bitfld.long 0x04 0.--2. "                    OFF               ,Offset" "0,1,2,3,4,5,6,7"
rgroup.long 0x58++0x03
line.long 0x00 "SRAM_RDAT,SRAM Read Data"
group.long 0x5C++0x03
line.long 0x00 "SRAM_WDAT,SRAM Write Data"
group.long 0x60++0x03
line.long 0x00 "FACONF,Frame Agent Configuration"
bitfld.long 0x00 4. " RSVSID               ,SRAM initialization disable" "No,Yes"
bitfld.long 0x00 1. "                     EN                ,Pattern matcher enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                RST    ,Pattern matcher software reset" "No reset,Reset"
rgroup.long 0x64++0x03
line.long 0x00 "PMSTAT,Pattern Matcher Status"
bitfld.long 0x00 0. " ACT                  ,Active" "Inactive,Active"
group.long 0x68++0x07
line.long 0x00 "FAMCR,Frame Agent Memory Control Register"
bitfld.long 0x00 30. " TWP                  ,Table write priority" "Normal,Elevated"
bitfld.long 0x00 28.--29. "                TWC               ,Table write cache aware" "Non-coherent,Coherent,Coherent with stashing,?..."
newline
bitfld.long 0x00 26. " CWP                  ,Context write priority" "Normal,Elevated"
bitfld.long 0x00 24.--25. "                CWC               ,Context write cache aware" "Non-coherent,Coherent,Coherent with stashing,?..."
bitfld.long 0x00 18. "  DWP    ,Data write priority" "Normal,Elevated"
newline
bitfld.long 0x00 16.--17. " DWC                  ,Data write cache aware" "Non-coherent,Coherent,Coherent with stashing,?..."
bitfld.long 0x00 14. "  TRP               ,Table read priority" "Normal,Elevated"
bitfld.long 0x00 12.--13. "                TRC    ,Table read cache aware" "Non-coherent,Coherent,?..."
newline
bitfld.long 0x00 10. " CRP                  ,Context read priority" "Normal,Elevated"
bitfld.long 0x00 8.--9. "                CRC               ,Context read cache aware" "Non-coherent,Coherent,?..."
bitfld.long 0x00 4. "            RSVRSD ,Read safe disable" "No,Yes"
newline
bitfld.long 0x00 2. " DRP                  ,Data read priority" "Normal,Elevated"
bitfld.long 0x00 0.--1. "                DRC               ,Data read cache aware" "Non-coherent,Coherent,?..."
line.long 0x04 "PMTR,Performance Monitor Threshold Register"
hexmask.long.word 0x04 0.--15. 1. " THRESH               ,Threshold"
group.long 0x74++0x03
line.long 0x00 "PEHD,PM Error Handling Disables"
bitfld.long 0x00 9. " KCM                  ,Disables KES confidence mask error detection" "No,Yes"
bitfld.long 0x00 8. "                     KCL               ,Disables KES confidence collision limit error detection" "No,Yes"
bitfld.long 0x00 7. "                     DSR    ,Disables DXE subsequent link reverse error detection" "No,Yes"
newline
bitfld.long 0x00 6. " DBR                  ,Disables DXE pattern description and stateful rule space outrange error detection" "No,Yes"
bitfld.long 0x00 5. "                     DIL               ,Disables DXE instruction limit error detection" "No,Yes"
bitfld.long 0x00 4. "                     SIL    ,Disables SRE instruction limit error detection" "No,Yes"
newline
bitfld.long 0x00 3. " SCR                  ,Disables SRE context table outrange error detection" "No,Yes"
bitfld.long 0x00 2. "                     SSR               ,Disables SRE session context outrange error detection" "No,Yes"
bitfld.long 0x00 1. "                     SRR    ,Disables SRE pattern description and stateful rule space outrange error detection" "No,Yes"
newline
bitfld.long 0x00 0. " SRL                  ,Disables SRE reaction limit error detection" "No,Yes"
group.long 0x80++0x03
line.long 0x00 "BSC0,Buffer Size Configuration 0"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x84++0x03
line.long 0x00 "BSC1,Buffer Size Configuration 1"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x88++0x03
line.long 0x00 "BSC2,Buffer Size Configuration 2"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x8C++0x03
line.long 0x00 "BSC3,Buffer Size Configuration 3"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x90++0x03
line.long 0x00 "BSC4,Buffer Size Configuration 4"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x94++0x03
line.long 0x00 "BSC5,Buffer Size Configuration 5"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x98++0x03
line.long 0x00 "BSC6,Buffer Size Configuration 6"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0x9C++0x03
line.long 0x00 "BSC7,Buffer Size Configuration 7"
bitfld.long 0x00 28.--31. " SIZE0                ,Size for buffer pool ID 0" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 24.--27. "          SIZE1             ,Size for buffer pool ID 1" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 20.--23. "          SIZE2  ,Size for buffer pool ID 2" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 16.--19. " SIZE3                ,Size for buffer pool ID 3" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 12.--15. "          SIZE4             ,Size for buffer pool ID 4" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 8.--11. "          SIZE5  ,Size for buffer pool ID 5" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
newline
bitfld.long 0x00 4.--7. " SIZE6                ,Size for buffer pool ID 6" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
bitfld.long 0x00 0.--3. "          SIZE7             ,Size for buffer pool ID 7" "Not configured,64B,128B,256B,512B,1024B,2048B,4096B,8192B,16384B,32768B,65536B,?..."
group.long 0xE0++0x03
line.long 0x00 "QMBFD0,Queue Manager Bypass Frame Descriptor 0"
group.long 0xE4++0x03
line.long 0x00 "QMBFD1,Queue Manager Bypass Frame Descriptor 1"
group.long 0xE8++0x03
line.long 0x00 "QMBFD2,Queue Manager Bypass Frame Descriptor 2"
group.long 0xEC++0x03
line.long 0x00 "QMBFD3,Queue Manager Bypass Frame Descriptor 3"
group.long 0xF0++0x17
line.long 0x00 "QMBCTXTAH,Queue Manager Bypass CONTEXT_A High"
line.long 0x04 "QMBCTXTAL,Queue Manager Bypass CONTEXT_A Low"
line.long 0x08 "QMBCTXTB,Queue Manager Bypass CONTEXT_B"
line.long 0x0C "QMBCTL,Queue Manager Bypass Control"
bitfld.long 0x0C 31. " GO                   ,Go" "Done,In progress"
line.long 0x10 "ECC1BES,ECC 1-Bit Error Status"
eventfld.long 0x10 31. " TBT0                 ,2-byte trigger 0" "No error,Error"
eventfld.long 0x10 30. "                TBT1              ,2-byte trigger 1" "No error,Error"
eventfld.long 0x10 27. "                VLT0   ,Variable length trigger 0" "No error,Error"
newline
eventfld.long 0x10 26. " VLT1                 ,Variable length trigger 0" "No error,Error"
eventfld.long 0x10 23. "                CM                ,Confidence memory" "No error,Error"
eventfld.long 0x10 19. "                DXC    ,DXE context" "No error,Error"
newline
eventfld.long 0x10 12. " DXM                  ,DXE memory" "No error,Error"
line.long 0x14 "ECC2BES,ECC 2-Bit Error Status"
eventfld.long 0x14 31. " TBT0                 ,2-byte trigger 0" "No error,Error"
eventfld.long 0x14 30. "                TBT1              ,2-byte trigger 1" "No error,Error"
eventfld.long 0x14 27. "                VLT0   ,Variable length trigger 0" "No error,Error"
newline
eventfld.long 0x14 26. " VLT1                 ,Variable length trigger 0" "No error,Error"
eventfld.long 0x14 23. "                CM                ,Confidence memory" "No error,Error"
eventfld.long 0x14 19. "                DXC    ,DXE context" "No error,Error"
newline
eventfld.long 0x14 12. " DXM                  ,DXE memory" "No error,Error"
rgroup.long 0x110++0x03
line.long 0x00 "ECCADDR,ECC Address"
bitfld.long 0x00 29.--31. " MEM                  ,Memory" "TBT0,TBT1,VLT0,VLT1,CM,DXC,DXM,?..."
hexmask.long.word 0x00 0.--15. 0x01 "                    ADDR              ,Address"
rgroup.long 0x118++0x03
line.long 0x00 "ECCCODE,ECC Code"
hexmask.long.word 0x00 16.--24. 1. " SYND                 ,Syndrome"
hexmask.long.word 0x00 0.--8. 1. "                    CODE              ,Code"
group.long 0x180++0x03
line.long 0x00 "TBT0ECC1TH,2-byte Trigger 0 ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x184++0x03
hide.long 0x00 "TBT0ECC1EC,2-byte Trigger 0 ECC 1-Bit Error Count"
in
newline
group.long 0x188++0x03
line.long 0x00 "TBT1ECC1TH,2-byte Trigger 1 ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x18C++0x03
hide.long 0x00 "TBT1ECC1EC,2-byte Trigger 1 ECC 1-Bit Error Count"
in
newline
group.long 0x190++0x03
line.long 0x00 "VLT0ECC1TH,Variable Length Trigger 0 ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x194++0x03
hide.long 0x00 "VLT0ECC1EC,Variable Length Trigger 0 ECC 1-Bit Error Count"
in
newline
group.long 0x198++0x03
line.long 0x00 "VLT1ECC1TH,Variable Length Trigger 1 ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x19C++0x03
hide.long 0x00 "VLT1ECC1EC,Variable Length Trigger 1 ECC 1-Bit Error Count"
in
newline
group.long 0x1A0++0x03
line.long 0x00 "CMECC1TH,Confidence Memory ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x1A4++0x03
hide.long 0x00 "CMECC1EC,Confidence Memory ECC 1-Bit Error Count"
in
newline
group.long 0x1B0++0x03
line.long 0x00 "DXCMECC1TH,DXE Context Memory ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x1B4++0x03
hide.long 0x00 "DXCMECC1EC,DXE Context Memory ECC 1-Bit Error Count"
in
newline
group.long 0x1C0++0x03
line.long 0x00 "DXEMECC1TH,DXE Examination Memory ECC 1-Bit Threshold"
hexmask.long.byte 0x00 0.--7. 1. " THRESH               ,Threshold"
newline
hgroup.long 0x1C4++0x03
hide.long 0x00 "DXEMECC1EC,DXE Examination Memory ECC 1-Bit Error Count"
in
newline
tree.end
tree "Key Element Scanner Control Registers"
hgroup.long 0x200++0x03
hide.long 0x00 "STNIB,Statistic Number Of Input Bytes Scanned For Pattern Matching"
in
hgroup.long 0x204++0x03
hide.long 0x00 "STNIS,Statistic Number Of Input SUIs"
in
hgroup.long 0x208++0x03
hide.long 0x00 "STNTH1,Statistic Number Of Trigger Hits Against 1-Byte Trigger"
in
hgroup.long 0x20C++0x03
hide.long 0x00 "STNTH2,Statistic Number Of Trigger Hits Against 2-Byte Trigger"
in
hgroup.long 0x210++0x03
hide.long 0x00 "STNTHV,Statistic Number Of Trigger Hits Against Variable Length Trigger"
in
hgroup.long 0x214++0x03
hide.long 0x00 "STNTHS,Statistic Number Of Trigger Hits Against Special Trigger"
in
hgroup.long 0x218++0x03
hide.long 0x00 "STNCH,Statistic Number Of Confidence Stage Hits"
in
newline
group.long 0x21C++0x0B
line.long 0x00 "SWDB,Software Database Version Reg/Scratch Pad"
line.long 0x04 "KVLTS,KES Variable Length Trigger Size"
bitfld.long 0x04 0.--3. " VTS                  ,Variable trigger size" "Invalid,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "KEC,KES Error Configuration"
hexmask.long.word 0x08 0.--14. 1. " MCL                  ,Maximum chain length"
newline
tree.end
tree "Data Examination Engine Control Registers"
hgroup.long 0x280++0x03
hide.long 0x00 "STNPM,Statistic Number Of Pattern Matches"
in
hgroup.long 0x284++0x03
hide.long 0x00 "STNS1M,Statistic Number Of SUIs With At Least 1 Pattern Match"
in
newline
group.long 0x288++0x07
line.long 0x00 "DRCIC,DXE Pattern Range Counter Index Configuration"
hexmask.long.word 0x00 0.--14. 1. " IDVAL                ,Index value targeted for counting pattern matches"
line.long 0x04 "DRCMC,DXE Pattern Range Counter Mask Configuration"
bitfld.long 0x04 14. " IDMSK                ,Index mask for IDVAL" "0,1"
bitfld.long 0x04 13. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 12. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 11. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 10. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 9. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 8. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 7. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 6. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 5. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 4. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 3. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 2. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 1. ",Index mask for IDVAL" "0,1"
bitfld.long 0x04 0. ",Index mask for IDVAL" "0,1"
newline
hgroup.long 0x290++0x03
hide.long 0x00 "STNPMR,Statistic Number Of Pattern Matches Within Range Of Indices"
in
newline
group.long 0x2A0++0x13
line.long 0x00 "PDSRBAH,Pattern Description And Stateful Rule Base Address High"
hexmask.long.word 0x00 0.--15. 0x01 " ADDR[47:32]          ,The base address of the pattern description and stateful rule space in system memory"
line.long 0x04 "PDSRBAL,Pattern Description And Stateful Rule Base Address Low"
hexmask.long 0x04 7.--31. 0x80 " ADDR[31:0]           ,The base address of the pattern description and stateful rule space in system memory"
line.long 0x08 "DMCR,DXE Memory Control Register"
bitfld.long 0x08 5. " RSVIOE               ,Invalidate on exception" "Disabled,Enabled"
newline
bitfld.long 0x08 4. " RSVRSD               ,Read safe disable" "No,Yes"
newline
bitfld.long 0x08 2. " PDRP                 ,DXE pattern description read priority" "Normal,Elevated"
newline
bitfld.long 0x08 0.--1. " PDRC                 ,DXE pattern description read cache aware" "Non-coherent,Coherent,?..."
line.long 0x0C "DEC0,DXE Error Configuration 0"
hexmask.long.word 0x0C 0.--13. 1. " MTE                  ,Maximum allowed test line executions per pattern"
line.long 0x10 "DEC1,DXE Error Configuration 1"
hexmask.long.tbyte 0x10 0.--17. 1. " MID                  ,Maximum allocated index into the pattern description and stateful rule table available to the DXE"
group.long 0x2C0++0x03
line.long 0x00 "DLC,DXE Limit Configuration"
hexmask.long.word 0x00 16.--31. 1. " MPE                  ,Maximum pattern evaluations per SUI"
hexmask.long.word 0x00 0.--15. 1. "                    MPM               ,Maximum pattern matches per SUI"
newline
tree.end
tree "Stateful Rule Engine Control Registers"
hgroup.long 0x300++0x03
hide.long 0x00 "STNDSR,Statistic Number Of DXE Generated Stateful Rule Executions"
in
hgroup.long 0x304++0x03
hide.long 0x00 "STNESR,Statistic Number Of End Of SUI Generated Stateful Rule Executions"
in
hgroup.long 0x308++0x03
hide.long 0x00 "STNS1R,Statistic Number Of SUIs Scanned With At Least 1 Report"
in
hgroup.long 0x30C++0x03
hide.long 0x00 "STNOB,Statistic Number Of Output Bytes Produced In Reports"
in
newline
group.long 0x310++0x07
line.long 0x00 "SCBARH,SRE Context Base Address Register High"
hexmask.long.word 0x00 0.--15. 0x01 " ADDR[47:32]          ,The upper bits of the base address of the SRE context table in system memory"
line.long 0x04 "SCBARL,SRE Context Base Address Register Low"
hexmask.long 0x04 5.--31. 0x20 " ADDR[31:0]           ,The lower bits of the base address of the SRE context table in system memory"
group.long 0x318++0x03
line.long 0x00 "SMCR,SRE Memory Control Register"
bitfld.long 0x00 13. " RSVIRSD              ,Read safe disabled for stateful rule reads" "No,Yes"
bitfld.long 0x00 11. "                     SRRP              ,SRE stateful rule read priority" "Normal,Elevated"
bitfld.long 0x00 9.--10. "                SRRC   ,SRE stateful rule read cache aware" "Non-coherent,Coherent,?..."
newline
bitfld.long 0x00 8. " RSVCRSD              ,Read safe disabled for SRE context reads" "No,Yes"
bitfld.long 0x00 6. "                     SCWP              ,SRE context write priority" "Normal,Elevated"
bitfld.long 0x00 4.--5. "                SCWC   ,SRE context write cache aware" "Non-coherent,Coherent,Coherent with Stashing,?..."
newline
bitfld.long 0x00 2. " SCRP                 ,SRE context read priority" "Normal,Elevated"
bitfld.long 0x00 0.--1. "                SCRC              ,SRE context read cache aware" "Non-coherent,Coherent,?..."
group.long 0x320++0x03
line.long 0x00 "SREC,SRE Configuration"
bitfld.long 0x00 29. " AIM                  ,Alternate inconclusive mode" "Default,Alternate"
bitfld.long 0x00 19.--22. "               SS                ,Context size per session" "Cleared,32B,64B,128B,256B,512B,1KB,2KB,4KB,8KB,16KB,32KB,64KB,128KB,?..."
bitfld.long 0x00 18. "                 ESR    ,End of SUI simple report enable" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 0.--7. 1. " CNR                  ,Configured number of stateful rules"
group.long 0x328++0x03
line.long 0x00 "ESRP,End Of SUI Reaction Pointer Register"
hexmask.long.tbyte 0x00 0.--17. 1. " IDX                  ,Index"
group.long 0x338++0x23
line.long 0x00 "SRRV0,SRE Rule Reset Vector 0"
bitfld.long 0x00 31. " MASK[31]             ,Rule 31 reset mask" "No reset,Reset"
bitfld.long 0x00 30. "                [30]              ,Rule 30 reset mask" "No reset,Reset"
bitfld.long 0x00 29. "                [29]   ,Rule 29 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 28. " [28]                 ,Rule 28 reset mask" "No reset,Reset"
bitfld.long 0x00 27. "                [27]              ,Rule 27 reset mask" "No reset,Reset"
bitfld.long 0x00 26. "                [26]   ,Rule 26 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 25. " [25]                 ,Rule 25 reset mask" "No reset,Reset"
bitfld.long 0x00 24. "                [24]              ,Rule 24 reset mask" "No reset,Reset"
bitfld.long 0x00 23. "                [23]   ,Rule 23 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 22. " [22]                 ,Rule 22 reset mask" "No reset,Reset"
bitfld.long 0x00 21. "                [21]              ,Rule 21 reset mask" "No reset,Reset"
bitfld.long 0x00 20. "                [20]   ,Rule 20 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 19. " [19]                 ,Rule 19 reset mask" "No reset,Reset"
bitfld.long 0x00 18. "                [18]              ,Rule 18 reset mask" "No reset,Reset"
bitfld.long 0x00 17. "                [17]   ,Rule 17 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 16. " [16]                 ,Rule 16 reset mask" "No reset,Reset"
bitfld.long 0x00 15. "                [15]              ,Rule 15 reset mask" "No reset,Reset"
bitfld.long 0x00 14. "                [14]   ,Rule 14 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 13. " [13]                 ,Rule 13 reset mask" "No reset,Reset"
bitfld.long 0x00 12. "                [12]              ,Rule 12 reset mask" "No reset,Reset"
bitfld.long 0x00 11. "                [11]   ,Rule 11 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 10. " [10]                 ,Rule 10 reset mask" "No reset,Reset"
bitfld.long 0x00 9. "                [9]               ,Rule 9 reset mask" "No reset,Reset"
bitfld.long 0x00 8. "                [8]    ,Rule 8 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 7. " [7]                  ,Rule 7 reset mask" "No reset,Reset"
bitfld.long 0x00 6. "                [6]               ,Rule 6 reset mask" "No reset,Reset"
bitfld.long 0x00 5. "                [5]    ,Rule 5 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 4. " [4]                  ,Rule 4 reset mask" "No reset,Reset"
bitfld.long 0x00 3. "                [3]               ,Rule 3 reset mask" "No reset,Reset"
bitfld.long 0x00 2. "                [2]    ,Rule 2 reset mask" "No reset,Reset"
newline
bitfld.long 0x00 1. " [1]                  ,Rule 1 reset mask" "No reset,Reset"
bitfld.long 0x00 0. "                [0]               ,Rule 0 reset mask" "No reset,Reset"
line.long 0x04 "SRRV1,SRE Rule Reset Vector 1"
bitfld.long 0x04 31. " MASK[31]             ,Rule 63 reset mask" "No reset,Reset"
bitfld.long 0x04 30. "                [30]              ,Rule 62 reset mask" "No reset,Reset"
bitfld.long 0x04 29. "                [29]   ,Rule 61 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 28. " [28]                 ,Rule 60 reset mask" "No reset,Reset"
bitfld.long 0x04 27. "                [27]              ,Rule 59 reset mask" "No reset,Reset"
bitfld.long 0x04 26. "                [26]   ,Rule 58 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 25. " [25]                 ,Rule 57 reset mask" "No reset,Reset"
bitfld.long 0x04 24. "                [24]              ,Rule 56 reset mask" "No reset,Reset"
bitfld.long 0x04 23. "                [23]   ,Rule 55 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 22. " [22]                 ,Rule 54 reset mask" "No reset,Reset"
bitfld.long 0x04 21. "                [21]              ,Rule 53 reset mask" "No reset,Reset"
bitfld.long 0x04 20. "                [20]   ,Rule 52 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 19. " [19]                 ,Rule 51 reset mask" "No reset,Reset"
bitfld.long 0x04 18. "                [18]              ,Rule 50 reset mask" "No reset,Reset"
bitfld.long 0x04 17. "                [17]   ,Rule 49 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 16. " [16]                 ,Rule 48 reset mask" "No reset,Reset"
bitfld.long 0x04 15. "                [15]              ,Rule 47 reset mask" "No reset,Reset"
bitfld.long 0x04 14. "                [14]   ,Rule 46 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 13. " [13]                 ,Rule 45 reset mask" "No reset,Reset"
bitfld.long 0x04 12. "                [12]              ,Rule 44 reset mask" "No reset,Reset"
bitfld.long 0x04 11. "                [11]   ,Rule 43 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 10. " [10]                 ,Rule 42 reset mask" "No reset,Reset"
bitfld.long 0x04 9. "                [9]               ,Rule 41 reset mask" "No reset,Reset"
bitfld.long 0x04 8. "                [8]    ,Rule 40 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 7. " [7]                  ,Rule 39 reset mask" "No reset,Reset"
bitfld.long 0x04 6. "                [6]               ,Rule 38 reset mask" "No reset,Reset"
bitfld.long 0x04 5. "                [5]    ,Rule 37 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 4. " [4]                  ,Rule 36 reset mask" "No reset,Reset"
bitfld.long 0x04 3. "                [3]               ,Rule 35 reset mask" "No reset,Reset"
bitfld.long 0x04 2. "                [2]    ,Rule 34 reset mask" "No reset,Reset"
newline
bitfld.long 0x04 1. " [1]                  ,Rule 33 reset mask" "No reset,Reset"
bitfld.long 0x04 0. "                [0]               ,Rule 32 reset mask" "No reset,Reset"
line.long 0x08 "SRRV2,SRE Rule Reset Vector 2"
bitfld.long 0x08 31. " MASK[31]             ,Rule 95 reset mask" "No reset,Reset"
bitfld.long 0x08 30. "                [30]              ,Rule 94 reset mask" "No reset,Reset"
bitfld.long 0x08 29. "                [29]   ,Rule 93 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 28. " [28]                 ,Rule 92 reset mask" "No reset,Reset"
bitfld.long 0x08 27. "                [27]              ,Rule 91 reset mask" "No reset,Reset"
bitfld.long 0x08 26. "                [26]   ,Rule 90 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 25. " [25]                 ,Rule 89 reset mask" "No reset,Reset"
bitfld.long 0x08 24. "                [24]              ,Rule 88 reset mask" "No reset,Reset"
bitfld.long 0x08 23. "                [23]   ,Rule 87 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 22. " [22]                 ,Rule 86 reset mask" "No reset,Reset"
bitfld.long 0x08 21. "                [21]              ,Rule 85 reset mask" "No reset,Reset"
bitfld.long 0x08 20. "                [20]   ,Rule 84 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 19. " [19]                 ,Rule 83 reset mask" "No reset,Reset"
bitfld.long 0x08 18. "                [18]              ,Rule 82 reset mask" "No reset,Reset"
bitfld.long 0x08 17. "                [17]   ,Rule 81 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 16. " [16]                 ,Rule 80 reset mask" "No reset,Reset"
bitfld.long 0x08 15. "                [15]              ,Rule 79 reset mask" "No reset,Reset"
bitfld.long 0x08 14. "                [14]   ,Rule 78 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 13. " [13]                 ,Rule 77 reset mask" "No reset,Reset"
bitfld.long 0x08 12. "                [12]              ,Rule 76 reset mask" "No reset,Reset"
bitfld.long 0x08 11. "                [11]   ,Rule 75 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 10. " [10]                 ,Rule 74 reset mask" "No reset,Reset"
bitfld.long 0x08 9. "                [9]               ,Rule 73 reset mask" "No reset,Reset"
bitfld.long 0x08 8. "                [8]    ,Rule 72 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 7. " [7]                  ,Rule 71 reset mask" "No reset,Reset"
bitfld.long 0x08 6. "                [6]               ,Rule 70 reset mask" "No reset,Reset"
bitfld.long 0x08 5. "                [5]    ,Rule 69 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 4. " [4]                  ,Rule 68 reset mask" "No reset,Reset"
bitfld.long 0x08 3. "                [3]               ,Rule 67 reset mask" "No reset,Reset"
bitfld.long 0x08 2. "                [2]    ,Rule 66 reset mask" "No reset,Reset"
newline
bitfld.long 0x08 1. " [1]                  ,Rule 65 reset mask" "No reset,Reset"
bitfld.long 0x08 0. "                [0]               ,Rule 64 reset mask" "No reset,Reset"
line.long 0x0C "SRRV3,SRE Rule Reset Vector 3"
bitfld.long 0x0C 31. " MASK[31]             ,Rule 127 reset mask" "No reset,Reset"
bitfld.long 0x0C 30. "                [30]              ,Rule 126 reset mask" "No reset,Reset"
bitfld.long 0x0C 29. "                [29]   ,Rule 125 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 28. " [28]                 ,Rule 124 reset mask" "No reset,Reset"
bitfld.long 0x0C 27. "                [27]              ,Rule 123 reset mask" "No reset,Reset"
bitfld.long 0x0C 26. "                [26]   ,Rule 122 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 25. " [25]                 ,Rule 121 reset mask" "No reset,Reset"
bitfld.long 0x0C 24. "                [24]              ,Rule 120 reset mask" "No reset,Reset"
bitfld.long 0x0C 23. "                [23]   ,Rule 119 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 22. " [22]                 ,Rule 118 reset mask" "No reset,Reset"
bitfld.long 0x0C 21. "                [21]              ,Rule 117 reset mask" "No reset,Reset"
bitfld.long 0x0C 20. "                [20]   ,Rule 116 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 19. " [19]                 ,Rule 115 reset mask" "No reset,Reset"
bitfld.long 0x0C 18. "                [18]              ,Rule 114 reset mask" "No reset,Reset"
bitfld.long 0x0C 17. "                [17]   ,Rule 113 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 16. " [16]                 ,Rule 112 reset mask" "No reset,Reset"
bitfld.long 0x0C 15. "                [15]              ,Rule 111 reset mask" "No reset,Reset"
bitfld.long 0x0C 14. "                [14]   ,Rule 110 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 13. " [13]                 ,Rule 109 reset mask" "No reset,Reset"
bitfld.long 0x0C 12. "                [12]              ,Rule 108 reset mask" "No reset,Reset"
bitfld.long 0x0C 11. "                [11]   ,Rule 107 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 10. " [10]                 ,Rule 106 reset mask" "No reset,Reset"
bitfld.long 0x0C 9. "                [9]               ,Rule 105 reset mask" "No reset,Reset"
bitfld.long 0x0C 8. "                [8]    ,Rule 104 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 7. " [7]                  ,Rule 103 reset mask" "No reset,Reset"
bitfld.long 0x0C 6. "                [6]               ,Rule 102 reset mask" "No reset,Reset"
bitfld.long 0x0C 5. "                [5]    ,Rule 101 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 4. " [4]                  ,Rule 100 reset mask" "No reset,Reset"
bitfld.long 0x0C 3. "                [3]               ,Rule 99 reset mask" "No reset,Reset"
bitfld.long 0x0C 2. "                [2]    ,Rule 98 reset mask" "No reset,Reset"
newline
bitfld.long 0x0C 1. " [1]                  ,Rule 97 reset mask" "No reset,Reset"
bitfld.long 0x0C 0. "                [0]               ,Rule 96 reset mask" "No reset,Reset"
line.long 0x10 "SRRV4,SRE Rule Reset Vector 4"
bitfld.long 0x10 31. " MASK[31]             ,Rule 159 reset mask" "No reset,Reset"
bitfld.long 0x10 30. "                [30]              ,Rule 158 reset mask" "No reset,Reset"
bitfld.long 0x10 29. "                [29]   ,Rule 157 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 28. " [28]                 ,Rule 156 reset mask" "No reset,Reset"
bitfld.long 0x10 27. "                [27]              ,Rule 155 reset mask" "No reset,Reset"
bitfld.long 0x10 26. "                [26]   ,Rule 154 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 25. " [25]                 ,Rule 153 reset mask" "No reset,Reset"
bitfld.long 0x10 24. "                [24]              ,Rule 152 reset mask" "No reset,Reset"
bitfld.long 0x10 23. "                [23]   ,Rule 151 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 22. " [22]                 ,Rule 150 reset mask" "No reset,Reset"
bitfld.long 0x10 21. "                [21]              ,Rule 149 reset mask" "No reset,Reset"
bitfld.long 0x10 20. "                [20]   ,Rule 148 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 19. " [19]                 ,Rule 147 reset mask" "No reset,Reset"
bitfld.long 0x10 18. "                [18]              ,Rule 146 reset mask" "No reset,Reset"
bitfld.long 0x10 17. "                [17]   ,Rule 145 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 16. " [16]                 ,Rule 144 reset mask" "No reset,Reset"
bitfld.long 0x10 15. "                [15]              ,Rule 143 reset mask" "No reset,Reset"
bitfld.long 0x10 14. "                [14]   ,Rule 142 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 13. " [13]                 ,Rule 141 reset mask" "No reset,Reset"
bitfld.long 0x10 12. "                [12]              ,Rule 140 reset mask" "No reset,Reset"
bitfld.long 0x10 11. "                [11]   ,Rule 139 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 10. " [10]                 ,Rule 138 reset mask" "No reset,Reset"
bitfld.long 0x10 9. "                [9]               ,Rule 137 reset mask" "No reset,Reset"
bitfld.long 0x10 8. "                [8]    ,Rule 136 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 7. " [7]                  ,Rule 135 reset mask" "No reset,Reset"
bitfld.long 0x10 6. "                [6]               ,Rule 134 reset mask" "No reset,Reset"
bitfld.long 0x10 5. "                [5]    ,Rule 133 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 4. " [4]                  ,Rule 132 reset mask" "No reset,Reset"
bitfld.long 0x10 3. "                [3]               ,Rule 131 reset mask" "No reset,Reset"
bitfld.long 0x10 2. "                [2]    ,Rule 130 reset mask" "No reset,Reset"
newline
bitfld.long 0x10 1. " [1]                  ,Rule 129 reset mask" "No reset,Reset"
bitfld.long 0x10 0. "                [0]               ,Rule 128 reset mask" "No reset,Reset"
line.long 0x14 "SRRV5,SRE Rule Reset Vector 5"
bitfld.long 0x14 31. " MASK[31]             ,Rule 191 reset mask" "No reset,Reset"
bitfld.long 0x14 30. "                [30]              ,Rule 190 reset mask" "No reset,Reset"
bitfld.long 0x14 29. "                [29]   ,Rule 189 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 28. " [28]                 ,Rule 188 reset mask" "No reset,Reset"
bitfld.long 0x14 27. "                [27]              ,Rule 187 reset mask" "No reset,Reset"
bitfld.long 0x14 26. "                [26]   ,Rule 186 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 25. " [25]                 ,Rule 185 reset mask" "No reset,Reset"
bitfld.long 0x14 24. "                [24]              ,Rule 184 reset mask" "No reset,Reset"
bitfld.long 0x14 23. "                [23]   ,Rule 183 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 22. " [22]                 ,Rule 182 reset mask" "No reset,Reset"
bitfld.long 0x14 21. "                [21]              ,Rule 181 reset mask" "No reset,Reset"
bitfld.long 0x14 20. "                [20]   ,Rule 180 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 19. " [19]                 ,Rule 179 reset mask" "No reset,Reset"
bitfld.long 0x14 18. "                [18]              ,Rule 178 reset mask" "No reset,Reset"
bitfld.long 0x14 17. "                [17]   ,Rule 177 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 16. " [16]                 ,Rule 176 reset mask" "No reset,Reset"
bitfld.long 0x14 15. "                [15]              ,Rule 175 reset mask" "No reset,Reset"
bitfld.long 0x14 14. "                [14]   ,Rule 174 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 13. " [13]                 ,Rule 173 reset mask" "No reset,Reset"
bitfld.long 0x14 12. "                [12]              ,Rule 172 reset mask" "No reset,Reset"
bitfld.long 0x14 11. "                [11]   ,Rule 171 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 10. " [10]                 ,Rule 170 reset mask" "No reset,Reset"
bitfld.long 0x14 9. "                [9]               ,Rule 169 reset mask" "No reset,Reset"
bitfld.long 0x14 8. "                [8]    ,Rule 168 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 7. " [7]                  ,Rule 167 reset mask" "No reset,Reset"
bitfld.long 0x14 6. "                [6]               ,Rule 166 reset mask" "No reset,Reset"
bitfld.long 0x14 5. "                [5]    ,Rule 165 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 4. " [4]                  ,Rule 164 reset mask" "No reset,Reset"
bitfld.long 0x14 3. "                [3]               ,Rule 163 reset mask" "No reset,Reset"
bitfld.long 0x14 2. "                [2]    ,Rule 162 reset mask" "No reset,Reset"
newline
bitfld.long 0x14 1. " [1]                  ,Rule 161 reset mask" "No reset,Reset"
bitfld.long 0x14 0. "                [0]               ,Rule 160 reset mask" "No reset,Reset"
line.long 0x18 "SRRV6,SRE Rule Reset Vector 6"
bitfld.long 0x18 31. " MASK[31]             ,Rule 223 reset mask" "No reset,Reset"
bitfld.long 0x18 30. "                [30]              ,Rule 222 reset mask" "No reset,Reset"
bitfld.long 0x18 29. "                [29]   ,Rule 221 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 28. " [28]                 ,Rule 220 reset mask" "No reset,Reset"
bitfld.long 0x18 27. "                [27]              ,Rule 219 reset mask" "No reset,Reset"
bitfld.long 0x18 26. "                [26]   ,Rule 218 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 25. " [25]                 ,Rule 217 reset mask" "No reset,Reset"
bitfld.long 0x18 24. "                [24]              ,Rule 216 reset mask" "No reset,Reset"
bitfld.long 0x18 23. "                [23]   ,Rule 215 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 22. " [22]                 ,Rule 214 reset mask" "No reset,Reset"
bitfld.long 0x18 21. "                [21]              ,Rule 213 reset mask" "No reset,Reset"
bitfld.long 0x18 20. "                [20]   ,Rule 212 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 19. " [19]                 ,Rule 211 reset mask" "No reset,Reset"
bitfld.long 0x18 18. "                [18]              ,Rule 210 reset mask" "No reset,Reset"
bitfld.long 0x18 17. "                [17]   ,Rule 209 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 16. " [16]                 ,Rule 208 reset mask" "No reset,Reset"
bitfld.long 0x18 15. "                [15]              ,Rule 207 reset mask" "No reset,Reset"
bitfld.long 0x18 14. "                [14]   ,Rule 206 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 13. " [13]                 ,Rule 205 reset mask" "No reset,Reset"
bitfld.long 0x18 12. "                [12]              ,Rule 204 reset mask" "No reset,Reset"
bitfld.long 0x18 11. "                [11]   ,Rule 203 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 10. " [10]                 ,Rule 202 reset mask" "No reset,Reset"
bitfld.long 0x18 9. "                [9]               ,Rule 201 reset mask" "No reset,Reset"
bitfld.long 0x18 8. "                [8]    ,Rule 200 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 7. " [7]                  ,Rule 199 reset mask" "No reset,Reset"
bitfld.long 0x18 6. "                [6]               ,Rule 198 reset mask" "No reset,Reset"
bitfld.long 0x18 5. "                [5]    ,Rule 197 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 4. " [4]                  ,Rule 196 reset mask" "No reset,Reset"
bitfld.long 0x18 3. "                [3]               ,Rule 195 reset mask" "No reset,Reset"
bitfld.long 0x18 2. "                [2]    ,Rule 194 reset mask" "No reset,Reset"
newline
bitfld.long 0x18 1. " [1]                  ,Rule 193 reset mask" "No reset,Reset"
bitfld.long 0x18 0. "                [0]               ,Rule 192 reset mask" "No reset,Reset"
line.long 0x1C "SRRV7,SRE Rule Reset Vector 7"
bitfld.long 0x1C 31. " MASK[31]             ,Rule 255 reset mask" "No reset,Reset"
bitfld.long 0x1C 30. "                [30]              ,Rule 254 reset mask" "No reset,Reset"
bitfld.long 0x1C 29. "                [29]   ,Rule 253 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 28. " [28]                 ,Rule 252 reset mask" "No reset,Reset"
bitfld.long 0x1C 27. "                [27]              ,Rule 251 reset mask" "No reset,Reset"
bitfld.long 0x1C 26. "                [26]   ,Rule 250 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 25. " [25]                 ,Rule 249 reset mask" "No reset,Reset"
bitfld.long 0x1C 24. "                [24]              ,Rule 248 reset mask" "No reset,Reset"
bitfld.long 0x1C 23. "                [23]   ,Rule 247 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 22. " [22]                 ,Rule 246 reset mask" "No reset,Reset"
bitfld.long 0x1C 21. "                [21]              ,Rule 245 reset mask" "No reset,Reset"
bitfld.long 0x1C 20. "                [20]   ,Rule 244 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 19. " [19]                 ,Rule 243 reset mask" "No reset,Reset"
bitfld.long 0x1C 18. "                [18]              ,Rule 242 reset mask" "No reset,Reset"
bitfld.long 0x1C 17. "                [17]   ,Rule 241 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 16. " [16]                 ,Rule 240 reset mask" "No reset,Reset"
bitfld.long 0x1C 15. "                [15]              ,Rule 239 reset mask" "No reset,Reset"
bitfld.long 0x1C 14. "                [14]   ,Rule 238 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 13. " [13]                 ,Rule 237 reset mask" "No reset,Reset"
bitfld.long 0x1C 12. "                [12]              ,Rule 236 reset mask" "No reset,Reset"
bitfld.long 0x1C 11. "                [11]   ,Rule 235 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 10. " [10]                 ,Rule 234 reset mask" "No reset,Reset"
bitfld.long 0x1C 9. "                [9]               ,Rule 233 reset mask" "No reset,Reset"
bitfld.long 0x1C 8. "                [8]    ,Rule 232 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 7. " [7]                  ,Rule 231 reset mask" "No reset,Reset"
bitfld.long 0x1C 6. "                [6]               ,Rule 230 reset mask" "No reset,Reset"
bitfld.long 0x1C 5. "                [5]    ,Rule 229 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 4. " [4]                  ,Rule 228 reset mask" "No reset,Reset"
bitfld.long 0x1C 3. "                [3]               ,Rule 227 reset mask" "No reset,Reset"
bitfld.long 0x1C 2. "                [2]    ,Rule 226 reset mask" "No reset,Reset"
newline
bitfld.long 0x1C 1. " [1]                  ,Rule 225 reset mask" "No reset,Reset"
bitfld.long 0x1C 0. "                [0]               ,Rule 224 reset mask" "No reset,Reset"
line.long 0x20 "SRRFI,SRE Rule Reset First Index"
hexmask.long 0x20 0.--26. 1. " FIC                  ,First index control"
group.long 0x360++0x03
line.long 0x00 "SRRI,SRE Rule Reset 32-byte Increment"
hexmask.long.word 0x00 0.--11. 0x01 " CI                   ,Number of 32-byte steps to increment the internal address pointer by after each step of the reset operation"
newline
hgroup.long 0x364++0x03
hide.long 0x00 "SRRR,SRE Rule Reset Repetitions"
in
newline
group.long 0x368++0x13
line.long 0x00 "SRRWC,SRE Rule Reset Work Configuration"
hexmask.long.word 0x00 1.--12. 1. " RRI                  ,Reset rule interval"
bitfld.long 0x00 0. "                    RRP               ,Reset rule priority" "Data,Reset"
line.long 0x04 "SFRCC,SRE Free Running Counter Configuration"
hexmask.long.word 0x04 0.--9. 1. " PSCL                 ,Prescaler value"
line.long 0x08 "SEC1,SRE Error Configuration 1"
hexmask.long.word 0x08 16.--31. 1. " MIL                  ,Maximum instruction limit"
hexmask.long.word 0x08 0.--14. 1. "                    MBN               ,Maximum block number"
line.long 0x0C "SEC2,SRE Error Configuration 2"
hexmask.long.tbyte 0x0C 0.--17. 1. " MIS                  ,Maximum index size"
line.long 0x10 "SEC3,SRE Error Configuration 3"
hexmask.long 0x10 0.--26. 0x01 " MOC                  ,Maximum offset control"
newline
tree.end
tree "Memory Interface Arbiter Control Registers"
hgroup.long 0x380++0x03
hide.long 0x00 "MIA_BYC,MIA Byte Count"
in
hgroup.long 0x384++0x03
hide.long 0x00 "MIA_BLC,MIA Block Count"
in
newline
group.long 0x388++0x03
line.long 0x00 "MIA_CE,MIA Count Enable"
bitfld.long 0x00 30.--31. " BLC_SIZE             ,Block count size" "16 byte,32 byte,64 byte,128 byte"
bitfld.long 0x00 26. "                WBLCE2            ,Write port block count enable 2" "Disabled,Enabled"
bitfld.long 0x00 25. "                WBLCE1 ,Write port block count enable 1" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WBLCE0               ,Write port block count enable 0" "Disabled,Enabled"
bitfld.long 0x00 20. "                RBLCE4            ,Read port block count enable 4" "Disabled,Enabled"
bitfld.long 0x00 19. "                RBLCE3 ,Read port block count enable 3" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " RBLCE2               ,Read port block count enable 2" "Disabled,Enabled"
bitfld.long 0x00 17. "                RBLCE1            ,Read port block count enable 1" "Disabled,Enabled"
bitfld.long 0x00 16. "                RBLCE0 ,Read port block count enable 0" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " WBYCE2               ,Write port byte count enable 2" "Disabled,Enabled"
bitfld.long 0x00 9. "                WBYCE1            ,Write port byte count enable 1" "Disabled,Enabled"
bitfld.long 0x00 8. "                WBYCE0 ,Write port byte count enable 0" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " RBYCE4               ,Read port byte count enable 4" "Disabled,Enabled"
bitfld.long 0x00 3. "                RBYCE3            ,Read port byte count enable 3" "Disabled,Enabled"
bitfld.long 0x00 2. "                RBYCE2 ,Read port byte count enable 2" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " RBYCE1               ,Read port byte count enable 1" "Disabled,Enabled"
bitfld.long 0x00 0. "                RBYCE0            ,Read port byte count enable 0" "Disabled,Enabled"
group.long 0x390++0x03
line.long 0x00 "MIA_CR,MIA Control Register"
bitfld.long 0x00 10. " WD2                  ,Write port disable 2" "No,Yes"
bitfld.long 0x00 9. "                     WD1               ,Write port disable 1" "No,Yes"
bitfld.long 0x00 8. "                     WD0    ,Write port disable 0" "No,Yes"
newline
bitfld.long 0x00 4. " RD4                  ,Read port disable 4" "No,Yes"
bitfld.long 0x00 3. "                     RD3               ,Read port disable 3" "No,Yes"
bitfld.long 0x00 2. "                     RD2    ,Read port disable 2" "No,Yes"
newline
bitfld.long 0x00 1. " RD1                  ,Read port disable 1" "No,Yes"
bitfld.long 0x00 0. "                     RD0               ,Read port disable 0" "No,Yes"
tree.end
tree "General Registers"
group.long 0x804++0x03
line.long 0x00 "LIODNBR,LIODN Base Register"
hexmask.long.word 0x00 16.--27. 1. " QI_SHARED_LIODN_BASE ,Logical I/O device number"
hexmask.long.word 0x00 0.--11. 1. "                    QI_JOB_LIODN_BASE ,Logical I/O device number"
rgroup.long 0xA00++0x03
line.long 0x00 "SRCIDR,Source ID Register"
hexmask.long.byte 0x00 0.--7. 1. " SRCID                ,PMs source ID"
group.long 0xA0C++0x03
line.long 0x00 "LIODNR,LIODN Register"
hexmask.long.word 0x00 0.--11. 1. " LIODN                ,Logical I/O device number"
rgroup.long 0xBF8++0x07
line.long 0x00 "PM_IP_REV_1,PM IP Block Revision 1 Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID                ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "                    IP_MJ             ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "                      IP_MN  ,Minor revision"
line.long 0x04 "PM_IP_REV_2,PM IP Block Revision 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT               ,Integration options"
hexmask.long.byte 0x04 8.--15. 1. "                      IP_ERR            ,Errata"
hexmask.long.byte 0x04 0.--7. 1. "                      IP_CFG ,Configuration options"
tree.end
width 0x0B
tree.end
tree "DCE (Decompression/Compression Engine)"
base ad:0x08120000
width 13.
group.long 0x00++0x03
line.long 0x00 "CFG,DCE Configuration Register"
bitfld.long 0x00 28. " LSE    ,Load spreading enable" "Disabled,Enabled"
bitfld.long 0x00 24.--25. "           DQL    ,Dequeue limit" "16,8,4,2"
bitfld.long 0x00 20. "                     RSD         ,Read safe disable" "No,Yes"
bitfld.long 0x00 17. "           DPMD  ,Dynamic power management disable" "No,Yes"
newline
bitfld.long 0x00 8.--9. " PFQRA  ,Private frame queue resource allocation" "Static shared,Static compress,Static decompress,Dynamic shared"
bitfld.long 0x00 0.--1. "  EN     ,Enable level" "Disabled,Pause,Enabled without order,Enabled"
group.long 0x14++0x07
line.long 0x00 "OLL,Output Length Limit Register"
hexmask.long.word 0x00 0.--15. 1. " LIMIT  ,Limit"
line.long 0x04 "PFQC,Private Frame Queue Control Register"
hexmask.long.byte 0x04 16.--23. 1. " SA     ,Starvation avoidance"
bitfld.long 0x04 8.--11. "                 QL     ,Queue limit" "Not limited,1/2,1/4,1/8,1/16,1/32,1/64,1/128,?..."
bitfld.long 0x04 0.--3. "            PS          ,Pool size" "Not reduced,1/2,1/4,1/8,1/16,1/32,1/64,1/128,?..."
group.long 0x24++0x03
line.long 0x00 "HCL,Hop Count Limit Register"
hexmask.long.word 0x00 0.--9. 1. " LIMIT  ,Limit"
rgroup.long 0x3C++0x03
line.long 0x00 "IDLE,DCE Idle Status Register"
bitfld.long 0x00 16. " B      ,Busy" "Not busy,Busy"
bitfld.long 0x00 8. "           S      ,Stopped" "Not stopped,Stopped"
bitfld.long 0x00 0. "            I           ,Idle" "Busy,Idle"
rgroup.long 0x104++0x03
line.long 0x00 "SRCIDR,Source ID Register"
group.long 0x108++0x07
line.long 0x00 "SMRCACR,System Memory Read Cache Attribute Control Register"
bitfld.long 0x00 24.--28. " CHRC   ,Compression history read cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 16.--20. "                 SCRC   ,Stream context record read cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--12. "                     FDRC        ,Frame data read cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "            DHRC  ,Decompression history read cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "SMWCACR,System Memory Write Cache Attribute Control Register"
bitfld.long 0x04 24.--28. " CHWC   ,Compression history write cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 16.--20. "                 SCWC   ,Stream context record write cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 8.--12. "                     FDWC        ,Frame data write cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x04 0.--4. "            DHWC  ,Decompression history write cache aware" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
wgroup.long 0x110++0x03
line.long 0x00 "ICIR,Internal Context Invalidate Register"
bitfld.long 0x00 0. " ICI    ,Invalidate internal context" "0,1"
group.long 0x15C++0x03
line.long 0x00 "PFQSR,Private Frame Queue Select Register"
bitfld.long 0x00 0.--4. " SLOT   ,The slot ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x160++0x0F
line.long 0x00 "PFQADQS0,Private Frame Queue Access Dequeue Summary 0 Register"
line.long 0x04 "PFQADQS1,Private Frame Queue Access Dequeue Summary 1 Register"
line.long 0x08 "PFQADQS2,Private Frame Queue Access Dequeue Summary 2 Register"
line.long 0x0C "PFQADQS3,Private Frame Queue Access Dequeue Summary 3 Register"
rgroup.long 0x180++0x13
line.long 0x00 "PFQALL,Private Frame Queue Access Linked List Register"
hexmask.long.word 0x00 16.--31. 0x01 " TAIL   ,Current tail pointer value"
hexmask.long.word 0x00 0.--15. 0x01 "               HEAD   ,Current head pointer value"
line.long 0x04 "PFQAL,Private Frame Queue Access Length Register"
hexmask.long.word 0x04 0.--15. 1. " LENGTH ,Number of FDs (frames) currently held in the private frame queue"
line.long 0x08 "PFQAFL,Private Frame Queue Access Flow Low Register"
line.long 0x0C "PFQAFH,Private Frame Queue Access Flow High Register"
line.long 0x10 "PFQAFA,Private Frame Queue Access Flow Attributes Register"
bitfld.long 0x10 26. " CBMT   ,CBMT associated with the flow that is using the private frame queue" "0,1"
bitfld.long 0x10 25. "                  VA     ,VA associated with the flow that is using the private frame queue" "0,1"
rgroup.long 0x1B0++0x07
line.long 0x00 "FBLL,Free Buffer List Length Register"
hexmask.long.word 0x00 0.--15. 1. " LENGTH ,Number of FD buffers currently in the free buffer list"
line.long 0x04 "FQLL,Free Queue List Length Register"
hexmask.long.byte 0x04 0.--7. 1. " LENGTH ,Number of unused private frame queues"
group.long 0x200++0x1F
line.long 0x00 "CIBC_L,Compressor Input Bytes Count High Register"
line.long 0x04 "CIBC_H,Compressor Input Bytes Count Low Register"
line.long 0x08 "COBC_L,Compressor Output Bytes Count High Register"
line.long 0x0C "COBC_H,Compressor Output Bytes Count Low Register"
line.long 0x10 "DIBC_L,Decompressor Input Bytes Count High Register"
line.long 0x14 "DIBC_H,Decompressor Input Bytes Count Low Register"
line.long 0x18 "DOBC_L,Decompressor Output Bytes Count High Register"
line.long 0x1C "DOBC_H,Decompressor Output Bytes Count Low Register"
rgroup.long 0x3F8++0x07
line.long 0x00 "IP_REV_1,DCE IP Block Revision 1 Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID  ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "               IP_MJ  ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "                     IP_MN       ,Minor revision"
line.long 0x04 "IP_REV_2,DCE IP Block Revision 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT ,Integration options"
hexmask.long.byte 0x04 8.--15. 1. "                 IP_ERR ,Errata revision level"
bitfld.long 0x04 6.--7. "                     IP_CFG[7:6] ,Number of private frame queue slots present" "4,16,32,64"
bitfld.long 0x04 3.--5. "            [5:3] ,Number of compression modules" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 0.--2. "             [2:0]  ,Number of decompression modules" "1,2,3,4,5,6,7,8"
group.long 0x400++0x0F
line.long 0x00 "ISR,Interrupt Status Register"
eventfld.long 0x00 7. " UWE    ,Unreported write error" "Not occurred,Occurred"
eventfld.long 0x00 1. "       SBE    ,Single bit error" "Not set,Set"
eventfld.long 0x00 0. "                DBE         ,Double bit error" "Not set,Set"
line.long 0x04 "IER,Interrupt Enable Register"
bitfld.long 0x04 7. " UWE    ,Unreported write error" "Disabled,Enabled"
bitfld.long 0x04 1. "           SBE    ,Single bit error" "Disabled,Enabled"
bitfld.long 0x04 0. "               DBE         ,Double bit error" "Disabled,Enabled"
line.long 0x08 "ISDR,Interrupt Status Disable Register"
bitfld.long 0x08 7. " UWE    ,Unreported write error" "No,Yes"
bitfld.long 0x08 1. "                SBE    ,Single bit error" "No,Yes"
bitfld.long 0x08 0. "                    DBE         ,Double bit error" "No,Yes"
line.long 0x0C "IIR,Interrupt Inhibit Register"
bitfld.long 0x0C 0. " I      ,Inhibit" "Not inhibited,Inhibited"
group.long 0x440++0x07
line.long 0x00 "ECC1BES,ECC 1-Bit Error Status Register"
eventfld.long 0x00 3. " PFQ    ,Private frame queue memory" "Not exceeded,Exceeded"
eventfld.long 0x00 2. "       CBM    ,Compression history memory" "Not exceeded,Exceeded"
eventfld.long 0x00 1. "           DHM         ,Decompression history memory" "Not exceeded,Exceeded"
eventfld.long 0x00 0. "  CXM   ,Internal context memory" "Not exceeded,Exceeded"
line.long 0x04 "ECC2BES,ECC 2-Bit Error Status Register"
eventfld.long 0x04 3. " PFQ    ,Private frame queue memory" "Not detected,Detected"
eventfld.long 0x04 2. "       CBM    ,Internal data memory" "Not detected,Detected"
eventfld.long 0x04 1. "           DHM         ,Decompression history memory" "Not detected,Detected"
eventfld.long 0x04 0. "  CXM   ,Internal context memory" "Not detected,Detected"
rgroup.long 0x448++0x03
line.long 0x00 "ECCADDR,ECC Address Register"
bitfld.long 0x00 31. " CAP    ,Captured error indication" "Not occurred,Occurred"
bitfld.long 0x00 30. "       CET    ,Captured error type" "Single-bit,Multi-bit"
bitfld.long 0x00 16.--21. "             MEM         ,Memory" "DHM0,DHM1,DHM2,DHM3,DHM4,DHM5,DHM6,DHM7,CBM0,CBM1,CBM2,CBM3,CBM4,CBM5,CBM6,CBM7,CXMA0,CXMB0,CXMA1,CXMB1,CXMA2,CXMB2,CXMA3,CXMB3,CXMA4,CXMB4,CXMA5,CXMB5,CXMA6,CXMB6,CXMA7,CXMB7,PFQ0,PFQ1,?..."
hexmask.long.word 0x00 0.--15. 0x01 "         ADDR  ,Address"
group.long 0x44C++0x13
line.long 0x00 "ECC1TH,ECC 1-Bit Threshold Register"
bitfld.long 0x00 11. " DEPFQM ,Disable ECC generation - checking and correction on private frame queue memory" "No,Yes"
bitfld.long 0x00 10. "                DECBM  ,Disable ECC generation - checking and correction on internal data memory" "No,Yes"
bitfld.long 0x00 9. "                    DEDHM       ,Disable ECC generation - checking and correction on decompression history memory" "No,Yes"
bitfld.long 0x00 8. "           DECXM ,Disable ECC generation - checking and correction on internal context memory" "No,Yes"
hexmask.long.byte 0x00 0.--7. 1. "           THRESH ,Threshold value"
line.long 0x04 "DHECC1EC,Decompression History Memory ECC 1-Bit Error Count Register"
hexmask.long.byte 0x04 0.--7. 1. " COUNT  ,Count"
line.long 0x08 "CXECC1EC,Internal Context Memory ECC 1-Bit Error Count Register"
hexmask.long.byte 0x08 0.--7. 1. " COUNT  ,Count"
line.long 0x0C "CBECC1EC,Internal Data Memory ECC 1-Bit Error Count Register"
hexmask.long.byte 0x0C 0.--7. 1. " COUNT  ,Count"
line.long 0x10 "PFQECC1EC,Private Frame Queue Memory ECC 1-Bit Error Count Register"
hexmask.long.byte 0x10 0.--7. 1. " COUNT  ,Count"
rgroup.long 0x480++0x0B
line.long 0x00 "UWE_INFO_H,Unreported Write Error Information High Register"
line.long 0x04 "UWE_INFO_L,Unreported Write Error Information Low Register"
hexmask.long 0x04 6.--31. 1. " FLC    ,FLC"
line.long 0x08 "UWE_ICID,Unreported Write Error ICID Register"
hexmask.long.word 0x08 0.--15. 1. " ICID   ,ICID"
width 0x0B
tree.end
tree.open "PMU (Power Management Unit)"
tree "COP_PMU_CCSR"
base ad:0x08290000
width 18.
tree "Threads registers"
width 18.
group.long 0x00++0x03
line.long 0x00 "TPH10SR0_SET/CLR,Thread PH10 Status Register"
setclrfld.long 0x00 17. 0x10 17. 0x20 17. " T17         ,Thread 17 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 16. 0x10 16. 0x20 16. "   T16         ,Thread 16 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 15. 0x10 15. 0x20 15. "   T15         ,Thread 15 PH10 status" "Not in PH10,In PH10"
newline
setclrfld.long 0x00 14. 0x10 14. 0x20 14. " T14         ,Thread 14 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 13. 0x10 13. 0x20 13. "   T13         ,Thread 13 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 12. 0x10 12. 0x20 12. "   T12         ,Thread 12 PH10 status" "Not in PH10,In PH10"
newline
setclrfld.long 0x00 11. 0x10 11. 0x20 11. " T11         ,Thread 11 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 10. 0x10 10. 0x20 10. "   T10         ,Thread 10 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 9. 0x10 9. 0x20 9. "   T9          ,Thread 9 PH10 status" "Not in PH10,In PH10"
newline
setclrfld.long 0x00 8. 0x10 8. 0x20 8. " T8          ,Thread 8 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 7. 0x10 7. 0x20 7. "   T7          ,Thread 7 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 6. 0x10 6. 0x20 6. "   T6          ,Thread 6 PH10 status" "Not in PH10,In PH10"
newline
setclrfld.long 0x00 5. 0x10 5. 0x20 5. " T5          ,Thread 5 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 4. 0x10 4. 0x20 4. "   T4          ,Thread 4 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 3. 0x10 3. 0x20 3. "   T3          ,Thread 3 PH10 status" "Not in PH10,In PH10"
newline
setclrfld.long 0x00 2. 0x10 2. 0x20 2. " T2          ,Thread 2 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 1. 0x10 1. 0x20 1. "   T1          ,Thread 1 PH10 status" "Not in PH10,In PH10"
setclrfld.long 0x00 0. 0x10 0. 0x20 0. "   T0          ,Thread 0 PH10 status" "Not in PH10,In PH10"
group.long 0x30++0x03
line.long 0x00 "TPH10PSR0,Thread PH10 Previous Status Register"
eventfld.long 0x00 17. " T_P_PH10_17 ,Thread PH10 previous status bit 17" "Not in PH10,In PH10"
eventfld.long 0x00 16. "   T_P_PH10_16 ,Thread PH10 previous status bit 16" "Not in PH10,In PH10"
eventfld.long 0x00 15. "   T_P_PH10_15 ,Thread PH10 previous status bit 15" "Not in PH10,In PH10"
newline
eventfld.long 0x00 14. " T_P_PH10_14 ,Thread PH10 previous status bit 14" "Not in PH10,In PH10"
eventfld.long 0x00 13. "   T_P_PH10_13 ,Thread PH10 previous status bit 13" "Not in PH10,In PH10"
eventfld.long 0x00 12. "   T_P_PH10_12 ,Thread PH10 previous status bit 12" "Not in PH10,In PH10"
newline
eventfld.long 0x00 11. " T_P_PH10_11 ,Thread PH10 previous status bit 11" "Not in PH10,In PH10"
eventfld.long 0x00 10. "   T_P_PH10_10 ,Thread PH10 previous status bit 10" "Not in PH10,In PH10"
eventfld.long 0x00 9. "   T_P_PH10_9  ,Thread PH10 previous status bit 9" "Not in PH10,In PH10"
newline
eventfld.long 0x00 8. " T_P_PH10_8  ,Thread PH10 previous status bit 8" "Not in PH10,In PH10"
eventfld.long 0x00 7. "   T_P_PH10_7  ,Thread PH10 previous status bit 7" "Not in PH10,In PH10"
eventfld.long 0x00 6. "   T_P_PH10_6  ,Thread PH10 previous status bit 6" "Not in PH10,In PH10"
newline
eventfld.long 0x00 5. " T_P_PH10_5  ,Thread PH10 previous status bit 5" "Not in PH10,In PH10"
eventfld.long 0x00 4. "   T_P_PH10_4  ,Thread PH10 previous status bit 4" "Not in PH10,In PH10"
eventfld.long 0x00 3. "   T_P_PH10_3  ,Thread PH10 previous status bit 3" "Not in PH10,In PH10"
newline
eventfld.long 0x00 2. " T_P_PH10_2  ,Thread PH10 previous status bit 2" "Not in PH10,In PH10"
eventfld.long 0x00 1. "   T_P_PH10_1  ,Thread PH10 previous status bit 1" "Not in PH10,In PH10"
eventfld.long 0x00 0. "   T_P_PH10_0  ,Thread PH10 previous status bit 0" "Not in PH10,In PH10"
rgroup.long 0x40++0x03
line.long 0x00 "TWAITSR0,Thread Wait Status Register"
bitfld.long 0x00 17. " T_WAITING17 ,Thread wait status bit 17" "Not in wait,In wait"
bitfld.long 0x00 16. "   T_WAITING16 ,Thread wait status bit 16" "Not in wait,In wait"
bitfld.long 0x00 15. "   T_WAITING15 ,Thread wait status bit 15" "Not in wait,In wait"
newline
bitfld.long 0x00 14. " T_WAITING14 ,Thread wait status bit 14" "Not in wait,In wait"
bitfld.long 0x00 13. "   T_WAITING13 ,Thread wait status bit 13" "Not in wait,In wait"
bitfld.long 0x00 12. "   T_WAITING12 ,Thread wait status bit 12" "Not in wait,In wait"
newline
bitfld.long 0x00 11. " T_WAITING11 ,Thread wait status bit 11" "Not in wait,In wait"
bitfld.long 0x00 10. "   T_WAITING10 ,Thread wait status bit 10" "Not in wait,In wait"
bitfld.long 0x00 9. "   T_WAITING9  ,Thread wait status bit 9" "Not in wait,In wait"
newline
bitfld.long 0x00 8. " T_WAITING8  ,Thread wait status bit 8" "Not in wait,In wait"
bitfld.long 0x00 7. "   T_WAITING7  ,Thread wait status bit 7" "Not in wait,In wait"
bitfld.long 0x00 6. "   T_WAITING6  ,Thread wait status bit 6" "Not in wait,In wait"
newline
bitfld.long 0x00 5. " T_WAITING5  ,Thread wait status bit 5" "Not in wait,In wait"
bitfld.long 0x00 4. "   T_WAITING4  ,Thread wait status bit 4" "Not in wait,In wait"
bitfld.long 0x00 3. "   T_WAITING3  ,Thread wait status bit 3" "Not in wait,In wait"
newline
bitfld.long 0x00 2. " T_WAITING2  ,Thread wait status bit 2" "Not in wait,In wait"
bitfld.long 0x00 1. "   T_WAITING1  ,Thread wait status bit 1" "Not in wait,In wait"
bitfld.long 0x00 0. "   T_WAITING0  ,Thread wait status bit 0" "Not in wait,In wait"
rgroup.long 0x50++0x03
line.long 0x00 "TWDTDSR0,Core Watchdog Detect Status Register"
bitfld.long 0x00 7. " TWDT_DET7   ,Core 7 WDT detect status bit 7" "Not detected,Detected"
bitfld.long 0x00 6. "  TWDT_DET6   ,Core 6 WDT detect status bit 6" "Not detected,Detected"
bitfld.long 0x00 5. "  TWDT_DET5   ,Core 5 WDT detect status bit 5" "Not detected,Detected"
newline
bitfld.long 0x00 4. " TWDT_DET4   ,Core 4 WDT detect status bit 4" "Not detected,Detected"
bitfld.long 0x00 3. "  TWDT_DET3   ,Core 3 WDT detect status bit 3" "Not detected,Detected"
bitfld.long 0x00 2. "  TWDT_DET2   ,Core 2 WDT detect status bit 2" "Not detected,Detected"
newline
bitfld.long 0x00 1. " TWDT_DET1   ,Core 1 WDT detect status bit 1" "Not detected,Detected"
bitfld.long 0x00 0. "  TWDT_DET0   ,Core 0 WDT detect status bit 0" "Not detected,Detected"
group.long 0x1B0++0x03
line.long 0x00 "TTBHLTCR0,Thread Time Base Halt Control Register"
bitfld.long 0x00 17. " TTBHLT17    ,Core timebase behavior during thread halted bit 17" "Stopped,Not stopped"
bitfld.long 0x00 16. "   TTBHLT16    ,Core timebase behavior during thread halted bit 16" "Stopped,Not stopped"
bitfld.long 0x00 15. "   TTBHLT15    ,Core timebase behavior during thread halted bit 15" "Stopped,Not stopped"
newline
bitfld.long 0x00 14. " TTBHLT14    ,Core timebase behavior during thread halted bit 14" "Stopped,Not stopped"
bitfld.long 0x00 13. "   TTBHLT13    ,Core timebase behavior during thread halted bit 13" "Stopped,Not stopped"
bitfld.long 0x00 12. "   TTBHLT12    ,Core timebase behavior during thread halted bit 12" "Stopped,Not stopped"
newline
bitfld.long 0x00 11. " TTBHLT11    ,Core timebase behavior during thread halted bit 11" "Stopped,Not stopped"
bitfld.long 0x00 10. "   TTBHLT10    ,Core timebase behavior during thread halted bit 10" "Stopped,Not stopped"
bitfld.long 0x00 9. "   TTBHLT9     ,Core timebase behavior during thread halted bit 9" "Stopped,Not stopped"
newline
bitfld.long 0x00 8. " TTBHLT8     ,Core timebase behavior during thread halted bit 8" "Stopped,Not stopped"
bitfld.long 0x00 7. "   TTBHLT7     ,Core timebase behavior during thread halted bit 7" "Stopped,Not stopped"
bitfld.long 0x00 6. "   TTBHLT6     ,Core timebase behavior during thread halted bit 6" "Stopped,Not stopped"
newline
bitfld.long 0x00 5. " TTBHLT5     ,Core timebase behavior during thread halted bit 5" "Stopped,Not stopped"
bitfld.long 0x00 4. "   TTBHLT4     ,Core timebase behavior during thread halted bit 4" "Stopped,Not stopped"
bitfld.long 0x00 3. "   TTBHLT3     ,Core timebase behavior during thread halted bit 3" "Stopped,Not stopped"
newline
bitfld.long 0x00 2. " TTBHLT2     ,Core timebase behavior during thread halted bit 2" "Stopped,Not stopped"
bitfld.long 0x00 1. "   TTBHLT1     ,Core timebase behavior during thread halted bit 1" "Stopped,Not stopped"
bitfld.long 0x00 0. "   TTBHLT0     ,Core timebase behavior during thread halted bit 0" "Stopped,Not stopped"
tree.end
tree "Physical cores registers"
width 18.
group.long 0x800++0x03
line.long 0x00 "PCPH15SR_SET/CLR,Physical Core PH15 Status Register"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PC17         ,Physical core PH15 status bit 17" "Not in PH15,In PH15"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "   PC16         ,Physical core PH15 status bit 16" "Not in PH15,In PH15"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "   PC15         ,Physical core PH15 status bit 15" "Not in PH15,In PH15"
newline
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " PC14         ,Physical core PH15 status bit 14" "Not in PH15,In PH15"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "   PC13         ,Physical core PH15 status bit 13" "Not in PH15,In PH15"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "   PC12         ,Physical core PH15 status bit 12" "Not in PH15,In PH15"
newline
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " PC11         ,Physical core PH15 status bit 11" "Not in PH15,In PH15"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "   PC10         ,Physical core PH15 status bit 10" "Not in PH15,In PH15"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "   PC9          ,Physical core PH15 status bit 9" "Not in PH15,In PH15"
newline
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PC8          ,Physical core PH15 status bit 8" "Not in PH15,In PH15"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "   PC7          ,Physical core PH15 status bit 7" "Not in PH15,In PH15"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "   PC6          ,Physical core PH15 status bit 6" "Not in PH15,In PH15"
newline
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PC5          ,Physical core PH15 status bit 5" "Not in PH15,In PH15"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "   PC4          ,Physical core PH15 status bit 4" "Not in PH15,In PH15"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "   PC3          ,Physical core PH15 status bit 3" "Not in PH15,In PH15"
newline
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PC2          ,Physical core PH15 status bit 2" "Not in PH15,In PH15"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "   PC1          ,Physical core PH15 status bit 1" "Not in PH15,In PH15"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "   PC0          ,Physical core PH15 status bit 0" "Not in PH15,In PH15"
group.long 0x80C++0x03
line.long 0x00 "PCPH15PSR,Physical Core PH15 Previous Status Register"
eventfld.long 0x00 17. " PC_P_PH15_17 ,Physical core PH15 previous status bit 17" "Not in PH15,In PH15"
eventfld.long 0x00 16. "   PC_P_PH15_16 ,Physical core PH15 previous status bit 16" "Not in PH15,In PH15"
eventfld.long 0x00 15. "   PC_P_PH15_15 ,Physical core PH15 previous status bit 15" "Not in PH15,In PH15"
newline
eventfld.long 0x00 14. " PC_P_PH15_14 ,Physical core PH15 previous status bit 14" "Not in PH15,In PH15"
eventfld.long 0x00 13. "   PC_P_PH15_13 ,Physical core PH15 previous status bit 13" "Not in PH15,In PH15"
eventfld.long 0x00 12. "   PC_P_PH15_12 ,Physical core PH15 previous status bit 12" "Not in PH15,In PH15"
newline
eventfld.long 0x00 11. " PC_P_PH15_11 ,Physical core PH15 previous status bit 11" "Not in PH15,In PH15"
eventfld.long 0x00 10. "   PC_P_PH15_10 ,Physical core PH15 previous status bit 10" "Not in PH15,In PH15"
eventfld.long 0x00 9. "   PC_P_PH15_9  ,Physical core PH15 previous status bit 9" "Not in PH15,In PH15"
newline
eventfld.long 0x00 8. " PC_P_PH15_8  ,Physical core PH15 previous status bit 8" "Not in PH15,In PH15"
eventfld.long 0x00 7. "   PC_P_PH15_7  ,Physical core PH15 previous status bit 7" "Not in PH15,In PH15"
eventfld.long 0x00 6. "   PC_P_PH15_6  ,Physical core PH15 previous status bit 6" "Not in PH15,In PH15"
newline
eventfld.long 0x00 5. " PC_P_PH15_5  ,Physical core PH15 previous status bit 5" "Not in PH15,In PH15"
eventfld.long 0x00 4. "   PC_P_PH15_4  ,Physical core PH15 previous status bit 4" "Not in PH15,In PH15"
eventfld.long 0x00 3. "   PC_P_PH15_3  ,Physical core PH15 previous status bit 3" "Not in PH15,In PH15"
newline
eventfld.long 0x00 2. " PC_P_PH15_2  ,Physical core PH15 previous status bit 2" "Not in PH15,In PH15"
eventfld.long 0x00 1. "   PC_P_PH15_1  ,Physical core PH15 previous status bit 1" "Not in PH15,In PH15"
eventfld.long 0x00 0. "   PC_P_PH15_0  ,Physical core PH15 previous status bit 0" "Not in PH15,In PH15"
rgroup.long 0x810++0x03
line.long 0x00 "PCWFESR,Physical Core WFE Status Register"
bitfld.long 0x00 7. " PC7          ,Physical core WFE status bit 7" "Not in WFE,In WFE"
bitfld.long 0x00 6. "    PC6          ,Physical core WFE status bit 6" "Not in WFE,In WFE"
bitfld.long 0x00 5. "    PC5          ,Physical core WFE status bit 5" "Not in WFE,In WFE"
newline
bitfld.long 0x00 4. " PC4          ,Physical core WFE status bit 4" "Not in WFE,In WFE"
bitfld.long 0x00 3. "    PC3          ,Physical core WFE status bit 3" "Not in WFE,In WFE"
bitfld.long 0x00 2. "    PC2          ,Physical core WFE status bit 2" "Not in WFE,In WFE"
newline
bitfld.long 0x00 1. " PC1          ,Physical core WFE status bit 1" "Not in WFE,In WFE"
bitfld.long 0x00 0. "    PC0          ,Physical core WFE status bit 0" "Not in WFE,In WFE"
group.long 0x820++0x03
line.long 0x00 "PCPH20SR_SET/CLR,Physical Core PH20 Status Register"
setclrfld.long 0x00 17. 0x04 17. 0x08 17. " PC17         ,Physical core PH20 status bit 17" "Not in PH20,In PH20"
setclrfld.long 0x00 16. 0x04 16. 0x08 16. "   PC16         ,Physical core PH20 status bit 16" "Not in PH20,In PH20"
setclrfld.long 0x00 15. 0x04 15. 0x08 15. "   PC15         ,Physical core PH20 status bit 15" "Not in PH20,In PH20"
newline
setclrfld.long 0x00 14. 0x04 14. 0x08 14. " PC14         ,Physical core PH20 status bit 14" "Not in PH20,In PH20"
setclrfld.long 0x00 13. 0x04 13. 0x08 13. "   PC13         ,Physical core PH20 status bit 13" "Not in PH20,In PH20"
setclrfld.long 0x00 12. 0x04 12. 0x08 12. "   PC12         ,Physical core PH20 status bit 12" "Not in PH20,In PH20"
newline
setclrfld.long 0x00 11. 0x04 11. 0x08 11. " PC11         ,Physical core PH20 status bit 11" "Not in PH20,In PH20"
setclrfld.long 0x00 10. 0x04 10. 0x08 10. "   PC10         ,Physical core PH20 status bit 10" "Not in PH20,In PH20"
setclrfld.long 0x00 9. 0x04 9. 0x08 9. "   PC9          ,Physical core PH20 status bit 9" "Not in PH20,In PH20"
newline
setclrfld.long 0x00 8. 0x04 8. 0x08 8. " PC8          ,Physical core PH20 status bit 8" "Not in PH20,In PH20"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. "   PC7          ,Physical core PH20 status bit 7" "Not in PH20,In PH20"
setclrfld.long 0x00 6. 0x04 6. 0x08 6. "   PC6          ,Physical core PH20 status bit 6" "Not in PH20,In PH20"
newline
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " PC5          ,Physical core PH20 status bit 5" "Not in PH20,In PH20"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. "   PC4          ,Physical core PH20 status bit 4" "Not in PH20,In PH20"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "   PC3          ,Physical core PH20 status bit 3" "Not in PH20,In PH20"
newline
setclrfld.long 0x00 2. 0x04 2. 0x08 2. " PC2          ,Physical core PH20 status bit 2" "Not in PH20,In PH20"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "   PC1          ,Physical core PH20 status bit 1" "Not in PH20,In PH20"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "   PC0          ,Physical core PH20 status bit 0" "Not in PH20,In PH20"
group.long 0x82C++0x03
line.long 0x00 "PCPH20PSR,Physical Core PH20 Previous Status Register"
eventfld.long 0x00 17. " PC_P_PH20_17 ,Physical core PH20 previous status bit 17" "Not in PH20,In PH20"
eventfld.long 0x00 16. "   PC_P_PH20_16 ,Physical core PH20 previous status bit 16" "Not in PH20,In PH20"
eventfld.long 0x00 15. "   PC_P_PH20_15 ,Physical core PH20 previous status bit 15" "Not in PH20,In PH20"
newline
eventfld.long 0x00 14. " PC_P_PH20_14 ,Physical core PH20 previous status bit 14" "Not in PH20,In PH20"
eventfld.long 0x00 13. "   PC_P_PH20_13 ,Physical core PH20 previous status bit 13" "Not in PH20,In PH20"
eventfld.long 0x00 12. "   PC_P_PH20_12 ,Physical core PH20 previous status bit 12" "Not in PH20,In PH20"
newline
eventfld.long 0x00 11. " PC_P_PH20_11 ,Physical core PH20 previous status bit 11" "Not in PH20,In PH20"
eventfld.long 0x00 10. "   PC_P_PH20_10 ,Physical core PH20 previous status bit 10" "Not in PH20,In PH20"
eventfld.long 0x00 9. "   PC_P_PH20_9  ,Physical core PH20 previous status bit 9" "Not in PH20,In PH20"
newline
eventfld.long 0x00 8. " PC_P_PH20_8  ,Physical core PH20 previous status bit 8" "Not in PH20,In PH20"
eventfld.long 0x00 7. "   PC_P_PH20_7  ,Physical core PH20 previous status bit 7" "Not in PH20,In PH20"
eventfld.long 0x00 6. "   PC_P_PH20_6  ,Physical core PH20 previous status bit 6" "Not in PH20,In PH20"
newline
eventfld.long 0x00 5. " PC_P_PH20_5  ,Physical core PH20 previous status bit 5" "Not in PH20,In PH20"
eventfld.long 0x00 4. "   PC_P_PH20_4  ,Physical core PH20 previous status bit 4" "Not in PH20,In PH20"
eventfld.long 0x00 3. "   PC_P_PH20_3  ,Physical core PH20 previous status bit 3" "Not in PH20,In PH20"
newline
eventfld.long 0x00 2. " PC_P_PH20_2  ,Physical core PH20 previous status bit 2" "Not in PH20,In PH20"
eventfld.long 0x00 1. "   PC_P_PH20_1  ,Physical core PH20 previous status bit 1" "Not in PH20,In PH20"
eventfld.long 0x00 0. "   PC_P_PH20_0  ,Physical core PH20 previous status bit 0" "Not in PH20,In PH20"
rgroup.long 0x830++0x03
line.long 0x00 "PCPW20SR,Physical Core PW20 Status Register"
bitfld.long 0x00 7. " PC7          ,Physical core PW20 status bit 7" "Not in PW20,In PW20"
bitfld.long 0x00 6. "   PC6          ,Physical core PW20 status bit 6" "Not in PW20,In PW20"
bitfld.long 0x00 5. "   PC5          ,Physical core PW20 status bit 5" "Not in PW20,In PW20"
newline
bitfld.long 0x00 4. " PC4          ,Physical core PW20 status bit 4" "Not in PW20,In PW20"
bitfld.long 0x00 3. "   PC3          ,Physical core PW20 status bit 3" "Not in PW20,In PW20"
bitfld.long 0x00 2. "   PC2          ,Physical core PW20 status bit 2" "Not in PW20,In PW20"
newline
bitfld.long 0x00 1. " PC1          ,Physical core PW20 status bit 1" "Not in PW20,In PW20"
bitfld.long 0x00 0. "   PC0          ,Physical core PW20 status bit 0" "Not in PW20,In PW20"
group.long 0x83C++0x03
line.long 0x00 "PCRETCR,Physical Core State Retention Configuration Register"
bitfld.long 0x00 17. " PC_RET_EN17  ,Enables physical core 17 state retention" "Disabled,Enabled"
bitfld.long 0x00 16. "      PC_RET_EN16  ,Enables physical core 16 state retention" "Disabled,Enabled"
bitfld.long 0x00 15. "      PC_RET_EN15  ,Enables physical core 15 state retention" "Disabled,Enabled"
newline
bitfld.long 0x00 14. " PC_RET_EN14  ,Enables physical core 14 state retention" "Disabled,Enabled"
bitfld.long 0x00 13. "      PC_RET_EN13  ,Enables physical core 13 state retention" "Disabled,Enabled"
bitfld.long 0x00 12. "      PC_RET_EN12  ,Enables physical core 12 state retention" "Disabled,Enabled"
newline
bitfld.long 0x00 11. " PC_RET_EN11  ,Enables physical core 11 state retention" "Disabled,Enabled"
bitfld.long 0x00 10. "      PC_RET_EN10  ,Enables physical core 10 state retention" "Disabled,Enabled"
bitfld.long 0x00 9. "      PC_RET_EN9   ,Enables physical core 9 state retention" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " PC_RET_EN8   ,Enables physical core 8 state retention" "Disabled,Enabled"
bitfld.long 0x00 7. "      PC_RET_EN7   ,Enables physical core 7 state retention" "Disabled,Enabled"
bitfld.long 0x00 6. "      PC_RET_EN6   ,Enables physical core 6 state retention" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " PC_RET_EN5   ,Enables physical core 5 state retention" "Disabled,Enabled"
bitfld.long 0x00 4. "      PC_RET_EN4   ,Enables physical core 4 state retention" "Disabled,Enabled"
bitfld.long 0x00 3. "      PC_RET_EN3   ,Enables physical core 3 state retention" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " PC_RET_EN2   ,Enables physical core 2 state retention" "Disabled,Enabled"
bitfld.long 0x00 1. "      PC_RET_EN1   ,Enables physical core 1 state retention" "Disabled,Enabled"
bitfld.long 0x00 0. "      PC_RET_EN0   ,Enables physical core 0 state retention" "Disabled,Enabled"
group.long 0x840++0x03
line.long 0x00 "PCPH30SR,Physical Core PH30 Status Register"
bitfld.long 0x00 17. " PC17         ,Physical core PH30 status bit 17" "Not in PH30,In PH30"
bitfld.long 0x00 16. "   PC16         ,Physical core PH30 status bit 16" "Not in PH30,In PH30"
bitfld.long 0x00 15. "   PC15         ,Physical core PH30 status bit 15" "Not in PH30,In PH30"
newline
bitfld.long 0x00 14. " PC14         ,Physical core PH30 status bit 14" "Not in PH30,In PH30"
bitfld.long 0x00 13. "   PC13         ,Physical core PH30 status bit 13" "Not in PH30,In PH30"
bitfld.long 0x00 12. "   PC12         ,Physical core PH30 status bit 12" "Not in PH30,In PH30"
newline
bitfld.long 0x00 11. " PC11         ,Physical core PH30 status bit 11" "Not in PH30,In PH30"
bitfld.long 0x00 10. "   PC10         ,Physical core PH30 status bit 10" "Not in PH30,In PH30"
bitfld.long 0x00 9. "   PC9          ,Physical core PH30 status bit 9" "Not in PH30,In PH30"
newline
bitfld.long 0x00 8. " PC8          ,Physical core PH30 status bit 8" "Not in PH30,In PH30"
bitfld.long 0x00 7. "   PC7          ,Physical core PH30 status bit 7" "Not in PH30,In PH30"
bitfld.long 0x00 6. "   PC6          ,Physical core PH30 status bit 6" "Not in PH30,In PH30"
newline
bitfld.long 0x00 5. " PC5          ,Physical core PH30 status bit 5" "Not in PH30,In PH30"
bitfld.long 0x00 4. "   PC4          ,Physical core PH30 status bit 4" "Not in PH30,In PH30"
bitfld.long 0x00 3. "   PC3          ,Physical core PH30 status bit 3" "Not in PH30,In PH30"
newline
bitfld.long 0x00 2. " PC2          ,Physical core PH30 status bit 2" "Not in PH30,In PH30"
bitfld.long 0x00 1. "   PC1          ,Physical core PH30 status bit 1" "Not in PH30,In PH30"
bitfld.long 0x00 0. "   PC0          ,Physical core PH30 status bit 0" "Not in PH30,In PH30"
group.long 0x8A0++0x07
line.long 0x00 "PCTBENR,Physical Core Time Base Enable Register"
bitfld.long 0x00 17. " PCTBEN17     ,Core timebase enable bit 17" "Disabled,Enabled"
bitfld.long 0x00 16. "      PCTBEN16     ,Core timebase enable bit 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      PCTBEN15     ,Core timebase enable bit 15" "Disabled,Enabled"
newline
bitfld.long 0x00 14. " PCTBEN14     ,Core timebase enable bit 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      PCTBEN13     ,Core timebase enable bit 13" "Disabled,Enabled"
bitfld.long 0x00 12. "      PCTBEN12     ,Core timebase enable bit 12" "Disabled,Enabled"
newline
bitfld.long 0x00 11. " PCTBEN11     ,Core timebase enable bit 11" "Disabled,Enabled"
bitfld.long 0x00 10. "      PCTBEN10     ,Core timebase enable bit 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      PCTBEN9      ,Core timebase enable bit 9" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " PCTBEN8      ,Core timebase enable bit 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      PCTBEN7      ,Core timebase enable bit 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      PCTBEN6      ,Core timebase enable bit 6" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " PCTBEN5      ,Core timebase enable bit 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      PCTBEN4      ,Core timebase enable bit 4" "Disabled,Enabled"
bitfld.long 0x00 3. "      PCTBEN3      ,Core timebase enable bit 3" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " PCTBEN2      ,Core timebase enable bit 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      PCTBEN1      ,Core timebase enable bit 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      PCTBEN0      ,Core timebase enable bit 0" "Disabled,Enabled"
line.long 0x04 "PCTBCKSELR,Physical Core Time Base Clock Select Register"
bitfld.long 0x04 7. " PCTBCKSEL7   ,Core timebase input clock select bit 7" "Platform CLK,RTC signal"
bitfld.long 0x04 6. "  PCTBCKSEL6   ,Core timebase input clock select bit 6" "Platform CLK,RTC signal"
bitfld.long 0x04 5. "  PCTBCKSEL5   ,Core timebase input clock select bit 5" "Platform CLK,RTC signal"
newline
bitfld.long 0x04 4. " PCTBCKSEL4   ,Core timebase input clock select bit 4" "Platform CLK,RTC signal"
bitfld.long 0x04 3. "  PCTBCKSEL3   ,Core timebase input clock select bit 3" "Platform CLK,RTC signal"
bitfld.long 0x04 2. "  PCTBCKSEL2   ,Core timebase input clock select bit 2" "Platform CLK,RTC signal"
newline
bitfld.long 0x04 1. " PCTBCKSEL1   ,Core timebase input clock select bit 1" "Platform CLK,RTC signal"
bitfld.long 0x04 0. "  PCTBCKSEL0   ,Core timebase input clock select bit 0" "Platform CLK,RTC signal"
rgroup.long 0x8A8++0x03
line.long 0x00 "TBCLKDIVR,Time Base Clock Divider Register"
bitfld.long 0x00 0.--4. " TBCLKDIV     ,Timebase clock divider configuration" "/16,/4,/8,/12,/16,/20,/24,/28,/32,/36,/40,/44,/48,/52,/56,/60,/64,?..."
tree.end
tree "Clusters registers"
width 23.
group.long 0x1000++0x03
line.long 0x00 "CLPCL10SR_SET/CLR,Cluster PCL10 (Stop) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4          ,Cluster 4 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "   CL3             ,Cluster 3 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "   CL2          ,Cluster 2 PCL10 status" "Not in PCL10,In PCL10"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1          ,Cluster 1 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "   CL0             ,Cluster 0 PCL10 status" "Not in PCL10,In PCL10"
group.long 0x100C++0x03
line.long 0x00 "CLPCL10PSR,Cluster PCL10 (Stop) Previous Status Register"
eventfld.long 0x00 4. " CL_P_PCL10_4 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 3. "   CL_P_PCL10_3    ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 2. "   CL_P_PCL10_2 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
newline
eventfld.long 0x00 1. " CL_P_PCL10_1 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 0. "   CL_P_PCL10_0    ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
group.long 0x1020++0x03
line.long 0x00 "CLPCL20SR_SET/CLR,Cluster PCL20 (Retain) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4          ,Cluster 4 PCL20 status" "Not in PCL20,In PCL20"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "   CL3             ,Cluster 3 PCL20 status" "Not in PCL20,In PCL20"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "   CL2          ,Cluster 2 PCL20 status" "Not in PCL20,In PCL20"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1          ,Cluster 1 PCL20 status" "Not in PCL20,In PCL20"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "   CL0             ,Cluster 0 PCL20 status" "Not in PCL20,In PCL20"
group.long 0x102C++0x03
line.long 0x00 "CLPCL20PSR,Cluster PCL20 (Retain) Previous Status Register"
eventfld.long 0x00 4. " CL_P_PCL20_4 ,Cluster PCL20 previous status" "Not in PCL20,In PCL20"
eventfld.long 0x00 3. "   CL_P_PCL20_3    ,Cluster PCL20 previous status" "Not in PCL20,In PCL20"
eventfld.long 0x00 2. "   CL_P_PCL20_2 ,Cluster PCL20 previous status" "Not in PCL20,In PCL20"
newline
eventfld.long 0x00 1. " CL_P_PCL20_1 ,Cluster PCL20 previous status" "Not in PCL20,In PCL20"
eventfld.long 0x00 0. "   CL_P_PCL20_0    ,Cluster PCL20 previous status" "Not in PCL20,In PCL20"
group.long 0x1060++0x03
line.long 0x00 "CLWAKEEVENTDLYR,Cluster Wakeup Event Delay Register"
bitfld.long 0x00 16.--19. " EVENTI_DLY   ,EVENTI delay [cycles]" "0,1,4,16,64,256,1024,4096,16384,?..."
bitfld.long 0x00 0.--3. "          CLREXMONREQ_DLY ,CLREXMONREQ delay" "0,1,4,16,64,256,1024,4096,16384,?..."
group.long 0x1100++0x03
line.long 0x00 "CLAINACTSETR_SET/CLR,Cluster ACP AINACTS Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLAINACT3    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "       CLAINACT2       ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "       CLAINACT1    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLAINACT0    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
group.long 0x1108++0x03
line.long 0x00 "CLSINACTSETR_SET/CLR,Cluster Skyros SINACT Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLSINACT3    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "       CLSINACT2       ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "       CLSINACT1    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLSINACT0    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
group.long 0x1110++0x03
line.long 0x00 "CLL2FLUSHSETR_SET/CLR,Cluster L2FLUSH Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLL2FLUSH3   ,Requests the cluster 3 to flush its L2 cache" "Not requested,Requested"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "  CLL2FLUSH2      ,Requests the cluster 2 to flush its L2 cache" "Not requested,Requested"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "  CLL2FLUSH1   ,Requests the cluster 1 to flush its L2 cache" "Not requested,Requested"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLL2FLUSH0   ,Requests the cluster 0 to flush its L2 cache" "Not requested,Requested"
rgroup.long 0x1118++0x03
line.long 0x00 "CLL2FLUSHSR,Cluster L2 FLUSH Done Status Register"
bitfld.long 0x00 3. " CL3          ,Cluster 3 L2 flush status" "Not flushed,Flushed"
bitfld.long 0x00 2. "    CL2             ,Cluster 2 L2 flush status" "Not flushed,Flushed"
bitfld.long 0x00 1. "    CL1          ,Cluster 1 L2 flush status" "Not flushed,Flushed"
newline
bitfld.long 0x00 0. " CL0          ,Cluster 0 L2 flush status" "Not flushed,Flushed"
group.long 0x18A0++0x03
line.long 0x00 "CLTBENR,Cluster Time Base Enable Register"
bitfld.long 0x00 3. " CLTBEN3      ,Cluster 3 Timebase Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       CLTBEN2         ,Cluster 2 Timebase Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       CLTBEN1      ,Cluster 1 Timebase Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CLTBEN0      ,Cluster 0 Timebase Enable" "Disabled,Enabled"
tree.end
tree "Cluster domain registers"
width 19.
group.long 0x2000++0x03
line.long 0x00 "DMPDM10SR_SET/CLR,Cluster Domain DM10 (Halt) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4         ,Cluster domain 4 DM10 status" "Not in DM10,In DM10"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CL3         ,Cluster domain 3 DM10 status" "Not in DM10,In DM10"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CL2         ,Cluster domain 2 DM10 status" "Not in DM10,In DM10"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1         ,Cluster domain 1 DM10 status" "Not in DM10,In DM10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CL0         ,Cluster domain 0 DM10 status" "Not in DM10,In DM10"
group.long 0x200C++0x03
line.long 0x00 "DMPDM10PSR,Cluster Domain DM10 (Halt) Previous Status Register"
eventfld.long 0x00 4. " CL_P_DM10_4 ,Cluster domain DM10 previous status" "Not in DM10,In DM10"
eventfld.long 0x00 3. "  CL_P_DM10_3 ,Cluster domain DM10 previous status" "Not in DM10,In DM10"
eventfld.long 0x00 2. "  CL_P_DM10_2 ,Cluster domain DM10 previous status" "Not in DM10,In DM10"
newline
eventfld.long 0x00 1. " CL_P_DM10_1 ,Cluster domain DM10 previous status" "Not in DM10,In DM10"
eventfld.long 0x00 0. "  CL_P_DM10_0 ,Cluster domain DM10 previous status" "Not in DM10,In DM10"
group.long 0x2020++0x03
line.long 0x00 "DMPDM15SR_SET/CLR,Cluster Domain DM15 (Stop) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4         ,Cluster domain 4 DM15 status" "Not in DM15,In DM15"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CL3         ,Cluster domain 3 DM15 status" "Not in DM15,In DM15"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CL2         ,Cluster domain 2 DM15 status" "Not in DM15,In DM15"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1         ,Cluster domain 1 DM15 status" "Not in DM15,In DM15"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CL0         ,Cluster domain 0 DM15 status" "Not in DM15,In DM15"
group.long 0x202C++0x03
line.long 0x00 "DMPDM15PSR,Cluster Domain DM15 (Stop) Previous Status Register"
eventfld.long 0x00 4. " CL_P_DM15_4 ,Cluster domain DM15 previous status" "Not in DM15,In DM15"
eventfld.long 0x00 3. "  CL_P_DM15_3 ,Cluster domain DM15 previous status" "Not in DM15,In DM15"
eventfld.long 0x00 2. "  CL_P_DM15_2 ,Cluster domain DM15 previous status" "Not in DM15,In DM15"
newline
eventfld.long 0x00 1. " CL_P_DM15_1 ,Cluster domain DM15 previous status" "Not in DM15,In DM15"
eventfld.long 0x00 0. "  CL_P_DM15_0 ,Cluster domain DM15 previous status" "Not in DM15,In DM15"
group.long 0x2040++0x03
line.long 0x00 "DMPDM20SR_SET/CLR,Cluster Domain DM20 (Retain) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4         ,Cluster domain 4 DM20 status" "Not in DM20,In DM20"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "  CL3         ,Cluster domain 3 DM20 status" "Not in DM20,In DM20"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  CL2         ,Cluster domain 2 DM20 status" "Not in DM20,In DM20"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1         ,Cluster domain 1 DM20 status" "Not in DM20,In DM20"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "  CL0         ,Cluster domain 0 DM20 status" "Not in DM20,In DM20"
group.long 0x204C++0x03
line.long 0x00 "DMPDM20PSR,Cluster Domain DM20 (Retain) Previous Status Register"
eventfld.long 0x00 4. " CL_P_DM20_4 ,Cluster domain DM20 previous status" "Not in DM20,In DM20"
eventfld.long 0x00 3. "  CL_P_DM20_3 ,Cluster domain DM20 previous status" "Not in DM20,In DM20"
eventfld.long 0x00 2. "  CL_P_DM20_2 ,Cluster domain DM20 previous status" "Not in DM20,In DM20"
newline
eventfld.long 0x00 1. " CL_P_DM20_1 ,Cluster domain DM20 previous status" "Not in DM20,In DM20"
eventfld.long 0x00 0. "  CL_P_DM20_0 ,Cluster domain DM20 previous status" "Not in DM20,In DM20"
tree.end
tree "Domain registers"
width 12.
group.long 0x4000++0x03
line.long 0x00 "POWMGTCSR,Power Management Control And Status Register"
bitfld.long 0x00 31. " LYNX_PD        ,Lynx and protocol converter powerdown control in LPM" "Not powerdown,Powerdown"
bitfld.long 0x00 20. "  LPM20_RQ      ,LPM20 mode request" "Not requested,Requested"
bitfld.long 0x00 17. "  LPM35_RQ   ,LPM35 mode request" "Not requested,Requested"
newline
bitfld.long 0x00 16. " LPM40_RQ       ,LPM40 mode request" "Not requested,Requested"
rbitfld.long 0x00 9. "  LPM20_ST      ,Indicates whenever device is attempting to reach LPM20 mode" "Not attempted,Attempted"
eventfld.long 0x00 8. "  P_LPM20_ST ,Previous LPM20 status" "Not in LPM20,In LPM20"
newline
rbitfld.long 0x00 2. " LPM35_ST       ,Indicates whenever device is attempting to reach LPM35 mode" "Not attempted,Attempted"
rbitfld.long 0x00 1. "  LPM40_ST      ,Indicates whenever device is attempting to reach LPM40 mode" "Not attempted,Attempted"
group.long 0x4040++0x03
line.long 0x00 "IPPDEXPCR0,IP Powerdown Exception Control Register 0"
bitfld.long 0x00 25. " DCE            ,DCE powerdown" "Powerdown,Powerup"
bitfld.long 0x00 22. "      SEC           ,SEC powerdown" "Powerdown,Powerup"
bitfld.long 0x00 20. "      PME        ,PME powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 16. " SATA1_SAS1_FC1 ,SATA1/SAS1/FC1 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 13. "      USB2          ,USB2 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 12. "      USB1       ,USB1 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 8. " QDMA           ,QDMA powerdown" "Powerdown,Powerup"
bitfld.long 0x00 2. "      ESDHC         ,eSDHC powerdown" "Powerdown,Powerup"
group.long 0x4044++0x03
line.long 0x00 "IPPDEXPCR1,IP Powerdown Exception Control Register 1"
bitfld.long 0x00 15. " MAC_15         ,MAC_15 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 14. "      MAC_14        ,MAC_14 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 13. "      MAC_13     ,MAC_13 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 12. " MAC_12         ,MAC_12 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 11. "      MAC_11        ,MAC_11 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 10. "      MAC_10     ,MAC_10 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 9. " MAC_9          ,MAC_9 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 8. "      MAC_8         ,MAC_8 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 7. "      MAC_7      ,MAC_7 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 6. " MAC_6          ,MAC_6 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 5. "      MAC_5         ,MAC_5 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 4. "      MAC_4      ,MAC_4 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 3. " MAC_3          ,MAC_3 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 2. "      MAC_2         ,MAC_2 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 1. "      MAC_1      ,MAC_1 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 0. " MAC_0          ,MAC_0 powerdown" "Powerdown,Powerup"
group.long 0x4048++0x03
line.long 0x00 "IPPDEXPCR2,IP Powerdown Exception Control Register 2"
bitfld.long 0x00 16. " AIOP           ,AIOP powerdown" "Powerdown,Powerup"
bitfld.long 0x00 13. "      MC            ,MC powerdown" "Powerdown,Powerup"
bitfld.long 0x00 12. "      QBMAN      ,QBMAN powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 3. " PEX4           ,PEX4 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 2. "      PEX3          ,PEX3 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 1. "      PEX2       ,PEX2 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 0. " PEX1           ,PEX1 powerdown" "Powerdown,Powerup"
group.long 0x404C++0x03
line.long 0x00 "IPPDEXPCR3,IP Powerdown Exception Control Register 3"
bitfld.long 0x00 9. " I2C4           ,I2C4 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 8. "      I2C3          ,I2C3 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 5. "      SPI        ,SPI powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 4. " QSPI           ,QSPI powerdown" "Powerdown,Powerup"
bitfld.long 0x00 3. "      DUART2        ,DUART2 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 2. "      DUART1     ,DUART1 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 1. " I2C2           ,I2C2 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 0. "      I2C1          ,I2C1 powerdown" "Powerdown,Powerup"
group.long 0x4050++0x03
line.long 0x00 "IPPDEXPCR4,IP Powerdown Exception Control Register 4"
bitfld.long 0x00 20. " PEBM           ,PEBM powerdown" "Powerdown,Powerup"
bitfld.long 0x00 14. "      FLEXTIMERS1_4 ,FlexTimers 1 - 4 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 13. "      TMU        ,TMU powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 12. " OCRAM          ,OCRAM powerdown" "Powerdown,Powerup"
bitfld.long 0x00 11. "      NAL           ,NAL powerdown" "Powerdown,Powerup"
bitfld.long 0x00 10. "      DBG        ,DBG powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 9. " GPIO           ,GPIO powerdown" "Powerdown,Powerup"
bitfld.long 0x00 8. "      IFC           ,IFC powerdown" "Powerdown,Powerup"
bitfld.long 0x00 7. "      DP_DDR1    ,DP_DDR1 powerdown" "Powerdown,Powerup"
newline
bitfld.long 0x00 1. " DDR2           ,DDR2 powerdown" "Powerdown,Powerup"
bitfld.long 0x00 0. "      DDR1          ,DDR1 powerdown" "Powerdown,Powerup"
group.long 0x4054++0x03
line.long 0x00 "IPPDEXPCR5,IP Powerdown Exception Control Register 5"
bitfld.long 0x00 0. " WRIOP          ,WRIOP powerdown" "Powerdown,Powerup"
rgroup.long 0xFBF8++0x07
line.long 0x00 "IPREV1R,IP Revision Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID          ,Revision ID"
hexmask.long.byte 0x00 8.--15. 1. "           IP_MJ         ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "             IP_MN      ,Minor revision"
line.long 0x04 "IPREV2R,IP Revision Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT         ,IP_INT"
hexmask.long.byte 0x04 0.--7. 1. "             IP_CFG        ,IP_CFG"
group.long 0xC000++0x03
line.long 0x00 "RSTCR,Cluster Domain Warm Reset Control Register"
bitfld.long 0x00 0. " REQ            ,AIOP tile reset" "Not requested,Requested"
group.long 0xC020++0x03
line.long 0x00 "RSTEXPCR,Cluster Domain Warm Reset Disable Control Register"
bitfld.long 0x00 4. " DM_RST_RQ4     ,Cluster domain 4 warm reset disable" "No,Yes"
bitfld.long 0x00 3. "            DM_RST_RQ3    ,Cluster domain 3 warm reset disable" "No,Yes"
bitfld.long 0x00 2. "            DM_RST_RQ2 ,Cluster domain 2 warm reset disable" "No,Yes"
newline
bitfld.long 0x00 1. " DM_RST_RQ1     ,Cluster domain 1 warm reset disable" "No,Yes"
bitfld.long 0x00 0. "            DM_RST_RQ0    ,Cluster domain 0 warm reset disable" "No,Yes"
tree.end
width 0x0B
tree.end
; tree "COP_PMU_DCSR"
; base ad:0xFFFFFFFF
; %include ls20xx/dpaa2/pmu_dcsr.ph
; tree.end
tree.end
tree.end
tree.open "CCI (Cache Coherent Interconnect)"
tree "MN Registers"
base ad:0x04000000
width 15.
group.quad 0x00++0x0F
line.quad 0x00 "SECURE_ACCESS,Secure Access Register"
bitfld.quad 0x00 2. " SECURE_DEBUG_DISABLE   ,Secure debug disable" "No,Yes"
newline
bitfld.quad 0x00 0. " SECURE_ACCESS          ,Enables non-secure access to secure registers" "Disabled,Enabled"
line.quad 0x08 "ERRINT_STATUS,Error Interrupt Status Register"
bitfld.quad 0x08 7. " DATA_INT_STATUS3       ,Disable interrupt for PMU event" "No,Yes"
newline
bitfld.quad 0x08 6. " DATA_INT_STATUS2       ,Disable interrupt for corrected error" "No,Yes"
newline
bitfld.quad 0x08 5. " DATA_INT_STATUS1       ,Disable interrupt for all errors including corrected errors" "No,Yes"
newline
bitfld.quad 0x08 4. " DATA_INT_STATUS0       ,Deassert the INTREQ interrupt signal" "Not deasserted,Deasserted"
newline
bitfld.quad 0x08 3. " WRITE_MASK_INT_STATUS3 ,PMU event mask" "Not masked,Masked"
newline
bitfld.quad 0x08 2. " WRITE_MASK_INT_STATUS2 ,Corrected error mask" "Not masked,Masked"
newline
bitfld.quad 0x08 1. " WRITE_MASK_INT_STATUS1 ,All error mask" "Not masked,Masked"
newline
bitfld.quad 0x08 0. " WRITE_MASK_INT_STATUS0 ,Deassert the INTREQ interrupt signal" "Not deasserted,Deasserted"
newline
width 27.
rgroup.quad 0x180++0x07
line.quad 0x00 "OLY_RNF_NODEID_LIST,RN-F Node ID Register"
bitfld.quad 0x00 63. " OLY_RNF_NODEID_LIST[63]    ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,RN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,RN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,RN-F Node ID n presence" "Not present,Present"
rgroup.quad 0x190++0x07
line.quad 0x00 "OLY_RNI_NODEID_LIST,RN-I Node ID Register"
bitfld.quad 0x00 63. " OLY_RNI_NODEID_LIST[63]    ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,RN-I Node ID Register" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,RN-I Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,RN-I Node ID Register" "Not present,Present"
newline
rgroup.quad 0x1A0++0x07
line.quad 0x00 "OLY_RNIDVM_NODEID_LIST,RN-D Node ID Register"
bitfld.quad 0x00 63. " OLY_RNIDVM_NODEID_LIST[63] ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,RN-D Node ID Register" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,RN-D Node ID Register" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,RN-D Node ID Register" "Not present,Present"
newline
rgroup.quad 0x1B0++0x07
line.quad 0x00 "OLY_HNF_NODEID_LIST,HN-F Node ID Register"
bitfld.quad 0x00 63. " OLY_HNF_NODEID_LIST[63]    ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,HN-F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,HN-F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,HN-F Node ID n presence" "Not present,Present"
rgroup.quad 0x1C0++0x07
line.quad 0x00 "OLY_HNI_NODEID_LIST,HN-I Node ID Register"
bitfld.quad 0x00 63. " OLY_HNI_NODEID_LIST[63]    ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,HN-I Node ID n presence" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,HN-I Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,HN-I Node ID n presence" "Not present,Present"
rgroup.quad 0x1D0++0x07
line.quad 0x00 "OLY_SN_NODEID_LIST,SN Node ID Register"
bitfld.quad 0x00 63. " OLY_SN_NODEID_LIST[63]     ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 7. "  [7]   ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 6. " [6]                        ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,SN_F Node ID n presence" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,SN_F Node ID n presence" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,Bit vector of NodeIDs for SN-F ports" "Not present,Present"
newline
rgroup.quad 0x1E0++0x1F
line.quad 0x00 "OLY_CFG_COMP_LIST_63_0,Component List [63:0] Register"
bitfld.quad 0x00 63. " OLY_CFG_COMP_LIST[63]      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 62. "  [62]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 61. "  [61]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 60. " [60]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 59. "  [59]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 58. "  [58]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 57. " [57]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 56. "  [56]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 55. "  [55]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 54. " [54]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 53. "  [53]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 52. "  [52]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 51. " [51]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 50. "  [50]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 49. "  [49]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 48. " [48]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 47. "  [47]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 46. "  [46]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 45. " [45]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 44. "  [44]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 43. "  [43]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 42. " [42]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 41. "  [41]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 40. "  [40]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 39. " [39]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 38. "  [38]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 37. "  [37]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 36. " [36]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 35. "  [35]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 34. "  [34]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 33. " [33]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 32. "  [32]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 31. "  [31]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 30. " [30]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 29. "  [29]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 28. "  [28]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 27. " [27]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 26. "  [26]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 25. "  [25]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 24. " [24]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 23. "  [23]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 22. "  [22]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 21. " [21]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 20. "  [20]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 19. "  [19]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 18. " [18]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 17. "  [17]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 16. "  [16]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 15. " [15]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 14. "  [14]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 13. "  [13]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 12. " [12]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 11. "  [11]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 10. "  [10]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 9. " [9]                        ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 8. "  [8]   ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 6. "  [6]   ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 7. " [7]                        ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 5. "  [5]   ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 4. "  [4]   ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 3. " [3]                        ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 2. "  [2]   ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x00 1. "  [1]   ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x00 0. " [0]                        ,Configuration component n presence" "Not present,Present"
line.quad 0x08 "OLY_CFG_COMP_LIST_127_64,Component List [127:64] Register"
bitfld.quad 0x08 63. " OLY_CFG_COMP_LIST[127]     ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 62. "  [126] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 61. "  [125] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 60. " [124]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 59. "  [123] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 58. "  [122] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 57. " [121]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 56. "  [120] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 55. "  [119] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 54. " [118]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 53. "  [117] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 52. "  [116] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 51. " [115]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 50. "  [114] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 49. "  [113] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 48. " [112]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 47. "  [111] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 46. "  [110] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 45. " [109]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 44. "  [108] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 43. "  [107] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 42. " [106]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 41. "  [105] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 40. "  [104] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 39. " [103]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 38. "  [102] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 37. "  [101] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 36. " [100]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 35. "  [99]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 34. "  [98]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 33. " [97]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 32. "  [96]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 31. "  [95]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 30. " [94]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 29. "  [93]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 28. "  [92]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 27. " [91]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 26. "  [90]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 25. "  [89]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 24. " [88]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 23. "  [87]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 22. "  [86]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 21. " [85]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 20. "  [84]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 19. "  [83]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 18. " [82]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 17. "  [81]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 16. "  [80]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 15. " [79]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 14. "  [78]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 13. "  [77]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 12. " [76]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 11. "  [75]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 10. "  [74]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 9. " [73]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 8. "  [72]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 7. "  [71]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 6. " [70]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 5. "  [69]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 4. "  [68]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 3. " [67]                       ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 2. "  [66]  ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x08 1. "  [65]  ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x08 0. " [64]                       ,Configuration component n presence" "Not present,Present"
line.quad 0x10 "OLY_CFG_COMP_LIST_191_128,Component List [191:128] Register"
bitfld.quad 0x10 63. " OLY_CFG_COMP_LIST[191]     ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 62. "  [190] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 61. "  [189] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 60. " [188]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 59. "  [187] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 58. "  [186] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 57. " [185]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 56. "  [184] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 55. "  [183] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 54. " [182]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 53. "  [181] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 52. "  [180] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 51. " [179]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 50. "  [178] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 49. "  [177] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 48. " [176]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 47. "  [175] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 46. "  [174] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 45. " [173]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 44. "  [172] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 43. "  [171] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 42. " [170]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 41. "  [169] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 40. "  [168] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 39. " [167]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 38. "  [166] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 37. "  [165] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 36. " [164]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 35. "  [163] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 34. "  [162] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 33. " [161]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 32. "  [160] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 31. "  [159] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 30. " [158]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 29. "  [157] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 28. "  [156] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 27. " [155]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 26. "  [154] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 25. "  [153] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 24. " [152]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 23. "  [151] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 22. "  [150] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 21. " [149]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 20. "  [148] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 19. "  [147] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 18. " [146]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 17. "  [145] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 16. "  [144] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 15. " [143]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 14. "  [142] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 13. "  [141] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 12. " [140]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 11. "  [139] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 10. "  [138] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 9. " [137]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 8. "  [136] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 7. "  [135] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 6. " [134]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 5. "  [133] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 4. "  [132] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 3. " [131]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 2. "  [130] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x10 1. "  [129] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x10 0. " [128]                      ,Configuration component n presence" "Not present,Present"
line.quad 0x18 "OLY_CFG_COMP_LIST_255_192,Component List [255:192] Register"
bitfld.quad 0x18 63. " OLY_CFG_COMP_LIST[255]     ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 62. "  [254] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 61. "  [253] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 60. " [252]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 59. "  [251] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 58. "  [250] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 57. " [249]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 56. "  [248] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 55. "  [247] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 54. " [246]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 53. "  [245] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 52. "  [244] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 51. " [243]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 50. "  [242] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 49. "  [241] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 48. " [240]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 47. "  [239] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 46. "  [238] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 45. " [237]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 44. "  [236] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 43. "  [235] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 42. " [234]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 41. "  [233] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 40. "  [232] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 39. " [231]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 38. "  [230] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 37. "  [229] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 36. " [228]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 35. "  [227] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 34. "  [226] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 33. " [225]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 32. "  [224] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 31. "  [223] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 30. " [222]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 29. "  [221] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 28. "  [220] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 27. " [219]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 26. "  [218] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 25. "  [217] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 24. " [216]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 23. "  [215] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 22. "  [214] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 21. " [213]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 20. "  [212] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 19. "  [211] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 18. " [210]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 17. "  [209] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 16. "  [208] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 15. " [207]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 14. "  [206] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 13. "  [205] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 12. " [204]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 11. "  [203] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 10. "  [202] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 9. " [201]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 8. "  [200] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 7. "  [199] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 6. " [198]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 5. "  [197] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 4. "  [196] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 3. " [195]                      ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 2. "  [194] ,Configuration component n presence" "Not present,Present"
bitfld.quad 0x18 1. "  [193] ,Configuration component n presence" "Not present,Present"
newline
bitfld.quad 0x18 0. " [192]                      ,Configuration component n presence" "Not present,Present"
newline
group.quad 0x200++0x07
line.quad 0x00 "DVM_DOMAIN_CTL_set/clr,DVM Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " DVM_DOMAIN_CTL31           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. " DVM_DOMAIN_CTL30           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " DVM_DOMAIN_CTL29           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. " DVM_DOMAIN_CTL28           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " DVM_DOMAIN_CTL27           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. " DVM_DOMAIN_CTL26           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " DVM_DOMAIN_CTL25           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. " DVM_DOMAIN_CTL24           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " DVM_DOMAIN_CTL23           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. " DVM_DOMAIN_CTL22           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " DVM_DOMAIN_CTL21           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. " DVM_DOMAIN_CTL20           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " DVM_DOMAIN_CTL19           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. " DVM_DOMAIN_CTL18           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " DVM_DOMAIN_CTL17           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. " DVM_DOMAIN_CTL16           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " DVM_DOMAIN_CTL15           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. " DVM_DOMAIN_CTL14           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " DVM_DOMAIN_CTL13           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. " DVM_DOMAIN_CTL12           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " DVM_DOMAIN_CTL11           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. " DVM_DOMAIN_CTL10           ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " DVM_DOMAIN_CTL9            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. " DVM_DOMAIN_CTL8            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " DVM_DOMAIN_CTL7            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. " DVM_DOMAIN_CTL6            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " DVM_DOMAIN_CTL5            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. " DVM_DOMAIN_CTL4            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " DVM_DOMAIN_CTL3            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. " DVM_DOMAIN_CTL2            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " DVM_DOMAIN_CTL1            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. " DVM_DOMAIN_CTL0            ,Bit vector of NodeIDs for all RN-Fs and RN-Is active in the DVM domain" "Not present,Present"
newline
width 31.
rgroup.quad 0x300++0x17
line.quad 0x00 "ERR_SIG_VAL_63_0,Error Signal Valid [63:0] Register"
hexmask.quad.byte 0x00 32.--39. 1. " ERR_SIG_VAL_HNF ,Indicates an HN-F error"
newline
bitfld.quad 0x00 16.--19. " ERR_SIG_VAL_SN  ,Indicates an SN error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 8.--9. " ERR_SIG_VAL_HNI ,Indicates an HN-I error" "0,1,2,3"
newline
bitfld.quad 0x00 1. " ERR_SIG_VAL_DT  ,Indicates a DT error" "No error,Error"
line.quad 0x08 "ERR_SIG_VAL_127_64,Error Signal Valid [127:64] Register"
bitfld.quad 0x08 0. " ERR_SIG_VAL_XP  ,Indicates an XP error" "No error,Error"
line.quad 0x10 "ERR_SIG_VAL_191_128,Error Signal Valid [191:128] Register"
hexmask.quad.long 0x10 0.--31. 1. " ERR_SIG_VAL_RN  ,Indicates an RN interface error"
rgroup.quad 0x320++0x17
line.quad 0x00 "ERR_TYPE_31_0,Error Type Value [31:0] Register"
hexmask.quad.byte 0x00 32.--39. 1. " ERR_TYPE_SN     ,Indicates the type of SN error"
newline
bitfld.quad 0x00 16.--19. " ERR_TYPE_HNI    ,Indicates the type of HN-I error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 2.--3. " ERR_TYPE_DT     ,Indicates the type of DT error" "0,1,2,3"
line.quad 0x08 "ERR_TYPE_63_32,Error Type Value [63:32] Register"
hexmask.quad.word 0x08 0.--15. 1. " ERR_TYPE_HNF    ,Indicates the type of HN-F error"
line.quad 0x10 "ERR_TYPE_95_64,Error Type Value [95:64] Register"
bitfld.quad 0x10 0.--1. " ERR_TYPE_XP     ,Indicates the type of XP error" "0,1,2,3"
rgroup.quad 0x340++0x07
line.quad 0x00 "ERR_TYPE_159_128,Error Type Value [159:128] Register"
rgroup.quad 0xFD0++0x07
line.quad 0x00 "PERIPH_ID_4_PERIPH_ID_5,Peripheral ID 4 And Peripheral ID 5 Register"
bitfld.quad 0x00 4.--7. " SIZE            ,Size of memory occupied by the interface" ",,,,,,,,,,,,16 MB,?..."
newline
bitfld.quad 0x00 0.--3. " DES_2           ,JEP106 continuation code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hgroup.quad 0xFD8++0x07
hide.quad 0x00 "PERIPH_ID_6_PERIPH_ID_7,Peripheral ID 6 And Peripheral ID 7 Register"
rgroup.quad 0xFE0++0x0F
line.quad 0x00 "PERIPH_ID_0_PERIPH_ID_1,Peripheral ID 0 And Peripheral ID 1 Register"
bitfld.quad 0x00 36.--39. " DES_0           ,JEP106 identity code [3:0]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 32.--35. " PART_1          ,Part number [11:8]" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 0.--7. 1. " PART_0          ,Part number [7:0]"
line.quad 0x08 "PERIPH_ID_2_PERIPH_ID_3,Peripheral ID 2 And Peripheral ID 3 Register"
hexmask.quad.byte 0x08 32.--39. 1. " CMOD            ,Customer and manufacturer revision"
newline
bitfld.quad 0x08 4.--7. " REVISION        ,Revision" "r0p0,r1p0,r1p1,r2p0,r2p1,?..."
newline
bitfld.quad 0x08 3. " JEDEC           ,JEDEC JEP106 identity code is used" "Not used,Used"
newline
bitfld.quad 0x08 0.--2. " DES_1           ,JEP106 identity code [6:4]" "0,1,2,3,4,5,6,7"
rgroup.quad 0xFF0++0x0F
line.quad 0x00 "COMPONENT_ID_0_COMPONENT_ID_1,Component ID 0 And Component ID 1 Register"
bitfld.quad 0x00 36.--39. " DES_0           ,Component class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.quad 0x00 32.--35. " PRMBL_1         ,Component ID 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.quad.byte 0x00 0.--7. 1. " PRMBL_0         ,Component ID 0"
line.quad 0x08 "COMPONENT_ID_2_COMPONENT_ID_3,Component ID 2 And Component ID 3 Register"
hexmask.quad.byte 0x08 32.--39. 1. " PRMBL_3         ,Component ID 3"
newline
hexmask.quad.byte 0x08 0.--7. 1. " PRMBL_2         ,Component ID 2"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_MN_OLY_ID,MN Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID         ,The node ID of the MN is 10"
newline
bitfld.quad 0x00 0.--4. " OLY_ID          ,Indicates that this node is an MN" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP Registers"
tree "XP ID 0 (region 64)"
base ad:0x04400000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 1 (region 65)"
base ad:0x04410000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 2 (region 66)"
base ad:0x04420000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 3 (region 67)"
base ad:0x04430000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 4 (region 68)"
base ad:0x04440000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 5 (region 69)"
base ad:0x04450000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 6 (region 70)"
base ad:0x04460000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 7 (region 71)"
base ad:0x04470000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 8 (region 72)"
base ad:0x04480000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 9 (region 73)"
base ad:0x04490000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "XP ID 10 (region 74)"
base ad:0x044A0000
width 20.
group.quad 0x110++0x1F
line.quad 0x00 "DEV0_QOS_CONTROL,Device 0 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV0_QOS_OVERRIDE    ,Port 0 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV0_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV0_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV0_QOS_OVERRIDE_EN ,Port 0 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV0_LAT_EN          ,Port 0 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV0_QOS_LAT_TGT,Device 0 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV0_LAT_TGT         ,Port 0 target latency"
line.quad 0x10 "DEV0_QOS_LAT_SCALE,Device 0 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV0_LAT_SCALE       ,Port 0 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV0_QOS_LAT_RANGE,Device 0 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV0_LAT_MAX_QOS     ,Port 0 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV0_LAT_MIN_QOS     ,Port 0 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x210++0x1F
line.quad 0x00 "DEV1_QOS_CONTROL,Device 1 Port QoS Control Register"
bitfld.quad 0x00 16.--19. " DEV1_QOS_OVERRIDE    ,Port 1 QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x00 6. " DEV1_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation" "Normal,Quiesce"
textline "                                     "
bitfld.quad 0x00 4. " DEV1_REG_MODE        ,Configures the mode of the QoS regulator" "Latency,Period"
textline "                                     "
bitfld.quad 0x00 2. " DEV1_QOS_OVERRIDE_EN ,Port 1 QoS override enable" "Disabled,Enabled"
textline "                                     "
bitfld.quad 0x00 0. " DEV1_LAT_EN          ,Port 1 QoS regulation enable" "Disabled,Enabled"
line.quad 0x08 "DEV1_QOS_LAT_TGT,Device 1 Port QoS Latency Target Register"
hexmask.quad.word 0x08 0.--11. 1. " DEV1_LAT_TGT         ,Port 1 target latency"
line.quad 0x10 "DEV1_QOS_LAT_SCALE,Device 1 Port QoS Latency Scale Register"
bitfld.quad 0x10 0.--2. " DEV1_LAT_SCALE       ,Port 1 QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x18 "DEV1_QOS_LAT_RANGE,Device 1 Port QoS Latency Range Register"
bitfld.quad 0x18 8.--11. " DEV1_LAT_MAX_QOS     ,Port 1 QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                     "
bitfld.quad 0x18 0.--3. " DEV1_LAT_MIN_QOS     ,Port 1 QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.quad 0x400++0x07
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXTND            ,Error extended" "0,1"
textline "                                     "
bitfld.quad 0x00 62. " FIRST_ERR_VLD        ,First error valid" "Not valid,Valid"
textline "                                     "
bitfld.quad 0x00 60.--61. " ERR_CLASS            ,Error classification" "0,1,2,3"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR             ,Multiple errors" "No,Yes"
textline "                                     "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT  ,Corrected error count"
textline "                                     "
bitfld.quad 0x00 3.--5. " ERR_ID_5_3           ,Channel type" "REQ,RSP,SNP,DATA,,,,DATB"
textline "                                     "
bitfld.quad 0x00 1.--2. " ERR_ID_2_1           ,Download source" "Bus 0,Bus 1,Bypass,"
textline "                                     "
bitfld.quad 0x00 0. " ERR_ID_0             ,Download device port number" "0,1"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,XP Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR    ,Clears the FIRST_ERR_VLD bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                     "
bitfld.quad 0x00 59. " MULT_ERR_CLR         ,Clears the MULT_ERR bit in the Error Syndrome 0 register" "No effect,Clear"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_XP_OLY_ID,XP Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID              ,The node ID of the XP"
textline "                                     "
bitfld.quad 0x00 0.--4. " OLY_ID               ,Indicates that this node is an XP" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree.end
tree "HN-F Registers"
tree "Node ID 3 (region 32)"
base ad:0x04200000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 5 (region 33)"
base ad:0x04210000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 7 (region 34)"
base ad:0x04220000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 8 (region 35)"
base ad:0x04230000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 13 (region 36)"
base ad:0x04240000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 15 (region 37)"
base ad:0x04250000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 17 (region 38)"
base ad:0x04260000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 18 (region 39)"
base ad:0x04270000
width 25.
group.quad 0x00++0x0F
line.quad 0x00 "HNF_CFG_CTRL,HN-F Configuration Control Register"
bitfld.quad 0x00 20. " NCDEVCMO_MC_COMP              ,Disable HN-F completion" "No,Yes"
textline "                                          "
bitfld.quad 0x00 18. " SF_ECC_SCRUB_DISABLE          ,Disable SF tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 17. " L3_DAT_ECC_SCRUB_DISABLE      ,Disable L3 data single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 16. " L3_TAG_ECC_SCRUB_DISABLE      ,Disable L3 tag single-bit ECC error scrubbing" "No,Yes"
textline "                                          "
bitfld.quad 0x00 8. " CG_DISABLE                    ,Disable HN-F clock gates" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " ECC_DISABLE                   ,Disable L3 and SF ECC generation and detection" "No,Yes"
line.quad 0x08 "HNF_SAM_CONTROL,HN-F SAM Control Register"
hexmask.quad.byte 0x08 8.--14. 1. " HN_CFG_SN1_NODEID             ,Node ID for slave node 1"
textline "                                          "
hexmask.quad.byte 0x08 0.--6. 1. " HN_CFG_SN0_NODEID             ,Node ID for slave node 0"
wgroup.quad 0x10++0x07
line.quad 0x00 "HN_CFG_PSTATE_REQ,HN-F P-state Request Register"
bitfld.quad 0x00 0.--1. " PSTATE                        ,P-state request" "HNF_PM_NOL3,HNF_PM_SFONLY,HNF_PM_HALF,HNF_PM_FULL"
rgroup.quad 0x18++0x0F
line.quad 0x00 "HN_CFG_PSTATE_STATUS,HN-F P-state Status Register"
bitfld.quad 0x00 4.--5. " RETENTION                     ,P-state retention status" "HNF_PM_RET_IDLE,HNF_PM_RET_IDLE_2_RET,HNF_PM_RET_RET,HNF_PM_RET_RET_2_IDLE"
textline "                                          "
bitfld.quad 0x00 0.--3. " PSTATE                        ,P-state status" "HNF_PM_NOL3,HNF_PM_NOL3_2_SFONLY,HNF_PM_NOL3_2_HALF,HNF_PM_NOL3_2_FULL,HNF_PM_SFONLY,HNF_PM_SFONLY_2_NOL3,HNF_PM_SFONLY_2_HALF,HNF_PM_SFONLY_2_FULL,HNF_PM_HALF,HNF_PM_HALF_2_NOL3,HNF_PM_HALF_2_SFONLY,HNF_PM_HALF_2_FULL,HNF_PM_FULL,HNF_PM_FULL_2_NOL3,HNF_PM_FULL_2_SFONLY,HNF_PM_FULL_2_HALF"
line.quad 0x08 "QOS_BAND,QoS Band Register"
bitfld.quad 0x08 28.--31. " HIGHHIGH_MAX_QOS_VAL          ,Maximum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 24.--27. " HIGHHIGH_MIN_QOS_VAL          ,Minimum value for highest QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 20.--23. " HIGH_MAX_QOS_VAL              ,Maximum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 16.--19. " HIGH_MIN_QOS_VAL              ,Minimum value for high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 12.--15. " MED_MAX_QOS_VAL               ,Maximum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 8.--11. " MED_MIN_QOS_VAL               ,Minimum value for medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 4.--7. " LOW_MAX_QOS_VAL               ,Maximum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
bitfld.quad 0x08 0.--3. " LOW_MIN_QOS_VAL               ,Minimum value for low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x28++0x3F
line.quad 0x00 "QOS_RESERVATION,QoS Reservation Register"
bitfld.quad 0x00 32.--36. " SEQ_QOS_MAX_CNT               ,Number of entries that are reserved for snoop filter evictions in POCQ" ",1,?..."
textline "                                          "
bitfld.quad 0x00 24.--28. " HIGHHIGH_QOS_MAX_CNT          ,Maximum number of highest QoS class occupancy" ",,,,,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x00 16.--20. " HIGH_QOS_MAX_CNT              ,Maximum number of high QoS class occupancy" ",,,,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,?..."
textline "                                          "
bitfld.quad 0x00 8.--12. " MED_QOS_MAX_CNT               ,Maximum number of medium QoS class occupancy" ",,,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,?..."
textline "                                          "
bitfld.quad 0x00 0.--4. " LOW_QOS_MAX_CNT               ,Maximum number of low QoS class occupancy" ",,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,?..."
line.quad 0x08 "RN_STARVATION,RN Starvation Register"
bitfld.quad 0x08 40.--44. " RN_HIGH_OVER_HIGHHIGH_MAX_CNT ,Maximum number of consecutive times highest QoS class win over high QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
bitfld.quad 0x08 32.--37. " RN_MED_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 24.--28. " RN_MED_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over medium QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                          "
hexmask.quad.byte 0x08 16.--22. 1. " RN_LOW_OVER_HIGHHIGH_MAX_CNT  ,Maximum number of consecutive times highest QoS class win over low QoS class"
textline "                                          "
bitfld.quad 0x08 8.--13. " RN_LOW_OVER_HIGH_MAX_CNT      ,Maximum number of consecutive times high QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
textline "                                          "
bitfld.quad 0x08 0.--4. " RN_LOW_OVER_MED_MAX_CNT       ,Maximum number of consecutive times medium QoS class win over low QoS class" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.quad 0x10 "HNF_ERR_INJ,HN-F Error Injection Enable and Setup Register"
hexmask.quad.byte 0x10 16.--22. 1. " HNF_ERR_INJ_SRCID             ,SrcID read access that results in an L3 miss with no slave error or error to match for HN-F error injection"
textline "                                          "
bitfld.quad 0x10 4.--6. " HNF_ERR_INJ_LPID              ,LPID to match for HN-F error injection" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x10 0. " HNF_ERR_INJ_EN                ,HN-F error injection and report enable" "Disabled,Enabled"
line.quad 0x18 "HNF_L3_LOCK_WAYS,HN-F L3 Lock Ways Register"
bitfld.quad 0x18 0.--3. " WAYS                          ,Number of ways locked" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.quad 0x20 "HNF_L3_LOCK_BASE0,HN-F L3 Lock Base 0 register"
bitfld.quad 0x20 63. " BASE0_VLD                     ,Lock base 0 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x20 0.--43. 1. " BASE0                         ,Lock base 0"
line.quad 0x28 "HNF_L3_LOCK_BASE1,HN-F L3 Lock Base 1 Register"
bitfld.quad 0x28 63. " BASE1_VLD                     ,Lock base 1 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x28 0.--43. 1. " BASE1                         ,Lock base 1"
line.quad 0x30 "HNF_L3_LOCK_BASE2,HN-F L3 Lock Base 2 Register"
bitfld.quad 0x30 63. " BASE2_VLD                     ,Lock base 2 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x30 0.--43. 1. " BASE2                         ,Lock base 2"
line.quad 0x38 "HNF_L3_LOCK_BASE3,HN-F L3 Lock Base 3 Register"
bitfld.quad 0x38 63. " BASE3_VLD                     ,Lock base 3 valid" "Not valid,Valid"
textline "                                          "
hexmask.quad 0x38 0.--43. 1. " BASE3                         ,Lock base 3"
textline "                                          "
group.quad 0x108++0x07
line.quad 0x00 "HN_CFG_RNI_VEC,HN Configuration RN-I Vector Register"
bitfld.quad 0x00 31. " RNI_VEC[31]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 30. "                          [30]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 29. "        [29]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 28. "                          [28]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 27. "        [27]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 26. "                          [26]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 25. "        [25]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 24. "                          [24]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 23. "        [23]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 22. "                          [22]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 21. "        [21]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 20. "                          [20]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 19. "        [19]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 18. "                          [18]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 17. "        [17]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 16. "                          [16]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 15. "        [15]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 14. "                          [14]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 13. "        [13]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 12. "                          [12]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 11. "        [11]                   ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 10. "                          [10]               ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 9. "        [9]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 8. "                          [8]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 7. "        [7]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 6. "                          [6]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 5. "        [5]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 4. "                          [4]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 3. "        [3]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 2. "                          [2]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
textline "                                          "
bitfld.quad 0x00 1. "        [1]                    ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
bitfld.quad 0x00 0. "                          [0]                ,Indicates which SrcIDs are RN-I protocol nodes" "Not RN-I,RN-I"
sif (cpuis("LS2088A*")||cpuis("LS2080A*")||cpuis("LS2085A*"))
group.quad 0x200++0x07
line.quad 0x00 "SNOOP_DOMAIN_CTL_SET/CLR,Snoop Domain Control Register"
setclrfld.quad 0x00 31. 0x10 31. 0x20 31. " SNOOP_DOMAIN_CTL31            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 30. 0x10 30. 0x20 30. "                       SNOOP_DOMAIN_CTL30 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 29. 0x10 29. 0x20 29. " SNOOP_DOMAIN_CTL29            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 28. 0x10 28. 0x20 28. "                       SNOOP_DOMAIN_CTL28 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 27. 0x10 27. 0x20 27. " SNOOP_DOMAIN_CTL27            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 26. 0x10 26. 0x20 26. "                       SNOOP_DOMAIN_CTL26 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 25. 0x10 25. 0x20 25. " SNOOP_DOMAIN_CTL25            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 24. 0x10 24. 0x20 24. "                       SNOOP_DOMAIN_CTL24 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 23. 0x10 23. 0x20 23. " SNOOP_DOMAIN_CTL23            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 22. 0x10 22. 0x20 22. "                       SNOOP_DOMAIN_CTL22 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 21. 0x10 21. 0x20 21. " SNOOP_DOMAIN_CTL21            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 20. 0x10 20. 0x20 20. "                       SNOOP_DOMAIN_CTL20 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 19. 0x10 19. 0x20 19. " SNOOP_DOMAIN_CTL19            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 18. 0x10 18. 0x20 18. "                       SNOOP_DOMAIN_CTL18 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 17. 0x10 17. 0x20 17. " SNOOP_DOMAIN_CTL17            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 16. 0x10 16. 0x20 16. "                       SNOOP_DOMAIN_CTL16 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 15. 0x10 15. 0x20 15. " SNOOP_DOMAIN_CTL15            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 14. 0x10 14. 0x20 14. "                       SNOOP_DOMAIN_CTL14 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 13. 0x10 13. 0x20 13. " SNOOP_DOMAIN_CTL13            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 12. 0x10 12. 0x20 12. "                       SNOOP_DOMAIN_CTL12 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 11. 0x10 11. 0x20 11. " SNOOP_DOMAIN_CTL11            ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 10. 0x10 10. 0x20 10. "                       SNOOP_DOMAIN_CTL10 ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 9. 0x10 9. 0x20 9. " SNOOP_DOMAIN_CTL9             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 8. 0x10 8. 0x20 8. "                       SNOOP_DOMAIN_CTL8  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 7. 0x10 7. 0x20 7. " SNOOP_DOMAIN_CTL7             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 6. 0x10 6. 0x20 6. "                       SNOOP_DOMAIN_CTL6  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 5. 0x10 5. 0x20 5. " SNOOP_DOMAIN_CTL5             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 4. 0x10 4. 0x20 4. "                       SNOOP_DOMAIN_CTL4  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 3. 0x10 3. 0x20 3. " SNOOP_DOMAIN_CTL3             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 2. 0x10 2. 0x20 2. "                       SNOOP_DOMAIN_CTL2  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
textline "                                          "
setclrfld.quad 0x00 1. 0x10 1. 0x20 1. " SNOOP_DOMAIN_CTL1             ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
setclrfld.quad 0x00 0. 0x10 0. 0x20 0. "                       SNOOP_DOMAIN_CTL0  ,Bit vector representing RN-F nodes that can be snooped" "Not snooped,Snooped"
else
hgroup.quad 0x200++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL,Snoop Domain Control Register"
hgroup.quad 0x210++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_SET,Snoop Domain Control Set Register"
hgroup.quad 0x220++0x07
hide.quad 0x00 "SNOOP_DOMAIN_CTL_CLR,Snoop Domain Control Clear Register"
endif
wgroup.quad 0x300++0x07
line.quad 0x00 "HN_CFG_L3SF_DBGRD,HN Debug Read Configuration Register"
bitfld.quad 0x00 24.--25. " L3_ACCESS_COMPONENT           ,L3/SF debug read array specifier" ",L3 data read,L3 tag read,SF tag read"
textline "                                          "
bitfld.quad 0x00 20.--22. " L3_ACCESS_DW                  ,64-bit chunk address for L3 data debug read access" "0,1,2,3,4,5,6,7"
textline "                                          "
bitfld.quad 0x00 16.--19. " L3_ACCESS_WAY                 ,Way address for L3/SF debug read access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                          "
hexmask.quad.word 0x00 0.--11. 0x01 " L3_ACCESS_SET                 ,Set address for L3/SF debug read access"
rgroup.quad 0x308++0x17
line.quad 0x00 "L3_CACHE_ACCESS_L3_TAG,L3 Cache Access Tag Register"
hexmask.quad 0x00 0.--43. 1. " L3_CACHE_ACCESS_L3_TAG        ,L3 tag debug read data register"
line.quad 0x08 "L3_CACHE_ACCESS_L3_DATA,L3 Cache Access Data Register"
line.quad 0x10 "L3_CACHE_ACCESS_SF_TAG,L3 Cache Access SF Tag Register"
hexmask.quad 0x10 0.--43. 1. " L3_CACHE_ACCESS_SF_TAG        ,SF tag debug read data register"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                     ,Error extended" "0,1"
textline "                                          "
bitfld.quad 0x00 62. " FIRST_ERR_VLD                 ,First error valid" "Not valid,Valid"
textline "                                          "
bitfld.quad 0x00 60.--61. " ERR_CLASS                     ,Error classification" "0,1,2,3"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR                      ,Multiple errors" "No,Yes"
textline "                                          "
hexmask.quad.word 0x00 43.--58. 1. " ERR_COUNT                     ,Corrected error count"
textline "                                          "
hexmask.quad.word 0x00 8.--19. 0x01 " ERR_COUNT_SET                 ,HN-F single-bit ECC error count set address"
textline "                                          "
bitfld.quad 0x00 7. " ERR_COUNT_OVRFLW              ,HN-F single-bit error counter overflow" "No overflow,Overflow"
textline "                                          "
bitfld.quad 0x00 6. " ERR_COUNT_MATCH               ,HN-F ECC error count applies to same type and set" "Not matched,Matched"
textline "                                          "
bitfld.quad 0x00 4.--5. " ERR_COUNT_TYPE                ,HN-F single-bit ECC counter type" "L3 data,L3 tag,SF tag,"
textline "                                          "
bitfld.quad 0x00 0.--2. " ERR_ID                        ,HN-F error syndrome register error type" "L3 data single-bit ECC,L3 tag single-bit ECC,SF tag single-bit ECC,,L3 data double-bit ECC,L3 tag double-bit ECC,SF tag double-bit ECC,CHI bus slave"
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 0x01 " ERR_ADDR                      ,HN-F error syndrome address"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,L3 Cache Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR             ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                          "
bitfld.quad 0x00 59. " MULT_ERR_CLR                  ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "HNF_AUX_CTL,HN-F Auxiliary Control Register"
bitfld.quad 0x00 11. " HNF_HONOR_EWA                 ,HN-F does not send write completion for writes with EWA=0 until it receives completion from the SN" "No,Yes"
textline "                                          "
bitfld.quad 0x00 7. " DIS_QOS_PCRDTYPE              ,Disable QoS based PCrdType assignment" "No,Yes"
textline "                                          "
bitfld.quad 0x00 6. " DIS_SNP_ONCE                  ,Disable snoop once" "No,Yes"
textline "                                          "
bitfld.quad 0x00 5. " L3_NO_ALLOC                   ,Disable L3 allocation for non-shareable cacheable transactions" "No,Yes"
textline "                                          "
bitfld.quad 0x00 4. " RD_ONCE_NO_ALLOC              ,Disable read once allocation in the L3 from RN-Is" "No,Yes"
textline "                                          "
bitfld.quad 0x00 3. " REV_QOS_POOL_ALLOC            ,Reverse QoS pool allocation algorithm" "Not reversed,Reversed"
textline "                                          "
bitfld.quad 0x00 2. " NO_WU_ALLOC                   ,Disable WriteUnique and WriteLineUnique allocations in L3" "No,Yes"
textline "                                          "
bitfld.quad 0x00 0. " HNF_ONLY_MODE                 ,HN-F-only mode with no L3 and snoop filter" "No,Yes"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNF_OLY_ID,HN-F Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                       ,The node ID of the HN-F"
textline "                                          "
bitfld.quad 0x00 0.--4. " OLY_ID                        ,Indicates that this node is an HN-F" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree.end
tree "HN-I Registers"
base ad:0x04080000
width 24.
group.quad 0x00++0x07
line.quad 0x00 "POS_CONTROL,PoS Control Register"
bitfld.quad 0x00 3. " AWCACHE0_OVRD_VAL          ,AWCACHE[0] override value" "0,1"
textline "                                         "
bitfld.quad 0x00 2. " ARCACHE0_OVRD_VAL          ,ARCACHE[0] override value" "0,1"
textline "                                         "
bitfld.quad 0x00 1. " AXCACHE_OVERRIDE           ,Enables AWCACHE[0] and ARCACHE[0] override on the AMBA interface" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 0. " HNI_POS_EN                 ,Indicates status of HN-I PoS" "Not final,Final"
rgroup.quad 0x08++0x07
line.quad 0x00 "PCIERC_RNI_NODEID_LIST,PCIeRC RN-I Node ID List Register"
bitfld.quad 0x00 20. " PCIERC_RNI_NODEID_LIST[20] ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
textline "                                         "
bitfld.quad 0x00 16. "                       [16] ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
textline "                                         "
bitfld.quad 0x00 12. "                       [12] ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
textline "                                         "
bitfld.quad 0x00 6. "                       [6]  ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
textline "                                         "
bitfld.quad 0x00 2. "                       [2]  ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
textline "                                         "
bitfld.quad 0x00 0. "                       [0]  ,RN-I with PCIe RC connected in the system" "Not connected,Connected"
rgroup.quad 0x400++0x0F
line.quad 0x00 "ERR_SYNDROME_REG0,Error Syndrome 0 Register"
bitfld.quad 0x00 63. " ERR_EXNTD                  ,Error extended" "0,1"
textline "                                         "
bitfld.quad 0x00 62. " FIRST_ERR_VLD              ,First error valid" "Not valid,Valid"
textline "                                         "
bitfld.quad 0x00 60.--61. " ERR_CLASS                  ,Error classification" "0,1,2,3"
textline "                                         "
bitfld.quad 0x00 59. " MULT_ERR                   ,Multiple errors" "No,Yes"
textline "                                         "
hexmask.quad.word 0x00 43.--58. 1. " CORRECTED_ERR_COUNT        ,Corrected error count"
textline "                                         "
bitfld.quad 0x00 40.--41. " PCRDTYPE                   ,PCrdType" "0,1,2,3"
textline "                                         "
bitfld.quad 0x00 37.--39. " SIZE                       ,SIZE" "0,1,2,3,4,5,6,7"
textline "                                         "
bitfld.quad 0x00 35.--36. " SNPATTR                    ,SnpAttr" "0,1,2,3"
textline "                                         "
bitfld.quad 0x00 31.--34. " MEMATTR                    ,MemAttr" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                         "
bitfld.quad 0x00 29.--30. " ORDER                      ,ORDER" "0,1,2,3"
textline "                                         "
bitfld.quad 0x00 28. " NS                         ,NS" "0,1"
textline "                                         "
bitfld.quad 0x00 27. " DYNPCRD                    ,DYNPCRD" "0,1"
textline "                                         "
hexmask.quad.word 0x00 16.--26. 1. " TXNID                      ,TXNID"
textline "                                         "
hexmask.quad.byte 0x00 9.--15. 1. " SRCID                      ,SRCID"
textline "                                         "
bitfld.quad 0x00 4.--8. " OPCODE                     ,OPCODE" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
textline "                                         "
bitfld.quad 0x00 0.--3. " ERROR_TYPE                 ,Error type" ",Unsupported opcode,Cacheable read request,Cacheable write request,Downstream write response error,MN read request,MN write request,MN unsupported opcode,?..."
line.quad 0x08 "ERR_SYNDROME_REG1,Error Syndrome 1 Register"
hexmask.quad 0x08 0.--43. 1. " ERROR_LOG2                 ,Error log 2"
wgroup.quad 0x480++0x07
line.quad 0x00 "ERR_SYNDROME_CLR,HN-I Error Syndrome Clear Register"
bitfld.quad 0x00 62. " FIRST_ERR_VLD_CLR          ,Clears the first_err_vld bit in the Error Syndrome 0 register" "No effect,Clear"
textline "                                         "
bitfld.quad 0x00 59. " MULT_ERR_CLR               ,Clears the mult_err bit in the Error Syndrome 0 register" "No effect,Clear"
group.quad 0x500++0x07
line.quad 0x00 "SA_AUX_CTL,SA Auxiliary Control Register"
bitfld.quad 0x00 11. " HONOR_EWA_EN               ,Propagates BRESP to the requesting RN for non-posted writes" "Not propagated,Propagated"
textline "                                         "
bitfld.quad 0x00 9. " SER_DEVNE_WR               ,Serializes Device-nGnRnE writes" "Not serialized,Serialized"
textline "                                         "
bitfld.quad 0x00 8. " RSPERR_CMO_EN              ,Enables sending Non-data Error (NDERR) response on CMO" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 7. " POS_EARLY_EOBARRSP_EN      ,Enables sending early completion response for EOBarrier from HN-I" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 6. " POS_EARLY_RDACK_EN         ,Enables sending early read receipts from HN-I" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 5. " POS_EARLY_WR_COMP_EN       ,Enables early write completions for all writes that allow early acknowledgment" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 4. " POS_TERMINATE_BARRIERS     ,Enables termination of barriers before AMBA interface" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 3. " ERR_RSP_EN                 ,Enables signaling an error to the MN on response" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 2. " ERR_REQ_EN                 ,Enables signaling an error to the MN on request" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 1. " QOS_SCHEDULE_EN            ,Enables QoS based scheduling of the AMBA requests" "Disabled,Enabled"
textline "                                         "
bitfld.quad 0x00 0. " RDREQ_BYP_EN               ,Enables read bypass path" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_HNI_OLY_ID,HN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID                    ,The node ID of the HN-I is 10"
textline "                                         "
bitfld.quad 0x00 0.--4. " OLY_ID                     ,Indicates that this node is an HN-I" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "RN-I Bridge Register"
tree "Node ID 0 (region 128)"
base ad:0x04800000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 2 (region 130)"
base ad:0x04820000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 6 (region 134)"
base ad:0x04860000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 12 (region 140)"
base ad:0x048C0000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 16 (region 144)"
base ad:0x04900000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 20 (region 148)"
base ad:0x04940000
width 18.
group.quad 0x08++0x27
line.quad 0x00 "S0_PORT_CONTROL,Port S0 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S0_LPID_MASK          ,S0 port LPID mask"
line.quad 0x08 "S0_QOS_CONTROL,Port S0 QoS Control Register"
bitfld.quad 0x08 20.--23. " S0_AR_QOS_OVERRIDE    ,S0 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S0_AW_QOS_OVERRIDE    ,S0 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S0_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S0_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S0_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S0_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S0_AR_QOS_OVERRIDE_EN ,S0 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S0_AW_QOS_OVERRIDE_EN ,S0 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S0_AR_LAT_EN          ,S0 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S0_AW_LAT_EN          ,S0 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S0_QOS_LAT_TGT,Port S0 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S0_AR_LAT_TGT         ,S0 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S0_AW_LAT_TGT         ,S0 AW channel target latency"
line.quad 0x18 "S0_QOS_LAT_SCALE,Port S0 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S0_AR_LAT_SCALE       ,S0 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S0_AW_LAT_SCALE       ,S0 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S0_QOS_LAT_RANGE,Port S0 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S0_AR_LAT_MAX_QOS     ,S0 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S0_AR_LAT_MIN_QOS     ,S0 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S0_AW_LAT_MAX_QOS     ,S0 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S0_AW_LAT_MIN_QOS     ,S0 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x108++0x27
line.quad 0x00 "S1_PORT_CONTROL,Port S1 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S1_LPID_MASK          ,S1 port LPID mask"
line.quad 0x08 "S1_QOS_CONTROL,Port S1 QoS Control Register"
bitfld.quad 0x08 20.--23. " S1_AR_QOS_OVERRIDE    ,S1 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S1_AW_QOS_OVERRIDE    ,S1 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S1_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S1_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S1_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S1_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S1_AR_QOS_OVERRIDE_EN ,S1 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S1_AW_QOS_OVERRIDE_EN ,S1 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S1_AR_LAT_EN          ,S1 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S1_AW_LAT_EN          ,S1 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S1_QOS_LAT_TGT,Port S1 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S1_AR_LAT_TGT         ,S1 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S1_AW_LAT_TGT         ,S1 AW channel target latency"
line.quad 0x18 "S1_QOS_LAT_SCALE,Port S1 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S1_AR_LAT_SCALE       ,S1 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S1_AW_LAT_SCALE       ,S1 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S1_QOS_LAT_RANGE,Port S1 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S1_AR_LAT_MAX_QOS     ,S1 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S1_AR_LAT_MIN_QOS     ,S1 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S1_AW_LAT_MAX_QOS     ,S1 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S1_AW_LAT_MIN_QOS     ,S1 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.quad 0x208++0x27
line.quad 0x00 "S2_PORT_CONTROL,Port S2 Control Register"
hexmask.quad.word 0x00 4.--14. 1. " S2_LPID_MASK          ,S2 port LPID mask"
line.quad 0x08 "S2_QOS_CONTROL,Port S2 QoS Control Register"
bitfld.quad 0x08 20.--23. " S2_AR_QOS_OVERRIDE    ,S2 port AR QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x08 16.--19. "          S2_AW_QOS_OVERRIDE    ,S2 port AW QoS override value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x08 7. " S2_AR_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during read transactions" "Normal,Quiesce"
bitfld.quad 0x08 6. "     S2_AW_PQV_MODE        ,Configures the mode of the QoS regulator during period mode for bandwidth regulation during write transactions" "Normal,Quiesce"
textline "                                   "
bitfld.quad 0x08 5. " S2_AR_REG_MODE        ,Configures the mode of the QoS regulator for read transactions" "Latency,Period"
bitfld.quad 0x08 4. "     S2_AW_REG_MODE        ,Configures the mode of the QoS regulator for write transactions" "Latency,Period"
textline "                                   "
bitfld.quad 0x08 3. " S2_AR_QOS_OVERRIDE_EN ,S2 port AR QoS override enable" "Disabled,Enabled"
bitfld.quad 0x08 2. "    S2_AW_QOS_OVERRIDE_EN ,S2 port AW QoS override enable" "Disabled,Enabled"
textline "                                   "
bitfld.quad 0x08 1. " S2_AR_LAT_EN          ,S2 port AR QoS regulation enable" "Disabled,Enabled"
bitfld.quad 0x08 0. "    S2_AW_LAT_EN          ,S2 port AW QoS regulation enable" "Disabled,Enabled"
line.quad 0x10 "S2_QOS_LAT_TGT,Port S2 QoS Latency Target Register"
hexmask.quad.word 0x10 16.--27. 1. " S2_AR_LAT_TGT         ,S2 AR channel target latency"
hexmask.quad.word 0x10 0.--11. 1. "        S2_AW_LAT_TGT         ,S2 AW channel target latency"
line.quad 0x18 "S2_QOS_LAT_SCALE,Port S2 QoS Latency Scale Register"
bitfld.quad 0x18 8.--10. " S2_AR_LAT_SCALE       ,S2 AR QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
bitfld.quad 0x18 0.--2. "       S2_AW_LAT_SCALE       ,S2 AW QoS scale factor" "2^-5,2^-6,2^-7,2^-8,2^-9,2^-10,2^-11,2^-12"
line.quad 0x20 "S2_QOS_LAT_RANGE,Port S2 QoS Latency Range Register"
bitfld.quad 0x20 24.--27. " S2_AR_LAT_MAX_QOS     ,S2 AR QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 16.--19. "          S2_AR_LAT_MIN_QOS     ,S2 AR QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
bitfld.quad 0x20 8.--11. " S2_AW_LAT_MAX_QOS     ,S2 AW QoS maximum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.quad 0x20 0.--3. "          S2_AW_LAT_MIN_QOS     ,S2 AW QoS minimum value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
textline "                                   "
group.quad 0x500++0x07
line.quad 0x00 "AUX_CTL,RN-I Auxiliary Control Register"
bitfld.quad 0x00 5. " FORCE_RD_RQO          ,Forces all reads from the RN-I to be sent with the request order bit" "Not forces,Forced"
bitfld.quad 0x00 4. "  WUO                   ,Used for acceleration of coherent ordered writes" "0,1"
textline "                                   "
bitfld.quad 0x00 3. " WFC                   ,Enables waiting for comp before the dependent transaction is dispatched" "Disabled,Enabled"
bitfld.quad 0x00 2. "    CG_DISABLE            ,Clock gating disable" "No,Yes"
textline "                                   "
bitfld.quad 0x00 1. " QPC_EN                ,Enables QoS based scheduling using two QoS priority classes, QoS15 and non-QoS15" "Disabled,Enabled"
bitfld.quad 0x00 0. "    AR_BYP_EN             ,Enables bypass path in the AR pipeline" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_RNI_OLY_ID,RN-I Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID               ,The node ID of the RN-I bridge"
bitfld.quad 0x00 0.--4. "          OLY_ID                ,Indicates that this node is an RN-I bridge that supports 3 ACE-Lite interfaces" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree.end
tree "SBSX Registers"
tree "Node ID 4 (region 16)"
base ad:0x04100000
width 17.
group.quad 0x500++0x07
line.quad 0x00 "SA_AUX_CTL,SA Auxiliary Control Register"
bitfld.quad 0x00 11. " HONOR_EWA_EN    ,Enables sending write completion before the slave receives completion" "Disabled,Enabled"
bitfld.quad 0x00 5. "  POS_EARLY_WR_COMP_EN ,Enables early write completions for all writes that allow early acknowledgement" "Disabled,Enabled"
textline "                                  "
bitfld.quad 0x00 1. " QOS_SCHEDULE_EN ,Enables QoS based scheduling of the AMBA requests" "Disabled,Enabled"
bitfld.quad 0x00 0. "  RDREQ_BYP_EN         ,Enables read bypass path" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_SBSX_OLY_ID,SBSX Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID         ,The node ID of the SBSX"
bitfld.quad 0x00 0.--4. "        OLY_ID               ,Indicates that this node is an SBSX" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree "Node ID 14 (region 17)"
base ad:0x04110000
width 17.
group.quad 0x500++0x07
line.quad 0x00 "SA_AUX_CTL,SA Auxiliary Control Register"
bitfld.quad 0x00 11. " HONOR_EWA_EN    ,Enables sending write completion before the slave receives completion" "Disabled,Enabled"
bitfld.quad 0x00 5. "  POS_EARLY_WR_COMP_EN ,Enables early write completions for all writes that allow early acknowledgement" "Disabled,Enabled"
textline "                                  "
bitfld.quad 0x00 1. " QOS_SCHEDULE_EN ,Enables QoS based scheduling of the AMBA requests" "Disabled,Enabled"
bitfld.quad 0x00 0. "  RDREQ_BYP_EN         ,Enables read bypass path" "Disabled,Enabled"
rgroup.quad 0xFF00++0x07
line.quad 0x00 "OLY_SBSX_OLY_ID,SBSX Identification Register"
hexmask.quad.byte 0x00 8.--14. 1. " NODE_ID         ,The node ID of the SBSX"
bitfld.quad 0x00 0.--4. "        OLY_ID               ,Indicates that this node is an SBSX" "Invalid node,MN,DT,,HN-F,HN-I,,,XP,,,,SBSX,,,,,SBSX,,,RN-I/1x ACE-Lite,RN-I/2x ACE-Lite,RN-I/3x ACE-Lite,,RN-I/1x ACE-Lite+DVM,RN-I/2x ACE-Lite+DVM,RN-I/3x ACE-Lite+DVM,?..."
width 0x0B
tree.end
tree.end
tree.end
tree.open "DDR (DDR Memory Controllers)"
tree "DDR1"
base ad:0x01080000
width 22.
group.long 0x0++0x03
line.long 0x00 "CS0_BNDS,Chip Select 0 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 0"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 0"
group.long 0x8++0x03
line.long 0x00 "CS1_BNDS,Chip Select 1 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 1"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 1"
group.long 0x10++0x03
line.long 0x00 "CS2_BNDS,Chip Select 2 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 2"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 2"
group.long 0x18++0x03
line.long 0x00 "CS3_BNDS,Chip Select 3 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 3"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 3"
group.long 0x80++0x03
line.long 0x00 "CS0_CONFIG,Chip Select 0 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 0 enable" "Disabled,Enabled"
bitfld.long 0x00 29. "                                           INTLV_EN        ,Memory controller interleave enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--27. " INTLV_CTL       ,Interleaving control" ",,,,,,,,256-byte,?..."
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 0 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS0,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS0,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 0" "2 bits,3 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 0" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x84++0x03
line.long 0x00 "CS1_CONFIG,Chip Select 1 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 1 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 1 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS1,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS1,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 1" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 1" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x88++0x03
line.long 0x00 "CS2_CONFIG,Chip Select 2 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 2 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS2,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS2,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 2" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 2" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x8C++0x03
line.long 0x00 "CS3_CONFIG,Chip Select 3 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 3 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 3 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS3,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS3,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 3" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 3" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x100++0x0F
line.long 0x00 "TIMING_CFG_3,DDR SDRAM Timing Configuration 3 Register"
bitfld.long 0x00 28. " EXT_PRETOACT    ,Extended precharge-to-activate interval" "0 clk,16 clk"
bitfld.long 0x00 24.--25. "                                             EXT_ACTTOPRE    ,Extended activate to precharge interval" "0 clk,16 clk,32 clk,48 clk"
newline
bitfld.long 0x00 22. " EXT_ACTTORW     ,Extended activate to read/write interval for SDRAM" "0,1"
bitfld.long 0x00 16.--21. "                                                  EXT_REFREC      ,Extended refresh recovery time" "0 clk,16 clk,32 clk,48 clk,64 clk,80 clk,96 clk,112 clk,128 clk,144 clk,160 clk,176 clk,192 clk,208 clk,224 clk,240 clk,256 clk,272 clk,288 clk,304 clk,320 clk,336 clk,352 clk,368 clk,?..."
newline
bitfld.long 0x00 12.--13. " EXT_CASLAT      ,Extended MCAS_B latency from READ command" "0 clk,8 clk,16 clk,?..."
bitfld.long 0x00 10. "                                             EXT_ADD_LAT     ,Extended additive latency" "0 clk,16 clk"
newline
bitfld.long 0x00 8. " EXT_WRREC       ,Extended last data to precharge minimum interval" "0 clk,16 clk"
bitfld.long 0x00 0.--2. "                                             CNTL_ADJ        ,Control adjust" "Aligned,1/2 cycle,1 cycle,3/2 cycles,2 cycles,5/2 cycles,?..."
line.long 0x04 "TIMING_CFG_0,DDR SDRAM Timing Configuration 0 Register"
bitfld.long 0x04 30.--31. " RWT             ,Read-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x04 28.--29. "                                              WRT             ,Write-to-read turnaround" "0 clk,1 clk,2 clk,3 clk"
newline
bitfld.long 0x04 26.--27. " RRT             ,Read-to-read turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x04 24.--25. "                                              WWT             ,Write-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
newline
bitfld.long 0x04 20.--23. " ACT_PD_EXIT     ,Active powerdown exit timing" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x04 16.--19. "                                             PRE_PD_EXIT     ,Precharge powerdown exit timing" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x04 14.--15. " EXT_PRE_PD_EXIT ,Extended precharge powerdown exit timing" "0 clk,16 clk,32 clk,48 clk"
bitfld.long 0x04 0.--4. "                                             MRS_CYC         ,Mode register set cycle time" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk"
line.long 0x08 "TIMING_CFG_1,DDR SDRAM Timing Configuration 1 Register"
bitfld.long 0x08 28.--31. " PRETOACT        ,Precharge-to-activate interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 24.--27. "                                             ACTTOPRE        ,Activate to precharge interval" "16 clk,17 clk,18 clk,19 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x08 20.--23. " ACTTORW         ,Activate to read/write interval for SDRAM" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 17.--19. "                                             CASLAT          ,MCAS_B latency from READ command" "1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk"
newline
bitfld.long 0x08 12.--15. " REFREC          ,Refresh recovery time" "8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk"
bitfld.long 0x08 8.--11. "                                             WRREC           ,Last data to precharge minimum interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x08 4.--7. " ACTTOACT        ,Activate-to-activate interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 0.--3. "                                             WRTORD          ,Last write data pair to read command issue interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
line.long 0x0C "TIMING_CFG_2,DDR SDRAM Timing Configuration 2 Register"
bitfld.long 0x0C 28.--31. " ADD_LAT         ,Additive latency" "0 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,?..."
bitfld.long 0x0C 19.--22. "                                             WR_LAT          ,Write latency" ",,,,,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x0C 18. " EXT_WR_LAT      ,Extended write latency" "0 clk,16 clk"
bitfld.long 0x0C 13.--16. "                                             RD_TO_PRE       ,Read to precharge" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x0C 6.--8. " CKE_PLS         ,Minimum CKE pulse width" "8 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
bitfld.long 0x0C 0.--5. "                                              FOUR_ACT        ,Window for four activates" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk,32 clk,?..."
group.long 0x110++0x07
line.long 0x00 "DDR_SDRAM_CFG,DDR SDRAM Control Configuration Register"
bitfld.long 0x00 31. " MEM_EN          ,DDR SDRAM interface logic enable" "Disabled,Enabled"
bitfld.long 0x00 30. "                                           SREN            ,Self refresh enable (during sleep)" "Disabled,Enabled"
newline
bitfld.long 0x00 29. " ECC_EN          ,ECC enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                                           RD_EN           ,Registered DIMM enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--26. " SDRAM_TYPE      ,Type of SDRAM device to be used" ",,,,,DDR4 SDRAM,?..."
bitfld.long 0x00 21. "                                         DYN_PWR         ,Dynamic power management mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19.--20. " DBW             ,DRAM data bus width" "64-bit,32-bit,?..."
bitfld.long 0x00 18. "                                             BE_8            ,8-beat burst enable" "4-beat,8-beat"
newline
bitfld.long 0x00 16. " T3_EN           ,Enable 3T timing" "Disabled,Enabled"
bitfld.long 0x00 15. "                                           T2_EN           ,Enable 2T timing" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 8.--14. 1. " BA_INTLV_CTL    ,Bank (chip select) interleaving control"
bitfld.long 0x00 3. "                                                 HSE             ,Global half-strength overrides" "Full,Half"
newline
bitfld.long 0x00 2. " ACC_ECC_EN      ,Accumulated ECC enable" "Disabled,Enabled"
bitfld.long 0x00 1. "                                           MEM_HALT        ,DDR memory controller halt" "Not halted,Halted"
newline
bitfld.long 0x00 0. " BI              ,Bypass initialization" "No bypass,Bypass"
line.long 0x04 "DDR_SDRAM_CFG_2,DDR SDRAM Control Configuration 2 Register"
bitfld.long 0x04 31. " FRC_SR          ,Force self refresh" "Not forced,Forced"
bitfld.long 0x04 21.--22. "                                         ODT_CFG         ,ODT configuration" "Never asserted,,Only during reads to DRAM,Always asserted"
newline
bitfld.long 0x04 12.--15. " NUM_PR          ,Number of posted refreshes" ",1,2,3,,,,,8,?..."
bitfld.long 0x04 11. "                                                  DDR_SLOW        ,DDR slow frequency" "Normal,Slow"
newline
bitfld.long 0x04 10. " X4_EN           ,X4 DRAM enable" "Disabled,Enabled"
bitfld.long 0x04 9. "                                           QD_EN           ,Quad-rank enable" "Disabled,Enabled"
newline
bitfld.long 0x04 8. " UNQ_MRS_EN      ,Unique MRS enable" "Disabled,Enabled"
bitfld.long 0x04 6. "                                           OBC_CFG         ,On-the-fly burst chop configuration" "Disabled,Enabled"
newline
bitfld.long 0x04 5. " AP_EN           ,Address parity enable" "Disabled,Enabled"
bitfld.long 0x04 4. "                                           D_INIT          ,DRAM data initialization" "Not initialized,Initialized"
newline
bitfld.long 0x04 2. " RCW_EN          ,Register control word enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                                           CD_DIS          ,Corrupted data disable" "No,Yes"
newline
bitfld.long 0x04 0. " MD_EN           ,Mirrored DIMM enable" "Disabled,Enabled"
group.long 0x118++0x07
line.long 0x00 "DDR_SDRAM_MODE,DDR SDRAM Mode Configuration Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x00 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x04 "DDR_SDRAM_MODE_2,DDR SDRAM Mode Configuration 2 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
group.long 0x120++0x0B
line.long 0x00 "DDR_SDRAM_MD_CNTL,DDR SDRAM Mode Control Register"
bitfld.long 0x00 31. " MD_EN           ,Mode enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "                                           CS_SEL          ,Select chip select" "0,1,2,3,0 and 1,2 and 3,?..."
newline
bitfld.long 0x00 24.--27. " MD_SEL          ,Mode register select" "MR,EMR,EMR2,EMR3,?..."
bitfld.long 0x00 23. "                                               SET_REF         ,Set refresh" "No refresh,Refresh"
newline
bitfld.long 0x00 22. " SET_PRE         ,Set precharge" "No precharge,Precharge"
bitfld.long 0x00 20.--21. "                                       CKE_CNTL        ,Clock enable control" "Not forced,Forced to low value,Forced to high value,?..."
newline
hexmask.long.tbyte 0x00 0.--17. 1. " MD_VALUE        ,Mode register value"
line.long 0x04 "DDR_SDRAM_INTERVAL,DDR SDRAM Interval Configuration Register"
hexmask.long.word 0x04 16.--31. 1. " REFINT          ,Refresh interval"
hexmask.long.word 0x04 0.--13. 1. "                                               BSTOPRE         ,Precharge interval"
line.long 0x08 "DDR_DATA_INIT,DDR SDRAM Data Initialization Register"
group.long 0x130++0x03
line.long 0x00 "DDR_SDRAM_CLK_CNTL,DDR SDRAM Clock Control Register"
bitfld.long 0x00 22.--26. " CLK_ADJUST      ,Clock adjust" "Aligned,1/16 cycle,1/8 cycle,3/16 cycle,1/4 cycle,5/16 cycle,3/8 cycle,7/16 cycle,1/2 cycle,9/16 cycle,5/8 cycle,11/16 cycle,3/4 cycle,13/16 cycle,7/8 cycle,15/16 cycle,1 cycle,?..."
group.long 0x148++0x07
line.long 0x00 "DDR_INIT_ADDR,DDR Training Initialization Address Register"
line.long 0x04 "DDR_INIT_EXT_ADDRESS,DDR Training Initialization Extended Address Register"
bitfld.long 0x04 31. " UIA             ,Use initialization address" "Default,DDR_INIT"
hexmask.long.byte 0x04 0.--7. 0x01 "                                           INIT_EXT_ADDR   ,Initialization extended address"
group.long 0x160++0x07
line.long 0x00 "TIMING_CFG_4,DDR SDRAM Timing Configuration 4 Register"
bitfld.long 0x00 28.--31. " RWT             ,Read-to-write turnaround for same chip select" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 24.--27. "                                            WRT             ,Write-to-read turnaround for same chip select" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 20.--23. " RRT             ,Read-to-read turnaround for same chip select" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
bitfld.long 0x00 16.--19. "                                      WWT             ,Write-to-write turnaround for same chip select" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
newline
bitfld.long 0x00 14.--15. " EXT_RWT         ,Extended read-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x00 12. "                                              EXT_WRT         ,Extended write-to-read turnaround" "0 clk,4 clk"
newline
bitfld.long 0x00 10. " EXT_RRT         ,Extended read-to-read turnaround" "0 clk,4 clk"
bitfld.long 0x00 8. "                                              EXT_WWT         ,Extended write-to-write turnaround" "0 clk,4 clk"
newline
bitfld.long 0x00 4. " EXT_REFINT      ,Refresh interval" "0 clk,65536 clk"
bitfld.long 0x00 0.--1. "                                          DLL_LOCK        ,DDR SDRAM DLL lock time" "200 clk,512 clk,1024 clk,?..."
line.long 0x04 "TIMING_CFG_5,DDR SDRAM Timing Configuration 5 Register"
bitfld.long 0x04 24.--28. " RODT_ON         ,Read to ODT on" "CASLAT - WR_LAT,0 clk,1 clk,2 clk,,,,,,,,,11 clk,?..."
bitfld.long 0x04 20.--22. "                                    RODT_OFF        ,Read to ODT off" "4 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
newline
bitfld.long 0x04 12.--16. " WODT_ON         ,Write to ODT on" "0 clk,0 clk,1 clk,2 clk,5 clk,?..."
bitfld.long 0x04 8.--10. "                                              WODT_OFF        ,Write to ODT off" "4 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
group.long 0x16C++0x03
line.long 0x00 "TIMING_CFG_7,DDR SDRAM Timing Configuration 7 Register"
bitfld.long 0x00 28.--29. " CKE_RST         ,CKE reset time" "200 clk,256 clk,512 clk,1024 clk"
bitfld.long 0x00 24.--27. "                                           CKSRE           ,Valid clock after self refresh entry" "15 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,32 clk"
newline
bitfld.long 0x00 20.--23. " CKSRX           ,Valid clock after self refresh exit" "15 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,27 clk"
bitfld.long 0x00 16.--19. "                                             PAR_LAT         ,Parity latency" "Disabled,1 clk,2 clk,,,,,7 clk,8 clk,?..."
newline
bitfld.long 0x00 4.--7. " CS_TO_CMD       ,Chip select to command latency" "Disabled,1 clk,2 clk,,,,,7 clk,8 clk,?..."
group.long 0x170++0x07
line.long 0x00 "DDR_ZQ_CNTL,DDR ZQ Calibration Control Register"
bitfld.long 0x00 31. " ZQ_EN           ,ZQ calibration enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "                                           ZQINIT          ,POR ZQ calibration time" ",,,,,,,128 clk,256 clk,512 clk,1024 clk,?..."
newline
bitfld.long 0x00 16.--19. " ZQOPER          ,Normal operation full calibration time" ",,,,,,,128 clk,256 clk,512 clk,1024 clk,?..."
bitfld.long 0x00 8.--11. "                                           ZQCS            ,Normal operation short calibration time" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk,256 clk,512 clk,?..."
newline
bitfld.long 0x00 0.--3. " ZQCS_INT        ,ZQCS interval" "32 seq,64 seq,128 seq,256 seq,512 seq,1024 seq,2048 seq,4096 seq,8192 seq,16384 seq,32768 seq,,,,,Disabled"
line.long 0x04 "DDR_WRLVL_CNTL,DDR Write Leveling Control Register"
bitfld.long 0x04 31. " WRLVL_EN        ,Write leveling enable" "Disabled,Enabled"
rbitfld.long 0x04 30. "                                           WRLVL_DONE      ,Write leveling done" "Not completed,Completed"
newline
bitfld.long 0x04 24.--26. " WRLVL_MRD       ,First DQS pulse rising edge after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 20.--22. "                                            WRLVL_ODTEN     ,ODT delay after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
newline
bitfld.long 0x04 16.--18. " WRLVL_DQSEN     ,DQS/DQS_B delay after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 12.--15. "                                            WRLVL_SMPL      ,Write leveling sample time" "32 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x04 8.--10. " WRLVL_WLR       ,Write leveling repetition time" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 0.--4. "                                            WRLVL_START     ,Write leveling start time for DQS[0]" "0 clk,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
group.long 0x17C++0x0B
line.long 0x00 "DDR_SR_CNTR,DDR Self Refresh Counter Register"
bitfld.long 0x00 16.--19. " SR_IT           ,Self refresh idle threshold" "Disabled,2^10 DRAM clk,2^12 DRAM clk,2^14 DRAM clk,2^16 DRAM clk,2^18 DRAM clk,2^20 DRAM clk,2^22 DRAM clk,2^24 DRAM clk,2^26 DRAM clk,2^28 DRAM clk,2^30 DRAM clk,?..."
line.long 0x04 "DDR_SDRAM_RCW_1,DDR Control Words 1 Register"
bitfld.long 0x04 28.--31. " RCW0            ,Register control word 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "                                                 RCW1            ,Register control word 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 20.--23. " RCW2            ,Register control word 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                                 RCW3            ,Register control word 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 12.--15. " RCW4            ,Register control word 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "                                                 RCW5            ,Register control word 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 4.--7. " RCW6            ,Register control word 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                                                 RCW7            ,Register control word 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "DDR_SDRAM_RCW_2,DDR Control Words 2 Register"
bitfld.long 0x08 28.--31. " RCW8            ,Register control word 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 24.--27. "                                                 RCW9            ,Register control word 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 20.--23. " RCW10           ,Register control word 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 16.--19. "                                                 RCW11           ,Register control word 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 12.--15. " RCW12           ,Register control word 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 8.--11. "                                                 RCW13           ,Register control word 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 4.--7. " RCW14           ,Register control word 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                                                 RCW15           ,Register control word 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x190++0x07
line.long 0x00 "DDR_WRLVL_CNTL_2,DDR Write Leveling Control 2 Register"
bitfld.long 0x00 24.--28. " WRLVL_START_1   ,Write leveling start time for DQS[1]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x00 16.--20. "                                        WRLVL_START_2   ,Write leveling start time for DQS[2]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
newline
bitfld.long 0x00 8.--12. " WRLVL_START_3   ,Write leveling start time for DQS[3]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x00 0.--4. "                                        WRLVL_START_4   ,Write leveling start time for DQS[4]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
line.long 0x04 "DDR_WRLVL_CNTL_3,DDR Write Leveling Control 3 Register"
bitfld.long 0x04 24.--28. " WRLVL_START_5   ,Write leveling start time for DQS[5]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x04 16.--20. "                                        WRLVL_START_6   ,Write leveling start time for DQS[6]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
newline
bitfld.long 0x04 8.--12. " WRLVL_START_7   ,Write leveling start time for DQS[7]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x04 0.--4. "                                        WRLVL_START_8   ,Write leveling start time for DQS[8]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
group.long 0x1A0++0x0F
line.long 0x00 "DDR_SDRAM_RCW_3,DDR Control Words 3 Register"
hexmask.long.byte 0x00 24.--31. 1. " RCW1X           ,Register control word 1X"
hexmask.long.byte 0x00 16.--23. 1. "                                                 RCW2X           ,Register control word 2X"
newline
hexmask.long.byte 0x00 8.--15. 1. " RCW3X           ,Register control word 3X"
hexmask.long.byte 0x00 0.--7. 1. "                                                 RCW4X           ,Register control word 4X"
line.long 0x04 "DDR_SDRAM_RCW_4,DDR Control Words 4 Register"
hexmask.long.byte 0x04 24.--31. 1. " RCW5X           ,Register control word 5X"
hexmask.long.byte 0x04 16.--23. 1. "                                                 RCW6X           ,Register control word 6X"
newline
hexmask.long.byte 0x04 8.--15. 1. " RCW7X           ,Register control word 7X"
hexmask.long.byte 0x04 0.--7. 1. "                                                 RCW8X           ,Register control word 8X"
line.long 0x08 "DDR_SDRAM_RCW_5,DDR Control Words 5 Register"
hexmask.long.byte 0x08 24.--31. 1. " RCW9X           ,Register control word 9X"
hexmask.long.byte 0x08 16.--23. 1. "                                                 RCW10X          ,Register control word 10X"
newline
hexmask.long.byte 0x08 8.--15. 1. " RCW11X          ,Register control word 11X"
hexmask.long.byte 0x08 0.--7. 1. "                                                 RCW12X          ,Register control word 12X"
line.long 0x0C "DDR_SDRAM_RCW_6,DDR Control Words 6 Register"
hexmask.long.byte 0x0C 24.--31. 1. " RCW13X          ,Register control word 13X"
hexmask.long.byte 0x0C 16.--23. 1. "                                                 RCW14X          ,Register control word 14X"
newline
hexmask.long.byte 0x0C 8.--15. 1. " RCW15X          ,Register control word 15X"
hexmask.long.byte 0x0C 0.--7. 1. "                                                 SPARE_CNFG      ,Spare Config Bits"
group.long 0x200++0x17
line.long 0x00 "DDR_SDRAM_MODE_3,DDR SDRAM Mode Configuration 3 Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x00 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x04 "DDR_SDRAM_MODE_4,DDR SDRAM Mode Configuration 4 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
line.long 0x08 "DDR_SDRAM_MODE_5,DDR SDRAM Mode Configuration 5 Register"
hexmask.long.word 0x08 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x08 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x0C "DDR_SDRAM_MODE_6,DDR SDRAM Mode Configuration 6 Register"
hexmask.long.word 0x0C 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x0C 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
line.long 0x10 "DDR_SDRAM_MODE_7,DDR SDRAM Mode Configuration 7 Register"
hexmask.long.word 0x10 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x10 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x14 "DDR_SDRAM_MODE_8,DDR SDRAM Mode Configuration 8 Register"
hexmask.long.word 0x14 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x14 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
group.long 0x220++0x1F
line.long 0x00 "DDR_SDRAM_MODE_9,DDR SDRAM Mode Configuration 9 Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x00 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x04 "DDR_SDRAM_MODE_10,DDR SDRAM Mode Configuration 10 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x08 "DDR_SDRAM_MODE_11,DDR SDRAM Mode Configuration 11 Register"
hexmask.long.word 0x08 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x08 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x0C "DDR_SDRAM_MODE_12,DDR SDRAM Mode Configuration 12 Register"
hexmask.long.word 0x0C 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x0C 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x10 "DDR_SDRAM_MODE_13,DDR SDRAM Mode Configuration 13 Register"
hexmask.long.word 0x10 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x10 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x14 "DDR_SDRAM_MODE_14,DDR SDRAM Mode Configuration 14 Register"
hexmask.long.word 0x14 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x14 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x18 "DDR_SDRAM_MODE_15,DDR SDRAM Mode Configuration 15 Register"
hexmask.long.word 0x18 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x18 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x1C "DDR_SDRAM_MODE_16,DDR SDRAM Mode Configuration 16 Register"
hexmask.long.word 0x1C 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x1C 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
group.long 0x250++0x03
line.long 0x00 "TIMING_CFG_8,DDR SDRAM Timing Configuration 8 Register"
bitfld.long 0x00 28.--31. " RWT_BG          ,Read-to-write turnaround for same chip select and same bank group" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 24.--27. "                                            WRT_BG          ,Write-to-read turnaround for same chip select and same bank group" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 20.--23. " RRT_BG          ,Read-to-read turnaround for same chip select and same bank group" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
bitfld.long 0x00 16.--19. "                                      WWT_BG          ,Write-to-write turnaround for same chip select and same bank group" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
newline
bitfld.long 0x00 12.--15. " ACTTOACT_BG     ,Activate-to-activate interval for the same bank group" "Unused,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 8.--11. "                                             WRTORD_BG       ,Last write data pair to read command issue interval for the same bank group" "Unused,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 7. " EXT_WRTORD_BG   ,Adds 16 clk cycles between last write data pair and the subsequent read command to the same physical bank" "Not added,Added"
bitfld.long 0x00 0.--4. "                                          PRE_ALL_REC     ,Precharge all-to-activate interval" "PRETOACT,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk"
group.long 0x260++0x03
line.long 0x00 "DDR_SDRAM_CFG_3,DDR SDRAM Control Configuration 3 Register"
bitfld.long 0x00 31. " DDRC_RST        ,DDR controller reset" "No reset,Reset"
bitfld.long 0x00 30. "                                           ECC_FIX_EN      ,ECC fixing enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--27. " ECC_SCRUB_INT   ,ECC scrubbing interval" "Not issued,Every seq,Every 2 seq,Every 4 seq,Every 8 seq,Every 16 seq,Every 32 seq,Every 64 seq,Every 128 seq,Every 256 seq,Every 512 seq,Every 1024 seq,Every 2048 seq,Every 4096 seq,Every 8192 seq,Every 16384 seq"
bitfld.long 0x00 17. "                                    WR_PRE          ,Write preamble" "1 tCK,2 tCK"
newline
bitfld.long 0x00 16. " RD_PRE          ,Read preamble" "1 tCK,2 tCK"
bitfld.long 0x00 12.--13. "                                              DM_CFG          ,Data mask config" "Normal data masks,,Data bus inversion,Held high"
newline
bitfld.long 0x00 8.--9. " REF_MODE        ,Refresh mode" "Disabled,2x fine,4x fine,?..."
bitfld.long 0x00 0. "                                           DIS_MRS_PAR     ,Disable MRS on parity error" "No,Yes"
group.long 0x400++0x0F
line.long 0x00 "DDR_DQ_MAP0,DQ Mapping Register 0 Register"
bitfld.long 0x00 26.--31. " DQ_0_3          ,DQ[0:3] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x00 20.--25. "                                            DQ_4_7          ,DQ[4:7] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x00 14.--19. " DQ_8_11         ,DQ[8:11] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x00 8.--13. "                                            DQ_12_15        ,DQ[12:15] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x00 2.--7. " DQ_16_19        ,DQ[16:19] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x04 "DDR_DQ_MAP1,DQ Mapping Register 1 Register"
bitfld.long 0x04 26.--31. " DQ_20_23        ,DQ[20:23] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x04 20.--25. "                                            DQ_24_27        ,DQ[24:27] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x04 14.--19. " DQ_28_31        ,DQ[28:31] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x04 8.--13. "                                            DQ_32_35        ,DQ[32:35] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x04 2.--7. " DQ_36_39        ,DQ[36:39] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x08 "DDR_DQ_MAP2,DQ Mapping Register 2 Register"
bitfld.long 0x08 26.--31. " DQ_40_43        ,DQ[40:43] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x08 20.--25. "                                            DQ_44_47        ,DQ[44:47] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x08 14.--19. " DQ_48_51        ,DQ[48:51] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x08 8.--13. "                                            DQ_52_55        ,DQ[52:55] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x08 2.--7. " DQ_56_59        ,DQ[56:59] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x0C "DDR_DQ_MAP3,DQ Mapping Register 3 Register"
bitfld.long 0x0C 26.--31. " DQ_60_63        ,DQ[60:63] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x0C 20.--25. "                                            ECC_0_3         ,ECC[0:3] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x0C 14.--19. " ECC_4_7         ,ECC[4:7] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x0C 0. "                                            ORS             ,Odd rank swizzle" "follow the same swizzling,further swizzled by swapping bits"
rgroup.long 0xB20++0x03
line.long 0x00 "DDRDSR_1,DDR Debug Status 1 Register"
bitfld.long 0x00 15. " CZ              ,Command impedance" "High,Low"
bitfld.long 0x00 7. "                                               DZ              ,Data impedance" "High,Low"
group.long 0xB24++0x0B
line.long 0x00 "DDRDSR_2,DDR Debug Status 2 Register"
bitfld.long 0x00 31. " CLKZ            ,Current setting of driver clock impedance" "High,Low"
eventfld.long 0x00 1. "                                               RPD_ST          ,Rapid clear of memory start" "Not started,Started"
newline
eventfld.long 0x00 0. " RPD_END         ,Rapid clear of memory end" "Not ended,Ended"
line.long 0x04 "DDRCDR_1,DDR Control Driver 1 Register"
bitfld.long 0x04 31. " DHC_EN          ,DDR driver hardware compensation enable" "Disabled,Enabled"
bitfld.long 0x04 18.--19. "                                           ODT             ,ODT termination value for IOs" "0,1,2,3"
newline
bitfld.long 0x04 17. " DSO_C_EN        ,Driver software override enable for address/command" "Disabled,Enabled"
bitfld.long 0x04 16. "                                           DSO_D_EN        ,Driver software override enable for data" "Disabled,Enabled"
newline
bitfld.long 0x04 15. " DSO_CZ          ,DDR driver software command impedance override" "Highest,Lowest"
bitfld.long 0x04 7. "                                            DSO_DZ          ,Driver software data impedance override" "Highest,Lowest"
line.long 0x08 "DDRCDR_2,DDR Control Driver 2 Register"
bitfld.long 0x08 31. " DSO_CLK_EN      ,Driver software override enable for clocks" "Disabled,Enabled"
bitfld.long 0x08 27. "                                           DSO_CLKZ        ,Driver software clocks impedance override" "Highest,Lowest"
newline
bitfld.long 0x08 15. " VREF_OVRD_EN    ,Indicates if internal VRef value will be trained or defined" "Trained,Defined"
bitfld.long 0x08 8.--13. "                                            VREF_OVRD_VAL   ,Defines the override value to use for the internal VRef if VREF_OVRD_EN is set" "37%,38%,39%,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,99%,100%"
newline
bitfld.long 0x08 7. " VREF_TRAIN_EN   ,DRAM VRef training enable" "Disabled,Enabled"
bitfld.long 0x08 6. "                                           VREF_DRAM_RANGE ,VRef DRAM range" "Range 1,Range 2"
newline
bitfld.long 0x08 0. " ODT             ,ODT termination value for IOs" "0,1"
rgroup.long 0xBF8++0x07
line.long 0x00 "DDR_IP_REV1,DDR IP Block Revision 1 Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID           ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "                                               IP_MJ           ,Major revision"
newline
hexmask.long.byte 0x00 0.--7. 1. " IP_MN           ,Minor revision"
line.long 0x04 "DDR_IP_REV2,DDR IP Block Revision 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT          ,IP block integration options"
hexmask.long.byte 0x04 0.--7. 1. "                                                 IP_CFG          ,IP block configuration options"
group.long 0xD00++0x03
line.long 0x00 "DDR_MTCR,DDR Memory Test Control Register"
bitfld.long 0x00 31. " MT_EN           ,Memory test enable" "Disabled,Enabled"
bitfld.long 0x00 24.--25. "                                           MT_TYP          ,Memory test type" "Writes and reads,Writes only,Reads only,?..."
newline
bitfld.long 0x00 16.--19. " MT_TRNARND      ,Memory test turnaround" "Entire mem write then read,1 transaction each,2 transactions each,4 transactions each,?..."
bitfld.long 0x00 9. "                         MT_ADDR_EN      ,Memory test address range enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " MT_STAT         ,Memory test status" "Not detected,Detected"
group.long 0xD20++0x03
line.long 0x00 "DDR_MTP0,DDR Memory Test Pattern 0 Register"
group.long 0xD24++0x03
line.long 0x00 "DDR_MTP1,DDR Memory Test Pattern 1 Register"
group.long 0xD28++0x03
line.long 0x00 "DDR_MTP2,DDR Memory Test Pattern 2 Register"
group.long 0xD2C++0x03
line.long 0x00 "DDR_MTP3,DDR Memory Test Pattern 3 Register"
group.long 0xD30++0x03
line.long 0x00 "DDR_MTP4,DDR Memory Test Pattern 4 Register"
group.long 0xD34++0x03
line.long 0x00 "DDR_MTP5,DDR Memory Test Pattern 5 Register"
group.long 0xD38++0x03
line.long 0x00 "DDR_MTP6,DDR Memory Test Pattern 6 Register"
group.long 0xD3C++0x03
line.long 0x00 "DDR_MTP7,DDR Memory Test Pattern 7 Register"
group.long 0xD40++0x03
line.long 0x00 "DDR_MTP8,DDR Memory Test Pattern 8 Register"
group.long 0xD44++0x03
line.long 0x00 "DDR_MTP9,DDR Memory Test Pattern 9 Register"
group.long 0xD60++0x0F
line.long 0x00 "DDR_MT_ST_EXT_ADDR,DDR Memory Test Start Extended Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " MT_ST_EXT_ADDR  ,Memory test start extended address"
line.long 0x04 "DDR_MT_ST_ADDR,DDR Memory Test Start Address Register"
line.long 0x08 "DDR_MT_END_EXT_ADDR,DDR Memory Test End Extended Address Register"
hexmask.long.byte 0x08 0.--7. 0x01 " MT_END_EXT_ADDR ,Memory test end extended address"
line.long 0x0C "DDR_MT_END_ADDR,DDR Memory Test End Address Register"
group.long 0xE00++0x0B
line.long 0x00 "DATA_ERR_INJECT_HI,Memory Data Path Error Injection Mask High Register"
line.long 0x04 "DATA_ERR_INJECT_LO,Memory Data Path Error Injection Mask Low Register"
line.long 0x08 "ECC_ERR_INJECT,Memory Data Path Error Injection Mask ECC"
bitfld.long 0x08 16. " APIEN           ,Address parity error injection enable" "Disabled,Enabled"
bitfld.long 0x08 9. "                                           EMB             ,ECC mirror byte functionality enable" "Disabled,Enabled"
newline
bitfld.long 0x08 8. " EIEN            ,Error injection enable" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "                                           EEIM            ,ECC error injection mask"
group.long 0xE20++0x0B
line.long 0x00 "CAPTURE_DATA_HI,Memory Data Path Read Capture High Register"
line.long 0x04 "CAPTURE_DATA_LO,Memory Data Path Read Capture Low Register"
line.long 0x08 "CAPTURE_ECC,Memory Data Path Read Capture ECC Register"
group.long 0xE40++0x1B
line.long 0x00 "ERR_DETECT,Memory Error Detect Register"
eventfld.long 0x00 31. " MME             ,Multiple memory errors" "No error,Error"
eventfld.long 0x00 12. "                                           SSBE            ,Scrubbed single-bit ECC error" "No error,Error"
newline
eventfld.long 0x00 8. " APE             ,Address parity error" "No error,Error"
eventfld.long 0x00 7. "                                           ACE             ,Automatic calibration error" "No error,Error"
newline
eventfld.long 0x00 4. " CDE             ,Corrupted data error" "No error,Error"
eventfld.long 0x00 3. "                                           MBE             ,Multiple-bit error" "No error,Error"
newline
eventfld.long 0x00 2. " SBE             ,Single-bit ECC error" "No error,Error"
eventfld.long 0x00 0. "                                           MSE             ,Memory select error" "No error,Error"
line.long 0x04 "ERR_DISABLE,Memory Error Disable Register"
bitfld.long 0x04 12. " SSBED           ,Scrubbed single-bit ECC error disable" "No,Yes"
bitfld.long 0x04 8. "                                                APED            ,Address parity error disable" "No,Yes"
newline
bitfld.long 0x04 7. " ACED            ,Automatic calibration error disable" "No,Yes"
bitfld.long 0x04 4. "                                                CDED            ,Corrupted data error disable" "No,Yes"
newline
bitfld.long 0x04 3. " MBED            ,Multiple-bit ECC error disable" "No,Yes"
bitfld.long 0x04 2. "                                                SBED            ,Single-bit ECC error disable" "No,Yes"
newline
bitfld.long 0x04 0. " MSED            ,Memory select error disable" "Enabled,Disabled"
line.long 0x08 "ERR_INT_EN,Memory Error Interrupt Enable Register"
bitfld.long 0x08 12. " SSBEE           ,Scrubbed single-bit ECC error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 8. "                                           APEE            ,Address parity error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 7. " ACEE            ,Automatic calibration error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                                           CDEE            ,Corrupted data error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " MBEE            ,Multiple-bit ECC error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 2. "                                           SBEE            ,Single-bit ECC error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " MSEE            ,Memory select error interrupt enable" "Disabled,Enabled"
line.long 0x0C "CAPTURE_ATTRIBUTES,Memory Error Attributes Capture Register"
bitfld.long 0x0C 28.--30. " BNUM            ,Data beat number" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 24.--26. "                                                  TSIZ            ,Transaction size for the error (in double words)" "8 double words,1 double word,2 double words,3 double words,4 double words,5 double words,6 double words,7 double words"
newline
hexmask.long.byte 0x0C 16.--23. 1. " TSRC            ,Transaction source for the error"
bitfld.long 0x0C 12.--13. "                                                 TTYP            ,Transaction type for the error" ",Write,Read,Read-modify-write"
newline
bitfld.long 0x0C 0. " VLD             ,Valid information captured" "Not valid,Valid"
line.long 0x10 "CAPTURE_ADDRESS,Memory Error Address Capture Register"
line.long 0x14 "CAPTURE_EXT_ADDRESS,Memory Error Extended Address Capture Register"
hexmask.long.byte 0x14 0.--7. 0x01 " CEADDR          ,Captured extended address"
line.long 0x18 "ERR_SBE,Single-Bit ECC Memory Error Management Register"
hexmask.long.byte 0x18 24.--31. 1. " SSBET           ,Scrubbed single-bit error threshold"
hexmask.long.byte 0x18 16.--23. 1. "                                                 SBET            ,Single-bit error threshold"
newline
hexmask.long.byte 0x18 8.--15. 1. " SSBEC           ,Scrubbed single-bit error counter"
hexmask.long.byte 0x18 0.--7. 1. "                                                 SBEC            ,Single-bit error counter"
width 0x0B
tree.end
tree "DDR2"
base ad:0x01090000
width 22.
group.long 0x0++0x03
line.long 0x00 "CS0_BNDS,Chip Select 0 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 0"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 0"
group.long 0x8++0x03
line.long 0x00 "CS1_BNDS,Chip Select 1 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 1"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 1"
group.long 0x10++0x03
line.long 0x00 "CS2_BNDS,Chip Select 2 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 2"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 2"
group.long 0x18++0x03
line.long 0x00 "CS3_BNDS,Chip Select 3 Memory Bounds Register"
hexmask.long.word 0x00 16.--31. 0x01 " SA              ,Starting address for chip select 3"
hexmask.long.word 0x00 0.--15. 0x01 "                                               EA              ,Ending address for chip select 3"
group.long 0x80++0x03
line.long 0x00 "CS0_CONFIG,Chip Select 0 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 0 enable" "Disabled,Enabled"
bitfld.long 0x00 29. "                                           INTLV_EN        ,Memory controller interleave enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--27. " INTLV_CTL       ,Interleaving control" ",,,,,,,,256-byte,?..."
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 0 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS0,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS0,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 0" "2 bits,3 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 0" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x84++0x03
line.long 0x00 "CS1_CONFIG,Chip Select 1 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 1 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 1 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS1,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS1,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 1" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 1" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x88++0x03
line.long 0x00 "CS2_CONFIG,Chip Select 2 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 2 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 2 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS2,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS2,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 2" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 2" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x8C++0x03
line.long 0x00 "CS3_CONFIG,Chip Select 3 Configuration Register"
bitfld.long 0x00 31. " CS_EN           ,Chip select 3 enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                                           AP_EN           ,Chip select 3 auto-precharge enable" "Disabled,Enabled"
newline
bitfld.long 0x00 20.--22. " ODT_RD_CFG      ,ODT for reads configuration" "Never asserted,Only during reads to CS3,Only during reads to other chip selects,Only during reads to other DIMM modules,For all reads,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
bitfld.long 0x00 16.--18. "  ODT_WR_CFG      ,ODT for writes configuration" "Never asserted,Only during writes to CS3,Only during writes to other chip selects,Only during writes to other DIMM modules,For all writes,Only during transactions to same DIMM,Only during transactions to own CS and other DIMM,Only during transactions to other CS in same DIMM"
newline
bitfld.long 0x00 14.--15. " BA_BITS_CS      ,Number of bank bits for SDRAM on chip select 3" "2 bits,?..."
bitfld.long 0x00 8.--10. "                                             ROW_BITS_CS     ,Number of row bits for SDRAM on chip select 0" "12 bits,13 bits,14 bits,15 bits,16 bits,17 bits,18 bits,?..."
newline
bitfld.long 0x00 4.--5. " BG_BITS_CS      ,Number of bank group bits for SDRAM on chip select 3" "0 bits,1 bit,2 bits,?..."
bitfld.long 0x00 0.--2. "                                             COL_BITS_CS     ,Number of column bits for SDRAM on chip select 0" "8 bits,9 bits,10 bits,11 bits,?..."
group.long 0x100++0x0F
line.long 0x00 "TIMING_CFG_3,DDR SDRAM Timing Configuration 3 Register"
bitfld.long 0x00 28. " EXT_PRETOACT    ,Extended precharge-to-activate interval" "0 clk,16 clk"
bitfld.long 0x00 24.--25. "                                             EXT_ACTTOPRE    ,Extended activate to precharge interval" "0 clk,16 clk,32 clk,48 clk"
newline
bitfld.long 0x00 22. " EXT_ACTTORW     ,Extended activate to read/write interval for SDRAM" "0,1"
bitfld.long 0x00 16.--21. "                                                  EXT_REFREC      ,Extended refresh recovery time" "0 clk,16 clk,32 clk,48 clk,64 clk,80 clk,96 clk,112 clk,128 clk,144 clk,160 clk,176 clk,192 clk,208 clk,224 clk,240 clk,256 clk,272 clk,288 clk,304 clk,320 clk,336 clk,352 clk,368 clk,?..."
newline
bitfld.long 0x00 12.--13. " EXT_CASLAT      ,Extended MCAS_B latency from READ command" "0 clk,8 clk,16 clk,?..."
bitfld.long 0x00 10. "                                             EXT_ADD_LAT     ,Extended additive latency" "0 clk,16 clk"
newline
bitfld.long 0x00 8. " EXT_WRREC       ,Extended last data to precharge minimum interval" "0 clk,16 clk"
bitfld.long 0x00 0.--2. "                                             CNTL_ADJ        ,Control adjust" "Aligned,1/2 cycle,1 cycle,3/2 cycles,2 cycles,5/2 cycles,?..."
line.long 0x04 "TIMING_CFG_0,DDR SDRAM Timing Configuration 0 Register"
bitfld.long 0x04 30.--31. " RWT             ,Read-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x04 28.--29. "                                              WRT             ,Write-to-read turnaround" "0 clk,1 clk,2 clk,3 clk"
newline
bitfld.long 0x04 26.--27. " RRT             ,Read-to-read turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x04 24.--25. "                                              WWT             ,Write-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
newline
bitfld.long 0x04 20.--23. " ACT_PD_EXIT     ,Active powerdown exit timing" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x04 16.--19. "                                             PRE_PD_EXIT     ,Precharge powerdown exit timing" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x04 14.--15. " EXT_PRE_PD_EXIT ,Extended precharge powerdown exit timing" "0 clk,16 clk,32 clk,48 clk"
bitfld.long 0x04 0.--4. "                                             MRS_CYC         ,Mode register set cycle time" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk"
line.long 0x08 "TIMING_CFG_1,DDR SDRAM Timing Configuration 1 Register"
bitfld.long 0x08 28.--31. " PRETOACT        ,Precharge-to-activate interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 24.--27. "                                             ACTTOPRE        ,Activate to precharge interval" "16 clk,17 clk,18 clk,19 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x08 20.--23. " ACTTORW         ,Activate to read/write interval for SDRAM" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 17.--19. "                                             CASLAT          ,MCAS_B latency from READ command" "1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk"
newline
bitfld.long 0x08 12.--15. " REFREC          ,Refresh recovery time" "8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk"
bitfld.long 0x08 8.--11. "                                             WRREC           ,Last data to precharge minimum interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x08 4.--7. " ACTTOACT        ,Activate-to-activate interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x08 0.--3. "                                             WRTORD          ,Last write data pair to read command issue interval" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
line.long 0x0C "TIMING_CFG_2,DDR SDRAM Timing Configuration 2 Register"
bitfld.long 0x0C 28.--31. " ADD_LAT         ,Additive latency" "0 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,?..."
bitfld.long 0x0C 19.--22. "                                             WR_LAT          ,Write latency" ",,,,,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x0C 18. " EXT_WR_LAT      ,Extended write latency" "0 clk,16 clk"
bitfld.long 0x0C 13.--16. "                                             RD_TO_PRE       ,Read to precharge" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x0C 6.--8. " CKE_PLS         ,Minimum CKE pulse width" "8 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
bitfld.long 0x0C 0.--5. "                                              FOUR_ACT        ,Window for four activates" ",1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk,32 clk,?..."
group.long 0x110++0x07
line.long 0x00 "DDR_SDRAM_CFG,DDR SDRAM Control Configuration Register"
bitfld.long 0x00 31. " MEM_EN          ,DDR SDRAM interface logic enable" "Disabled,Enabled"
bitfld.long 0x00 30. "                                           SREN            ,Self refresh enable (during sleep)" "Disabled,Enabled"
newline
bitfld.long 0x00 29. " ECC_EN          ,ECC enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                                           RD_EN           ,Registered DIMM enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--26. " SDRAM_TYPE      ,Type of SDRAM device to be used" ",,,,,DDR4 SDRAM,?..."
bitfld.long 0x00 21. "                                         DYN_PWR         ,Dynamic power management mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19.--20. " DBW             ,DRAM data bus width" "64-bit,32-bit,?..."
bitfld.long 0x00 18. "                                             BE_8            ,8-beat burst enable" "4-beat,8-beat"
newline
bitfld.long 0x00 16. " T3_EN           ,Enable 3T timing" "Disabled,Enabled"
bitfld.long 0x00 15. "                                           T2_EN           ,Enable 2T timing" "Disabled,Enabled"
newline
hexmask.long.byte 0x00 8.--14. 1. " BA_INTLV_CTL    ,Bank (chip select) interleaving control"
bitfld.long 0x00 3. "                                                 HSE             ,Global half-strength overrides" "Full,Half"
newline
bitfld.long 0x00 2. " ACC_ECC_EN      ,Accumulated ECC enable" "Disabled,Enabled"
bitfld.long 0x00 1. "                                           MEM_HALT        ,DDR memory controller halt" "Not halted,Halted"
newline
bitfld.long 0x00 0. " BI              ,Bypass initialization" "No bypass,Bypass"
line.long 0x04 "DDR_SDRAM_CFG_2,DDR SDRAM Control Configuration 2 Register"
bitfld.long 0x04 31. " FRC_SR          ,Force self refresh" "Not forced,Forced"
bitfld.long 0x04 21.--22. "                                         ODT_CFG         ,ODT configuration" "Never asserted,,Only during reads to DRAM,Always asserted"
newline
bitfld.long 0x04 12.--15. " NUM_PR          ,Number of posted refreshes" ",1,2,3,,,,,8,?..."
bitfld.long 0x04 11. "                                                  DDR_SLOW        ,DDR slow frequency" "Normal,Slow"
newline
bitfld.long 0x04 10. " X4_EN           ,X4 DRAM enable" "Disabled,Enabled"
bitfld.long 0x04 9. "                                           QD_EN           ,Quad-rank enable" "Disabled,Enabled"
newline
bitfld.long 0x04 8. " UNQ_MRS_EN      ,Unique MRS enable" "Disabled,Enabled"
bitfld.long 0x04 6. "                                           OBC_CFG         ,On-the-fly burst chop configuration" "Disabled,Enabled"
newline
bitfld.long 0x04 5. " AP_EN           ,Address parity enable" "Disabled,Enabled"
bitfld.long 0x04 4. "                                           D_INIT          ,DRAM data initialization" "Not initialized,Initialized"
newline
bitfld.long 0x04 2. " RCW_EN          ,Register control word enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                                           CD_DIS          ,Corrupted data disable" "No,Yes"
newline
bitfld.long 0x04 0. " MD_EN           ,Mirrored DIMM enable" "Disabled,Enabled"
group.long 0x118++0x07
line.long 0x00 "DDR_SDRAM_MODE,DDR SDRAM Mode Configuration Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x00 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x04 "DDR_SDRAM_MODE_2,DDR SDRAM Mode Configuration 2 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
group.long 0x120++0x0B
line.long 0x00 "DDR_SDRAM_MD_CNTL,DDR SDRAM Mode Control Register"
bitfld.long 0x00 31. " MD_EN           ,Mode enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "                                           CS_SEL          ,Select chip select" "0,1,2,3,0 and 1,2 and 3,?..."
newline
bitfld.long 0x00 24.--27. " MD_SEL          ,Mode register select" "MR,EMR,EMR2,EMR3,?..."
bitfld.long 0x00 23. "                                               SET_REF         ,Set refresh" "No refresh,Refresh"
newline
bitfld.long 0x00 22. " SET_PRE         ,Set precharge" "No precharge,Precharge"
bitfld.long 0x00 20.--21. "                                       CKE_CNTL        ,Clock enable control" "Not forced,Forced to low value,Forced to high value,?..."
newline
hexmask.long.tbyte 0x00 0.--17. 1. " MD_VALUE        ,Mode register value"
line.long 0x04 "DDR_SDRAM_INTERVAL,DDR SDRAM Interval Configuration Register"
hexmask.long.word 0x04 16.--31. 1. " REFINT          ,Refresh interval"
hexmask.long.word 0x04 0.--13. 1. "                                               BSTOPRE         ,Precharge interval"
line.long 0x08 "DDR_DATA_INIT,DDR SDRAM Data Initialization Register"
group.long 0x130++0x03
line.long 0x00 "DDR_SDRAM_CLK_CNTL,DDR SDRAM Clock Control Register"
bitfld.long 0x00 22.--26. " CLK_ADJUST      ,Clock adjust" "Aligned,1/16 cycle,1/8 cycle,3/16 cycle,1/4 cycle,5/16 cycle,3/8 cycle,7/16 cycle,1/2 cycle,9/16 cycle,5/8 cycle,11/16 cycle,3/4 cycle,13/16 cycle,7/8 cycle,15/16 cycle,1 cycle,?..."
group.long 0x148++0x07
line.long 0x00 "DDR_INIT_ADDR,DDR Training Initialization Address Register"
line.long 0x04 "DDR_INIT_EXT_ADDRESS,DDR Training Initialization Extended Address Register"
bitfld.long 0x04 31. " UIA             ,Use initialization address" "Default,DDR_INIT"
hexmask.long.byte 0x04 0.--7. 0x01 "                                           INIT_EXT_ADDR   ,Initialization extended address"
group.long 0x160++0x07
line.long 0x00 "TIMING_CFG_4,DDR SDRAM Timing Configuration 4 Register"
bitfld.long 0x00 28.--31. " RWT             ,Read-to-write turnaround for same chip select" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 24.--27. "                                            WRT             ,Write-to-read turnaround for same chip select" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 20.--23. " RRT             ,Read-to-read turnaround for same chip select" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
bitfld.long 0x00 16.--19. "                                      WWT             ,Write-to-write turnaround for same chip select" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
newline
bitfld.long 0x00 14.--15. " EXT_RWT         ,Extended read-to-write turnaround" "0 clk,1 clk,2 clk,3 clk"
bitfld.long 0x00 12. "                                              EXT_WRT         ,Extended write-to-read turnaround" "0 clk,4 clk"
newline
bitfld.long 0x00 10. " EXT_RRT         ,Extended read-to-read turnaround" "0 clk,4 clk"
bitfld.long 0x00 8. "                                              EXT_WWT         ,Extended write-to-write turnaround" "0 clk,4 clk"
newline
bitfld.long 0x00 4. " EXT_REFINT      ,Refresh interval" "0 clk,65536 clk"
bitfld.long 0x00 0.--1. "                                          DLL_LOCK        ,DDR SDRAM DLL lock time" "200 clk,512 clk,1024 clk,?..."
line.long 0x04 "TIMING_CFG_5,DDR SDRAM Timing Configuration 5 Register"
bitfld.long 0x04 24.--28. " RODT_ON         ,Read to ODT on" "CASLAT - WR_LAT,0 clk,1 clk,2 clk,,,,,,,,,11 clk,?..."
bitfld.long 0x04 20.--22. "                                    RODT_OFF        ,Read to ODT off" "4 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
newline
bitfld.long 0x04 12.--16. " WODT_ON         ,Write to ODT on" "0 clk,0 clk,1 clk,2 clk,5 clk,?..."
bitfld.long 0x04 8.--10. "                                              WODT_OFF        ,Write to ODT off" "4 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk"
group.long 0x16C++0x03
line.long 0x00 "TIMING_CFG_7,DDR SDRAM Timing Configuration 7 Register"
bitfld.long 0x00 28.--29. " CKE_RST         ,CKE reset time" "200 clk,256 clk,512 clk,1024 clk"
bitfld.long 0x00 24.--27. "                                           CKSRE           ,Valid clock after self refresh entry" "15 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,32 clk"
newline
bitfld.long 0x00 20.--23. " CKSRX           ,Valid clock after self refresh exit" "15 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,27 clk"
bitfld.long 0x00 16.--19. "                                             PAR_LAT         ,Parity latency" "Disabled,1 clk,2 clk,,,,,7 clk,8 clk,?..."
newline
bitfld.long 0x00 4.--7. " CS_TO_CMD       ,Chip select to command latency" "Disabled,1 clk,2 clk,,,,,7 clk,8 clk,?..."
group.long 0x170++0x07
line.long 0x00 "DDR_ZQ_CNTL,DDR ZQ Calibration Control Register"
bitfld.long 0x00 31. " ZQ_EN           ,ZQ calibration enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "                                           ZQINIT          ,POR ZQ calibration time" ",,,,,,,128 clk,256 clk,512 clk,1024 clk,?..."
newline
bitfld.long 0x00 16.--19. " ZQOPER          ,Normal operation full calibration time" ",,,,,,,128 clk,256 clk,512 clk,1024 clk,?..."
bitfld.long 0x00 8.--11. "                                           ZQCS            ,Normal operation short calibration time" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk,256 clk,512 clk,?..."
newline
bitfld.long 0x00 0.--3. " ZQCS_INT        ,ZQCS interval" "32 seq,64 seq,128 seq,256 seq,512 seq,1024 seq,2048 seq,4096 seq,8192 seq,16384 seq,32768 seq,,,,,Disabled"
line.long 0x04 "DDR_WRLVL_CNTL,DDR Write Leveling Control Register"
bitfld.long 0x04 31. " WRLVL_EN        ,Write leveling enable" "Disabled,Enabled"
rbitfld.long 0x04 30. "                                           WRLVL_DONE      ,Write leveling done" "Not completed,Completed"
newline
bitfld.long 0x04 24.--26. " WRLVL_MRD       ,First DQS pulse rising edge after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 20.--22. "                                            WRLVL_ODTEN     ,ODT delay after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
newline
bitfld.long 0x04 16.--18. " WRLVL_DQSEN     ,DQS/DQS_B delay after margining mode is programmed" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 12.--15. "                                            WRLVL_SMPL      ,Write leveling sample time" "32 clk,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x04 8.--10. " WRLVL_WLR       ,Write leveling repetition time" "1 clk,2 clk,4 clk,8 clk,16 clk,32 clk,64 clk,128 clk"
bitfld.long 0x04 0.--4. "                                            WRLVL_START     ,Write leveling start time for DQS[0]" "0 clk,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
group.long 0x17C++0x0B
line.long 0x00 "DDR_SR_CNTR,DDR Self Refresh Counter Register"
bitfld.long 0x00 16.--19. " SR_IT           ,Self refresh idle threshold" "Disabled,2^10 DRAM clk,2^12 DRAM clk,2^14 DRAM clk,2^16 DRAM clk,2^18 DRAM clk,2^20 DRAM clk,2^22 DRAM clk,2^24 DRAM clk,2^26 DRAM clk,2^28 DRAM clk,2^30 DRAM clk,?..."
line.long 0x04 "DDR_SDRAM_RCW_1,DDR Control Words 1 Register"
bitfld.long 0x04 28.--31. " RCW0            ,Register control word 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 24.--27. "                                                 RCW1            ,Register control word 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 20.--23. " RCW2            ,Register control word 2" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 16.--19. "                                                 RCW3            ,Register control word 3" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 12.--15. " RCW4            ,Register control word 4" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "                                                 RCW5            ,Register control word 5" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 4.--7. " RCW6            ,Register control word 6" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "                                                 RCW7            ,Register control word 7" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "DDR_SDRAM_RCW_2,DDR Control Words 2 Register"
bitfld.long 0x08 28.--31. " RCW8            ,Register control word 8" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 24.--27. "                                                 RCW9            ,Register control word 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 20.--23. " RCW10           ,Register control word 10" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 16.--19. "                                                 RCW11           ,Register control word 11" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 12.--15. " RCW12           ,Register control word 12" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 8.--11. "                                                 RCW13           ,Register control word 13" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x08 4.--7. " RCW14           ,Register control word 14" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                                                 RCW15           ,Register control word 15" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x190++0x07
line.long 0x00 "DDR_WRLVL_CNTL_2,DDR Write Leveling Control 2 Register"
bitfld.long 0x00 24.--28. " WRLVL_START_1   ,Write leveling start time for DQS[1]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x00 16.--20. "                                        WRLVL_START_2   ,Write leveling start time for DQS[2]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
newline
bitfld.long 0x00 8.--12. " WRLVL_START_3   ,Write leveling start time for DQS[3]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x00 0.--4. "                                        WRLVL_START_4   ,Write leveling start time for DQS[4]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
line.long 0x04 "DDR_WRLVL_CNTL_3,DDR Write Leveling Control 3 Register"
bitfld.long 0x04 24.--28. " WRLVL_START_5   ,Write leveling start time for DQS[5]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x04 16.--20. "                                        WRLVL_START_6   ,Write leveling start time for DQS[6]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
newline
bitfld.long 0x04 8.--12. " WRLVL_START_7   ,Write leveling start time for DQS[7]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
bitfld.long 0x04 0.--4. "                                        WRLVL_START_8   ,Write leveling start time for DQS[8]" "WRLVL_START,1/8 clk,1/4 clk,3/8 clk,1/2 clk,5/8 clk,3/4 clk,7/8 clk,1 clk,9/8 clk,5/4 clk,11/8 clk,3/2 clk,13/8 clk,7/4 clk,15/8 clk,2 clk,17/8 clk,9/4 clk,19/8 clk,5/2 clk,21/8 clk,11/4 clk,23/8 clk,3 clk,25/8 clk,13/4 clk,27/8 clk,7/2 clk,29/8 clk,15/4 clk,31/8 clk"
group.long 0x1A0++0x0F
line.long 0x00 "DDR_SDRAM_RCW_3,DDR Control Words 3 Register"
hexmask.long.byte 0x00 24.--31. 1. " RCW1X           ,Register control word 1X"
hexmask.long.byte 0x00 16.--23. 1. "                                                 RCW2X           ,Register control word 2X"
newline
hexmask.long.byte 0x00 8.--15. 1. " RCW3X           ,Register control word 3X"
hexmask.long.byte 0x00 0.--7. 1. "                                                 RCW4X           ,Register control word 4X"
line.long 0x04 "DDR_SDRAM_RCW_4,DDR Control Words 4 Register"
hexmask.long.byte 0x04 24.--31. 1. " RCW5X           ,Register control word 5X"
hexmask.long.byte 0x04 16.--23. 1. "                                                 RCW6X           ,Register control word 6X"
newline
hexmask.long.byte 0x04 8.--15. 1. " RCW7X           ,Register control word 7X"
hexmask.long.byte 0x04 0.--7. 1. "                                                 RCW8X           ,Register control word 8X"
line.long 0x08 "DDR_SDRAM_RCW_5,DDR Control Words 5 Register"
hexmask.long.byte 0x08 24.--31. 1. " RCW9X           ,Register control word 9X"
hexmask.long.byte 0x08 16.--23. 1. "                                                 RCW10X          ,Register control word 10X"
newline
hexmask.long.byte 0x08 8.--15. 1. " RCW11X          ,Register control word 11X"
hexmask.long.byte 0x08 0.--7. 1. "                                                 RCW12X          ,Register control word 12X"
line.long 0x0C "DDR_SDRAM_RCW_6,DDR Control Words 6 Register"
hexmask.long.byte 0x0C 24.--31. 1. " RCW13X          ,Register control word 13X"
hexmask.long.byte 0x0C 16.--23. 1. "                                                 RCW14X          ,Register control word 14X"
newline
hexmask.long.byte 0x0C 8.--15. 1. " RCW15X          ,Register control word 15X"
hexmask.long.byte 0x0C 0.--7. 1. "                                                 SPARE_CNFG      ,Spare Config Bits"
group.long 0x200++0x17
line.long 0x00 "DDR_SDRAM_MODE_3,DDR SDRAM Mode Configuration 3 Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x00 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x04 "DDR_SDRAM_MODE_4,DDR SDRAM Mode Configuration 4 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
line.long 0x08 "DDR_SDRAM_MODE_5,DDR SDRAM Mode Configuration 5 Register"
hexmask.long.word 0x08 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x08 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x0C "DDR_SDRAM_MODE_6,DDR SDRAM Mode Configuration 6 Register"
hexmask.long.word 0x0C 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x0C 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
line.long 0x10 "DDR_SDRAM_MODE_7,DDR SDRAM Mode Configuration 7 Register"
hexmask.long.word 0x10 16.--31. 1. " ESDMODE         ,Extended SDRAM mode"
hexmask.long.word 0x10 0.--15. 1. "                                               SDMODE          ,SDRAM mode"
line.long 0x14 "DDR_SDRAM_MODE_8,DDR SDRAM Mode Configuration 8 Register"
hexmask.long.word 0x14 16.--31. 1. " ESDMODE2        ,Extended SDRAM mode 2"
hexmask.long.word 0x14 0.--15. 1. "                                               ESDMODE3        ,Extended SDRAM mode 3"
group.long 0x220++0x1F
line.long 0x00 "DDR_SDRAM_MODE_9,DDR SDRAM Mode Configuration 9 Register"
hexmask.long.word 0x00 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x00 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x04 "DDR_SDRAM_MODE_10,DDR SDRAM Mode Configuration 10 Register"
hexmask.long.word 0x04 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x04 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x08 "DDR_SDRAM_MODE_11,DDR SDRAM Mode Configuration 11 Register"
hexmask.long.word 0x08 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x08 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x0C "DDR_SDRAM_MODE_12,DDR SDRAM Mode Configuration 12 Register"
hexmask.long.word 0x0C 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x0C 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x10 "DDR_SDRAM_MODE_13,DDR SDRAM Mode Configuration 13 Register"
hexmask.long.word 0x10 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x10 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x14 "DDR_SDRAM_MODE_14,DDR SDRAM Mode Configuration 14 Register"
hexmask.long.word 0x14 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x14 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
line.long 0x18 "DDR_SDRAM_MODE_15,DDR SDRAM Mode Configuration 15 Register"
hexmask.long.word 0x18 16.--31. 1. " ESDMODE4        ,Extended SDRAM mode 4"
hexmask.long.word 0x18 0.--15. 1. "                                               ESDMODE5        ,Extended SDRAM mode 5"
line.long 0x1C "DDR_SDRAM_MODE_16,DDR SDRAM Mode Configuration 16 Register"
hexmask.long.word 0x1C 16.--31. 1. " ESDMODE6        ,Extended SDRAM mode 6"
hexmask.long.word 0x1C 0.--15. 1. "                                               ESDMODE7        ,Extended SDRAM mode 7"
group.long 0x250++0x03
line.long 0x00 "TIMING_CFG_8,DDR SDRAM Timing Configuration 8 Register"
bitfld.long 0x00 28.--31. " RWT_BG          ,Read-to-write turnaround for same chip select and same bank group" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 24.--27. "                                            WRT_BG          ,Write-to-read turnaround for same chip select and same bank group" "Default,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 20.--23. " RRT_BG          ,Read-to-read turnaround for same chip select and same bank group" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
bitfld.long 0x00 16.--19. "                                      WWT_BG          ,Write-to-write turnaround for same chip select and same bank group" "BL/2 clk,BL/2 + 1 clk,BL/2 + 2 clk,BL/2 + 3 clk,BL/2 + 4 clk,BL/2 + 5 clk,BL/2 + 6 clk,BL/2 + 7 clk,BL/2 + 8 clk,BL/2 + 9 clk,BL/2 + 10 clk,BL/2 + 11 clk,BL/2 + 12 clk,BL/2 + 13 clk,BL/2 + 14 clk,BL/2 + 15 clk"
newline
bitfld.long 0x00 12.--15. " ACTTOACT_BG     ,Activate-to-activate interval for the same bank group" "Unused,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
bitfld.long 0x00 8.--11. "                                             WRTORD_BG       ,Last write data pair to read command issue interval for the same bank group" "Unused,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk"
newline
bitfld.long 0x00 7. " EXT_WRTORD_BG   ,Adds 16 clk cycles between last write data pair and the subsequent read command to the same physical bank" "Not added,Added"
bitfld.long 0x00 0.--4. "                                          PRE_ALL_REC     ,Precharge all-to-activate interval" "PRETOACT,1 clk,2 clk,3 clk,4 clk,5 clk,6 clk,7 clk,8 clk,9 clk,10 clk,11 clk,12 clk,13 clk,14 clk,15 clk,16 clk,17 clk,18 clk,19 clk,20 clk,21 clk,22 clk,23 clk,24 clk,25 clk,26 clk,27 clk,28 clk,29 clk,30 clk,31 clk"
group.long 0x260++0x03
line.long 0x00 "DDR_SDRAM_CFG_3,DDR SDRAM Control Configuration 3 Register"
bitfld.long 0x00 31. " DDRC_RST        ,DDR controller reset" "No reset,Reset"
bitfld.long 0x00 30. "                                           ECC_FIX_EN      ,ECC fixing enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24.--27. " ECC_SCRUB_INT   ,ECC scrubbing interval" "Not issued,Every seq,Every 2 seq,Every 4 seq,Every 8 seq,Every 16 seq,Every 32 seq,Every 64 seq,Every 128 seq,Every 256 seq,Every 512 seq,Every 1024 seq,Every 2048 seq,Every 4096 seq,Every 8192 seq,Every 16384 seq"
bitfld.long 0x00 17. "                                    WR_PRE          ,Write preamble" "1 tCK,2 tCK"
newline
bitfld.long 0x00 16. " RD_PRE          ,Read preamble" "1 tCK,2 tCK"
bitfld.long 0x00 12.--13. "                                              DM_CFG          ,Data mask config" "Normal data masks,,Data bus inversion,Held high"
newline
bitfld.long 0x00 8.--9. " REF_MODE        ,Refresh mode" "Disabled,2x fine,4x fine,?..."
bitfld.long 0x00 0. "                                           DIS_MRS_PAR     ,Disable MRS on parity error" "No,Yes"
group.long 0x400++0x0F
line.long 0x00 "DDR_DQ_MAP0,DQ Mapping Register 0 Register"
bitfld.long 0x00 26.--31. " DQ_0_3          ,DQ[0:3] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x00 20.--25. "                                            DQ_4_7          ,DQ[4:7] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x00 14.--19. " DQ_8_11         ,DQ[8:11] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x00 8.--13. "                                            DQ_12_15        ,DQ[12:15] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x00 2.--7. " DQ_16_19        ,DQ[16:19] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x04 "DDR_DQ_MAP1,DQ Mapping Register 1 Register"
bitfld.long 0x04 26.--31. " DQ_20_23        ,DQ[20:23] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x04 20.--25. "                                            DQ_24_27        ,DQ[24:27] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x04 14.--19. " DQ_28_31        ,DQ[28:31] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x04 8.--13. "                                            DQ_32_35        ,DQ[32:35] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x04 2.--7. " DQ_36_39        ,DQ[36:39] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x08 "DDR_DQ_MAP2,DQ Mapping Register 2 Register"
bitfld.long 0x08 26.--31. " DQ_40_43        ,DQ[40:43] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x08 20.--25. "                                            DQ_44_47        ,DQ[44:47] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x08 14.--19. " DQ_48_51        ,DQ[48:51] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x08 8.--13. "                                            DQ_52_55        ,DQ[52:55] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x08 2.--7. " DQ_56_59        ,DQ[56:59] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
line.long 0x0C "DDR_DQ_MAP3,DQ Mapping Register 3 Register"
bitfld.long 0x0C 26.--31. " DQ_60_63        ,DQ[60:63] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x0C 20.--25. "                                            ECC_0_3         ,ECC[0:3] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
newline
bitfld.long 0x0C 14.--19. " ECC_4_7         ,ECC[4:7] mapping" "0-1-2-3,0-1-2-3,0-1-3-2,0-2-1-3,0-2-3-1,0-3-1-2,0-3-2-1,1-0-2-3,1-0-3-2,1-2-0-3,1-2-3-0,1-3-0-2,1-3-2-0,2-0-1-3,2-0-3-1,2-1-0-3,2-1-3-0,2-3-0-1,2-3-1-0,3-0-1-2,3-0-2-1,3-1-0-2,3-1-2-0,3-2-0-1,3-2-1-0,,,4-5-6-7,4-5-7-6,4-6-5-7,4-6-7-5,4-7-5-6,4-7-6-5,5-4-6-7,5-4-7-6,5-6-4-7,5-6-7-4,5-7-4-6,5-7-6-4,6-4-5-7,6-4-7-5,6-5-4-7,6-5-7-4,6-7-4-5,6-7-5-4,7-4-5-6,7-4-6-5,7-5-4-6,7-5-6-4,7-6-4-5,7-6-5-4,?..."
bitfld.long 0x0C 0. "                                            ORS             ,Odd rank swizzle" "follow the same swizzling,further swizzled by swapping bits"
rgroup.long 0xB20++0x03
line.long 0x00 "DDRDSR_1,DDR Debug Status 1 Register"
bitfld.long 0x00 15. " CZ              ,Command impedance" "High,Low"
bitfld.long 0x00 7. "                                               DZ              ,Data impedance" "High,Low"
group.long 0xB24++0x0B
line.long 0x00 "DDRDSR_2,DDR Debug Status 2 Register"
bitfld.long 0x00 31. " CLKZ            ,Current setting of driver clock impedance" "High,Low"
eventfld.long 0x00 1. "                                               RPD_ST          ,Rapid clear of memory start" "Not started,Started"
newline
eventfld.long 0x00 0. " RPD_END         ,Rapid clear of memory end" "Not ended,Ended"
line.long 0x04 "DDRCDR_1,DDR Control Driver 1 Register"
bitfld.long 0x04 31. " DHC_EN          ,DDR driver hardware compensation enable" "Disabled,Enabled"
bitfld.long 0x04 18.--19. "                                           ODT             ,ODT termination value for IOs" "0,1,2,3"
newline
bitfld.long 0x04 17. " DSO_C_EN        ,Driver software override enable for address/command" "Disabled,Enabled"
bitfld.long 0x04 16. "                                           DSO_D_EN        ,Driver software override enable for data" "Disabled,Enabled"
newline
bitfld.long 0x04 15. " DSO_CZ          ,DDR driver software command impedance override" "Highest,Lowest"
bitfld.long 0x04 7. "                                            DSO_DZ          ,Driver software data impedance override" "Highest,Lowest"
line.long 0x08 "DDRCDR_2,DDR Control Driver 2 Register"
bitfld.long 0x08 31. " DSO_CLK_EN      ,Driver software override enable for clocks" "Disabled,Enabled"
bitfld.long 0x08 27. "                                           DSO_CLKZ        ,Driver software clocks impedance override" "Highest,Lowest"
newline
bitfld.long 0x08 15. " VREF_OVRD_EN    ,Indicates if internal VRef value will be trained or defined" "Trained,Defined"
bitfld.long 0x08 8.--13. "                                            VREF_OVRD_VAL   ,Defines the override value to use for the internal VRef if VREF_OVRD_EN is set" "37%,38%,39%,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,99%,100%"
newline
bitfld.long 0x08 7. " VREF_TRAIN_EN   ,DRAM VRef training enable" "Disabled,Enabled"
bitfld.long 0x08 6. "                                           VREF_DRAM_RANGE ,VRef DRAM range" "Range 1,Range 2"
newline
bitfld.long 0x08 0. " ODT             ,ODT termination value for IOs" "0,1"
rgroup.long 0xBF8++0x07
line.long 0x00 "DDR_IP_REV1,DDR IP Block Revision 1 Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID           ,IP block ID"
hexmask.long.byte 0x00 8.--15. 1. "                                               IP_MJ           ,Major revision"
newline
hexmask.long.byte 0x00 0.--7. 1. " IP_MN           ,Minor revision"
line.long 0x04 "DDR_IP_REV2,DDR IP Block Revision 2 Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT          ,IP block integration options"
hexmask.long.byte 0x04 0.--7. 1. "                                                 IP_CFG          ,IP block configuration options"
group.long 0xD00++0x03
line.long 0x00 "DDR_MTCR,DDR Memory Test Control Register"
bitfld.long 0x00 31. " MT_EN           ,Memory test enable" "Disabled,Enabled"
bitfld.long 0x00 24.--25. "                                           MT_TYP          ,Memory test type" "Writes and reads,Writes only,Reads only,?..."
newline
bitfld.long 0x00 16.--19. " MT_TRNARND      ,Memory test turnaround" "Entire mem write then read,1 transaction each,2 transactions each,4 transactions each,?..."
bitfld.long 0x00 9. "                         MT_ADDR_EN      ,Memory test address range enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " MT_STAT         ,Memory test status" "Not detected,Detected"
group.long 0xD20++0x03
line.long 0x00 "DDR_MTP0,DDR Memory Test Pattern 0 Register"
group.long 0xD24++0x03
line.long 0x00 "DDR_MTP1,DDR Memory Test Pattern 1 Register"
group.long 0xD28++0x03
line.long 0x00 "DDR_MTP2,DDR Memory Test Pattern 2 Register"
group.long 0xD2C++0x03
line.long 0x00 "DDR_MTP3,DDR Memory Test Pattern 3 Register"
group.long 0xD30++0x03
line.long 0x00 "DDR_MTP4,DDR Memory Test Pattern 4 Register"
group.long 0xD34++0x03
line.long 0x00 "DDR_MTP5,DDR Memory Test Pattern 5 Register"
group.long 0xD38++0x03
line.long 0x00 "DDR_MTP6,DDR Memory Test Pattern 6 Register"
group.long 0xD3C++0x03
line.long 0x00 "DDR_MTP7,DDR Memory Test Pattern 7 Register"
group.long 0xD40++0x03
line.long 0x00 "DDR_MTP8,DDR Memory Test Pattern 8 Register"
group.long 0xD44++0x03
line.long 0x00 "DDR_MTP9,DDR Memory Test Pattern 9 Register"
group.long 0xD60++0x0F
line.long 0x00 "DDR_MT_ST_EXT_ADDR,DDR Memory Test Start Extended Address Register"
hexmask.long.byte 0x00 0.--7. 0x01 " MT_ST_EXT_ADDR  ,Memory test start extended address"
line.long 0x04 "DDR_MT_ST_ADDR,DDR Memory Test Start Address Register"
line.long 0x08 "DDR_MT_END_EXT_ADDR,DDR Memory Test End Extended Address Register"
hexmask.long.byte 0x08 0.--7. 0x01 " MT_END_EXT_ADDR ,Memory test end extended address"
line.long 0x0C "DDR_MT_END_ADDR,DDR Memory Test End Address Register"
group.long 0xE00++0x0B
line.long 0x00 "DATA_ERR_INJECT_HI,Memory Data Path Error Injection Mask High Register"
line.long 0x04 "DATA_ERR_INJECT_LO,Memory Data Path Error Injection Mask Low Register"
line.long 0x08 "ECC_ERR_INJECT,Memory Data Path Error Injection Mask ECC"
bitfld.long 0x08 16. " APIEN           ,Address parity error injection enable" "Disabled,Enabled"
bitfld.long 0x08 9. "                                           EMB             ,ECC mirror byte functionality enable" "Disabled,Enabled"
newline
bitfld.long 0x08 8. " EIEN            ,Error injection enable" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "                                           EEIM            ,ECC error injection mask"
group.long 0xE20++0x0B
line.long 0x00 "CAPTURE_DATA_HI,Memory Data Path Read Capture High Register"
line.long 0x04 "CAPTURE_DATA_LO,Memory Data Path Read Capture Low Register"
line.long 0x08 "CAPTURE_ECC,Memory Data Path Read Capture ECC Register"
group.long 0xE40++0x1B
line.long 0x00 "ERR_DETECT,Memory Error Detect Register"
eventfld.long 0x00 31. " MME             ,Multiple memory errors" "No error,Error"
eventfld.long 0x00 12. "                                           SSBE            ,Scrubbed single-bit ECC error" "No error,Error"
newline
eventfld.long 0x00 8. " APE             ,Address parity error" "No error,Error"
eventfld.long 0x00 7. "                                           ACE             ,Automatic calibration error" "No error,Error"
newline
eventfld.long 0x00 4. " CDE             ,Corrupted data error" "No error,Error"
eventfld.long 0x00 3. "                                           MBE             ,Multiple-bit error" "No error,Error"
newline
eventfld.long 0x00 2. " SBE             ,Single-bit ECC error" "No error,Error"
eventfld.long 0x00 0. "                                           MSE             ,Memory select error" "No error,Error"
line.long 0x04 "ERR_DISABLE,Memory Error Disable Register"
bitfld.long 0x04 12. " SSBED           ,Scrubbed single-bit ECC error disable" "No,Yes"
bitfld.long 0x04 8. "                                                APED            ,Address parity error disable" "No,Yes"
newline
bitfld.long 0x04 7. " ACED            ,Automatic calibration error disable" "No,Yes"
bitfld.long 0x04 4. "                                                CDED            ,Corrupted data error disable" "No,Yes"
newline
bitfld.long 0x04 3. " MBED            ,Multiple-bit ECC error disable" "No,Yes"
bitfld.long 0x04 2. "                                                SBED            ,Single-bit ECC error disable" "No,Yes"
newline
bitfld.long 0x04 0. " MSED            ,Memory select error disable" "Enabled,Disabled"
line.long 0x08 "ERR_INT_EN,Memory Error Interrupt Enable Register"
bitfld.long 0x08 12. " SSBEE           ,Scrubbed single-bit ECC error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 8. "                                           APEE            ,Address parity error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 7. " ACEE            ,Automatic calibration error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                                           CDEE            ,Corrupted data error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " MBEE            ,Multiple-bit ECC error interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 2. "                                           SBEE            ,Single-bit ECC error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " MSEE            ,Memory select error interrupt enable" "Disabled,Enabled"
line.long 0x0C "CAPTURE_ATTRIBUTES,Memory Error Attributes Capture Register"
bitfld.long 0x0C 28.--30. " BNUM            ,Data beat number" "0,1,2,3,4,5,6,7"
bitfld.long 0x0C 24.--26. "                                                  TSIZ            ,Transaction size for the error (in double words)" "8 double words,1 double word,2 double words,3 double words,4 double words,5 double words,6 double words,7 double words"
newline
hexmask.long.byte 0x0C 16.--23. 1. " TSRC            ,Transaction source for the error"
bitfld.long 0x0C 12.--13. "                                                 TTYP            ,Transaction type for the error" ",Write,Read,Read-modify-write"
newline
bitfld.long 0x0C 0. " VLD             ,Valid information captured" "Not valid,Valid"
line.long 0x10 "CAPTURE_ADDRESS,Memory Error Address Capture Register"
line.long 0x14 "CAPTURE_EXT_ADDRESS,Memory Error Extended Address Capture Register"
hexmask.long.byte 0x14 0.--7. 0x01 " CEADDR          ,Captured extended address"
line.long 0x18 "ERR_SBE,Single-Bit ECC Memory Error Management Register"
hexmask.long.byte 0x18 24.--31. 1. " SSBET           ,Scrubbed single-bit error threshold"
hexmask.long.byte 0x18 16.--23. 1. "                                                 SBET            ,Single-bit error threshold"
newline
hexmask.long.byte 0x18 8.--15. 1. " SSBEC           ,Scrubbed single-bit error counter"
hexmask.long.byte 0x18 0.--7. 1. "                                                 SBEC            ,Single-bit error counter"
width 0x0B
tree.end
tree.end
tree.open "DUART (Dual Universal Asynchronous Receiver/Transmitter)"
tree.open "DUART 1"
tree "UART 1"
base ad:0x021C0500
width 14.
if (((per.b(ad:0x021C0500+0x03))&0x80)==0x80)
group.byte 0x00++0x00
line.byte 0x00 "DUART1_UDLB1,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_URBR1,UART Receiver Buffer Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_UTHR1,UART Transmitter Holding Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART1_UDMB1,UART Divisor Most Significant Byte Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART1_UIER1,UART Interrupt Enable Register"
group.byte 0x02++0x00
line.byte 0x00 "DUART1_UAFR1,UART Alternate Function Register"
bitfld.byte 0x00 1. " BO    ,Baud clock select" "Not gated,Gated"
bitfld.byte 0x00 0. "       CW    ,Concurrent write enable" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UFCR1,UART FIFO Control Register"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UIIR1,UART Interrupt ID Register"
else
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_UDLB1,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_URBR1,UART Receiver Buffer Register"
in
wgroup.byte 0x00++0x00
line.byte 0x00 "DUART1_UTHR1,UART Transmitter Holding Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART1_UDMB1,UART Divisor Most Significant Byte Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART1_UIER1,UART Interrupt Enable Register"
bitfld.byte 0x00 3. " EMSI  ,Enables modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. "        ERLSI ,Enables receiver line status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 1. "          ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. "      ERDAI ,Enables received data available interrupt" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UAFR1,UART Alternate Function Register"
wgroup.byte 0x02++0x00
line.byte 0x00 "DUART1_UFCR1,UART FIFO Control Register"
bitfld.byte 0x00 6.--7. " RTL   ,Receiver trigger level" "1B / 1B FIFO,4B / 16B FIFO,8B / 32B FIFO,14B / 56B FIFO"
bitfld.byte 0x00 5. "  EN64  ,Enable 64-byte FIFO" "Disabled,Enabled"
bitfld.byte 0x00 2. "          TFR    ,Transmitter FIFO reset" "No reset,Reset"
bitfld.byte 0x00 1. "      RFR   ,Receiver FIFO reset" "No reset,Reset"
bitfld.byte 0x00 0. "      FEN  ,FIFO enable" "Disabled,Enabled"
rgroup.byte 0x02++0x00
line.byte 0x00 "DUART1_UIIR1,UART Interrupt ID Register"
bitfld.byte 0x00 6.--7. " FE    ,FIFOs enabled" "0,1,2,3"
bitfld.byte 0x00 5. "               FE64  ,64-byte FIFOs enabled" "Disabled,Enabled"
bitfld.byte 0x00 3. "          IID3   ,Interrupt ID bits" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2  ,Interrupt ID bit 3" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2 ,Interrupt ID bit 2" "No interrupt,Interrupt"
bitfld.byte 0x00 1. "  IID2 ,Interrupt ID bit 1" "No interrupt,Interrupt"
bitfld.byte 0x00 0. "  IID2 ,Interrupt ID bit 0" "No interrupt,Interrupt"
endif
if (((per.b(ad:0x021C0500+0x03))&0x08)==0x00)&&(((per.b(ad:0x021C0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0500+0x03))&0x08)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0500+0x03))&0x20)==0x00)&&(((per.b(ad:0x021C0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0500+0x03))&0x20)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0500+0x03))&0x20)==0x20)&&(((per.b(ad:0x021C0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x04++0x00
line.byte 0x00 "DUART1_UMCR1,UART Modem Control Register"
bitfld.byte 0x00 5. " AFE   ,Auto flow control enable" "Disabled,Enabled"
bitfld.byte 0x00 4. "        LOOP  ,Local loopback mode" "Normal operation,Loopback mode"
bitfld.byte 0x00 1. "  RTS    ,Ready to send" "Negated,Asserted"
rgroup.byte 0x05++0x01
line.byte 0x00 "DUART1_ULSR1,UART Line Status Register"
bitfld.byte 0x00 7. " RFE   ,Receiver FIFO error" "No error,Error"
bitfld.byte 0x00 6. "        TEMT  ,Transmitter empty" "Not empty,Empty"
bitfld.byte 0x00 5. "         THRE   ,Transmitter holding register empty" "Not empty,Empty"
bitfld.byte 0x00 4. "     BI    ,Break interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. "  FE   ,Framing error" "No error,Error"
bitfld.byte 0x00 2. "      PE   ,Parity error" "No error,Error"
bitfld.byte 0x00 1. "      OE   ,Overrun error" "No error,Error"
newline
bitfld.byte 0x00 0. " DR    ,Data ready" "Not ready,Ready"
line.byte 0x01 "DUART1_UMSR1,UART Modem Status Register"
bitfld.byte 0x01 4. " CTS   ,Clear to send" "Negated,Asserted"
bitfld.byte 0x01 0. "        DCTS  ,Clear to send" "Negated,Asserted"
group.byte 0x07++0x00
line.byte 0x00 "DUART1_USCR1,UART Scratch Register"
rgroup.byte 0x10++0x00
line.byte 0x00 "DUART1_UDSR1,UART DMA Status Register"
bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Cleared,Set"
bitfld.byte 0x00 0. "         RXRDY ,Receiver ready" "Cleared,Set"
width 0x0B
tree.end
tree "UART 2"
base ad:0x021C0600
width 14.
if (((per.b(ad:0x021C0600+0x03))&0x80)==0x80)
group.byte 0x00++0x00
line.byte 0x00 "DUART1_UDLB2,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_URBR2,UART Receiver Buffer Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_UTHR2,UART Transmitter Holding Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART1_UDMB2,UART Divisor Most Significant Byte Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART1_UIER2,UART Interrupt Enable Register"
group.byte 0x02++0x00
line.byte 0x00 "DUART1_UAFR2,UART Alternate Function Register"
bitfld.byte 0x00 1. " BO    ,Baud clock select" "Not gated,Gated"
bitfld.byte 0x00 0. "       CW    ,Concurrent write enable" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UFCR2,UART FIFO Control Register"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UIIR2,UART Interrupt ID Register"
else
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_UDLB2,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART1_URBR2,UART Receiver Buffer Register"
in
wgroup.byte 0x00++0x00
line.byte 0x00 "DUART1_UTHR2,UART Transmitter Holding Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART1_UDMB2,UART Divisor Most Significant Byte Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART1_UIER2,UART Interrupt Enable Register"
bitfld.byte 0x00 3. " EMSI  ,Enables modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. "        ERLSI ,Enables receiver line status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 1. "          ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. "      ERDAI ,Enables received data available interrupt" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART1_UAFR2,UART Alternate Function Register"
wgroup.byte 0x02++0x00
line.byte 0x00 "DUART1_UFCR2,UART FIFO Control Register"
bitfld.byte 0x00 6.--7. " RTL   ,Receiver trigger level" "1B / 1B FIFO,4B / 16B FIFO,8B / 32B FIFO,14B / 56B FIFO"
bitfld.byte 0x00 5. "  EN64  ,Enable 64-byte FIFO" "Disabled,Enabled"
bitfld.byte 0x00 2. "          TFR    ,Transmitter FIFO reset" "No reset,Reset"
bitfld.byte 0x00 1. "      RFR   ,Receiver FIFO reset" "No reset,Reset"
bitfld.byte 0x00 0. "      FEN  ,FIFO enable" "Disabled,Enabled"
rgroup.byte 0x02++0x00
line.byte 0x00 "DUART1_UIIR2,UART Interrupt ID Register"
bitfld.byte 0x00 6.--7. " FE    ,FIFOs enabled" "0,1,2,3"
bitfld.byte 0x00 5. "               FE64  ,64-byte FIFOs enabled" "Disabled,Enabled"
bitfld.byte 0x00 3. "          IID3   ,Interrupt ID bits" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2  ,Interrupt ID bit 3" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2 ,Interrupt ID bit 2" "No interrupt,Interrupt"
bitfld.byte 0x00 1. "  IID2 ,Interrupt ID bit 1" "No interrupt,Interrupt"
bitfld.byte 0x00 0. "  IID2 ,Interrupt ID bit 0" "No interrupt,Interrupt"
endif
if (((per.b(ad:0x021C0600+0x03))&0x08)==0x00)&&(((per.b(ad:0x021C0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0600+0x03))&0x08)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0600+0x03))&0x20)==0x00)&&(((per.b(ad:0x021C0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0600+0x03))&0x20)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021C0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021C0600+0x03))&0x20)==0x20)&&(((per.b(ad:0x021C0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x03++0x00
line.byte 0x00 "DUART1_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x04++0x00
line.byte 0x00 "DUART1_UMCR2,UART Modem Control Register"
bitfld.byte 0x00 5. " AFE   ,Auto flow control enable" "Disabled,Enabled"
bitfld.byte 0x00 4. "        LOOP  ,Local loopback mode" "Normal operation,Loopback mode"
bitfld.byte 0x00 1. "  RTS    ,Ready to send" "Negated,Asserted"
rgroup.byte 0x05++0x01
line.byte 0x00 "DUART1_ULSR2,UART Line Status Register"
bitfld.byte 0x00 7. " RFE   ,Receiver FIFO error" "No error,Error"
bitfld.byte 0x00 6. "        TEMT  ,Transmitter empty" "Not empty,Empty"
bitfld.byte 0x00 5. "         THRE   ,Transmitter holding register empty" "Not empty,Empty"
bitfld.byte 0x00 4. "     BI    ,Break interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. "  FE   ,Framing error" "No error,Error"
bitfld.byte 0x00 2. "      PE   ,Parity error" "No error,Error"
bitfld.byte 0x00 1. "      OE   ,Overrun error" "No error,Error"
newline
bitfld.byte 0x00 0. " DR    ,Data ready" "Not ready,Ready"
line.byte 0x01 "DUART1_UMSR2,UART Modem Status Register"
bitfld.byte 0x01 4. " CTS   ,Clear to send" "Negated,Asserted"
bitfld.byte 0x01 0. "        DCTS  ,Clear to send" "Negated,Asserted"
group.byte 0x07++0x00
line.byte 0x00 "DUART1_USCR2,UART Scratch Register"
rgroup.byte 0x10++0x00
line.byte 0x00 "DUART1_UDSR2,UART DMA Status Register"
bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Cleared,Set"
bitfld.byte 0x00 0. "         RXRDY ,Receiver ready" "Cleared,Set"
width 0x0B
tree.end
tree.end
tree.open "DUART 2"
tree "UART 3"
base ad:0x021D0500
width 14.
if (((per.b(ad:0x021D0500+0x03))&0x80)==0x80)
group.byte 0x00++0x00
line.byte 0x00 "DUART2_UDLB1,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_URBR1,UART Receiver Buffer Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_UTHR1,UART Transmitter Holding Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART2_UDMB1,UART Divisor Most Significant Byte Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART2_UIER1,UART Interrupt Enable Register"
group.byte 0x02++0x00
line.byte 0x00 "DUART2_UAFR1,UART Alternate Function Register"
bitfld.byte 0x00 1. " BO    ,Baud clock select" "Not gated,Gated"
bitfld.byte 0x00 0. "       CW    ,Concurrent write enable" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UFCR1,UART FIFO Control Register"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UIIR1,UART Interrupt ID Register"
else
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_UDLB1,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_URBR1,UART Receiver Buffer Register"
in
wgroup.byte 0x00++0x00
line.byte 0x00 "DUART2_UTHR1,UART Transmitter Holding Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART2_UDMB1,UART Divisor Most Significant Byte Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART2_UIER1,UART Interrupt Enable Register"
bitfld.byte 0x00 3. " EMSI  ,Enables modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. "        ERLSI ,Enables receiver line status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 1. "          ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. "      ERDAI ,Enables received data available interrupt" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UAFR1,UART Alternate Function Register"
wgroup.byte 0x02++0x00
line.byte 0x00 "DUART2_UFCR1,UART FIFO Control Register"
bitfld.byte 0x00 6.--7. " RTL   ,Receiver trigger level" "1B / 1B FIFO,4B / 16B FIFO,8B / 32B FIFO,14B / 56B FIFO"
bitfld.byte 0x00 5. "  EN64  ,Enable 64-byte FIFO" "Disabled,Enabled"
bitfld.byte 0x00 2. "          TFR    ,Transmitter FIFO reset" "No reset,Reset"
bitfld.byte 0x00 1. "      RFR   ,Receiver FIFO reset" "No reset,Reset"
bitfld.byte 0x00 0. "      FEN  ,FIFO enable" "Disabled,Enabled"
rgroup.byte 0x02++0x00
line.byte 0x00 "DUART2_UIIR1,UART Interrupt ID Register"
bitfld.byte 0x00 6.--7. " FE    ,FIFOs enabled" "0,1,2,3"
bitfld.byte 0x00 5. "               FE64  ,64-byte FIFOs enabled" "Disabled,Enabled"
bitfld.byte 0x00 3. "          IID3   ,Interrupt ID bits" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2  ,Interrupt ID bit 3" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2 ,Interrupt ID bit 2" "No interrupt,Interrupt"
bitfld.byte 0x00 1. "  IID2 ,Interrupt ID bit 1" "No interrupt,Interrupt"
bitfld.byte 0x00 0. "  IID2 ,Interrupt ID bit 0" "No interrupt,Interrupt"
endif
if (((per.b(ad:0x021D0500+0x03))&0x08)==0x00)&&(((per.b(ad:0x021D0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0500+0x03))&0x08)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0500+0x03))&0x20)==0x00)&&(((per.b(ad:0x021D0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0500+0x03))&0x20)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0500+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0500+0x03))&0x20)==0x20)&&(((per.b(ad:0x021D0500+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR1,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x04++0x00
line.byte 0x00 "DUART2_UMCR1,UART Modem Control Register"
bitfld.byte 0x00 5. " AFE   ,Auto flow control enable" "Disabled,Enabled"
bitfld.byte 0x00 4. "        LOOP  ,Local loopback mode" "Normal operation,Loopback mode"
bitfld.byte 0x00 1. "  RTS    ,Ready to send" "Negated,Asserted"
rgroup.byte 0x05++0x01
line.byte 0x00 "DUART2_ULSR1,UART Line Status Register"
bitfld.byte 0x00 7. " RFE   ,Receiver FIFO error" "No error,Error"
bitfld.byte 0x00 6. "        TEMT  ,Transmitter empty" "Not empty,Empty"
bitfld.byte 0x00 5. "         THRE   ,Transmitter holding register empty" "Not empty,Empty"
bitfld.byte 0x00 4. "     BI    ,Break interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. "  FE   ,Framing error" "No error,Error"
bitfld.byte 0x00 2. "      PE   ,Parity error" "No error,Error"
bitfld.byte 0x00 1. "      OE   ,Overrun error" "No error,Error"
newline
bitfld.byte 0x00 0. " DR    ,Data ready" "Not ready,Ready"
line.byte 0x01 "DUART2_UMSR1,UART Modem Status Register"
bitfld.byte 0x01 4. " CTS   ,Clear to send" "Negated,Asserted"
bitfld.byte 0x01 0. "        DCTS  ,Clear to send" "Negated,Asserted"
group.byte 0x07++0x00
line.byte 0x00 "DUART2_USCR1,UART Scratch Register"
rgroup.byte 0x10++0x00
line.byte 0x00 "DUART2_UDSR1,UART DMA Status Register"
bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Cleared,Set"
bitfld.byte 0x00 0. "         RXRDY ,Receiver ready" "Cleared,Set"
width 0x0B
tree.end
tree "UART 4"
base ad:0x021D0600
width 14.
if (((per.b(ad:0x021D0600+0x03))&0x80)==0x80)
group.byte 0x00++0x00
line.byte 0x00 "DUART2_UDLB2,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_URBR2,UART Receiver Buffer Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_UTHR2,UART Transmitter Holding Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART2_UDMB2,UART Divisor Most Significant Byte Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART2_UIER2,UART Interrupt Enable Register"
group.byte 0x02++0x00
line.byte 0x00 "DUART2_UAFR2,UART Alternate Function Register"
bitfld.byte 0x00 1. " BO    ,Baud clock select" "Not gated,Gated"
bitfld.byte 0x00 0. "       CW    ,Concurrent write enable" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UFCR2,UART FIFO Control Register"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UIIR2,UART Interrupt ID Register"
else
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_UDLB2,UART Divisor Least Significant Byte Register"
hgroup.byte 0x00++0x00
hide.byte 0x00 "DUART2_URBR2,UART Receiver Buffer Register"
in
wgroup.byte 0x00++0x00
line.byte 0x00 "DUART2_UTHR2,UART Transmitter Holding Register"
hgroup.byte 0x01++0x00
hide.byte 0x00 "DUART2_UDMB2,UART Divisor Most Significant Byte Register"
group.byte 0x01++0x00
line.byte 0x00 "DUART2_UIER2,UART Interrupt Enable Register"
bitfld.byte 0x00 3. " EMSI  ,Enables modem status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 2. "        ERLSI ,Enables receiver line status interrupt" "Disabled,Enabled"
bitfld.byte 0x00 1. "          ETHREI ,Enables transmitter holding register empty interrupt" "Disabled,Enabled"
bitfld.byte 0x00 0. "      ERDAI ,Enables received data available interrupt" "Disabled,Enabled"
hgroup.byte 0x02++0x00
hide.byte 0x00 "DUART2_UAFR2,UART Alternate Function Register"
wgroup.byte 0x02++0x00
line.byte 0x00 "DUART2_UFCR2,UART FIFO Control Register"
bitfld.byte 0x00 6.--7. " RTL   ,Receiver trigger level" "1B / 1B FIFO,4B / 16B FIFO,8B / 32B FIFO,14B / 56B FIFO"
bitfld.byte 0x00 5. "  EN64  ,Enable 64-byte FIFO" "Disabled,Enabled"
bitfld.byte 0x00 2. "          TFR    ,Transmitter FIFO reset" "No reset,Reset"
bitfld.byte 0x00 1. "      RFR   ,Receiver FIFO reset" "No reset,Reset"
bitfld.byte 0x00 0. "      FEN  ,FIFO enable" "Disabled,Enabled"
rgroup.byte 0x02++0x00
line.byte 0x00 "DUART2_UIIR2,UART Interrupt ID Register"
bitfld.byte 0x00 6.--7. " FE    ,FIFOs enabled" "0,1,2,3"
bitfld.byte 0x00 5. "               FE64  ,64-byte FIFOs enabled" "Disabled,Enabled"
bitfld.byte 0x00 3. "          IID3   ,Interrupt ID bits" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2  ,Interrupt ID bit 3" "No interrupt,Interrupt"
bitfld.byte 0x00 2. "  IID2 ,Interrupt ID bit 2" "No interrupt,Interrupt"
bitfld.byte 0x00 1. "  IID2 ,Interrupt ID bit 1" "No interrupt,Interrupt"
bitfld.byte 0x00 0. "  IID2 ,Interrupt ID bit 0" "No interrupt,Interrupt"
endif
if (((per.b(ad:0x021D0600+0x03))&0x08)==0x00)&&(((per.b(ad:0x021D0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0600+0x03))&0x08)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,?..."
bitfld.byte 0x00 3. "      PEN   ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0600+0x03))&0x20)==0x00)&&(((per.b(ad:0x021D0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0600+0x03))&0x20)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Odd,Even"
bitfld.byte 0x00 3. "          PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
elif (((per.b(ad:0x021D0600+0x03))&0x08)==0x08)&&(((per.b(ad:0x021D0600+0x03))&0x20)==0x20)&&(((per.b(ad:0x021D0600+0x03))&0x03)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,1 1/2"
bitfld.byte 0x00 0.--1. "         WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
else
group.byte 0x03++0x00
line.byte 0x00 "DUART2_ULCR2,UART Line Control Register"
bitfld.byte 0x00 7. " DLAB  ,Divisor latch access bit" "Not set,Set"
bitfld.byte 0x00 6. "         SB    ,Set break" "Not set,Set"
bitfld.byte 0x00 5. "           SP     ,Stick parity" "Disabled,Enabled"
bitfld.byte 0x00 4. "      EPS   ,Even parity select" "Mark,Space"
bitfld.byte 0x00 3. "         PEN  ,Parity enable" "Disabled,Enabled"
bitfld.byte 0x00 2. "      NSTB ,Number of STOP bits" "1,2"
bitfld.byte 0x00 0.--1. "             WLS  ,Word length select" "5 bits,6 bits,7 bits,8 bits"
endif
group.byte 0x04++0x00
line.byte 0x00 "DUART2_UMCR2,UART Modem Control Register"
bitfld.byte 0x00 5. " AFE   ,Auto flow control enable" "Disabled,Enabled"
bitfld.byte 0x00 4. "        LOOP  ,Local loopback mode" "Normal operation,Loopback mode"
bitfld.byte 0x00 1. "  RTS    ,Ready to send" "Negated,Asserted"
rgroup.byte 0x05++0x01
line.byte 0x00 "DUART2_ULSR2,UART Line Status Register"
bitfld.byte 0x00 7. " RFE   ,Receiver FIFO error" "No error,Error"
bitfld.byte 0x00 6. "        TEMT  ,Transmitter empty" "Not empty,Empty"
bitfld.byte 0x00 5. "         THRE   ,Transmitter holding register empty" "Not empty,Empty"
bitfld.byte 0x00 4. "     BI    ,Break interrupt" "No interrupt,Interrupt"
bitfld.byte 0x00 3. "  FE   ,Framing error" "No error,Error"
bitfld.byte 0x00 2. "      PE   ,Parity error" "No error,Error"
bitfld.byte 0x00 1. "      OE   ,Overrun error" "No error,Error"
newline
bitfld.byte 0x00 0. " DR    ,Data ready" "Not ready,Ready"
line.byte 0x01 "DUART2_UMSR2,UART Modem Status Register"
bitfld.byte 0x01 4. " CTS   ,Clear to send" "Negated,Asserted"
bitfld.byte 0x01 0. "        DCTS  ,Clear to send" "Negated,Asserted"
group.byte 0x07++0x00
line.byte 0x00 "DUART2_USCR2,UART Scratch Register"
rgroup.byte 0x10++0x00
line.byte 0x00 "DUART2_UDSR2,UART DMA Status Register"
bitfld.byte 0x00 1. " TXRDY ,Transmitter ready" "Cleared,Set"
bitfld.byte 0x00 0. "         RXRDY ,Receiver ready" "Cleared,Set"
width 0x0B
tree.end
tree.end
tree.end
tree "eSDHC (Enhanced Secured Digital Host Controller)"
base ad:0x02140000
width 29.
group.long 0x00++0x03
line.long 0x00 "DSADDR_BLKATTR2,SDMA System Address Register/Block Attributes 2"
if (((per.l.le(ad:0x02140000+0x0C))&0x02)==0x02)
group.long 0x00++0x03
line.long 0x00 "BLKATTR,Block Attributes Register"
hexmask.long.word 0x00 16.--31. 1. " BLKCNT           ,Blocks count for current transfer"
hexmask.long.word 0x00 0.--11. 1. "                              BLKSIZE          ,Transfer block size"
else
hgroup.long 0x00++0x03
hide.long 0x00 "BLKATTR,Block Attributes Register"
endif
if (((per.l.le(ad:0x02140000+0x24))&0x02)==0x02)
rgroup.long 0x08++0x03
line.long 0x00 "CMDARG,Command Argument Register"
else
group.long 0x08++0x03
line.long 0x00 "CMDARG,Command Argument Register"
endif
group.long 0x0C++0x03
line.long 0x00 "XFERTYP,Transfer Type Register"
bitfld.long 0x00 24.--29. " CMDINX           ,Command index" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 22.--23. "                                CMDTYP           ,Command Type" "Normal,Suspend,Resume,Abort"
newline
bitfld.long 0x00 21. " DPSEL            ,Data present select" "Not present,Present"
bitfld.long 0x00 20. "                       CICEN            ,Command index check enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CCCEN            ,Command CRC check enable" "Disabled,Enabled"
bitfld.long 0x00 16.--17. "                          RSPTYP           ,Response type select" "No response,Response length 136,Response length 48,Response length 48/check busy"
newline
bitfld.long 0x00 5. " MSBSEL           ,Multi-/single-block select" "Single,Multiple"
bitfld.long 0x00 4. "                          DTDSEL           ,Data transfer direction select" "Write,Read"
newline
bitfld.long 0x00 2.--3. " ACEN             ,Auto CMD12 enable" "Auto CMD disabled,Auto CMD12 enabled,Auto CMD23 enabled,?..."
bitfld.long 0x00 1. "                BCEN             ,Block count enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " DMAEN            ,DMA enable" "Disabled,Enabled"
rgroup.long 0x10++0x0F
line.long 0x00 "CMDRSP0,Command Response 0 Register"
line.long 0x04 "CMDRSP1,Command Response 1 Register"
line.long 0x08 "CMDRSP2,Command Response 2 Register"
line.long 0x0C "CMDRSP3,Command Response 3 Register"
group.long 0x20++0x03
line.long 0x00 "DATPORT,Buffer Data Port Register"
rgroup.long 0x24++0x03
line.long 0x00 "PRSSTAT,Present State Register"
bitfld.long 0x00 31. " DLSL[7]          ,Data 7 line signal level" "0,1"
bitfld.long 0x00 30. "                                 [6]              ,Data 6 line signal level" "0,1"
newline
bitfld.long 0x00 29. " [5]              ,Data 5 line signal level" "0,1"
bitfld.long 0x00 28. "                                 [4]              ,Data 4 line signal level" "0,1"
newline
bitfld.long 0x00 27. " [3]              ,Data 3 line signal level" "0,1"
bitfld.long 0x00 26. "                                 [2]              ,Data 2 line signal level" "0,1"
newline
bitfld.long 0x00 25. " [1]              ,Data 1 line signal level" "0,1"
bitfld.long 0x00 24. "                                 [0]              ,Data 0 line signal level" "0,1"
newline
bitfld.long 0x00 23. " CLSL             ,CMD line signal level" "0,1"
bitfld.long 0x00 19. "                                 WPS              ,Write protect state" "Write protected,Write enabled"
newline
bitfld.long 0x00 18. " CDS              ,Card detect state" "Not present,Present"
bitfld.long 0x00 16. "                       CINS             ,Card inserted" "Power on reset/no card,Card inserted"
newline
bitfld.long 0x00 11. " BREN             ,Buffer read enable" "Disabled,Enabled"
bitfld.long 0x00 10. "                          BWEN             ,Buffer write enable" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " RTA              ,Read transfer active" "Not active,Active"
bitfld.long 0x00 8. "                        WTA              ,Write transfer active" "Not active,Active"
newline
bitfld.long 0x00 7. " SDOFF            ,SD clock gated off internally" "Active,Gated off"
bitfld.long 0x00 3. "                         SDSTB            ,SD clock stable" "Not stable,Stable"
newline
bitfld.long 0x00 2. " DLA              ,Data line active" "Not active,Active"
bitfld.long 0x00 1. "                        CDIHB            ,Command inhibit (DAT)" "Not inhibited,Inhibited"
newline
bitfld.long 0x00 0. " CIHB             ,Command inhibit (CMD)" "Not inhibited,Inhibited"
if (((per.l.le(ad:0x02140000+0x28))&0x80)==0x80)
if (((per.l.le(ad:0x02140000+0x28))&0x06)==0x02)
if (((per.l.le(ad:0x02140000+0x0C))&0x01)==0x01)
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 19. "                          IABG             ,Interrupt at block gap enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " RWCTL            ,Read wait control enable" "Disabled,Enabled"
bitfld.long 0x00 17. "                          CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
newline
bitfld.long 0x00 16. " SABGREQ          ,Stop at block gap request" "Transfer,Stop"
bitfld.long 0x00 10. "                          VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
newline
bitfld.long 0x00 8.--9. " DMAS             ,DMA select" "Single DMA,ADMA1,,64-bit ADMA2"
bitfld.long 0x00 7. "                      CDSS             ,Card detect signal selection" "SD CD pin,Test level"
newline
bitfld.long 0x00 6. " CDTL             ,Card detect test level" "Level 0/Not inserted,Level 1/Inserted"
bitfld.long 0x00 4.--5. "              EMODE            ,Endian mode" "Big endian,,Little endian,?..."
newline
bitfld.long 0x00 1.--2. " DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
bitfld.long 0x00 0. "                             LCTL             ,LED control" "LED off,LED on"
else
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 19. "                          IABG             ,Interrupt at block gap enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " RWCTL            ,Read wait control enable" "Disabled,Enabled"
bitfld.long 0x00 17. "                          CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
newline
bitfld.long 0x00 16. " SABGREQ          ,Stop at block gap request" "Transfer,Stop"
bitfld.long 0x00 10. "                          VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
newline
bitfld.long 0x00 7. " CDSS             ,Card detect signal selection" "SD CD pin,Test level"
bitfld.long 0x00 6. "                        CDTL             ,Card detect test level" "Level 0/Not inserted,Level 1/Inserted"
newline
bitfld.long 0x00 4.--5. " EMODE            ,Endian mode" "Big endian,,Little endian,?..."
bitfld.long 0x00 1.--2. "                     DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
newline
bitfld.long 0x00 0. " LCTL             ,LED control" "LED off,LED on"
endif
else
if (((per.l.le(ad:0x02140000+0x0C))&0x01)==0x01)
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. "                          RWCTL            ,Read wait control enable" "Disabled,Enabled"
newline
bitfld.long 0x00 17. " CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
bitfld.long 0x00 16. "                         SABGREQ          ,Stop at block gap request" "Transfer,Stop"
newline
bitfld.long 0x00 10. " VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
bitfld.long 0x00 8.--9. "                             DMAS             ,DMA select" "Single DMA,ADMA1,,64-bit ADMA2"
newline
bitfld.long 0x00 7. " CDSS             ,Card detect signal selection" "SD CD pin,Test level"
bitfld.long 0x00 6. "                        CDTL             ,Card detect test level" "Level 0/Not inserted,Level 1/Inserted"
newline
bitfld.long 0x00 4.--5. " EMODE            ,Endian mode" "Big endian,,Little endian,?..."
bitfld.long 0x00 1.--2. "                     DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
newline
bitfld.long 0x00 0. " LCTL             ,LED control" "LED off,LED on"
else
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. "                          RWCTL            ,Read wait control enable" "Disabled,Enabled"
newline
bitfld.long 0x00 17. " CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
bitfld.long 0x00 16. "                         SABGREQ          ,Stop at block gap request" "Transfer,Stop"
newline
bitfld.long 0x00 10. " VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
bitfld.long 0x00 7. "                             CDSS             ,Card detect signal selection" "SD CD pin,Test level"
newline
bitfld.long 0x00 6. " CDTL             ,Card detect test level" "Level 0/Not inserted,Level 1/Inserted"
bitfld.long 0x00 4.--5. "              EMODE            ,Endian mode" "Big endian,,Little endian,?..."
newline
bitfld.long 0x00 1.--2. " DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
bitfld.long 0x00 0. "                             LCTL             ,LED control" "LED off,LED on"
endif
endif
else
if (((per.l.le(ad:0x02140000+0x28))&0x06)==0x02)
if (((per.l.le(ad:0x02140000+0x0C))&0x01)==0x01)
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 19. "                          IABG             ,Interrupt at block gap enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " RWCTL            ,Read wait control enable" "Disabled,Enabled"
bitfld.long 0x00 17. "                          CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
newline
bitfld.long 0x00 16. " SABGREQ          ,Stop at block gap request" "Transfer,Stop"
bitfld.long 0x00 10. "                          VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
newline
bitfld.long 0x00 8.--9. " DMAS             ,DMA select" "Single DMA,ADMA1,,64-bit ADMA2"
bitfld.long 0x00 7. "                      CDSS             ,Card detect signal selection" "SD CD pin,Test level"
newline
bitfld.long 0x00 4.--5. " EMODE            ,Endian mode" "Big endian,,Little endian,?..."
bitfld.long 0x00 1.--2. "                     DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
newline
bitfld.long 0x00 0. " LCTL             ,LED control" "LED off,LED on"
else
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 19. "                          IABG             ,Interrupt at block gap enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " RWCTL            ,Read wait control enable" "Disabled,Enabled"
bitfld.long 0x00 17. "                          CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
newline
bitfld.long 0x00 16. " SABGREQ          ,Stop at block gap request" "Transfer,Stop"
bitfld.long 0x00 10. "                          VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
newline
bitfld.long 0x00 7. " CDSS             ,Card detect signal selection" "SD CD pin,Test level"
bitfld.long 0x00 4.--5. "                        EMODE            ,Endian mode" "Big endian,,Little endian,?..."
newline
bitfld.long 0x00 1.--2. " DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
bitfld.long 0x00 0. "                             LCTL             ,LED control" "LED off,LED on"
endif
else
if (((per.l.le(ad:0x02140000+0x0C))&0x01)==0x01)
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. "                          RWCTL            ,Read wait control enable" "Disabled,Enabled"
newline
bitfld.long 0x00 17. " CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
bitfld.long 0x00 16. "                         SABGREQ          ,Stop at block gap request" "Transfer,Stop"
newline
bitfld.long 0x00 10. " VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
bitfld.long 0x00 8.--9. "                             DMAS             ,DMA select" "Single DMA,ADMA1,,64-bit ADMA2"
newline
bitfld.long 0x00 7. " CDSS             ,Card detect signal selection" "SD CD pin,Test level"
bitfld.long 0x00 4.--5. "                        EMODE            ,Endian mode" "Big endian,,Little endian,?..."
newline
bitfld.long 0x00 1.--2. " DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
bitfld.long 0x00 0. "                             LCTL             ,LED control" "LED off,LED on"
else
group.long 0x28++0x03
line.long 0x00 "PROCTL,Protocol Control Register"
bitfld.long 0x00 26. " WECRM            ,Wakeup event enable on SD card removal" "Disabled,Enabled"
bitfld.long 0x00 25. "                          WECINS           ,Wakeup event enable on SD card insertion" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " WECINT           ,Wakeup event enable on card interrupt" "Disabled,Enabled"
bitfld.long 0x00 18. "                          RWCTL            ,Read wait control enable" "Disabled,Enabled"
newline
bitfld.long 0x00 17. " CREQ             ,Restarts a transaction which was stopped using the stop at block gap request" "No effect,Restart"
bitfld.long 0x00 16. "                         SABGREQ          ,Stop at block gap request" "Transfer,Stop"
newline
bitfld.long 0x00 10. " VOLT_SEL         ,Voltage selection" "3.0 V,1.8 V"
bitfld.long 0x00 7. "                             CDSS             ,Card detect signal selection" "SD CD pin,Test level"
newline
bitfld.long 0x00 4.--5. " EMODE            ,Endian mode" "Big endian,,Little endian,?..."
bitfld.long 0x00 1.--2. "                     DTW              ,Data transfer width" "1-bit,4-bit,8-bit,?..."
newline
bitfld.long 0x00 0. " LCTL             ,LED control" "LED off,LED on"
endif
endif
endif
if (((per.l.le(ad:0x02140000+0x40C))&0x10000)==0x00000)
group.long 0x2C++0x03
line.long 0x00 "SYSCTL_ESDHCCTL_CRS_0,System Control Register"
bitfld.long 0x00 27. " INITA            ,Initialization active" "Not active,Active"
bitfld.long 0x00 26. "                        RSTD             ,Software reset for DAT line" "No reset,Reset"
newline
bitfld.long 0x00 25. " RSTC             ,Software reset for CMD line" "No reset,Reset"
bitfld.long 0x00 24. "                          RSTA             ,Software reset for all" "No reset,Reset"
newline
bitfld.long 0x00 16.--19. " DTOCV            ,Data timeout counter value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,?..."
hexmask.long.byte 0x00 8.--15. 1. "                      SDCLKFS          ,SDCLK frequency select"
newline
bitfld.long 0x00 4.--7. " DVS              ,Divisor" "/1,/2,/3,/4,/5,/6,/7,/8,/9,/10,/11,/12,/13,/14,/15,/16"
bitfld.long 0x00 3. "                               SDCLKEN          ,SD clock enable" "Disabled,Enabled"
else
group.long 0x2C++0x03
line.long 0x00 "SYSCTL_ESDHCCTL_CRS_1,System Control Register"
bitfld.long 0x00 27. " INITA            ,Initialization active" "Not active,Active"
bitfld.long 0x00 26. "                        RSTD             ,Software reset for DAT line" "No reset,Reset"
newline
bitfld.long 0x00 25. " RSTC             ,Software reset for CMD line" "No reset,Reset"
bitfld.long 0x00 24. "                          RSTA             ,Software reset for all" "No reset,Reset"
newline
bitfld.long 0x00 16.--19. " DTOCV            ,Data timeout counter value" "SDCLK x 2^13,SDCLK x 2^14,SDCLK x 2^15,SDCLK x 2^16,SDCLK x 2^17,SDCLK x 2^18,SDCLK x 2^19,SDCLK x 2^20,SDCLK x 2^21,SDCLK x 2^22,SDCLK x 2^23,SDCLK x 2^24,SDCLK x 2^25,SDCLK x 2^26,SDCLK x 2^27,?..."
hexmask.long.byte 0x00 8.--15. 1. "                      SDCLKFS          ,SDCLK frequency select"
newline
bitfld.long 0x00 6.--7. " USDCLKFS         ,Upper bits of SDCLK frequency select" "0,1,2,3"
bitfld.long 0x00 5. "                                 CGS              ,Clock generator select" "Divided clock,Programmable clock"
newline
bitfld.long 0x00 3. " SDCLKEN          ,SD clock enable" "Disabled,Enabled"
endif
group.long 0x30++0x0B
line.long 0x00 "IRQSTAT,Interrupt Status Register"
eventfld.long 0x00 29. " RTOE             ,Access timeout error" "No error,Error"
eventfld.long 0x00 28. "                          DMAE             ,DMA error" "No error,Error"
newline
eventfld.long 0x00 26. " TNE              ,Tuning error" "No error,Error"
eventfld.long 0x00 25. "                          ADMAE            ,ADMA error" "No error,Error"
newline
eventfld.long 0x00 24. " AC12E            ,Auto CMD12 error" "No error,Error"
eventfld.long 0x00 22. "                          DEBE             ,Data end bit error" "No error,Error"
newline
eventfld.long 0x00 21. " DCE              ,Data CRC error" "No error,Error"
eventfld.long 0x00 20. "                          DTOE             ,Data timeout error" "No error,Time out"
newline
eventfld.long 0x00 19. " CIE              ,Command index error" "No error,Error"
eventfld.long 0x00 18. "                          CEBE             ,Command end bit error" "No error,Error"
newline
eventfld.long 0x00 17. " CCE              ,Command CRC error" "No error,Error"
eventfld.long 0x00 16. "                          CTOE             ,Command timeout error" "No error,Time out"
newline
eventfld.long 0x00 12. " RTE              ,Re-tuning event" "Not required,Performed"
rbitfld.long 0x00 8. "                      CINT             ,Card interrupt" "No interrupt,Interrupt"
newline
eventfld.long 0x00 7. " CRM              ,Card removal" "State unstable or inserted,Removed"
eventfld.long 0x00 6. "        CINS             ,Card insertion" "State unstable or inserted,Inserted"
newline
eventfld.long 0x00 5. " BRR              ,Buffer read ready" "Not ready,Ready"
eventfld.long 0x00 4. "                         BWR              ,Buffer write ready" "Not ready,Ready"
newline
eventfld.long 0x00 3. " DINT             ,DMA interrupt" "No interrupt,Interrupt"
eventfld.long 0x00 2. "                      BGE              ,Block gap event" "Not stopped,Stopped"
newline
eventfld.long 0x00 1. " TC               ,Transfer complete" "Not completed,Completed"
eventfld.long 0x00 0. "                     CC               ,Command complete" "Not completed,Completed"
line.long 0x04 "IRQSTATEN,Interrupt Status Enable Register"
bitfld.long 0x04 29. " RTOESEN          ,Access timeout status enable" "Masked,Enabled"
bitfld.long 0x04 28. "                           DMAESEN          ,DMA error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 26. " TNESEN           ,Tuning error status enable" "Masked,Enabled"
bitfld.long 0x04 25. "                           ADMAESEN         ,ADMA error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 24. " AC12ESEN         ,Auto CMD12 error status enable" "Masked,Enabled"
bitfld.long 0x04 22. "                           DEBESEN          ,Data end bit error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 21. " DCESEN           ,Data CRC error status enable" "Masked,Enabled"
bitfld.long 0x04 20. "                           DTOESEN          ,Data timeout error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 19. " CIESEN           ,Command index error status enable" "Masked,Enabled"
bitfld.long 0x04 18. "                           CEBESEN          ,Command end bit error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 17. " CCESEN           ,Command CRC error status enable" "Masked,Enabled"
bitfld.long 0x04 16. "                           CTOESEN          ,Command timeout error status enable" "Masked,Enabled"
newline
bitfld.long 0x04 12. " RTESEN           ,Re-tuning event status enable" "Masked,Enabled"
bitfld.long 0x04 8. "                           CINTSEN          ,Card interrupt status enable" "Masked,Enabled"
newline
bitfld.long 0x04 7. " CRMSEN           ,Card removal status enable" "Masked,Enabled"
bitfld.long 0x04 6. "                           CINSEN           ,Card insertion status enable" "Masked,Enabled"
newline
bitfld.long 0x04 5. " BRRSEN           ,Buffer read ready status enable" "Masked,Enabled"
bitfld.long 0x04 4. "                           BWRSEN           ,Buffer write ready status enable" "Masked,Enabled"
newline
bitfld.long 0x04 3. " DINTSEN          ,DMA interrupt status enable" "Masked,Enabled"
bitfld.long 0x04 2. "                           BGESEN           ,Block gap event status enable" "Masked,Enabled"
newline
bitfld.long 0x04 1. " TCSEN            ,Transfer complete status enable" "Masked,Enabled"
bitfld.long 0x04 0. "                           CCSEN            ,Command complete status enable" "Masked,Enabled"
line.long 0x08 "IRQSIGEN,Interrupt Signal Enable Register"
bitfld.long 0x08 29. " RTOEIEN          ,Access timeout error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 28. "                           DMAEIEN          ,DMA error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 26. " TNEIEN           ,Tuning error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 25. "                           ADMAEIEN         ,ADMA error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 24. " AC12EIEN         ,Auto CMD12 error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 22. "                           DEBEIEN          ,Data end bit error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 21. " DCEIEN           ,Data CRC error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 20. "                           DTOEIEN          ,Data timeout error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 19. " CIEIEN           ,Command index error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 18. "                           CEBEIEN          ,Command end bit error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 17. " CCEIEN           ,Command CRC error interrupt enable" "Masked,Enabled"
bitfld.long 0x08 16. "                           CTOEIEN          ,Command timeout error interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 12. " RTEIEN           ,Re-tuning event interrupt enable" "Masked,Enabled"
bitfld.long 0x08 8. "                           CINTIEN          ,Card interrupt interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 7. " CRMIEN           ,Card removal interrupt enable" "Masked,Enabled"
bitfld.long 0x08 6. "                           CINSIEN          ,Card insertion interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 5. " BRRIEN           ,Buffer ready interrupt enable" "Masked,Enabled"
bitfld.long 0x08 4. "                           BWRIEN           ,Buffer write ready interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 3. " DINTIEN          ,DMA interrupt enable" "Masked,Enabled"
bitfld.long 0x08 2. "                           BGEIENM          ,Block gap event interrupt enable" "Masked,Enabled"
newline
bitfld.long 0x08 1. " TCIEN            ,Transfer complete interrupt enable" "Masked,Enabled"
bitfld.long 0x08 0. "                           CCIEN            ,Command complete interrupt enable" "Masked,Enabled"
if (((per.l.le(ad:0x02140000+0x40))&0x20000000)==0x20000000)
group.long 0x3C++0x03
line.long 0x00 "AUTOCERR_SYSCTL2,Auto CMD Error Status Register / System Control 2 Register"
bitfld.long 0x00 30. " AIE              ,Asynchronous interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                          SMPCLKSEL        ,Sampling clock select" "No success,Success"
newline
bitfld.long 0x00 22. " EXTN             ,Execute tuning" "Not executed,Executed"
bitfld.long 0x00 16.--18. "                      UHSM             ,UHS mode select" "SDR12/52MHz,SDR25,SDR50,SDR104/HS200,DDR,?..."
newline
rbitfld.long 0x00 7. " CNIBAC12E        ,Command not issued by Auto CMD12 error" "No error,Error"
rbitfld.long 0x00 4. "                          ACIE             ,Auto CMD index error" "No error,Error"
newline
rbitfld.long 0x00 3. " ACEBE            ,Auto CMD end bit error" "No error,Error"
rbitfld.long 0x00 2. "                          ACCE             ,Auto CMD CRC error" "No error,Error"
newline
rbitfld.long 0x00 1. " ACTOE            ,Auto CMD timeout error" "No error,Error"
rbitfld.long 0x00 0. "                          AC12NE           ,Auto CMD12 not executed" "Executed,Not executed"
else
group.long 0x3C++0x03
line.long 0x00 "AUTOCERR_SYSCTL2,Auto CMD Error Status Register / System Control 2 Register"
bitfld.long 0x00 30. " AIE              ,Asynchronous interrupt enable" "Disabled,?..."
bitfld.long 0x00 23. "                          SMPCLKSEL        ,Sampling clock select" "No success,Success"
newline
bitfld.long 0x00 22. " EXTN             ,Execute tuning" "Not executed,Executed"
bitfld.long 0x00 16.--18. "                      UHSM             ,UHS mode select" "SDR12/52MHz,SDR25,SDR50,SDR104/HS200,DDR,?..."
newline
rbitfld.long 0x00 7. " CNIBAC12E        ,Command not issued by Auto CMD12 error" "No error,Error"
rbitfld.long 0x00 4. "                          ACIE             ,Auto CMD index error" "No error,Error"
newline
rbitfld.long 0x00 3. " ACEBE            ,Auto CMD end bit error" "No error,Error"
rbitfld.long 0x00 2. "                          ACCE             ,Auto CMD CRC error" "No error,Error"
newline
rbitfld.long 0x00 1. " ACTOE            ,Auto CMD timeout error" "No error,Error"
rbitfld.long 0x00 0. "                          AC12NE           ,Auto CMD12 not executed" "Executed,Not executed"
endif
rgroup.long 0x40++0x03
line.long 0x00 "HOSTCAPBLT,Host Controller Capabilities Register"
bitfld.long 0x00 29. " AIS              ,Asynchronous interrupt support" "Not supported,Supported"
bitfld.long 0x00 28. "                     SBS64B           ,64-bit system bus support" "Not supported,Supported"
newline
bitfld.long 0x00 26. " VS18             ,1.8V voltage support" "Not supported,Supported"
bitfld.long 0x00 25. "                     VS30             ,3.0V voltage Support" "Not supported,Supported"
newline
bitfld.long 0x00 24. " VS33             ,3.3V voltage support" "Not supported,Supported"
bitfld.long 0x00 23. "                     SRS              ,Suspend/resume support" "Not supported,Supported"
newline
bitfld.long 0x00 22. " DMAS             ,DMA support" "Not supported,Supported"
bitfld.long 0x00 21. "                     HSS              ,High speed support" "Not supported,Supported"
newline
bitfld.long 0x00 20. " ADMAS            ,ADMA support" "Not supported,Supported"
bitfld.long 0x00 16.--18. "                     MBL              ,Maximum block length" "512 bytes,1024 bytes,2048 bytes,?..."
group.long 0x44++0x03
line.long 0x00 "WML,Watermark Level Register"
bitfld.long 0x00 24.--27. " WR_BRST_LEN      ,Max write burst length" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--22. 1. "                                WR_WML           ,Write watermark level"
newline
bitfld.long 0x00 8.--11. " RD_BRST_LEN      ,Max read burst length" "16,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 0.--6. 1. "                                RD_WML           ,Read watermark level"
wgroup.long 0x50++0x03
line.long 0x00 "FEVT,Force Event Register"
bitfld.long 0x00 28. " FEVTDMAE         ,Force event DMA error" "Not forced,Forced"
bitfld.long 0x00 25. "                        FEVTADMAE        ,Force event ADMA error" "Not forced,Forced"
newline
bitfld.long 0x00 24. " FEVTAC12E        ,Force event Auto CMD12 error" "Not forced,Forced"
bitfld.long 0x00 22. "                        FEVTDEBE         ,Force event data end bit error" "Not forced,Forced"
newline
bitfld.long 0x00 21. " FEVTDCE          ,Force event data CRC error" "Not forced,Forced"
bitfld.long 0x00 20. "                        FEVTDTOE         ,Force event data time out error" "Not forced,Forced"
newline
bitfld.long 0x00 19. " FEVTCIE          ,Force event command index error" "Not forced,Forced"
bitfld.long 0x00 18. "                        FEVTCEBE         ,Force event command end bit error" "Not forced,Forced"
newline
bitfld.long 0x00 17. " FEVTCCE          ,Force event command CRC error" "Not forced,Forced"
bitfld.long 0x00 16. "                        FEVTCTOE         ,Force event command time out error" "Not forced,Forced"
newline
bitfld.long 0x00 7. " FEVTCNIBAC12E    ,Force event command not executed by Auto CMD12 error" "Not forced,Forced"
bitfld.long 0x00 4. "                        FEVTAC12IE       ,Force event Auto CMD12 index error" "Not forced,Forced"
newline
bitfld.long 0x00 3. " FEVTAC12EBE      ,Force event Auto CMD12 end bit error" "Not forced,Forced"
bitfld.long 0x00 2. "                        FEVTAC12CE       ,Force event Auto CMD12 CRC error" "Not forced,Forced"
newline
bitfld.long 0x00 1. " FEVTAC12TOE      ,Force event Auto CMD12 time out error" "Not forced,Forced"
bitfld.long 0x00 0. "                        FEVTAC12NE       ,Force event Auto CMD12 not executed" "Not forced,Forced"
rgroup.long 0x54++0x03
line.long 0x00 "ADMAES,ADMA Error Status Register"
bitfld.long 0x00 4. " ADMAIBE          ,ADMA internal bus error" "No error,Error"
bitfld.long 0x00 3. "                          ADMADCE          ,ADMA descriptor error" "No error,Error"
newline
bitfld.long 0x00 2. " DMALME           ,ADMA length mismatch error" "No error,Error"
bitfld.long 0x00 0.--1. "                          ADMAES           ,ADMA error state" "Idle,Fetch descriptor,Data transfer,Waiting for ADMA"
group.long 0x58++0x07
line.long 0x00 "ADSADDRL,ADMA System Address Low Register"
line.long 0x04 "ADSADDRH,ADMA System Address High Register"
rgroup.long 0xFC++0x03
line.long 0x00 "HOSTVER,Host Controller Version Register"
hexmask.long.byte 0x00 8.--15. 1. " VVN              ,Vendor version number"
hexmask.long.byte 0x00 0.--7. 1. "                                SVN              ,Specification version number"
rgroup.long 0x104++0x0B
line.long 0x00 "DMAERRADDRL,DMA Error Address Low Register"
line.long 0x04 "DMAERRADDRH,DMA Error Address High Register"
line.long 0x08 "DMAERRATTR,DMA Error Attribute Register"
bitfld.long 0x08 4.--6. " DMA_SIZE         ,System bus burst size" "0,1,2,3,4,5,6,7"
bitfld.long 0x08 0.--3. "                                 DMA_LEN          ,System bus burst length" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x114++0x03
line.long 0x00 "HOSTCAPBLT2,Host Controller Capabilities Register 2"
bitfld.long 0x00 14.--15. " RTM              ,Re-tuning modes" "Software timer,Software timer/Re-tuning request,Software timer/Auto re-tuning,?..."
bitfld.long 0x00 13. "  UTSDR50          ,Use tuning for SDR50" "Not supported,Supported"
newline
bitfld.long 0x00 8.--11. " TCRT             ,Timer count for re-tuning" "Disabled,1s,2s,4s,8s,16s,32s,64s,128s,256s,512s,1024s,?..."
bitfld.long 0x00 6. "                          DTDS             ,Driver type D support" "Not supported,Supported"
newline
bitfld.long 0x00 5. " DTCS             ,Driver type C support" "Not supported,Supported"
bitfld.long 0x00 4. "                     DTAS             ,Driver type A support" "Not supported,Supported"
newline
bitfld.long 0x00 1. " SDR104           ,SDR104 support" "Not supported,Supported"
bitfld.long 0x00 0. "                     SDR50            ,SDR50 support" "Not supported,Supported"
group.long 0x120++0x07
line.long 0x00 "TBCTL,Tuning Block Control Register"
bitfld.long 0x00 2. " TB_EN            ,Tuning block enabled" "Disabled,Enabled"
bitfld.long 0x00 0.--1. "                          TB_MODE          ,Tuning mode" "Software timer,Software timer/Re-tuning request,Software timer/Auto re-tuning,?..."
line.long 0x04 "TBSTAT,Tuning Block Status Register"
if (((per.l.le(ad:0x02140000+0x120))&0x03)==0x02)
group.long 0x128++0x03
line.long 0x00 "TBPTR,Tuning Block Pointer Register"
hexmask.long.byte 0x00 8.--14. 0x01 " TB_WNDW_STRT_PTR ,Tuning window start pointer"
hexmask.long.byte 0x00 0.--6. 0x01 "                                TB_WNDW_END_PTR  ,Tuning window start pointer"
else
hgroup.long 0x128++0x03
hide.long 0x00 "TBPTR,Tuning Block Pointer Register"
endif
group.long 0x140++0x03
line.long 0x00 "SDDIRCTL,SD Direction Control Register"
bitfld.long 0x00 0.--2. " DIR_CTL          ,Turnaround time for external transceiver" "Not required,1 SD clk,2 SD clk,3 SD clk,4 SD clk,5 SD clk,6 SD clk,7 SD clk"
group.long 0x40C++0x03
line.long 0x00 "ESDHCCTL,ESDHC Control Register"
bitfld.long 0x00 20.--21. " RTOCV            ,Timeout count value" "2^10,2^11,2^12,2^13"
bitfld.long 0x00 19. "                              PCS              ,Peripheral clock select" "Platform clk,Peripheral clk"
newline
bitfld.long 0x00 18. " FAF              ,Flush asynchronous FIFO" "Not flushed,Flushed"
rbitfld.long 0x00 17. "                       RTR              ,Re-tuning request" "No request,Request"
newline
bitfld.long 0x00 16. " CRS              ,Clock register select" "8-bit field/DVS active,10-bit field/CGS active"
bitfld.long 0x00 8.--12. "           RD_PRFTCH_BLKCNT ,Read prefetch block count" "No prefetch,1 SD block,2 SD blocks,3 SD blocks,4 SD blocks,5 SD blocks,6 SD blocks,7 SD blocks,8 SD blocks,9 SD blocks,10 SD blocks,11 SD blocks,12 SD blocks,13 SD blocks,14 SD blocks,15 SD blocks,16 SD blocks,17 SD blocks,18 SD blocks,19 SD blocks,20 SD blocks,21 SD blocks,22 SD blocks,23 SD blocks,24 SD blocks,25 SD blocks,26 SD blocks,27 SD blocks,28 SD blocks,29 SD blocks,30 SD blocks,31 SD blocks"
newline
bitfld.long 0x00 7. " PAD_DIS          ,Pad disable" "No,Yes"
bitfld.long 0x00 6. "                               SNOOP            ,Snoop attribute" "Not snooped,Snooped"
newline
bitfld.long 0x00 3. " WR_BUF           ,Write bufferable" "Not bufferable,Bufferable"
bitfld.long 0x00 2. "                    RD_SAFE          ,Read safe" "Not safe,Safe"
width 0x0B
tree.end
tree.open "FTM (FlexTimer Module)"
tree "FlexTimer 1"
base ad:0x02800000
width 15.
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x00++0x03
line.long 0x00 "FTM1_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
bitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
bitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
else
group.long 0x00++0x03
line.long 0x00 "FTM1_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
rbitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
rbitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
endif
group.long 0x04++0x07
line.long 0x00 "FTM1_CNT,Counter Register"
hexmask.long.word 0x00 0.--15. 1. " COUNT    ,Counter value"
line.long 0x04 "FTM1_MOD,Modulo Register"
hexmask.long.word 0x04 0.--15. 1. " MOD      ,Modulo value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM1_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM1_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x0)++0x03
line.long 0x00 "FTM1_C0V,Channel (0) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM1_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM1_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x8)++0x03
line.long 0x00 "FTM1_C1V,Channel (1) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM1_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM1_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x10)++0x03
line.long 0x00 "FTM1_C2V,Channel (2) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM1_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM1_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x18)++0x03
line.long 0x00 "FTM1_C3V,Channel (3) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM1_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM1_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x20)++0x03
line.long 0x00 "FTM1_C4V,Channel (4) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM1_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM1_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x28)++0x03
line.long 0x00 "FTM1_C5V,Channel (5) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM1_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM1_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x30)++0x03
line.long 0x00 "FTM1_C6V,Channel (6) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM1_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM1_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x38)++0x03
line.long 0x00 "FTM1_C7V,Channel (7) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02800000+0x54))&0x1)==0x1)
group.long 0x4C++0x03
line.long 0x00 "FTM1_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM1_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM1_MODE,Features Mode Selection Register"
bitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM1_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
group.long 0x58++0x0B
line.long 0x00 "FTM1_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM1_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM1_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x64++0x03
line.long 0x00 "FTM1_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
else
group.long 0x64++0x03
line.long 0x00 "FTM1_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
rbitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
rbitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
rbitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
rbitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
rbitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
rbitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
rbitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
rbitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
rbitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
rbitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
rbitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
rbitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
rbitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
rbitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
rbitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
rbitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
endif
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x68++0x03
line.long 0x00 "FTM1_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
rgroup.long 0x68++0x03
line.long 0x00 "FTM1_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x6C++0x03
line.long 0x00 "FTM1_EXTTRIG,FTM External Trigger Register"
rbitfld.long 0x00 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x00 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " CH0TRIG  ,Channel 0 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " CH3TRIG  ,Channel 3 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CH2TRIG    ,Channel 2 trigger enable" "Disabled,Enabled"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x70++0x03
line.long 0x00 "FTM1_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
else
rgroup.long 0x70++0x03
line.long 0x00 "FTM1_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
endif
group.long 0x74++0x07
line.long 0x00 "FTM1_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM1_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x84++0x03
line.long 0x00 "FTM1_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
group.long 0x8C++0x0F
line.long 0x00 "FTM1_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM1_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM1_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM1_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
else
rgroup.long 0x4C++0x03
line.long 0x00 "FTM1_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM1_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02800000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM1_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM1_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
rgroup.long 0x58++0x1B
line.long 0x00 "FTM1_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM1_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM1_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
line.long 0x0C "FTM1_COMBINE,Function For Linked Channels Register"
bitfld.long 0x0C 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x0C 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x0C 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x0C 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x0C 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x0C 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x0C 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x0C 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x0C 12. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x0C 11. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 10. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x0C 9. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 8. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x0C 7. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x0C 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x0C 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x0C 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x0C 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
line.long 0x10 "FTM1_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x10 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x10 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "FTM1_EXTTRIG,FTM External Trigger Register"
bitfld.long 0x14 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x14 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x14 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 4. " CH0TRIG  ,Channel 0 Trigger Enable Register" "Disabled,Enabled"
bitfld.long 0x14 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x14 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 1. " CH3TRIG  ,Channel 3 Trigger Enable" "Disabled,Enabled"
bitfld.long 0x14 0. "             CH2TRIG    ,Channel 2 Trigger Enable" "Disabled,Enabled"
line.long 0x18 "FTM1_POL,Channels Polarity Register"
bitfld.long 0x18 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x18 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x18 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x18 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x18 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x18 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x18 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x18 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
rgroup.long 0x74++0x07
line.long 0x00 "FTM1_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM1_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x84++0x03
line.long 0x00 "FTM1_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
rgroup.long 0x8C++0x0F
line.long 0x00 "FTM1_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM1_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM1_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM1_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
endif
width 0x0B
tree.end
tree "FlexTimer 2"
base ad:0x02810000
width 15.
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x00++0x03
line.long 0x00 "FTM2_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
bitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
bitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
else
group.long 0x00++0x03
line.long 0x00 "FTM2_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
rbitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
rbitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
endif
group.long 0x04++0x07
line.long 0x00 "FTM2_CNT,Counter Register"
hexmask.long.word 0x00 0.--15. 1. " COUNT    ,Counter value"
line.long 0x04 "FTM2_MOD,Modulo Register"
hexmask.long.word 0x04 0.--15. 1. " MOD      ,Modulo value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM2_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM2_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x0)++0x03
line.long 0x00 "FTM2_C0V,Channel (0) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM2_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM2_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x8)++0x03
line.long 0x00 "FTM2_C1V,Channel (1) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM2_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM2_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x10)++0x03
line.long 0x00 "FTM2_C2V,Channel (2) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM2_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM2_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x18)++0x03
line.long 0x00 "FTM2_C3V,Channel (3) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM2_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM2_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x20)++0x03
line.long 0x00 "FTM2_C4V,Channel (4) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM2_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM2_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x28)++0x03
line.long 0x00 "FTM2_C5V,Channel (5) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM2_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM2_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x30)++0x03
line.long 0x00 "FTM2_C6V,Channel (6) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM2_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM2_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x38)++0x03
line.long 0x00 "FTM2_C7V,Channel (7) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02810000+0x54))&0x1)==0x1)
group.long 0x4C++0x03
line.long 0x00 "FTM2_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM2_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM2_MODE,Features Mode Selection Register"
bitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM2_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
group.long 0x58++0x0B
line.long 0x00 "FTM2_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM2_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM2_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x64++0x03
line.long 0x00 "FTM2_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
else
group.long 0x64++0x03
line.long 0x00 "FTM2_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
rbitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
rbitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
rbitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
rbitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
rbitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
rbitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
rbitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
rbitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
rbitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
rbitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
rbitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
rbitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
rbitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
rbitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
rbitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
rbitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
endif
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x68++0x03
line.long 0x00 "FTM2_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
rgroup.long 0x68++0x03
line.long 0x00 "FTM2_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x6C++0x03
line.long 0x00 "FTM2_EXTTRIG,FTM External Trigger Register"
rbitfld.long 0x00 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x00 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " CH0TRIG  ,Channel 0 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " CH3TRIG  ,Channel 3 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CH2TRIG    ,Channel 2 trigger enable" "Disabled,Enabled"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x70++0x03
line.long 0x00 "FTM2_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
else
rgroup.long 0x70++0x03
line.long 0x00 "FTM2_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
endif
group.long 0x74++0x07
line.long 0x00 "FTM2_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM2_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x84++0x03
line.long 0x00 "FTM2_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
group.long 0x8C++0x0F
line.long 0x00 "FTM2_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM2_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM2_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM2_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
else
rgroup.long 0x4C++0x03
line.long 0x00 "FTM2_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM2_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02810000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM2_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM2_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
rgroup.long 0x58++0x1B
line.long 0x00 "FTM2_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM2_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM2_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
line.long 0x0C "FTM2_COMBINE,Function For Linked Channels Register"
bitfld.long 0x0C 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x0C 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x0C 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x0C 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x0C 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x0C 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x0C 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x0C 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x0C 12. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x0C 11. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 10. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x0C 9. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 8. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x0C 7. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x0C 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x0C 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x0C 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x0C 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
line.long 0x10 "FTM2_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x10 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x10 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "FTM2_EXTTRIG,FTM External Trigger Register"
bitfld.long 0x14 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x14 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x14 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 4. " CH0TRIG  ,Channel 0 Trigger Enable Register" "Disabled,Enabled"
bitfld.long 0x14 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x14 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 1. " CH3TRIG  ,Channel 3 Trigger Enable" "Disabled,Enabled"
bitfld.long 0x14 0. "             CH2TRIG    ,Channel 2 Trigger Enable" "Disabled,Enabled"
line.long 0x18 "FTM2_POL,Channels Polarity Register"
bitfld.long 0x18 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x18 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x18 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x18 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x18 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x18 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x18 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x18 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
rgroup.long 0x74++0x07
line.long 0x00 "FTM2_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM2_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x84++0x03
line.long 0x00 "FTM2_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
rgroup.long 0x8C++0x0F
line.long 0x00 "FTM2_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM2_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM2_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM2_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
endif
width 0x0B
tree.end
tree "FlexTimer 3"
base ad:0x02820000
width 15.
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x00++0x03
line.long 0x00 "FTM3_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
bitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
bitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
else
group.long 0x00++0x03
line.long 0x00 "FTM3_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
rbitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
rbitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
endif
group.long 0x04++0x07
line.long 0x00 "FTM3_CNT,Counter Register"
hexmask.long.word 0x00 0.--15. 1. " COUNT    ,Counter value"
line.long 0x04 "FTM3_MOD,Modulo Register"
hexmask.long.word 0x04 0.--15. 1. " MOD      ,Modulo value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM3_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM3_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x0)++0x03
line.long 0x00 "FTM3_C0V,Channel (0) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM3_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM3_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x8)++0x03
line.long 0x00 "FTM3_C1V,Channel (1) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM3_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM3_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x10)++0x03
line.long 0x00 "FTM3_C2V,Channel (2) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM3_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM3_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x18)++0x03
line.long 0x00 "FTM3_C3V,Channel (3) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM3_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM3_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x20)++0x03
line.long 0x00 "FTM3_C4V,Channel (4) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM3_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM3_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x28)++0x03
line.long 0x00 "FTM3_C5V,Channel (5) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM3_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM3_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x30)++0x03
line.long 0x00 "FTM3_C6V,Channel (6) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM3_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM3_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x38)++0x03
line.long 0x00 "FTM3_C7V,Channel (7) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02820000+0x54))&0x1)==0x1)
group.long 0x4C++0x03
line.long 0x00 "FTM3_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM3_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM3_MODE,Features Mode Selection Register"
bitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM3_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
group.long 0x58++0x0B
line.long 0x00 "FTM3_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM3_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM3_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x64++0x03
line.long 0x00 "FTM3_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
else
group.long 0x64++0x03
line.long 0x00 "FTM3_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
rbitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
rbitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
rbitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
rbitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
rbitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
rbitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
rbitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
rbitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
rbitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
rbitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
rbitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
rbitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
rbitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
rbitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
rbitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
rbitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
endif
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x68++0x03
line.long 0x00 "FTM3_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
rgroup.long 0x68++0x03
line.long 0x00 "FTM3_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x6C++0x03
line.long 0x00 "FTM3_EXTTRIG,FTM External Trigger Register"
rbitfld.long 0x00 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x00 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " CH0TRIG  ,Channel 0 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " CH3TRIG  ,Channel 3 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CH2TRIG    ,Channel 2 trigger enable" "Disabled,Enabled"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x70++0x03
line.long 0x00 "FTM3_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
else
rgroup.long 0x70++0x03
line.long 0x00 "FTM3_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
endif
group.long 0x74++0x07
line.long 0x00 "FTM3_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM3_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x84++0x03
line.long 0x00 "FTM3_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
group.long 0x8C++0x0F
line.long 0x00 "FTM3_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM3_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM3_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM3_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
else
rgroup.long 0x4C++0x03
line.long 0x00 "FTM3_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM3_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02820000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM3_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM3_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
rgroup.long 0x58++0x1B
line.long 0x00 "FTM3_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM3_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM3_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
line.long 0x0C "FTM3_COMBINE,Function For Linked Channels Register"
bitfld.long 0x0C 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x0C 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x0C 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x0C 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x0C 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x0C 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x0C 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x0C 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x0C 12. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x0C 11. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 10. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x0C 9. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 8. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x0C 7. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x0C 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x0C 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x0C 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x0C 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
line.long 0x10 "FTM3_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x10 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x10 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "FTM3_EXTTRIG,FTM External Trigger Register"
bitfld.long 0x14 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x14 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x14 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 4. " CH0TRIG  ,Channel 0 Trigger Enable Register" "Disabled,Enabled"
bitfld.long 0x14 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x14 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 1. " CH3TRIG  ,Channel 3 Trigger Enable" "Disabled,Enabled"
bitfld.long 0x14 0. "             CH2TRIG    ,Channel 2 Trigger Enable" "Disabled,Enabled"
line.long 0x18 "FTM3_POL,Channels Polarity Register"
bitfld.long 0x18 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x18 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x18 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x18 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x18 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x18 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x18 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x18 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
rgroup.long 0x74++0x07
line.long 0x00 "FTM3_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM3_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x84++0x03
line.long 0x00 "FTM3_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
rgroup.long 0x8C++0x0F
line.long 0x00 "FTM3_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM3_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM3_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM3_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
endif
width 0x0B
tree.end
tree "FlexTimer 4"
base ad:0x02830000
width 15.
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x00++0x03
line.long 0x00 "FTM4_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
bitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
bitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
else
group.long 0x00++0x03
line.long 0x00 "FTM4_SC,Status And Control Register"
rbitfld.long 0x00 7. " TOF      ,Timer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 6. "          TOIE       ,Timer overflow interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       CPWMS      ,Center-aligned PWM select" "Up,Up-Down"
newline
rbitfld.long 0x00 3.--4. " CLKS     ,Clock source selection" "None,System,Fixed frequency,External"
rbitfld.long 0x00 0.--2. "      PS         ,Prescale factor selection" "/1,/2,/4,/8,/16,/32,/64,/128"
endif
group.long 0x04++0x07
line.long 0x00 "FTM4_CNT,Counter Register"
hexmask.long.word 0x00 0.--15. 1. " COUNT    ,Counter value"
line.long 0x04 "FTM4_MOD,Modulo Register"
hexmask.long.word 0x04 0.--15. 1. " MOD      ,Modulo value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM4_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x0)++0x03
line.long 0x00 "FTM4_C0SC,Channel (0) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x0)++0x03
line.long 0x00 "FTM4_C0V,Channel (0) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM4_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x8)++0x03
line.long 0x00 "FTM4_C1SC,Channel (1) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x8)++0x03
line.long 0x00 "FTM4_C1V,Channel (1) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM4_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x10)++0x03
line.long 0x00 "FTM4_C2SC,Channel (2) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x10)++0x03
line.long 0x00 "FTM4_C2V,Channel (2) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM4_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x18)++0x03
line.long 0x00 "FTM4_C3SC,Channel (3) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x18)++0x03
line.long 0x00 "FTM4_C3V,Channel (3) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM4_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x20)++0x03
line.long 0x00 "FTM4_C4SC,Channel (4) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x20)++0x03
line.long 0x00 "FTM4_C4V,Channel (4) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM4_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x28)++0x03
line.long 0x00 "FTM4_C5SC,Channel (5) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x28)++0x03
line.long 0x00 "FTM4_C5V,Channel (5) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM4_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x30)++0x03
line.long 0x00 "FTM4_C6SC,Channel (6) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x30)++0x03
line.long 0x00 "FTM4_C6V,Channel (6) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM4_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
bitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
bitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
bitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
else
group.long (0x0C+0x38)++0x03
line.long 0x00 "FTM4_C7SC,Channel (7) Status And Control Register"
rbitfld.long 0x00 7. " CHF      ,Channel flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CHIE       ,Channel interrupt enable" "Disabled,Enabled"
rbitfld.long 0x00 5. "                       MSB        ,Channel mode select" "0,1"
newline
rbitfld.long 0x00 4. " MSA      ,Channel mode select" "0,1"
rbitfld.long 0x00 3. "                    ELSB       ,Edge or level select" "0,1"
rbitfld.long 0x00 2. "                              ELSA       ,Edge or level select" "0,1"
endif
group.long (0x10+0x38)++0x03
line.long 0x00 "FTM4_C7V,Channel (7) Value Register"
hexmask.long.word 0x00 0.--15. 1. " VAL      ,Channel value"
if (((per.l.le(ad:0x02830000+0x54))&0x1)==0x1)
group.long 0x4C++0x03
line.long 0x00 "FTM4_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM4_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM4_MODE,Features Mode Selection Register"
bitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM4_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
bitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
group.long 0x58++0x0B
line.long 0x00 "FTM4_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM4_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM4_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x64++0x03
line.long 0x00 "FTM4_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
else
group.long 0x64++0x03
line.long 0x00 "FTM4_COMBINE,Function For Linked Channels Register"
bitfld.long 0x00 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
rbitfld.long 0x00 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x00 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
rbitfld.long 0x00 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
rbitfld.long 0x00 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
rbitfld.long 0x00 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x00 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
rbitfld.long 0x00 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x00 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
rbitfld.long 0x00 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
rbitfld.long 0x00 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
rbitfld.long 0x00 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x00 13. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
rbitfld.long 0x00 12. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x00 11. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
rbitfld.long 0x00 10. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
rbitfld.long 0x00 9. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
rbitfld.long 0x00 8. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x00 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
rbitfld.long 0x00 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x00 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
rbitfld.long 0x00 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
rbitfld.long 0x00 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
rbitfld.long 0x00 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
endif
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x68++0x03
line.long 0x00 "FTM4_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
rgroup.long 0x68++0x03
line.long 0x00 "FTM4_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x00 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x00 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long 0x6C++0x03
line.long 0x00 "FTM4_EXTTRIG,FTM External Trigger Register"
rbitfld.long 0x00 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x00 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x00 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " CH0TRIG  ,Channel 0 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x00 1. " CH3TRIG  ,Channel 3 trigger enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CH2TRIG    ,Channel 2 trigger enable" "Disabled,Enabled"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x70++0x03
line.long 0x00 "FTM4_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
else
rgroup.long 0x70++0x03
line.long 0x00 "FTM4_POL,Channels Polarity Register"
bitfld.long 0x00 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x00 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x00 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x00 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x00 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x00 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x00 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x00 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
endif
group.long 0x74++0x07
line.long 0x00 "FTM4_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM4_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x84++0x03
line.long 0x00 "FTM4_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
group.long 0x8C++0x0F
line.long 0x00 "FTM4_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM4_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM4_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM4_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
else
rgroup.long 0x4C++0x03
line.long 0x00 "FTM4_CNTIN,Counter Initial Value Register"
hexmask.long.word 0x00 0.--15. 1. " INIT     ,Initial value of the FTM counter"
rgroup.long 0x50++0x03
line.long 0x00 "FTM4_STATUS,Capture And Compare Status Register"
bitfld.long 0x00 7. " CH7F     ,Channel 7 flag" "Not occurred,Occurred"
bitfld.long 0x00 6. "         CH6F       ,Channel 6 flag" "Not occurred,Occurred"
bitfld.long 0x00 5. "                   CH5F       ,Channel 5 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 4. " CH4F     ,Channel 4 flag" "Not occurred,Occurred"
bitfld.long 0x00 3. "         CH3F       ,Channel 3 flag" "Not occurred,Occurred"
bitfld.long 0x00 2. "                   CH2F       ,Channel 2 flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 1. " CH1F     ,Channel 1 flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "         CH0F       ,Channel 0 flag" "Not occurred,Occurred"
if (((per.l.le(ad:0x02830000+0x54))&0x04)==0x04)
group.long 0x54++0x03
line.long 0x00 "FTM4_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
bitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
else
group.long 0x54++0x03
line.long 0x00 "FTM4_MODE,Features Mode Selection Register"
rbitfld.long 0x00 4. " CAPTEST  ,Capture test mode enable" "Disabled,Enabled"
rbitfld.long 0x00 3. "             PWMSYNC    ,PWM synchronization mode" "No restrictions,SW: MOD CnV / HW: OUTMASK FTM"
bitfld.long 0x00 2. "  WPDIS      ,Write protection disable" "No,Yes"
newline
rbitfld.long 0x00 1. " INIT     ,Initialize the channels output" "No effect,Initialize"
rbitfld.long 0x00 0. "           FTMEN      ,FTM enable" "Disabled,Enabled"
endif
rgroup.long 0x58++0x1B
line.long 0x00 "FTM4_SYNC,Synchronization Register"
bitfld.long 0x00 7. " SWSYNC   ,PWM synchronization software trigger" "Not selected,Selected"
bitfld.long 0x00 6. "         TRIG2      ,PWM synchronization hardware trigger 2" "Disabled,Enabled"
bitfld.long 0x00 5. "                       TRIG1      ,PWM synchronization hardware trigger 1" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " TRIG0    ,PWM Synchronization Hardware Trigger 0" "Disabled,Enabled"
bitfld.long 0x00 3. "             SYNCHOM    ,Output mask synchronization" "All rising edges of clk,PWM sync only"
bitfld.long 0x00 2. "        REINIT     ,FTM counter reinitialization by synchronization" "Not reinitialized,Reinitialized"
newline
bitfld.long 0x00 1. " CNTMAX   ,Maximum loading point enable" "Disabled,Enabled"
bitfld.long 0x00 0. "             CNTMIN     ,Minimum loading point enable" "Disabled,Enabled"
line.long 0x04 "FTM4_OUTINIT,Initial State For Channels Output Register"
bitfld.long 0x04 7. " CH7OI    ,Channel 7 output initialization value" "0,1"
bitfld.long 0x04 6. "                    CH6OI      ,Channel 6 output initialization value" "0,1"
bitfld.long 0x04 5. "                              CH5OI      ,Channel 5 output initialization value" "0,1"
newline
bitfld.long 0x04 4. " CH4OI    ,Channel 4 output initialization value" "0,1"
bitfld.long 0x04 3. "                    CH3OI      ,Channel 3 output initialization value" "0,1"
bitfld.long 0x04 2. "                              CH2OI      ,Channel 2 output initialization value" "0,1"
newline
bitfld.long 0x04 1. " CH1OI    ,Channel 1 output initialization value" "0,1"
bitfld.long 0x04 0. "                    CH0OI      ,Channel 0 output initialization value" "0,1"
line.long 0x08 "FTM4_OUTMASK,Output Mask Register"
bitfld.long 0x08 7. " CH7OM    ,Channel 7 output mask" "Not masked,Masked"
bitfld.long 0x08 6. "           CH6OM      ,Channel 6 output mask" "Not masked,Masked"
bitfld.long 0x08 5. "                     CH5OM      ,Channel 5 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 4. " CH4OM    ,Channel 4 output mask" "Not masked,Masked"
bitfld.long 0x08 3. "           CH3OM      ,Channel 3 output mask" "Not masked,Masked"
bitfld.long 0x08 2. "                     CH2OM      ,Channel 2 output mask" "Not masked,Masked"
newline
bitfld.long 0x08 1. " CH1OM    ,Channel 1 output mask" "Not masked,Masked"
bitfld.long 0x08 0. "           CH0OM      ,Channel 0 output mask" "Not masked,Masked"
line.long 0x0C "FTM4_COMBINE,Function For Linked Channels Register"
bitfld.long 0x0C 29. " SYNCEN3  ,Enables PWM synchronization of registers C6V and C7V" "Disabled,Enabled"
bitfld.long 0x0C 28. "             DTEN3      ,Enables the deadtime insertion in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 27. "                       DECAP3     ,Dual edge capture mode for channels 6 and 7" "Inactive,Active"
newline
bitfld.long 0x0C 26. " DECAPEN3 ,Enables the Dual Edge Capture mode in the channels 6 and 7" "Disabled,Enabled"
bitfld.long 0x0C 25. "             COMP3      ,Enables complementary mode for combined channels 6 and 7" "The same,Complement"
bitfld.long 0x0C 24. "                     COMBINE3   ,Enables the combine feature for channels 6 and 7" "Independent,Combined"
newline
bitfld.long 0x0C 21. " SYNCEN2  ,Enables PWM synchronization of registers C4V and C5V" "Disabled,Enabled"
bitfld.long 0x0C 20. "             DTEN2      ,Enables the deadtime insertion in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 19. "                       DECAP2     ,Dual edge capture mode for channels 4 and 5" "Inactive,Active"
newline
bitfld.long 0x0C 18. " DECAPEN2 ,Enables the Dual Edge Capture mode in the channels 4 and 5" "Disabled,Enabled"
bitfld.long 0x0C 17. "             COMP2      ,Enables complementary mode for combined channels 4 and 5" "The same,Complement"
bitfld.long 0x0C 16. "                     COMBINE2   ,Enables the combine feature for channels 4 and 5" "Independent,Combined"
newline
bitfld.long 0x0C 12. " SYNCEN1  ,Enables PWM synchronization of registers C2V and C3V" "Disabled,Enabled"
bitfld.long 0x0C 11. "             DTEN1      ,Enables the deadtime insertion in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 10. "                       DECAP1     ,Dual edge capture mode for channels 2 and 3" "Inactive,Active"
newline
bitfld.long 0x0C 9. " DECAPEN1 ,Enables the Dual Edge Capture mode in the channels 2 and 3" "Disabled,Enabled"
bitfld.long 0x0C 8. "             COMP1      ,Enables complementary mode for combined channels 2 and 3" "The same,Complement"
bitfld.long 0x0C 7. "                     COMBINE1   ,Enables the combine feature for channels 2 and 3" "Independent,Combined"
newline
bitfld.long 0x0C 5. " SYNCEN0  ,Enables PWM synchronization of registers C0V and C1V" "Disabled,Enabled"
bitfld.long 0x0C 4. "             DTEN0      ,Enables the deadtime insertion in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 3. "                       DECAP0     ,Dual edge capture mode for channels 0 and 1" "Inactive,Active"
newline
bitfld.long 0x0C 2. " DECAPEN0 ,Enables the Dual Edge Capture mode in the channels 0 and 1" "Disabled,Enabled"
bitfld.long 0x0C 1. "             COMP0      ,Enables complementary mode for combined channels 0 and 1" "The same,Complement"
bitfld.long 0x0C 0. "                     COMBINE0   ,Enables the combine feature for channels 0 and 1" "Independent,Combined"
line.long 0x10 "FTM4_DEADTIME,Deadtime Insertion Control Register"
bitfld.long 0x10 6.--7. " DTPS     ,Deadtime prescaler value" "/1,/1,/4,/16"
bitfld.long 0x10 0.--5. "                  DTVAL      ,Deadtime value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "FTM4_EXTTRIG,FTM External Trigger Register"
bitfld.long 0x14 7. " TRIGF    ,Channel trigger flag" "Not triggered,Triggered"
bitfld.long 0x14 6. "        INITTRIGEN ,Initialization trigger enable" "Disabled,Enabled"
bitfld.long 0x14 5. "                       CH1TRIG    ,Channel 1 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 4. " CH0TRIG  ,Channel 0 Trigger Enable Register" "Disabled,Enabled"
bitfld.long 0x14 3. "             CH5TRIG    ,Channel 5 trigger enable" "Disabled,Enabled"
bitfld.long 0x14 2. "                       CH4TRIG    ,Channel 4 trigger enable" "Disabled,Enabled"
newline
bitfld.long 0x14 1. " CH3TRIG  ,Channel 3 Trigger Enable" "Disabled,Enabled"
bitfld.long 0x14 0. "             CH2TRIG    ,Channel 2 Trigger Enable" "Disabled,Enabled"
line.long 0x18 "FTM4_POL,Channels Polarity Register"
bitfld.long 0x18 7. " POL7     ,Channel 7 polarity" "Active high,Active low"
bitfld.long 0x18 6. "          POL6       ,Channel 6 polarity" "Active high,Active low"
bitfld.long 0x18 5. "                    POL5       ,Channel 5 polarity" "Active high,Active low"
newline
bitfld.long 0x18 4. " POL4     ,Channel 4 polarity" "Active high,Active low"
bitfld.long 0x18 3. "          POL3       ,Channel 3 polarity" "Active high,Active low"
bitfld.long 0x18 2. "                    POL2       ,Channel 2 polarity" "Active high,Active low"
newline
bitfld.long 0x18 1. " POL1     ,Channel 1 polarity" "Active high,Active low"
bitfld.long 0x18 0. "          POL0       ,Channel 0 polarity" "Active high,Active low"
rgroup.long 0x74++0x07
line.long 0x00 "FTM4_FMS,Fault Mode Status Register"
bitfld.long 0x00 6. " WPEN     ,Write protection enable" "Disabled,Enabled"
line.long 0x04 "FTM4_FILTER,Input Capture Filter Control Register"
bitfld.long 0x04 12.--15. " CH3FVAL  ,Channel 3 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 8.--11. "             CH2FVAL    ,Channel 2 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "                       CH1FVAL    ,Channel 1 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " CH0FVAL  ,Channel 0 input filter" "Disabled,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x84++0x03
line.long 0x00 "FTM4_CONF,Configuration Register"
bitfld.long 0x00 10. " GTBEOUT  ,Enables global time base signal generation to other FTMs" "Disabled,Enabled"
bitfld.long 0x00 9. "             GTBEEN     ,Configures FTM to use external global time base signal that is generated by another FTM" "Disabled,Enabled"
bitfld.long 0x00 6.--7. "                       BDMMODE    ,Selects the FTM behavior in BDM mode" "Stopped/Can be set/Functional/Bypassed,Stopped/Is not set/Forced/Bypassed,Stopped/Is not set/Frozen/Bypassed,Functional/Can be set/Functional/Functional"
newline
bitfld.long 0x00 0.--4. " NUMTOF   ,Selects the ratio between the number of counter overflows to the number of times the TOF bit is set" "Each,Not for next 1,Not for next 2,Not for next 3,Not for next 4,Not for next 5,Not for next 6,Not for next 7,Not for next 8,Not for next 9,Not for next 10,Not for next 11,Not for next 12,Not for next 13,Not for next 14,Not for next 15,Not for next 16,Not for next 17,Not for next 18,Not for next 19,Not for next 20,Not for next 21,Not for next 22,Not for next 23,Not for next 24,Not for next 25,Not for next 26,Not for next 27,Not for next 28,Not for next 29,Not for next 30,Not for next 31"
rgroup.long 0x8C++0x0F
line.long 0x00 "FTM4_SYNCONF,Synchronization Configuration Register"
bitfld.long 0x00 20. " HWSOC    ,Software output control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 19. "        HWINVC     ,Inverting control synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 18. "                  HWOM       ,Output mask synchronization is activated by a hardware trigger" "Not activated,Activated"
newline
bitfld.long 0x00 17. " HWWRBUF  ,MOD CNTIN and CV registers synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 16. "        HWRSTCNT   ,FTM counter synchronization is activated by a hardware trigger" "Not activated,Activated"
bitfld.long 0x00 12. "                  SWSOC      ,Software output control synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 11. " SWINVC   ,Inverting control synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 10. "        SWOM       ,Output mask synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 9. "                  SWWRBUF    ,MOD CNTIN and CV registers synchronization is activated by the software trigger" "Not activated,Activated"
newline
bitfld.long 0x00 8. " SWRSTCNT ,FTM counter synchronization is activated by the software trigger" "Not activated,Activated"
bitfld.long 0x00 7. "        SYNCMODE   ,Selects the PWM synchronization mode" "Legacy PWM,Enhanced PWM"
bitfld.long 0x00 5. "                   SWOC       ,SWOCTRL register synchronization" "All rising edges,PWM synchronization"
newline
bitfld.long 0x00 4. " INVC     ,INVCTRL register synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 2. "  CNTINC     ,CNTIN Register Synchronization" "All rising edges,PWM synchronization"
bitfld.long 0x00 0. "            HWTRIGMODE ,Hardware trigger mode" "Clear,Doesn't clear TRIG"
line.long 0x04 "FTM4_INVCTRL,FTM Inverting Control Register"
bitfld.long 0x04 3. " INV3EN   ,Pair channels 3 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 2. "             INV2EN     ,Pair channels 2 inverting enable" "Disabled,Enabled"
bitfld.long 0x04 1. "                       INV1EN     ,Pair channels 1 inverting enable" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " INV0EN   ,Pair channels 0 inverting enable" "Disabled,Enabled"
line.long 0x08 "FTM4_SWOCTRL,FTM Software Output Control Register"
bitfld.long 0x08 15. " CH7OCV   ,Channel 7 software output control value" "0 forced,1 forced"
bitfld.long 0x08 14. "             CH6OCV     ,Channel 6 software output control value" "0 forced,1 forced"
bitfld.long 0x08 13. "                       CH5OCV     ,Channel 5 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 12. " CH4OCV   ,Channel 4 software output control value" "0 forced,1 forced"
bitfld.long 0x08 11. "             CH3OCV     ,Channel 3 software output control value" "0 forced,1 forced"
bitfld.long 0x08 10. "                       CH2OCV     ,Channel 2 software output control value" "0 forced,1 forced"
newline
bitfld.long 0x08 9. " CH1OCV   ,Channel 1 software output control value" "0 forced,1 forced"
bitfld.long 0x08 8. "             CH0OCV     ,Channel 0 software output control value" "0 forced,1 forced"
bitfld.long 0x08 7. "                       CH7OC      ,Channel 7 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " CH6OC    ,Channel 6 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 5. "             CH5OC      ,Channel 5 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 4. "                       CH4OC      ,Channel 4 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 3. " CH3OC    ,Channel 3 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 2. "             CH2OC      ,Channel 2 software output control enable" "Disabled,Enabled"
bitfld.long 0x08 1. "                       CH1OC      ,Channel 1 software output control enable" "Disabled,Enabled"
newline
bitfld.long 0x08 0. " CH0OC    ,Channel 0 software output control enable" "Disabled,Enabled"
line.long 0x0C "FTM4_PWMLOAD,FTM PWM Load Register"
bitfld.long 0x0C 9. " LDOK     ,Load enable" "Disabled,Enabled"
bitfld.long 0x0C 7. "             CH7SEL     ,Includes channel 7 in matching process" "Not included,Included"
bitfld.long 0x0C 6. "                   CH6SEL     ,Includes channel 6 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 5. " CH5SEL   ,Includes channel 5 in matching process" "Not included,Included"
bitfld.long 0x0C 4. "         CH4SEL     ,Includes channel 4 in matching process" "Not included,Included"
bitfld.long 0x0C 3. "                   CH3SEL     ,Includes channel 3 in matching process" "Not included,Included"
newline
bitfld.long 0x0C 2. " CH2SEL   ,Includes channel 2 in matching process" "Not included,Included"
bitfld.long 0x0C 1. "         CH1SEL     ,Includes channel 1 in matching process" "Not included,Included"
bitfld.long 0x0C 0. "                   CH0SEL     ,Includes channel 0 in matching process" "Not included,Included"
endif
width 0x0B
tree.end
tree.end
tree.open "GPIO (General Purpose I/O)"
tree "GPIO 1"
base ad:0x02300000
width 13.
group.long 0x00++0x1B
line.long 0x00 "GPIO1_GPDIR,GPIO Direction Register"
bitfld.long 0x00 28. " DR28  ,Pin 28 direction select" "Input,Output"
bitfld.long 0x00 27. "        DR27  ,Pin 27 direction select" "Input,Output"
bitfld.long 0x00 26. "        DR26  ,Pin 26 direction select" "Input,Output"
bitfld.long 0x00 25. "        DR25  ,Pin 25 direction select" "Input,Output"
bitfld.long 0x00 24. "        DR24  ,Pin 24 direction select" "Input,Output"
bitfld.long 0x00 23. "        DR23  ,Pin 23 direction select" "Input,Output"
newline
bitfld.long 0x00 22. " DR22  ,Pin 22 direction select" "Input,Output"
bitfld.long 0x00 21. "        DR21  ,Pin 21 direction select" "Input,Output"
bitfld.long 0x00 20. "        DR20  ,Pin 20 direction select" "Input,Output"
bitfld.long 0x00 19. "        DR19  ,Pin 19 direction select" "Input,Output"
bitfld.long 0x00 18. "        DR18  ,Pin 18 direction select" "Input,Output"
bitfld.long 0x00 17. "        DR17  ,Pin 17 direction select" "Input,Output"
newline
bitfld.long 0x00 16. " DR16  ,Pin 16 direction select" "Input,Output"
bitfld.long 0x00 15. "        DR15  ,Pin 15 direction select" "Input,Output"
bitfld.long 0x00 14. "        DR14  ,Pin 14 direction select" "Input,Output"
bitfld.long 0x00 13. "        DR13  ,Pin 13 direction select" "Input,Output"
bitfld.long 0x00 12. "        DR12  ,Pin 12 direction select" "Input,Output"
bitfld.long 0x00 11. "        DR11  ,Pin 11 direction select" "Input,Output"
newline
bitfld.long 0x00 10. " DR10  ,Pin 10 direction select" "Input,Output"
bitfld.long 0x00 9. "        DR9   ,Pin 9 direction select" "Input,Output"
bitfld.long 0x00 8. "        DR8   ,Pin 8 direction select" "Input,Output"
bitfld.long 0x00 7. "        DR7   ,Pin 7 direction select" "Input,Output"
bitfld.long 0x00 6. "        DR6   ,Pin 6 direction select" "Input,Output"
bitfld.long 0x00 5. "        DR5   ,Pin 5 direction select" "Input,Output"
newline
bitfld.long 0x00 4. " DR4   ,Pin 4 direction select" "Input,Output"
bitfld.long 0x00 3. "        DR3   ,Pin 3 direction select" "Input,Output"
bitfld.long 0x00 2. "        DR2   ,Pin 2 direction select" "Input,Output"
bitfld.long 0x00 1. "        DR1   ,Pin 1 direction select" "Input,Output"
bitfld.long 0x00 0. "        DR0   ,Pin 0 direction select" "Input,Output"
line.long 0x04 "GPIO1_GPODR,GPIO Open Drain Register"
bitfld.long 0x04 28. " OD28  ,Open drain configuration for pin 28" "Push-pull,Open-drain"
bitfld.long 0x04 27. "    OD27  ,Open drain configuration for pin 27" "Push-pull,Open-drain"
bitfld.long 0x04 26. "    OD26  ,Open drain configuration for pin 26" "Push-pull,Open-drain"
bitfld.long 0x04 25. "    OD25  ,Open drain configuration for pin 25" "Push-pull,Open-drain"
bitfld.long 0x04 24. "    OD24  ,Open drain configuration for pin 24" "Push-pull,Open-drain"
bitfld.long 0x04 23. "    OD23  ,Open drain configuration for pin 23" "Push-pull,Open-drain"
newline
bitfld.long 0x04 22. " OD22  ,Open drain configuration for pin 22" "Push-pull,Open-drain"
bitfld.long 0x04 21. "    OD21  ,Open drain configuration for pin 21" "Push-pull,Open-drain"
bitfld.long 0x04 20. "    OD20  ,Open drain configuration for pin 20" "Push-pull,Open-drain"
bitfld.long 0x04 19. "    OD19  ,Open drain configuration for pin 19" "Push-pull,Open-drain"
bitfld.long 0x04 18. "    OD18  ,Open drain configuration for pin 18" "Push-pull,Open-drain"
bitfld.long 0x04 17. "    OD17  ,Open drain configuration for pin 17" "Push-pull,Open-drain"
newline
bitfld.long 0x04 16. " OD16  ,Open drain configuration for pin 16" "Push-pull,Open-drain"
bitfld.long 0x04 15. "    OD15  ,Open drain configuration for pin 15" "Push-pull,Open-drain"
bitfld.long 0x04 14. "    OD14  ,Open drain configuration for pin 14" "Push-pull,Open-drain"
bitfld.long 0x04 13. "    OD13  ,Open drain configuration for pin 13" "Push-pull,Open-drain"
bitfld.long 0x04 12. "    OD12  ,Open drain configuration for pin 12" "Push-pull,Open-drain"
bitfld.long 0x04 11. "    OD11  ,Open drain configuration for pin 11" "Push-pull,Open-drain"
newline
bitfld.long 0x04 10. " OD10  ,Open drain configuration for pin 10" "Push-pull,Open-drain"
bitfld.long 0x04 9. "    OD9   ,Open drain configuration for pin 9" "Push-pull,Open-drain"
bitfld.long 0x04 8. "    OD8   ,Open drain configuration for pin 8" "Push-pull,Open-drain"
bitfld.long 0x04 7. "    OD7   ,Open drain configuration for pin 7" "Push-pull,Open-drain"
bitfld.long 0x04 6. "    OD6   ,Open drain configuration for pin 6" "Push-pull,Open-drain"
bitfld.long 0x04 5. "    OD5   ,Open drain configuration for pin 5" "Push-pull,Open-drain"
newline
bitfld.long 0x04 4. " OD4   ,Open drain configuration for pin 4" "Push-pull,Open-drain"
bitfld.long 0x04 3. "    OD3   ,Open drain configuration for pin 3" "Push-pull,Open-drain"
bitfld.long 0x04 2. "    OD2   ,Open drain configuration for pin 2" "Push-pull,Open-drain"
bitfld.long 0x04 1. "    OD1   ,Open drain configuration for pin 1" "Push-pull,Open-drain"
bitfld.long 0x04 0. "    OD0   ,Open drain configuration for pin 0" "Push-pull,Open-drain"
line.long 0x08 "GPIO1_GPDAT,GPIO Data Register"
bitfld.long 0x08 28. " D28   ,Pin 28 data" "0,1"
bitfld.long 0x08 27. "             D27   ,Pin 27 data" "0,1"
bitfld.long 0x08 26. "             D26   ,Pin 26 data" "0,1"
bitfld.long 0x08 25. "             D25   ,Pin 25 data" "0,1"
bitfld.long 0x08 24. "             D24   ,Pin 24 data" "0,1"
bitfld.long 0x08 23. "             D23   ,Pin 23 data" "0,1"
newline
bitfld.long 0x08 22. " D22   ,Pin 22 data" "0,1"
bitfld.long 0x08 21. "             D21   ,Pin 21 data" "0,1"
bitfld.long 0x08 20. "             D20   ,Pin 20 data" "0,1"
bitfld.long 0x08 19. "             D19   ,Pin 19 data" "0,1"
bitfld.long 0x08 18. "             D18   ,Pin 18 data" "0,1"
bitfld.long 0x08 17. "             D17   ,Pin 17 data" "0,1"
newline
bitfld.long 0x08 16. " D16   ,Pin 16 data" "0,1"
bitfld.long 0x08 15. "             D15   ,Pin 15 data" "0,1"
bitfld.long 0x08 14. "             D14   ,Pin 14 data" "0,1"
bitfld.long 0x08 13. "             D13   ,Pin 13 data" "0,1"
bitfld.long 0x08 12. "             D12   ,Pin 12 data" "0,1"
bitfld.long 0x08 11. "             D11   ,Pin 11 data" "0,1"
newline
bitfld.long 0x08 10. " D10   ,Pin 10 data" "0,1"
bitfld.long 0x08 9. "             D9    ,Pin 9 data" "0,1"
bitfld.long 0x08 8. "             D8    ,Pin 8 data" "0,1"
bitfld.long 0x08 7. "             D7    ,Pin 7 data" "0,1"
bitfld.long 0x08 6. "             D6    ,Pin 6 data" "0,1"
bitfld.long 0x08 5. "             D5    ,Pin 5 data" "0,1"
newline
bitfld.long 0x08 4. " D4    ,Pin 4 data" "0,1"
bitfld.long 0x08 3. "             D3    ,Pin 3 data" "0,1"
bitfld.long 0x08 2. "             D2    ,Pin 2 data" "0,1"
bitfld.long 0x08 1. "             D1    ,Pin 1 data" "0,1"
bitfld.long 0x08 0. "             D0    ,Pin 0 data" "0,1"
line.long 0x0C "GPIO1_GPIER,GPIO Interrupt Event Register"
eventfld.long 0x0C 28. " EV28  ,Pin 28 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 27. "  EV27  ,Pin 27 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 26. "  EV26  ,Pin 26 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 25. "  EV25  ,Pin 25 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 24. "  EV24  ,Pin 24 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 23. "  EV23  ,Pin 23 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 22. " EV22  ,Pin 22 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 21. "  EV21  ,Pin 21 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 20. "  EV20  ,Pin 20 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 19. "  EV19  ,Pin 19 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 18. "  EV18  ,Pin 18 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 17. "  EV17  ,Pin 17 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 16. " EV16  ,Pin 16 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 15. "  EV15  ,Pin 15 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 14. "  EV14  ,Pin 14 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 13. "  EV13  ,Pin 13 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 12. "  EV12  ,Pin 12 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 11. "  EV11  ,Pin 11 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 10. " EV10  ,Pin 10 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 9. "  EV9   ,Pin 9 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 8. "  EV8   ,Pin 8 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 7. "  EV7   ,Pin 7 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 6. "  EV6   ,Pin 6 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 5. "  EV5   ,Pin 5 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 4. " EV4   ,Pin 4 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 3. "  EV3   ,Pin 3 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 2. "  EV2   ,Pin 2 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 1. "  EV1   ,Pin 1 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 0. "  EV0   ,Pin 0 interrupt event status" "No interrupt,Interrupt"
line.long 0x10 "GPIO1_GPIMR,GPIO Interrupt Mask Register"
bitfld.long 0x10 28. " IM28  ,Pin 28 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 27. "    IM27  ,Pin 27 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 26. "    IM26  ,Pin 26 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 25. "    IM25  ,Pin 25 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 24. "    IM24  ,Pin 24 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 23. "    IM23  ,Pin 23 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 22. " IM22  ,Pin 22 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 21. "    IM21  ,Pin 21 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 20. "    IM20  ,Pin 20 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 19. "    IM19  ,Pin 19 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 18. "    IM18  ,Pin 18 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 17. "    IM17  ,Pin 17 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 16. " IM16  ,Pin 16 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 15. "    IM15  ,Pin 15 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 14. "    IM14  ,Pin 14 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 13. "    IM13  ,Pin 13 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 12. "    IM12  ,Pin 12 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 11. "    IM11  ,Pin 11 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 10. " IM10  ,Pin 10 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 9. "    IM9   ,Pin 9 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 8. "    IM8   ,Pin 8 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 7. "    IM7   ,Pin 7 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 6. "    IM6   ,Pin 6 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 5. "    IM5   ,Pin 5 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 4. " IM4   ,Pin 4 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 3. "    IM3   ,Pin 3 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 2. "    IM2   ,Pin 2 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 1. "    IM1   ,Pin 1 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 0. "    IM0   ,Pin 0 interrupt mask" "Masked,Not masked"
line.long 0x14 "GPIO1_GPICR,GPIO Interrupt Control Register"
bitfld.long 0x14 28. " ED28  ,Pin 28 edge detection select" "Any change,Falling"
bitfld.long 0x14 27. "    ED27  ,Pin 27 edge detection select" "Any change,Falling"
bitfld.long 0x14 26. "    ED26  ,Pin 26 edge detection select" "Any change,Falling"
bitfld.long 0x14 25. "    ED25  ,Pin 25 edge detection select" "Any change,Falling"
bitfld.long 0x14 24. "    ED24  ,Pin 24 edge detection select" "Any change,Falling"
bitfld.long 0x14 23. "    ED23  ,Pin 23 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 22. " ED22  ,Pin 22 edge detection select" "Any change,Falling"
bitfld.long 0x14 21. "    ED21  ,Pin 21 edge detection select" "Any change,Falling"
bitfld.long 0x14 20. "    ED20  ,Pin 20 edge detection select" "Any change,Falling"
bitfld.long 0x14 19. "    ED19  ,Pin 19 edge detection select" "Any change,Falling"
bitfld.long 0x14 18. "    ED18  ,Pin 18 edge detection select" "Any change,Falling"
bitfld.long 0x14 17. "    ED17  ,Pin 17 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 16. " ED16  ,Pin 16 edge detection select" "Any change,Falling"
bitfld.long 0x14 15. "    ED15  ,Pin 15 edge detection select" "Any change,Falling"
bitfld.long 0x14 14. "    ED14  ,Pin 14 edge detection select" "Any change,Falling"
bitfld.long 0x14 13. "    ED13  ,Pin 13 edge detection select" "Any change,Falling"
bitfld.long 0x14 12. "    ED12  ,Pin 12 edge detection select" "Any change,Falling"
bitfld.long 0x14 11. "    ED11  ,Pin 11 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 10. " ED10  ,Pin 10 edge detection select" "Any change,Falling"
bitfld.long 0x14 9. "    ED9   ,Pin 9 edge detection select" "Any change,Falling"
bitfld.long 0x14 8. "    ED8   ,Pin 8 edge detection select" "Any change,Falling"
bitfld.long 0x14 7. "    ED7   ,Pin 7 edge detection select" "Any change,Falling"
bitfld.long 0x14 6. "    ED6   ,Pin 6 edge detection select" "Any change,Falling"
bitfld.long 0x14 5. "    ED5   ,Pin 5 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 4. " ED4   ,Pin 4 edge detection select" "Any change,Falling"
bitfld.long 0x14 3. "    ED3   ,Pin 3 edge detection select" "Any change,Falling"
bitfld.long 0x14 2. "    ED2   ,Pin 2 edge detection select" "Any change,Falling"
bitfld.long 0x14 1. "    ED1   ,Pin 1 edge detection select" "Any change,Falling"
bitfld.long 0x14 0. "    ED0   ,Pin 0 edge detection select" "Any change,Falling"
line.long 0x18 "GPIO1_GPIBE,GPIO Input Buffer Enable Register"
bitfld.long 0x18 28. " IBE28 ,Pin 28 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 27. "      IBE27 ,Pin 27 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 26. "      IBE26 ,Pin 26 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 25. "      IBE25 ,Pin 25 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 24. "      IBE24 ,Pin 24 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 23. "      IBE23 ,Pin 23 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 22. " IBE22 ,Pin 22 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 21. "      IBE21 ,Pin 21 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 20. "      IBE20 ,Pin 20 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 19. "      IBE19 ,Pin 19 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 18. "      IBE18 ,Pin 18 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 17. "      IBE17 ,Pin 17 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 16. " IBE16 ,Pin 16 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 15. "      IBE15 ,Pin 15 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 14. "      IBE14 ,Pin 14 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 13. "      IBE13 ,Pin 13 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 12. "      IBE12 ,Pin 12 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 11. "      IBE11 ,Pin 11 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 10. " IBE10 ,Pin 10 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 9. "      IBE9  ,Pin 9 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 8. "      IBE8  ,Pin 8 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 7. "      IBE7  ,Pin 7 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 6. "      IBE6  ,Pin 6 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 5. "      IBE5  ,Pin 5 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 4. " IBE4  ,Pin 4 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 3. "      IBE3  ,Pin 3 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 2. "      IBE2  ,Pin 2 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 1. "      IBE1  ,Pin 1 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 0. "      IBE0  ,Pin 0 GPIO port's input enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "GPIO 2"
base ad:0x02310000
width 13.
group.long 0x00++0x1B
line.long 0x00 "GPIO2_GPDIR,GPIO Direction Register"
bitfld.long 0x00 19. " DR19  ,Pin 19 direction select" "Input,Output"
bitfld.long 0x00 18. "        DR18  ,Pin 18 direction select" "Input,Output"
bitfld.long 0x00 17. "        DR17  ,Pin 17 direction select" "Input,Output"
bitfld.long 0x00 16. "        DR16  ,Pin 16 direction select" "Input,Output"
bitfld.long 0x00 15. "        DR15  ,Pin 15 direction select" "Input,Output"
bitfld.long 0x00 14. "        DR14  ,Pin 14 direction select" "Input,Output"
newline
bitfld.long 0x00 13. " DR13  ,Pin 13 direction select" "Input,Output"
bitfld.long 0x00 12. "        DR12  ,Pin 12 direction select" "Input,Output"
bitfld.long 0x00 11. "        DR11  ,Pin 11 direction select" "Input,Output"
bitfld.long 0x00 10. "        DR10  ,Pin 10 direction select" "Input,Output"
bitfld.long 0x00 9. "        DR9   ,Pin 9 direction select" "Input,Output"
bitfld.long 0x00 8. "        DR8   ,Pin 8 direction select" "Input,Output"
newline
bitfld.long 0x00 7. " DR7   ,Pin 7 direction select" "Input,Output"
bitfld.long 0x00 6. "        DR6   ,Pin 6 direction select" "Input,Output"
bitfld.long 0x00 5. "        DR5   ,Pin 5 direction select" "Input,Output"
bitfld.long 0x00 4. "        DR4   ,Pin 4 direction select" "Input,Output"
bitfld.long 0x00 3. "        DR3   ,Pin 3 direction select" "Input,Output"
bitfld.long 0x00 2. "        DR2   ,Pin 2 direction select" "Input,Output"
newline
bitfld.long 0x00 1. " DR1   ,Pin 1 direction select" "Input,Output"
bitfld.long 0x00 0. "        DR0   ,Pin 0 direction select" "Input,Output"
line.long 0x04 "GPIO2_GPODR,GPIO Open Drain Register"
bitfld.long 0x04 19. " OD19  ,Open drain configuration for pin 19" "Push-pull,Open-drain"
bitfld.long 0x04 18. "    OD18  ,Open drain configuration for pin 18" "Push-pull,Open-drain"
bitfld.long 0x04 17. "    OD17  ,Open drain configuration for pin 17" "Push-pull,Open-drain"
bitfld.long 0x04 16. "    OD16  ,Open drain configuration for pin 16" "Push-pull,Open-drain"
bitfld.long 0x04 15. "    OD15  ,Open drain configuration for pin 15" "Push-pull,Open-drain"
bitfld.long 0x04 14. "    OD14  ,Open drain configuration for pin 14" "Push-pull,Open-drain"
newline
bitfld.long 0x04 13. " OD13  ,Open drain configuration for pin 13" "Push-pull,Open-drain"
bitfld.long 0x04 12. "    OD12  ,Open drain configuration for pin 12" "Push-pull,Open-drain"
bitfld.long 0x04 11. "    OD11  ,Open drain configuration for pin 11" "Push-pull,Open-drain"
bitfld.long 0x04 10. "    OD10  ,Open drain configuration for pin 10" "Push-pull,Open-drain"
bitfld.long 0x04 9. "    OD9   ,Open drain configuration for pin 9" "Push-pull,Open-drain"
bitfld.long 0x04 8. "    OD8   ,Open drain configuration for pin 8" "Push-pull,Open-drain"
newline
bitfld.long 0x04 7. " OD7   ,Open drain configuration for pin 7" "Push-pull,Open-drain"
bitfld.long 0x04 6. "    OD6   ,Open drain configuration for pin 6" "Push-pull,Open-drain"
bitfld.long 0x04 5. "    OD5   ,Open drain configuration for pin 5" "Push-pull,Open-drain"
bitfld.long 0x04 4. "    OD4   ,Open drain configuration for pin 4" "Push-pull,Open-drain"
bitfld.long 0x04 3. "    OD3   ,Open drain configuration for pin 3" "Push-pull,Open-drain"
bitfld.long 0x04 2. "    OD2   ,Open drain configuration for pin 2" "Push-pull,Open-drain"
newline
bitfld.long 0x04 1. " OD1   ,Open drain configuration for pin 1" "Push-pull,Open-drain"
bitfld.long 0x04 0. "    OD0   ,Open drain configuration for pin 0" "Push-pull,Open-drain"
line.long 0x08 "GPIO2_GPDAT,GPIO Data Register"
bitfld.long 0x08 19. " D19   ,Pin 19 data" "0,1"
bitfld.long 0x08 18. "             D18   ,Pin 18 data" "0,1"
bitfld.long 0x08 17. "             D17   ,Pin 17 data" "0,1"
bitfld.long 0x08 16. "             D16   ,Pin 16 data" "0,1"
bitfld.long 0x08 15. "             D15   ,Pin 15 data" "0,1"
bitfld.long 0x08 14. "             D14   ,Pin 14 data" "0,1"
newline
bitfld.long 0x08 13. " D13   ,Pin 13 data" "0,1"
bitfld.long 0x08 12. "             D12   ,Pin 12 data" "0,1"
bitfld.long 0x08 11. "             D11   ,Pin 11 data" "0,1"
bitfld.long 0x08 10. "             D10   ,Pin 10 data" "0,1"
bitfld.long 0x08 9. "             D9    ,Pin 9 data" "0,1"
bitfld.long 0x08 8. "             D8    ,Pin 8 data" "0,1"
newline
bitfld.long 0x08 7. " D7    ,Pin 7 data" "0,1"
bitfld.long 0x08 6. "             D6    ,Pin 6 data" "0,1"
bitfld.long 0x08 5. "             D5    ,Pin 5 data" "0,1"
bitfld.long 0x08 4. "             D4    ,Pin 4 data" "0,1"
bitfld.long 0x08 3. "             D3    ,Pin 3 data" "0,1"
bitfld.long 0x08 2. "             D2    ,Pin 2 data" "0,1"
newline
bitfld.long 0x08 1. " D1    ,Pin 1 data" "0,1"
bitfld.long 0x08 0. "             D0    ,Pin 0 data" "0,1"
line.long 0x0C "GPIO2_GPIER,GPIO Interrupt Event Register"
eventfld.long 0x0C 19. " EV19  ,Pin 19 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 18. "  EV18  ,Pin 18 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 17. "  EV17  ,Pin 17 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 16. "  EV16  ,Pin 16 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 15. "  EV15  ,Pin 15 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 14. "  EV14  ,Pin 14 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 13. " EV13  ,Pin 13 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 12. "  EV12  ,Pin 12 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 11. "  EV11  ,Pin 11 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 10. "  EV10  ,Pin 10 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 9. "  EV9   ,Pin 9 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 8. "  EV8   ,Pin 8 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 7. " EV7   ,Pin 7 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 6. "  EV6   ,Pin 6 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 5. "  EV5   ,Pin 5 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 4. "  EV4   ,Pin 4 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 3. "  EV3   ,Pin 3 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 2. "  EV2   ,Pin 2 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 1. " EV1   ,Pin 1 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 0. "  EV0   ,Pin 0 interrupt event status" "No interrupt,Interrupt"
line.long 0x10 "GPIO2_GPIMR,GPIO Interrupt Mask Register"
bitfld.long 0x10 19. " IM19  ,Pin 19 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 18. "    IM18  ,Pin 18 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 17. "    IM17  ,Pin 17 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 16. "    IM16  ,Pin 16 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 15. "    IM15  ,Pin 15 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 14. "    IM14  ,Pin 14 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 13. " IM13  ,Pin 13 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 12. "    IM12  ,Pin 12 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 11. "    IM11  ,Pin 11 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 10. "    IM10  ,Pin 10 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 9. "    IM9   ,Pin 9 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 8. "    IM8   ,Pin 8 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 7. " IM7   ,Pin 7 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 6. "    IM6   ,Pin 6 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 5. "    IM5   ,Pin 5 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 4. "    IM4   ,Pin 4 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 3. "    IM3   ,Pin 3 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 2. "    IM2   ,Pin 2 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 1. " IM1   ,Pin 1 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 0. "    IM0   ,Pin 0 interrupt mask" "Masked,Not masked"
line.long 0x14 "GPIO2_GPICR,GPIO Interrupt Control Register"
bitfld.long 0x14 19. " ED19  ,Pin 19 edge detection select" "Any change,Falling"
bitfld.long 0x14 18. "    ED18  ,Pin 18 edge detection select" "Any change,Falling"
bitfld.long 0x14 17. "    ED17  ,Pin 17 edge detection select" "Any change,Falling"
bitfld.long 0x14 16. "    ED16  ,Pin 16 edge detection select" "Any change,Falling"
bitfld.long 0x14 15. "    ED15  ,Pin 15 edge detection select" "Any change,Falling"
bitfld.long 0x14 14. "    ED14  ,Pin 14 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 13. " ED13  ,Pin 13 edge detection select" "Any change,Falling"
bitfld.long 0x14 12. "    ED12  ,Pin 12 edge detection select" "Any change,Falling"
bitfld.long 0x14 11. "    ED11  ,Pin 11 edge detection select" "Any change,Falling"
bitfld.long 0x14 10. "    ED10  ,Pin 10 edge detection select" "Any change,Falling"
bitfld.long 0x14 9. "    ED9   ,Pin 9 edge detection select" "Any change,Falling"
bitfld.long 0x14 8. "    ED8   ,Pin 8 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 7. " ED7   ,Pin 7 edge detection select" "Any change,Falling"
bitfld.long 0x14 6. "    ED6   ,Pin 6 edge detection select" "Any change,Falling"
bitfld.long 0x14 5. "    ED5   ,Pin 5 edge detection select" "Any change,Falling"
bitfld.long 0x14 4. "    ED4   ,Pin 4 edge detection select" "Any change,Falling"
bitfld.long 0x14 3. "    ED3   ,Pin 3 edge detection select" "Any change,Falling"
bitfld.long 0x14 2. "    ED2   ,Pin 2 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 1. " ED1   ,Pin 1 edge detection select" "Any change,Falling"
bitfld.long 0x14 0. "    ED0   ,Pin 0 edge detection select" "Any change,Falling"
line.long 0x18 "GPIO2_GPIBE,GPIO Input Buffer Enable Register"
bitfld.long 0x18 19. " IBE19 ,Pin 19 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 18. "      IBE18 ,Pin 18 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 17. "      IBE17 ,Pin 17 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 16. "      IBE16 ,Pin 16 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 15. "      IBE15 ,Pin 15 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 14. "      IBE14 ,Pin 14 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 13. " IBE13 ,Pin 13 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 12. "      IBE12 ,Pin 12 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 11. "      IBE11 ,Pin 11 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 10. "      IBE10 ,Pin 10 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 9. "      IBE9  ,Pin 9 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 8. "      IBE8  ,Pin 8 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 7. " IBE7  ,Pin 7 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 6. "      IBE6  ,Pin 6 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 5. "      IBE5  ,Pin 5 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 4. "      IBE4  ,Pin 4 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 3. "      IBE3  ,Pin 3 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 2. "      IBE2  ,Pin 2 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 1. " IBE1  ,Pin 1 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 0. "      IBE0  ,Pin 0 GPIO port's input enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "GPIO 3"
base ad:0x02320000
width 13.
group.long 0x00++0x1B
line.long 0x00 "GPIO3_GPDIR,GPIO Direction Register"
bitfld.long 0x00 30. " DR30  ,Pin 30 direction select" "Input,Output"
bitfld.long 0x00 29. "        DR29  ,Pin 29 direction select" "Input,Output"
bitfld.long 0x00 28. "        DR28  ,Pin 28 direction select" "Input,Output"
bitfld.long 0x00 27. "        DR27  ,Pin 27 direction select" "Input,Output"
bitfld.long 0x00 26. "        DR26  ,Pin 26 direction select" "Input,Output"
bitfld.long 0x00 25. "        DR25  ,Pin 25 direction select" "Input,Output"
newline
bitfld.long 0x00 24. " DR24  ,Pin 24 direction select" "Input,Output"
bitfld.long 0x00 23. "        DR23  ,Pin 23 direction select" "Input,Output"
bitfld.long 0x00 22. "        DR22  ,Pin 22 direction select" "Input,Output"
bitfld.long 0x00 21. "        DR21  ,Pin 21 direction select" "Input,Output"
bitfld.long 0x00 20. "        DR20  ,Pin 20 direction select" "Input,Output"
bitfld.long 0x00 19. "        DR19  ,Pin 19 direction select" "Input,Output"
newline
bitfld.long 0x00 18. " DR18  ,Pin 18 direction select" "Input,Output"
bitfld.long 0x00 17. "        DR17  ,Pin 17 direction select" "Input,Output"
bitfld.long 0x00 16. "        DR16  ,Pin 16 direction select" "Input,Output"
bitfld.long 0x00 15. "        DR15  ,Pin 15 direction select" "Input,Output"
bitfld.long 0x00 14. "        DR14  ,Pin 14 direction select" "Input,Output"
bitfld.long 0x00 13. "        DR13  ,Pin 13 direction select" "Input,Output"
newline
bitfld.long 0x00 12. " DR12  ,Pin 12 direction select" "Input,Output"
bitfld.long 0x00 11. "        DR11  ,Pin 11 direction select" "Input,Output"
bitfld.long 0x00 10. "        DR10  ,Pin 10 direction select" "Input,Output"
bitfld.long 0x00 9. "        DR9   ,Pin 9 direction select" "Input,Output"
bitfld.long 0x00 8. "        DR8   ,Pin 8 direction select" "Input,Output"
bitfld.long 0x00 7. "        DR7   ,Pin 7 direction select" "Input,Output"
newline
bitfld.long 0x00 6. " DR6   ,Pin 6 direction select" "Input,Output"
bitfld.long 0x00 5. "        DR5   ,Pin 5 direction select" "Input,Output"
bitfld.long 0x00 4. "        DR4   ,Pin 4 direction select" "Input,Output"
bitfld.long 0x00 3. "        DR3   ,Pin 3 direction select" "Input,Output"
bitfld.long 0x00 2. "        DR2   ,Pin 2 direction select" "Input,Output"
line.long 0x04 "GPIO3_GPODR,GPIO Open Drain Register"
bitfld.long 0x04 30. " OD30  ,Open drain configuration for pin 30" "Push-pull,Open-drain"
bitfld.long 0x04 29. "    OD29  ,Open drain configuration for pin 29" "Push-pull,Open-drain"
bitfld.long 0x04 28. "    OD28  ,Open drain configuration for pin 28" "Push-pull,Open-drain"
bitfld.long 0x04 27. "    OD27  ,Open drain configuration for pin 27" "Push-pull,Open-drain"
bitfld.long 0x04 26. "    OD26  ,Open drain configuration for pin 26" "Push-pull,Open-drain"
bitfld.long 0x04 25. "    OD25  ,Open drain configuration for pin 25" "Push-pull,Open-drain"
newline
bitfld.long 0x04 24. " OD24  ,Open drain configuration for pin 24" "Push-pull,Open-drain"
bitfld.long 0x04 23. "    OD23  ,Open drain configuration for pin 23" "Push-pull,Open-drain"
bitfld.long 0x04 22. "    OD22  ,Open drain configuration for pin 22" "Push-pull,Open-drain"
bitfld.long 0x04 21. "    OD21  ,Open drain configuration for pin 21" "Push-pull,Open-drain"
bitfld.long 0x04 20. "    OD20  ,Open drain configuration for pin 20" "Push-pull,Open-drain"
bitfld.long 0x04 19. "    OD19  ,Open drain configuration for pin 19" "Push-pull,Open-drain"
newline
bitfld.long 0x04 18. " OD18  ,Open drain configuration for pin 18" "Push-pull,Open-drain"
bitfld.long 0x04 17. "    OD17  ,Open drain configuration for pin 17" "Push-pull,Open-drain"
bitfld.long 0x04 16. "    OD16  ,Open drain configuration for pin 16" "Push-pull,Open-drain"
bitfld.long 0x04 15. "    OD15  ,Open drain configuration for pin 15" "Push-pull,Open-drain"
bitfld.long 0x04 14. "    OD14  ,Open drain configuration for pin 14" "Push-pull,Open-drain"
bitfld.long 0x04 13. "    OD13  ,Open drain configuration for pin 13" "Push-pull,Open-drain"
newline
bitfld.long 0x04 12. " OD12  ,Open drain configuration for pin 12" "Push-pull,Open-drain"
bitfld.long 0x04 11. "    OD11  ,Open drain configuration for pin 11" "Push-pull,Open-drain"
bitfld.long 0x04 10. "    OD10  ,Open drain configuration for pin 10" "Push-pull,Open-drain"
bitfld.long 0x04 9. "    OD9   ,Open drain configuration for pin 9" "Push-pull,Open-drain"
bitfld.long 0x04 8. "    OD8   ,Open drain configuration for pin 8" "Push-pull,Open-drain"
bitfld.long 0x04 7. "    OD7   ,Open drain configuration for pin 7" "Push-pull,Open-drain"
newline
bitfld.long 0x04 6. " OD6   ,Open drain configuration for pin 6" "Push-pull,Open-drain"
bitfld.long 0x04 5. "    OD5   ,Open drain configuration for pin 5" "Push-pull,Open-drain"
bitfld.long 0x04 4. "    OD4   ,Open drain configuration for pin 4" "Push-pull,Open-drain"
bitfld.long 0x04 3. "    OD3   ,Open drain configuration for pin 3" "Push-pull,Open-drain"
bitfld.long 0x04 2. "    OD2   ,Open drain configuration for pin 2" "Push-pull,Open-drain"
line.long 0x08 "GPIO3_GPDAT,GPIO Data Register"
bitfld.long 0x08 30. " D30   ,Pin 30 data" "0,1"
bitfld.long 0x08 29. "             D29   ,Pin 29 data" "0,1"
bitfld.long 0x08 28. "             D28   ,Pin 28 data" "0,1"
bitfld.long 0x08 27. "             D27   ,Pin 27 data" "0,1"
bitfld.long 0x08 26. "             D26   ,Pin 26 data" "0,1"
bitfld.long 0x08 25. "             D25   ,Pin 25 data" "0,1"
newline
bitfld.long 0x08 24. " D24   ,Pin 24 data" "0,1"
bitfld.long 0x08 23. "             D23   ,Pin 23 data" "0,1"
bitfld.long 0x08 22. "             D22   ,Pin 22 data" "0,1"
bitfld.long 0x08 21. "             D21   ,Pin 21 data" "0,1"
bitfld.long 0x08 20. "             D20   ,Pin 20 data" "0,1"
bitfld.long 0x08 19. "             D19   ,Pin 19 data" "0,1"
newline
bitfld.long 0x08 18. " D18   ,Pin 18 data" "0,1"
bitfld.long 0x08 17. "             D17   ,Pin 17 data" "0,1"
bitfld.long 0x08 16. "             D16   ,Pin 16 data" "0,1"
bitfld.long 0x08 15. "             D15   ,Pin 15 data" "0,1"
bitfld.long 0x08 14. "             D14   ,Pin 14 data" "0,1"
bitfld.long 0x08 13. "             D13   ,Pin 13 data" "0,1"
newline
bitfld.long 0x08 12. " D12   ,Pin 12 data" "0,1"
bitfld.long 0x08 11. "             D11   ,Pin 11 data" "0,1"
bitfld.long 0x08 10. "             D10   ,Pin 10 data" "0,1"
bitfld.long 0x08 9. "             D9    ,Pin 9 data" "0,1"
bitfld.long 0x08 8. "             D8    ,Pin 8 data" "0,1"
bitfld.long 0x08 7. "             D7    ,Pin 7 data" "0,1"
newline
bitfld.long 0x08 6. " D6    ,Pin 6 data" "0,1"
bitfld.long 0x08 5. "             D5    ,Pin 5 data" "0,1"
bitfld.long 0x08 4. "             D4    ,Pin 4 data" "0,1"
bitfld.long 0x08 3. "             D3    ,Pin 3 data" "0,1"
bitfld.long 0x08 2. "             D2    ,Pin 2 data" "0,1"
line.long 0x0C "GPIO3_GPIER,GPIO Interrupt Event Register"
eventfld.long 0x0C 30. " EV30  ,Pin 30 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 29. "  EV29  ,Pin 29 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 28. "  EV28  ,Pin 28 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 27. "  EV27  ,Pin 27 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 26. "  EV26  ,Pin 26 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 25. "  EV25  ,Pin 25 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 24. " EV24  ,Pin 24 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 23. "  EV23  ,Pin 23 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 22. "  EV22  ,Pin 22 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 21. "  EV21  ,Pin 21 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 20. "  EV20  ,Pin 20 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 19. "  EV19  ,Pin 19 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 18. " EV18  ,Pin 18 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 17. "  EV17  ,Pin 17 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 16. "  EV16  ,Pin 16 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 15. "  EV15  ,Pin 15 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 14. "  EV14  ,Pin 14 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 13. "  EV13  ,Pin 13 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 12. " EV12  ,Pin 12 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 11. "  EV11  ,Pin 11 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 10. "  EV10  ,Pin 10 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 9. "  EV9   ,Pin 9 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 8. "  EV8   ,Pin 8 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 7. "  EV7   ,Pin 7 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 6. " EV6   ,Pin 6 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 5. "  EV5   ,Pin 5 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 4. "  EV4   ,Pin 4 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 3. "  EV3   ,Pin 3 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 2. "  EV2   ,Pin 2 interrupt event status" "No interrupt,Interrupt"
line.long 0x10 "GPIO3_GPIMR,GPIO Interrupt Mask Register"
bitfld.long 0x10 30. " IM30  ,Pin 30 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 29. "    IM29  ,Pin 29 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 28. "    IM28  ,Pin 28 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 27. "    IM27  ,Pin 27 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 26. "    IM26  ,Pin 26 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 25. "    IM25  ,Pin 25 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 24. " IM24  ,Pin 24 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 23. "    IM23  ,Pin 23 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 22. "    IM22  ,Pin 22 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 21. "    IM21  ,Pin 21 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 20. "    IM20  ,Pin 20 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 19. "    IM19  ,Pin 19 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 18. " IM18  ,Pin 18 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 17. "    IM17  ,Pin 17 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 16. "    IM16  ,Pin 16 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 15. "    IM15  ,Pin 15 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 14. "    IM14  ,Pin 14 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 13. "    IM13  ,Pin 13 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 12. " IM12  ,Pin 12 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 11. "    IM11  ,Pin 11 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 10. "    IM10  ,Pin 10 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 9. "    IM9   ,Pin 9 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 8. "    IM8   ,Pin 8 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 7. "    IM7   ,Pin 7 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 6. " IM6   ,Pin 6 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 5. "    IM5   ,Pin 5 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 4. "    IM4   ,Pin 4 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 3. "    IM3   ,Pin 3 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 2. "    IM2   ,Pin 2 interrupt mask" "Masked,Not masked"
line.long 0x14 "GPIO3_GPICR,GPIO Interrupt Control Register"
bitfld.long 0x14 30. " ED30  ,Pin 30 edge detection select" "Any change,Falling"
bitfld.long 0x14 29. "    ED29  ,Pin 29 edge detection select" "Any change,Falling"
bitfld.long 0x14 28. "    ED28  ,Pin 28 edge detection select" "Any change,Falling"
bitfld.long 0x14 27. "    ED27  ,Pin 27 edge detection select" "Any change,Falling"
bitfld.long 0x14 26. "    ED26  ,Pin 26 edge detection select" "Any change,Falling"
bitfld.long 0x14 25. "    ED25  ,Pin 25 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 24. " ED24  ,Pin 24 edge detection select" "Any change,Falling"
bitfld.long 0x14 23. "    ED23  ,Pin 23 edge detection select" "Any change,Falling"
bitfld.long 0x14 22. "    ED22  ,Pin 22 edge detection select" "Any change,Falling"
bitfld.long 0x14 21. "    ED21  ,Pin 21 edge detection select" "Any change,Falling"
bitfld.long 0x14 20. "    ED20  ,Pin 20 edge detection select" "Any change,Falling"
bitfld.long 0x14 19. "    ED19  ,Pin 19 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 18. " ED18  ,Pin 18 edge detection select" "Any change,Falling"
bitfld.long 0x14 17. "    ED17  ,Pin 17 edge detection select" "Any change,Falling"
bitfld.long 0x14 16. "    ED16  ,Pin 16 edge detection select" "Any change,Falling"
bitfld.long 0x14 15. "    ED15  ,Pin 15 edge detection select" "Any change,Falling"
bitfld.long 0x14 14. "    ED14  ,Pin 14 edge detection select" "Any change,Falling"
bitfld.long 0x14 13. "    ED13  ,Pin 13 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 12. " ED12  ,Pin 12 edge detection select" "Any change,Falling"
bitfld.long 0x14 11. "    ED11  ,Pin 11 edge detection select" "Any change,Falling"
bitfld.long 0x14 10. "    ED10  ,Pin 10 edge detection select" "Any change,Falling"
bitfld.long 0x14 9. "    ED9   ,Pin 9 edge detection select" "Any change,Falling"
bitfld.long 0x14 8. "    ED8   ,Pin 8 edge detection select" "Any change,Falling"
bitfld.long 0x14 7. "    ED7   ,Pin 7 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 6. " ED6   ,Pin 6 edge detection select" "Any change,Falling"
bitfld.long 0x14 5. "    ED5   ,Pin 5 edge detection select" "Any change,Falling"
bitfld.long 0x14 4. "    ED4   ,Pin 4 edge detection select" "Any change,Falling"
bitfld.long 0x14 3. "    ED3   ,Pin 3 edge detection select" "Any change,Falling"
bitfld.long 0x14 2. "    ED2   ,Pin 2 edge detection select" "Any change,Falling"
line.long 0x18 "GPIO3_GPIBE,GPIO Input Buffer Enable Register"
bitfld.long 0x18 30. " IBE30 ,Pin 30 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 29. "      IBE29 ,Pin 29 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 28. "      IBE28 ,Pin 28 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 27. "      IBE27 ,Pin 27 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 26. "      IBE26 ,Pin 26 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 25. "      IBE25 ,Pin 25 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 24. " IBE24 ,Pin 24 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 23. "      IBE23 ,Pin 23 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 22. "      IBE22 ,Pin 22 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 21. "      IBE21 ,Pin 21 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 20. "      IBE20 ,Pin 20 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 19. "      IBE19 ,Pin 19 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 18. " IBE18 ,Pin 18 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 17. "      IBE17 ,Pin 17 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 16. "      IBE16 ,Pin 16 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 15. "      IBE15 ,Pin 15 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 14. "      IBE14 ,Pin 14 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 13. "      IBE13 ,Pin 13 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 12. " IBE12 ,Pin 12 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 11. "      IBE11 ,Pin 11 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 10. "      IBE10 ,Pin 10 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 9. "      IBE9  ,Pin 9 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 8. "      IBE8  ,Pin 8 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 7. "      IBE7  ,Pin 7 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 6. " IBE6  ,Pin 6 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 5. "      IBE5  ,Pin 5 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 4. "      IBE4  ,Pin 4 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 3. "      IBE3  ,Pin 3 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 2. "      IBE2  ,Pin 2 GPIO port's input enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "GPIO 4"
base ad:0x02330000
width 13.
group.long 0x00++0x1B
line.long 0x00 "GPIO4_GPDIR,GPIO Direction Register"
bitfld.long 0x00 27. " DR27  ,Pin 27 direction select" "Input,Output"
bitfld.long 0x00 26. "        DR26  ,Pin 26 direction select" "Input,Output"
bitfld.long 0x00 25. "        DR25  ,Pin 25 direction select" "Input,Output"
bitfld.long 0x00 24. "        DR24  ,Pin 24 direction select" "Input,Output"
bitfld.long 0x00 23. "        DR23  ,Pin 23 direction select" "Input,Output"
bitfld.long 0x00 22. "        DR22  ,Pin 22 direction select" "Input,Output"
newline
bitfld.long 0x00 21. " DR21  ,Pin 21 direction select" "Input,Output"
bitfld.long 0x00 20. "        DR20  ,Pin 20 direction select" "Input,Output"
bitfld.long 0x00 19. "        DR19  ,Pin 19 direction select" "Input,Output"
bitfld.long 0x00 18. "        DR18  ,Pin 18 direction select" "Input,Output"
bitfld.long 0x00 17. "        DR17  ,Pin 17 direction select" "Input,Output"
bitfld.long 0x00 16. "        DR16  ,Pin 16 direction select" "Input,Output"
newline
bitfld.long 0x00 10. " DR10  ,Pin 10 direction select" "Input,Output"
bitfld.long 0x00 9. "        DR9   ,Pin 9 direction select" "Input,Output"
bitfld.long 0x00 8. "        DR8   ,Pin 8 direction select" "Input,Output"
bitfld.long 0x00 7. "        DR7   ,Pin 7 direction select" "Input,Output"
bitfld.long 0x00 6. "        DR6   ,Pin 6 direction select" "Input,Output"
bitfld.long 0x00 5. "        DR5   ,Pin 5 direction select" "Input,Output"
newline
bitfld.long 0x00 4. " DR4   ,Pin 4 direction select" "Input,Output"
bitfld.long 0x00 3. "        DR3   ,Pin 3 direction select" "Input,Output"
bitfld.long 0x00 2. "        DR2   ,Pin 2 direction select" "Input,Output"
bitfld.long 0x00 1. "        DR1   ,Pin 1 direction select" "Input,Output"
bitfld.long 0x00 0. "        DR0   ,Pin 0 direction select" "Input,Output"
line.long 0x04 "GPIO4_GPODR,GPIO Open Drain Register"
bitfld.long 0x04 27. " OD27  ,Open drain configuration for pin 27" "Push-pull,Open-drain"
bitfld.long 0x04 26. "    OD26  ,Open drain configuration for pin 26" "Push-pull,Open-drain"
bitfld.long 0x04 25. "    OD25  ,Open drain configuration for pin 25" "Push-pull,Open-drain"
bitfld.long 0x04 24. "    OD24  ,Open drain configuration for pin 24" "Push-pull,Open-drain"
bitfld.long 0x04 23. "    OD23  ,Open drain configuration for pin 23" "Push-pull,Open-drain"
bitfld.long 0x04 22. "    OD22  ,Open drain configuration for pin 22" "Push-pull,Open-drain"
newline
bitfld.long 0x04 21. " OD21  ,Open drain configuration for pin 21" "Push-pull,Open-drain"
bitfld.long 0x04 20. "    OD20  ,Open drain configuration for pin 20" "Push-pull,Open-drain"
bitfld.long 0x04 19. "    OD19  ,Open drain configuration for pin 19" "Push-pull,Open-drain"
bitfld.long 0x04 18. "    OD18  ,Open drain configuration for pin 18" "Push-pull,Open-drain"
bitfld.long 0x04 17. "    OD17  ,Open drain configuration for pin 17" "Push-pull,Open-drain"
bitfld.long 0x04 16. "    OD16  ,Open drain configuration for pin 16" "Push-pull,Open-drain"
newline
bitfld.long 0x04 10. " OD10  ,Open drain configuration for pin 10" "Push-pull,Open-drain"
bitfld.long 0x04 9. "    OD9   ,Open drain configuration for pin 9" "Push-pull,Open-drain"
bitfld.long 0x04 8. "    OD8   ,Open drain configuration for pin 8" "Push-pull,Open-drain"
bitfld.long 0x04 7. "    OD7   ,Open drain configuration for pin 7" "Push-pull,Open-drain"
bitfld.long 0x04 6. "    OD6   ,Open drain configuration for pin 6" "Push-pull,Open-drain"
bitfld.long 0x04 5. "    OD5   ,Open drain configuration for pin 5" "Push-pull,Open-drain"
newline
bitfld.long 0x04 4. " OD4   ,Open drain configuration for pin 4" "Push-pull,Open-drain"
bitfld.long 0x04 3. "    OD3   ,Open drain configuration for pin 3" "Push-pull,Open-drain"
bitfld.long 0x04 2. "    OD2   ,Open drain configuration for pin 2" "Push-pull,Open-drain"
bitfld.long 0x04 1. "    OD1   ,Open drain configuration for pin 1" "Push-pull,Open-drain"
bitfld.long 0x04 0. "    OD0   ,Open drain configuration for pin 0" "Push-pull,Open-drain"
line.long 0x08 "GPIO4_GPDAT,GPIO Data Register"
bitfld.long 0x08 27. " D27   ,Pin 27 data" "0,1"
bitfld.long 0x08 26. "             D26   ,Pin 26 data" "0,1"
bitfld.long 0x08 25. "             D25   ,Pin 25 data" "0,1"
bitfld.long 0x08 24. "             D24   ,Pin 24 data" "0,1"
bitfld.long 0x08 23. "             D23   ,Pin 23 data" "0,1"
bitfld.long 0x08 22. "             D22   ,Pin 22 data" "0,1"
newline
bitfld.long 0x08 21. " D21   ,Pin 21 data" "0,1"
bitfld.long 0x08 20. "             D20   ,Pin 20 data" "0,1"
bitfld.long 0x08 19. "             D19   ,Pin 19 data" "0,1"
bitfld.long 0x08 18. "             D18   ,Pin 18 data" "0,1"
bitfld.long 0x08 17. "             D17   ,Pin 17 data" "0,1"
bitfld.long 0x08 16. "             D16   ,Pin 16 data" "0,1"
newline
bitfld.long 0x08 10. " D10   ,Pin 10 data" "0,1"
bitfld.long 0x08 9. "             D9    ,Pin 9 data" "0,1"
bitfld.long 0x08 8. "             D8    ,Pin 8 data" "0,1"
bitfld.long 0x08 7. "             D7    ,Pin 7 data" "0,1"
bitfld.long 0x08 6. "             D6    ,Pin 6 data" "0,1"
bitfld.long 0x08 5. "             D5    ,Pin 5 data" "0,1"
newline
bitfld.long 0x08 4. " D4    ,Pin 4 data" "0,1"
bitfld.long 0x08 3. "             D3    ,Pin 3 data" "0,1"
bitfld.long 0x08 2. "             D2    ,Pin 2 data" "0,1"
bitfld.long 0x08 1. "             D1    ,Pin 1 data" "0,1"
bitfld.long 0x08 0. "             D0    ,Pin 0 data" "0,1"
line.long 0x0C "GPIO4_GPIER,GPIO Interrupt Event Register"
eventfld.long 0x0C 27. " EV27  ,Pin 27 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 26. "  EV26  ,Pin 26 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 25. "  EV25  ,Pin 25 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 24. "  EV24  ,Pin 24 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 23. "  EV23  ,Pin 23 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 22. "  EV22  ,Pin 22 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 21. " EV21  ,Pin 21 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 20. "  EV20  ,Pin 20 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 19. "  EV19  ,Pin 19 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 18. "  EV18  ,Pin 18 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 17. "  EV17  ,Pin 17 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 16. "  EV16  ,Pin 16 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 10. " EV10  ,Pin 10 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 9. "  EV9   ,Pin 9 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 8. "  EV8   ,Pin 8 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 7. "  EV7   ,Pin 7 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 6. "  EV6   ,Pin 6 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 5. "  EV5   ,Pin 5 interrupt event status" "No interrupt,Interrupt"
newline
eventfld.long 0x0C 4. " EV4   ,Pin 4 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 3. "  EV3   ,Pin 3 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 2. "  EV2   ,Pin 2 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 1. "  EV1   ,Pin 1 interrupt event status" "No interrupt,Interrupt"
eventfld.long 0x0C 0. "  EV0   ,Pin 0 interrupt event status" "No interrupt,Interrupt"
line.long 0x10 "GPIO4_GPIMR,GPIO Interrupt Mask Register"
bitfld.long 0x10 27. " IM27  ,Pin 27 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 26. "    IM26  ,Pin 26 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 25. "    IM25  ,Pin 25 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 24. "    IM24  ,Pin 24 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 23. "    IM23  ,Pin 23 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 22. "    IM22  ,Pin 22 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 21. " IM21  ,Pin 21 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 20. "    IM20  ,Pin 20 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 19. "    IM19  ,Pin 19 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 18. "    IM18  ,Pin 18 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 17. "    IM17  ,Pin 17 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 16. "    IM16  ,Pin 16 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 10. " IM10  ,Pin 10 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 9. "    IM9   ,Pin 9 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 8. "    IM8   ,Pin 8 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 7. "    IM7   ,Pin 7 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 6. "    IM6   ,Pin 6 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 5. "    IM5   ,Pin 5 interrupt mask" "Masked,Not masked"
newline
bitfld.long 0x10 4. " IM4   ,Pin 4 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 3. "    IM3   ,Pin 3 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 2. "    IM2   ,Pin 2 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 1. "    IM1   ,Pin 1 interrupt mask" "Masked,Not masked"
bitfld.long 0x10 0. "    IM0   ,Pin 0 interrupt mask" "Masked,Not masked"
line.long 0x14 "GPIO4_GPICR,GPIO Interrupt Control Register"
bitfld.long 0x14 27. " ED27  ,Pin 27 edge detection select" "Any change,Falling"
bitfld.long 0x14 26. "    ED26  ,Pin 26 edge detection select" "Any change,Falling"
bitfld.long 0x14 25. "    ED25  ,Pin 25 edge detection select" "Any change,Falling"
bitfld.long 0x14 24. "    ED24  ,Pin 24 edge detection select" "Any change,Falling"
bitfld.long 0x14 23. "    ED23  ,Pin 23 edge detection select" "Any change,Falling"
bitfld.long 0x14 22. "    ED22  ,Pin 22 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 21. " ED21  ,Pin 21 edge detection select" "Any change,Falling"
bitfld.long 0x14 20. "    ED20  ,Pin 20 edge detection select" "Any change,Falling"
bitfld.long 0x14 19. "    ED19  ,Pin 19 edge detection select" "Any change,Falling"
bitfld.long 0x14 18. "    ED18  ,Pin 18 edge detection select" "Any change,Falling"
bitfld.long 0x14 17. "    ED17  ,Pin 17 edge detection select" "Any change,Falling"
bitfld.long 0x14 16. "    ED16  ,Pin 16 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 10. " ED10  ,Pin 10 edge detection select" "Any change,Falling"
bitfld.long 0x14 9. "    ED9   ,Pin 9 edge detection select" "Any change,Falling"
bitfld.long 0x14 8. "    ED8   ,Pin 8 edge detection select" "Any change,Falling"
bitfld.long 0x14 7. "    ED7   ,Pin 7 edge detection select" "Any change,Falling"
bitfld.long 0x14 6. "    ED6   ,Pin 6 edge detection select" "Any change,Falling"
bitfld.long 0x14 5. "    ED5   ,Pin 5 edge detection select" "Any change,Falling"
newline
bitfld.long 0x14 4. " ED4   ,Pin 4 edge detection select" "Any change,Falling"
bitfld.long 0x14 3. "    ED3   ,Pin 3 edge detection select" "Any change,Falling"
bitfld.long 0x14 2. "    ED2   ,Pin 2 edge detection select" "Any change,Falling"
bitfld.long 0x14 1. "    ED1   ,Pin 1 edge detection select" "Any change,Falling"
bitfld.long 0x14 0. "    ED0   ,Pin 0 edge detection select" "Any change,Falling"
line.long 0x18 "GPIO4_GPIBE,GPIO Input Buffer Enable Register"
bitfld.long 0x18 27. " IBE27 ,Pin 27 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 26. "      IBE26 ,Pin 26 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 25. "      IBE25 ,Pin 25 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 24. "      IBE24 ,Pin 24 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 23. "      IBE23 ,Pin 23 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 22. "      IBE22 ,Pin 22 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 21. " IBE21 ,Pin 21 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 20. "      IBE20 ,Pin 20 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 19. "      IBE19 ,Pin 19 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 18. "      IBE18 ,Pin 18 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 17. "      IBE17 ,Pin 17 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 16. "      IBE16 ,Pin 16 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 10. " IBE10 ,Pin 10 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 9. "      IBE9  ,Pin 9 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 8. "      IBE8  ,Pin 8 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 7. "      IBE7  ,Pin 7 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 6. "      IBE6  ,Pin 6 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 5. "      IBE5  ,Pin 5 GPIO port's input enable" "Disabled,Enabled"
newline
bitfld.long 0x18 4. " IBE4  ,Pin 4 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 3. "      IBE3  ,Pin 3 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 2. "      IBE2  ,Pin 2 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 1. "      IBE1  ,Pin 1 GPIO port's input enable" "Disabled,Enabled"
bitfld.long 0x18 0. "      IBE0  ,Pin 0 GPIO port's input enable" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree "IFC (Integrated Flash Controller)"
base ad:0x02240000
endian.be
width 12.
rgroup.long 0x00++0x03
line.long 0x00 "REV,IFC Revision Control Register"
hexmask.long.byte 0x00 24.--27. 1. " REV_MAJ             ,Major revision"
hexmask.long.byte 0x00 16.--19. 1. "                        REV_MIN       ,Minor revision"
group.long (0x0C+0x0)++0x03
line.long 0x00 "CSPR0_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x0))&0x06)==(0x00||0x02))
group.long (0x10+0x0)++0x03
line.long 0x00 "CSPR0,Chip-Select Property Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_0 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_0 are valid" "Invalid,Valid"
else
group.long (0x10+0x0)++0x03
line.long 0x00 "CSPR0,Chip-Select Property Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_0 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_0 are valid" "Invalid,Valid"
endif
group.long (0x0C+0xC)++0x03
line.long 0x00 "CSPR1_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0xC))&0x06)==(0x00||0x02))
group.long (0x10+0xC)++0x03
line.long 0x00 "CSPR1,Chip-Select Property Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_1 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_1 are valid" "Invalid,Valid"
else
group.long (0x10+0xC)++0x03
line.long 0x00 "CSPR1,Chip-Select Property Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_1 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_1 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x18)++0x03
line.long 0x00 "CSPR2_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x18))&0x06)==(0x00||0x02))
group.long (0x10+0x18)++0x03
line.long 0x00 "CSPR2,Chip-Select Property Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_2 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_2 are valid" "Invalid,Valid"
else
group.long (0x10+0x18)++0x03
line.long 0x00 "CSPR2,Chip-Select Property Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_2 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_2 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x24)++0x03
line.long 0x00 "CSPR3_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x24))&0x06)==(0x00||0x02))
group.long (0x10+0x24)++0x03
line.long 0x00 "CSPR3,Chip-Select Property Register 3"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_3 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_3 are valid" "Invalid,Valid"
else
group.long (0x10+0x24)++0x03
line.long 0x00 "CSPR3,Chip-Select Property Register 3"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_3 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_3 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x30)++0x03
line.long 0x00 "CSPR4_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x30))&0x06)==(0x00||0x02))
group.long (0x10+0x30)++0x03
line.long 0x00 "CSPR4,Chip-Select Property Register 4"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_4 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_4 are valid" "Invalid,Valid"
else
group.long (0x10+0x30)++0x03
line.long 0x00 "CSPR4,Chip-Select Property Register 4"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_4 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_4 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x3C)++0x03
line.long 0x00 "CSPR5_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x3C))&0x06)==(0x00||0x02))
group.long (0x10+0x3C)++0x03
line.long 0x00 "CSPR5,Chip-Select Property Register 5"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_5 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_5 are valid" "Invalid,Valid"
else
group.long (0x10+0x3C)++0x03
line.long 0x00 "CSPR5,Chip-Select Property Register 5"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_5 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_5 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x48)++0x03
line.long 0x00 "CSPR6_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x48))&0x06)==(0x00||0x02))
group.long (0x10+0x48)++0x03
line.long 0x00 "CSPR6,Chip-Select Property Register 6"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_6 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_6 are valid" "Invalid,Valid"
else
group.long (0x10+0x48)++0x03
line.long 0x00 "CSPR6,Chip-Select Property Register 6"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_6 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_6 are valid" "Invalid,Valid"
endif
group.long (0x0C+0x54)++0x03
line.long 0x00 "CSPR7_EXT,Extended Chip Select Property Register"
hexmask.long.byte 0x00 0.--7. 0x01 " BA_EXT              ,Extended base address"
if (((per.l.be(ad:0x02240000+0x10+0x54))&0x06)==(0x00||0x02))
group.long (0x10+0x54)++0x03
line.long 0x00 "CSPR7,Chip-Select Property Register 7"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
bitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_7 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_7 are valid" "Invalid,Valid"
else
group.long (0x10+0x54)++0x03
line.long 0x00 "CSPR7,Chip-Select Property Register 7"
hexmask.long.word 0x00 16.--31. 0x01 " BA                  ,Base address"
bitfld.long 0x00 7.--8. "                      PS            ,Specifies the port size of this memory region" ",8 bit,16 bit,?..."
rbitfld.long 0x00 6. "             WP             ,Write protect" "Read/Write,Read only"
bitfld.long 0x00 4. "  TE           ,Specifies value that will be driven on TE pin when CS_7 is selected" "Logic 0,Logic 1"
newline
bitfld.long 0x00 1.--2. " MSEL                ,Machine select" "NOR flash,NAND flash,GPCM,?..."
bitfld.long 0x00 0. "                V             ,Indicates that the contents of CSPR_7 are valid" "Invalid,Valid"
endif
group.long (0xA0+0x0)++0x03
line.long 0x00 "AMASK0,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0xC)++0x03
line.long 0x00 "AMASK1,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x18)++0x03
line.long 0x00 "AMASK2,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x24)++0x03
line.long 0x00 "AMASK3,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x30)++0x03
line.long 0x00 "AMASK4,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x3C)++0x03
line.long 0x00 "AMASK5,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x48)++0x03
line.long 0x00 "AMASK6,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
group.long (0xA0+0x54)++0x03
line.long 0x00 "AMASK7,Address Mask Register"
bitfld.long 0x00 31. " AM                  ,16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 30. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 29. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 28. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 27. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 26. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 25. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 24. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 23. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 22. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 21. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 20. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 19. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 18. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 17. ",16-bit address mask corresponding to memory bank" "0,1"
bitfld.long 0x00 16. ",16-bit address mask corresponding to memory bank" "0,1"
if (((per.l.be(ad:0x02240000+0x10))&0x06)==0x02)
group.long (0x130+0x0)++0x03
line.long 0x00 "CSOR0_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x0))&0xE060)==0xC000)
group.long (0x134+0x0)++0x03
line.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS0                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x0))&0xE060)==0xC020)
group.long (0x134+0x0)++0x03
line.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS0               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x0)++0x03
hide.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x10))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x0))&0x100)==0x100)
group.long (0x130+0x0)++0x03
line.long 0x00 "CSOR0_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x0)++0x03
line.long 0x00 "CSOR0_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x0)++0x03
hide.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x10))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x0))&0x80000000)==0x00)
group.long (0x130+0x0)++0x03
line.long 0x00 "CSOR0_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x0)++0x03
line.long 0x00 "CSOR0_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x0)++0x03
hide.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x0)++0x03
hide.long 0x00 "CSOR0_X,Chip-Select Option Register"
hgroup.long (0x134+0x0)++0x03
hide.long 0x00 "CSOR0_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x02)
group.long (0x130+0xC)++0x03
line.long 0x00 "CSOR1_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0xC))&0xE060)==0xC000)
group.long (0x134+0xC)++0x03
line.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS1                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0xC))&0xE060)==0xC020)
group.long (0x134+0xC)++0x03
line.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS1               ,Number of bytes in spare region"
else
hgroup.long (0x134+0xC)++0x03
hide.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0xC))&0x100)==0x100)
group.long (0x130+0xC)++0x03
line.long 0x00 "CSOR1_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0xC)++0x03
line.long 0x00 "CSOR1_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0xC)++0x03
hide.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0xC))&0x80000000)==0x00)
group.long (0x130+0xC)++0x03
line.long 0x00 "CSOR1_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0xC)++0x03
line.long 0x00 "CSOR1_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0xC)++0x03
hide.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0xC)++0x03
hide.long 0x00 "CSOR1_X,Chip-Select Option Register"
hgroup.long (0x134+0xC)++0x03
hide.long 0x00 "CSOR1_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x28))&0x06)==0x02)
group.long (0x130+0x18)++0x03
line.long 0x00 "CSOR2_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x18))&0xE060)==0xC000)
group.long (0x134+0x18)++0x03
line.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS2                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x18))&0xE060)==0xC020)
group.long (0x134+0x18)++0x03
line.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS2               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x18)++0x03
hide.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x28))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x18))&0x100)==0x100)
group.long (0x130+0x18)++0x03
line.long 0x00 "CSOR2_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x18)++0x03
line.long 0x00 "CSOR2_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x18)++0x03
hide.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x28))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x18))&0x80000000)==0x00)
group.long (0x130+0x18)++0x03
line.long 0x00 "CSOR2_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x18)++0x03
line.long 0x00 "CSOR2_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x18)++0x03
hide.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x18)++0x03
hide.long 0x00 "CSOR2_X,Chip-Select Option Register"
hgroup.long (0x134+0x18)++0x03
hide.long 0x00 "CSOR2_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x34))&0x06)==0x02)
group.long (0x130+0x24)++0x03
line.long 0x00 "CSOR3_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x24))&0xE060)==0xC000)
group.long (0x134+0x24)++0x03
line.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS3                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x24))&0xE060)==0xC020)
group.long (0x134+0x24)++0x03
line.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS3               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x24)++0x03
hide.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x34))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x24))&0x100)==0x100)
group.long (0x130+0x24)++0x03
line.long 0x00 "CSOR3_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x24)++0x03
line.long 0x00 "CSOR3_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x24)++0x03
hide.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x34))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x24))&0x80000000)==0x00)
group.long (0x130+0x24)++0x03
line.long 0x00 "CSOR3_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x24)++0x03
line.long 0x00 "CSOR3_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x24)++0x03
hide.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x24)++0x03
hide.long 0x00 "CSOR3_X,Chip-Select Option Register"
hgroup.long (0x134+0x24)++0x03
hide.long 0x00 "CSOR3_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x40))&0x06)==0x02)
group.long (0x130+0x30)++0x03
line.long 0x00 "CSOR4_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x30))&0xE060)==0xC000)
group.long (0x134+0x30)++0x03
line.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS4                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x30))&0xE060)==0xC020)
group.long (0x134+0x30)++0x03
line.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS4               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x30)++0x03
hide.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x40))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x30))&0x100)==0x100)
group.long (0x130+0x30)++0x03
line.long 0x00 "CSOR4_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x30)++0x03
line.long 0x00 "CSOR4_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x30)++0x03
hide.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x40))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x30))&0x80000000)==0x00)
group.long (0x130+0x30)++0x03
line.long 0x00 "CSOR4_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x30)++0x03
line.long 0x00 "CSOR4_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x30)++0x03
hide.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x30)++0x03
hide.long 0x00 "CSOR4_X,Chip-Select Option Register"
hgroup.long (0x134+0x30)++0x03
hide.long 0x00 "CSOR4_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x02)
group.long (0x130+0x3C)++0x03
line.long 0x00 "CSOR5_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x3C))&0xE060)==0xC000)
group.long (0x134+0x3C)++0x03
line.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS5                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x3C))&0xE060)==0xC020)
group.long (0x134+0x3C)++0x03
line.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS5               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x3C)++0x03
hide.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x3C))&0x100)==0x100)
group.long (0x130+0x3C)++0x03
line.long 0x00 "CSOR5_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x3C)++0x03
line.long 0x00 "CSOR5_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x3C)++0x03
hide.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x3C))&0x80000000)==0x00)
group.long (0x130+0x3C)++0x03
line.long 0x00 "CSOR5_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x3C)++0x03
line.long 0x00 "CSOR5_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x3C)++0x03
hide.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x3C)++0x03
hide.long 0x00 "CSOR5_X,Chip-Select Option Register"
hgroup.long (0x134+0x3C)++0x03
hide.long 0x00 "CSOR5_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x58))&0x06)==0x02)
group.long (0x130+0x48)++0x03
line.long 0x00 "CSOR6_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x48))&0xE060)==0xC000)
group.long (0x134+0x48)++0x03
line.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS6                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x48))&0xE060)==0xC020)
group.long (0x134+0x48)++0x03
line.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS6               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x48)++0x03
hide.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x58))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x48))&0x100)==0x100)
group.long (0x130+0x48)++0x03
line.long 0x00 "CSOR6_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x48)++0x03
line.long 0x00 "CSOR6_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x48)++0x03
hide.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x58))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x48))&0x80000000)==0x00)
group.long (0x130+0x48)++0x03
line.long 0x00 "CSOR6_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x48)++0x03
line.long 0x00 "CSOR6_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x48)++0x03
hide.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x48)++0x03
hide.long 0x00 "CSOR6_X,Chip-Select Option Register"
hgroup.long (0x134+0x48)++0x03
hide.long 0x00 "CSOR6_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
if (((per.l.be(ad:0x02240000+0x64))&0x06)==0x02)
group.long (0x130+0x54)++0x03
line.long 0x00 "CSOR7_NAND,Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 31. " ECC_ENC_EN          ,ECC encoder enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 28.--29. "                  ECC_MODE      ,ECC mode of operation" "4 bit,8 bit,24 bit,40 bit"
bitfld.long 0x00 26. "             ECC_DEC_EN     ,ECC decoding enable/disable bit" "Disabled,Enabled"
bitfld.long 0x00 23.--24. "    RAL          ,Row address length" "1 byte,2 bytes,3 bytes,4 bytes"
newline
bitfld.long 0x00 19.--21. " PGS                 ,Page size" "512 bytes,2 KB,4 KB,8 KB,16 KB,?..."
bitfld.long 0x00 13.--15. "                 SPRZ          ,Spare size" "16 bytes,64 bytes,128 bytes,210 bytes,218 bytes,224 bytes,CSORn_EXT,?..."
bitfld.long 0x00 8.--10. "          PB             ,Pages per block" "32 pages,64 pages,128 pages,256 pages,512 pages,?..."
bitfld.long 0x00 5.--6. "   NAND_MODE    ,NAND mode of operation" "Async,NVDDR,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP clk,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
if (((per.l.be(ad:0x02240000+0x130+0x54))&0xE060)==0xC000)
group.long (0x134+0x54)++0x03
line.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
hexmask.long.word 0x00 0.--10. 1. " SPARE_BYTES_CS7                    ,Number of bytes in spare region"
elif (((per.l.be(ad:0x02240000+0x130+0x54))&0xE060)==0xC020)
group.long (0x134+0x54)++0x03
line.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
bitfld.long 0x00 20. " AUTO_TIM_PARAMS_SEL ,Used to select the automatically calculated timing parameters instead of the user programmed timing parameters" "User programmed,Automatically calculated"
bitfld.long 0x00 16.--18. "  MODE_FREQ     ,Indicates the timing mode with which the source synchronous device is programmed" "20 MHz,33 MHz,50 MHz,66 MHz,83 MHz,100 MHz,?..."
hexmask.long.word 0x00 0.--10. 1. "            SPARE_BYTES_CS7               ,Number of bytes in spare region"
else
hgroup.long (0x134+0x54)++0x03
hide.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x64))&0x06)==0x00)
if (((per.l.be(ad:0x02240000+0x130+0x54))&0x100)==0x100)
group.long (0x130+0x54)++0x03
line.long 0x00 "CSOR7_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-LSB ADDR-MSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 9.--11. "               WORD_LINE_LEN ,Synchronous NOR word line length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 8. "     SYNC_RD_EN     ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "    NOR_MODE     ,Type of the NOR device" "Unmuxed,Muxed,?..."
newline
bitfld.long 0x00 2.--4. " TRHZ                ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
bitfld.long 0x00 0. "                BCTLD         ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x54)++0x03
line.long 0x00 "CSOR7_NOR,Chip-Select Option Register - NOR Flash Mode"
bitfld.long 0x00 31. " ADM_SHFT_MODE       ,Address shift mode" "AD-MSB ADDR-LSB,AD-MSB ADDR-LSB"
bitfld.long 0x00 28. "           PGRD_EN       ,Page read enable from NOR device" "Per-beat accesses,Single-page read"
bitfld.long 0x00 24. "  AVD_TGL_PGM_EN ,AVD toggle enable during burst program" "Disabled,Enabled"
bitfld.long 0x00 23. "    SYNC_RD_TYPE ,Synchronous NOR b read enable" "Disabled,Enabled"
newline
bitfld.long 0x00 13.--17. " ADM_SHFT            ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 8. "               SYNC_RD_EN    ,Synchronous NOR burst read enable" "Disabled,Enabled"
bitfld.long 0x00 5.--6. "           NOR_MODE       ,Type of the NOR device" "Unmuxed,Muxed,?..."
bitfld.long 0x00 2.--4. "     TRHZ         ,Time for read enable high to output high impedance" "20 IP clk,40 IP clk,60 IP cls,80 IP clk,100 IP clk,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x54)++0x03
hide.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
elif (((per.l.be(ad:0x02240000+0x64))&0x06)==0x04)
if (((per.l.be(ad:0x02240000+0x130+0x54))&0x80000000)==0x00)
group.long (0x130+0x54)++0x03
line.long 0x00 "CSOR7_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 19. "                  RGETA         ,GPCM external access termination mode for read access" "Abort mode,ACK mode"
bitfld.long 0x00 18. "         WGETA          ,GPCM external access termination mode for write access" "Abort mode,ACK mode"
bitfld.long 0x00 13.--17. "  ADM_SHFT     ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
newline
bitfld.long 0x00 9.--11. " BURST_LEN           ,GPCM burst length" "Non-burst mode,2,4,8,16,32,64,128"
bitfld.long 0x00 7.--8. "            GAPERRD       ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "          TRHZ           ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
bitfld.long 0x00 0. "     BCTLD        ,Buffer control disable" "No,Yes"
else
group.long (0x130+0x54)++0x03
line.long 0x00 "CSOR7_GPCM,Chip-Select Option Register - GPCM"
bitfld.long 0x00 31. " GPMODE              ,GPCM mode of operation" "Normal GPCM,Generic ASIC"
bitfld.long 0x00 30. "              PAR           ,Parity mode" "Odd,Even"
bitfld.long 0x00 29. "               PAR_EN         ,Parity checking enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "    GPTO         ,GPCM timeout count" "256 cycles,512 cycles,1K cycles,K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
newline
bitfld.long 0x00 20. " ABRT_RSP_EN         ,Abort error response enable" "Disabled,Enabled"
bitfld.long 0x00 13.--17. "                  ADM_SHFT      ,Address data multiplexing shift" "No shift,Shift by 1,Shift by 2,Shift by 3,Shift by 4,Shift by 5,Shift by 6,Shift by 7,Shift by 8,Shift by 9,Shift by 10,Shift by 11,Shift by 12,Shift by 13,Shift by 14,Shift by 15,Shift by 16,Shift by 17,Shift by 18,Shift by 19,Shift by 20,?..."
bitfld.long 0x00 7.--8. "        GAPERRD        ,Generic ASIC parity error indication delay" "1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk"
bitfld.long 0x00 2.--4. "   TRHZ         ,Time for read enable high to output high impedance" "20 IFC,40 IFC,60 IFC,80 IFC,100 IFC,?..."
newline
bitfld.long 0x00 0. " BCTLD               ,Buffer control disable" "No,Yes"
endif
hgroup.long (0x134+0x54)++0x03
hide.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
else
hgroup.long (0x130+0x54)++0x03
hide.long 0x00 "CSOR7_X,Chip-Select Option Register"
hgroup.long (0x134+0x54)++0x03
hide.long 0x00 "CSOR7_EXT,Extended Chip-Select Option Register - NAND Flash Mode"
endif
newline
width 27.
if (((per.l.be(ad:0x02240000+0x10))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x130))&0x60)==0x00)
group.long (0x1C0+0x0)++0x03
line.long 0x00 "FTIM0_CS0_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 0 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 0 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x0)++0x03
line.long 0x00 "FTIM2_CS0_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 0 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x0)++0x03
line.long 0x00 "FTIM3_CS0_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 0 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x10))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x130))&0x60)==0x20)
group.long (0x1C0+0x0)++0x03
line.long 0x00 "FTIM0_CS0_NAND,Flash Timing Register 0 For Chip Select 0 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NAND,Flash Timing Register 1 For Chip-Select 0 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x0)++0x03
line.long 0x00 "FTIM2_CS0_NAND,Flash Timing Register 2 For Chip Select 0 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x0)++0x03
line.long 0x00 "FTIM3_CS0_NAND,Flash Timing Register 3 For Chip Select 0 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x10))&0x06)==0x00)
group.long (0x1C0+0x0)++0x03
line.long 0x00 "FTIM0_CS0_NOR,Flash Timing Register 0 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x130))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x130))&0x100)==0x00)
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NOR,Flash Timing Register 1 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x130))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x130))&0x100)==0x100)
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NOR,Flash Timing Register 1 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x130))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x130))&0x100)==0x00)
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NOR,Flash Timing Register 1 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x130))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x130))&0x100)==0x100)
group.long (0x1C4+0x0)++0x03
line.long 0x00 "FTIM1_CS0_NOR,Flash Timing Register 1 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x0)++0x03
hide.long 0x00 "FTIM1_CS0_NOR,Flash Timing Register 1 For CS0 - NOR Flash Mode"
endif
group.long (0x1C8+0x0)++0x03
line.long 0x00 "FTIM2_CS0_NOR,Flash Timing Register 2 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x130))&0x100)==0x100)
group.long (0x1CC+0x0)++0x03
line.long 0x00 "FTIM3_CS0_NOR,Flash Timing Register 3 For CS0 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x0)++0x03
hide.long 0x00 "FTIM3_CS0_NOR,Flash Timing Register 3 For CS0 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x10))&0x06)==0x04)
group.long (0x1C0+0x0)++0x0F
line.long 0x00 "FTIM0_CS0_GPCM,Flash Timing Register 0 For CS0 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS0_GPCM,Flash Timing Register 1 For CS0 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS0_GPCM,Flash Timing Register 2 For CS0 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS0_GPCM,Flash Timing Register 3 For CS0 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x0)++0x03
hide.long 0x00 "FTIM0_CS0,Flash Timing Register 0 For CS0"
hgroup.long (0x1C4+0x0)++0x03
hide.long 0x00 "FTIM1_CS0,Flash Timing Register 1 For CS0"
hgroup.long (0x1C8+0x0)++0x03
hide.long 0x00 "FTIM2_CS0,Flash Timing Register 2 For CS0"
hgroup.long (0x1CC+0x0)++0x03
hide.long 0x00 "FTIM3_CS0,Flash Timing Register 3 For CS0"
endif
if (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x13C))&0x60)==0x00)
group.long (0x1C0+0x30)++0x03
line.long 0x00 "FTIM0_CS1_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 1 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 1 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x30)++0x03
line.long 0x00 "FTIM2_CS1_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 1 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x30)++0x03
line.long 0x00 "FTIM3_CS1_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 1 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x13C))&0x60)==0x20)
group.long (0x1C0+0x30)++0x03
line.long 0x00 "FTIM0_CS1_NAND,Flash Timing Register 0 For Chip Select 1 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NAND,Flash Timing Register 1 For Chip-Select 1 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x30)++0x03
line.long 0x00 "FTIM2_CS1_NAND,Flash Timing Register 2 For Chip Select 1 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x30)++0x03
line.long 0x00 "FTIM3_CS1_NAND,Flash Timing Register 3 For Chip Select 1 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x00)
group.long (0x1C0+0x30)++0x03
line.long 0x00 "FTIM0_CS1_NOR,Flash Timing Register 0 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x13C))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x13C))&0x100)==0x00)
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NOR,Flash Timing Register 1 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x13C))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x13C))&0x100)==0x100)
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NOR,Flash Timing Register 1 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x13C))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x13C))&0x100)==0x00)
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NOR,Flash Timing Register 1 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x13C))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x13C))&0x100)==0x100)
group.long (0x1C4+0x30)++0x03
line.long 0x00 "FTIM1_CS1_NOR,Flash Timing Register 1 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x30)++0x03
hide.long 0x00 "FTIM1_CS1_NOR,Flash Timing Register 1 For CS1 - NOR Flash Mode"
endif
group.long (0x1C8+0x30)++0x03
line.long 0x00 "FTIM2_CS1_NOR,Flash Timing Register 2 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x13C))&0x100)==0x100)
group.long (0x1CC+0x30)++0x03
line.long 0x00 "FTIM3_CS1_NOR,Flash Timing Register 3 For CS1 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x30)++0x03
hide.long 0x00 "FTIM3_CS1_NOR,Flash Timing Register 3 For CS1 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x1C))&0x06)==0x04)
group.long (0x1C0+0x30)++0x0F
line.long 0x00 "FTIM0_CS1_GPCM,Flash Timing Register 0 For CS1 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS1_GPCM,Flash Timing Register 1 For CS1 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS1_GPCM,Flash Timing Register 2 For CS1 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS1_GPCM,Flash Timing Register 3 For CS1 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x30)++0x03
hide.long 0x00 "FTIM0_CS1,Flash Timing Register 0 For CS1"
hgroup.long (0x1C4+0x30)++0x03
hide.long 0x00 "FTIM1_CS1,Flash Timing Register 1 For CS1"
hgroup.long (0x1C8+0x30)++0x03
hide.long 0x00 "FTIM2_CS1,Flash Timing Register 2 For CS1"
hgroup.long (0x1CC+0x30)++0x03
hide.long 0x00 "FTIM3_CS1,Flash Timing Register 3 For CS1"
endif
if (((per.l.be(ad:0x02240000+0x28))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x148))&0x60)==0x00)
group.long (0x1C0+0x60)++0x03
line.long 0x00 "FTIM0_CS2_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 2 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 2 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x60)++0x03
line.long 0x00 "FTIM2_CS2_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 2 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x60)++0x03
line.long 0x00 "FTIM3_CS2_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 2 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x28))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x148))&0x60)==0x20)
group.long (0x1C0+0x60)++0x03
line.long 0x00 "FTIM0_CS2_NAND,Flash Timing Register 0 For Chip Select 2 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NAND,Flash Timing Register 1 For Chip-Select 2 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x60)++0x03
line.long 0x00 "FTIM2_CS2_NAND,Flash Timing Register 2 For Chip Select 2 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x60)++0x03
line.long 0x00 "FTIM3_CS2_NAND,Flash Timing Register 3 For Chip Select 2 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x28))&0x06)==0x00)
group.long (0x1C0+0x60)++0x03
line.long 0x00 "FTIM0_CS2_NOR,Flash Timing Register 0 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x148))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x148))&0x100)==0x00)
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NOR,Flash Timing Register 1 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x148))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x148))&0x100)==0x100)
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NOR,Flash Timing Register 1 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x148))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x148))&0x100)==0x00)
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NOR,Flash Timing Register 1 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x148))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x148))&0x100)==0x100)
group.long (0x1C4+0x60)++0x03
line.long 0x00 "FTIM1_CS2_NOR,Flash Timing Register 1 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x60)++0x03
hide.long 0x00 "FTIM1_CS2_NOR,Flash Timing Register 1 For CS2 - NOR Flash Mode"
endif
group.long (0x1C8+0x60)++0x03
line.long 0x00 "FTIM2_CS2_NOR,Flash Timing Register 2 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x148))&0x100)==0x100)
group.long (0x1CC+0x60)++0x03
line.long 0x00 "FTIM3_CS2_NOR,Flash Timing Register 3 For CS2 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x60)++0x03
hide.long 0x00 "FTIM3_CS2_NOR,Flash Timing Register 3 For CS2 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x28))&0x06)==0x04)
group.long (0x1C0+0x60)++0x0F
line.long 0x00 "FTIM0_CS2_GPCM,Flash Timing Register 0 For CS2 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS2_GPCM,Flash Timing Register 1 For CS2 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS2_GPCM,Flash Timing Register 2 For CS2 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS2_GPCM,Flash Timing Register 3 For CS2 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x60)++0x03
hide.long 0x00 "FTIM0_CS2,Flash Timing Register 0 For CS2"
hgroup.long (0x1C4+0x60)++0x03
hide.long 0x00 "FTIM1_CS2,Flash Timing Register 1 For CS2"
hgroup.long (0x1C8+0x60)++0x03
hide.long 0x00 "FTIM2_CS2,Flash Timing Register 2 For CS2"
hgroup.long (0x1CC+0x60)++0x03
hide.long 0x00 "FTIM3_CS2,Flash Timing Register 3 For CS2"
endif
if (((per.l.be(ad:0x02240000+0x34))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x154))&0x60)==0x00)
group.long (0x1C0+0x90)++0x03
line.long 0x00 "FTIM0_CS3_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 3 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 3 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x90)++0x03
line.long 0x00 "FTIM2_CS3_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 3 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x90)++0x03
line.long 0x00 "FTIM3_CS3_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 3 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x34))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x154))&0x60)==0x20)
group.long (0x1C0+0x90)++0x03
line.long 0x00 "FTIM0_CS3_NAND,Flash Timing Register 0 For Chip Select 3 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NAND,Flash Timing Register 1 For Chip-Select 3 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x90)++0x03
line.long 0x00 "FTIM2_CS3_NAND,Flash Timing Register 2 For Chip Select 3 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x90)++0x03
line.long 0x00 "FTIM3_CS3_NAND,Flash Timing Register 3 For Chip Select 3 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x34))&0x06)==0x00)
group.long (0x1C0+0x90)++0x03
line.long 0x00 "FTIM0_CS3_NOR,Flash Timing Register 0 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x154))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x154))&0x100)==0x00)
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NOR,Flash Timing Register 1 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x154))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x154))&0x100)==0x100)
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NOR,Flash Timing Register 1 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x154))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x154))&0x100)==0x00)
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NOR,Flash Timing Register 1 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x154))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x154))&0x100)==0x100)
group.long (0x1C4+0x90)++0x03
line.long 0x00 "FTIM1_CS3_NOR,Flash Timing Register 1 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x90)++0x03
hide.long 0x00 "FTIM1_CS3_NOR,Flash Timing Register 1 For CS3 - NOR Flash Mode"
endif
group.long (0x1C8+0x90)++0x03
line.long 0x00 "FTIM2_CS3_NOR,Flash Timing Register 2 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x154))&0x100)==0x100)
group.long (0x1CC+0x90)++0x03
line.long 0x00 "FTIM3_CS3_NOR,Flash Timing Register 3 For CS3 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x90)++0x03
hide.long 0x00 "FTIM3_CS3_NOR,Flash Timing Register 3 For CS3 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x34))&0x06)==0x04)
group.long (0x1C0+0x90)++0x0F
line.long 0x00 "FTIM0_CS3_GPCM,Flash Timing Register 0 For CS3 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS3_GPCM,Flash Timing Register 1 For CS3 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS3_GPCM,Flash Timing Register 2 For CS3 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS3_GPCM,Flash Timing Register 3 For CS3 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x90)++0x03
hide.long 0x00 "FTIM0_CS3,Flash Timing Register 0 For CS3"
hgroup.long (0x1C4+0x90)++0x03
hide.long 0x00 "FTIM1_CS3,Flash Timing Register 1 For CS3"
hgroup.long (0x1C8+0x90)++0x03
hide.long 0x00 "FTIM2_CS3,Flash Timing Register 2 For CS3"
hgroup.long (0x1CC+0x90)++0x03
hide.long 0x00 "FTIM3_CS3,Flash Timing Register 3 For CS3"
endif
if (((per.l.be(ad:0x02240000+0x40))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x160))&0x60)==0x00)
group.long (0x1C0+0xC0)++0x03
line.long 0x00 "FTIM0_CS4_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 4 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 4 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0xC0)++0x03
line.long 0x00 "FTIM2_CS4_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 4 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0xC0)++0x03
line.long 0x00 "FTIM3_CS4_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 4 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x40))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x160))&0x60)==0x20)
group.long (0x1C0+0xC0)++0x03
line.long 0x00 "FTIM0_CS4_NAND,Flash Timing Register 0 For Chip Select 4 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NAND,Flash Timing Register 1 For Chip-Select 4 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0xC0)++0x03
line.long 0x00 "FTIM2_CS4_NAND,Flash Timing Register 2 For Chip Select 4 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0xC0)++0x03
line.long 0x00 "FTIM3_CS4_NAND,Flash Timing Register 3 For Chip Select 4 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x40))&0x06)==0x00)
group.long (0x1C0+0xC0)++0x03
line.long 0x00 "FTIM0_CS4_NOR,Flash Timing Register 0 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x160))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x160))&0x100)==0x00)
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NOR,Flash Timing Register 1 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x160))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x160))&0x100)==0x100)
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NOR,Flash Timing Register 1 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x160))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x160))&0x100)==0x00)
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NOR,Flash Timing Register 1 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x160))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x160))&0x100)==0x100)
group.long (0x1C4+0xC0)++0x03
line.long 0x00 "FTIM1_CS4_NOR,Flash Timing Register 1 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0xC0)++0x03
hide.long 0x00 "FTIM1_CS4_NOR,Flash Timing Register 1 For CS4 - NOR Flash Mode"
endif
group.long (0x1C8+0xC0)++0x03
line.long 0x00 "FTIM2_CS4_NOR,Flash Timing Register 2 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x160))&0x100)==0x100)
group.long (0x1CC+0xC0)++0x03
line.long 0x00 "FTIM3_CS4_NOR,Flash Timing Register 3 For CS4 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0xC0)++0x03
hide.long 0x00 "FTIM3_CS4_NOR,Flash Timing Register 3 For CS4 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x40))&0x06)==0x04)
group.long (0x1C0+0xC0)++0x0F
line.long 0x00 "FTIM0_CS4_GPCM,Flash Timing Register 0 For CS4 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS4_GPCM,Flash Timing Register 1 For CS4 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS4_GPCM,Flash Timing Register 2 For CS4 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS4_GPCM,Flash Timing Register 3 For CS4 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0xC0)++0x03
hide.long 0x00 "FTIM0_CS4,Flash Timing Register 0 For CS4"
hgroup.long (0x1C4+0xC0)++0x03
hide.long 0x00 "FTIM1_CS4,Flash Timing Register 1 For CS4"
hgroup.long (0x1C8+0xC0)++0x03
hide.long 0x00 "FTIM2_CS4,Flash Timing Register 2 For CS4"
hgroup.long (0x1CC+0xC0)++0x03
hide.long 0x00 "FTIM3_CS4,Flash Timing Register 3 For CS4"
endif
if (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x16C))&0x60)==0x00)
group.long (0x1C0+0xF0)++0x03
line.long 0x00 "FTIM0_CS5_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 5 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 5 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0xF0)++0x03
line.long 0x00 "FTIM2_CS5_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 5 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0xF0)++0x03
line.long 0x00 "FTIM3_CS5_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 5 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x16C))&0x60)==0x20)
group.long (0x1C0+0xF0)++0x03
line.long 0x00 "FTIM0_CS5_NAND,Flash Timing Register 0 For Chip Select 5 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NAND,Flash Timing Register 1 For Chip-Select 5 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0xF0)++0x03
line.long 0x00 "FTIM2_CS5_NAND,Flash Timing Register 2 For Chip Select 5 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0xF0)++0x03
line.long 0x00 "FTIM3_CS5_NAND,Flash Timing Register 3 For Chip Select 5 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x00)
group.long (0x1C0+0xF0)++0x03
line.long 0x00 "FTIM0_CS5_NOR,Flash Timing Register 0 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x16C))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x16C))&0x100)==0x00)
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NOR,Flash Timing Register 1 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x16C))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x16C))&0x100)==0x100)
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NOR,Flash Timing Register 1 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x16C))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x16C))&0x100)==0x00)
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NOR,Flash Timing Register 1 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x16C))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x16C))&0x100)==0x100)
group.long (0x1C4+0xF0)++0x03
line.long 0x00 "FTIM1_CS5_NOR,Flash Timing Register 1 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0xF0)++0x03
hide.long 0x00 "FTIM1_CS5_NOR,Flash Timing Register 1 For CS5 - NOR Flash Mode"
endif
group.long (0x1C8+0xF0)++0x03
line.long 0x00 "FTIM2_CS5_NOR,Flash Timing Register 2 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x16C))&0x100)==0x100)
group.long (0x1CC+0xF0)++0x03
line.long 0x00 "FTIM3_CS5_NOR,Flash Timing Register 3 For CS5 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0xF0)++0x03
hide.long 0x00 "FTIM3_CS5_NOR,Flash Timing Register 3 For CS5 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x4C))&0x06)==0x04)
group.long (0x1C0+0xF0)++0x0F
line.long 0x00 "FTIM0_CS5_GPCM,Flash Timing Register 0 For CS5 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS5_GPCM,Flash Timing Register 1 For CS5 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS5_GPCM,Flash Timing Register 2 For CS5 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS5_GPCM,Flash Timing Register 3 For CS5 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0xF0)++0x03
hide.long 0x00 "FTIM0_CS5,Flash Timing Register 0 For CS5"
hgroup.long (0x1C4+0xF0)++0x03
hide.long 0x00 "FTIM1_CS5,Flash Timing Register 1 For CS5"
hgroup.long (0x1C8+0xF0)++0x03
hide.long 0x00 "FTIM2_CS5,Flash Timing Register 2 For CS5"
hgroup.long (0x1CC+0xF0)++0x03
hide.long 0x00 "FTIM3_CS5,Flash Timing Register 3 For CS5"
endif
if (((per.l.be(ad:0x02240000+0x58))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x178))&0x60)==0x00)
group.long (0x1C0+0x120)++0x03
line.long 0x00 "FTIM0_CS6_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 6 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 6 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x120)++0x03
line.long 0x00 "FTIM2_CS6_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 6 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x120)++0x03
line.long 0x00 "FTIM3_CS6_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 6 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x58))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x178))&0x60)==0x20)
group.long (0x1C0+0x120)++0x03
line.long 0x00 "FTIM0_CS6_NAND,Flash Timing Register 0 For Chip Select 6 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NAND,Flash Timing Register 1 For Chip-Select 6 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x120)++0x03
line.long 0x00 "FTIM2_CS6_NAND,Flash Timing Register 2 For Chip Select 6 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x120)++0x03
line.long 0x00 "FTIM3_CS6_NAND,Flash Timing Register 3 For Chip Select 6 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x58))&0x06)==0x00)
group.long (0x1C0+0x120)++0x03
line.long 0x00 "FTIM0_CS6_NOR,Flash Timing Register 0 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x178))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x178))&0x100)==0x00)
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NOR,Flash Timing Register 1 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x178))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x178))&0x100)==0x100)
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NOR,Flash Timing Register 1 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x178))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x178))&0x100)==0x00)
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NOR,Flash Timing Register 1 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x178))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x178))&0x100)==0x100)
group.long (0x1C4+0x120)++0x03
line.long 0x00 "FTIM1_CS6_NOR,Flash Timing Register 1 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x120)++0x03
hide.long 0x00 "FTIM1_CS6_NOR,Flash Timing Register 1 For CS6 - NOR Flash Mode"
endif
group.long (0x1C8+0x120)++0x03
line.long 0x00 "FTIM2_CS6_NOR,Flash Timing Register 2 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x178))&0x100)==0x100)
group.long (0x1CC+0x120)++0x03
line.long 0x00 "FTIM3_CS6_NOR,Flash Timing Register 3 For CS6 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x120)++0x03
hide.long 0x00 "FTIM3_CS6_NOR,Flash Timing Register 3 For CS6 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x58))&0x06)==0x04)
group.long (0x1C0+0x120)++0x0F
line.long 0x00 "FTIM0_CS6_GPCM,Flash Timing Register 0 For CS6 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS6_GPCM,Flash Timing Register 1 For CS6 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS6_GPCM,Flash Timing Register 2 For CS6 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS6_GPCM,Flash Timing Register 3 For CS6 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x120)++0x03
hide.long 0x00 "FTIM0_CS6,Flash Timing Register 0 For CS6"
hgroup.long (0x1C4+0x120)++0x03
hide.long 0x00 "FTIM1_CS6,Flash Timing Register 1 For CS6"
hgroup.long (0x1C8+0x120)++0x03
hide.long 0x00 "FTIM2_CS6,Flash Timing Register 2 For CS6"
hgroup.long (0x1CC+0x120)++0x03
hide.long 0x00 "FTIM3_CS6,Flash Timing Register 3 For CS6"
endif
if (((per.l.be(ad:0x02240000+0x64))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x184))&0x60)==0x00)
group.long (0x1C0+0x150)++0x03
line.long 0x00 "FTIM0_CS7_NAND_ASYNC_MODE,Flash Timing Register 0 For Chip Select 7 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 25.--30. 1. " TCCST    ,CLE assertion time after CS / CLE/ALE assertion time after prev. CLE/ALE"
decmask.long.byte 0x00 16.--23. 1. "  TWP         ,Write enable (WE) pulse width"
decmask.long.byte 0x00 8.--13. 1. "  TWCHT       ,WE to command hold time"
decmask.long.byte 0x00 0.--5. 1. "  TWH   ,WE high hold time"
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NAND_ASYNC_MODE,Flash Timing Register 1 For Chip Select 7 - Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWBE        ,WE high (after TWH time) to ready busy (RB_B) low time"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TRP   ,RE pulse width"
group.long (0x1C8+0x150)++0x03
line.long 0x00 "FTIM2_CS7_NAND_ASYNC_MODE,Flash Timing Register 2 For Chip Select 7 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 21.--28. 1. " TRAD     ,Flash read access delay"
decmask.long.byte 0x00 11.--16. 1. "  TREH        ,RE_B high time"
decmask.long.byte 0x00 0.--7. 1. "  TWHRE       ,WE_B high to RE_B low effective"
group.long (0x1CC+0x150)++0x03
line.long 0x00 "FTIM3_CS7_NAND_ASYNC_MODE,Flash Timing Register 3 For Chip Select 7 - NAND Flash Asynchronous Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x64))&0x06)==0x02)&&(((per.l.be(ad:0x02240000+0x184))&0x60)==0x20)
group.long (0x1C0+0x150)++0x03
line.long 0x00 "FTIM0_CS7_NAND,Flash Timing Register 0 For Chip Select 7 - NAND Flash NVDDR"
decmask.long.byte 0x00 24.--29. 1. " TCS      ,Chip Enable (CE) setup time"
decmask.long.byte 0x00 16.--21. 1. "  TCAD        ,Command address data delay"
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NAND,Flash Timing Register 1 For Chip-Select 7 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TADLE    ,Effective address to data loading time"
decmask.long.byte 0x00 16.--23. 1. "  TWB         ,Clock Rising Edge to SR[6] (R/B) low"
decmask.long.byte 0x00 8.--13. 1. "  TRR         ,Ready busy high to read enable (RE) low time"
decmask.long.byte 0x00 0.--7. 1. "  TWRCK ,W/R low to data output cycle"
group.long (0x1C8+0x150)++0x03
line.long 0x00 "FTIM2_CS7_NAND,Flash Timing Register 2 For Chip Select 7 - NAND Flash NVDDR Mode"
decmask.long.byte 0x00 24.--31. 1. " TCKWR    ,Data output end to W/R high"
decmask.long.byte 0x00 16.--23. 1. "  TWHR        ,Command, address or data input cycle to data output cycle"
decmask.long.byte 0x00 8.--15. 1. "  TRHW        ,Data output cycle to command, address or data input cycle"
group.long (0x1CC+0x150)++0x03
line.long 0x00 "FTIM3_CS7_NAND,Flash Timing Register 3 For Chip Select 7 - NAND Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TWW      ,Write protect WP_B transition time"
elif (((per.l.be(ad:0x02240000+0x64))&0x06)==0x00)
group.long (0x1C0+0x150)++0x03
line.long 0x00 "FTIM0_CS7_NOR,Flash Timing Register 0 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 8.--13. 1. "  TAVDS       ,Delay between CS assertion to AVD/ALE assertion"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC ,Latch address hold cycles"
if (((per.l.be(ad:0x02240000+0x184))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x184))&0x100)==0x00)
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NOR,Flash Timing Register 1 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x184))&0x60)==0x00)&&(((per.l.be(ad:0x02240000+0x184))&0x100)==0x100)
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NOR,Flash Timing Register 1 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x184))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x184))&0x100)==0x00)
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NOR,Flash Timing Register 1 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 8.--15. 1. " TRAD_NOR ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
elif (((per.l.be(ad:0x02240000+0x184))&0x60)==0x20)&&(((per.l.be(ad:0x02240000+0x184))&0x100)==0x100)
group.long (0x1C4+0x150)++0x03
line.long 0x00 "FTIM1_CS7_NOR,Flash Timing Register 1 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 24.--31. 1. " TACO     ,Address hold to output enable (OE) assertion setup time"
decmask.long.byte 0x00 8.--15. 1. "  TRAD_NOR    ,NOR flash read access delay"
decmask.long.byte 0x00 0.--7. 1. "  TSEQRAD_NOR ,NOR flash sequential read access delay"
else
hgroup.long (0x1C4+0x150)++0x03
hide.long 0x00 "FTIM1_CS7_NOR,Flash Timing Register 1 For CS7 - NOR Flash Mode"
endif
group.long (0x1C8+0x150)++0x03
line.long 0x00 "FTIM2_CS7_NOR,Flash Timing Register 2 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x00 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x00 10.--15. 1. "  TWPH        ,Write enable pulse high time"
decmask.long.byte 0x00 0.--7. 1. "  TWP   ,Write enable pulse width"
if (((per.l.be(ad:0x02240000+0x184))&0x100)==0x100)
group.long (0x1CC+0x150)++0x03
line.long 0x00 "FTIM3_CS7_NOR,Flash Timing Register 3 For CS7 - NOR Flash Mode"
decmask.long.byte 0x00 24.--29. " TCHVL    ,Rising edge of CLK to CS assertion time"
decmask.long.byte 0x00 16.--21. "  TAVDP       ,AVD_B assertion time (pulse width of AVD_B)"
decmask.long.byte 0x00 8.--13. "  TVHAX       ,Address hold time from AVD_B deassertion"
decmask.long.byte 0x00 0.--5. "  TIACC ,Initial data access latency"
else
hgroup.long (0x1CC+0x150)++0x03
hide.long 0x00 "FTIM3_CS7_NOR,Flash Timing Register 3 For CS7 - NOR Flash Mode"
endif
elif (((per.l.be(ad:0x02240000+0x64))&0x06)==0x04)
group.long (0x1C0+0x150)++0x0F
line.long 0x00 "FTIM0_CS7_GPCM,Flash Timing Register 0 For CS7 - Normal GPCM Mode"
decmask.long.byte 0x00 28.--31. 1. " TACSE    ,Address phase end to chip enable assertion time"
decmask.long.byte 0x00 16.--21. 1. "  TEADC       ,External latch address delay cycles"
decmask.long.byte 0x00 0.--5. 1. "  TEAHC       ,External latch address hold cycles"
line.long 0x04 "FTIM1_CS7_GPCM,Flash Timing Register 1 For CS7 - Normal GPCM Mode"
decmask.long.byte 0x04 24.--31. 1. " TACO     ,CS assertion to output enable (OE) assertion setup time"
decmask.long.byte 0x04 8.--13. 1. "  TRAD        ,GPCM read access delay"
line.long 0x08 "FTIM2_CS7_GPCM,Flash Timing Register 2 For CS7 - Normal GPCM Mode"
decmask.long.byte 0x08 24.--27. 1. " TCS      ,Chip-select assertion to WE assertion setup time"
decmask.long.byte 0x08 18.--21. 1. "  TCH         ,Chip-select hold time with respect to WE deassertion"
decmask.long.byte 0x08 0.--7. 1. "  TWP         ,Write enable pulse width"
line.long 0x0C "FTIM3_CS7_GPCM,Flash Timing Register 3 For CS7 - Normal GPCM Mode"
decmask.long.byte 0x0C 26.--31. 1. " TAAD     ,GPCM address access delay"
else
hgroup.long (0x1C0+0x150)++0x03
hide.long 0x00 "FTIM0_CS7,Flash Timing Register 0 For CS7"
hgroup.long (0x1C4+0x150)++0x03
hide.long 0x00 "FTIM1_CS7,Flash Timing Register 1 For CS7"
hgroup.long (0x1C8+0x150)++0x03
hide.long 0x00 "FTIM2_CS7,Flash Timing Register 2 For CS7"
hgroup.long (0x1CC+0x150)++0x03
hide.long 0x00 "FTIM3_CS7,Flash Timing Register 3 For CS7"
endif
newline
width 20.
rgroup.long 0x400++0x03
line.long 0x00 "RB_STAT,Ready Busy Status For Each Chip Select"
bitfld.long 0x00 31. " RB0                      ,Ready busy input from CS0" "Busy,Ready"
bitfld.long 0x00 30. "          RB1                ,Ready busy input from CS1" "Busy,Ready"
bitfld.long 0x00 29. "              RB2                ,Ready busy input from CS2" "Busy,Ready"
bitfld.long 0x00 28. "              RB3             ,Ready busy input from CS3" "Busy,Ready"
newline
bitfld.long 0x00 27. " RB4                      ,Ready busy input from CS4" "Busy,Ready"
bitfld.long 0x00 26. "          RB5                ,Ready busy input from CS5" "Busy,Ready"
bitfld.long 0x00 25. "              RB6                ,Ready busy input from CS6" "Busy,Ready"
bitfld.long 0x00 24. "              RB7             ,Ready busy input from CS7" "Busy,Ready"
group.long 0x404++0x0B
line.long 0x00 "RB_MAP,Ready Busy Map Register"
bitfld.long 0x00 28.--30. " CS0_RB                   ,Ready/Busy_B mapping to CS_0" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 24.--26. "           CS1_RB             ,Ready/Busy_B mapping to CS_1" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 20.--22. "               CS2_RB             ,Ready/Busy_B mapping to CS_2" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 16.--18. "               CS3_RB          ,Ready/Busy_B mapping to CS_3" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
newline
bitfld.long 0x00 12.--14. " CS4_RB                   ,Ready/Busy_B mapping to CS_4" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 8.--10. "           CS5_RB             ,Ready/Busy_B mapping to CS_5" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 4.--6. "               CS6_RB             ,Ready/Busy_B mapping to CS_6" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
bitfld.long 0x00 0.--2. "               CS7_RB          ,Ready/Busy_B mapping to CS_7" "RB-0,RB-1,RB-2,RB-3,RB-4,RB-5,RB-6,RB-7"
line.long 0x04 "WP_MAP,Write Protect Map Register"
rbitfld.long 0x04 28.--30. " CS0_WP                   ,Write Protect_B mapping to CS_0" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 24.--26. "           CS1_WP             ,Write Protect_B mapping to CS_1" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 20.--22. "               CS2_WP             ,Write Protect_B mapping to CS_2" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 16.--18. "               CS3_WP          ,Write Protect_B mapping to CS_3" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
newline
bitfld.long 0x04 12.--14. " CS4_WP                   ,Write Protect_B mapping to CS_4" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 8.--10. "           CS5_WP             ,Write Protect_B mapping to CS_5" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 4.--6. "               CS6_WP             ,Write Protect_B mapping to CS_6" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
bitfld.long 0x04 0.--2. "               CS7_WP          ,Write Protect_B mapping to CS_7" "WP-0,WP-1,WP-2,WP-3,WP-4,WP-5,WP-6,WP-7"
line.long 0x08 "GCR,General Control Register"
bitfld.long 0x08 31. " SOFT_RST_ALL             ,Software reset all" "No reset,Reset"
bitfld.long 0x08 11.--15. "       TBCTL_TRN_TIME     ,Turnaround time of external buffer" ",1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk,5 IFC clk,6 IFC clk,7 IFC clk,8 IFC clk,9 IFC clk,10 IFC clk,11 IFC clk,12 IFC clk,13 IFC clk,14 IFC clk,15 IFC clk,16 IFC clk,17 IFC clk,18 IFC clk,19 IFC clk,20 IFC clk,21 IFC clk,22 IFC clk,23 IFC clk,24 IFC clk,25 IFC clk,26 IFC clk,27 IFC clk,28 IFC clk,29 IFC clk,30 IFC clk,31 IFC clk"
group.long 0x418++0x03
line.long 0x00 "CM_EVTER_STAT,Common Event And Error Status Register"
eventfld.long 0x00 31. " CSER                     ,Chip-select error" "No error,Error"
group.long 0x424++0x03
line.long 0x00 "CM_EVTER_EN,Common Event And Error Enable Register"
bitfld.long 0x00 31. " CSEREN                   ,Chip-select error checking enable" "Disabled,Enabled"
group.long 0x430++0x03
line.long 0x00 "CM_EVTER_INTR_EN,Common Event And Error Interrupt Enable Register"
bitfld.long 0x00 31. " CSERIREN                 ,Chip-select error interrupt enable" "Disabled,Enabled"
rgroup.long 0x43C++0x07
line.long 0x00 "CM_ERATTR0,Common Transfer Error Attributes Register 0"
bitfld.long 0x00 31. " ERTYP                    ,Transaction type of the error" "Write,Read"
hexmask.long.byte 0x00 20.--27. 1. "          ERAID              ,ID of the error transaction"
hexmask.long.byte 0x00 8.--15. 1. "                 ERSRCID            ,Source ID of the error transaction"
line.long 0x04 "CM_ERATTR1,Common Transfer Error Attributes Register 1"
group.long 0x44C++0x03
line.long 0x00 "CCR,Clock Control Register"
bitfld.long 0x00 24.--27. " CLKDIV                   ,Clock division ratio" ",/2,,/4,,,,/8,?..."
bitfld.long 0x00 16.--19. "             CLK_DLY            ,IFC clock delay" "No delay,1 IFC clk,2 IFC clk,3 IFC clk,4 IFC clk,5 IFC clk,6 IFC clk,7 IFC clk,8 IFC clk,9 IFC clk,10 IFC clk,11 IFC clk,12 IFC clk,13 IFC clk,14 IFC clk,15 IFC clk"
bitfld.long 0x00 15. "         INV_CLK_EN         ,IFC clock inversion" "Not inverted,Inverted"
rgroup.long 0x450++0x03
line.long 0x00 "CSR,Clock Status Register"
bitfld.long 0x00 31. " CLK_STAT                 ,Clock status" "Unstable,Stable"
if (((per.l.be(ad:0x02240000+0x130))&0x60)==0x20)
group.long 0x454++0x03
line.long 0x00 "DDR_CCR,DDR Clock Control Register"
bitfld.long 0x00 29. " GLOBAL_DDR_CLK_EN        ,Switches off the IFC DDR clock" "Disabled,Enabled"
bitfld.long 0x00 28. "       PGM_DDR_CLK_STOP   ,DDR clock stop in case of program operation" "Enabled,Stopped"
bitfld.long 0x00 23.--26. "            DDR_LOW_CLKDIV     ,Clock division ratio" "/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30,/32"
bitfld.long 0x00 20. "                TDQSS           ,Data input to first DQS transition delay" "0.75 DDR_CLOCK,1.25 DDR_CLOCK"
else
group.long 0x454++0x03
line.long 0x00 "DDR_CCR,DDR Clock Control Register"
bitfld.long 0x00 29. " GLOBAL_DDR_CLK_EN        ,Switches off the IFC DDR clock" "Disabled,Enabled"
bitfld.long 0x00 23.--26. "       DDR_LOW_CLKDIV     ,Clock division ratio" "/2,/4,/6,/8,/10,/12,/14,/16,/18,/20,/22,/24,/26,/28,/30,/32"
endif
base ad:0x02250000
if (((per.l.be(ad:0x02240000+0x130))&0x60)==0x20)
group.long 0x00++0x03
line.long 0x00 "NCFGR,NAND Configuration Register"
bitfld.long 0x00 31. " BOOT                     ,NAND flash auto-boot load mode" "Normal mode,Boot mode"
bitfld.long 0x00 29. "    SRAM_INIT_EN       ,SRAM initialization enable" "Not initialized,Initialized"
bitfld.long 0x00 27. "    SINGLE_DATA_MODE   ,Single data mode enable" "Disabled,Enabled"
bitfld.long 0x00 22.--23. "           ADDR_MODE       ,Addressing mode" "All per iteration,One per iteration,?..."
newline
bitfld.long 0x00 12.--16. " NUM_LOOP                 ,Number of loop iterations of FIR sequences for multi page operations" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
hexmask.long.byte 0x00 0.--7. 1. "             NUM_WAIT           ,Number of wait cycles"
else
group.long 0x00++0x03
line.long 0x00 "NCFGR,NAND Configuration Register"
bitfld.long 0x00 31. " BOOT                     ,NAND flash auto-boot load mode" "Normal mode,Boot mode"
bitfld.long 0x00 29. "    SRAM_INIT_EN       ,SRAM initialization enable" "Not initialized,Initialized"
bitfld.long 0x00 22.--23. "    ADDR_MODE          ,Addressing mode" "All per iteration,One per iteration,?..."
bitfld.long 0x00 12.--16. "  NUM_LOOP        ,Number of loop iterations of FIR sequences for multi page operations" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
newline
hexmask.long.byte 0x00 0.--7. 1. " NUM_WAIT                 ,Number of wait cycles"
endif
group.long 0x14++0x07
line.long 0x00 "NAND_FCR0,NAND Flash Command Register 0"
hexmask.long.byte 0x00 24.--31. 1. " CMD0                     ,General purpose FCM flash command byte 0"
hexmask.long.byte 0x00 16.--23. 1. "             CMD1               ,General purpose FCM flash command byte 1"
hexmask.long.byte 0x00 8.--15. 1. "                 CMD2               ,General purpose FCM flash command byte 2"
hexmask.long.byte 0x00 0.--7. 1. "                 CMD3            ,General purpose FCM flash command byte 3"
line.long 0x04 "NAND_FCR1,NAND Flash Command Register 1"
hexmask.long.byte 0x04 24.--31. 1. " CMD4                     ,General purpose FCM flash command byte 4"
hexmask.long.byte 0x04 16.--23. 1. "             CMD5               ,General purpose FCM flash command byte 5"
hexmask.long.byte 0x04 8.--15. 1. "                 CMD6               ,General purpose FCM flash command byte 6"
hexmask.long.byte 0x04 0.--7. 1. "                 CMD7            ,General purpose FCM flash command byte 7"
group.long (0x3C+0x0)++0x03
line.long 0x00 "ROW0,Flash Row Address Register 0"
group.long (0x44+0x0)++0x03
line.long 0x00 "COL0,Flash COL Address Register 0"
bitfld.long 0x00 31. " MS                       ,Main/spare region locator" "Main region,Spare region"
hexmask.long.word 0x00 0.--12. 0x01 "   CA                 ,Column address"
group.long (0x3C+0x10)++0x03
line.long 0x00 "ROW1,Flash Row Address Register 1"
group.long (0x44+0x10)++0x03
line.long 0x00 "COL1,Flash COL Address Register 1"
bitfld.long 0x00 31. " MS                       ,Main/spare region locator" "Main region,Spare region"
hexmask.long.word 0x00 0.--12. 0x01 "   CA                 ,Column address"
group.long (0x3C+0x20)++0x03
line.long 0x00 "ROW2,Flash Row Address Register 2"
group.long (0x44+0x20)++0x03
line.long 0x00 "COL2,Flash COL Address Register 2"
bitfld.long 0x00 31. " MS                       ,Main/spare region locator" "Main region,Spare region"
hexmask.long.word 0x00 0.--12. 0x01 "   CA                 ,Column address"
group.long (0x3C+0x30)++0x03
line.long 0x00 "ROW3,Flash Row Address Register 3"
group.long (0x44+0x30)++0x03
line.long 0x00 "COL3,Flash COL Address Register 3"
bitfld.long 0x00 31. " MS                       ,Main/spare region locator" "Main region,Spare region"
hexmask.long.word 0x00 0.--12. 0x01 "   CA                 ,Column address"
group.long 0x108++0x03
line.long 0x00 "NAND_BC,Flash Byte Count Register For NAND Flash"
hexmask.long.word 0x00 0.--13. 1. " BC                       ,Count of bytes transferred during RBCD or WBCD opcode"
group.long 0x110++0x0B
line.long 0x00 "NAND_FIR0,NAND Flash Instruction Register 0"
bitfld.long 0x00 26.--31. " OP0                      ,Opcode 0" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x00 20.--25. "         OP1                ,Opcode 1" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x00 14.--19. "             OP2                ,Opcode 2" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x00 8.--13. "             OP3             ,Opcode 3" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
newline
bitfld.long 0x00 2.--7. " OP4                      ,Opcode 4" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
line.long 0x04 "NAND_FIR1,NAND Flash Instruction Register 1"
bitfld.long 0x04 26.--31. " OP5                      ,Opcode 5" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x04 20.--25. "         OP6                ,Opcode 6" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x04 14.--19. "             OP7                ,Opcode 7" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x04 8.--13. "             OP8             ,Opcode 8" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
newline
bitfld.long 0x04 2.--7. " OP9                      ,Opcode 9" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
line.long 0x08 "NAND_FIR2,NAND Flash Instruction Register 2"
bitfld.long 0x08 26.--31. " OP10                     ,Opcode 10" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x08 20.--25. "         OP11               ,Opcode 11" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x08 14.--19. "             OP12               ,Opcode 12" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
bitfld.long 0x08 8.--13. "             OP13            ,Opcode 13" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
newline
bitfld.long 0x08 2.--7. " OP14                     ,Opcode 14" "NOOP,CA0,CA1,CA2,CA3,RA0,RA1,RA2,RA3,CMD0,CMD1,CMD2,CMD3,CMD4,CMD5,CMD6,CMD7,CW0,CW1,CW2,CW3,CW4,CW5,CW6,CW7,WBCD,RBCD,BTRD,RDSTAT,NWAIT,WFR,SBRD,UA,RB,?..."
group.long 0x15C++0x03
line.long 0x00 "NAND_CSEL,NAND Chip-Select Register"
bitfld.long 0x00 26.--28. " CSEL                     ,Chip-Select for NAND flash operation" "CS 0,CS 1,CS 2,CS 3,CS 4,CS 5,CS 6,CS 7"
group.long 0x164++0x03
line.long 0x00 "NANDSEQ_STRT,NAND Operation Sequence Start"
bitfld.long 0x00 31. " NAND_FIR_STRT            ,NAND flash operation start" "No effect,Start"
bitfld.long 0x00 23. "      AUTO_ERS           ,Automatic erase start" "No effect,Start"
bitfld.long 0x00 20. "          AUTO_PGM           ,Automatic program start" "No effect,Start"
bitfld.long 0x00 17. "          AUTO_CPB        ,Automatic copyback start" "No effect,Start"
newline
bitfld.long 0x00 14. " AUTO_RD                  ,Automatic read operation start" "No effect,Start"
bitfld.long 0x00 11. "      AUTO_STAT_RD       ,Automatic status read start" "No effect,Start"
group.long 0x16C++0x03
line.long 0x00 "NAND_EVTER_STAT,NAND Event And Error Status Register"
eventfld.long 0x00 31. " OPC                      ,NAND flash operation complete event" "Not completed,Completed"
eventfld.long 0x00 27. "  FTOER              ,Flash timeout error" "No error,Error"
eventfld.long 0x00 26. "           WPER               ,Write protect error" "No error,Error"
eventfld.long 0x00 25. "           ECCER           ,ECC error" "No error,Error"
newline
eventfld.long 0x00 15. " RCW_DN                   ,Page read from dev and written to SRAM buffer during RCW load" "Not occurred,Occurred"
eventfld.long 0x00 14. "   BOOT_DN            ,Page read from dev and written to SRAM buffer during BOOT load" "Not occurred,Occurred"
eventfld.long 0x00 11. "       BBI_SRCH_SEL       ,Bad block indicator search select" "Page 0 & 1,Page 0 & last"
group.long 0x174++0x03
line.long 0x00 "PGRDCMPL_EVT_STAT,NAND Page Read Completion Event Status Register"
eventfld.long 0x00 31. " SEC_DONE0                ,SEC_DONE[0] status" "Not done,Done"
eventfld.long 0x00 30. "       SEC_DONE1          ,SEC_DONE[1] status" "Not done,Done"
eventfld.long 0x00 29. "           SEC_DONE2          ,SEC_DONE[2] status" "Not done,Done"
eventfld.long 0x00 28. "           SEC_DONE3       ,SEC_DONE[3] status" "Not done,Done"
newline
eventfld.long 0x00 27. " SEC_DONE4                ,SEC_DONE[4] status" "Not done,Done"
eventfld.long 0x00 26. "       SEC_DONE5          ,SEC_DONE[5] status" "Not done,Done"
eventfld.long 0x00 25. "           SEC_DONE6          ,SEC_DONE[6] status" "Not done,Done"
eventfld.long 0x00 24. "           SEC_DONE7       ,SEC_DONE[7] status" "Not done,Done"
newline
eventfld.long 0x00 23. " SEC_DONE8                ,SEC_DONE[8] status" "Not done,Done"
eventfld.long 0x00 22. "       SEC_DONE9          ,SEC_DONE[9] status" "Not done,Done"
eventfld.long 0x00 21. "           SEC_DONE10         ,SEC_DONE[10] status" "Not done,Done"
eventfld.long 0x00 20. "           SEC_DONE11      ,SEC_DONE[11] status" "Not done,Done"
newline
eventfld.long 0x00 19. " SEC_DONE12               ,SEC_DONE[12] status" "Not done,Done"
eventfld.long 0x00 18. "       SEC_DONE13         ,SEC_DONE[13] status" "Not done,Done"
eventfld.long 0x00 17. "           SEC_DONE14         ,SEC_DONE[14] status" "Not done,Done"
eventfld.long 0x00 16. "           SEC_DONE15      ,SEC_DONE[15] status" "Not done,Done"
group.long 0x180++0x03
line.long 0x00 "NAND_EVTER_EN,NAND Event And Error Enable Register"
bitfld.long 0x00 31. " OPCEN                    ,NAND flash operation complete event enable" "Disabled,Enabled"
bitfld.long 0x00 29. "       PGRDCMPLEN         ,NAND flash page read completion event enable" "Disabled,Enabled"
bitfld.long 0x00 27. "           FTOEREN            ,Flash time out error enable (for R/B timeoutand DQS timeout)" "Disabled,Enabled"
bitfld.long 0x00 26. "           WPEREN          ,Write protect error checking enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " ECCEREN                  ,ECC error logging enable" "Disabled,Enabled"
group.long 0x18C++0x03
line.long 0x00 "NAND_EVTER_INTR_EN,NAND Event And Error Interrupt Enable Register"
bitfld.long 0x00 31. " OPCIREN                  ,NAND flash operation complete event interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 29. "       PGRDCMPLIREN       ,Page read completion event interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 27. "           FTOERIREN          ,Flash timeout error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 26. "           WPERIREN        ,Write protect error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " ECCERIREN                ,ECC error interrupt enable" "Disabled,Enabled"
rgroup.long 0x198++0x07
line.long 0x00 "NAND_ERATTR0,NAND Transfer Error Attributes Register 0"
bitfld.long 0x00 26.--28. " ERCS                     ,Chip-select corresponding to NAND error" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7"
bitfld.long 0x00 19. "         ERTTYPE            ,Transaction type of NAND error" "Write,Read"
line.long 0x04 "NAND_ERATTR1,NAND Transfer Error Attributes Register 1"
rgroup.long 0x1E0++0x03
line.long 0x00 "NAND_FSR,NAND Flash Status Register"
hexmask.long.byte 0x00 24.--31. 1. " RS0                      ,First byte of data read from read status operation"
hexmask.long.byte 0x00 16.--23. 1. "             RS1                ,Second byte of data read from read status operation"
rgroup.long 0x1E8++0x1F
line.long 0x00 "ECCSTAT0,ECC Status And Result of Flash Operation Register 0"
bitfld.long 0x00 24.--29. " NUMER0                   ,Number of ECC errors on sector #0 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 16.--21. "             NUMER1             ,Number of ECC errors on sector #1 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--13. "                 NUMER2             ,Number of ECC errors on sector #2 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "                 NUMER3          ,Number of ECC errors on sector #3 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x04 "ECCSTAT1,ECC Status And Result of Flash Operation Register 1"
bitfld.long 0x04 24.--29. " NUMER4                   ,Number of ECC errors on sector #4 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 16.--21. "             NUMER5             ,Number of ECC errors on sector #5 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 8.--13. "                 NUMER6             ,Number of ECC errors on sector #6 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x04 0.--5. "                 NUMER7          ,Number of ECC errors on sector #7 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "ECCSTAT2,ECC Status And Result Of Flash Operation Register 2"
bitfld.long 0x08 24.--29. " NUMER8                   ,Number of ECC errors on sector #8 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 16.--21. "             NUMER9             ,Number of ECC errors on sector #9 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 8.--13. "                 NUMER10            ,Number of ECC errors on sector #10 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x08 0.--5. "                 NUMER11         ,Number of ECC errors on sector #11 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x0C "ECCSTAT3,ECC Status And Result of Flash Operation Register 3"
bitfld.long 0x0C 24.--29. " NUMER12                  ,Number of ECC errors on sector #12 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "             NUMER13            ,Number of ECC errors on sector #13 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 8.--13. "                 NUMER14            ,Number of ECC errors on sector #14 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--5. "                 NUMER15         ,Number of ECC errors on sector #15 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x10 "ECCSTAT4,ECC Status And Result of Flash Operation Register 4"
bitfld.long 0x10 24.--29. " NUMER16                  ,Number of ECC errors on sector #16 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 16.--21. "             NUMER17            ,Number of ECC errors on sector #17 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 8.--13. "                 NUMER18            ,Number of ECC errors on sector #18 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x10 0.--5. "                 NUMER19         ,Number of ECC errors on sector #19 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x14 "ECCSTAT5,ECC Status And Result of Flash Operation Register 5"
bitfld.long 0x14 24.--29. " NUMER20                  ,Number of ECC errors on sector #20 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x14 16.--21. "             NUMER21            ,Number of ECC errors on sector #21 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x14 8.--13. "                 NUMER22            ,Number of ECC errors on sector #22 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x14 0.--5. "                 NUMER23         ,Number of ECC errors on sector #23 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x18 "ECCSTAT6,ECC Status And Result of Flash Operation Register 6"
bitfld.long 0x18 24.--29. " NUMER24                  ,Number of ECC errors on sector #24 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 16.--21. "             NUMER25            ,Number of ECC errors on sector #25 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 8.--13. "                 NUMER26            ,Number of ECC errors on sector #26 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x18 0.--5. "                 NUMER27         ,Number of ECC errors on sector #27 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x1C "ECCSTAT7,ECC Status And Result of Flash Operation Register 7"
bitfld.long 0x1C 24.--29. " NUMER28                  ,Number of ECC errors on sector #28 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x1C 16.--21. "             NUMER29            ,Number of ECC errors on sector #29 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x1C 8.--13. "                 NUMER30            ,Number of ECC errors on sector #30 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x1C 0.--5. "                 NUMER31         ,Number of ECC errors on sector #31 of SRAM buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x278++0x03
line.long 0x00 "NANDCR,NAND Control Register"
bitfld.long 0x00 25.--28. " FTOCNT                   ,Flash timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
wgroup.long 0x284++0x03
line.long 0x00 "NAND_AUTOBOOT_TRGR,NAND Autoboot Trigger Register"
bitfld.long 0x00 31. " RCW_LD                   ,RCW load" "No effect,Load"
bitfld.long 0x00 29. "      BOOT_LD            ,BOOT load" "No effect,Load"
rgroup.long 0x28C++0x03
line.long 0x00 "NAND_MDR,NAND Flash Memory Data Register"
hexmask.long.byte 0x00 24.--31. 1. " RDATA0                   ,First read data byte when opcode SBRD is used for read"
hexmask.long.byte 0x00 16.--23. 1. "             RDATA1             ,Second read data byte when opcode SBRD is used for read"
group.long 0x300++0x07
line.long 0x00 "NAND_DLL_LOW_CFG0,Nand DLL Low Config 0 Register"
bitfld.long 0x00 31. " DLL_ENABLE               ,DLL enable" "Disabled,Enabled"
bitfld.long 0x00 30. "       DLL_RESET          ,DLL reset" "No reset,Reset"
line.long 0x04 "NAND_DLL_LOW_CFG1,Nand DLL Low Config 1 Register"
bitfld.long 0x04 31. " DLL_PD_PULSE_STRETCH_SEL ,Delays cells for pulse width detection logic select" "4 cells,2 cells"
bitfld.long 0x04 16.--19. "        DLL_REF_UPDATE_INT ,Default update interval of the reference delay line override" "2 REF clk cycles,3 REF clk cycles,4 REF clk cycles,5 REF clk cycles,6 REF clk cycles,7 REF clk cycles,8 REF clk cycles,9 REF clk cycles,10 REF clk cycles,11 REF clk cycles,12 REF clk cycles,13 REF clk cycles,14 REF clk cycles,15 REF clk cycles,16 REF clk cycles,17 REF clk cycles"
hexmask.long.byte 0x04 0.--7. 1. "  DLL_SLV_UPDATE_INT ,Default update interval of the slave delay line override"
rgroup.long 0x30C++0x03
line.long 0x00 "NAND_DLL_LOW_STAT,NAND DLL Low Status Register"
bitfld.long 0x00 31. " DLL_STS_REF_LOCK         ,DLL reference delay line lock status" "0,1"
bitfld.long 0x00 27. "              DLL_STS_SLV_LOCK   ,DLL slave delay chain lock status" "0,1"
hexmask.long.byte 0x00 12.--19. 1. "                  DLL_STS_REF_SEL    ,Status of selected tap for reference delay line"
hexmask.long.byte 0x00 0.--7. 1. "                 DLL_STS_SLV_SEL ,Status of selected tap for slave delay line"
group.long 0x400++0x03
line.long 0x00 "NOR_EVTER_STAT,NOR Event And Error Status Register"
eventfld.long 0x00 31. " OPC_NOR                  ,NOR command sequence operation complete event indication" "Not complete,Complete"
eventfld.long 0x00 26. "   WPER               ,Write protect error" "No error,Error"
eventfld.long 0x00 24. "           STOER              ,Command sequence timeout error" "No error,Error"
group.long 0x40C++0x03
line.long 0x00 "NOR_EVTER_EN,NOR Event And Error Enable Register"
bitfld.long 0x00 31. " OPCEN_NOR                ,NOR command sequence operation complete event enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       WPEREN             ,Write protect error checking enable" "Disabled,Enabled"
bitfld.long 0x00 24. "           STOEREN            ,Command sequence timeout error enable" "Disabled,Enabled"
group.long 0x418++0x03
line.long 0x00 "NOR_EVTER_INTR_EN,NOR Event And Error Interrupt Enable Register"
bitfld.long 0x00 31. " OPCIREN_NOR              ,NOR command sequence operation complete event interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 26. "       WPERIREN           ,Write protect error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 24. "           STOERIREN          ,NOR command sequence timeout error interrupt enable" "Disabled,Enabled"
rgroup.long 0x424++0x0B
line.long 0x00 "NOR_ERATTR0,NOR Transfer Error Attributes Register 0"
hexmask.long.byte 0x00 24.--31. 1. " ERSRCID                  ,SRCID corresponding to error transaction"
hexmask.long.byte 0x00 12.--19. 1. "             ERAID              ,ID of the error transaction"
bitfld.long 0x00 6.--8. "                 ERCS               ,Chip-select corresponding to NOR error" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7"
bitfld.long 0x00 0. "             ERTYPE          ,Type of the transaction" "Write,Read"
line.long 0x04 "NOR_ERATTR1,NOR Transfer Error Attribute Register 1"
line.long 0x08 "NOR_ERATTR2,NOR Transfer Error Attribute Register 2"
bitfld.long 0x08 16.--19. " ER_NUM_PHASE_EXP         ,Number of phase expected in command sequence which timed-out by system side" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x08 8.--11. "             ER_NUM_PHASE_PER   ,Number of command sequence phases performed before timeout" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x440++0x03
line.long 0x00 "NORCR,NOR Control Register"
bitfld.long 0x00 24.--27. " NUM_PHASE                ,Number of address/data phases" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 16.--19. "             STOCNT             ,Sequence timeout count" "256 cycles,512 cycles,1K cycles,2K cycles,4K cycles,8K cycles,16K cycles,32K cycles,64K cycles,128K cycles,256K cycles,512K cycles,1M cycles,2M cycles,4M cycles,8M cycles"
group.long 0x800++0x03
line.long 0x00 "GPCM_EVTER_STAT,GPCM Event And Error Status Register"
eventfld.long 0x00 26. " TOER                     ,Timeout error" "No error,Error"
eventfld.long 0x00 24. "       PER                ,Parity error" "No error,Error"
eventfld.long 0x00 22. "           ABER               ,Abort error" "No error,Error"
group.long 0x80C++0x03
line.long 0x00 "GPCM_EVTER_EN,GPCM Event And Error Enable Register"
bitfld.long 0x00 26. " TOEREN                   ,Timeout error checking enable" "Disabled,Enabled"
bitfld.long 0x00 24. "       PEREN              ,Parity error checking enable" "Disabled,Enabled"
bitfld.long 0x00 22. "           ABEREN             ,Abort error checking enable" "Disabled,Enabled"
group.long 0x818++0x03
line.long 0x00 "GPCM_EVTER_INTR_EN,GPCM Event And Error Interrupt Enable Register"
bitfld.long 0x00 26. " TOERIREN                 ,Timeout error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 24. "       PERIREN            ,Parity error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 22. "           ABERIREN           ,Abort error interrupt enable" "Disabled,Enabled"
rgroup.long 0x824++0x0F
line.long 0x00 "GPCM_ERATTR0,GPCM Transfer Error Attributes Register 0"
hexmask.long.byte 0x00 24.--31. 1. " ERSRCID                  ,SRCID corresponding to error transaction"
hexmask.long.byte 0x00 12.--19. 1. "             ERAID              ,ID of the error transaction"
bitfld.long 0x00 6.--8. "                 ERCS               ,Chip-select corresponding to GPCM error" "Bank 0,Bank 1,Bank 2,Bank 3,Bank 4,Bank 5,Bank 6,Bank 7"
bitfld.long 0x00 0. "             ERTYPE          ,Transaction type" "Write,Read"
line.long 0x04 "GPCM_ERATTR1,GPCM Transfer Error Attributes Register 1"
line.long 0x08 "GPCM_ERATTR2,GPCM Transfer Error Attributes Register 2"
bitfld.long 0x08 10.--11. " PERR_BEAT                ,Gives information on which beat of address/data parity error is observed" "0,1,2,3"
bitfld.long 0x08 7. "              PERR_BYTE0         ,Parity error on byte 0" "No error,Error"
bitfld.long 0x08 6. "           PERR_BYTE1         ,Parity error on byte 1" "No error,Error"
bitfld.long 0x08 5. "           PERR_BYTE2      ,Parity error on byte 2" "No error,Error"
newline
bitfld.long 0x08 4. " PERR_BYTE3               ,Parity error on byte 3" "No error,Error"
bitfld.long 0x08 0. "       PERR_AD            ,Parity error reported in address or data phase" "Address,Data"
line.long 0x0C "GPCM_STAT,GPCM Status Register"
bitfld.long 0x0C 31. " GPCM_BSY                 ,GPCM busy" "Idle,Busy"
endian.le
width 0x0B
tree.end
tree.open "I2C (Inter-Integrated Circuit)"
tree "I2C 1"
base ad:0x02000000
width 11.
group.byte 0x00++0x02
line.byte 0x00 "IBAD,I2C Bus Address Register"
hexmask.byte 0x00 1.--7. 0x02 " ADR      ,Slave address"
line.byte 0x01 "IBFD,I2C Bus Frequency Divider Register"
line.byte 0x02 "IBCR,I2C Bus Control Register"
bitfld.byte 0x02 7. " MDIS     ,Module disable" "No,Yes"
bitfld.byte 0x02 6. "           IBIE             ,I-Bus interrupt enable" "Disabled,Enabled"
bitfld.byte 0x02 5. "       MSSL         ,Master/Slave mode select" "Slave,Master"
newline
bitfld.byte 0x02 4. " TXRX     ,Transmit/Receive mode select" "Receive,Transmit"
bitfld.byte 0x02 3. "      NOACK            ,Data acknowledge disable" "Enabled,Disabled"
bitfld.byte 0x02 2. "       RSTA         ,Repeat start" "No effect,Repeat"
newline
if (((per.b(ad:0x02000000+0x02))&0xA0)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Completed"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "Not lost,Lost"
rbitfld.byte 0x00 2. "      SRW              ,Slave read/write" "Slave Rx,Slave Tx"
eventfld.byte 0x00 1. "       IBIF         ,I-Bus interrupt flag" "No interrupt,Interrupt"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
elif (((per.b(ad:0x02000000+0x02))&0xA0)==0x20)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Complete"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "No effect,Lost"
textfld "                      "
eventfld.byte 0x00 1. "               IBIF         ,I-Bus interrupt flag" "No request,Request"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
else
hgroup.byte 0x03++0x00
hide.byte 0x00 "IBSR,I2C Bus Status Register"
endif
newline
hgroup.byte 0x04++0x00
hide.byte 0x00 "IBDR,I2C Bus Data I/O Register"
in
newline
if (((per.b(ad:0x02000000+0x01))&0x80)==0x00)
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
bitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
else
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
rbitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
endif
group.byte 0x06++0x00
line.byte 0x00 "IBDBG,I2C Bus Debug Register"
bitfld.byte 0x00 3. " GLFLT_EN ,Glitch filter enable" "Disabled,Enabled"
rbitfld.byte 0x00 1. "      IPG_DEBUG_HALTED ,Debug halted bit" "Not halted,Halted"
bitfld.byte 0x00 0. "     IPG_DEBUG_EN ,Debug mode enable bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "I2C 2"
base ad:0x02010000
width 11.
group.byte 0x00++0x02
line.byte 0x00 "IBAD,I2C Bus Address Register"
hexmask.byte 0x00 1.--7. 0x02 " ADR      ,Slave address"
line.byte 0x01 "IBFD,I2C Bus Frequency Divider Register"
line.byte 0x02 "IBCR,I2C Bus Control Register"
bitfld.byte 0x02 7. " MDIS     ,Module disable" "No,Yes"
bitfld.byte 0x02 6. "           IBIE             ,I-Bus interrupt enable" "Disabled,Enabled"
bitfld.byte 0x02 5. "       MSSL         ,Master/Slave mode select" "Slave,Master"
newline
bitfld.byte 0x02 4. " TXRX     ,Transmit/Receive mode select" "Receive,Transmit"
bitfld.byte 0x02 3. "      NOACK            ,Data acknowledge disable" "Enabled,Disabled"
bitfld.byte 0x02 2. "       RSTA         ,Repeat start" "No effect,Repeat"
newline
if (((per.b(ad:0x02010000+0x02))&0xA0)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Completed"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "Not lost,Lost"
rbitfld.byte 0x00 2. "      SRW              ,Slave read/write" "Slave Rx,Slave Tx"
eventfld.byte 0x00 1. "       IBIF         ,I-Bus interrupt flag" "No interrupt,Interrupt"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
elif (((per.b(ad:0x02010000+0x02))&0xA0)==0x20)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Complete"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "No effect,Lost"
textfld "                      "
eventfld.byte 0x00 1. "               IBIF         ,I-Bus interrupt flag" "No request,Request"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
else
hgroup.byte 0x03++0x00
hide.byte 0x00 "IBSR,I2C Bus Status Register"
endif
newline
hgroup.byte 0x04++0x00
hide.byte 0x00 "IBDR,I2C Bus Data I/O Register"
in
newline
if (((per.b(ad:0x02010000+0x01))&0x80)==0x00)
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
bitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
else
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
rbitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
endif
group.byte 0x06++0x00
line.byte 0x00 "IBDBG,I2C Bus Debug Register"
bitfld.byte 0x00 3. " GLFLT_EN ,Glitch filter enable" "Disabled,Enabled"
rbitfld.byte 0x00 1. "      IPG_DEBUG_HALTED ,Debug halted bit" "Not halted,Halted"
bitfld.byte 0x00 0. "     IPG_DEBUG_EN ,Debug mode enable bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "I2C 3"
base ad:0x02020000
width 11.
group.byte 0x00++0x02
line.byte 0x00 "IBAD,I2C Bus Address Register"
hexmask.byte 0x00 1.--7. 0x02 " ADR      ,Slave address"
line.byte 0x01 "IBFD,I2C Bus Frequency Divider Register"
line.byte 0x02 "IBCR,I2C Bus Control Register"
bitfld.byte 0x02 7. " MDIS     ,Module disable" "No,Yes"
bitfld.byte 0x02 6. "           IBIE             ,I-Bus interrupt enable" "Disabled,Enabled"
bitfld.byte 0x02 5. "       MSSL         ,Master/Slave mode select" "Slave,Master"
newline
bitfld.byte 0x02 4. " TXRX     ,Transmit/Receive mode select" "Receive,Transmit"
bitfld.byte 0x02 3. "      NOACK            ,Data acknowledge disable" "Enabled,Disabled"
bitfld.byte 0x02 2. "       RSTA         ,Repeat start" "No effect,Repeat"
newline
if (((per.b(ad:0x02020000+0x02))&0xA0)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Completed"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "Not lost,Lost"
rbitfld.byte 0x00 2. "      SRW              ,Slave read/write" "Slave Rx,Slave Tx"
eventfld.byte 0x00 1. "       IBIF         ,I-Bus interrupt flag" "No interrupt,Interrupt"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
elif (((per.b(ad:0x02020000+0x02))&0xA0)==0x20)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Complete"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "No effect,Lost"
textfld "                      "
eventfld.byte 0x00 1. "               IBIF         ,I-Bus interrupt flag" "No request,Request"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
else
hgroup.byte 0x03++0x00
hide.byte 0x00 "IBSR,I2C Bus Status Register"
endif
newline
hgroup.byte 0x04++0x00
hide.byte 0x00 "IBDR,I2C Bus Data I/O Register"
in
newline
if (((per.b(ad:0x02020000+0x01))&0x80)==0x00)
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
bitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
else
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
rbitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
endif
group.byte 0x06++0x00
line.byte 0x00 "IBDBG,I2C Bus Debug Register"
bitfld.byte 0x00 3. " GLFLT_EN ,Glitch filter enable" "Disabled,Enabled"
rbitfld.byte 0x00 1. "      IPG_DEBUG_HALTED ,Debug halted bit" "Not halted,Halted"
bitfld.byte 0x00 0. "     IPG_DEBUG_EN ,Debug mode enable bit" "Disabled,Enabled"
width 0x0B
tree.end
tree "I2C 4"
base ad:0x02030000
width 11.
group.byte 0x00++0x02
line.byte 0x00 "IBAD,I2C Bus Address Register"
hexmask.byte 0x00 1.--7. 0x02 " ADR      ,Slave address"
line.byte 0x01 "IBFD,I2C Bus Frequency Divider Register"
line.byte 0x02 "IBCR,I2C Bus Control Register"
bitfld.byte 0x02 7. " MDIS     ,Module disable" "No,Yes"
bitfld.byte 0x02 6. "           IBIE             ,I-Bus interrupt enable" "Disabled,Enabled"
bitfld.byte 0x02 5. "       MSSL         ,Master/Slave mode select" "Slave,Master"
newline
bitfld.byte 0x02 4. " TXRX     ,Transmit/Receive mode select" "Receive,Transmit"
bitfld.byte 0x02 3. "      NOACK            ,Data acknowledge disable" "Enabled,Disabled"
bitfld.byte 0x02 2. "       RSTA         ,Repeat start" "No effect,Repeat"
newline
if (((per.b(ad:0x02030000+0x02))&0xA0)==0x00)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Completed"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "Not lost,Lost"
rbitfld.byte 0x00 2. "      SRW              ,Slave read/write" "Slave Rx,Slave Tx"
eventfld.byte 0x00 1. "       IBIF         ,I-Bus interrupt flag" "No interrupt,Interrupt"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
elif (((per.b(ad:0x02030000+0x02))&0xA0)==0x20)
group.byte 0x03++0x00
line.byte 0x00 "IBSR,I2C Bus Status Register"
rbitfld.byte 0x00 7. " TCF      ,Transfer complete" "In progress,Complete"
rbitfld.byte 0x00 6. "   IAAS             ,Addressed as a slave" "Not addressed,Addressed"
rbitfld.byte 0x00 5. "  IBB          ,Bus busy" "Idle,Busy"
newline
eventfld.byte 0x00 4. " IBAL     ,Arbitration lost" "No effect,Lost"
textfld "                      "
eventfld.byte 0x00 1. "               IBIF         ,I-Bus interrupt flag" "No request,Request"
newline
rbitfld.byte 0x00 0. " RXAK     ,Received acknowledge" "Received,Not received"
else
hgroup.byte 0x03++0x00
hide.byte 0x00 "IBSR,I2C Bus Status Register"
endif
newline
hgroup.byte 0x04++0x00
hide.byte 0x00 "IBDR,I2C Bus Data I/O Register"
in
newline
if (((per.b(ad:0x02030000+0x01))&0x80)==0x00)
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
bitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,Enabled"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
else
group.byte 0x05++0x00
line.byte 0x00 "IBIC,I2C Bus Interrupt Config Register"
rbitfld.byte 0x00 7. " BIIE     ,Bus idle interrupt enable bit" "Disabled,"
bitfld.byte 0x00 6. "      BYTERXIE         ,Byte receive interrupt enable" "Disabled,Enabled"
endif
group.byte 0x06++0x00
line.byte 0x00 "IBDBG,I2C Bus Debug Register"
bitfld.byte 0x00 3. " GLFLT_EN ,Glitch filter enable" "Disabled,Enabled"
rbitfld.byte 0x00 1. "      IPG_DEBUG_HALTED ,Debug halted bit" "Not halted,Halted"
bitfld.byte 0x00 0. "     IPG_DEBUG_EN ,Debug mode enable bit" "Disabled,Enabled"
width 0x0B
tree.end
tree.end
tree.open "PEX (PCI Express Interface Controller)"
tree "PEX 1"
base ad:0x03400000
width 34.
tree "Configuration Header"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1.))==(0x10<<1.))
group.word 0x00++0x07 "Type 0 [EP mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x17
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x04 "BAR1,PCI Express Base Address Register 1"
hexmask.long.tbyte 0x04 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x04 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x04 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x04 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x08 "BAR2,PCI Express Base Address Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x08 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x08 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,,Locate anywhere/64-bit,?..."
bitfld.long 0x08 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x0C "BAR3,PCI Express Base Address Register 3"
line.long 0x10 "BAR4,PCI Express Base Address Register 4"
hexmask.long.tbyte 0x10 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x10 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x10 1.--2. " TYPE                  ,Type" ",,Locate anywhere/64-bit,?..."
bitfld.long 0x10 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x14 "BAR5,PCI Express Base Address Register 5"
rgroup.word 0x2C++0x03
line.word 0x00 "SUBSYSTEM_VENDOR_ID,PCI Express Subsystem Vendor ID Register"
line.word 0x02 "SUBSYSTEM_ID,PCI Express Subsystem ID Register"
group.long 0x30++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x02
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
line.byte 0x01 "MINIMUM_GRANT,PCI Express Minimum Grant Register"
line.byte 0x02 "MAXIMUM_LATENCY,PCI Express Maximum Latency Register"
else
group.word 0x00++0x07 "Type 1 [RC mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x03
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
group.byte 0x18++0x02
line.byte 0x00 "PRIMARY_BUS_NUMBER,PCI Express Primary Bus Number Register"
line.byte 0x01 "SECONDARY_BUS_NUMBER,PCI Express Secondary Bus Number Register"
line.byte 0x02 "SUBORDINATE_BUS_NUMBER,PCI Express Subordinate Bus Number Register"
group.byte 0x1C++0x01
line.byte 0x00 "I/O_BASE,PCI Express I/O Base Register"
hexmask.byte 0x00 4.--7. 0x10 "     I/O_START_ADDRESS     ,Specifies bits 15:12 of the I/O space start address"
rbitfld.byte 0x00 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
line.byte 0x01 "I/O_LIMIT,PCI Express I/O Limit Register"
hexmask.byte 0x01 4.--7. 0x10 "     I/O_LIMIT_ADDRESS     ,Specifies bits 15:12 of the I/O space ending address"
rbitfld.byte 0x01 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
group.word 0x1E++0x09
line.word 0x00 "SECONDARY_STATUS,PCI Express Secondary Status Register"
eventfld.word 0x00 15. "     DPE                   ,Detected parity error" "Not detected,Detected"
eventfld.word 0x00 14. "            SSE                               ,Signalled system error" "Not signalled,Signalled"
newline
eventfld.word 0x00 13. "     RMA                   ,Received master abort" "Not received,Received"
eventfld.word 0x00 12. "            RTA                               ,Received targed abort" "Not received,Received"
newline
eventfld.word 0x00 11. "     STA                   ,Signalled target abort" "Not signalled,Signalled"
eventfld.word 0x00 8. "           MDPE                              ,Master data parity error" "No error,Error"
line.word 0x02 "MEMORY_BASE,PCI Express Memory Base Register"
hexmask.word 0x02 4.--15. 0x10 "     MEMORY_BASE           ,Specifies bits 31:20 of the non-prefetchable memory space start address"
line.word 0x04 "MEMORY_LIMIT,PCI Express Memory Limit Register"
hexmask.word 0x04 4.--15. 0x10 "     MEMORY_LIMIT          ,Specifies bits 31:20 of the non-prefetchable memory space ending address"
line.word 0x06 "PREFETCHABLE_MEMORY_BASE,PCI Express Prefetchable Memory Base Register"
hexmask.word 0x06 4.--15. 0x10 "     PF_MEMORY_BASE        ,Specifies bits 31:20 of the prefetchable memory space start address"
rbitfld.word 0x06 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
line.word 0x08 "PREFETCHABLE_MEMORY_LIMIT,PCI Express Prefetchable Memory Limit Register"
hexmask.word 0x08 4.--15. 0x10 "     PF_MEMORY_LIMIT       ,Specifies bits 31:20 of the prefetchable memory space ending address"
rbitfld.word 0x08 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
group.long 0x28++0x07
line.long 0x00 "PREFETCHABLE_BASE_UPPER_32_BITS,PCI Express Prefetchable Base Upper 32 Bits Register"
line.long 0x04 "PREFETCHABLE_LIMIT_UPPER_32_BITS,PCI Express Prefetchable Limit Upper 32 Bits Register"
rgroup.word 0x30++0x03
line.word 0x00 "I/O_BASE_UPPER_16_BITS,PCI Express I/O Base Upper 16 Bits Register"
line.word 0x02 "I/O_LIMIT_UPPER_16_BITS,PCI Express I/O Limit Upper 16 Bits Register"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.long 0x38++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x00
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
group.word 0x3E++0x01
line.word 0x00 "BRIDGE_CONTROL,PCI Express Bridge Control Register"
bitfld.word 0x00 6. "     SCND_RST              ,Secondary bus reset" "No reset,Reset"
bitfld.word 0x00 3. "                VGA_EN                            ,VGA enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     ISA_EN                ,ISA enable" "Disabled,Enabled"
bitfld.word 0x00 1. "                SERR_EN                           ,SERR enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     PER                   ,Parity error response" "No response,Response"
endif
tree.end
tree "Power Management Capability Structure"
width 38.
rgroup.byte 0x40++0x00
line.byte 0x00 "POWER_MANAGEMENT_CAPABILITY_ID,PCI Express Power Management Capability ID Register"
rgroup.word 0x42++0x01
line.word 0x00 "POWER_MANAGEMENT_CAPABILITIES,PCI Express Power Management Capabilities Register"
bitfld.word 0x00 15. "     PME_SUPPORT[4] ,PME power state support bit 4" "Not supported,Supported"
bitfld.word 0x00 14. "  [3]        ,PME power state support bit 3" "Not supported,Supported"
newline
bitfld.word 0x00 13. "     [2]            ,PME power state support bit 2" "Not supported,Supported"
bitfld.word 0x00 12. "  [1]        ,PME power state support bit 1" "Not supported,Supported"
newline
bitfld.word 0x00 11. "     [0]            ,PME power state support bit 0" "Not supported,Supported"
bitfld.word 0x00 10. "  D2         ,D2 support" "Not supported,Supported"
newline
bitfld.word 0x00 9. "     D1             ,D1 support" "Not supported,Supported"
bitfld.word 0x00 6.--8. "  AUX_CURR   ,AUX current" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 5. "     DSI            ,Device specific initialization" "0,1"
bitfld.word 0x00 3. "              PME_CLK    ,PME clock" "0,1"
newline
bitfld.word 0x00 0.--2. "     VERSION        ,Version of the specification" "0,1,2,3,4,5,6,7"
group.word 0x44++0x01
line.word 0x00 "POWER_MANAGEMENT_STATUS_AND_CONTROL,PCI Express Power Management Status And Control Register"
eventfld.word 0x00 15. "     PME_STAT       ,PME status" "0,1"
bitfld.word 0x00 13.--14. "              DATA_SCALE ,Data scale field" "0,1,2,3"
newline
bitfld.word 0x00 9.--12. "     DATA_SELECT    ,Data select field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 8. "             PME_EN     ,PME enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0.--1. "     POWER_STATE    ,Indicates the current power state of the function" "D0,D1,D2,D3"
rgroup.byte 0x47++0x00
line.byte 0x00 "POWER_MANAGEMENT_DATA,PCI Express Power Management Data Register"
tree.end
tree "MSI Message Capability Structure"
width 28.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==(0x10<<1))
rgroup.byte 0x50++0x00
line.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
group.word 0x52++0x01
line.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
rbitfld.word 0x00 7. "     64AC            ,64-bit address capable" "Not capable,Capable"
bitfld.word 0x00 4.--6. "  MME  ,Multiple message enable" "0,1,2,3,4,5,6,7"
newline
rbitfld.word 0x00 1.--3. "     MMC             ,Multiple message capable" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0. "            MSIE ,MSI enable" "Disabled,Enabled"
group.long 0x54++0x07
line.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hexmask.long 0x00 2.--31. 0x04 " MESSAGE_ADDRESS ,System-specified message address"
line.long 0x04 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
group.word 0x5C++0x01
line.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
else
hgroup.byte 0x50++0x00
hide.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
hgroup.word 0x52++0x01
hide.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
hgroup.long 0x54++0x03
hide.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hgroup.long 0x58++0x03
hide.long 0x00 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
hgroup.word 0x5C++0x01
hide.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
endif
tree.end
tree "PCI Express Capability Structure"
width 27.
rgroup.byte 0x70++0x00
line.byte 0x00 "CAPABILITY_ID,PCI Express Capability ID Register"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==0x000)
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 8. "             SLOT                      ,Slot implemented" "Not implemented,Implemented"
newline
bitfld.word 0x00 4.--7. "     DEVICE/PORT_TYPE         ,Device/Port type" "EP mode,,,,RC mode,?..."
bitfld.word 0x00 0.--3. "        CAPABILITY_VERSION        ,Indicates the defined PCI express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 4.--7. "             DEVICE/PORT_TYPE          ,Device/Port type" "EP mode,,,,RC mode,?..."
newline
bitfld.word 0x00 0.--3. "     CAPABILITY_VERSION       ,Indicates the defined PCI Express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0x74++0x03
line.long 0x00 "DEVICE_CAPABILITIES,PCI Express Device Capabilities Register"
bitfld.long 0x00 28. " FLRC                     ,Functional level reset capability" "0,1"
bitfld.long 0x00 26.--27. "              CSPLS                     ,Captured slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 18.--25. 1. " CSPLV                    ,Captured slot power limit value"
bitfld.long 0x00 15. "           RBER                      ,Role based error reporting" "0,1"
newline
bitfld.long 0x00 9.--11. " EP_L1_LAT                ,Endpoint L1 acceptable latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "              EP_L0S_LAT                ,Endpoint L0s acceptable latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 5. " ET                       ,Extended tag field supported" "0,1"
bitfld.long 0x00 3.--4. "              PHAN_FCT                  ,Phantom functions supported" "0,1,2,3"
newline
bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP          ,Maximum payload size supported" ",256-bytes,?..."
group.word 0x78++0x03
line.word 0x00 "DEVICE_CONTROL,PCI Express Device Control Register"
bitfld.word 0x00 15. "     IFLR                     ,Initiate functional level reset" "No reset,Reset"
bitfld.word 0x00 12.--14. "       MAX_READ_SIZE             ,Maximum read request size" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 11. "     ENS                      ,No snoop enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       APE                       ,AUX power PM enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     PFE                      ,Phantom functions enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       ETE                       ,Extended tag field enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5.--7. "     MAX_PAYLOAD_SIZE         ,Maximum payload size" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 4. "              RO                        ,Relaxed ordering enable" "Disabled,Enabled"
newline
bitfld.word 0x00 3. "     URR                      ,Unsupported request reporting enable" "Disabled,Enabled"
bitfld.word 0x00 2. "       FER                       ,Fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.word 0x00 1. "     NFER                     ,Non-fatal error reporting enable" "Disabled,Enabled"
bitfld.word 0x00 0. "       CER                       ,Correctable error reporting enable" "Disabled,Enabled"
line.word 0x02 "DEVICE_STATUS,PCI Express Device Status Register"
rbitfld.word 0x02 5. "     TP                       ,Transactions pending" "Not pending,Pending"
rbitfld.word 0x02 4. "    APD                       ,AUX power detected" "Not detected,Detected"
newline
eventfld.word 0x02 3. "     URD                      ,Unsupported request detected" "Not detected,Detected"
eventfld.word 0x02 2. "   FED                       ,Fatal error detected" "Not detected,Detected"
newline
eventfld.word 0x02 1. "     NFED                     ,Non-fatal error detected" "Not detected,Detected"
eventfld.word 0x02 0. "   CED                       ,Correctable error detected" "Not detected,Detected"
rgroup.long 0x7C++0x03
line.long 0x00 "LINK_CAPABILITIES,PCI Express Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER              ,Port number"
bitfld.long 0x00 22. "             AOC                       ,ASPM optionality compliance" "0,1"
newline
bitfld.long 0x00 21. " LBWN                     ,Link bandwidth notification capable" "Not capable,Capable"
bitfld.long 0x00 20. "    DLLARC                    ,Data link layer active reporting capable" "Not capable,Capable"
newline
bitfld.long 0x00 19. " SD_ERR_RPT_CAP           ,Surprise down error reporting capable" "Not capable,Capable"
bitfld.long 0x00 18. "    CPM                       ,Clock power management" "0,1"
newline
bitfld.long 0x00 15.--17. " L1_EX_LAT                ,L1 exit latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "              L0S_EX_LAT                ,L0s exit latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--11. " ASPM                     ,Active state power management (ASPM) support" "0,1,2,3"
bitfld.long 0x00 4.--9. "              MAX_LINK_W                ,Maximum link width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--3. " MAX_LINK_SP              ,Maximum link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==0x000)
group.word 0x80++0x03
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 5. "     RL                       ,Retrain link" "No effect,Initiated"
bitfld.word 0x00 4. "      LD                        ,Link disable" "No,Yes"
newline
bitfld.word 0x00 3. "     RCB                      ,Read completion boundary" "0,1"
bitfld.word 0x00 0.--1. "              ASPM_CTL                  ,Active state power management (ASPM) control" "0,1,2,3"
line.word 0x02 "LINK_STATUS,PCI Express Link Status Register"
eventfld.word 0x02 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
eventfld.word 0x02 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
rbitfld.word 0x02 12. "     SCC                      ,Slot clock configuration" "0,1"
rbitfld.word 0x02 11. "              LT                        ,Link training" "0,1"
newline
rbitfld.word 0x02 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,?..."
rbitfld.word 0x02 0.--3. "             LINK_SP                   ,Current link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
rgroup.long 0x84++0x03
line.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER     ,Indicates the physical slot number attached to this port"
bitfld.long 0x00 18. "           NOCMDCPLSUP               ,No command completed support" "0,1"
newline
bitfld.long 0x00 17. " EMIP                     ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "    SPLS                      ,Slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 7.--14. 1. " SPLV                     ,Scale power limit value"
bitfld.long 0x00 6. "           HPD                       ,Hot plug capable" "Not capable,Capable"
newline
bitfld.long 0x00 5. " HPS                      ,Hot plug surprise" "0,1"
bitfld.long 0x00 4. "              PIP                       ,Power indicator present" "Not present,Present"
newline
bitfld.long 0x00 3. " AIP                      ,Attention indicator present" "Not present,Present"
bitfld.long 0x00 2. "    MRLSP                     ,MRL sensor present" "Not present,Present"
newline
bitfld.long 0x00 1. " PCP                      ,Power controller present" "Not present,Present"
bitfld.long 0x00 0. "    ABP                       ,Attention button present" "Not present,Present"
group.word 0x88++0x07
line.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
bitfld.word 0x00 12. "     DLLSTCHGEN               ,Data link layer state changed enable" "Disabled,Enabled"
bitfld.word 0x00 11. "       EMICTL                    ,Electromechanical interlock control" "0,1"
newline
bitfld.word 0x00 10. "     PCC                      ,Power controller control" "0,1"
bitfld.word 0x00 8.--9. "              PIC                       ,Power indicator control" ",On,Blink,Off"
newline
bitfld.word 0x00 6.--7. "     AIC                      ,Attention indicator control" ",On,Blink,Off"
bitfld.word 0x00 5. "          HPIE                      ,Hot plug interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 4. "     CCIE                     ,Command completed interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. "       PDCE                      ,Presence detect changed enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     MRLSCE                   ,MRL sensor changed enable" "Disabled,Enabled"
bitfld.word 0x00 1. "       PFDE                      ,Power fault detected enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     ABPE                     ,Attention button pressed enable" "Disabled,Enabled"
line.word 0x02 "SLOT_STATUS,PCI Express Slot Status Register"
eventfld.word 0x02 8. "     DLLSTCHG                 ,Data link layer state changed" "Not changed,Changed"
rbitfld.word 0x02 7. "    EM_IL_ST                  ,Electromechanical interlock status" "0,1"
newline
rbitfld.word 0x02 6. "     PDS                      ,Indicates presence of an adapter in the slot" "Not present,Present"
rbitfld.word 0x02 5. "    MRLSS                     ,MRL sensor state" "Closed,Open"
newline
eventfld.word 0x02 4. "     CC                       ,Command completed" "Not completed,Completed"
eventfld.word 0x02 3. "  PDC                       ,Presence detect changed" "Not changed,Changed"
newline
eventfld.word 0x02 2. "     MRLSC                    ,MRL sensor changed" "Not changed,Changed"
eventfld.word 0x02 1. "    PFD                       ,Power fault detected" "Not detected,Detected"
newline
eventfld.word 0x02 0. "     ABP                      ,Attention button pressed" "Not pressed,Pressed"
line.word 0x04 "ROOT_CONTROL,PCI Express Root Control Register"
bitfld.word 0x04 4. "     CRSSWVE                  ,CRS software visibility enable" "Disabled,Enabled"
bitfld.word 0x04 3. "       PMEIE                     ,PME interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x04 2. "     SEFEE                    ,System error on fatal error enable" "Disabled,Enabled"
bitfld.word 0x04 1. "       SENFEE                    ,System error on non-fatal error enable" "Disabled,Enabled"
newline
bitfld.word 0x04 0. "     SECEE                    ,System error on correctable error enable" "Disabled,Enabled"
line.word 0x06 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
bitfld.word 0x06 0. "     CRSSWV                   ,CRS software visibility" "Not visible,Visible"
group.long 0x90++0x03
line.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
bitfld.long 0x00 17. " PMEP                     ,PME pending" "Not pending,Pending"
eventfld.long 0x00 16. "    PMES                      ,PME status" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " PME_REQUESTER_ID         ,PME requester ID"
else
group.word 0x80++0x01
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 4. "     LD                       ,Link disable" "No,Yes"
bitfld.word 0x00 3. "            RCB                       ,Read completion boundary" "0,1"
newline
bitfld.word 0x00 0.--1. "     ASPM_CTL                 ,Active state power management (ASPM) control" "0,1,2,3"
rgroup.word 0x82++0x01
line.word 0x00 "LINK_STATUS,PCI Express Link Status Register"
bitfld.word 0x00 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
bitfld.word 0x00 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
bitfld.word 0x00 12. "     SCC                      ,Slot clock configuration" "0,1"
bitfld.word 0x00 11. "              LT                        ,Link training" "0,1"
newline
bitfld.word 0x00 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,,,,x8,?..."
bitfld.word 0x00 0.--3. "             LINK_SP                   ,Negotiated link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
hgroup.long 0x84++0x03
hide.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hgroup.word 0x88++0x01
hide.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
hgroup.word 0x8A++0x01
hide.word 0x00 "SLOT_STATUS,PCI Express Slot Status Register"
hgroup.word 0x8C++0x01
hide.word 0x00 "ROOT_CONTROL,PCI Express Root Control Register"
hgroup.word 0x8E++0x01
hide.word 0x00 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
hgroup.long 0x90++0x03
hide.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
endif
rgroup.long 0x94++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,PCI Express Device Capabilities 2 Register"
bitfld.long 0x00 5. " ARI_FWD                  ,ARI forwarding supported" "Not supported,Supported"
bitfld.long 0x00 4. "  CPL_TO_DS                 ,Completion timeout disable supported" "Not supported,Supported"
newline
bitfld.long 0x00 0.--3. " CPL_TO_RS                ,Completion timeout ranges supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x98++0x01
line.word 0x00 "DEVICE_CONTROL_2,PCI Express Device Control 2 Register"
bitfld.word 0x00 9. "     IDO_CPL_EN               ,IDO completion enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       IDO_REQ_EN                ,IDO request enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5. "     ARIFE                    ,ARI forwarding enable" "Disabled,Enabled"
bitfld.word 0x00 4. "       CPL_TOD                   ,Completion timeout disable" "No,Yes"
newline
bitfld.word 0x00 0.--3. "     CPL_TO_VAL               ,Completion timeout value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x9C++0x03
line.long 0x00 "LINK_CAPABILITIES_2,PCI Express Link Capabilities 2 Register"
bitfld.long 0x00 8. " CROSSLINK_SUPPORTED      ,Crosslink supported" "Not supported,Supported"
hexmask.long.byte 0x00 1.--7. 1. "  SUPPORT_LINK_SPEED_VECTOR ,Supported link speeds vector"
group.word 0xA0++0x01
line.word 0x00 "LINK_CONTROL_2,PCI Express Link Control 2 Register"
bitfld.word 0x00 12.--15. "     CDE                      ,Compliance de-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 11. "             CSOS                      ,Compliance SOS" "0,1"
newline
bitfld.word 0x00 10. "     EMC                      ,Enter modified compliance" "0,1"
bitfld.word 0x00 7.--9. "              TXM                       ,Transmit margin" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 6. "     SDE                      ,Selectable de-emphasis" "0,1"
bitfld.word 0x00 5. "              HWASD                     ,Hardware autonomous speed disable" "No,Yes"
newline
bitfld.word 0x00 4. "     EC                       ,Enter compliance" "0,1"
bitfld.word 0x00 0.--3. "              T_LS                      ,Target link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word 0xA2++0x01
line.word 0x00 "LINK_STATUS_2,PCI Express Link Status 2 Register"
bitfld.word 0x00 5. "     LER                      ,Link equalization request" "Not requested,Requested"
bitfld.word 0x00 4. "  EP3S                      ,Equalization phase 3 complete" "Not complete,Complete"
newline
bitfld.word 0x00 3. "     EP2S                     ,Equalization phase 2 complete" "Not completed,Completed"
bitfld.word 0x00 2. "  EP1S                      ,Equalization phase 1 complete" "Not completed,Completed"
newline
bitfld.word 0x00 1. "     EC                       ,Equalization complete" "Not completed,Completed"
bitfld.word 0x00 0. "  DE_LVL                    ,Current de-emphasis level" "0,1"
tree.end
tree "Advanced Error Reporting Capability Structure"
width 41.
rgroup.word 0x100++0x01
line.word 0x00 "ADVANCED_ERROR_REPORTING_CAPABILITY_ID,PCI Express Advanced Error Reporting Capability ID Register"
group.long 0x104++0x17
line.long 0x00 "UNCORRECTABLE_ERROR_STATUS,PCI Express Uncorrectable Error Status Register"
eventfld.long 0x00 20. " URE                 ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "      ECRCE  ,ECRC error status" "No error,Error"
newline
eventfld.long 0x00 18. " MTLP                ,Malformed TLP status" "No error,Error"
eventfld.long 0x00 17. "      RXO    ,Receiver overflow status" "No error,Error"
newline
eventfld.long 0x00 16. " UC                  ,Unexpected completion status" "No error,Error"
eventfld.long 0x00 15. "      CA     ,Completer abort status" "No error,Error"
newline
eventfld.long 0x00 14. " CTO                 ,Completion timeout status" "No error,Error"
eventfld.long 0x00 13. "      FCPE   ,Flow control protocol error status" "No error,Error"
newline
eventfld.long 0x00 12. " PTLP                ,Poisoned TLP status" "No error,Error"
eventfld.long 0x00 4. "      DLPE   ,Data link protocol error status" "No error,Error"
line.long 0x04 "UNCORRECTABLE_ERROR_MASK,PCI Express Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UREM                ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "    ECRCEM ,ECRC error mask" "Not masked,Masked"
newline
bitfld.long 0x04 18. " MTLPM               ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "    RXOM   ,Receiver overflow mask" "Not masked,Masked"
newline
bitfld.long 0x04 16. " UCM                 ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "    CAM    ,Completer abort mask" "Not masked,Masked"
newline
bitfld.long 0x04 14. " CTOM                ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "    FCPEM  ,Flow control protocol error mask" "Not masked,Masked"
newline
bitfld.long 0x04 12. " PTLPM               ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "    DLPEM  ,Data link protocol error mask" "Not masked,Masked"
line.long 0x08 "UNCORRECTABLE_ERROR_SEVERITY,PCI Express Uncorrectable Error Severity Register"
bitfld.long 0x08 20. " URES                ,Unsupported request error severity" "Not severe,Severe"
bitfld.long 0x08 19. "    ECRCES ,ECRC error severity" "Not severe,Severe"
newline
bitfld.long 0x08 18. " MTLPS               ,Malformed TLP severity" "Not severe,Severe"
bitfld.long 0x08 17. "    RXOS   ,Receiver overflow severity" "Not severe,Severe"
newline
bitfld.long 0x08 16. " UCS                 ,Unexpected completion severity" "Not severe,Severe"
bitfld.long 0x08 15. "    CAS    ,Completer abort severity" "Not severe,Severe"
newline
bitfld.long 0x08 14. " CTOS                ,Completion timeout severity" "Not severe,Severe"
bitfld.long 0x08 13. "    FCPES  ,Flow control protocol error severity" "Not severe,Severe"
newline
bitfld.long 0x08 12. " PTLPS               ,Poisoned TLP severity" "Not severe,Severe"
bitfld.long 0x08 4. "    DLPES  ,Data link protocol error severity" "Not severe,Severe"
line.long 0x0C "CORRECTABLE_ERROR_STATUS,PCI Express Correctable Error Status Register"
eventfld.long 0x0C 13. " ADVNFE              ,Advisory non-fatal error status" "No error,Error"
eventfld.long 0x0C 12. "      RTTO   ,Replay timer timeout status" "No error,Error"
newline
eventfld.long 0x0C 8. " RNR                 ,REPLAY_NUM rollover status" "No error,Error"
eventfld.long 0x0C 7. "      BDLLP  ,Bad DLLP status" "No error,Error"
newline
eventfld.long 0x0C 6. " BTLP                ,Bad TLP status" "No error,Error"
eventfld.long 0x0C 0. "      RXE    ,Receiver error status" "No error,Error"
line.long 0x10 "CORRECTABLE_ERROR_MASK,PCI Express Correctable Error Mask Register"
bitfld.long 0x10 13. " ADVNFEM             ,Advisory non-fatal error mask" "Not masked,Masked"
bitfld.long 0x10 12. "    RTTOM  ,Replay timer timeout mask" "Not masked,Masked"
newline
bitfld.long 0x10 8. " RNRM                ,REPLAY_NUM rollover mask" "Not masked,Masked"
bitfld.long 0x10 7. "    BDLLPM ,Bad DLLP mask" "Not masked,Masked"
newline
bitfld.long 0x10 6. " BTLPM               ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x10 0. "    RXEM   ,Receiver error mask" "Not masked,Masked"
line.long 0x14 "ADVANCED_ERROR_CAPABILITIES_AND_CONTROL,PCI Express Advanced Error Capabilities And Control Register"
bitfld.long 0x14 8. " ECRCCE              ,ECRC checking enable" "Disabled,Enabled"
rbitfld.long 0x14 7. "      ECRCCC ,ECRC checking capable" "Not capable,Capable"
newline
bitfld.long 0x14 6. " ECRCGE              ,ECRC generation enable" "Disabled,Enabled"
rbitfld.long 0x14 5. "      ECRCGC ,ECRC generation capable" "Not capable,Capable"
newline
rbitfld.long 0x14 0.--4. " FIRST_ERROR_POINTER ,First error bit position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0x0F
line.long 0x00 "HEADER_LOG_DWORD1,PCI Express Header Log Register 1"
hexmask.long.byte 0x00 24.--31. 1. " BYTE_0              ,Byte 0 of the TLP header associated with the error"
hexmask.long.byte 0x00 16.--23. 1. "            BYTE_1 ,Byte 1 of the TLP header associated with the error"
newline
hexmask.long.byte 0x00 8.--15. 1. " BYTE_2              ,Byte 2 of the TLP header associated with the error"
hexmask.long.byte 0x00 0.--7. 1. "            BYTE_3 ,Byte 3 of the TLP header associated with the error"
line.long 0x04 "HEADER_LOG_DWORD2,PCI Express Header Log Register 2"
hexmask.long.byte 0x04 24.--31. 1. " BYTE_4              ,Byte 4 of the TLP header associated with the error"
hexmask.long.byte 0x04 16.--23. 1. "            BYTE_5 ,Byte 5 of the TLP header associated with the error"
newline
hexmask.long.byte 0x04 8.--15. 1. " BYTE_6              ,Byte 6 of the TLP header associated with the error"
hexmask.long.byte 0x04 0.--7. 1. "            BYTE_7 ,Byte 7 of the TLP header associated with the error"
line.long 0x08 "HEADER_LOG_DWORD3,PCI Express Header Log Register 3"
hexmask.long.byte 0x08 24.--31. 1. " BYTE_8              ,Byte 8 of the TLP header associated with the error"
hexmask.long.byte 0x08 16.--23. 1. "            BYTE_9 ,Byte 9 of the TLP header associated with the error"
newline
hexmask.long.byte 0x08 8.--15. 1. " BYTE_A              ,Byte 10 of the TLP header associated with the error"
hexmask.long.byte 0x08 0.--7. 1. "            BYTE_B ,Byte 11 of the TLP header associated with the error"
line.long 0x0C "HEADER_LOG_DWORD4,PCI Express Header Log Register 4"
hexmask.long.byte 0x0C 24.--31. 1. " BYTE_C              ,Byte 12 of the TLP header associated with the error"
hexmask.long.byte 0x0C 16.--23. 1. "            BYTE_D ,Byte 13 of the TLP header associated with the error"
newline
hexmask.long.byte 0x0C 8.--15. 1. " BYTE_E              ,Byte 14 of the TLP header associated with the error"
hexmask.long.byte 0x0C 0.--7. 1. "            BYTE_F ,Byte 15 of the TLP header associated with the error"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==0x000)
group.long 0x12C++0x07
line.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
bitfld.long 0x00 2. " FERE                ,Fatal error reporting enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NFERE  ,Non-fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CERE                ,Correctable error reporting enable" "Disabled,Enabled"
line.long 0x04 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
rbitfld.long 0x04 27.--31. " AEIMN               ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FEMR   ,Fatal error messages received" "Not received,Received"
newline
eventfld.long 0x04 5. " NFEMR               ,Non-fatal error messages received" "Not received,Received"
eventfld.long 0x04 4. "  FUF    ,First uncorrectable fatal" "0,1"
newline
eventfld.long 0x04 3. " MEFNFR              ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received"
eventfld.long 0x04 2. "  EFNFR  ,ERR_FATAL/NONFATAL received" "Not received,Received"
newline
eventfld.long 0x04 1. " MECR                ,Multiple ERR_COR received" "Not received,Received"
eventfld.long 0x04 0. "  ECR    ,ERR_COR received" "Not received,Received"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
hgroup.long 0x130++0x03
hide.long 0x00 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
endif
rgroup.word 0x134++0x03
line.word 0x00 "CORRECTABLE_ERROR_SOURCE_ID,PCI Express Correctable Error Source ID Register"
line.word 0x02 "ERROR_SOURCE_ID,PCI Express Error Source ID Register"
tree.end
width 28.
tree "Secondary PCI Express Capability Structure"
rgroup.long 0x148++0x03
line.long 0x00 "SPCIE_CAP_HEADER_REG,Secondary PCIE Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_OFFSET        ,Pointer to the next capability structure"
bitfld.long 0x00 16.--19. "          CAP_VERSION   ,Indicates the version of the capability structure present" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAP_ID    ,Secondary PCI express capability"
group.long 0x14C++0x07
line.long 0x00 "LINK_CONTROL3_REG,Link Control 3 Register"
bitfld.long 0x00 1. " EQ_REQ_INT_EN      ,Link equalization request interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      PERFORM_EQ    ,Perform equalization" "Not performed,Performed"
line.long 0x04 "LANE_ERR_STATUS_REG,Lane Error Status Register"
eventfld.long 0x04 3. " LANE_ERR_STATUS[3] ,Lane 4 detected a lane-based error" "No error,Error"
eventfld.long 0x04 2. "      [2]           ,Lane 3 detected a lane-based error" "No error,Error"
newline
eventfld.long 0x04 1. " [1]                ,Lane 2 detected a lane-based error" "No error,Error"
eventfld.long 0x04 0. "      [0]           ,Lane 1 detected a lane-based error" "No error,Error"
rgroup.word (0x154+0x0)++0x01
line.word 0x00 "LANE1_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x2)++0x01
line.word 0x00 "LANE2_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x4)++0x01
line.word 0x00 "LANE3_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x6)++0x01
line.word 0x00 "LANE4_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree "PEX Module Internal Configuration Space"
width 39.
group.long 0x71C++0x03
line.long 0x00 "SYMBOL_TIMER_FILTER_1_OFF,Symbol Timer And Filter Mask 1 Register"
bitfld.long 0x00 31. " CX_FLT_MASK_RC_CFG_DISCARD     ,CX_FLT_MASK_RC_CFG_DISCARD" "Not masked,Masked"
bitfld.long 0x00 30. "                  CX_FLT_MASK_RC_IO_DISCARD    ,CX_FLT_MASK_RC_IO_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 29. " CX_FLT_MASK_MSG_DROP           ,CX_FLT_MASK_MSG_DROP" "Not masked,Masked"
bitfld.long 0x00 28. "                  CX_FLT_MASK_CPL_ECRC_DISCARD ,CX_FLT_MASK_CPL_ECRC_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 27. " CX_FLT_MASK_ECRC_DISCARD       ,CX_FLT_MASK_ECRC_DISCARD" "Not masked,Masked"
bitfld.long 0x00 26. "                  CX_FLT_MASK_CPL_LEN_MATCH    ,CX_FLT_MASK_CPL_LEN_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 25. " CX_FLT_MASK_CPL_ATTR_MATCH     ,CX_FLT_MASK_CPL_ATTR_MATCH" "Not masked,Masked"
bitfld.long 0x00 24. "                  CX_FLT_MASK_CPL_TC_MATCH     ,CX_FLT_MASK_CPL_TC_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 23. " CX_FLT_MASK_CPL_FUNC_MATCH     ,CX_FLT_MASK_CPL_FUNC_MATCH" "Not masked,Masked"
bitfld.long 0x00 22. "                  CX_FLT_MASK_CPL_REQID_MATCH  ,CX_FLT_MASK_CPL_REQID_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 21. " CX_FLT_MASK_CPL_TAGERR_MATCH   ,CX_FLT_MASK_CPL_TAGERR_MATCH" "Not masked,Masked"
bitfld.long 0x00 20. "                  CX_FLT_MASK_LOCKED_RD_AS_UR  ,CX_FLT_MASK_LOCKED_RD_AS_UR" "Not masked,Masked"
newline
bitfld.long 0x00 19. " CX_FLT_MASK_CFG_TYPE1_RE_AS_UR ,CX_FLT_MASK_CFG_TYPE1_RE_AS_UR" "Not masked,Masked"
bitfld.long 0x00 18. "                  CX_FLT_MASK_UR_OUTSIDE_BAR   ,CX_FLT_MASK_UR_OUTSIDE_BAR" "Not masked,Masked"
newline
bitfld.long 0x00 17. " CX_FLT_MASK_UR_POIS            ,CX_FLT_MASK_UR_POIS" "Not masked,Masked"
bitfld.long 0x00 16. "                  CX_FLT_MASK_UR_FUNC_MISMATCH ,CX_FLT_MASK_UR_FUNC_MISMATCH" "Not masked,Masked"
newline
bitfld.long 0x00 15. " DISABLE_FC_WD_TIMER            ,Disables FC watchdog timer" "No,Yes"
hexmask.long.word 0x00 0.--10. 1. "                         SKP_INT_VAL                  ,SKP interval value"
group.long 0x890++0x03
line.long 0x00 "GEN3_RELATED_OFF,Gen3 Control Register"
bitfld.long 0x00 16. " GEN3_EQUALIZATION_DIS          ,Equalization disable" "No,Yes"
bitfld.long 0x00 12. "                         RXEQ_PH01_EN                 ,Rx equalization phase 0/1 hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " EQ_EIEOS_CNT                   ,Equalization EIEOS count reset disable" "No,Yes"
group.long 0x8BC++0x03
line.long 0x00 "MISC_CONTROL_1_OFF,DBI Read-Only Write Enable Register"
bitfld.long 0x00 0. " DBI_RO_WR_EN                   ,Write to RO registers using DBI" "Disabled,Enabled"
group.long 0x8E0++0x07
line.long 0x00 "COHERENCY_CONTROL_1_OFF,Coherency Control 1"
hexmask.long 0x00 2.--31. 0x04 " CFG_MEMTYPE_BOUNDARY_LOW_ADDR  ,Boundary lower address for memory type"
bitfld.long 0x00 0. "                    CFG_MEMTYPE_VALUE            ,Memory type" "CCSR/Memory,?..."
line.long 0x04 "COHERENCY_CONTROL_2_OFF,Coherency Control 2"
group.long 0x900++0x03
line.long 0x00 "IATU_VIEWPORT_OFF,IATU Index Register"
bitfld.long 0x00 31. " REGION_DIR                     ,Region direction" "Outbound,Inbound"
hexmask.long.byte 0x00 0.--7. 1. "                    REGION_INDEX                 ,Region index"
if (((per.l(ad:0x03400000+0x900))&0x80000000)==0x80000000)
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==(0x10<<1))
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 19. "  FUNC_NUM_MATCH_EN            ,Function number match enable" "Disabled,Enabled"
newline
bitfld.long 0x04 18. " AT_MATCH_EN                    ,AT match enable" "Disabled,Enabled"
bitfld.long 0x04 8.--10. "                    BAR_NUM                      ,BAR number" "BAR 0,BAR 1,BAR 2,BAR 3,BAR 4,BAR 5,ROM,?..."
else
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 18. "  AT_MATCH_EN                  ,AT match enable" "Disabled,Enabled"
endif
group.long 0x90C++0x13
line.long 0x00 "IATU_LWR_BASE_ADDR_OFF_INBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x00 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x04 "IATU_UPPER_BASE_ADDR_OFF_INBOUND_0,IATU Upper Base Address Register"
line.long 0x08 "IATU_LIMIT_ADDR_OFF_INBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x08 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x08 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x0C "IATU_LWR_TARGET_ADDR_OFF_INBOUND_0,IATU Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x10 "IATU_UPPER_TARGET_ADDR_OFF_INBOUND_0,IATU Upper Target Address Register"
else
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1.))==(0x10<<1.))
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0x908++0x17
line.long 0x00 "IATU_REGION_CTRL_2_OFF_OUTBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x00 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                    CFG_SHIFT_MODE               ,CFG shift mode" "Not shifted,Shifted"
newline
hexmask.long.byte 0x00 0.--7. 1. " MSG_CODE                       ,Message code"
line.long 0x04 "IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x04 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x04 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x08 "IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0,IATU Upper Base Address Register"
line.long 0x0C "IATU_LIMIT_ADDR_OFF_OUTBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x10 "IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0,IATU Outbound Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x10 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x10 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x14 "IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0,IATU Upper Target Address Register"
endif
tree.end
tree "Base Address"
wgroup.long 0x1010++0x07
line.long 0x00 "BAR0_MASK,Base Address 0 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR1_MASK,Base Address 1 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<1))==(0x10<<1))
wgroup.long 0x1018++0x0F
line.long 0x00 "BAR2_MASK,Base Address 2 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR3_MASK,Base Address 3 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x08 "BAR4_MASK,Base Address 4 Mask Register"
hexmask.long 0x08 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x08 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x0C "BAR5_MASK,Base Address 5 Mask Register"
hexmask.long 0x0C 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x0C 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
wgroup.long 0x1030++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
else
wgroup.long 0x1038++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long.tbyte 0x00 11.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                      BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
endif
tree.end
base ad:0x03400000+0x10000
width 22.
tree "PEX1_LUT Memory Map/Registers"
group.long 0x20++0x07
line.long 0x00 "PEX_LUT_PEXLSR,PEX LUT Status Register"
eventfld.long 0x00 31. " LUTM      ,Lookup table miss" "Not missed,Missed"
eventfld.long 0x00 30. "         MLUTM   ,Multiple lookup table miss" "Not missed,Missed"
newline
hexmask.long.word 0x00 0.--15. 1. " CREQID    ,Captured REQID"
line.long 0x04 "PEX_LUT_PEXLCR,PEX LUT Control Register"
bitfld.long 0x04 31. " DPL       ,Default privilege level" "0,1"
bitfld.long 0x04 30. "                  DBMT    ,Default bypass memory translation" "0,1"
newline
hexmask.long.word 0x04 0.--14. 1. " DICID     ,Default isolation context ID"
group.long (0x800+0x0)++0x07
line.long 0x00 "PEX_LUT_PEXL1UDR,PEX LUT Entry 1 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 1 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 1 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL1LDR,PEX LUT Entry 1 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 1 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 1 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x8)++0x07
line.long 0x00 "PEX_LUT_PEXL2UDR,PEX LUT Entry 2 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 2 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 2 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL2LDR,PEX LUT Entry 2 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 2 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 2 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x10)++0x07
line.long 0x00 "PEX_LUT_PEXL3UDR,PEX LUT Entry 3 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 3 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 3 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL3LDR,PEX LUT Entry 3 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 3 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 3 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x18)++0x07
line.long 0x00 "PEX_LUT_PEXL4UDR,PEX LUT Entry 4 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 4 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 4 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL4LDR,PEX LUT Entry 4 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 4 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 4 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x20)++0x07
line.long 0x00 "PEX_LUT_PEXL5UDR,PEX LUT Entry 5 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 5 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 5 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL5LDR,PEX LUT Entry 5 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 5 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 5 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x28)++0x07
line.long 0x00 "PEX_LUT_PEXL6UDR,PEX LUT Entry 6 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 6 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 6 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL6LDR,PEX LUT Entry 6 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 6 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 6 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x30)++0x07
line.long 0x00 "PEX_LUT_PEXL7UDR,PEX LUT Entry 7 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 7 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 7 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL7LDR,PEX LUT Entry 7 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 7 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 7 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x38)++0x07
line.long 0x00 "PEX_LUT_PEXL8UDR,PEX LUT Entry 8 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 8 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 8 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL8LDR,PEX LUT Entry 8 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 8 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 8 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x40)++0x07
line.long 0x00 "PEX_LUT_PEXL9UDR,PEX LUT Entry 9 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 9 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 9 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL9LDR,PEX LUT Entry 9 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 9 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 9 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x48)++0x07
line.long 0x00 "PEX_LUT_PEXL10UDR,PEX LUT Entry 10 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 10 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 10 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL10LDR,PEX LUT Entry 10 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 10 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 10 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x50)++0x07
line.long 0x00 "PEX_LUT_PEXL11UDR,PEX LUT Entry 11 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 11 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 11 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL11LDR,PEX LUT Entry 11 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 11 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 11 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x58)++0x07
line.long 0x00 "PEX_LUT_PEXL12UDR,PEX LUT Entry 12 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 12 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 12 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL12LDR,PEX LUT Entry 12 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 12 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 12 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x60)++0x07
line.long 0x00 "PEX_LUT_PEXL13UDR,PEX LUT Entry 13 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 13 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 13 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL13LDR,PEX LUT Entry 13 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 13 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 13 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x68)++0x07
line.long 0x00 "PEX_LUT_PEXL14UDR,PEX LUT Entry 14 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 14 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 14 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL14LDR,PEX LUT Entry 14 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 14 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 14 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x70)++0x07
line.long 0x00 "PEX_LUT_PEXL15UDR,PEX LUT Entry 15 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 15 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 15 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL15LDR,PEX LUT Entry 15 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 15 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 15 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x78)++0x07
line.long 0x00 "PEX_LUT_PEXL16UDR,PEX LUT Entry 16 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 16 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 16 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL16LDR,PEX LUT Entry 16 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 16 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 16 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x80)++0x07
line.long 0x00 "PEX_LUT_PEXL17UDR,PEX LUT Entry 17 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 17 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 17 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL17LDR,PEX LUT Entry 17 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 17 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 17 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x88)++0x07
line.long 0x00 "PEX_LUT_PEXL18UDR,PEX LUT Entry 18 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 18 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 18 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL18LDR,PEX LUT Entry 18 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 18 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 18 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x90)++0x07
line.long 0x00 "PEX_LUT_PEXL19UDR,PEX LUT Entry 19 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 19 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 19 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL19LDR,PEX LUT Entry 19 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 19 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 19 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x98)++0x07
line.long 0x00 "PEX_LUT_PEXL20UDR,PEX LUT Entry 20 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 20 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 20 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL20LDR,PEX LUT Entry 20 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 20 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 20 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA0)++0x07
line.long 0x00 "PEX_LUT_PEXL21UDR,PEX LUT Entry 21 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 21 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 21 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL21LDR,PEX LUT Entry 21 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 21 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 21 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA8)++0x07
line.long 0x00 "PEX_LUT_PEXL22UDR,PEX LUT Entry 22 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 22 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 22 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL22LDR,PEX LUT Entry 22 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 22 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 22 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB0)++0x07
line.long 0x00 "PEX_LUT_PEXL23UDR,PEX LUT Entry 23 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 23 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 23 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL23LDR,PEX LUT Entry 23 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 23 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 23 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB8)++0x07
line.long 0x00 "PEX_LUT_PEXL24UDR,PEX LUT Entry 24 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 24 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 24 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL24LDR,PEX LUT Entry 24 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 24 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 24 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC0)++0x07
line.long 0x00 "PEX_LUT_PEXL25UDR,PEX LUT Entry 25 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 25 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 25 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL25LDR,PEX LUT Entry 25 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 25 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 25 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC8)++0x07
line.long 0x00 "PEX_LUT_PEXL26UDR,PEX LUT Entry 26 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 26 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 26 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL26LDR,PEX LUT Entry 26 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 26 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 26 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD0)++0x07
line.long 0x00 "PEX_LUT_PEXL27UDR,PEX LUT Entry 27 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 27 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 27 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL27LDR,PEX LUT Entry 27 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 27 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 27 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD8)++0x07
line.long 0x00 "PEX_LUT_PEXL28UDR,PEX LUT Entry 28 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 28 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 28 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL28LDR,PEX LUT Entry 28 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 28 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 28 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE0)++0x07
line.long 0x00 "PEX_LUT_PEXL29UDR,PEX LUT Entry 29 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 29 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 29 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL29LDR,PEX LUT Entry 29 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 29 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 29 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE8)++0x07
line.long 0x00 "PEX_LUT_PEXL30UDR,PEX LUT Entry 30 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 30 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 30 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL30LDR,PEX LUT Entry 30 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 30 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 30 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF0)++0x07
line.long 0x00 "PEX_LUT_PEXL31UDR,PEX LUT Entry 31 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 31 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 31 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL31LDR,PEX LUT Entry 31 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 31 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 31 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF8)++0x07
line.long 0x00 "PEX_LUT_PEXL32UDR,PEX LUT Entry 32 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 32 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 32 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL32LDR,PEX LUT Entry 32 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 32 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 32 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF 0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,Per PF dependent message interrupt is pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,Per PF dependent error interrupt is pending" "Not pending,Pending"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,PF dependent message interrupt pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,PF dependent error interrupt pending" "Not pending,Pending"
group.long 0x40020++0x0F
line.long 0x00 "PEX_PF0_PME_MES_DR,PEX PF 0 PCIE PME And Message Detect Register"
eventfld.long 0x00 15. " PTO       ,Indicates that PME turn off was detected" "Not detected,Detected"
eventfld.long 0x00 13. "       ENL23   ,Indicates that PCIe core entered L2/L3 ready state" "Not detected,Detected"
newline
eventfld.long 0x00 12. " EXL23     ,Indicates that PCIe core exited L2/L3 ready state" "Not detected,Detected"
eventfld.long 0x00 10. "       HRD     ,Indicates a hot reset was detected" "Not detected,Detected"
newline
eventfld.long 0x00 9. " LDD       ,Indicates a link down was detected" "Not detected,Detected"
eventfld.long 0x00 7. "       LUD     ,Indicates a link up was detected" "Not detected,Detected"
line.long 0x04 "PEX_PF0_PME_MES_DISR,PEX PF 0 PCIE PME And Message Disable Register"
bitfld.long 0x04 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x04 13. "                ENL23D  ,Entered L2/L3 ready state detect disabled" "No,Yes"
newline
bitfld.long 0x04 12. " EXL23D    ,Exited L2/L3 ready state detect disable" "No,Yes"
bitfld.long 0x04 10. "                HRDD    ,Hot reset detect disable" "No,Yes"
newline
bitfld.long 0x04 9. " LDDD      ,Link down detect disable" "No,Yes"
bitfld.long 0x04 7. "                LUDD    ,Link up detect disable" "No,Yes"
line.long 0x08 "PEX_PF0_PME_MES_IER,PEX PF 0 PCIE PME And Message Interrupt Enable Register"
bitfld.long 0x08 15. " PTOIE     ,PME turn off interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 13. "           ENL23IE ,Entered L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 12. " EXL23IE   ,Exited L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 10. "           HRDIE   ,Hot reset detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 9. " LDDIE     ,Link down detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 7. "           LUDIE   ,Link up detect interrupt enabled" "Disabled,Enabled"
line.long 0x0C "PEX_PF0_MCR,PEX PF 0 PCIE Message Command Register"
bitfld.long 0x0C 4. " INTX      ,Assert/de-assert intx command" "Not asserted,Asserted"
bitfld.long 0x0C 2. "       SPMES   ,Send PM_PME command" "No effect,Send"
newline
bitfld.long 0x0C 1. " EXL2S     ,Exit L2 state command" "No effect,Generate"
bitfld.long 0x0C 0. "          PTOMR   ,Generate PME turn off message (RC only)" "No effect,Generate"
group.long 0x40140++0x03
line.long 0x00 "PEX_PF0_RBP_ADDR_U,PEX PF 0 Route By Port Address Upper Register"
hexmask.long.word 0x00 16.--31. 1. " ADDR_U    ,Upper 16 bit of the PCIE slave device used for the outbound transactions"
group.long 0x40200++0x03
line.long 0x00 "PEX_PF0_ERR_DR,PEX PF 0 PCIE Error Detect Register"
eventfld.long 0x00 31. " ME        ,Indicates multiple errors of same type" "Not detected,Detected"
eventfld.long 0x00 23. "       PCT     ,Indicates completion timeout" "Not detected,Detected"
newline
eventfld.long 0x00 21. " PCAC      ,Completer abort was detected" "Not detected,Detected"
eventfld.long 0x00 19. "       CDNSC   ,Completion with data not succsessful was detected" "Not detected,Detected"
newline
eventfld.long 0x00 2. " UREP      ,Indicates an unsupported request completion was detected" "Not detected,Detected"
group.long 0x40208++0x03
line.long 0x00 "PEX_PF0_ERR_EN,PEX PF 0 PCIE Error Interrupt Enable Register"
bitfld.long 0x00 23. " PCTIE     ,Completion timeout interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "           PCACIE  ,Completer abort interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CDNSCIE   ,Completion with data not successful interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           UREPIE  ,Unsupported request in EP mode interrupt enable" "Disabled,Enabled"
group.long 0x40210++0x03
line.long 0x00 "PEX_PF0_ERR_DISR,PEX PF 0 PCIE Error Disable Register"
eventfld.long 0x00 31. " MED       ,Multiple errors of same type detection disable" "No,Yes"
bitfld.long 0x00 23. "                PCTD    ,Completion detection disable" "No,Yes"
newline
bitfld.long 0x00 21. " PCACD     ,Completer abort detection disable" "No,Yes"
bitfld.long 0x00 19. "                CDNSCD  ,Completion with data not successful detection disable" "No,Yes"
newline
bitfld.long 0x00 2. " UREPD     ,Unsupported request in EP mode detection disable" "No,Yes"
group.long 0x407FC++0x03
line.long 0x00 "PEX_PF0_DBG,PEX PF0 Debug Register"
bitfld.long 0x00 31. " WE        ,Write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "           SR      ,Soft reset" "No reset,Reset"
newline
rbitfld.long 0x00 0.--5. " LTSSM     ,Link training status state machine (LTSSM) status" "DETECT_QUIET,DETECT_ACTIVE,POLL_ACTIVE,POLL_COMPLIANCE,POLL_CONFIG,PRE_DETECT_QUIET,DETECT_WAIT,CFG_LINKWD_START,CFG_LINKWD_ACEPT,CFG_LANENUM_WAIT,CFG_LANENUM_ACEPT,CFG_COMPLETE,CFG_IDLE,RCVRY_LOCK,RCVRY_SPEED,RCVRY_RCVRCFG,RCVRY_IDLE,L0,L0S,L123_SEND_EIDLE,L1_IDLE,L2_IDLE,L2_WAKE,DISABLED_ENTRY,DISABLED_IDLE,DISABLED,LPBK_ENTRY,LPBK_ACTIVE,LPBK_EXIT,LPBK_EXIT_TIMEOUT,HOT_RESET_ENTRY,HOT_RESET,RCVRY_EQ0,RCVRY_EQ1,RCVRY_EQ2,RCVRY_EQ3,?..."
tree.end
width 0x0B
tree.end
tree "PEX 2"
base ad:0x03500000
width 34.
tree "Configuration Header"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2.))==(0x10<<2.))
group.word 0x00++0x07 "Type 0 [EP mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x17
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x04 "BAR1,PCI Express Base Address Register 1"
hexmask.long.tbyte 0x04 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x04 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x04 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x04 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x08 "BAR2,PCI Express Base Address Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x08 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x08 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,,Locate anywhere/64-bit,?..."
bitfld.long 0x08 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x0C "BAR3,PCI Express Base Address Register 3"
line.long 0x10 "BAR4,PCI Express Base Address Register 4"
hexmask.long.tbyte 0x10 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x10 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x10 1.--2. " TYPE                  ,Type" ",,Locate anywhere/64-bit,?..."
bitfld.long 0x10 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x14 "BAR5,PCI Express Base Address Register 5"
rgroup.word 0x2C++0x03
line.word 0x00 "SUBSYSTEM_VENDOR_ID,PCI Express Subsystem Vendor ID Register"
line.word 0x02 "SUBSYSTEM_ID,PCI Express Subsystem ID Register"
group.long 0x30++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x02
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
line.byte 0x01 "MINIMUM_GRANT,PCI Express Minimum Grant Register"
line.byte 0x02 "MAXIMUM_LATENCY,PCI Express Maximum Latency Register"
else
group.word 0x00++0x07 "Type 1 [RC mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x03
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
group.byte 0x18++0x02
line.byte 0x00 "PRIMARY_BUS_NUMBER,PCI Express Primary Bus Number Register"
line.byte 0x01 "SECONDARY_BUS_NUMBER,PCI Express Secondary Bus Number Register"
line.byte 0x02 "SUBORDINATE_BUS_NUMBER,PCI Express Subordinate Bus Number Register"
group.byte 0x1C++0x01
line.byte 0x00 "I/O_BASE,PCI Express I/O Base Register"
hexmask.byte 0x00 4.--7. 0x10 "     I/O_START_ADDRESS     ,Specifies bits 15:12 of the I/O space start address"
rbitfld.byte 0x00 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
line.byte 0x01 "I/O_LIMIT,PCI Express I/O Limit Register"
hexmask.byte 0x01 4.--7. 0x10 "     I/O_LIMIT_ADDRESS     ,Specifies bits 15:12 of the I/O space ending address"
rbitfld.byte 0x01 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
group.word 0x1E++0x09
line.word 0x00 "SECONDARY_STATUS,PCI Express Secondary Status Register"
eventfld.word 0x00 15. "     DPE                   ,Detected parity error" "Not detected,Detected"
eventfld.word 0x00 14. "            SSE                               ,Signalled system error" "Not signalled,Signalled"
newline
eventfld.word 0x00 13. "     RMA                   ,Received master abort" "Not received,Received"
eventfld.word 0x00 12. "            RTA                               ,Received targed abort" "Not received,Received"
newline
eventfld.word 0x00 11. "     STA                   ,Signalled target abort" "Not signalled,Signalled"
eventfld.word 0x00 8. "           MDPE                              ,Master data parity error" "No error,Error"
line.word 0x02 "MEMORY_BASE,PCI Express Memory Base Register"
hexmask.word 0x02 4.--15. 0x10 "     MEMORY_BASE           ,Specifies bits 31:20 of the non-prefetchable memory space start address"
line.word 0x04 "MEMORY_LIMIT,PCI Express Memory Limit Register"
hexmask.word 0x04 4.--15. 0x10 "     MEMORY_LIMIT          ,Specifies bits 31:20 of the non-prefetchable memory space ending address"
line.word 0x06 "PREFETCHABLE_MEMORY_BASE,PCI Express Prefetchable Memory Base Register"
hexmask.word 0x06 4.--15. 0x10 "     PF_MEMORY_BASE        ,Specifies bits 31:20 of the prefetchable memory space start address"
rbitfld.word 0x06 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
line.word 0x08 "PREFETCHABLE_MEMORY_LIMIT,PCI Express Prefetchable Memory Limit Register"
hexmask.word 0x08 4.--15. 0x10 "     PF_MEMORY_LIMIT       ,Specifies bits 31:20 of the prefetchable memory space ending address"
rbitfld.word 0x08 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
group.long 0x28++0x07
line.long 0x00 "PREFETCHABLE_BASE_UPPER_32_BITS,PCI Express Prefetchable Base Upper 32 Bits Register"
line.long 0x04 "PREFETCHABLE_LIMIT_UPPER_32_BITS,PCI Express Prefetchable Limit Upper 32 Bits Register"
rgroup.word 0x30++0x03
line.word 0x00 "I/O_BASE_UPPER_16_BITS,PCI Express I/O Base Upper 16 Bits Register"
line.word 0x02 "I/O_LIMIT_UPPER_16_BITS,PCI Express I/O Limit Upper 16 Bits Register"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.long 0x38++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x00
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
group.word 0x3E++0x01
line.word 0x00 "BRIDGE_CONTROL,PCI Express Bridge Control Register"
bitfld.word 0x00 6. "     SCND_RST              ,Secondary bus reset" "No reset,Reset"
bitfld.word 0x00 3. "                VGA_EN                            ,VGA enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     ISA_EN                ,ISA enable" "Disabled,Enabled"
bitfld.word 0x00 1. "                SERR_EN                           ,SERR enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     PER                   ,Parity error response" "No response,Response"
endif
tree.end
tree "Power Management Capability Structure"
width 38.
rgroup.byte 0x40++0x00
line.byte 0x00 "POWER_MANAGEMENT_CAPABILITY_ID,PCI Express Power Management Capability ID Register"
rgroup.word 0x42++0x01
line.word 0x00 "POWER_MANAGEMENT_CAPABILITIES,PCI Express Power Management Capabilities Register"
bitfld.word 0x00 15. "     PME_SUPPORT[4] ,PME power state support bit 4" "Not supported,Supported"
bitfld.word 0x00 14. "  [3]        ,PME power state support bit 3" "Not supported,Supported"
newline
bitfld.word 0x00 13. "     [2]            ,PME power state support bit 2" "Not supported,Supported"
bitfld.word 0x00 12. "  [1]        ,PME power state support bit 1" "Not supported,Supported"
newline
bitfld.word 0x00 11. "     [0]            ,PME power state support bit 0" "Not supported,Supported"
bitfld.word 0x00 10. "  D2         ,D2 support" "Not supported,Supported"
newline
bitfld.word 0x00 9. "     D1             ,D1 support" "Not supported,Supported"
bitfld.word 0x00 6.--8. "  AUX_CURR   ,AUX current" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 5. "     DSI            ,Device specific initialization" "0,1"
bitfld.word 0x00 3. "              PME_CLK    ,PME clock" "0,1"
newline
bitfld.word 0x00 0.--2. "     VERSION        ,Version of the specification" "0,1,2,3,4,5,6,7"
group.word 0x44++0x01
line.word 0x00 "POWER_MANAGEMENT_STATUS_AND_CONTROL,PCI Express Power Management Status And Control Register"
eventfld.word 0x00 15. "     PME_STAT       ,PME status" "0,1"
bitfld.word 0x00 13.--14. "              DATA_SCALE ,Data scale field" "0,1,2,3"
newline
bitfld.word 0x00 9.--12. "     DATA_SELECT    ,Data select field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 8. "             PME_EN     ,PME enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0.--1. "     POWER_STATE    ,Indicates the current power state of the function" "D0,D1,D2,D3"
rgroup.byte 0x47++0x00
line.byte 0x00 "POWER_MANAGEMENT_DATA,PCI Express Power Management Data Register"
tree.end
tree "MSI Message Capability Structure"
width 28.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==(0x10<<2))
rgroup.byte 0x50++0x00
line.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
group.word 0x52++0x01
line.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
rbitfld.word 0x00 7. "     64AC            ,64-bit address capable" "Not capable,Capable"
bitfld.word 0x00 4.--6. "  MME  ,Multiple message enable" "0,1,2,3,4,5,6,7"
newline
rbitfld.word 0x00 1.--3. "     MMC             ,Multiple message capable" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0. "            MSIE ,MSI enable" "Disabled,Enabled"
group.long 0x54++0x07
line.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hexmask.long 0x00 2.--31. 0x04 " MESSAGE_ADDRESS ,System-specified message address"
line.long 0x04 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
group.word 0x5C++0x01
line.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
else
hgroup.byte 0x50++0x00
hide.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
hgroup.word 0x52++0x01
hide.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
hgroup.long 0x54++0x03
hide.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hgroup.long 0x58++0x03
hide.long 0x00 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
hgroup.word 0x5C++0x01
hide.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
endif
tree.end
tree "PCI Express Capability Structure"
width 27.
rgroup.byte 0x70++0x00
line.byte 0x00 "CAPABILITY_ID,PCI Express Capability ID Register"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==0x000)
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 8. "             SLOT                      ,Slot implemented" "Not implemented,Implemented"
newline
bitfld.word 0x00 4.--7. "     DEVICE/PORT_TYPE         ,Device/Port type" "EP mode,,,,RC mode,?..."
bitfld.word 0x00 0.--3. "        CAPABILITY_VERSION        ,Indicates the defined PCI express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 4.--7. "             DEVICE/PORT_TYPE          ,Device/Port type" "EP mode,,,,RC mode,?..."
newline
bitfld.word 0x00 0.--3. "     CAPABILITY_VERSION       ,Indicates the defined PCI Express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0x74++0x03
line.long 0x00 "DEVICE_CAPABILITIES,PCI Express Device Capabilities Register"
bitfld.long 0x00 28. " FLRC                     ,Functional level reset capability" "0,1"
bitfld.long 0x00 26.--27. "              CSPLS                     ,Captured slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 18.--25. 1. " CSPLV                    ,Captured slot power limit value"
bitfld.long 0x00 15. "           RBER                      ,Role based error reporting" "0,1"
newline
bitfld.long 0x00 9.--11. " EP_L1_LAT                ,Endpoint L1 acceptable latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "              EP_L0S_LAT                ,Endpoint L0s acceptable latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 5. " ET                       ,Extended tag field supported" "0,1"
bitfld.long 0x00 3.--4. "              PHAN_FCT                  ,Phantom functions supported" "0,1,2,3"
newline
bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP          ,Maximum payload size supported" ",256-bytes,?..."
group.word 0x78++0x03
line.word 0x00 "DEVICE_CONTROL,PCI Express Device Control Register"
bitfld.word 0x00 15. "     IFLR                     ,Initiate functional level reset" "No reset,Reset"
bitfld.word 0x00 12.--14. "       MAX_READ_SIZE             ,Maximum read request size" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 11. "     ENS                      ,No snoop enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       APE                       ,AUX power PM enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     PFE                      ,Phantom functions enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       ETE                       ,Extended tag field enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5.--7. "     MAX_PAYLOAD_SIZE         ,Maximum payload size" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 4. "              RO                        ,Relaxed ordering enable" "Disabled,Enabled"
newline
bitfld.word 0x00 3. "     URR                      ,Unsupported request reporting enable" "Disabled,Enabled"
bitfld.word 0x00 2. "       FER                       ,Fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.word 0x00 1. "     NFER                     ,Non-fatal error reporting enable" "Disabled,Enabled"
bitfld.word 0x00 0. "       CER                       ,Correctable error reporting enable" "Disabled,Enabled"
line.word 0x02 "DEVICE_STATUS,PCI Express Device Status Register"
rbitfld.word 0x02 5. "     TP                       ,Transactions pending" "Not pending,Pending"
rbitfld.word 0x02 4. "    APD                       ,AUX power detected" "Not detected,Detected"
newline
eventfld.word 0x02 3. "     URD                      ,Unsupported request detected" "Not detected,Detected"
eventfld.word 0x02 2. "   FED                       ,Fatal error detected" "Not detected,Detected"
newline
eventfld.word 0x02 1. "     NFED                     ,Non-fatal error detected" "Not detected,Detected"
eventfld.word 0x02 0. "   CED                       ,Correctable error detected" "Not detected,Detected"
rgroup.long 0x7C++0x03
line.long 0x00 "LINK_CAPABILITIES,PCI Express Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER              ,Port number"
bitfld.long 0x00 22. "             AOC                       ,ASPM optionality compliance" "0,1"
newline
bitfld.long 0x00 21. " LBWN                     ,Link bandwidth notification capable" "Not capable,Capable"
bitfld.long 0x00 20. "    DLLARC                    ,Data link layer active reporting capable" "Not capable,Capable"
newline
bitfld.long 0x00 19. " SD_ERR_RPT_CAP           ,Surprise down error reporting capable" "Not capable,Capable"
bitfld.long 0x00 18. "    CPM                       ,Clock power management" "0,1"
newline
bitfld.long 0x00 15.--17. " L1_EX_LAT                ,L1 exit latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "              L0S_EX_LAT                ,L0s exit latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--11. " ASPM                     ,Active state power management (ASPM) support" "0,1,2,3"
bitfld.long 0x00 4.--9. "              MAX_LINK_W                ,Maximum link width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--3. " MAX_LINK_SP              ,Maximum link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==0x000)
group.word 0x80++0x03
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 5. "     RL                       ,Retrain link" "No effect,Initiated"
bitfld.word 0x00 4. "      LD                        ,Link disable" "No,Yes"
newline
bitfld.word 0x00 3. "     RCB                      ,Read completion boundary" "0,1"
bitfld.word 0x00 0.--1. "              ASPM_CTL                  ,Active state power management (ASPM) control" "0,1,2,3"
line.word 0x02 "LINK_STATUS,PCI Express Link Status Register"
eventfld.word 0x02 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
eventfld.word 0x02 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
rbitfld.word 0x02 12. "     SCC                      ,Slot clock configuration" "0,1"
rbitfld.word 0x02 11. "              LT                        ,Link training" "0,1"
newline
rbitfld.word 0x02 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,?..."
rbitfld.word 0x02 0.--3. "             LINK_SP                   ,Current link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
rgroup.long 0x84++0x03
line.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER     ,Indicates the physical slot number attached to this port"
bitfld.long 0x00 18. "           NOCMDCPLSUP               ,No command completed support" "0,1"
newline
bitfld.long 0x00 17. " EMIP                     ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "    SPLS                      ,Slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 7.--14. 1. " SPLV                     ,Scale power limit value"
bitfld.long 0x00 6. "           HPD                       ,Hot plug capable" "Not capable,Capable"
newline
bitfld.long 0x00 5. " HPS                      ,Hot plug surprise" "0,1"
bitfld.long 0x00 4. "              PIP                       ,Power indicator present" "Not present,Present"
newline
bitfld.long 0x00 3. " AIP                      ,Attention indicator present" "Not present,Present"
bitfld.long 0x00 2. "    MRLSP                     ,MRL sensor present" "Not present,Present"
newline
bitfld.long 0x00 1. " PCP                      ,Power controller present" "Not present,Present"
bitfld.long 0x00 0. "    ABP                       ,Attention button present" "Not present,Present"
group.word 0x88++0x07
line.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
bitfld.word 0x00 12. "     DLLSTCHGEN               ,Data link layer state changed enable" "Disabled,Enabled"
bitfld.word 0x00 11. "       EMICTL                    ,Electromechanical interlock control" "0,1"
newline
bitfld.word 0x00 10. "     PCC                      ,Power controller control" "0,1"
bitfld.word 0x00 8.--9. "              PIC                       ,Power indicator control" ",On,Blink,Off"
newline
bitfld.word 0x00 6.--7. "     AIC                      ,Attention indicator control" ",On,Blink,Off"
bitfld.word 0x00 5. "          HPIE                      ,Hot plug interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 4. "     CCIE                     ,Command completed interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. "       PDCE                      ,Presence detect changed enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     MRLSCE                   ,MRL sensor changed enable" "Disabled,Enabled"
bitfld.word 0x00 1. "       PFDE                      ,Power fault detected enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     ABPE                     ,Attention button pressed enable" "Disabled,Enabled"
line.word 0x02 "SLOT_STATUS,PCI Express Slot Status Register"
eventfld.word 0x02 8. "     DLLSTCHG                 ,Data link layer state changed" "Not changed,Changed"
rbitfld.word 0x02 7. "    EM_IL_ST                  ,Electromechanical interlock status" "0,1"
newline
rbitfld.word 0x02 6. "     PDS                      ,Indicates presence of an adapter in the slot" "Not present,Present"
rbitfld.word 0x02 5. "    MRLSS                     ,MRL sensor state" "Closed,Open"
newline
eventfld.word 0x02 4. "     CC                       ,Command completed" "Not completed,Completed"
eventfld.word 0x02 3. "  PDC                       ,Presence detect changed" "Not changed,Changed"
newline
eventfld.word 0x02 2. "     MRLSC                    ,MRL sensor changed" "Not changed,Changed"
eventfld.word 0x02 1. "    PFD                       ,Power fault detected" "Not detected,Detected"
newline
eventfld.word 0x02 0. "     ABP                      ,Attention button pressed" "Not pressed,Pressed"
line.word 0x04 "ROOT_CONTROL,PCI Express Root Control Register"
bitfld.word 0x04 4. "     CRSSWVE                  ,CRS software visibility enable" "Disabled,Enabled"
bitfld.word 0x04 3. "       PMEIE                     ,PME interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x04 2. "     SEFEE                    ,System error on fatal error enable" "Disabled,Enabled"
bitfld.word 0x04 1. "       SENFEE                    ,System error on non-fatal error enable" "Disabled,Enabled"
newline
bitfld.word 0x04 0. "     SECEE                    ,System error on correctable error enable" "Disabled,Enabled"
line.word 0x06 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
bitfld.word 0x06 0. "     CRSSWV                   ,CRS software visibility" "Not visible,Visible"
group.long 0x90++0x03
line.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
bitfld.long 0x00 17. " PMEP                     ,PME pending" "Not pending,Pending"
eventfld.long 0x00 16. "    PMES                      ,PME status" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " PME_REQUESTER_ID         ,PME requester ID"
else
group.word 0x80++0x01
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 4. "     LD                       ,Link disable" "No,Yes"
bitfld.word 0x00 3. "            RCB                       ,Read completion boundary" "0,1"
newline
bitfld.word 0x00 0.--1. "     ASPM_CTL                 ,Active state power management (ASPM) control" "0,1,2,3"
rgroup.word 0x82++0x01
line.word 0x00 "LINK_STATUS,PCI Express Link Status Register"
bitfld.word 0x00 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
bitfld.word 0x00 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
bitfld.word 0x00 12. "     SCC                      ,Slot clock configuration" "0,1"
bitfld.word 0x00 11. "              LT                        ,Link training" "0,1"
newline
bitfld.word 0x00 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,,,,x8,?..."
bitfld.word 0x00 0.--3. "             LINK_SP                   ,Negotiated link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
hgroup.long 0x84++0x03
hide.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hgroup.word 0x88++0x01
hide.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
hgroup.word 0x8A++0x01
hide.word 0x00 "SLOT_STATUS,PCI Express Slot Status Register"
hgroup.word 0x8C++0x01
hide.word 0x00 "ROOT_CONTROL,PCI Express Root Control Register"
hgroup.word 0x8E++0x01
hide.word 0x00 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
hgroup.long 0x90++0x03
hide.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
endif
rgroup.long 0x94++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,PCI Express Device Capabilities 2 Register"
bitfld.long 0x00 5. " ARI_FWD                  ,ARI forwarding supported" "Not supported,Supported"
bitfld.long 0x00 4. "  CPL_TO_DS                 ,Completion timeout disable supported" "Not supported,Supported"
newline
bitfld.long 0x00 0.--3. " CPL_TO_RS                ,Completion timeout ranges supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x98++0x01
line.word 0x00 "DEVICE_CONTROL_2,PCI Express Device Control 2 Register"
bitfld.word 0x00 9. "     IDO_CPL_EN               ,IDO completion enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       IDO_REQ_EN                ,IDO request enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5. "     ARIFE                    ,ARI forwarding enable" "Disabled,Enabled"
bitfld.word 0x00 4. "       CPL_TOD                   ,Completion timeout disable" "No,Yes"
newline
bitfld.word 0x00 0.--3. "     CPL_TO_VAL               ,Completion timeout value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x9C++0x03
line.long 0x00 "LINK_CAPABILITIES_2,PCI Express Link Capabilities 2 Register"
bitfld.long 0x00 8. " CROSSLINK_SUPPORTED      ,Crosslink supported" "Not supported,Supported"
hexmask.long.byte 0x00 1.--7. 1. "  SUPPORT_LINK_SPEED_VECTOR ,Supported link speeds vector"
group.word 0xA0++0x01
line.word 0x00 "LINK_CONTROL_2,PCI Express Link Control 2 Register"
bitfld.word 0x00 12.--15. "     CDE                      ,Compliance de-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 11. "             CSOS                      ,Compliance SOS" "0,1"
newline
bitfld.word 0x00 10. "     EMC                      ,Enter modified compliance" "0,1"
bitfld.word 0x00 7.--9. "              TXM                       ,Transmit margin" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 6. "     SDE                      ,Selectable de-emphasis" "0,1"
bitfld.word 0x00 5. "              HWASD                     ,Hardware autonomous speed disable" "No,Yes"
newline
bitfld.word 0x00 4. "     EC                       ,Enter compliance" "0,1"
bitfld.word 0x00 0.--3. "              T_LS                      ,Target link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word 0xA2++0x01
line.word 0x00 "LINK_STATUS_2,PCI Express Link Status 2 Register"
bitfld.word 0x00 5. "     LER                      ,Link equalization request" "Not requested,Requested"
bitfld.word 0x00 4. "  EP3S                      ,Equalization phase 3 complete" "Not complete,Complete"
newline
bitfld.word 0x00 3. "     EP2S                     ,Equalization phase 2 complete" "Not completed,Completed"
bitfld.word 0x00 2. "  EP1S                      ,Equalization phase 1 complete" "Not completed,Completed"
newline
bitfld.word 0x00 1. "     EC                       ,Equalization complete" "Not completed,Completed"
bitfld.word 0x00 0. "  DE_LVL                    ,Current de-emphasis level" "0,1"
tree.end
tree "Advanced Error Reporting Capability Structure"
width 41.
rgroup.word 0x100++0x01
line.word 0x00 "ADVANCED_ERROR_REPORTING_CAPABILITY_ID,PCI Express Advanced Error Reporting Capability ID Register"
group.long 0x104++0x17
line.long 0x00 "UNCORRECTABLE_ERROR_STATUS,PCI Express Uncorrectable Error Status Register"
eventfld.long 0x00 20. " URE                 ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "      ECRCE  ,ECRC error status" "No error,Error"
newline
eventfld.long 0x00 18. " MTLP                ,Malformed TLP status" "No error,Error"
eventfld.long 0x00 17. "      RXO    ,Receiver overflow status" "No error,Error"
newline
eventfld.long 0x00 16. " UC                  ,Unexpected completion status" "No error,Error"
eventfld.long 0x00 15. "      CA     ,Completer abort status" "No error,Error"
newline
eventfld.long 0x00 14. " CTO                 ,Completion timeout status" "No error,Error"
eventfld.long 0x00 13. "      FCPE   ,Flow control protocol error status" "No error,Error"
newline
eventfld.long 0x00 12. " PTLP                ,Poisoned TLP status" "No error,Error"
eventfld.long 0x00 4. "      DLPE   ,Data link protocol error status" "No error,Error"
line.long 0x04 "UNCORRECTABLE_ERROR_MASK,PCI Express Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UREM                ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "    ECRCEM ,ECRC error mask" "Not masked,Masked"
newline
bitfld.long 0x04 18. " MTLPM               ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "    RXOM   ,Receiver overflow mask" "Not masked,Masked"
newline
bitfld.long 0x04 16. " UCM                 ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "    CAM    ,Completer abort mask" "Not masked,Masked"
newline
bitfld.long 0x04 14. " CTOM                ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "    FCPEM  ,Flow control protocol error mask" "Not masked,Masked"
newline
bitfld.long 0x04 12. " PTLPM               ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "    DLPEM  ,Data link protocol error mask" "Not masked,Masked"
line.long 0x08 "UNCORRECTABLE_ERROR_SEVERITY,PCI Express Uncorrectable Error Severity Register"
bitfld.long 0x08 20. " URES                ,Unsupported request error severity" "Not severe,Severe"
bitfld.long 0x08 19. "    ECRCES ,ECRC error severity" "Not severe,Severe"
newline
bitfld.long 0x08 18. " MTLPS               ,Malformed TLP severity" "Not severe,Severe"
bitfld.long 0x08 17. "    RXOS   ,Receiver overflow severity" "Not severe,Severe"
newline
bitfld.long 0x08 16. " UCS                 ,Unexpected completion severity" "Not severe,Severe"
bitfld.long 0x08 15. "    CAS    ,Completer abort severity" "Not severe,Severe"
newline
bitfld.long 0x08 14. " CTOS                ,Completion timeout severity" "Not severe,Severe"
bitfld.long 0x08 13. "    FCPES  ,Flow control protocol error severity" "Not severe,Severe"
newline
bitfld.long 0x08 12. " PTLPS               ,Poisoned TLP severity" "Not severe,Severe"
bitfld.long 0x08 4. "    DLPES  ,Data link protocol error severity" "Not severe,Severe"
line.long 0x0C "CORRECTABLE_ERROR_STATUS,PCI Express Correctable Error Status Register"
eventfld.long 0x0C 13. " ADVNFE              ,Advisory non-fatal error status" "No error,Error"
eventfld.long 0x0C 12. "      RTTO   ,Replay timer timeout status" "No error,Error"
newline
eventfld.long 0x0C 8. " RNR                 ,REPLAY_NUM rollover status" "No error,Error"
eventfld.long 0x0C 7. "      BDLLP  ,Bad DLLP status" "No error,Error"
newline
eventfld.long 0x0C 6. " BTLP                ,Bad TLP status" "No error,Error"
eventfld.long 0x0C 0. "      RXE    ,Receiver error status" "No error,Error"
line.long 0x10 "CORRECTABLE_ERROR_MASK,PCI Express Correctable Error Mask Register"
bitfld.long 0x10 13. " ADVNFEM             ,Advisory non-fatal error mask" "Not masked,Masked"
bitfld.long 0x10 12. "    RTTOM  ,Replay timer timeout mask" "Not masked,Masked"
newline
bitfld.long 0x10 8. " RNRM                ,REPLAY_NUM rollover mask" "Not masked,Masked"
bitfld.long 0x10 7. "    BDLLPM ,Bad DLLP mask" "Not masked,Masked"
newline
bitfld.long 0x10 6. " BTLPM               ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x10 0. "    RXEM   ,Receiver error mask" "Not masked,Masked"
line.long 0x14 "ADVANCED_ERROR_CAPABILITIES_AND_CONTROL,PCI Express Advanced Error Capabilities And Control Register"
bitfld.long 0x14 8. " ECRCCE              ,ECRC checking enable" "Disabled,Enabled"
rbitfld.long 0x14 7. "      ECRCCC ,ECRC checking capable" "Not capable,Capable"
newline
bitfld.long 0x14 6. " ECRCGE              ,ECRC generation enable" "Disabled,Enabled"
rbitfld.long 0x14 5. "      ECRCGC ,ECRC generation capable" "Not capable,Capable"
newline
rbitfld.long 0x14 0.--4. " FIRST_ERROR_POINTER ,First error bit position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0x0F
line.long 0x00 "HEADER_LOG_DWORD1,PCI Express Header Log Register 1"
hexmask.long.byte 0x00 24.--31. 1. " BYTE_0              ,Byte 0 of the TLP header associated with the error"
hexmask.long.byte 0x00 16.--23. 1. "            BYTE_1 ,Byte 1 of the TLP header associated with the error"
newline
hexmask.long.byte 0x00 8.--15. 1. " BYTE_2              ,Byte 2 of the TLP header associated with the error"
hexmask.long.byte 0x00 0.--7. 1. "            BYTE_3 ,Byte 3 of the TLP header associated with the error"
line.long 0x04 "HEADER_LOG_DWORD2,PCI Express Header Log Register 2"
hexmask.long.byte 0x04 24.--31. 1. " BYTE_4              ,Byte 4 of the TLP header associated with the error"
hexmask.long.byte 0x04 16.--23. 1. "            BYTE_5 ,Byte 5 of the TLP header associated with the error"
newline
hexmask.long.byte 0x04 8.--15. 1. " BYTE_6              ,Byte 6 of the TLP header associated with the error"
hexmask.long.byte 0x04 0.--7. 1. "            BYTE_7 ,Byte 7 of the TLP header associated with the error"
line.long 0x08 "HEADER_LOG_DWORD3,PCI Express Header Log Register 3"
hexmask.long.byte 0x08 24.--31. 1. " BYTE_8              ,Byte 8 of the TLP header associated with the error"
hexmask.long.byte 0x08 16.--23. 1. "            BYTE_9 ,Byte 9 of the TLP header associated with the error"
newline
hexmask.long.byte 0x08 8.--15. 1. " BYTE_A              ,Byte 10 of the TLP header associated with the error"
hexmask.long.byte 0x08 0.--7. 1. "            BYTE_B ,Byte 11 of the TLP header associated with the error"
line.long 0x0C "HEADER_LOG_DWORD4,PCI Express Header Log Register 4"
hexmask.long.byte 0x0C 24.--31. 1. " BYTE_C              ,Byte 12 of the TLP header associated with the error"
hexmask.long.byte 0x0C 16.--23. 1. "            BYTE_D ,Byte 13 of the TLP header associated with the error"
newline
hexmask.long.byte 0x0C 8.--15. 1. " BYTE_E              ,Byte 14 of the TLP header associated with the error"
hexmask.long.byte 0x0C 0.--7. 1. "            BYTE_F ,Byte 15 of the TLP header associated with the error"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==0x000)
group.long 0x12C++0x07
line.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
bitfld.long 0x00 2. " FERE                ,Fatal error reporting enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NFERE  ,Non-fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CERE                ,Correctable error reporting enable" "Disabled,Enabled"
line.long 0x04 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
rbitfld.long 0x04 27.--31. " AEIMN               ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FEMR   ,Fatal error messages received" "Not received,Received"
newline
eventfld.long 0x04 5. " NFEMR               ,Non-fatal error messages received" "Not received,Received"
eventfld.long 0x04 4. "  FUF    ,First uncorrectable fatal" "0,1"
newline
eventfld.long 0x04 3. " MEFNFR              ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received"
eventfld.long 0x04 2. "  EFNFR  ,ERR_FATAL/NONFATAL received" "Not received,Received"
newline
eventfld.long 0x04 1. " MECR                ,Multiple ERR_COR received" "Not received,Received"
eventfld.long 0x04 0. "  ECR    ,ERR_COR received" "Not received,Received"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
hgroup.long 0x130++0x03
hide.long 0x00 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
endif
rgroup.word 0x134++0x03
line.word 0x00 "CORRECTABLE_ERROR_SOURCE_ID,PCI Express Correctable Error Source ID Register"
line.word 0x02 "ERROR_SOURCE_ID,PCI Express Error Source ID Register"
tree.end
width 28.
tree "Secondary PCI Express Capability Structure"
rgroup.long 0x148++0x03
line.long 0x00 "SPCIE_CAP_HEADER_REG,Secondary PCIE Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_OFFSET        ,Pointer to the next capability structure"
bitfld.long 0x00 16.--19. "          CAP_VERSION   ,Indicates the version of the capability structure present" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAP_ID    ,Secondary PCI express capability"
group.long 0x14C++0x07
line.long 0x00 "LINK_CONTROL3_REG,Link Control 3 Register"
bitfld.long 0x00 1. " EQ_REQ_INT_EN      ,Link equalization request interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      PERFORM_EQ    ,Perform equalization" "Not performed,Performed"
line.long 0x04 "LANE_ERR_STATUS_REG,Lane Error Status Register"
eventfld.long 0x04 3. " LANE_ERR_STATUS[3] ,Lane 4 detected a lane-based error" "No error,Error"
eventfld.long 0x04 2. "      [2]           ,Lane 3 detected a lane-based error" "No error,Error"
newline
eventfld.long 0x04 1. " [1]                ,Lane 2 detected a lane-based error" "No error,Error"
eventfld.long 0x04 0. "      [0]           ,Lane 1 detected a lane-based error" "No error,Error"
rgroup.word (0x154+0x0)++0x01
line.word 0x00 "LANE1_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x2)++0x01
line.word 0x00 "LANE2_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x4)++0x01
line.word 0x00 "LANE3_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x6)++0x01
line.word 0x00 "LANE4_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree "PEX Module Internal Configuration Space"
width 39.
group.long 0x71C++0x03
line.long 0x00 "SYMBOL_TIMER_FILTER_1_OFF,Symbol Timer And Filter Mask 1 Register"
bitfld.long 0x00 31. " CX_FLT_MASK_RC_CFG_DISCARD     ,CX_FLT_MASK_RC_CFG_DISCARD" "Not masked,Masked"
bitfld.long 0x00 30. "                  CX_FLT_MASK_RC_IO_DISCARD    ,CX_FLT_MASK_RC_IO_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 29. " CX_FLT_MASK_MSG_DROP           ,CX_FLT_MASK_MSG_DROP" "Not masked,Masked"
bitfld.long 0x00 28. "                  CX_FLT_MASK_CPL_ECRC_DISCARD ,CX_FLT_MASK_CPL_ECRC_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 27. " CX_FLT_MASK_ECRC_DISCARD       ,CX_FLT_MASK_ECRC_DISCARD" "Not masked,Masked"
bitfld.long 0x00 26. "                  CX_FLT_MASK_CPL_LEN_MATCH    ,CX_FLT_MASK_CPL_LEN_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 25. " CX_FLT_MASK_CPL_ATTR_MATCH     ,CX_FLT_MASK_CPL_ATTR_MATCH" "Not masked,Masked"
bitfld.long 0x00 24. "                  CX_FLT_MASK_CPL_TC_MATCH     ,CX_FLT_MASK_CPL_TC_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 23. " CX_FLT_MASK_CPL_FUNC_MATCH     ,CX_FLT_MASK_CPL_FUNC_MATCH" "Not masked,Masked"
bitfld.long 0x00 22. "                  CX_FLT_MASK_CPL_REQID_MATCH  ,CX_FLT_MASK_CPL_REQID_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 21. " CX_FLT_MASK_CPL_TAGERR_MATCH   ,CX_FLT_MASK_CPL_TAGERR_MATCH" "Not masked,Masked"
bitfld.long 0x00 20. "                  CX_FLT_MASK_LOCKED_RD_AS_UR  ,CX_FLT_MASK_LOCKED_RD_AS_UR" "Not masked,Masked"
newline
bitfld.long 0x00 19. " CX_FLT_MASK_CFG_TYPE1_RE_AS_UR ,CX_FLT_MASK_CFG_TYPE1_RE_AS_UR" "Not masked,Masked"
bitfld.long 0x00 18. "                  CX_FLT_MASK_UR_OUTSIDE_BAR   ,CX_FLT_MASK_UR_OUTSIDE_BAR" "Not masked,Masked"
newline
bitfld.long 0x00 17. " CX_FLT_MASK_UR_POIS            ,CX_FLT_MASK_UR_POIS" "Not masked,Masked"
bitfld.long 0x00 16. "                  CX_FLT_MASK_UR_FUNC_MISMATCH ,CX_FLT_MASK_UR_FUNC_MISMATCH" "Not masked,Masked"
newline
bitfld.long 0x00 15. " DISABLE_FC_WD_TIMER            ,Disables FC watchdog timer" "No,Yes"
hexmask.long.word 0x00 0.--10. 1. "                         SKP_INT_VAL                  ,SKP interval value"
group.long 0x890++0x03
line.long 0x00 "GEN3_RELATED_OFF,Gen3 Control Register"
bitfld.long 0x00 16. " GEN3_EQUALIZATION_DIS          ,Equalization disable" "No,Yes"
bitfld.long 0x00 12. "                         RXEQ_PH01_EN                 ,Rx equalization phase 0/1 hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " EQ_EIEOS_CNT                   ,Equalization EIEOS count reset disable" "No,Yes"
group.long 0x8BC++0x03
line.long 0x00 "MISC_CONTROL_1_OFF,DBI Read-Only Write Enable Register"
bitfld.long 0x00 0. " DBI_RO_WR_EN                   ,Write to RO registers using DBI" "Disabled,Enabled"
group.long 0x8E0++0x07
line.long 0x00 "COHERENCY_CONTROL_1_OFF,Coherency Control 1"
hexmask.long 0x00 2.--31. 0x04 " CFG_MEMTYPE_BOUNDARY_LOW_ADDR  ,Boundary lower address for memory type"
bitfld.long 0x00 0. "                    CFG_MEMTYPE_VALUE            ,Memory type" "CCSR/Memory,?..."
line.long 0x04 "COHERENCY_CONTROL_2_OFF,Coherency Control 2"
group.long 0x900++0x03
line.long 0x00 "IATU_VIEWPORT_OFF,IATU Index Register"
bitfld.long 0x00 31. " REGION_DIR                     ,Region direction" "Outbound,Inbound"
hexmask.long.byte 0x00 0.--7. 1. "                    REGION_INDEX                 ,Region index"
if (((per.l(ad:0x03500000+0x900))&0x80000000)==0x80000000)
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==(0x10<<2))
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 19. "  FUNC_NUM_MATCH_EN            ,Function number match enable" "Disabled,Enabled"
newline
bitfld.long 0x04 18. " AT_MATCH_EN                    ,AT match enable" "Disabled,Enabled"
bitfld.long 0x04 8.--10. "                    BAR_NUM                      ,BAR number" "BAR 0,BAR 1,BAR 2,BAR 3,BAR 4,BAR 5,ROM,?..."
else
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 18. "  AT_MATCH_EN                  ,AT match enable" "Disabled,Enabled"
endif
group.long 0x90C++0x13
line.long 0x00 "IATU_LWR_BASE_ADDR_OFF_INBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x00 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x04 "IATU_UPPER_BASE_ADDR_OFF_INBOUND_0,IATU Upper Base Address Register"
line.long 0x08 "IATU_LIMIT_ADDR_OFF_INBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x08 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x08 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x0C "IATU_LWR_TARGET_ADDR_OFF_INBOUND_0,IATU Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x10 "IATU_UPPER_TARGET_ADDR_OFF_INBOUND_0,IATU Upper Target Address Register"
else
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2.))==(0x10<<2.))
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0x908++0x17
line.long 0x00 "IATU_REGION_CTRL_2_OFF_OUTBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x00 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                    CFG_SHIFT_MODE               ,CFG shift mode" "Not shifted,Shifted"
newline
hexmask.long.byte 0x00 0.--7. 1. " MSG_CODE                       ,Message code"
line.long 0x04 "IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x04 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x04 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x08 "IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0,IATU Upper Base Address Register"
line.long 0x0C "IATU_LIMIT_ADDR_OFF_OUTBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x10 "IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0,IATU Outbound Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x10 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x10 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x14 "IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0,IATU Upper Target Address Register"
endif
tree.end
tree "Base Address"
wgroup.long 0x1010++0x07
line.long 0x00 "BAR0_MASK,Base Address 0 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR1_MASK,Base Address 1 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<2))==(0x10<<2))
wgroup.long 0x1018++0x0F
line.long 0x00 "BAR2_MASK,Base Address 2 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR3_MASK,Base Address 3 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x08 "BAR4_MASK,Base Address 4 Mask Register"
hexmask.long 0x08 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x08 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x0C "BAR5_MASK,Base Address 5 Mask Register"
hexmask.long 0x0C 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x0C 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
wgroup.long 0x1030++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
else
wgroup.long 0x1038++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long.tbyte 0x00 11.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                      BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
endif
tree.end
base ad:0x03500000+0x10000
width 22.
tree "PEX2_LUT Memory Map/Registers"
group.long 0x20++0x07
line.long 0x00 "PEX_LUT_PEXLSR,PEX LUT Status Register"
eventfld.long 0x00 31. " LUTM      ,Lookup table miss" "Not missed,Missed"
eventfld.long 0x00 30. "         MLUTM   ,Multiple lookup table miss" "Not missed,Missed"
newline
hexmask.long.word 0x00 0.--15. 1. " CREQID    ,Captured REQID"
line.long 0x04 "PEX_LUT_PEXLCR,PEX LUT Control Register"
bitfld.long 0x04 31. " DPL       ,Default privilege level" "0,1"
bitfld.long 0x04 30. "                  DBMT    ,Default bypass memory translation" "0,1"
newline
hexmask.long.word 0x04 0.--14. 1. " DICID     ,Default isolation context ID"
group.long (0x800+0x0)++0x07
line.long 0x00 "PEX_LUT_PEXL1UDR,PEX LUT Entry 1 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 1 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 1 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL1LDR,PEX LUT Entry 1 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 1 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 1 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x8)++0x07
line.long 0x00 "PEX_LUT_PEXL2UDR,PEX LUT Entry 2 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 2 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 2 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL2LDR,PEX LUT Entry 2 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 2 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 2 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x10)++0x07
line.long 0x00 "PEX_LUT_PEXL3UDR,PEX LUT Entry 3 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 3 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 3 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL3LDR,PEX LUT Entry 3 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 3 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 3 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x18)++0x07
line.long 0x00 "PEX_LUT_PEXL4UDR,PEX LUT Entry 4 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 4 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 4 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL4LDR,PEX LUT Entry 4 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 4 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 4 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x20)++0x07
line.long 0x00 "PEX_LUT_PEXL5UDR,PEX LUT Entry 5 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 5 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 5 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL5LDR,PEX LUT Entry 5 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 5 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 5 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x28)++0x07
line.long 0x00 "PEX_LUT_PEXL6UDR,PEX LUT Entry 6 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 6 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 6 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL6LDR,PEX LUT Entry 6 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 6 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 6 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x30)++0x07
line.long 0x00 "PEX_LUT_PEXL7UDR,PEX LUT Entry 7 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 7 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 7 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL7LDR,PEX LUT Entry 7 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 7 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 7 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x38)++0x07
line.long 0x00 "PEX_LUT_PEXL8UDR,PEX LUT Entry 8 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 8 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 8 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL8LDR,PEX LUT Entry 8 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 8 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 8 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x40)++0x07
line.long 0x00 "PEX_LUT_PEXL9UDR,PEX LUT Entry 9 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 9 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 9 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL9LDR,PEX LUT Entry 9 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 9 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 9 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x48)++0x07
line.long 0x00 "PEX_LUT_PEXL10UDR,PEX LUT Entry 10 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 10 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 10 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL10LDR,PEX LUT Entry 10 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 10 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 10 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x50)++0x07
line.long 0x00 "PEX_LUT_PEXL11UDR,PEX LUT Entry 11 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 11 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 11 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL11LDR,PEX LUT Entry 11 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 11 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 11 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x58)++0x07
line.long 0x00 "PEX_LUT_PEXL12UDR,PEX LUT Entry 12 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 12 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 12 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL12LDR,PEX LUT Entry 12 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 12 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 12 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x60)++0x07
line.long 0x00 "PEX_LUT_PEXL13UDR,PEX LUT Entry 13 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 13 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 13 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL13LDR,PEX LUT Entry 13 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 13 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 13 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x68)++0x07
line.long 0x00 "PEX_LUT_PEXL14UDR,PEX LUT Entry 14 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 14 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 14 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL14LDR,PEX LUT Entry 14 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 14 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 14 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x70)++0x07
line.long 0x00 "PEX_LUT_PEXL15UDR,PEX LUT Entry 15 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 15 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 15 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL15LDR,PEX LUT Entry 15 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 15 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 15 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x78)++0x07
line.long 0x00 "PEX_LUT_PEXL16UDR,PEX LUT Entry 16 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 16 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 16 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL16LDR,PEX LUT Entry 16 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 16 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 16 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x80)++0x07
line.long 0x00 "PEX_LUT_PEXL17UDR,PEX LUT Entry 17 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 17 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 17 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL17LDR,PEX LUT Entry 17 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 17 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 17 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x88)++0x07
line.long 0x00 "PEX_LUT_PEXL18UDR,PEX LUT Entry 18 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 18 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 18 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL18LDR,PEX LUT Entry 18 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 18 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 18 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x90)++0x07
line.long 0x00 "PEX_LUT_PEXL19UDR,PEX LUT Entry 19 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 19 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 19 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL19LDR,PEX LUT Entry 19 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 19 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 19 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x98)++0x07
line.long 0x00 "PEX_LUT_PEXL20UDR,PEX LUT Entry 20 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 20 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 20 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL20LDR,PEX LUT Entry 20 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 20 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 20 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA0)++0x07
line.long 0x00 "PEX_LUT_PEXL21UDR,PEX LUT Entry 21 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 21 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 21 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL21LDR,PEX LUT Entry 21 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 21 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 21 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA8)++0x07
line.long 0x00 "PEX_LUT_PEXL22UDR,PEX LUT Entry 22 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 22 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 22 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL22LDR,PEX LUT Entry 22 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 22 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 22 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB0)++0x07
line.long 0x00 "PEX_LUT_PEXL23UDR,PEX LUT Entry 23 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 23 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 23 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL23LDR,PEX LUT Entry 23 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 23 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 23 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB8)++0x07
line.long 0x00 "PEX_LUT_PEXL24UDR,PEX LUT Entry 24 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 24 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 24 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL24LDR,PEX LUT Entry 24 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 24 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 24 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC0)++0x07
line.long 0x00 "PEX_LUT_PEXL25UDR,PEX LUT Entry 25 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 25 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 25 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL25LDR,PEX LUT Entry 25 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 25 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 25 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC8)++0x07
line.long 0x00 "PEX_LUT_PEXL26UDR,PEX LUT Entry 26 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 26 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 26 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL26LDR,PEX LUT Entry 26 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 26 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 26 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD0)++0x07
line.long 0x00 "PEX_LUT_PEXL27UDR,PEX LUT Entry 27 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 27 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 27 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL27LDR,PEX LUT Entry 27 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 27 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 27 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD8)++0x07
line.long 0x00 "PEX_LUT_PEXL28UDR,PEX LUT Entry 28 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 28 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 28 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL28LDR,PEX LUT Entry 28 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 28 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 28 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE0)++0x07
line.long 0x00 "PEX_LUT_PEXL29UDR,PEX LUT Entry 29 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 29 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 29 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL29LDR,PEX LUT Entry 29 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 29 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 29 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE8)++0x07
line.long 0x00 "PEX_LUT_PEXL30UDR,PEX LUT Entry 30 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 30 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 30 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL30LDR,PEX LUT Entry 30 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 30 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 30 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF0)++0x07
line.long 0x00 "PEX_LUT_PEXL31UDR,PEX LUT Entry 31 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 31 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 31 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL31LDR,PEX LUT Entry 31 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 31 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 31 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF8)++0x07
line.long 0x00 "PEX_LUT_PEXL32UDR,PEX LUT Entry 32 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 32 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 32 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL32LDR,PEX LUT Entry 32 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 32 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 32 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF 0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,Per PF dependent message interrupt is pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,Per PF dependent error interrupt is pending" "Not pending,Pending"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,PF dependent message interrupt pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,PF dependent error interrupt pending" "Not pending,Pending"
group.long 0x40020++0x0F
line.long 0x00 "PEX_PF0_PME_MES_DR,PEX PF 0 PCIE PME And Message Detect Register"
eventfld.long 0x00 15. " PTO       ,Indicates that PME turn off was detected" "Not detected,Detected"
eventfld.long 0x00 13. "       ENL23   ,Indicates that PCIe core entered L2/L3 ready state" "Not detected,Detected"
newline
eventfld.long 0x00 12. " EXL23     ,Indicates that PCIe core exited L2/L3 ready state" "Not detected,Detected"
eventfld.long 0x00 10. "       HRD     ,Indicates a hot reset was detected" "Not detected,Detected"
newline
eventfld.long 0x00 9. " LDD       ,Indicates a link down was detected" "Not detected,Detected"
eventfld.long 0x00 7. "       LUD     ,Indicates a link up was detected" "Not detected,Detected"
line.long 0x04 "PEX_PF0_PME_MES_DISR,PEX PF 0 PCIE PME And Message Disable Register"
bitfld.long 0x04 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x04 13. "                ENL23D  ,Entered L2/L3 ready state detect disabled" "No,Yes"
newline
bitfld.long 0x04 12. " EXL23D    ,Exited L2/L3 ready state detect disable" "No,Yes"
bitfld.long 0x04 10. "                HRDD    ,Hot reset detect disable" "No,Yes"
newline
bitfld.long 0x04 9. " LDDD      ,Link down detect disable" "No,Yes"
bitfld.long 0x04 7. "                LUDD    ,Link up detect disable" "No,Yes"
line.long 0x08 "PEX_PF0_PME_MES_IER,PEX PF 0 PCIE PME And Message Interrupt Enable Register"
bitfld.long 0x08 15. " PTOIE     ,PME turn off interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 13. "           ENL23IE ,Entered L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 12. " EXL23IE   ,Exited L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 10. "           HRDIE   ,Hot reset detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 9. " LDDIE     ,Link down detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 7. "           LUDIE   ,Link up detect interrupt enabled" "Disabled,Enabled"
line.long 0x0C "PEX_PF0_MCR,PEX PF 0 PCIE Message Command Register"
bitfld.long 0x0C 4. " INTX      ,Assert/de-assert intx command" "Not asserted,Asserted"
bitfld.long 0x0C 2. "       SPMES   ,Send PM_PME command" "No effect,Send"
newline
bitfld.long 0x0C 1. " EXL2S     ,Exit L2 state command" "No effect,Generate"
bitfld.long 0x0C 0. "          PTOMR   ,Generate PME turn off message (RC only)" "No effect,Generate"
group.long 0x40140++0x03
line.long 0x00 "PEX_PF0_RBP_ADDR_U,PEX PF 0 Route By Port Address Upper Register"
hexmask.long.word 0x00 16.--31. 1. " ADDR_U    ,Upper 16 bit of the PCIE slave device used for the outbound transactions"
group.long 0x40200++0x03
line.long 0x00 "PEX_PF0_ERR_DR,PEX PF 0 PCIE Error Detect Register"
eventfld.long 0x00 31. " ME        ,Indicates multiple errors of same type" "Not detected,Detected"
eventfld.long 0x00 23. "       PCT     ,Indicates completion timeout" "Not detected,Detected"
newline
eventfld.long 0x00 21. " PCAC      ,Completer abort was detected" "Not detected,Detected"
eventfld.long 0x00 19. "       CDNSC   ,Completion with data not succsessful was detected" "Not detected,Detected"
newline
eventfld.long 0x00 2. " UREP      ,Indicates an unsupported request completion was detected" "Not detected,Detected"
group.long 0x40208++0x03
line.long 0x00 "PEX_PF0_ERR_EN,PEX PF 0 PCIE Error Interrupt Enable Register"
bitfld.long 0x00 23. " PCTIE     ,Completion timeout interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "           PCACIE  ,Completer abort interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CDNSCIE   ,Completion with data not successful interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           UREPIE  ,Unsupported request in EP mode interrupt enable" "Disabled,Enabled"
group.long 0x40210++0x03
line.long 0x00 "PEX_PF0_ERR_DISR,PEX PF 0 PCIE Error Disable Register"
eventfld.long 0x00 31. " MED       ,Multiple errors of same type detection disable" "No,Yes"
bitfld.long 0x00 23. "                PCTD    ,Completion detection disable" "No,Yes"
newline
bitfld.long 0x00 21. " PCACD     ,Completer abort detection disable" "No,Yes"
bitfld.long 0x00 19. "                CDNSCD  ,Completion with data not successful detection disable" "No,Yes"
newline
bitfld.long 0x00 2. " UREPD     ,Unsupported request in EP mode detection disable" "No,Yes"
group.long 0x407FC++0x03
line.long 0x00 "PEX_PF0_DBG,PEX PF0 Debug Register"
bitfld.long 0x00 31. " WE        ,Write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "           SR      ,Soft reset" "No reset,Reset"
newline
rbitfld.long 0x00 0.--5. " LTSSM     ,Link training status state machine (LTSSM) status" "DETECT_QUIET,DETECT_ACTIVE,POLL_ACTIVE,POLL_COMPLIANCE,POLL_CONFIG,PRE_DETECT_QUIET,DETECT_WAIT,CFG_LINKWD_START,CFG_LINKWD_ACEPT,CFG_LANENUM_WAIT,CFG_LANENUM_ACEPT,CFG_COMPLETE,CFG_IDLE,RCVRY_LOCK,RCVRY_SPEED,RCVRY_RCVRCFG,RCVRY_IDLE,L0,L0S,L123_SEND_EIDLE,L1_IDLE,L2_IDLE,L2_WAKE,DISABLED_ENTRY,DISABLED_IDLE,DISABLED,LPBK_ENTRY,LPBK_ACTIVE,LPBK_EXIT,LPBK_EXIT_TIMEOUT,HOT_RESET_ENTRY,HOT_RESET,RCVRY_EQ0,RCVRY_EQ1,RCVRY_EQ2,RCVRY_EQ3,?..."
tree.end
width 0x0B
tree.end
tree "PEX 3"
base ad:0x03600000
width 34.
tree "Configuration Header"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3.))==(0x10<<3.))
group.word 0x00++0x07 "Type 0 [EP mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x17
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x04 "BAR1,PCI Express Base Address Register 1"
hexmask.long.tbyte 0x04 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x04 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x04 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x04 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x08 "BAR2,PCI Express Base Address Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x08 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x08 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,,Locate anywhere/64-bit,?..."
bitfld.long 0x08 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x0C "BAR3,PCI Express Base Address Register 3"
line.long 0x10 "BAR4,PCI Express Base Address Register 4"
hexmask.long.tbyte 0x10 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x10 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x10 1.--2. " TYPE                  ,Type" ",,Locate anywhere/64-bit,?..."
bitfld.long 0x10 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x14 "BAR5,PCI Express Base Address Register 5"
rgroup.word 0x2C++0x03
line.word 0x00 "SUBSYSTEM_VENDOR_ID,PCI Express Subsystem Vendor ID Register"
line.word 0x02 "SUBSYSTEM_ID,PCI Express Subsystem ID Register"
group.long 0x30++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x02
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
line.byte 0x01 "MINIMUM_GRANT,PCI Express Minimum Grant Register"
line.byte 0x02 "MAXIMUM_LATENCY,PCI Express Maximum Latency Register"
else
group.word 0x00++0x07 "Type 1 [RC mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x03
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
group.byte 0x18++0x02
line.byte 0x00 "PRIMARY_BUS_NUMBER,PCI Express Primary Bus Number Register"
line.byte 0x01 "SECONDARY_BUS_NUMBER,PCI Express Secondary Bus Number Register"
line.byte 0x02 "SUBORDINATE_BUS_NUMBER,PCI Express Subordinate Bus Number Register"
group.byte 0x1C++0x01
line.byte 0x00 "I/O_BASE,PCI Express I/O Base Register"
hexmask.byte 0x00 4.--7. 0x10 "     I/O_START_ADDRESS     ,Specifies bits 15:12 of the I/O space start address"
rbitfld.byte 0x00 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
line.byte 0x01 "I/O_LIMIT,PCI Express I/O Limit Register"
hexmask.byte 0x01 4.--7. 0x10 "     I/O_LIMIT_ADDRESS     ,Specifies bits 15:12 of the I/O space ending address"
rbitfld.byte 0x01 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
group.word 0x1E++0x09
line.word 0x00 "SECONDARY_STATUS,PCI Express Secondary Status Register"
eventfld.word 0x00 15. "     DPE                   ,Detected parity error" "Not detected,Detected"
eventfld.word 0x00 14. "            SSE                               ,Signalled system error" "Not signalled,Signalled"
newline
eventfld.word 0x00 13. "     RMA                   ,Received master abort" "Not received,Received"
eventfld.word 0x00 12. "            RTA                               ,Received targed abort" "Not received,Received"
newline
eventfld.word 0x00 11. "     STA                   ,Signalled target abort" "Not signalled,Signalled"
eventfld.word 0x00 8. "           MDPE                              ,Master data parity error" "No error,Error"
line.word 0x02 "MEMORY_BASE,PCI Express Memory Base Register"
hexmask.word 0x02 4.--15. 0x10 "     MEMORY_BASE           ,Specifies bits 31:20 of the non-prefetchable memory space start address"
line.word 0x04 "MEMORY_LIMIT,PCI Express Memory Limit Register"
hexmask.word 0x04 4.--15. 0x10 "     MEMORY_LIMIT          ,Specifies bits 31:20 of the non-prefetchable memory space ending address"
line.word 0x06 "PREFETCHABLE_MEMORY_BASE,PCI Express Prefetchable Memory Base Register"
hexmask.word 0x06 4.--15. 0x10 "     PF_MEMORY_BASE        ,Specifies bits 31:20 of the prefetchable memory space start address"
rbitfld.word 0x06 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
line.word 0x08 "PREFETCHABLE_MEMORY_LIMIT,PCI Express Prefetchable Memory Limit Register"
hexmask.word 0x08 4.--15. 0x10 "     PF_MEMORY_LIMIT       ,Specifies bits 31:20 of the prefetchable memory space ending address"
rbitfld.word 0x08 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
group.long 0x28++0x07
line.long 0x00 "PREFETCHABLE_BASE_UPPER_32_BITS,PCI Express Prefetchable Base Upper 32 Bits Register"
line.long 0x04 "PREFETCHABLE_LIMIT_UPPER_32_BITS,PCI Express Prefetchable Limit Upper 32 Bits Register"
rgroup.word 0x30++0x03
line.word 0x00 "I/O_BASE_UPPER_16_BITS,PCI Express I/O Base Upper 16 Bits Register"
line.word 0x02 "I/O_LIMIT_UPPER_16_BITS,PCI Express I/O Limit Upper 16 Bits Register"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.long 0x38++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x00
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
group.word 0x3E++0x01
line.word 0x00 "BRIDGE_CONTROL,PCI Express Bridge Control Register"
bitfld.word 0x00 6. "     SCND_RST              ,Secondary bus reset" "No reset,Reset"
bitfld.word 0x00 3. "                VGA_EN                            ,VGA enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     ISA_EN                ,ISA enable" "Disabled,Enabled"
bitfld.word 0x00 1. "                SERR_EN                           ,SERR enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     PER                   ,Parity error response" "No response,Response"
endif
tree.end
tree "Power Management Capability Structure"
width 38.
rgroup.byte 0x40++0x00
line.byte 0x00 "POWER_MANAGEMENT_CAPABILITY_ID,PCI Express Power Management Capability ID Register"
rgroup.word 0x42++0x01
line.word 0x00 "POWER_MANAGEMENT_CAPABILITIES,PCI Express Power Management Capabilities Register"
bitfld.word 0x00 15. "     PME_SUPPORT[4] ,PME power state support bit 4" "Not supported,Supported"
bitfld.word 0x00 14. "  [3]        ,PME power state support bit 3" "Not supported,Supported"
newline
bitfld.word 0x00 13. "     [2]            ,PME power state support bit 2" "Not supported,Supported"
bitfld.word 0x00 12. "  [1]        ,PME power state support bit 1" "Not supported,Supported"
newline
bitfld.word 0x00 11. "     [0]            ,PME power state support bit 0" "Not supported,Supported"
bitfld.word 0x00 10. "  D2         ,D2 support" "Not supported,Supported"
newline
bitfld.word 0x00 9. "     D1             ,D1 support" "Not supported,Supported"
bitfld.word 0x00 6.--8. "  AUX_CURR   ,AUX current" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 5. "     DSI            ,Device specific initialization" "0,1"
bitfld.word 0x00 3. "              PME_CLK    ,PME clock" "0,1"
newline
bitfld.word 0x00 0.--2. "     VERSION        ,Version of the specification" "0,1,2,3,4,5,6,7"
group.word 0x44++0x01
line.word 0x00 "POWER_MANAGEMENT_STATUS_AND_CONTROL,PCI Express Power Management Status And Control Register"
eventfld.word 0x00 15. "     PME_STAT       ,PME status" "0,1"
bitfld.word 0x00 13.--14. "              DATA_SCALE ,Data scale field" "0,1,2,3"
newline
bitfld.word 0x00 9.--12. "     DATA_SELECT    ,Data select field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 8. "             PME_EN     ,PME enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0.--1. "     POWER_STATE    ,Indicates the current power state of the function" "D0,D1,D2,D3"
rgroup.byte 0x47++0x00
line.byte 0x00 "POWER_MANAGEMENT_DATA,PCI Express Power Management Data Register"
tree.end
tree "MSI Message Capability Structure"
width 28.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==(0x10<<3))
rgroup.byte 0x50++0x00
line.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
group.word 0x52++0x01
line.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
rbitfld.word 0x00 7. "     64AC            ,64-bit address capable" "Not capable,Capable"
bitfld.word 0x00 4.--6. "  MME  ,Multiple message enable" "0,1,2,3,4,5,6,7"
newline
rbitfld.word 0x00 1.--3. "     MMC             ,Multiple message capable" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0. "            MSIE ,MSI enable" "Disabled,Enabled"
group.long 0x54++0x07
line.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hexmask.long 0x00 2.--31. 0x04 " MESSAGE_ADDRESS ,System-specified message address"
line.long 0x04 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
group.word 0x5C++0x01
line.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
else
hgroup.byte 0x50++0x00
hide.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
hgroup.word 0x52++0x01
hide.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
hgroup.long 0x54++0x03
hide.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hgroup.long 0x58++0x03
hide.long 0x00 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
hgroup.word 0x5C++0x01
hide.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
endif
tree.end
tree "PCI Express Capability Structure"
width 27.
rgroup.byte 0x70++0x00
line.byte 0x00 "CAPABILITY_ID,PCI Express Capability ID Register"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==0x000)
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 8. "             SLOT                      ,Slot implemented" "Not implemented,Implemented"
newline
bitfld.word 0x00 4.--7. "     DEVICE/PORT_TYPE         ,Device/Port type" "EP mode,,,,RC mode,?..."
bitfld.word 0x00 0.--3. "        CAPABILITY_VERSION        ,Indicates the defined PCI express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 4.--7. "             DEVICE/PORT_TYPE          ,Device/Port type" "EP mode,,,,RC mode,?..."
newline
bitfld.word 0x00 0.--3. "     CAPABILITY_VERSION       ,Indicates the defined PCI Express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0x74++0x03
line.long 0x00 "DEVICE_CAPABILITIES,PCI Express Device Capabilities Register"
bitfld.long 0x00 28. " FLRC                     ,Functional level reset capability" "0,1"
bitfld.long 0x00 26.--27. "              CSPLS                     ,Captured slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 18.--25. 1. " CSPLV                    ,Captured slot power limit value"
bitfld.long 0x00 15. "           RBER                      ,Role based error reporting" "0,1"
newline
bitfld.long 0x00 9.--11. " EP_L1_LAT                ,Endpoint L1 acceptable latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "              EP_L0S_LAT                ,Endpoint L0s acceptable latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 5. " ET                       ,Extended tag field supported" "0,1"
bitfld.long 0x00 3.--4. "              PHAN_FCT                  ,Phantom functions supported" "0,1,2,3"
newline
bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP          ,Maximum payload size supported" ",256-bytes,?..."
group.word 0x78++0x03
line.word 0x00 "DEVICE_CONTROL,PCI Express Device Control Register"
bitfld.word 0x00 15. "     IFLR                     ,Initiate functional level reset" "No reset,Reset"
bitfld.word 0x00 12.--14. "       MAX_READ_SIZE             ,Maximum read request size" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 11. "     ENS                      ,No snoop enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       APE                       ,AUX power PM enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     PFE                      ,Phantom functions enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       ETE                       ,Extended tag field enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5.--7. "     MAX_PAYLOAD_SIZE         ,Maximum payload size" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 4. "              RO                        ,Relaxed ordering enable" "Disabled,Enabled"
newline
bitfld.word 0x00 3. "     URR                      ,Unsupported request reporting enable" "Disabled,Enabled"
bitfld.word 0x00 2. "       FER                       ,Fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.word 0x00 1. "     NFER                     ,Non-fatal error reporting enable" "Disabled,Enabled"
bitfld.word 0x00 0. "       CER                       ,Correctable error reporting enable" "Disabled,Enabled"
line.word 0x02 "DEVICE_STATUS,PCI Express Device Status Register"
rbitfld.word 0x02 5. "     TP                       ,Transactions pending" "Not pending,Pending"
rbitfld.word 0x02 4. "    APD                       ,AUX power detected" "Not detected,Detected"
newline
eventfld.word 0x02 3. "     URD                      ,Unsupported request detected" "Not detected,Detected"
eventfld.word 0x02 2. "   FED                       ,Fatal error detected" "Not detected,Detected"
newline
eventfld.word 0x02 1. "     NFED                     ,Non-fatal error detected" "Not detected,Detected"
eventfld.word 0x02 0. "   CED                       ,Correctable error detected" "Not detected,Detected"
rgroup.long 0x7C++0x03
line.long 0x00 "LINK_CAPABILITIES,PCI Express Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER              ,Port number"
bitfld.long 0x00 22. "             AOC                       ,ASPM optionality compliance" "0,1"
newline
bitfld.long 0x00 21. " LBWN                     ,Link bandwidth notification capable" "Not capable,Capable"
bitfld.long 0x00 20. "    DLLARC                    ,Data link layer active reporting capable" "Not capable,Capable"
newline
bitfld.long 0x00 19. " SD_ERR_RPT_CAP           ,Surprise down error reporting capable" "Not capable,Capable"
bitfld.long 0x00 18. "    CPM                       ,Clock power management" "0,1"
newline
bitfld.long 0x00 15.--17. " L1_EX_LAT                ,L1 exit latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "              L0S_EX_LAT                ,L0s exit latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--11. " ASPM                     ,Active state power management (ASPM) support" "0,1,2,3"
bitfld.long 0x00 4.--9. "              MAX_LINK_W                ,Maximum link width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--3. " MAX_LINK_SP              ,Maximum link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==0x000)
group.word 0x80++0x03
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 5. "     RL                       ,Retrain link" "No effect,Initiated"
bitfld.word 0x00 4. "      LD                        ,Link disable" "No,Yes"
newline
bitfld.word 0x00 3. "     RCB                      ,Read completion boundary" "0,1"
bitfld.word 0x00 0.--1. "              ASPM_CTL                  ,Active state power management (ASPM) control" "0,1,2,3"
line.word 0x02 "LINK_STATUS,PCI Express Link Status Register"
eventfld.word 0x02 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
eventfld.word 0x02 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
rbitfld.word 0x02 12. "     SCC                      ,Slot clock configuration" "0,1"
rbitfld.word 0x02 11. "              LT                        ,Link training" "0,1"
newline
rbitfld.word 0x02 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,?..."
rbitfld.word 0x02 0.--3. "             LINK_SP                   ,Current link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
rgroup.long 0x84++0x03
line.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER     ,Indicates the physical slot number attached to this port"
bitfld.long 0x00 18. "           NOCMDCPLSUP               ,No command completed support" "0,1"
newline
bitfld.long 0x00 17. " EMIP                     ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "    SPLS                      ,Slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 7.--14. 1. " SPLV                     ,Scale power limit value"
bitfld.long 0x00 6. "           HPD                       ,Hot plug capable" "Not capable,Capable"
newline
bitfld.long 0x00 5. " HPS                      ,Hot plug surprise" "0,1"
bitfld.long 0x00 4. "              PIP                       ,Power indicator present" "Not present,Present"
newline
bitfld.long 0x00 3. " AIP                      ,Attention indicator present" "Not present,Present"
bitfld.long 0x00 2. "    MRLSP                     ,MRL sensor present" "Not present,Present"
newline
bitfld.long 0x00 1. " PCP                      ,Power controller present" "Not present,Present"
bitfld.long 0x00 0. "    ABP                       ,Attention button present" "Not present,Present"
group.word 0x88++0x07
line.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
bitfld.word 0x00 12. "     DLLSTCHGEN               ,Data link layer state changed enable" "Disabled,Enabled"
bitfld.word 0x00 11. "       EMICTL                    ,Electromechanical interlock control" "0,1"
newline
bitfld.word 0x00 10. "     PCC                      ,Power controller control" "0,1"
bitfld.word 0x00 8.--9. "              PIC                       ,Power indicator control" ",On,Blink,Off"
newline
bitfld.word 0x00 6.--7. "     AIC                      ,Attention indicator control" ",On,Blink,Off"
bitfld.word 0x00 5. "          HPIE                      ,Hot plug interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 4. "     CCIE                     ,Command completed interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. "       PDCE                      ,Presence detect changed enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     MRLSCE                   ,MRL sensor changed enable" "Disabled,Enabled"
bitfld.word 0x00 1. "       PFDE                      ,Power fault detected enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     ABPE                     ,Attention button pressed enable" "Disabled,Enabled"
line.word 0x02 "SLOT_STATUS,PCI Express Slot Status Register"
eventfld.word 0x02 8. "     DLLSTCHG                 ,Data link layer state changed" "Not changed,Changed"
rbitfld.word 0x02 7. "    EM_IL_ST                  ,Electromechanical interlock status" "0,1"
newline
rbitfld.word 0x02 6. "     PDS                      ,Indicates presence of an adapter in the slot" "Not present,Present"
rbitfld.word 0x02 5. "    MRLSS                     ,MRL sensor state" "Closed,Open"
newline
eventfld.word 0x02 4. "     CC                       ,Command completed" "Not completed,Completed"
eventfld.word 0x02 3. "  PDC                       ,Presence detect changed" "Not changed,Changed"
newline
eventfld.word 0x02 2. "     MRLSC                    ,MRL sensor changed" "Not changed,Changed"
eventfld.word 0x02 1. "    PFD                       ,Power fault detected" "Not detected,Detected"
newline
eventfld.word 0x02 0. "     ABP                      ,Attention button pressed" "Not pressed,Pressed"
line.word 0x04 "ROOT_CONTROL,PCI Express Root Control Register"
bitfld.word 0x04 4. "     CRSSWVE                  ,CRS software visibility enable" "Disabled,Enabled"
bitfld.word 0x04 3. "       PMEIE                     ,PME interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x04 2. "     SEFEE                    ,System error on fatal error enable" "Disabled,Enabled"
bitfld.word 0x04 1. "       SENFEE                    ,System error on non-fatal error enable" "Disabled,Enabled"
newline
bitfld.word 0x04 0. "     SECEE                    ,System error on correctable error enable" "Disabled,Enabled"
line.word 0x06 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
bitfld.word 0x06 0. "     CRSSWV                   ,CRS software visibility" "Not visible,Visible"
group.long 0x90++0x03
line.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
bitfld.long 0x00 17. " PMEP                     ,PME pending" "Not pending,Pending"
eventfld.long 0x00 16. "    PMES                      ,PME status" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " PME_REQUESTER_ID         ,PME requester ID"
else
group.word 0x80++0x01
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 4. "     LD                       ,Link disable" "No,Yes"
bitfld.word 0x00 3. "            RCB                       ,Read completion boundary" "0,1"
newline
bitfld.word 0x00 0.--1. "     ASPM_CTL                 ,Active state power management (ASPM) control" "0,1,2,3"
rgroup.word 0x82++0x01
line.word 0x00 "LINK_STATUS,PCI Express Link Status Register"
bitfld.word 0x00 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
bitfld.word 0x00 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
bitfld.word 0x00 12. "     SCC                      ,Slot clock configuration" "0,1"
bitfld.word 0x00 11. "              LT                        ,Link training" "0,1"
newline
bitfld.word 0x00 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,,,,x8,?..."
bitfld.word 0x00 0.--3. "             LINK_SP                   ,Negotiated link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
hgroup.long 0x84++0x03
hide.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hgroup.word 0x88++0x01
hide.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
hgroup.word 0x8A++0x01
hide.word 0x00 "SLOT_STATUS,PCI Express Slot Status Register"
hgroup.word 0x8C++0x01
hide.word 0x00 "ROOT_CONTROL,PCI Express Root Control Register"
hgroup.word 0x8E++0x01
hide.word 0x00 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
hgroup.long 0x90++0x03
hide.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
endif
rgroup.long 0x94++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,PCI Express Device Capabilities 2 Register"
bitfld.long 0x00 5. " ARI_FWD                  ,ARI forwarding supported" "Not supported,Supported"
bitfld.long 0x00 4. "  CPL_TO_DS                 ,Completion timeout disable supported" "Not supported,Supported"
newline
bitfld.long 0x00 0.--3. " CPL_TO_RS                ,Completion timeout ranges supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x98++0x01
line.word 0x00 "DEVICE_CONTROL_2,PCI Express Device Control 2 Register"
bitfld.word 0x00 9. "     IDO_CPL_EN               ,IDO completion enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       IDO_REQ_EN                ,IDO request enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5. "     ARIFE                    ,ARI forwarding enable" "Disabled,Enabled"
bitfld.word 0x00 4. "       CPL_TOD                   ,Completion timeout disable" "No,Yes"
newline
bitfld.word 0x00 0.--3. "     CPL_TO_VAL               ,Completion timeout value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x9C++0x03
line.long 0x00 "LINK_CAPABILITIES_2,PCI Express Link Capabilities 2 Register"
bitfld.long 0x00 8. " CROSSLINK_SUPPORTED      ,Crosslink supported" "Not supported,Supported"
hexmask.long.byte 0x00 1.--7. 1. "  SUPPORT_LINK_SPEED_VECTOR ,Supported link speeds vector"
group.word 0xA0++0x01
line.word 0x00 "LINK_CONTROL_2,PCI Express Link Control 2 Register"
bitfld.word 0x00 12.--15. "     CDE                      ,Compliance de-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 11. "             CSOS                      ,Compliance SOS" "0,1"
newline
bitfld.word 0x00 10. "     EMC                      ,Enter modified compliance" "0,1"
bitfld.word 0x00 7.--9. "              TXM                       ,Transmit margin" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 6. "     SDE                      ,Selectable de-emphasis" "0,1"
bitfld.word 0x00 5. "              HWASD                     ,Hardware autonomous speed disable" "No,Yes"
newline
bitfld.word 0x00 4. "     EC                       ,Enter compliance" "0,1"
bitfld.word 0x00 0.--3. "              T_LS                      ,Target link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word 0xA2++0x01
line.word 0x00 "LINK_STATUS_2,PCI Express Link Status 2 Register"
bitfld.word 0x00 5. "     LER                      ,Link equalization request" "Not requested,Requested"
bitfld.word 0x00 4. "  EP3S                      ,Equalization phase 3 complete" "Not complete,Complete"
newline
bitfld.word 0x00 3. "     EP2S                     ,Equalization phase 2 complete" "Not completed,Completed"
bitfld.word 0x00 2. "  EP1S                      ,Equalization phase 1 complete" "Not completed,Completed"
newline
bitfld.word 0x00 1. "     EC                       ,Equalization complete" "Not completed,Completed"
bitfld.word 0x00 0. "  DE_LVL                    ,Current de-emphasis level" "0,1"
tree.end
tree "Advanced Error Reporting Capability Structure"
width 41.
rgroup.word 0x100++0x01
line.word 0x00 "ADVANCED_ERROR_REPORTING_CAPABILITY_ID,PCI Express Advanced Error Reporting Capability ID Register"
group.long 0x104++0x17
line.long 0x00 "UNCORRECTABLE_ERROR_STATUS,PCI Express Uncorrectable Error Status Register"
eventfld.long 0x00 20. " URE                 ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "      ECRCE  ,ECRC error status" "No error,Error"
newline
eventfld.long 0x00 18. " MTLP                ,Malformed TLP status" "No error,Error"
eventfld.long 0x00 17. "      RXO    ,Receiver overflow status" "No error,Error"
newline
eventfld.long 0x00 16. " UC                  ,Unexpected completion status" "No error,Error"
eventfld.long 0x00 15. "      CA     ,Completer abort status" "No error,Error"
newline
eventfld.long 0x00 14. " CTO                 ,Completion timeout status" "No error,Error"
eventfld.long 0x00 13. "      FCPE   ,Flow control protocol error status" "No error,Error"
newline
eventfld.long 0x00 12. " PTLP                ,Poisoned TLP status" "No error,Error"
eventfld.long 0x00 4. "      DLPE   ,Data link protocol error status" "No error,Error"
line.long 0x04 "UNCORRECTABLE_ERROR_MASK,PCI Express Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UREM                ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "    ECRCEM ,ECRC error mask" "Not masked,Masked"
newline
bitfld.long 0x04 18. " MTLPM               ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "    RXOM   ,Receiver overflow mask" "Not masked,Masked"
newline
bitfld.long 0x04 16. " UCM                 ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "    CAM    ,Completer abort mask" "Not masked,Masked"
newline
bitfld.long 0x04 14. " CTOM                ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "    FCPEM  ,Flow control protocol error mask" "Not masked,Masked"
newline
bitfld.long 0x04 12. " PTLPM               ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "    DLPEM  ,Data link protocol error mask" "Not masked,Masked"
line.long 0x08 "UNCORRECTABLE_ERROR_SEVERITY,PCI Express Uncorrectable Error Severity Register"
bitfld.long 0x08 20. " URES                ,Unsupported request error severity" "Not severe,Severe"
bitfld.long 0x08 19. "    ECRCES ,ECRC error severity" "Not severe,Severe"
newline
bitfld.long 0x08 18. " MTLPS               ,Malformed TLP severity" "Not severe,Severe"
bitfld.long 0x08 17. "    RXOS   ,Receiver overflow severity" "Not severe,Severe"
newline
bitfld.long 0x08 16. " UCS                 ,Unexpected completion severity" "Not severe,Severe"
bitfld.long 0x08 15. "    CAS    ,Completer abort severity" "Not severe,Severe"
newline
bitfld.long 0x08 14. " CTOS                ,Completion timeout severity" "Not severe,Severe"
bitfld.long 0x08 13. "    FCPES  ,Flow control protocol error severity" "Not severe,Severe"
newline
bitfld.long 0x08 12. " PTLPS               ,Poisoned TLP severity" "Not severe,Severe"
bitfld.long 0x08 4. "    DLPES  ,Data link protocol error severity" "Not severe,Severe"
line.long 0x0C "CORRECTABLE_ERROR_STATUS,PCI Express Correctable Error Status Register"
eventfld.long 0x0C 13. " ADVNFE              ,Advisory non-fatal error status" "No error,Error"
eventfld.long 0x0C 12. "      RTTO   ,Replay timer timeout status" "No error,Error"
newline
eventfld.long 0x0C 8. " RNR                 ,REPLAY_NUM rollover status" "No error,Error"
eventfld.long 0x0C 7. "      BDLLP  ,Bad DLLP status" "No error,Error"
newline
eventfld.long 0x0C 6. " BTLP                ,Bad TLP status" "No error,Error"
eventfld.long 0x0C 0. "      RXE    ,Receiver error status" "No error,Error"
line.long 0x10 "CORRECTABLE_ERROR_MASK,PCI Express Correctable Error Mask Register"
bitfld.long 0x10 13. " ADVNFEM             ,Advisory non-fatal error mask" "Not masked,Masked"
bitfld.long 0x10 12. "    RTTOM  ,Replay timer timeout mask" "Not masked,Masked"
newline
bitfld.long 0x10 8. " RNRM                ,REPLAY_NUM rollover mask" "Not masked,Masked"
bitfld.long 0x10 7. "    BDLLPM ,Bad DLLP mask" "Not masked,Masked"
newline
bitfld.long 0x10 6. " BTLPM               ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x10 0. "    RXEM   ,Receiver error mask" "Not masked,Masked"
line.long 0x14 "ADVANCED_ERROR_CAPABILITIES_AND_CONTROL,PCI Express Advanced Error Capabilities And Control Register"
bitfld.long 0x14 8. " ECRCCE              ,ECRC checking enable" "Disabled,Enabled"
rbitfld.long 0x14 7. "      ECRCCC ,ECRC checking capable" "Not capable,Capable"
newline
bitfld.long 0x14 6. " ECRCGE              ,ECRC generation enable" "Disabled,Enabled"
rbitfld.long 0x14 5. "      ECRCGC ,ECRC generation capable" "Not capable,Capable"
newline
rbitfld.long 0x14 0.--4. " FIRST_ERROR_POINTER ,First error bit position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0x0F
line.long 0x00 "HEADER_LOG_DWORD1,PCI Express Header Log Register 1"
hexmask.long.byte 0x00 24.--31. 1. " BYTE_0              ,Byte 0 of the TLP header associated with the error"
hexmask.long.byte 0x00 16.--23. 1. "            BYTE_1 ,Byte 1 of the TLP header associated with the error"
newline
hexmask.long.byte 0x00 8.--15. 1. " BYTE_2              ,Byte 2 of the TLP header associated with the error"
hexmask.long.byte 0x00 0.--7. 1. "            BYTE_3 ,Byte 3 of the TLP header associated with the error"
line.long 0x04 "HEADER_LOG_DWORD2,PCI Express Header Log Register 2"
hexmask.long.byte 0x04 24.--31. 1. " BYTE_4              ,Byte 4 of the TLP header associated with the error"
hexmask.long.byte 0x04 16.--23. 1. "            BYTE_5 ,Byte 5 of the TLP header associated with the error"
newline
hexmask.long.byte 0x04 8.--15. 1. " BYTE_6              ,Byte 6 of the TLP header associated with the error"
hexmask.long.byte 0x04 0.--7. 1. "            BYTE_7 ,Byte 7 of the TLP header associated with the error"
line.long 0x08 "HEADER_LOG_DWORD3,PCI Express Header Log Register 3"
hexmask.long.byte 0x08 24.--31. 1. " BYTE_8              ,Byte 8 of the TLP header associated with the error"
hexmask.long.byte 0x08 16.--23. 1. "            BYTE_9 ,Byte 9 of the TLP header associated with the error"
newline
hexmask.long.byte 0x08 8.--15. 1. " BYTE_A              ,Byte 10 of the TLP header associated with the error"
hexmask.long.byte 0x08 0.--7. 1. "            BYTE_B ,Byte 11 of the TLP header associated with the error"
line.long 0x0C "HEADER_LOG_DWORD4,PCI Express Header Log Register 4"
hexmask.long.byte 0x0C 24.--31. 1. " BYTE_C              ,Byte 12 of the TLP header associated with the error"
hexmask.long.byte 0x0C 16.--23. 1. "            BYTE_D ,Byte 13 of the TLP header associated with the error"
newline
hexmask.long.byte 0x0C 8.--15. 1. " BYTE_E              ,Byte 14 of the TLP header associated with the error"
hexmask.long.byte 0x0C 0.--7. 1. "            BYTE_F ,Byte 15 of the TLP header associated with the error"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==0x000)
group.long 0x12C++0x07
line.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
bitfld.long 0x00 2. " FERE                ,Fatal error reporting enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NFERE  ,Non-fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CERE                ,Correctable error reporting enable" "Disabled,Enabled"
line.long 0x04 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
rbitfld.long 0x04 27.--31. " AEIMN               ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FEMR   ,Fatal error messages received" "Not received,Received"
newline
eventfld.long 0x04 5. " NFEMR               ,Non-fatal error messages received" "Not received,Received"
eventfld.long 0x04 4. "  FUF    ,First uncorrectable fatal" "0,1"
newline
eventfld.long 0x04 3. " MEFNFR              ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received"
eventfld.long 0x04 2. "  EFNFR  ,ERR_FATAL/NONFATAL received" "Not received,Received"
newline
eventfld.long 0x04 1. " MECR                ,Multiple ERR_COR received" "Not received,Received"
eventfld.long 0x04 0. "  ECR    ,ERR_COR received" "Not received,Received"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
hgroup.long 0x130++0x03
hide.long 0x00 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
endif
rgroup.word 0x134++0x03
line.word 0x00 "CORRECTABLE_ERROR_SOURCE_ID,PCI Express Correctable Error Source ID Register"
line.word 0x02 "ERROR_SOURCE_ID,PCI Express Error Source ID Register"
tree.end
tree "Alternate Routing ID Capability Structure"
width 28.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3.))!=0x00)
rgroup.long 0x148++0x03
line.long 0x00 "ARI_CAPABILITY_HEADER,ARI Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_OFFSET            ,Pointer to the next capability structure"
bitfld.long 0x00 16.--19. "           CAP_VERSION ,Indicates the version of the capability structure present" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAPABILITY_ID ,ARI extended capability"
rgroup.word 0x14C++0x03
line.word 0x00 "ARI_CAPABILITY,ARI Capability Register"
hexmask.word.byte 0x00 8.--15. 1. "     NFN                    ,Next function number"
bitfld.word 0x00 1. "             AFGC        ,ARI device supports function group level granularity for ACS P2P egress control" "Not supported,Supported"
newline
bitfld.word 0x00 0. "     MFGC                   ,ARI device supports function group level arbitration via MFVC" "Not supported,Supported"
line.word 0x02 "ARI_CONTROL,ARI Control Register"
bitfld.word 0x02 4.--6. "     FG                     ,Function group number of this function" "0,1,2,3,4,5,6,7"
bitfld.word 0x02 1. "              AFGE        ,ACS function groups enable" "Disabled,Enabled"
newline
bitfld.word 0x02 0. "     MFGE                   ,MFVC function groups enable" "Disabled,Enabled"
else
hgroup.long 0x148++0x03
hide.long 0x00 "ARI_CAPABILITY_HEADER,ARI Capability Header Register"
hgroup.word 0x14C++0x01
hide.word 0x00 "ARI_CAPABILITY,ARI Capability Register"
hgroup.word 0x14E++0x01
hide.word 0x00 "ARI_CONTROL,ARI Control Register"
endif
tree.end
width 28.
tree "Secondary PCI Express Capability Structure"
rgroup.long 0x158++0x03
line.long 0x00 "SPCIE_CAP_HEADER_REG,Secondary PCIE Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_OFFSET        ,Pointer to the next capability structure"
bitfld.long 0x00 16.--19. "          CAP_VERSION   ,Indicates the version of the capability structure present" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAP_ID    ,Secondary PCI Express capability"
group.long 0x15C++0x07
line.long 0x00 "LINK_CONTROL3_REG,Link Control 3 Register"
bitfld.long 0x00 1. " EQ_REQ_INT_EN      ,Link equalization request interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      PERFORM_EQ    ,Perform equalization" "Not performed,Performed"
line.long 0x04 "LANE_ERR_STATUS_REG,Lane Error Status Register"
eventfld.long 0x04 7. " LANE_ERR_STATUS[7] ,Lane 8 detected a lane-based error" "Not detected,Detected"
eventfld.long 0x04 6. "  [6]           ,Lane 7 detected a lane-based error" "Not detected,Detected"
newline
eventfld.long 0x04 5. " [5]                ,Lane 6 detected a lane-based error" "Not detected,Detected"
eventfld.long 0x04 4. "  [4]           ,Lane 5 detected a lane-based error" "Not detected,Detected"
newline
eventfld.long 0x04 3. " [3]                ,Lane 4 detected a lane-based error" "Not detected,Detected"
eventfld.long 0x04 2. "  [2]           ,Lane 3 detected a lane-based error" "Not detected,Detected"
newline
eventfld.long 0x04 1. " [1]                ,Lane 2 detected a lane-based error" "Not detected,Detected"
eventfld.long 0x04 0. "  [0]           ,Lane 1 detected a lane-based error" "Not detected,Detected"
rgroup.word (0x164+0x0)++0x01
line.word 0x00 "LANE1_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0x2)++0x01
line.word 0x00 "LANE2_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0x4)++0x01
line.word 0x00 "LANE3_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0x6)++0x01
line.word 0x00 "LANE4_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0x8)++0x01
line.word 0x00 "LANE5_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0xA)++0x01
line.word 0x00 "LANE6_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0xC)++0x01
line.word 0x00 "LANE7_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x164+0xE)++0x01
line.word 0x00 "LANE8_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree "Single Root I/O Virtualization (SR-IOV) Capability Structure"
width 38.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))!=0x00)
rgroup.long 0x178++0x07
line.long 0x00 "SR-IOV_EXTENDED_CAPABILITY_ID,PCI Express SR-IOV Extended Capability ID Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_CAPABILITY_OFFSET ,Next capability offset"
bitfld.long 0x00 16.--19. "             CAPABILITY_VERSION ,Capability version" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAPABILITY_ID ,PCI Express extended capability ID"
line.long 0x04 "SR-IOV_CAPABILITIES,PCI Express SR-IOV Capabilities Register"
hexmask.long.word 0x04 21.--31. 1. " VFMIMN                 ,VF migration interrupt message number"
bitfld.long 0x04 1. "             ARICHR             ,ARI capable hierarchy preserved" "Not preserved,Preserved"
newline
bitfld.long 0x04 0. " VFMC                   ,VF migration capable" "Not capable,Capable"
rgroup.word 0x180++0x07
line.word 0x00 "SR-IOV_CONTROL,PCI Express SR-IOV Control Register"
bitfld.word 0x00 4. "     ARICH                  ,ARI capable hierarchy" "0,1"
bitfld.word 0x00 3. "                VFMSE              ,Memory space enable for virtual functions" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     VFMIE                  ,VF migration interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 1. "         VFME               ,VF migration enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     VFE                    ,VF enable" "Disabled,Enabled"
line.word 0x02 "SR-IOV_STATUS,PCI Express SR-IOV Status Register"
bitfld.word 0x02 0. "     VFMS                   ,VF migration status" "In,Out"
line.word 0x04 "SR-IOV_INITIAL_VF,PCI Express SR-IOV Initial VF Register"
line.word 0x06 "SR-IOV_TOTAL_VF,PCI Express SR-IOV Total VF Register"
group.word 0x188++0x01
line.word 0x00 "SR-IOV_NUMBER_VF,PCI Express SR-IOV Number VF Register"
group.byte 0x18A++0x00
line.byte 0x00 "SR-IOV_FUNCTION_DEPENDENCY_LINK,PCI Express SR-IOV Function Dependency Link Register"
rgroup.word 0x18C++0x03
line.word 0x00 "SR-IOV_FIRST_VF_OFFSET,PCI Express SR-IOV First VF Offset Register"
line.word 0x02 "SR-IOV_VF_STRIDE,PCI Express SR-IOV VF Stride Register"
rgroup.word 0x192++0x01
line.word 0x00 "SR-IOV_DEVICE_ID,PCI Express SR-IOV Device ID Register"
rgroup.long 0x194++0x03
line.long 0x00 "SR-IOV_SUPPORTED_PAGE_SIZE,PCI Express SR-IOV Supported Page Size Register"
group.long 0x198++0x1B
line.long 0x00 "SR-IOV_SYSTEM_PAGE_SIZE,PCI Express SR-IOV System Page Size Register"
line.long 0x04 "VFBAR0,PCI Express SR-IOV VF Base Address Register 0"
hexmask.long.tbyte 0x04 12.--31. 0x10 " ADDRESS                ,Indicates the base address where the inbound memory window begins"
rbitfld.long 0x04 3. "           PREF               ,Prefetchable" "Not prefetchable,Prefetchable"
newline
rbitfld.long 0x04 1.--2. " TYPE                   ,Type" "Anywhere/32-bit,?..."
line.long 0x08 "VFBAR1,PCI Express SR-IOV VF Base Address Register 1"
hexmask.long.tbyte 0x08 12.--31. 0x10 " ADDRESS                ,Indicates the base address where the inbound memory window begins"
rbitfld.long 0x08 3. "           PREF               ,Prefetchable" "Not prefetchable,Prefetchable"
newline
rbitfld.long 0x08 1.--2. " TYPE                   ,Type" "Anywhere/32-bit,?..."
line.long 0x0C "VFBAR2,PCI Express SR-IOV VF Base Address Register 2"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " ADDRESS                ,Indicates the base address where the inbound memory window begins"
rbitfld.long 0x0C 3. "           PREF               ,Prefetchable" "Not prefetchable,Prefetchable"
newline
rbitfld.long 0x0C 1.--2. " TYPE                   ,Type" ",,Anywhere/64-bit,?..."
line.long 0x10 "VFBAR3,PCI Express SR-IOV VF Base Address Register 3"
line.long 0x14 "VFBAR4,PCI Express SR-IOV VF Base Address Register 4"
hexmask.long.tbyte 0x14 12.--31. 0x10 " ADDRESS                ,Indicates the base address where the inbound memory window begins"
rbitfld.long 0x14 3. "           PREF               ,Prefetchable" "Not prefetchable,Prefetchable"
newline
rbitfld.long 0x14 1.--2. " TYPE                   ,Type" ",,Anywhere/64-bit,?..."
line.long 0x18 "VFBAR5,PCI Express SR-IOV VF Base Address Register 5"
rgroup.long 0x1C++0x03
line.long 0x00 "SR-IOV_MIGRATION_STATE_ARRAY_OFFSET,PCI Express SR-IOV Migration State Array Offset Register"
hexmask.long 0x00 3.--31. 0x08 " MSAO                   ,VF migration state offset"
bitfld.long 0x00 0.--2. "         MSBIR              ,VF migration state BIR" "0,1,2,3,4,5,6,7"
else
hgroup.word 0x178++0x01
hide.word 0x00 "SR-IOV_EXTENDED_CAPABILITY_ID,PCI Express SR-IOV Extended Capability ID Register"
hgroup.long 0x17C++0x03
hide.long 0x00 "SR-IOV_CAPABILITIES,PCI Express SR-IOV Capabilities Register"
hgroup.word 0x180++0x01
hide.word 0x00 "SR-IOV_CONTROL,PCI Express SR-IOV Control Register"
hgroup.word 0x182++0x01
hide.word 0x00 "SR-IOV_STATUS,PCI Express SR-IOV Status Register"
hgroup.word 0x184++0x01
hide.word 0x00 "SR-IOV_INITIAL_VF,PCI Express SR-IOV Initial VF Register"
hgroup.word 0x186++0x01
hide.word 0x00 "SR-IOV_TOTAL_VF,PCI Express SR-IOV Total VF Register"
hgroup.word 0x188++0x01
hide.word 0x00 "SR-IOV_NUMBER_VF,PCI Express SR-IOV Number VF Register"
hgroup.byte 0x18A++0x00
hide.byte 0x00 "SR-IOV_FUNCTION_DEPENDENCY_LINK,PCI Express SR-IOV Function Dependency Link Register"
hgroup.word 0x18C++0x01
hide.word 0x00 "SR-IOV_FIRST_VS_OFFSET,PCI Express SR-IOV First VF Offset Register"
hgroup.word 0x18E++0x01
hide.word 0x00 "SR-IOV_VF_STRIDE,PCI Express SR-IOV VF Stride Register"
hgroup.word 0x192++0x01
hide.word 0x00 "SR-IOV_DEVICE_ID,PCI Express SR-IOV Device ID Register"
hgroup.long 0x194++0x03
hide.long 0x00 "SR-IOV_SUPPORTED_PAGE_SIZE,PCI Express SR-IOV Supported Page Size Register"
hgroup.long 0x198++0x03
hide.long 0x00 "SR-IOV_SYSTEM_PAGE_SIZE,PCI Express SR-IOV System Page Size Register"
hgroup.long 0x19C++0x03
hide.long 0x00 "VFBAR0,PCI Express SR-IOV VF Base Address Register 0"
hgroup.long 0x1A0++0x03
hide.long 0x00 "VFBAR1,PCI Express SR-IOV VF Base Address Register 1"
hgroup.long 0x1A4++0x03
hide.long 0x00 "VFBAR2,PCI Express SR-IOV VF Base Address Register 2"
hgroup.long 0x1A8++0x03
hide.long 0x00 "VFBAR3,PCI Express SR-IOV VF Base Address Register 3"
hgroup.long 0x1AC++0x03
hide.long 0x00 "VFBAR4,PCI Express SR-IOV VF Base Address Register 4"
hgroup.long 0x1B0++0x03
hide.long 0x00 "VFBAR5,PCI Express SR-IOV VF Base Address Register 5"
hgroup.long 0x1B4++0x03
hide.long 0x00 "SR-IOV_MIGRATION_STATE_ARRAY_OFFSET,PCI Express SR-IOV Migration State Array Offset Register"
endif
tree.end
tree "PEX Module Internal Configuration Space"
width 39.
group.long 0x71C++0x03
line.long 0x00 "SYMBOL_TIMER_FILTER_1_OFF,Symbol Timer And Filter Mask 1 Register"
bitfld.long 0x00 31. " CX_FLT_MASK_RC_CFG_DISCARD     ,CX_FLT_MASK_RC_CFG_DISCARD" "Not masked,Masked"
bitfld.long 0x00 30. "                  CX_FLT_MASK_RC_IO_DISCARD    ,CX_FLT_MASK_RC_IO_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 29. " CX_FLT_MASK_MSG_DROP           ,CX_FLT_MASK_MSG_DROP" "Not masked,Masked"
bitfld.long 0x00 28. "                  CX_FLT_MASK_CPL_ECRC_DISCARD ,CX_FLT_MASK_CPL_ECRC_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 27. " CX_FLT_MASK_ECRC_DISCARD       ,CX_FLT_MASK_ECRC_DISCARD" "Not masked,Masked"
bitfld.long 0x00 26. "                  CX_FLT_MASK_CPL_LEN_MATCH    ,CX_FLT_MASK_CPL_LEN_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 25. " CX_FLT_MASK_CPL_ATTR_MATCH     ,CX_FLT_MASK_CPL_ATTR_MATCH" "Not masked,Masked"
bitfld.long 0x00 24. "                  CX_FLT_MASK_CPL_TC_MATCH     ,CX_FLT_MASK_CPL_TC_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 23. " CX_FLT_MASK_CPL_FUNC_MATCH     ,CX_FLT_MASK_CPL_FUNC_MATCH" "Not masked,Masked"
bitfld.long 0x00 22. "                  CX_FLT_MASK_CPL_REQID_MATCH  ,CX_FLT_MASK_CPL_REQID_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 21. " CX_FLT_MASK_CPL_TAGERR_MATCH   ,CX_FLT_MASK_CPL_TAGERR_MATCH" "Not masked,Masked"
bitfld.long 0x00 20. "                  CX_FLT_MASK_LOCKED_RD_AS_UR  ,CX_FLT_MASK_LOCKED_RD_AS_UR" "Not masked,Masked"
newline
bitfld.long 0x00 19. " CX_FLT_MASK_CFG_TYPE1_RE_AS_UR ,CX_FLT_MASK_CFG_TYPE1_RE_AS_UR" "Not masked,Masked"
bitfld.long 0x00 18. "                  CX_FLT_MASK_UR_OUTSIDE_BAR   ,CX_FLT_MASK_UR_OUTSIDE_BAR" "Not masked,Masked"
newline
bitfld.long 0x00 17. " CX_FLT_MASK_UR_POIS            ,CX_FLT_MASK_UR_POIS" "Not masked,Masked"
bitfld.long 0x00 16. "                  CX_FLT_MASK_UR_FUNC_MISMATCH ,CX_FLT_MASK_UR_FUNC_MISMATCH" "Not masked,Masked"
newline
bitfld.long 0x00 15. " DISABLE_FC_WD_TIMER            ,Disables FC watchdog timer" "No,Yes"
hexmask.long.word 0x00 0.--10. 1. "                         SKP_INT_VAL                  ,SKP interval value"
group.long 0x890++0x03
line.long 0x00 "GEN3_RELATED_OFF,Gen3 Control Register"
bitfld.long 0x00 16. " GEN3_EQUALIZATION_DIS          ,Equalization disable" "No,Yes"
bitfld.long 0x00 12. "                         RXEQ_PH01_EN                 ,Rx equalization phase 0/1 hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " EQ_EIEOS_CNT                   ,Equalization EIEOS count reset disable" "No,Yes"
group.long 0x8BC++0x03
line.long 0x00 "MISC_CONTROL_1_OFF,DBI Read-Only Write Enable Register"
bitfld.long 0x00 0. " DBI_RO_WR_EN                   ,Write to RO registers using DBI" "Disabled,Enabled"
group.long 0x8E0++0x07
line.long 0x00 "COHERENCY_CONTROL_1_OFF,Coherency Control 1"
hexmask.long 0x00 2.--31. 0x04 " CFG_MEMTYPE_BOUNDARY_LOW_ADDR  ,Boundary lower address for memory type"
bitfld.long 0x00 0. "                    CFG_MEMTYPE_VALUE            ,Memory type" "CCSR/Memory,?..."
line.long 0x04 "COHERENCY_CONTROL_2_OFF,Coherency Control 2"
group.long 0x900++0x03
line.long 0x00 "IATU_VIEWPORT_OFF,IATU Index Register"
bitfld.long 0x00 31. " REGION_DIR                     ,Region direction" "Outbound,Inbound"
hexmask.long.byte 0x00 0.--7. 1. "                    REGION_INDEX                 ,Region index"
if (((per.l(ad:0x03600000+0x900))&0x80000000)==0x80000000)
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==(0x10<<3))
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 20.--24. " CTRL_1_FUNC_NUM                ,Function number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 16.--17. "                          AT                           ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 28. " CFG_SHIFT_MODE                 ,CFG shift mode" "Not shifted,Shifted"
hexmask.long.byte 0x04 0.--7. 1. "                 MSG_CODE                     ,Message code"
else
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 28. " CFG_SHIFT_MODE                 ,CFG shift mode" "Not shifted,Shifted"
hexmask.long.byte 0x04 0.--7. 1. "                 MSG_CODE                     ,Message code"
endif
group.long 0x90C++0x13
line.long 0x00 "IATU_LWR_BASE_ADDR_OFF_INBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x00 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x04 "IATU_UPPER_BASE_ADDR_OFF_INBOUND_0,IATU Upper Base Address Register"
line.long 0x08 "IATU_LIMIT_ADDR_OFF_INBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x08 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x08 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x0C "IATU_LWR_TARGET_ADDR_OFF_INBOUND_0,IATU Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x10 "IATU_UPPER_TARGET_ADDR_OFF_INBOUND_0,IATU Upper Target Address Register"
else
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3.))==(0x10<<3.))
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 20.--24. " CTRL_1_FUNC_NUM                ,Function number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0x908++0x17
line.long 0x00 "IATU_REGION_CTRL_2_OFF_OUTBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x00 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                    CFG_SHIFT_MODE               ,CFG shift mode" "Not shifted,Shifted"
newline
hexmask.long.byte 0x00 0.--7. 1. " MSG_CODE                       ,Message code"
line.long 0x04 "IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x04 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x04 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x08 "IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0,IATU Upper Base Address Register"
line.long 0x0C "IATU_LIMIT_ADDR_OFF_OUTBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x10 "IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0,IATU Outbound Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x10 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x10 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x14 "IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0,IATU Upper Target Address Register"
endif
tree.end
tree "Base Address"
wgroup.long 0x1010++0x07
line.long 0x00 "BAR0_MASK,Base Address 0 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR1_MASK,Base Address 1 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<3))==(0x10<<3))
wgroup.long 0x1018++0x0F
line.long 0x00 "BAR2_MASK,Base Address 2 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR3_MASK,Base Address 3 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x08 "BAR4_MASK,Base Address 4 Mask Register"
hexmask.long 0x08 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x08 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x0C "BAR5_MASK,Base Address 5 Mask Register"
hexmask.long 0x0C 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x0C 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
wgroup.long 0x1030++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
else
wgroup.long 0x1038++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long.tbyte 0x00 11.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                      BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
endif
tree.end
base ad:0x03600000+0x10000
width 22.
tree "PEX3_LUT Memory Map/Registers"
group.long 0x20++0x07
line.long 0x00 "PEX_LUT_PEXLSR,PEX LUT Status Register"
eventfld.long 0x00 31. " LUTM      ,Lookup table miss" "Not missed,Missed"
eventfld.long 0x00 30. "         MLUTM   ,Multiple lookup table miss" "Not missed,Missed"
newline
hexmask.long.word 0x00 0.--15. 1. " CREQID    ,Captured REQID"
line.long 0x04 "PEX_LUT_PEXLCR,PEX LUT Control Register"
bitfld.long 0x04 31. " DPL       ,Default privilege level" "0,1"
bitfld.long 0x04 30. "                  DBMT    ,Default bypass memory translation" "0,1"
newline
hexmask.long.word 0x04 0.--14. 1. " DICID     ,Default isolation context ID"
group.long (0x800+0x0)++0x07
line.long 0x00 "PEX_LUT_PEXL1UDR,PEX LUT Entry 1 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 1 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 1 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL1LDR,PEX LUT Entry 1 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 1 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 1 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x8)++0x07
line.long 0x00 "PEX_LUT_PEXL2UDR,PEX LUT Entry 2 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 2 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 2 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL2LDR,PEX LUT Entry 2 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 2 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 2 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x10)++0x07
line.long 0x00 "PEX_LUT_PEXL3UDR,PEX LUT Entry 3 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 3 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 3 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL3LDR,PEX LUT Entry 3 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 3 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 3 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x18)++0x07
line.long 0x00 "PEX_LUT_PEXL4UDR,PEX LUT Entry 4 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 4 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 4 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL4LDR,PEX LUT Entry 4 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 4 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 4 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x20)++0x07
line.long 0x00 "PEX_LUT_PEXL5UDR,PEX LUT Entry 5 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 5 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 5 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL5LDR,PEX LUT Entry 5 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 5 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 5 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x28)++0x07
line.long 0x00 "PEX_LUT_PEXL6UDR,PEX LUT Entry 6 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 6 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 6 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL6LDR,PEX LUT Entry 6 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 6 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 6 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x30)++0x07
line.long 0x00 "PEX_LUT_PEXL7UDR,PEX LUT Entry 7 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 7 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 7 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL7LDR,PEX LUT Entry 7 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 7 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 7 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x38)++0x07
line.long 0x00 "PEX_LUT_PEXL8UDR,PEX LUT Entry 8 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 8 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 8 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL8LDR,PEX LUT Entry 8 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 8 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 8 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x40)++0x07
line.long 0x00 "PEX_LUT_PEXL9UDR,PEX LUT Entry 9 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 9 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 9 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL9LDR,PEX LUT Entry 9 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 9 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 9 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x48)++0x07
line.long 0x00 "PEX_LUT_PEXL10UDR,PEX LUT Entry 10 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 10 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 10 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL10LDR,PEX LUT Entry 10 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 10 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 10 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x50)++0x07
line.long 0x00 "PEX_LUT_PEXL11UDR,PEX LUT Entry 11 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 11 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 11 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL11LDR,PEX LUT Entry 11 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 11 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 11 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x58)++0x07
line.long 0x00 "PEX_LUT_PEXL12UDR,PEX LUT Entry 12 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 12 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 12 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL12LDR,PEX LUT Entry 12 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 12 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 12 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x60)++0x07
line.long 0x00 "PEX_LUT_PEXL13UDR,PEX LUT Entry 13 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 13 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 13 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL13LDR,PEX LUT Entry 13 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 13 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 13 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x68)++0x07
line.long 0x00 "PEX_LUT_PEXL14UDR,PEX LUT Entry 14 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 14 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 14 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL14LDR,PEX LUT Entry 14 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 14 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 14 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x70)++0x07
line.long 0x00 "PEX_LUT_PEXL15UDR,PEX LUT Entry 15 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 15 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 15 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL15LDR,PEX LUT Entry 15 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 15 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 15 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x78)++0x07
line.long 0x00 "PEX_LUT_PEXL16UDR,PEX LUT Entry 16 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 16 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 16 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL16LDR,PEX LUT Entry 16 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 16 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 16 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x80)++0x07
line.long 0x00 "PEX_LUT_PEXL17UDR,PEX LUT Entry 17 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 17 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 17 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL17LDR,PEX LUT Entry 17 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 17 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 17 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x88)++0x07
line.long 0x00 "PEX_LUT_PEXL18UDR,PEX LUT Entry 18 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 18 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 18 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL18LDR,PEX LUT Entry 18 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 18 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 18 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x90)++0x07
line.long 0x00 "PEX_LUT_PEXL19UDR,PEX LUT Entry 19 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 19 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 19 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL19LDR,PEX LUT Entry 19 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 19 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 19 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x98)++0x07
line.long 0x00 "PEX_LUT_PEXL20UDR,PEX LUT Entry 20 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 20 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 20 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL20LDR,PEX LUT Entry 20 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 20 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 20 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA0)++0x07
line.long 0x00 "PEX_LUT_PEXL21UDR,PEX LUT Entry 21 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 21 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 21 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL21LDR,PEX LUT Entry 21 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 21 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 21 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA8)++0x07
line.long 0x00 "PEX_LUT_PEXL22UDR,PEX LUT Entry 22 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 22 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 22 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL22LDR,PEX LUT Entry 22 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 22 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 22 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB0)++0x07
line.long 0x00 "PEX_LUT_PEXL23UDR,PEX LUT Entry 23 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 23 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 23 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL23LDR,PEX LUT Entry 23 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 23 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 23 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB8)++0x07
line.long 0x00 "PEX_LUT_PEXL24UDR,PEX LUT Entry 24 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 24 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 24 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL24LDR,PEX LUT Entry 24 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 24 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 24 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC0)++0x07
line.long 0x00 "PEX_LUT_PEXL25UDR,PEX LUT Entry 25 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 25 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 25 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL25LDR,PEX LUT Entry 25 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 25 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 25 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC8)++0x07
line.long 0x00 "PEX_LUT_PEXL26UDR,PEX LUT Entry 26 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 26 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 26 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL26LDR,PEX LUT Entry 26 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 26 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 26 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD0)++0x07
line.long 0x00 "PEX_LUT_PEXL27UDR,PEX LUT Entry 27 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 27 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 27 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL27LDR,PEX LUT Entry 27 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 27 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 27 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD8)++0x07
line.long 0x00 "PEX_LUT_PEXL28UDR,PEX LUT Entry 28 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 28 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 28 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL28LDR,PEX LUT Entry 28 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 28 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 28 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE0)++0x07
line.long 0x00 "PEX_LUT_PEXL29UDR,PEX LUT Entry 29 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 29 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 29 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL29LDR,PEX LUT Entry 29 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 29 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 29 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE8)++0x07
line.long 0x00 "PEX_LUT_PEXL30UDR,PEX LUT Entry 30 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 30 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 30 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL30LDR,PEX LUT Entry 30 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 30 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 30 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF0)++0x07
line.long 0x00 "PEX_LUT_PEXL31UDR,PEX LUT Entry 31 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 31 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 31 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL31LDR,PEX LUT Entry 31 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 31 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 31 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF8)++0x07
line.long 0x00 "PEX_LUT_PEXL32UDR,PEX LUT Entry 32 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 32 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 32 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL32LDR,PEX LUT Entry 32 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 32 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 32 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF 0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,Per PF dependent message interrupt is pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,Per PF dependent error interrupt is pending" "Not pending,Pending"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,PF dependent message interrupt pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,PF dependent error interrupt pending" "Not pending,Pending"
group.long 0x40020++0x0F
line.long 0x00 "PEX_PF0_PME_MES_DR,PEX PF 0 PCIE PME And Message Detect Register"
eventfld.long 0x00 15. " PTO       ,Indicates that PME turn off was detected" "Not detected,Detected"
eventfld.long 0x00 13. "       ENL23   ,Indicates that PCIe core entered L2/L3 ready state" "Not detected,Detected"
newline
eventfld.long 0x00 12. " EXL23     ,Indicates that PCIe core exited L2/L3 ready state" "Not detected,Detected"
eventfld.long 0x00 10. "       HRD     ,Indicates a hot reset was detected" "Not detected,Detected"
newline
eventfld.long 0x00 9. " LDD       ,Indicates a link down was detected" "Not detected,Detected"
eventfld.long 0x00 7. "       LUD     ,Indicates a link up was detected" "Not detected,Detected"
line.long 0x04 "PEX_PF0_PME_MES_DISR,PEX PF 0 PCIE PME And Message Disable Register"
bitfld.long 0x04 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x04 13. "                ENL23D  ,Entered L2/L3 ready state detect disabled" "No,Yes"
newline
bitfld.long 0x04 12. " EXL23D    ,Exited L2/L3 ready state detect disable" "No,Yes"
bitfld.long 0x04 10. "                HRDD    ,Hot reset detect disable" "No,Yes"
newline
bitfld.long 0x04 9. " LDDD      ,Link down detect disable" "No,Yes"
bitfld.long 0x04 7. "                LUDD    ,Link up detect disable" "No,Yes"
line.long 0x08 "PEX_PF0_PME_MES_IER,PEX PF 0 PCIE PME And Message Interrupt Enable Register"
bitfld.long 0x08 15. " PTOIE     ,PME turn off interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 13. "           ENL23IE ,Entered L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 12. " EXL23IE   ,Exited L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 10. "           HRDIE   ,Hot reset detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 9. " LDDIE     ,Link down detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 7. "           LUDIE   ,Link up detect interrupt enabled" "Disabled,Enabled"
line.long 0x0C "PEX_PF0_MCR,PEX PF 0 PCIE Message Command Register"
bitfld.long 0x0C 4. " INTX      ,Assert/de-assert intx command" "Not asserted,Asserted"
bitfld.long 0x0C 2. "       SPMES   ,Send PM_PME command" "No effect,Send"
newline
bitfld.long 0x0C 1. " EXL2S     ,Exit L2 state command" "No effect,Generate"
bitfld.long 0x0C 0. "          PTOMR   ,Generate PME turn off message (RC only)" "No effect,Generate"
group.long 0x40140++0x03
line.long 0x00 "PEX_PF0_RBP_ADDR_U,PEX PF 0 Route By Port Address Upper Register"
hexmask.long.word 0x00 16.--31. 1. " ADDR_U    ,Upper 16 bit of the PCIE slave device used for the outbound transactions"
group.long 0x40200++0x03
line.long 0x00 "PEX_PF0_ERR_DR,PEX PF 0 PCIE Error Detect Register"
eventfld.long 0x00 31. " ME        ,Indicates multiple errors of same type" "Not detected,Detected"
eventfld.long 0x00 23. "       PCT     ,Indicates completion timeout" "Not detected,Detected"
newline
eventfld.long 0x00 21. " PCAC      ,Completer abort was detected" "Not detected,Detected"
eventfld.long 0x00 19. "       CDNSC   ,Completion with data not succsessful was detected" "Not detected,Detected"
newline
eventfld.long 0x00 2. " UREP      ,Indicates an unsupported request completion was detected" "Not detected,Detected"
group.long 0x40208++0x03
line.long 0x00 "PEX_PF0_ERR_EN,PEX PF 0 PCIE Error Interrupt Enable Register"
bitfld.long 0x00 23. " PCTIE     ,Completion timeout interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "           PCACIE  ,Completer abort interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CDNSCIE   ,Completion with data not successful interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           UREPIE  ,Unsupported request in EP mode interrupt enable" "Disabled,Enabled"
group.long 0x40210++0x03
line.long 0x00 "PEX_PF0_ERR_DISR,PEX PF 0 PCIE Error Disable Register"
eventfld.long 0x00 31. " MED       ,Multiple errors of same type detection disable" "No,Yes"
bitfld.long 0x00 23. "                PCTD    ,Completion detection disable" "No,Yes"
newline
bitfld.long 0x00 21. " PCACD     ,Completer abort detection disable" "No,Yes"
bitfld.long 0x00 19. "                CDNSCD  ,Completion with data not successful detection disable" "No,Yes"
newline
bitfld.long 0x00 2. " UREPD     ,Unsupported request in EP mode detection disable" "No,Yes"
group.long 0x407F8++0x03
line.long 0x00 "PEX_PF0_VF,PEX PF0 Debug Register"
bitfld.long 0x00 22.--27. " VF        ,Virtual function number of the transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21. "                 VF_ACT  ,Soft reset" "Not Activated,Activated"
group.long 0x407FC++0x03
line.long 0x00 "PEX_PF0_DBG,PEX PF0 Debug Register"
bitfld.long 0x00 31. " WE        ,Write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "           SR      ,Soft reset" "No reset,Reset"
newline
rbitfld.long 0x00 0.--5. " LTSSM     ,Link training status state machine (LTSSM) status" "DETECT_QUIET,DETECT_ACTIVE,POLL_ACTIVE,POLL_COMPLIANCE,POLL_CONFIG,PRE_DETECT_QUIET,DETECT_WAIT,CFG_LINKWD_START,CFG_LINKWD_ACEPT,CFG_LANENUM_WAIT,CFG_LANENUM_ACEPT,CFG_COMPLETE,CFG_IDLE,RCVRY_LOCK,RCVRY_SPEED,RCVRY_RCVRCFG,RCVRY_IDLE,L0,L0S,L123_SEND_EIDLE,L1_IDLE,L2_IDLE,L2_WAKE,DISABLED_ENTRY,DISABLED_IDLE,DISABLED,LPBK_ENTRY,LPBK_ACTIVE,LPBK_EXIT,LPBK_EXIT_TIMEOUT,HOT_RESET_ENTRY,HOT_RESET,RCVRY_EQ0,RCVRY_EQ1,RCVRY_EQ2,RCVRY_EQ3,?..."
group.long 0x50014++0x03
line.long 0x00 "PEX_PF1_CONFIG,PEX PF 1 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x50018++0x03
line.long 0x00 "PEX_PF1_INT_STAT,PEX PF 1 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,Per PF dependent message interrupt is pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,Per PF dependent error interrupt is pending" "Not pending,Pending"
group.long 0x50020++0x0F
line.long 0x00 "PEX_PF1_PME_MES_DR,PEX PF 1 PCIE PME And Message Detect Register"
eventfld.long 0x00 15. " PTO       ,Indicates that PME turn off was detected" "Not detected,Detected"
eventfld.long 0x00 13. "       ENL23   ,Indicates that PCIe core entered L2/L3 ready state" "Not detected,Detected"
newline
eventfld.long 0x00 12. " EXL23     ,Indicates that PCIe core exited L2/L3 ready state" "Not detected,Detected"
eventfld.long 0x00 10. "       HRD     ,Indicates a hot reset was detected" "Not detected,Detected"
newline
eventfld.long 0x00 9. " LDD       ,Indicates a link down was detected" "Not detected,Detected"
eventfld.long 0x00 7. "       LUD     ,Indicates a link up was detected" "Not detected,Detected"
line.long 0x04 "PEX_PF1_PME_MES_DISR,PEX PF 1 PCIE PME And Message Disable Register"
bitfld.long 0x04 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x04 13. "                ENL23D  ,Entered L2/L3 ready state detect disabled" "No,Yes"
newline
bitfld.long 0x04 12. " EXL23D    ,Exited L2/L3 ready state detect disable" "No,Yes"
bitfld.long 0x04 10. "                HRDD    ,Hot reset detect disable" "No,Yes"
newline
bitfld.long 0x04 9. " LDDD      ,Link down detect disable" "No,Yes"
bitfld.long 0x04 7. "                LUDD    ,Link up detect disable" "No,Yes"
line.long 0x08 "PEX_PF1_PME_MES_IER,PEX PF 1 PCIE PME And Message Interrupt Enable Register"
bitfld.long 0x08 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x08 13. "                ENL23IE ,Entered L2/L3 ready state detect interrupt enabled" "No,Yes"
newline
bitfld.long 0x08 12. " EXL23IE   ,Exited L2/L3 ready state detect interrupt enabled" "No,Yes"
bitfld.long 0x08 10. "                HRDIE   ,Hot reset detect interrupt enabled" "No,Yes"
newline
bitfld.long 0x08 9. " LDDIE     ,Link down detect interrupt enabled" "No,Yes"
bitfld.long 0x08 7. "                LUDIE   ,Link up detect interrupt enabled" "No,Yes"
line.long 0x0C "PEX_PF1_MCR,PEX PF 1 PCIE Message Command Register"
bitfld.long 0x0C 4. " INTX      ,Assert/de-assert intx command" "Not asserted,Asserted"
bitfld.long 0x0C 2. "       SPMES   ,Send PM_PME command" "No effect,Send"
newline
bitfld.long 0x0C 1. " EXL2S     ,Exit L2 state command" "No effect,Generate"
bitfld.long 0x0C 0. "          PTOMR   ,Generate PME turn off message (RC only)" "No effect,Generate"
group.long 0x50140++0x03
line.long 0x00 "PEX_PF1_RBP_ADDR_U,PEX PF 1 Route By Port Address Upper Register"
hexmask.long.word 0x00 16.--31. 1. " ADDR_U    ,Upper 16 bit of the PCIE slave device used for the outbound transactions"
group.long 0x50200++0x03
line.long 0x00 "PEX_PF1_ERR_DR,PEX PF 1 PCIE Error Detect Register"
eventfld.long 0x00 31. " ME        ,Indicates multiple errors of same type" "Not detected,Detected"
eventfld.long 0x00 23. "       PCT     ,Indicates completion timeout." "Not detected,Detected"
newline
eventfld.long 0x00 21. " PCAC      ,Completer abort was detected" "Not detected,Detected"
eventfld.long 0x00 19. "       CDNSC   ,Completion with data not succsessful was detected" "Not detected,Detected"
newline
eventfld.long 0x00 2. " UREP      ,Indicates an unsupported request completion was detected." "Not detected,Detected"
group.long 0x50208++0x03
line.long 0x00 "PEX_PF1_ERR_EN,PEX PF 1 PCIE Error Interrupt Enable Register"
bitfld.long 0x00 23. " PCTIE     ,Completion timeout interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "           PCACIE  ,Completer abort interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CDNSCIE   ,Completion with data not succsessful interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           UREPIE  ,Unsupported request in EP mode interrupt enable" "Disabled,Enabled"
group.long 0x50210++0x03
line.long 0x00 "PEX_PF1_ERR_DISR,PEX PF 1 PCIE Error Disable Register"
bitfld.long 0x00 31. " MED       ,Multiple errors of same type detection disable" "No,Yes"
bitfld.long 0x00 23. "                PCTD    ,Completion detection disable" "No,Yes"
newline
bitfld.long 0x00 21. " PCACD     ,Completer abort detection disable" "No,Yes"
bitfld.long 0x00 19. "                CDNSCD  ,Completion with data not succsessful detection disable" "No,Yes"
newline
bitfld.long 0x00 2. " UREPD     ,Unsupported request in EP mode detection disable" "No,Yes"
group.long 0x507F8++0x07
line.long 0x00 "PEX_PF0_VF,PEX PF1 Debug Register"
bitfld.long 0x00 22.--27. " VF        ,Virtual function number of the transaction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 21. "                 VF_ACT  ,Soft reset" "Not Activated,Activated"
line.long 0x04 "PEX_PF1_DBG,PEX PF1 Debug Register"
bitfld.long 0x04 31. " WE        ,Write enable" "Disabled,Enabled"
bitfld.long 0x04 30. "           SR      ,Soft reset" "No reset,Reset"
newline
rbitfld.long 0x04 0.--5. " LTSSM     ,Link training status state machine (LTSSM) status" "DETECT_QUIET,DETECT_ACTIVE,POLL_ACTIVE,POLL_COMPLIANCE,POLL_CONFIG,PRE_DETECT_QUIET,DETECT_WAIT,CFG_LINKWD_START,CFG_LINKWD_ACEPT,CFG_LANENUM_WAIT,CFG_LANENUM_ACEPT,CFG_COMPLETE,CFG_IDLE,RCVRY_LOCK,RCVRY_SPEED,RCVRY_RCVRCFG,RCVRY_IDLE,L0,L0S,L123_SEND_EIDLE,L1_IDLE,L2_IDLE,L2_WAKE,DISABLED_ENTRY,DISABLED_IDLE,DISABLED,LPBK_ENTRY,LPBK_ACTIVE,LPBK_EXIT,LPBK_EXIT_TIMEOUT,HOT_RESET_ENTRY,HOT_RESET,RCVRY_EQ0,RCVRY_EQ1,RCVRY_EQ2,RCVRY_EQ3,?..."
tree.end
width 0x0B
tree.end
tree "PEX 4"
base ad:0x03700000
width 34.
tree "Configuration Header"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4.))==(0x10<<4.))
group.word 0x00++0x07 "Type 0 [EP mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x17
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x04 "BAR1,PCI Express Base Address Register 1"
hexmask.long.tbyte 0x04 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x04 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x04 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x04 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x08 "BAR2,PCI Express Base Address Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x08 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x08 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,,Locate anywhere/64-bit,?..."
bitfld.long 0x08 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x0C "BAR3,PCI Express Base Address Register 3"
line.long 0x10 "BAR4,PCI Express Base Address Register 4"
hexmask.long.tbyte 0x10 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x10 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x10 1.--2. " TYPE                  ,Type" ",,Locate anywhere/64-bit,?..."
bitfld.long 0x10 0. "  MEMSP                             ,Memory space indicator" "0,1"
line.long 0x14 "BAR5,PCI Express Base Address Register 5"
rgroup.word 0x2C++0x03
line.word 0x00 "SUBSYSTEM_VENDOR_ID,PCI Express Subsystem Vendor ID Register"
line.word 0x02 "SUBSYSTEM_ID,PCI Express Subsystem ID Register"
group.long 0x30++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x02
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
line.byte 0x01 "MINIMUM_GRANT,PCI Express Minimum Grant Register"
line.byte 0x02 "MAXIMUM_LATENCY,PCI Express Maximum Latency Register"
else
group.word 0x00++0x07 "Type 1 [RC mode]"
line.word 0x00 "VENDOR_ID,PCI Express Vendor ID Register"
line.word 0x02 "DEVICE_ID,PCI Express Device ID Register"
line.word 0x04 "COMMAND,PCI Express Command Register"
bitfld.word 0x04 10. "     INTERRUPT_DISABLE     ,Controls the ability to generate INTx interrupt messages" "No,Yes"
bitfld.word 0x04 8. "                     SERR                              ,Controls the reporting of fatal and non-fatal errors detected by the device to the root complex" "Disabled,Enabled"
newline
bitfld.word 0x04 6. "     PARITY_ERROR_RESPONSE ,Controls whether this PCI Express controller responds to parity errors" "No response,Response"
bitfld.word 0x04 2. "             BUS_MASTER                        ,Indicates whether this PCI Express device is configured as a master" "Non master,Master"
newline
bitfld.word 0x04 1. "     MEMORY_SPACE          ,Controls whether this PCI Express device (as a target) responds to memory accesses" "No response,Response"
rbitfld.word 0x04 0. "             I/O_SPACE                         ,Response behavior to PCI Express I/O space accesses" "No response,Response"
line.word 0x06 "STATUS,PCI Express Status Register"
eventfld.word 0x06 15. "     DETECTED_PARITY_ERROR ,Set whenever a device receives a poisoned TLP regardless of the state of bit 6 in the command register" "No error,Error"
eventfld.word 0x06 14. "                SIGNALED_SYSTEM_ERROR             ,Set whenever a device sends a ERR_FATAL or ERR_NONFATAL message and the SERR enable bit in the command register is set" "No error,Error"
newline
eventfld.word 0x06 13. "     RECEIVED_MASTER_ABORT ,Set whenever a requestor receives a completion with unsupported request completion status" "Not received,Received"
eventfld.word 0x06 12. "            RECEIVED_TARGET_ABORT             ,Set whenever a device receives a completion with completer abort completion status" "Not received,Received"
newline
eventfld.word 0x06 11. "     SIGNALED_TARGET_ABORT ,Set whenever a device completes a request using completer abort completion status" "Not signalled,Signalled"
eventfld.word 0x06 8. "           MASTER_DATA_PARITY_ERROR_DETECTED ,Set by requestor when the requestor receives a completion marked poisoned or the requestor poisons a write request" "No error,Error"
newline
eventfld.word 0x06 4. "     CAPABILITIES_LIST     ,All PCI Express devices are required to implement the PCI Express capability structure" "Not implement,Implement"
eventfld.word 0x06 3. "           INTERRUPT_STATUS                  ,Set when an INTx interrupt message is pending internally to the device" "No interrupt,Interrupt"
group.byte 0x08++0x04
line.byte 0x00 "REVISION_ID,PCI Express Revision ID Register"
line.byte 0x01 "CLASS_CODE_A,PCI Express Class Code A Register"
line.byte 0x02 "CLASS_CODE_B,PCI Express Class Code B Register"
line.byte 0x03 "CLASS_CODE_C,PCI Express Class Code C Register"
line.byte 0x04 "CACHE_LINE_SIZE,PCI Express Cache Line Size Register"
rgroup.byte 0x0D++0x01
line.byte 0x00 "LATENCY_TIMER,PCI Express Latency Timer Register"
line.byte 0x01 "HEADER_TYPE,PCI Express Header Type Register"
bitfld.byte 0x01 7. "     MULTIFUNCTION         ,Identifies whether a device supports multiple functions" "Single,Multiple"
hexmask.byte 0x01 0.--6. 1. "                HEADER_LAYOUT                     ,Header layout"
group.long 0x10++0x03
line.long 0x00 "BAR0,PCI Express Base Address Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " ADDRESS               ,Indicates the base address of the inbound memory window"
bitfld.long 0x00 3. "                  PREF                              ,Prefetchable" "Not prefetchable,Prefetchable"
newline
bitfld.long 0x00 1.--2. " TYPE                  ,Type" "Locate anywhere/32-bit,?..."
bitfld.long 0x00 0. "  MEMSP                             ,Memory space indicator" "0,1"
group.byte 0x18++0x02
line.byte 0x00 "PRIMARY_BUS_NUMBER,PCI Express Primary Bus Number Register"
line.byte 0x01 "SECONDARY_BUS_NUMBER,PCI Express Secondary Bus Number Register"
line.byte 0x02 "SUBORDINATE_BUS_NUMBER,PCI Express Subordinate Bus Number Register"
group.byte 0x1C++0x01
line.byte 0x00 "I/O_BASE,PCI Express I/O Base Register"
hexmask.byte 0x00 4.--7. 0x10 "     I/O_START_ADDRESS     ,Specifies bits 15:12 of the I/O space start address"
rbitfld.byte 0x00 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
line.byte 0x01 "I/O_LIMIT,PCI Express I/O Limit Register"
hexmask.byte 0x01 4.--7. 0x10 "     I/O_LIMIT_ADDRESS     ,Specifies bits 15:12 of the I/O space ending address"
rbitfld.byte 0x01 0.--3. "                      ADDRESS_DECODE_TYPE               ,Specifies the number of I/O address bits" "16-bit,32-bit,?..."
group.word 0x1E++0x09
line.word 0x00 "SECONDARY_STATUS,PCI Express Secondary Status Register"
eventfld.word 0x00 15. "     DPE                   ,Detected parity error" "Not detected,Detected"
eventfld.word 0x00 14. "            SSE                               ,Signalled system error" "Not signalled,Signalled"
newline
eventfld.word 0x00 13. "     RMA                   ,Received master abort" "Not received,Received"
eventfld.word 0x00 12. "            RTA                               ,Received targed abort" "Not received,Received"
newline
eventfld.word 0x00 11. "     STA                   ,Signalled target abort" "Not signalled,Signalled"
eventfld.word 0x00 8. "           MDPE                              ,Master data parity error" "No error,Error"
line.word 0x02 "MEMORY_BASE,PCI Express Memory Base Register"
hexmask.word 0x02 4.--15. 0x10 "     MEMORY_BASE           ,Specifies bits 31:20 of the non-prefetchable memory space start address"
line.word 0x04 "MEMORY_LIMIT,PCI Express Memory Limit Register"
hexmask.word 0x04 4.--15. 0x10 "     MEMORY_LIMIT          ,Specifies bits 31:20 of the non-prefetchable memory space ending address"
line.word 0x06 "PREFETCHABLE_MEMORY_BASE,PCI Express Prefetchable Memory Base Register"
hexmask.word 0x06 4.--15. 0x10 "     PF_MEMORY_BASE        ,Specifies bits 31:20 of the prefetchable memory space start address"
rbitfld.word 0x06 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
line.word 0x08 "PREFETCHABLE_MEMORY_LIMIT,PCI Express Prefetchable Memory Limit Register"
hexmask.word 0x08 4.--15. 0x10 "     PF_MEMORY_LIMIT       ,Specifies bits 31:20 of the prefetchable memory space ending address"
rbitfld.word 0x08 0.--3. "                    ADDRESS_DECODE_TYPE               ,Specifies the number of prefetchable memory address bits" "32-bit,64-bit,?..."
group.long 0x28++0x07
line.long 0x00 "PREFETCHABLE_BASE_UPPER_32_BITS,PCI Express Prefetchable Base Upper 32 Bits Register"
line.long 0x04 "PREFETCHABLE_LIMIT_UPPER_32_BITS,PCI Express Prefetchable Limit Upper 32 Bits Register"
rgroup.word 0x30++0x03
line.word 0x00 "I/O_BASE_UPPER_16_BITS,PCI Express I/O Base Upper 16 Bits Register"
line.word 0x02 "I/O_LIMIT_UPPER_16_BITS,PCI Express I/O Limit Upper 16 Bits Register"
rgroup.byte 0x34++0x00
line.byte 0x00 "CAPABILITIES_POINTER,Capabilities Pointer Register"
group.long 0x38++0x03
line.long 0x00 "EXPANSION_ROM_BAR,PCI Express Expansion ROM Base Address Register"
hexmask.long.tbyte 0x00 11.--31. 0x08 " ROM_BASE_ADDRESS      ,Specifies bits 31:11 of the non-prefetchable expansion ROM space start address"
bitfld.long 0x00 0. "                  ROMBAR_EN                         ,Address decode enable" "Disabled,Enabled"
group.byte 0x3C++0x00
line.byte 0x00 "INTERRUPT_LINE,PCI Express Interrupt Line Register"
rgroup.byte 0x3D++0x00
line.byte 0x00 "INTERRUPT_PIN,PCI Express Interrupt Pin Register"
group.word 0x3E++0x01
line.word 0x00 "BRIDGE_CONTROL,PCI Express Bridge Control Register"
bitfld.word 0x00 6. "     SCND_RST              ,Secondary bus reset" "No reset,Reset"
bitfld.word 0x00 3. "                VGA_EN                            ,VGA enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     ISA_EN                ,ISA enable" "Disabled,Enabled"
bitfld.word 0x00 1. "                SERR_EN                           ,SERR enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     PER                   ,Parity error response" "No response,Response"
endif
tree.end
tree "Power Management Capability Structure"
width 38.
rgroup.byte 0x40++0x00
line.byte 0x00 "POWER_MANAGEMENT_CAPABILITY_ID,PCI Express Power Management Capability ID Register"
rgroup.word 0x42++0x01
line.word 0x00 "POWER_MANAGEMENT_CAPABILITIES,PCI Express Power Management Capabilities Register"
bitfld.word 0x00 15. "     PME_SUPPORT[4] ,PME power state support bit 4" "Not supported,Supported"
bitfld.word 0x00 14. "  [3]        ,PME power state support bit 3" "Not supported,Supported"
newline
bitfld.word 0x00 13. "     [2]            ,PME power state support bit 2" "Not supported,Supported"
bitfld.word 0x00 12. "  [1]        ,PME power state support bit 1" "Not supported,Supported"
newline
bitfld.word 0x00 11. "     [0]            ,PME power state support bit 0" "Not supported,Supported"
bitfld.word 0x00 10. "  D2         ,D2 support" "Not supported,Supported"
newline
bitfld.word 0x00 9. "     D1             ,D1 support" "Not supported,Supported"
bitfld.word 0x00 6.--8. "  AUX_CURR   ,AUX current" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 5. "     DSI            ,Device specific initialization" "0,1"
bitfld.word 0x00 3. "              PME_CLK    ,PME clock" "0,1"
newline
bitfld.word 0x00 0.--2. "     VERSION        ,Version of the specification" "0,1,2,3,4,5,6,7"
group.word 0x44++0x01
line.word 0x00 "POWER_MANAGEMENT_STATUS_AND_CONTROL,PCI Express Power Management Status And Control Register"
eventfld.word 0x00 15. "     PME_STAT       ,PME status" "0,1"
bitfld.word 0x00 13.--14. "              DATA_SCALE ,Data scale field" "0,1,2,3"
newline
bitfld.word 0x00 9.--12. "     DATA_SELECT    ,Data select field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 8. "             PME_EN     ,PME enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0.--1. "     POWER_STATE    ,Indicates the current power state of the function" "D0,D1,D2,D3"
rgroup.byte 0x47++0x00
line.byte 0x00 "POWER_MANAGEMENT_DATA,PCI Express Power Management Data Register"
tree.end
tree "MSI Message Capability Structure"
width 28.
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==(0x10<<4))
rgroup.byte 0x50++0x00
line.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
group.word 0x52++0x01
line.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
rbitfld.word 0x00 7. "     64AC            ,64-bit address capable" "Not capable,Capable"
bitfld.word 0x00 4.--6. "  MME  ,Multiple message enable" "0,1,2,3,4,5,6,7"
newline
rbitfld.word 0x00 1.--3. "     MMC             ,Multiple message capable" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0. "            MSIE ,MSI enable" "Disabled,Enabled"
group.long 0x54++0x07
line.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hexmask.long 0x00 2.--31. 0x04 " MESSAGE_ADDRESS ,System-specified message address"
line.long 0x04 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
group.word 0x5C++0x01
line.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
else
hgroup.byte 0x50++0x00
hide.byte 0x00 "MSI_MESSAGE_CAPABILITY_ID,PCI Express MSI Message Capability ID Register"
hgroup.word 0x52++0x01
hide.word 0x00 "MSI_MESSAGE_CONTROL,PCI Express MSI Message Control Register"
hgroup.long 0x54++0x03
hide.long 0x00 "MSI_MESSAGE_ADDRESS,PCI Express MSI Message Address Register"
hgroup.long 0x58++0x03
hide.long 0x00 "MSI_MESSAGE_UPPER_ADDRESS,PCI Express MSI Message Upper Address Register"
hgroup.word 0x5C++0x01
hide.word 0x00 "MSI_MESSAGE_DATA,PCI Express MSI Message Data Register"
endif
tree.end
tree "PCI Express Capability Structure"
width 27.
rgroup.byte 0x70++0x00
line.byte 0x00 "CAPABILITY_ID,PCI Express Capability ID Register"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==0x000)
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 8. "             SLOT                      ,Slot implemented" "Not implemented,Implemented"
newline
bitfld.word 0x00 4.--7. "     DEVICE/PORT_TYPE         ,Device/Port type" "EP mode,,,,RC mode,?..."
bitfld.word 0x00 0.--3. "        CAPABILITY_VERSION        ,Indicates the defined PCI express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
else
rgroup.word 0x72++0x01
line.word 0x00 "CAPABILITIES,PCI Express Capabilities Register"
bitfld.word 0x00 9.--13. "     INTERRUPT_MESSAGE_NUMBER ,Contains offset between base message data and the MSI message that is generated when any of the status bits are set" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.word 0x00 4.--7. "             DEVICE/PORT_TYPE          ,Device/Port type" "EP mode,,,,RC mode,?..."
newline
bitfld.word 0x00 0.--3. "     CAPABILITY_VERSION       ,Indicates the defined PCI Express capability structure version number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
rgroup.long 0x74++0x03
line.long 0x00 "DEVICE_CAPABILITIES,PCI Express Device Capabilities Register"
bitfld.long 0x00 28. " FLRC                     ,Functional level reset capability" "0,1"
bitfld.long 0x00 26.--27. "              CSPLS                     ,Captured slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 18.--25. 1. " CSPLV                    ,Captured slot power limit value"
bitfld.long 0x00 15. "           RBER                      ,Role based error reporting" "0,1"
newline
bitfld.long 0x00 9.--11. " EP_L1_LAT                ,Endpoint L1 acceptable latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 6.--8. "              EP_L0S_LAT                ,Endpoint L0s acceptable latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 5. " ET                       ,Extended tag field supported" "0,1"
bitfld.long 0x00 3.--4. "              PHAN_FCT                  ,Phantom functions supported" "0,1,2,3"
newline
bitfld.long 0x00 0.--2. " MAX_PL_SIZE_SUP          ,Maximum payload size supported" ",256-bytes,?..."
group.word 0x78++0x03
line.word 0x00 "DEVICE_CONTROL,PCI Express Device Control Register"
bitfld.word 0x00 15. "     IFLR                     ,Initiate functional level reset" "No reset,Reset"
bitfld.word 0x00 12.--14. "       MAX_READ_SIZE             ,Maximum read request size" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 11. "     ENS                      ,No snoop enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       APE                       ,AUX power PM enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     PFE                      ,Phantom functions enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       ETE                       ,Extended tag field enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5.--7. "     MAX_PAYLOAD_SIZE         ,Maximum payload size" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 4. "              RO                        ,Relaxed ordering enable" "Disabled,Enabled"
newline
bitfld.word 0x00 3. "     URR                      ,Unsupported request reporting enable" "Disabled,Enabled"
bitfld.word 0x00 2. "       FER                       ,Fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.word 0x00 1. "     NFER                     ,Non-fatal error reporting enable" "Disabled,Enabled"
bitfld.word 0x00 0. "       CER                       ,Correctable error reporting enable" "Disabled,Enabled"
line.word 0x02 "DEVICE_STATUS,PCI Express Device Status Register"
rbitfld.word 0x02 5. "     TP                       ,Transactions pending" "Not pending,Pending"
rbitfld.word 0x02 4. "    APD                       ,AUX power detected" "Not detected,Detected"
newline
eventfld.word 0x02 3. "     URD                      ,Unsupported request detected" "Not detected,Detected"
eventfld.word 0x02 2. "   FED                       ,Fatal error detected" "Not detected,Detected"
newline
eventfld.word 0x02 1. "     NFED                     ,Non-fatal error detected" "Not detected,Detected"
eventfld.word 0x02 0. "   CED                       ,Correctable error detected" "Not detected,Detected"
rgroup.long 0x7C++0x03
line.long 0x00 "LINK_CAPABILITIES,PCI Express Link Capabilities Register"
hexmask.long.byte 0x00 24.--31. 1. " PORT_NUMBER              ,Port number"
bitfld.long 0x00 22. "             AOC                       ,ASPM optionality compliance" "0,1"
newline
bitfld.long 0x00 21. " LBWN                     ,Link bandwidth notification capable" "Not capable,Capable"
bitfld.long 0x00 20. "    DLLARC                    ,Data link layer active reporting capable" "Not capable,Capable"
newline
bitfld.long 0x00 19. " SD_ERR_RPT_CAP           ,Surprise down error reporting capable" "Not capable,Capable"
bitfld.long 0x00 18. "    CPM                       ,Clock power management" "0,1"
newline
bitfld.long 0x00 15.--17. " L1_EX_LAT                ,L1 exit latency" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 12.--14. "              L0S_EX_LAT                ,L0s exit latency" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 10.--11. " ASPM                     ,Active state power management (ASPM) support" "0,1,2,3"
bitfld.long 0x00 4.--9. "              MAX_LINK_W                ,Maximum link width" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--3. " MAX_LINK_SP              ,Maximum link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==0x000)
group.word 0x80++0x03
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 5. "     RL                       ,Retrain link" "No effect,Initiated"
bitfld.word 0x00 4. "      LD                        ,Link disable" "No,Yes"
newline
bitfld.word 0x00 3. "     RCB                      ,Read completion boundary" "0,1"
bitfld.word 0x00 0.--1. "              ASPM_CTL                  ,Active state power management (ASPM) control" "0,1,2,3"
line.word 0x02 "LINK_STATUS,PCI Express Link Status Register"
eventfld.word 0x02 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
eventfld.word 0x02 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
rbitfld.word 0x02 12. "     SCC                      ,Slot clock configuration" "0,1"
rbitfld.word 0x02 11. "              LT                        ,Link training" "0,1"
newline
rbitfld.word 0x02 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,?..."
rbitfld.word 0x02 0.--3. "             LINK_SP                   ,Current link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
rgroup.long 0x84++0x03
line.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hexmask.long.word 0x00 19.--31. 1. " PHYSICAL_SLOT_NUMBER     ,Indicates the physical slot number attached to this port"
bitfld.long 0x00 18. "           NOCMDCPLSUP               ,No command completed support" "0,1"
newline
bitfld.long 0x00 17. " EMIP                     ,Electromechanical interlock present" "Not present,Present"
bitfld.long 0x00 15.--16. "    SPLS                      ,Slot power limit scale" "0,1,2,3"
newline
hexmask.long.word 0x00 7.--14. 1. " SPLV                     ,Scale power limit value"
bitfld.long 0x00 6. "           HPD                       ,Hot plug capable" "Not capable,Capable"
newline
bitfld.long 0x00 5. " HPS                      ,Hot plug surprise" "0,1"
bitfld.long 0x00 4. "              PIP                       ,Power indicator present" "Not present,Present"
newline
bitfld.long 0x00 3. " AIP                      ,Attention indicator present" "Not present,Present"
bitfld.long 0x00 2. "    MRLSP                     ,MRL sensor present" "Not present,Present"
newline
bitfld.long 0x00 1. " PCP                      ,Power controller present" "Not present,Present"
bitfld.long 0x00 0. "    ABP                       ,Attention button present" "Not present,Present"
group.word 0x88++0x07
line.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
bitfld.word 0x00 12. "     DLLSTCHGEN               ,Data link layer state changed enable" "Disabled,Enabled"
bitfld.word 0x00 11. "       EMICTL                    ,Electromechanical interlock control" "0,1"
newline
bitfld.word 0x00 10. "     PCC                      ,Power controller control" "0,1"
bitfld.word 0x00 8.--9. "              PIC                       ,Power indicator control" ",On,Blink,Off"
newline
bitfld.word 0x00 6.--7. "     AIC                      ,Attention indicator control" ",On,Blink,Off"
bitfld.word 0x00 5. "          HPIE                      ,Hot plug interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 4. "     CCIE                     ,Command completed interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 3. "       PDCE                      ,Presence detect changed enable" "Disabled,Enabled"
newline
bitfld.word 0x00 2. "     MRLSCE                   ,MRL sensor changed enable" "Disabled,Enabled"
bitfld.word 0x00 1. "       PFDE                      ,Power fault detected enable" "Disabled,Enabled"
newline
bitfld.word 0x00 0. "     ABPE                     ,Attention button pressed enable" "Disabled,Enabled"
line.word 0x02 "SLOT_STATUS,PCI Express Slot Status Register"
eventfld.word 0x02 8. "     DLLSTCHG                 ,Data link layer state changed" "Not changed,Changed"
rbitfld.word 0x02 7. "    EM_IL_ST                  ,Electromechanical interlock status" "0,1"
newline
rbitfld.word 0x02 6. "     PDS                      ,Indicates presence of an adapter in the slot" "Not present,Present"
rbitfld.word 0x02 5. "    MRLSS                     ,MRL sensor state" "Closed,Open"
newline
eventfld.word 0x02 4. "     CC                       ,Command completed" "Not completed,Completed"
eventfld.word 0x02 3. "  PDC                       ,Presence detect changed" "Not changed,Changed"
newline
eventfld.word 0x02 2. "     MRLSC                    ,MRL sensor changed" "Not changed,Changed"
eventfld.word 0x02 1. "    PFD                       ,Power fault detected" "Not detected,Detected"
newline
eventfld.word 0x02 0. "     ABP                      ,Attention button pressed" "Not pressed,Pressed"
line.word 0x04 "ROOT_CONTROL,PCI Express Root Control Register"
bitfld.word 0x04 4. "     CRSSWVE                  ,CRS software visibility enable" "Disabled,Enabled"
bitfld.word 0x04 3. "       PMEIE                     ,PME interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x04 2. "     SEFEE                    ,System error on fatal error enable" "Disabled,Enabled"
bitfld.word 0x04 1. "       SENFEE                    ,System error on non-fatal error enable" "Disabled,Enabled"
newline
bitfld.word 0x04 0. "     SECEE                    ,System error on correctable error enable" "Disabled,Enabled"
line.word 0x06 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
bitfld.word 0x06 0. "     CRSSWV                   ,CRS software visibility" "Not visible,Visible"
group.long 0x90++0x03
line.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
bitfld.long 0x00 17. " PMEP                     ,PME pending" "Not pending,Pending"
eventfld.long 0x00 16. "    PMES                      ,PME status" "0,1"
newline
hexmask.long.word 0x00 0.--15. 1. " PME_REQUESTER_ID         ,PME requester ID"
else
group.word 0x80++0x01
line.word 0x00 "LINK_CONTROL,PCI Express Link Control Register"
bitfld.word 0x00 11. "     LABIE                    ,Link autonomous bandwidth interrupt enable" "Disabled,Enabled"
bitfld.word 0x00 10. "       LBMIE                     ,Link bandwidth management interrupt enable" "Disabled,Enabled"
newline
bitfld.word 0x00 9. "     HW_AUTO_WIDTH_DIS        ,Hardware autonomous width disable" "No,Yes"
bitfld.word 0x00 8. "            ECPM                      ,Enable clock power management" "Disabled,Enabled"
newline
bitfld.word 0x00 7. "     EXT_SYNC                 ,Extended synch" "0,1"
bitfld.word 0x00 6. "              CCC                       ,Common clock configuration" "0,1"
newline
bitfld.word 0x00 4. "     LD                       ,Link disable" "No,Yes"
bitfld.word 0x00 3. "            RCB                       ,Read completion boundary" "0,1"
newline
bitfld.word 0x00 0.--1. "     ASPM_CTL                 ,Active state power management (ASPM) control" "0,1,2,3"
rgroup.word 0x82++0x01
line.word 0x00 "LINK_STATUS,PCI Express Link Status Register"
bitfld.word 0x00 15. "     LABS                     ,Link autonomous bandwidth status" "0,1"
bitfld.word 0x00 14. "              LBMS                      ,Link bandwidth management status" "0,1"
newline
bitfld.word 0x00 12. "     SCC                      ,Slot clock configuration" "0,1"
bitfld.word 0x00 11. "              LT                        ,Link training" "0,1"
newline
bitfld.word 0x00 4.--9. "     NEG_LINK_W               ,Negotiated link width" ",x1,x2,,x4,,,,x8,?..."
bitfld.word 0x00 0.--3. "             LINK_SP                   ,Negotiated link speed" ",2.5GT/s,5.0GT/s,8.0GT/s,?..."
hgroup.long 0x84++0x03
hide.long 0x00 "SLOT_CAPABILITIES,PCI Express Slot Capabilities Register"
hgroup.word 0x88++0x01
hide.word 0x00 "SLOT_CONTROL,PCI Express Slot Control Register"
hgroup.word 0x8A++0x01
hide.word 0x00 "SLOT_STATUS,PCI Express Slot Status Register"
hgroup.word 0x8C++0x01
hide.word 0x00 "ROOT_CONTROL,PCI Express Root Control Register"
hgroup.word 0x8E++0x01
hide.word 0x00 "ROOT_CAPABILITIES,PCI Express Root Capabilities"
hgroup.long 0x90++0x03
hide.long 0x00 "ROOT_STATUS,PCI Express Root Status Register"
endif
rgroup.long 0x94++0x03
line.long 0x00 "DEVICE_CAPABILITIES_2,PCI Express Device Capabilities 2 Register"
bitfld.long 0x00 5. " ARI_FWD                  ,ARI forwarding supported" "Not supported,Supported"
bitfld.long 0x00 4. "  CPL_TO_DS                 ,Completion timeout disable supported" "Not supported,Supported"
newline
bitfld.long 0x00 0.--3. " CPL_TO_RS                ,Completion timeout ranges supported" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x98++0x01
line.word 0x00 "DEVICE_CONTROL_2,PCI Express Device Control 2 Register"
bitfld.word 0x00 9. "     IDO_CPL_EN               ,IDO completion enable" "Disabled,Enabled"
bitfld.word 0x00 8. "       IDO_REQ_EN                ,IDO request enable" "Disabled,Enabled"
newline
bitfld.word 0x00 5. "     ARIFE                    ,ARI forwarding enable" "Disabled,Enabled"
bitfld.word 0x00 4. "       CPL_TOD                   ,Completion timeout disable" "No,Yes"
newline
bitfld.word 0x00 0.--3. "     CPL_TO_VAL               ,Completion timeout value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x9C++0x03
line.long 0x00 "LINK_CAPABILITIES_2,PCI Express Link Capabilities 2 Register"
bitfld.long 0x00 8. " CROSSLINK_SUPPORTED      ,Crosslink supported" "Not supported,Supported"
hexmask.long.byte 0x00 1.--7. 1. "  SUPPORT_LINK_SPEED_VECTOR ,Supported link speeds vector"
group.word 0xA0++0x01
line.word 0x00 "LINK_CONTROL_2,PCI Express Link Control 2 Register"
bitfld.word 0x00 12.--15. "     CDE                      ,Compliance de-emphasis" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.word 0x00 11. "             CSOS                      ,Compliance SOS" "0,1"
newline
bitfld.word 0x00 10. "     EMC                      ,Enter modified compliance" "0,1"
bitfld.word 0x00 7.--9. "              TXM                       ,Transmit margin" "0,1,2,3,4,5,6,7"
newline
bitfld.word 0x00 6. "     SDE                      ,Selectable de-emphasis" "0,1"
bitfld.word 0x00 5. "              HWASD                     ,Hardware autonomous speed disable" "No,Yes"
newline
bitfld.word 0x00 4. "     EC                       ,Enter compliance" "0,1"
bitfld.word 0x00 0.--3. "              T_LS                      ,Target link speed" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word 0xA2++0x01
line.word 0x00 "LINK_STATUS_2,PCI Express Link Status 2 Register"
bitfld.word 0x00 5. "     LER                      ,Link equalization request" "Not requested,Requested"
bitfld.word 0x00 4. "  EP3S                      ,Equalization phase 3 complete" "Not complete,Complete"
newline
bitfld.word 0x00 3. "     EP2S                     ,Equalization phase 2 complete" "Not completed,Completed"
bitfld.word 0x00 2. "  EP1S                      ,Equalization phase 1 complete" "Not completed,Completed"
newline
bitfld.word 0x00 1. "     EC                       ,Equalization complete" "Not completed,Completed"
bitfld.word 0x00 0. "  DE_LVL                    ,Current de-emphasis level" "0,1"
tree.end
tree "Advanced Error Reporting Capability Structure"
width 41.
rgroup.word 0x100++0x01
line.word 0x00 "ADVANCED_ERROR_REPORTING_CAPABILITY_ID,PCI Express Advanced Error Reporting Capability ID Register"
group.long 0x104++0x17
line.long 0x00 "UNCORRECTABLE_ERROR_STATUS,PCI Express Uncorrectable Error Status Register"
eventfld.long 0x00 20. " URE                 ,Unsupported request error status" "No error,Error"
eventfld.long 0x00 19. "      ECRCE  ,ECRC error status" "No error,Error"
newline
eventfld.long 0x00 18. " MTLP                ,Malformed TLP status" "No error,Error"
eventfld.long 0x00 17. "      RXO    ,Receiver overflow status" "No error,Error"
newline
eventfld.long 0x00 16. " UC                  ,Unexpected completion status" "No error,Error"
eventfld.long 0x00 15. "      CA     ,Completer abort status" "No error,Error"
newline
eventfld.long 0x00 14. " CTO                 ,Completion timeout status" "No error,Error"
eventfld.long 0x00 13. "      FCPE   ,Flow control protocol error status" "No error,Error"
newline
eventfld.long 0x00 12. " PTLP                ,Poisoned TLP status" "No error,Error"
eventfld.long 0x00 4. "      DLPE   ,Data link protocol error status" "No error,Error"
line.long 0x04 "UNCORRECTABLE_ERROR_MASK,PCI Express Uncorrectable Error Mask Register"
bitfld.long 0x04 20. " UREM                ,Unsupported request error mask" "Not masked,Masked"
bitfld.long 0x04 19. "    ECRCEM ,ECRC error mask" "Not masked,Masked"
newline
bitfld.long 0x04 18. " MTLPM               ,Malformed TLP mask" "Not masked,Masked"
bitfld.long 0x04 17. "    RXOM   ,Receiver overflow mask" "Not masked,Masked"
newline
bitfld.long 0x04 16. " UCM                 ,Unexpected completion mask" "Not masked,Masked"
bitfld.long 0x04 15. "    CAM    ,Completer abort mask" "Not masked,Masked"
newline
bitfld.long 0x04 14. " CTOM                ,Completion timeout mask" "Not masked,Masked"
bitfld.long 0x04 13. "    FCPEM  ,Flow control protocol error mask" "Not masked,Masked"
newline
bitfld.long 0x04 12. " PTLPM               ,Poisoned TLP mask" "Not masked,Masked"
bitfld.long 0x04 4. "    DLPEM  ,Data link protocol error mask" "Not masked,Masked"
line.long 0x08 "UNCORRECTABLE_ERROR_SEVERITY,PCI Express Uncorrectable Error Severity Register"
bitfld.long 0x08 20. " URES                ,Unsupported request error severity" "Not severe,Severe"
bitfld.long 0x08 19. "    ECRCES ,ECRC error severity" "Not severe,Severe"
newline
bitfld.long 0x08 18. " MTLPS               ,Malformed TLP severity" "Not severe,Severe"
bitfld.long 0x08 17. "    RXOS   ,Receiver overflow severity" "Not severe,Severe"
newline
bitfld.long 0x08 16. " UCS                 ,Unexpected completion severity" "Not severe,Severe"
bitfld.long 0x08 15. "    CAS    ,Completer abort severity" "Not severe,Severe"
newline
bitfld.long 0x08 14. " CTOS                ,Completion timeout severity" "Not severe,Severe"
bitfld.long 0x08 13. "    FCPES  ,Flow control protocol error severity" "Not severe,Severe"
newline
bitfld.long 0x08 12. " PTLPS               ,Poisoned TLP severity" "Not severe,Severe"
bitfld.long 0x08 4. "    DLPES  ,Data link protocol error severity" "Not severe,Severe"
line.long 0x0C "CORRECTABLE_ERROR_STATUS,PCI Express Correctable Error Status Register"
eventfld.long 0x0C 13. " ADVNFE              ,Advisory non-fatal error status" "No error,Error"
eventfld.long 0x0C 12. "      RTTO   ,Replay timer timeout status" "No error,Error"
newline
eventfld.long 0x0C 8. " RNR                 ,REPLAY_NUM rollover status" "No error,Error"
eventfld.long 0x0C 7. "      BDLLP  ,Bad DLLP status" "No error,Error"
newline
eventfld.long 0x0C 6. " BTLP                ,Bad TLP status" "No error,Error"
eventfld.long 0x0C 0. "      RXE    ,Receiver error status" "No error,Error"
line.long 0x10 "CORRECTABLE_ERROR_MASK,PCI Express Correctable Error Mask Register"
bitfld.long 0x10 13. " ADVNFEM             ,Advisory non-fatal error mask" "Not masked,Masked"
bitfld.long 0x10 12. "    RTTOM  ,Replay timer timeout mask" "Not masked,Masked"
newline
bitfld.long 0x10 8. " RNRM                ,REPLAY_NUM rollover mask" "Not masked,Masked"
bitfld.long 0x10 7. "    BDLLPM ,Bad DLLP mask" "Not masked,Masked"
newline
bitfld.long 0x10 6. " BTLPM               ,Bad TLP mask" "Not masked,Masked"
bitfld.long 0x10 0. "    RXEM   ,Receiver error mask" "Not masked,Masked"
line.long 0x14 "ADVANCED_ERROR_CAPABILITIES_AND_CONTROL,PCI Express Advanced Error Capabilities And Control Register"
bitfld.long 0x14 8. " ECRCCE              ,ECRC checking enable" "Disabled,Enabled"
rbitfld.long 0x14 7. "      ECRCCC ,ECRC checking capable" "Not capable,Capable"
newline
bitfld.long 0x14 6. " ECRCGE              ,ECRC generation enable" "Disabled,Enabled"
rbitfld.long 0x14 5. "      ECRCGC ,ECRC generation capable" "Not capable,Capable"
newline
rbitfld.long 0x14 0.--4. " FIRST_ERROR_POINTER ,First error bit position" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long 0x11C++0x0F
line.long 0x00 "HEADER_LOG_DWORD1,PCI Express Header Log Register 1"
hexmask.long.byte 0x00 24.--31. 1. " BYTE_0              ,Byte 0 of the TLP header associated with the error"
hexmask.long.byte 0x00 16.--23. 1. "            BYTE_1 ,Byte 1 of the TLP header associated with the error"
newline
hexmask.long.byte 0x00 8.--15. 1. " BYTE_2              ,Byte 2 of the TLP header associated with the error"
hexmask.long.byte 0x00 0.--7. 1. "            BYTE_3 ,Byte 3 of the TLP header associated with the error"
line.long 0x04 "HEADER_LOG_DWORD2,PCI Express Header Log Register 2"
hexmask.long.byte 0x04 24.--31. 1. " BYTE_4              ,Byte 4 of the TLP header associated with the error"
hexmask.long.byte 0x04 16.--23. 1. "            BYTE_5 ,Byte 5 of the TLP header associated with the error"
newline
hexmask.long.byte 0x04 8.--15. 1. " BYTE_6              ,Byte 6 of the TLP header associated with the error"
hexmask.long.byte 0x04 0.--7. 1. "            BYTE_7 ,Byte 7 of the TLP header associated with the error"
line.long 0x08 "HEADER_LOG_DWORD3,PCI Express Header Log Register 3"
hexmask.long.byte 0x08 24.--31. 1. " BYTE_8              ,Byte 8 of the TLP header associated with the error"
hexmask.long.byte 0x08 16.--23. 1. "            BYTE_9 ,Byte 9 of the TLP header associated with the error"
newline
hexmask.long.byte 0x08 8.--15. 1. " BYTE_A              ,Byte 10 of the TLP header associated with the error"
hexmask.long.byte 0x08 0.--7. 1. "            BYTE_B ,Byte 11 of the TLP header associated with the error"
line.long 0x0C "HEADER_LOG_DWORD4,PCI Express Header Log Register 4"
hexmask.long.byte 0x0C 24.--31. 1. " BYTE_C              ,Byte 12 of the TLP header associated with the error"
hexmask.long.byte 0x0C 16.--23. 1. "            BYTE_D ,Byte 13 of the TLP header associated with the error"
newline
hexmask.long.byte 0x0C 8.--15. 1. " BYTE_E              ,Byte 14 of the TLP header associated with the error"
hexmask.long.byte 0x0C 0.--7. 1. "            BYTE_F ,Byte 15 of the TLP header associated with the error"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==0x000)
group.long 0x12C++0x07
line.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
bitfld.long 0x00 2. " FERE                ,Fatal error reporting enable" "Disabled,Enabled"
bitfld.long 0x00 1. "      NFERE  ,Non-fatal error reporting enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CERE                ,Correctable error reporting enable" "Disabled,Enabled"
line.long 0x04 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
rbitfld.long 0x04 27.--31. " AEIMN               ,Advanced error interrupt message number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
eventfld.long 0x04 6. "            FEMR   ,Fatal error messages received" "Not received,Received"
newline
eventfld.long 0x04 5. " NFEMR               ,Non-fatal error messages received" "Not received,Received"
eventfld.long 0x04 4. "  FUF    ,First uncorrectable fatal" "0,1"
newline
eventfld.long 0x04 3. " MEFNFR              ,Multiple ERR_FATAL/NONFATAL received" "Not received,Received"
eventfld.long 0x04 2. "  EFNFR  ,ERR_FATAL/NONFATAL received" "Not received,Received"
newline
eventfld.long 0x04 1. " MECR                ,Multiple ERR_COR received" "Not received,Received"
eventfld.long 0x04 0. "  ECR    ,ERR_COR received" "Not received,Received"
else
hgroup.long 0x12C++0x03
hide.long 0x00 "ROOT_ERROR_COMMAND,PCI Express Root Error Command Register"
hgroup.long 0x130++0x03
hide.long 0x00 "ROOT_ERROR_STATUS,PCI Express Root Error Status Register"
endif
rgroup.word 0x134++0x03
line.word 0x00 "CORRECTABLE_ERROR_SOURCE_ID,PCI Express Correctable Error Source ID Register"
line.word 0x02 "ERROR_SOURCE_ID,PCI Express Error Source ID Register"
tree.end
width 28.
tree "Secondary PCI Express Capability Structure"
rgroup.long 0x148++0x03
line.long 0x00 "SPCIE_CAP_HEADER_REG,Secondary PCIE Capability Header Register"
hexmask.long.word 0x00 20.--31. 0x10 " NEXT_OFFSET        ,Pointer to the next capability structure"
bitfld.long 0x00 16.--19. "          CAP_VERSION   ,Indicates the version of the capability structure present" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
hexmask.long.word 0x00 0.--15. 1. " EXTENDED_CAP_ID    ,Secondary PCI express capability"
group.long 0x14C++0x07
line.long 0x00 "LINK_CONTROL3_REG,Link Control 3 Register"
bitfld.long 0x00 1. " EQ_REQ_INT_EN      ,Link equalization request interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "      PERFORM_EQ    ,Perform equalization" "Not performed,Performed"
line.long 0x04 "LANE_ERR_STATUS_REG,Lane Error Status Register"
eventfld.long 0x04 3. " LANE_ERR_STATUS[3] ,Lane 4 detected a lane-based error" "No error,Error"
eventfld.long 0x04 2. "      [2]           ,Lane 3 detected a lane-based error" "No error,Error"
newline
eventfld.long 0x04 1. " [1]                ,Lane 2 detected a lane-based error" "No error,Error"
eventfld.long 0x04 0. "      [0]           ,Lane 1 detected a lane-based error" "No error,Error"
rgroup.word (0x154+0x0)++0x01
line.word 0x00 "LANE1_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x2)++0x01
line.word 0x00 "LANE2_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x4)++0x01
line.word 0x00 "LANE3_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.word (0x154+0x6)++0x01
line.word 0x00 "LANE4_EQUALIZATION_CONTROL,Lane Equalization Control Register"
bitfld.word 0x00 12.--14. "     USP_RX_PRESET_HINT ,Upstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 8.--11. "             USP_TX_PRESET ,Upstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.word 0x00 4.--6. "     DSP_RX_PRESET_HINT ,Downstream port receiver preset hint" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 0.--3. "             DSP_TX_PRESET ,Downstream port transmitter preset" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
tree.end
tree "PEX Module Internal Configuration Space"
width 39.
group.long 0x71C++0x03
line.long 0x00 "SYMBOL_TIMER_FILTER_1_OFF,Symbol Timer And Filter Mask 1 Register"
bitfld.long 0x00 31. " CX_FLT_MASK_RC_CFG_DISCARD     ,CX_FLT_MASK_RC_CFG_DISCARD" "Not masked,Masked"
bitfld.long 0x00 30. "                  CX_FLT_MASK_RC_IO_DISCARD    ,CX_FLT_MASK_RC_IO_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 29. " CX_FLT_MASK_MSG_DROP           ,CX_FLT_MASK_MSG_DROP" "Not masked,Masked"
bitfld.long 0x00 28. "                  CX_FLT_MASK_CPL_ECRC_DISCARD ,CX_FLT_MASK_CPL_ECRC_DISCARD" "Not masked,Masked"
newline
bitfld.long 0x00 27. " CX_FLT_MASK_ECRC_DISCARD       ,CX_FLT_MASK_ECRC_DISCARD" "Not masked,Masked"
bitfld.long 0x00 26. "                  CX_FLT_MASK_CPL_LEN_MATCH    ,CX_FLT_MASK_CPL_LEN_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 25. " CX_FLT_MASK_CPL_ATTR_MATCH     ,CX_FLT_MASK_CPL_ATTR_MATCH" "Not masked,Masked"
bitfld.long 0x00 24. "                  CX_FLT_MASK_CPL_TC_MATCH     ,CX_FLT_MASK_CPL_TC_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 23. " CX_FLT_MASK_CPL_FUNC_MATCH     ,CX_FLT_MASK_CPL_FUNC_MATCH" "Not masked,Masked"
bitfld.long 0x00 22. "                  CX_FLT_MASK_CPL_REQID_MATCH  ,CX_FLT_MASK_CPL_REQID_MATCH" "Not masked,Masked"
newline
bitfld.long 0x00 21. " CX_FLT_MASK_CPL_TAGERR_MATCH   ,CX_FLT_MASK_CPL_TAGERR_MATCH" "Not masked,Masked"
bitfld.long 0x00 20. "                  CX_FLT_MASK_LOCKED_RD_AS_UR  ,CX_FLT_MASK_LOCKED_RD_AS_UR" "Not masked,Masked"
newline
bitfld.long 0x00 19. " CX_FLT_MASK_CFG_TYPE1_RE_AS_UR ,CX_FLT_MASK_CFG_TYPE1_RE_AS_UR" "Not masked,Masked"
bitfld.long 0x00 18. "                  CX_FLT_MASK_UR_OUTSIDE_BAR   ,CX_FLT_MASK_UR_OUTSIDE_BAR" "Not masked,Masked"
newline
bitfld.long 0x00 17. " CX_FLT_MASK_UR_POIS            ,CX_FLT_MASK_UR_POIS" "Not masked,Masked"
bitfld.long 0x00 16. "                  CX_FLT_MASK_UR_FUNC_MISMATCH ,CX_FLT_MASK_UR_FUNC_MISMATCH" "Not masked,Masked"
newline
bitfld.long 0x00 15. " DISABLE_FC_WD_TIMER            ,Disables FC watchdog timer" "No,Yes"
hexmask.long.word 0x00 0.--10. 1. "                         SKP_INT_VAL                  ,SKP interval value"
group.long 0x890++0x03
line.long 0x00 "GEN3_RELATED_OFF,Gen3 Control Register"
bitfld.long 0x00 16. " GEN3_EQUALIZATION_DIS          ,Equalization disable" "No,Yes"
bitfld.long 0x00 12. "                         RXEQ_PH01_EN                 ,Rx equalization phase 0/1 hold enable" "Disabled,Enabled"
newline
bitfld.long 0x00 10. " EQ_EIEOS_CNT                   ,Equalization EIEOS count reset disable" "No,Yes"
group.long 0x8BC++0x03
line.long 0x00 "MISC_CONTROL_1_OFF,DBI Read-Only Write Enable Register"
bitfld.long 0x00 0. " DBI_RO_WR_EN                   ,Write to RO registers using DBI" "Disabled,Enabled"
group.long 0x8E0++0x07
line.long 0x00 "COHERENCY_CONTROL_1_OFF,Coherency Control 1"
hexmask.long 0x00 2.--31. 0x04 " CFG_MEMTYPE_BOUNDARY_LOW_ADDR  ,Boundary lower address for memory type"
bitfld.long 0x00 0. "                    CFG_MEMTYPE_VALUE            ,Memory type" "CCSR/Memory,?..."
line.long 0x04 "COHERENCY_CONTROL_2_OFF,Coherency Control 2"
group.long 0x900++0x03
line.long 0x00 "IATU_VIEWPORT_OFF,IATU Index Register"
bitfld.long 0x00 31. " REGION_DIR                     ,Region direction" "Outbound,Inbound"
hexmask.long.byte 0x00 0.--7. 1. "                    REGION_INDEX                 ,Region index"
if (((per.l(ad:0x03700000+0x900))&0x80000000)==0x80000000)
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==(0x10<<4))
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 19. "  FUNC_NUM_MATCH_EN            ,Function number match enable" "Disabled,Enabled"
newline
bitfld.long 0x04 18. " AT_MATCH_EN                    ,AT match enable" "Disabled,Enabled"
bitfld.long 0x04 8.--10. "                    BAR_NUM                      ,BAR number" "BAR 0,BAR 1,BAR 2,BAR 3,BAR 4,BAR 5,ROM,?..."
else
group.long 0x904++0x07
line.long 0x00 "IATU_REGION_CTRL_1_OFF_INBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,When the ATTR field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,When the TD field of an inbound TLP is matched to this value then address translation proceeds" "0,1"
newline
bitfld.long 0x00 5.--7. " TC                             ,When the TC field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--4. "                           TYPE                         ,When the TYPE field of an inbound TLP is matched to this value then address translation proceeds" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
line.long 0x04 "IATU_REGION_CTRL_2_OFF_INBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x04 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
newline
bitfld.long 0x04 30. " MATCH_MODE                     ,Match mode" "Address/Routing ID/Address,BAR/Accept/Vendor ID"
bitfld.long 0x04 18. "  AT_MATCH_EN                  ,AT match enable" "Disabled,Enabled"
endif
group.long 0x90C++0x13
line.long 0x00 "IATU_LWR_BASE_ADDR_OFF_INBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x00 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x00 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x04 "IATU_UPPER_BASE_ADDR_OFF_INBOUND_0,IATU Upper Base Address Register"
line.long 0x08 "IATU_LIMIT_ADDR_OFF_INBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x08 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x08 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x0C "IATU_LWR_TARGET_ADDR_OFF_INBOUND_0,IATU Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x10 "IATU_UPPER_TARGET_ADDR_OFF_INBOUND_0,IATU Upper Target Address Register"
else
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4.))==(0x10<<4.))
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
group.long 0x904++0x03
line.long 0x00 "IATU_REGION_CTRL_1_OFF_OUTBOUND_0,IATU Region Control 1 Register"
bitfld.long 0x00 16.--17. " AT                             ,TLP AT field changing value" "0,1,2,3"
bitfld.long 0x00 9.--10. "                           ATTR                         ,TLP ATTR field changing value" "0,1,2,3"
newline
bitfld.long 0x00 8. " TD                             ,TLP TD field changing value" "0,1"
bitfld.long 0x00 5.--7. "                           TC                           ,TLP TC field changing value" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 0.--4. " TYPE                           ,TLP TYPE field changing value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
endif
group.long 0x908++0x17
line.long 0x00 "IATU_REGION_CTRL_2_OFF_OUTBOUND_0,IATU Region Control 2 Register"
bitfld.long 0x00 31. " REGION_EN                      ,Region enable" "Disabled,Enabled"
bitfld.long 0x00 28. "                    CFG_SHIFT_MODE               ,CFG shift mode" "Not shifted,Shifted"
newline
hexmask.long.byte 0x00 0.--7. 1. " MSG_CODE                       ,Message code"
line.long 0x04 "IATU_LWR_BASE_ADDR_OFF_OUTBOUND_0,IATU Lower Base Address Register"
hexmask.long.tbyte 0x04 12.--31. 0x10 " LWR_BASE_RW                    ,Forms bits [31:12] of the start address of the address region to be translated"
rhexmask.long.word 0x04 0.--11. 0x01 "                      LWR_BASE_HW                  ,Forms bits [11:0] of the start address of the address region to be translated"
line.long 0x08 "IATU_UPPER_BASE_ADDR_OFF_OUTBOUND_0,IATU Upper Base Address Register"
line.long 0x0C "IATU_LIMIT_ADDR_OFF_OUTBOUND_0,IATU Limit Address Register"
hexmask.long.tbyte 0x0C 12.--31. 0x10 " LIMIT_ADDR_RW                  ,Forms bits [31:12] of the end address of the address region to be translated"
rhexmask.long.word 0x0C 0.--11. 0x01 "                      LIMIT_ADDR_HW                ,Forms bits [11:0] of the end address of the address region to be translated"
line.long 0x10 "IATU_LWR_TARGET_ADDR_OFF_OUTBOUND_0,IATU Outbound Region#N Lower Offset Address Register"
hexmask.long.tbyte 0x10 12.--31. 0x10 " LWR_TARGET_RW                  ,Forms bits [31:12] of the of the new address of the translated region"
rhexmask.long.word 0x10 0.--11. 0x01 "                      LWR_TARGET_HW                ,Forms bits [11:0] of the start address of the new address of the translated region"
line.long 0x14 "IATU_UPPER_TARGET_ADDR_OFF_OUTBOUND_0,IATU Upper Target Address Register"
endif
tree.end
tree "Base Address"
wgroup.long 0x1010++0x07
line.long 0x00 "BAR0_MASK,Base Address 0 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR1_MASK,Base Address 1 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
if (((per.l(ad:0x01E00000+0x13C))&(0x10<<4))==(0x10<<4))
wgroup.long 0x1018++0x0F
line.long 0x00 "BAR2_MASK,Base Address 2 Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x04 "BAR3_MASK,Base Address 3 Mask Register"
hexmask.long 0x04 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x04 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x08 "BAR4_MASK,Base Address 4 Mask Register"
hexmask.long 0x08 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x08 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
line.long 0x0C "BAR5_MASK,Base Address 5 Mask Register"
hexmask.long 0x0C 1.--31. 1. " MASK                           ,Mask"
bitfld.long 0x0C 0. "                    BAR_EN                       ,BAR enable" "Disabled,Enabled"
wgroup.long 0x1030++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long 0x00 1.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                    BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
else
wgroup.long 0x1038++0x03
line.long 0x00 "EXP_ROM_BAR_MASK_EP,Expansion ROM Base Address Mask Register"
hexmask.long.tbyte 0x00 11.--31. 1. " MASK                           ,Expansion ROM BAR mask"
bitfld.long 0x00 0. "                      BAR_EN                       ,Expansion ROM BAR enable" "Disabled,Enabled"
endif
tree.end
base ad:0x03700000+0x10000
width 22.
tree "PEX4_LUT Memory Map/Registers"
group.long 0x20++0x07
line.long 0x00 "PEX_LUT_PEXLSR,PEX LUT Status Register"
eventfld.long 0x00 31. " LUTM      ,Lookup table miss" "Not missed,Missed"
eventfld.long 0x00 30. "         MLUTM   ,Multiple lookup table miss" "Not missed,Missed"
newline
hexmask.long.word 0x00 0.--15. 1. " CREQID    ,Captured REQID"
line.long 0x04 "PEX_LUT_PEXLCR,PEX LUT Control Register"
bitfld.long 0x04 31. " DPL       ,Default privilege level" "0,1"
bitfld.long 0x04 30. "                  DBMT    ,Default bypass memory translation" "0,1"
newline
hexmask.long.word 0x04 0.--14. 1. " DICID     ,Default isolation context ID"
group.long (0x800+0x0)++0x07
line.long 0x00 "PEX_LUT_PEXL1UDR,PEX LUT Entry 1 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 1 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 1 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL1LDR,PEX LUT Entry 1 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 1 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 1 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x8)++0x07
line.long 0x00 "PEX_LUT_PEXL2UDR,PEX LUT Entry 2 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 2 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 2 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL2LDR,PEX LUT Entry 2 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 2 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 2 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x10)++0x07
line.long 0x00 "PEX_LUT_PEXL3UDR,PEX LUT Entry 3 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 3 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 3 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL3LDR,PEX LUT Entry 3 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 3 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 3 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x18)++0x07
line.long 0x00 "PEX_LUT_PEXL4UDR,PEX LUT Entry 4 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 4 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 4 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL4LDR,PEX LUT Entry 4 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 4 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 4 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x20)++0x07
line.long 0x00 "PEX_LUT_PEXL5UDR,PEX LUT Entry 5 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 5 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 5 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL5LDR,PEX LUT Entry 5 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 5 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 5 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x28)++0x07
line.long 0x00 "PEX_LUT_PEXL6UDR,PEX LUT Entry 6 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 6 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 6 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL6LDR,PEX LUT Entry 6 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 6 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 6 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x30)++0x07
line.long 0x00 "PEX_LUT_PEXL7UDR,PEX LUT Entry 7 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 7 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 7 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL7LDR,PEX LUT Entry 7 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 7 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 7 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x38)++0x07
line.long 0x00 "PEX_LUT_PEXL8UDR,PEX LUT Entry 8 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 8 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 8 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL8LDR,PEX LUT Entry 8 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 8 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 8 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x40)++0x07
line.long 0x00 "PEX_LUT_PEXL9UDR,PEX LUT Entry 9 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 9 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 9 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL9LDR,PEX LUT Entry 9 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 9 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 9 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x48)++0x07
line.long 0x00 "PEX_LUT_PEXL10UDR,PEX LUT Entry 10 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 10 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 10 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL10LDR,PEX LUT Entry 10 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 10 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 10 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x50)++0x07
line.long 0x00 "PEX_LUT_PEXL11UDR,PEX LUT Entry 11 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 11 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 11 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL11LDR,PEX LUT Entry 11 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 11 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 11 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x58)++0x07
line.long 0x00 "PEX_LUT_PEXL12UDR,PEX LUT Entry 12 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 12 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 12 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL12LDR,PEX LUT Entry 12 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 12 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 12 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x60)++0x07
line.long 0x00 "PEX_LUT_PEXL13UDR,PEX LUT Entry 13 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 13 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 13 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL13LDR,PEX LUT Entry 13 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 13 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 13 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x68)++0x07
line.long 0x00 "PEX_LUT_PEXL14UDR,PEX LUT Entry 14 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 14 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 14 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL14LDR,PEX LUT Entry 14 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 14 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 14 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x70)++0x07
line.long 0x00 "PEX_LUT_PEXL15UDR,PEX LUT Entry 15 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 15 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 15 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL15LDR,PEX LUT Entry 15 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 15 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 15 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x78)++0x07
line.long 0x00 "PEX_LUT_PEXL16UDR,PEX LUT Entry 16 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 16 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 16 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL16LDR,PEX LUT Entry 16 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 16 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 16 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x80)++0x07
line.long 0x00 "PEX_LUT_PEXL17UDR,PEX LUT Entry 17 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 17 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 17 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL17LDR,PEX LUT Entry 17 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 17 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 17 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x88)++0x07
line.long 0x00 "PEX_LUT_PEXL18UDR,PEX LUT Entry 18 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 18 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 18 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL18LDR,PEX LUT Entry 18 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 18 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 18 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x90)++0x07
line.long 0x00 "PEX_LUT_PEXL19UDR,PEX LUT Entry 19 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 19 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 19 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL19LDR,PEX LUT Entry 19 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 19 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 19 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0x98)++0x07
line.long 0x00 "PEX_LUT_PEXL20UDR,PEX LUT Entry 20 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 20 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 20 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL20LDR,PEX LUT Entry 20 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 20 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 20 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA0)++0x07
line.long 0x00 "PEX_LUT_PEXL21UDR,PEX LUT Entry 21 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 21 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 21 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL21LDR,PEX LUT Entry 21 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 21 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 21 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xA8)++0x07
line.long 0x00 "PEX_LUT_PEXL22UDR,PEX LUT Entry 22 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 22 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 22 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL22LDR,PEX LUT Entry 22 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 22 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 22 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB0)++0x07
line.long 0x00 "PEX_LUT_PEXL23UDR,PEX LUT Entry 23 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 23 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 23 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL23LDR,PEX LUT Entry 23 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 23 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 23 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xB8)++0x07
line.long 0x00 "PEX_LUT_PEXL24UDR,PEX LUT Entry 24 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 24 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 24 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL24LDR,PEX LUT Entry 24 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 24 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 24 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC0)++0x07
line.long 0x00 "PEX_LUT_PEXL25UDR,PEX LUT Entry 25 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 25 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 25 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL25LDR,PEX LUT Entry 25 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 25 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 25 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xC8)++0x07
line.long 0x00 "PEX_LUT_PEXL26UDR,PEX LUT Entry 26 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 26 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 26 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL26LDR,PEX LUT Entry 26 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 26 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 26 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD0)++0x07
line.long 0x00 "PEX_LUT_PEXL27UDR,PEX LUT Entry 27 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 27 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 27 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL27LDR,PEX LUT Entry 27 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 27 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 27 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xD8)++0x07
line.long 0x00 "PEX_LUT_PEXL28UDR,PEX LUT Entry 28 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 28 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 28 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL28LDR,PEX LUT Entry 28 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 28 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 28 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE0)++0x07
line.long 0x00 "PEX_LUT_PEXL29UDR,PEX LUT Entry 29 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 29 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 29 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL29LDR,PEX LUT Entry 29 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 29 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 29 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xE8)++0x07
line.long 0x00 "PEX_LUT_PEXL30UDR,PEX LUT Entry 30 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 30 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 30 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL30LDR,PEX LUT Entry 30 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 30 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 30 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF0)++0x07
line.long 0x00 "PEX_LUT_PEXL31UDR,PEX LUT Entry 31 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 31 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 31 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL31LDR,PEX LUT Entry 31 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 31 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 31 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long (0x800+0xF8)++0x07
line.long 0x00 "PEX_LUT_PEXL32UDR,PEX LUT Entry 32 Upper Data Register"
hexmask.long.word 0x00 16.--31. 1. " REQID     ,The request ID of entry 32 of the PEX lookup table"
hexmask.long.word 0x00 0.--15. 1. "               MASK    ,The mask field of entry 32 of the PEX lookup table"
line.long 0x04 "PEX_LUT_PEXL32LDR,PEX LUT Entry 32 Lower Data Register"
bitfld.long 0x04 31. " EN        ,The enable field of entry 32 within the PEX lookup table" "Disabled,Enabled"
bitfld.long 0x04 30. "           PL      ,The privilege level field of entry 32 within the PEX lookup table" "0,1"
newline
bitfld.long 0x04 29. " BMT       ,Bypass memory translation" "0,1"
hexmask.long.word 0x04 0.--14. 1. "                  ICID    ,Isolation context ID"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF 0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,Per PF dependent message interrupt is pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,Per PF dependent error interrupt is pending" "Not pending,Pending"
group.long 0x40014++0x03
line.long 0x00 "PEX_PF0_CONFIG,PEX PF 0 Config Register"
bitfld.long 0x00 0. " CFG_READY ,Config ready" "Not ready,Ready"
rgroup.long 0x40018++0x03
line.long 0x00 "PEX_PF0_INT_STAT,PEX PF0 Interrupt Status Register"
bitfld.long 0x00 15. " INTM      ,PF dependent message interrupt pending" "Not pending,Pending"
bitfld.long 0x00 14. "        INTE    ,PF dependent error interrupt pending" "Not pending,Pending"
group.long 0x40020++0x0F
line.long 0x00 "PEX_PF0_PME_MES_DR,PEX PF 0 PCIE PME And Message Detect Register"
eventfld.long 0x00 15. " PTO       ,Indicates that PME turn off was detected" "Not detected,Detected"
eventfld.long 0x00 13. "       ENL23   ,Indicates that PCIe core entered L2/L3 ready state" "Not detected,Detected"
newline
eventfld.long 0x00 12. " EXL23     ,Indicates that PCIe core exited L2/L3 ready state" "Not detected,Detected"
eventfld.long 0x00 10. "       HRD     ,Indicates a hot reset was detected" "Not detected,Detected"
newline
eventfld.long 0x00 9. " LDD       ,Indicates a link down was detected" "Not detected,Detected"
eventfld.long 0x00 7. "       LUD     ,Indicates a link up was detected" "Not detected,Detected"
line.long 0x04 "PEX_PF0_PME_MES_DISR,PEX PF 0 PCIE PME And Message Disable Register"
bitfld.long 0x04 15. " PTOD      ,PME turn off detect disabled" "No,Yes"
bitfld.long 0x04 13. "                ENL23D  ,Entered L2/L3 ready state detect disabled" "No,Yes"
newline
bitfld.long 0x04 12. " EXL23D    ,Exited L2/L3 ready state detect disable" "No,Yes"
bitfld.long 0x04 10. "                HRDD    ,Hot reset detect disable" "No,Yes"
newline
bitfld.long 0x04 9. " LDDD      ,Link down detect disable" "No,Yes"
bitfld.long 0x04 7. "                LUDD    ,Link up detect disable" "No,Yes"
line.long 0x08 "PEX_PF0_PME_MES_IER,PEX PF 0 PCIE PME And Message Interrupt Enable Register"
bitfld.long 0x08 15. " PTOIE     ,PME turn off interrupt enable" "Disabled,Enabled"
bitfld.long 0x08 13. "           ENL23IE ,Entered L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 12. " EXL23IE   ,Exited L2/L3 ready state detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 10. "           HRDIE   ,Hot reset detect interrupt enabled" "Disabled,Enabled"
newline
bitfld.long 0x08 9. " LDDIE     ,Link down detect interrupt enabled" "Disabled,Enabled"
bitfld.long 0x08 7. "           LUDIE   ,Link up detect interrupt enabled" "Disabled,Enabled"
line.long 0x0C "PEX_PF0_MCR,PEX PF 0 PCIE Message Command Register"
bitfld.long 0x0C 4. " INTX      ,Assert/de-assert intx command" "Not asserted,Asserted"
bitfld.long 0x0C 2. "       SPMES   ,Send PM_PME command" "No effect,Send"
newline
bitfld.long 0x0C 1. " EXL2S     ,Exit L2 state command" "No effect,Generate"
bitfld.long 0x0C 0. "          PTOMR   ,Generate PME turn off message (RC only)" "No effect,Generate"
group.long 0x40140++0x03
line.long 0x00 "PEX_PF0_RBP_ADDR_U,PEX PF 0 Route By Port Address Upper Register"
hexmask.long.word 0x00 16.--31. 1. " ADDR_U    ,Upper 16 bit of the PCIE slave device used for the outbound transactions"
group.long 0x40200++0x03
line.long 0x00 "PEX_PF0_ERR_DR,PEX PF 0 PCIE Error Detect Register"
eventfld.long 0x00 31. " ME        ,Indicates multiple errors of same type" "Not detected,Detected"
eventfld.long 0x00 23. "       PCT     ,Indicates completion timeout" "Not detected,Detected"
newline
eventfld.long 0x00 21. " PCAC      ,Completer abort was detected" "Not detected,Detected"
eventfld.long 0x00 19. "       CDNSC   ,Completion with data not succsessful was detected" "Not detected,Detected"
newline
eventfld.long 0x00 2. " UREP      ,Indicates an unsupported request completion was detected" "Not detected,Detected"
group.long 0x40208++0x03
line.long 0x00 "PEX_PF0_ERR_EN,PEX PF 0 PCIE Error Interrupt Enable Register"
bitfld.long 0x00 23. " PCTIE     ,Completion timeout interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "           PCACIE  ,Completer abort interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 19. " CDNSCIE   ,Completion with data not successful interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 2. "           UREPIE  ,Unsupported request in EP mode interrupt enable" "Disabled,Enabled"
group.long 0x40210++0x03
line.long 0x00 "PEX_PF0_ERR_DISR,PEX PF 0 PCIE Error Disable Register"
eventfld.long 0x00 31. " MED       ,Multiple errors of same type detection disable" "No,Yes"
bitfld.long 0x00 23. "                PCTD    ,Completion detection disable" "No,Yes"
newline
bitfld.long 0x00 21. " PCACD     ,Completer abort detection disable" "No,Yes"
bitfld.long 0x00 19. "                CDNSCD  ,Completion with data not successful detection disable" "No,Yes"
newline
bitfld.long 0x00 2. " UREPD     ,Unsupported request in EP mode detection disable" "No,Yes"
group.long 0x407FC++0x03
line.long 0x00 "PEX_PF0_DBG,PEX PF0 Debug Register"
bitfld.long 0x00 31. " WE        ,Write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "           SR      ,Soft reset" "No reset,Reset"
newline
rbitfld.long 0x00 0.--5. " LTSSM     ,Link training status state machine (LTSSM) status" "DETECT_QUIET,DETECT_ACTIVE,POLL_ACTIVE,POLL_COMPLIANCE,POLL_CONFIG,PRE_DETECT_QUIET,DETECT_WAIT,CFG_LINKWD_START,CFG_LINKWD_ACEPT,CFG_LANENUM_WAIT,CFG_LANENUM_ACEPT,CFG_COMPLETE,CFG_IDLE,RCVRY_LOCK,RCVRY_SPEED,RCVRY_RCVRCFG,RCVRY_IDLE,L0,L0S,L123_SEND_EIDLE,L1_IDLE,L2_IDLE,L2_WAKE,DISABLED_ENTRY,DISABLED_IDLE,DISABLED,LPBK_ENTRY,LPBK_ACTIVE,LPBK_EXIT,LPBK_EXIT_TIMEOUT,HOT_RESET_ENTRY,HOT_RESET,RCVRY_EQ0,RCVRY_EQ1,RCVRY_EQ2,RCVRY_EQ3,?..."
tree.end
width 0x0B
tree.end
tree.end
tree "PMU (Power Management Unit)"
base ad:0x01E30000
width 18.
tree "Threads registers"
width 18.
rgroup.long 0x40++0x03
line.long 0x00 "TWAITSR0,Thread Wait Status Register"
bitfld.long 0x00 17. " T_WAITING17 ,Thread wait status bit 17" "Not in wait,In wait"
bitfld.long 0x00 16. "   T_WAITING16 ,Thread wait status bit 16" "Not in wait,In wait"
bitfld.long 0x00 15. "   T_WAITING15 ,Thread wait status bit 15" "Not in wait,In wait"
newline
bitfld.long 0x00 14. " T_WAITING14 ,Thread wait status bit 14" "Not in wait,In wait"
bitfld.long 0x00 13. "   T_WAITING13 ,Thread wait status bit 13" "Not in wait,In wait"
bitfld.long 0x00 12. "   T_WAITING12 ,Thread wait status bit 12" "Not in wait,In wait"
newline
bitfld.long 0x00 11. " T_WAITING11 ,Thread wait status bit 11" "Not in wait,In wait"
bitfld.long 0x00 10. "   T_WAITING10 ,Thread wait status bit 10" "Not in wait,In wait"
bitfld.long 0x00 9. "   T_WAITING9  ,Thread wait status bit 9" "Not in wait,In wait"
newline
bitfld.long 0x00 8. " T_WAITING8  ,Thread wait status bit 8" "Not in wait,In wait"
bitfld.long 0x00 7. "   T_WAITING7  ,Thread wait status bit 7" "Not in wait,In wait"
bitfld.long 0x00 6. "   T_WAITING6  ,Thread wait status bit 6" "Not in wait,In wait"
newline
bitfld.long 0x00 5. " T_WAITING5  ,Thread wait status bit 5" "Not in wait,In wait"
bitfld.long 0x00 4. "   T_WAITING4  ,Thread wait status bit 4" "Not in wait,In wait"
bitfld.long 0x00 3. "   T_WAITING3  ,Thread wait status bit 3" "Not in wait,In wait"
newline
bitfld.long 0x00 2. " T_WAITING2  ,Thread wait status bit 2" "Not in wait,In wait"
bitfld.long 0x00 1. "   T_WAITING1  ,Thread wait status bit 1" "Not in wait,In wait"
bitfld.long 0x00 0. "   T_WAITING0  ,Thread wait status bit 0" "Not in wait,In wait"
rgroup.long 0x50++0x03
line.long 0x00 "TWDTDSR0,Core Watchdog Detect Status Register"
bitfld.long 0x00 7. " TWDT_DET7   ,Core 7 WDT detect status bit 7" "Not detected,Detected"
bitfld.long 0x00 6. "  TWDT_DET6   ,Core 6 WDT detect status bit 6" "Not detected,Detected"
bitfld.long 0x00 5. "  TWDT_DET5   ,Core 5 WDT detect status bit 5" "Not detected,Detected"
newline
bitfld.long 0x00 4. " TWDT_DET4   ,Core 4 WDT detect status bit 4" "Not detected,Detected"
bitfld.long 0x00 3. "  TWDT_DET3   ,Core 3 WDT detect status bit 3" "Not detected,Detected"
bitfld.long 0x00 2. "  TWDT_DET2   ,Core 2 WDT detect status bit 2" "Not detected,Detected"
newline
bitfld.long 0x00 1. " TWDT_DET1   ,Core 1 WDT detect status bit 1" "Not detected,Detected"
bitfld.long 0x00 0. "  TWDT_DET0   ,Core 0 WDT detect status bit 0" "Not detected,Detected"
group.long 0x1B0++0x03
line.long 0x00 "TTBHLTCR0,Thread Time Base Halt Control Register"
bitfld.long 0x00 17. " TTBHLT17    ,Core timebase behavior during thread halted bit 17" "Stopped,Not stopped"
bitfld.long 0x00 16. "   TTBHLT16    ,Core timebase behavior during thread halted bit 16" "Stopped,Not stopped"
bitfld.long 0x00 15. "   TTBHLT15    ,Core timebase behavior during thread halted bit 15" "Stopped,Not stopped"
newline
bitfld.long 0x00 14. " TTBHLT14    ,Core timebase behavior during thread halted bit 14" "Stopped,Not stopped"
bitfld.long 0x00 13. "   TTBHLT13    ,Core timebase behavior during thread halted bit 13" "Stopped,Not stopped"
bitfld.long 0x00 12. "   TTBHLT12    ,Core timebase behavior during thread halted bit 12" "Stopped,Not stopped"
newline
bitfld.long 0x00 11. " TTBHLT11    ,Core timebase behavior during thread halted bit 11" "Stopped,Not stopped"
bitfld.long 0x00 10. "   TTBHLT10    ,Core timebase behavior during thread halted bit 10" "Stopped,Not stopped"
bitfld.long 0x00 9. "   TTBHLT9     ,Core timebase behavior during thread halted bit 9" "Stopped,Not stopped"
newline
bitfld.long 0x00 8. " TTBHLT8     ,Core timebase behavior during thread halted bit 8" "Stopped,Not stopped"
bitfld.long 0x00 7. "   TTBHLT7     ,Core timebase behavior during thread halted bit 7" "Stopped,Not stopped"
bitfld.long 0x00 6. "   TTBHLT6     ,Core timebase behavior during thread halted bit 6" "Stopped,Not stopped"
newline
bitfld.long 0x00 5. " TTBHLT5     ,Core timebase behavior during thread halted bit 5" "Stopped,Not stopped"
bitfld.long 0x00 4. "   TTBHLT4     ,Core timebase behavior during thread halted bit 4" "Stopped,Not stopped"
bitfld.long 0x00 3. "   TTBHLT3     ,Core timebase behavior during thread halted bit 3" "Stopped,Not stopped"
newline
bitfld.long 0x00 2. " TTBHLT2     ,Core timebase behavior during thread halted bit 2" "Stopped,Not stopped"
bitfld.long 0x00 1. "   TTBHLT1     ,Core timebase behavior during thread halted bit 1" "Stopped,Not stopped"
bitfld.long 0x00 0. "   TTBHLT0     ,Core timebase behavior during thread halted bit 0" "Stopped,Not stopped"
tree.end
tree "Physical cores registers"
width 18.
rgroup.long 0x810++0x03
line.long 0x00 "PCWFESR,Physical Core WFE Status Register"
bitfld.long 0x00 7. " PC7          ,Physical core WFE status bit 7" "Not in WFE,In WFE"
bitfld.long 0x00 6. "    PC6          ,Physical core WFE status bit 6" "Not in WFE,In WFE"
bitfld.long 0x00 5. "    PC5          ,Physical core WFE status bit 5" "Not in WFE,In WFE"
newline
bitfld.long 0x00 4. " PC4          ,Physical core WFE status bit 4" "Not in WFE,In WFE"
bitfld.long 0x00 3. "    PC3          ,Physical core WFE status bit 3" "Not in WFE,In WFE"
bitfld.long 0x00 2. "    PC2          ,Physical core WFE status bit 2" "Not in WFE,In WFE"
newline
bitfld.long 0x00 1. " PC1          ,Physical core WFE status bit 1" "Not in WFE,In WFE"
bitfld.long 0x00 0. "    PC0          ,Physical core WFE status bit 0" "Not in WFE,In WFE"
rgroup.long 0x830++0x03
line.long 0x00 "PCPW20SR,Physical Core PW20 Status Register"
bitfld.long 0x00 7. " PC7          ,Physical core PW20 status bit 7" "Not in PW20,In PW20"
bitfld.long 0x00 6. "   PC6          ,Physical core PW20 status bit 6" "Not in PW20,In PW20"
bitfld.long 0x00 5. "   PC5          ,Physical core PW20 status bit 5" "Not in PW20,In PW20"
newline
bitfld.long 0x00 4. " PC4          ,Physical core PW20 status bit 4" "Not in PW20,In PW20"
bitfld.long 0x00 3. "   PC3          ,Physical core PW20 status bit 3" "Not in PW20,In PW20"
bitfld.long 0x00 2. "   PC2          ,Physical core PW20 status bit 2" "Not in PW20,In PW20"
newline
bitfld.long 0x00 1. " PC1          ,Physical core PW20 status bit 1" "Not in PW20,In PW20"
bitfld.long 0x00 0. "   PC0          ,Physical core PW20 status bit 0" "Not in PW20,In PW20"
group.long 0x840++0x03
line.long 0x00 "PCPH30SR,Physical Core PH30 Status Register"
bitfld.long 0x00 17. " PC17         ,Physical core PH30 status bit 17" "Not in PH30,In PH30"
bitfld.long 0x00 16. "   PC16         ,Physical core PH30 status bit 16" "Not in PH30,In PH30"
bitfld.long 0x00 15. "   PC15         ,Physical core PH30 status bit 15" "Not in PH30,In PH30"
newline
bitfld.long 0x00 14. " PC14         ,Physical core PH30 status bit 14" "Not in PH30,In PH30"
bitfld.long 0x00 13. "   PC13         ,Physical core PH30 status bit 13" "Not in PH30,In PH30"
bitfld.long 0x00 12. "   PC12         ,Physical core PH30 status bit 12" "Not in PH30,In PH30"
newline
bitfld.long 0x00 11. " PC11         ,Physical core PH30 status bit 11" "Not in PH30,In PH30"
bitfld.long 0x00 10. "   PC10         ,Physical core PH30 status bit 10" "Not in PH30,In PH30"
bitfld.long 0x00 9. "   PC9          ,Physical core PH30 status bit 9" "Not in PH30,In PH30"
newline
bitfld.long 0x00 8. " PC8          ,Physical core PH30 status bit 8" "Not in PH30,In PH30"
bitfld.long 0x00 7. "   PC7          ,Physical core PH30 status bit 7" "Not in PH30,In PH30"
bitfld.long 0x00 6. "   PC6          ,Physical core PH30 status bit 6" "Not in PH30,In PH30"
newline
bitfld.long 0x00 5. " PC5          ,Physical core PH30 status bit 5" "Not in PH30,In PH30"
bitfld.long 0x00 4. "   PC4          ,Physical core PH30 status bit 4" "Not in PH30,In PH30"
bitfld.long 0x00 3. "   PC3          ,Physical core PH30 status bit 3" "Not in PH30,In PH30"
newline
bitfld.long 0x00 2. " PC2          ,Physical core PH30 status bit 2" "Not in PH30,In PH30"
bitfld.long 0x00 1. "   PC1          ,Physical core PH30 status bit 1" "Not in PH30,In PH30"
bitfld.long 0x00 0. "   PC0          ,Physical core PH30 status bit 0" "Not in PH30,In PH30"
group.long 0x8A0++0x07
line.long 0x00 "PCTBENR,Physical Core Time Base Enable Register"
bitfld.long 0x00 17. " PCTBEN17     ,Core timebase enable bit 17" "Disabled,Enabled"
bitfld.long 0x00 16. "      PCTBEN16     ,Core timebase enable bit 16" "Disabled,Enabled"
bitfld.long 0x00 15. "      PCTBEN15     ,Core timebase enable bit 15" "Disabled,Enabled"
newline
bitfld.long 0x00 14. " PCTBEN14     ,Core timebase enable bit 14" "Disabled,Enabled"
bitfld.long 0x00 13. "      PCTBEN13     ,Core timebase enable bit 13" "Disabled,Enabled"
bitfld.long 0x00 12. "      PCTBEN12     ,Core timebase enable bit 12" "Disabled,Enabled"
newline
bitfld.long 0x00 11. " PCTBEN11     ,Core timebase enable bit 11" "Disabled,Enabled"
bitfld.long 0x00 10. "      PCTBEN10     ,Core timebase enable bit 10" "Disabled,Enabled"
bitfld.long 0x00 9. "      PCTBEN9      ,Core timebase enable bit 9" "Disabled,Enabled"
newline
bitfld.long 0x00 8. " PCTBEN8      ,Core timebase enable bit 8" "Disabled,Enabled"
bitfld.long 0x00 7. "      PCTBEN7      ,Core timebase enable bit 7" "Disabled,Enabled"
bitfld.long 0x00 6. "      PCTBEN6      ,Core timebase enable bit 6" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " PCTBEN5      ,Core timebase enable bit 5" "Disabled,Enabled"
bitfld.long 0x00 4. "      PCTBEN4      ,Core timebase enable bit 4" "Disabled,Enabled"
bitfld.long 0x00 3. "      PCTBEN3      ,Core timebase enable bit 3" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " PCTBEN2      ,Core timebase enable bit 2" "Disabled,Enabled"
bitfld.long 0x00 1. "      PCTBEN1      ,Core timebase enable bit 1" "Disabled,Enabled"
bitfld.long 0x00 0. "      PCTBEN0      ,Core timebase enable bit 0" "Disabled,Enabled"
line.long 0x04 "PCTBCKSELR,Physical Core Time Base Clock Select Register"
bitfld.long 0x04 7. " PCTBCKSEL7   ,Core timebase input clock select bit 7" "Platform CLK,RTC signal"
bitfld.long 0x04 6. "  PCTBCKSEL6   ,Core timebase input clock select bit 6" "Platform CLK,RTC signal"
bitfld.long 0x04 5. "  PCTBCKSEL5   ,Core timebase input clock select bit 5" "Platform CLK,RTC signal"
newline
bitfld.long 0x04 4. " PCTBCKSEL4   ,Core timebase input clock select bit 4" "Platform CLK,RTC signal"
bitfld.long 0x04 3. "  PCTBCKSEL3   ,Core timebase input clock select bit 3" "Platform CLK,RTC signal"
bitfld.long 0x04 2. "  PCTBCKSEL2   ,Core timebase input clock select bit 2" "Platform CLK,RTC signal"
newline
bitfld.long 0x04 1. " PCTBCKSEL1   ,Core timebase input clock select bit 1" "Platform CLK,RTC signal"
bitfld.long 0x04 0. "  PCTBCKSEL0   ,Core timebase input clock select bit 0" "Platform CLK,RTC signal"
tree.end
tree "Clusters registers"
width 23.
group.long 0x1000++0x03
line.long 0x00 "CLPCL10SR_SET/CLR,Cluster PCL10 (Stop) Status Register"
setclrfld.long 0x00 4. 0x04 4. 0x08 4. " CL4          ,Cluster 4 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "   CL3             ,Cluster 3 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "   CL2          ,Cluster 2 PCL10 status" "Not in PCL10,In PCL10"
newline
setclrfld.long 0x00 1. 0x04 1. 0x08 1. " CL1          ,Cluster 1 PCL10 status" "Not in PCL10,In PCL10"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "   CL0             ,Cluster 0 PCL10 status" "Not in PCL10,In PCL10"
group.long 0x100C++0x03
line.long 0x00 "CLPCL10PSR,Cluster PCL10 (Stop) Previous Status Register"
eventfld.long 0x00 4. " CL_P_PCL10_4 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 3. "   CL_P_PCL10_3    ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 2. "   CL_P_PCL10_2 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
newline
eventfld.long 0x00 1. " CL_P_PCL10_1 ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
eventfld.long 0x00 0. "   CL_P_PCL10_0    ,Cluster PCL10 previous status" "Not in PCL10,In PCL10"
group.long 0x1060++0x03
line.long 0x00 "CLWAKEEVENTDLYR,Cluster Wakeup Event Delay Register"
bitfld.long 0x00 16.--19. " EVENTI_DLY   ,EVENTI delay [cycles]" "0,1,4,16,64,256,1024,4096,16384,?..."
bitfld.long 0x00 0.--3. "          CLREXMONREQ_DLY ,CLREXMONREQ delay" "0,1,4,16,64,256,1024,4096,16384,?..."
group.long 0x1100++0x03
line.long 0x00 "CLAINACTSETR_SET/CLR,Cluster ACP AINACTS Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLAINACT3    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "       CLAINACT2       ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "       CLAINACT1    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLAINACT0    ,Indicates the cluster ACP port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
group.long 0x1108++0x03
line.long 0x00 "CLSINACTSETR_SET/CLR,Cluster Skyros SINACT Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLSINACT3    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "       CLSINACT2       ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "       CLSINACT1    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLSINACT0    ,Indicates the cluster Skyros port inactivity after the cluster snoop domain in CCN has been closed" "Active,Inactive"
group.long 0x1110++0x03
line.long 0x00 "CLL2FLUSHSETR_SET/CLR,Cluster L2FLUSH Set Control Register"
setclrfld.long 0x00 3. 0x00 3. 0x04 3. " CLL2FLUSH3   ,Requests the cluster 3 to flush its L2 cache" "Not requested,Requested"
setclrfld.long 0x00 2. 0x00 2. 0x04 2. "  CLL2FLUSH2      ,Requests the cluster 2 to flush its L2 cache" "Not requested,Requested"
setclrfld.long 0x00 1. 0x00 1. 0x04 1. "  CLL2FLUSH1   ,Requests the cluster 1 to flush its L2 cache" "Not requested,Requested"
newline
setclrfld.long 0x00 0. 0x00 0. 0x04 0. " CLL2FLUSH0   ,Requests the cluster 0 to flush its L2 cache" "Not requested,Requested"
rgroup.long 0x1118++0x03
line.long 0x00 "CLL2FLUSHSR,Cluster L2 FLUSH Done Status Register"
bitfld.long 0x00 3. " CL3          ,Cluster 3 L2 flush status" "Not flushed,Flushed"
bitfld.long 0x00 2. "    CL2             ,Cluster 2 L2 flush status" "Not flushed,Flushed"
bitfld.long 0x00 1. "    CL1          ,Cluster 1 L2 flush status" "Not flushed,Flushed"
newline
bitfld.long 0x00 0. " CL0          ,Cluster 0 L2 flush status" "Not flushed,Flushed"
group.long 0x18A0++0x03
line.long 0x00 "CLTBENR,Cluster Time Base Enable Register"
bitfld.long 0x00 3. " CLTBEN3      ,Cluster 3 Timebase Enable" "Disabled,Enabled"
bitfld.long 0x00 2. "       CLTBEN2         ,Cluster 2 Timebase Enable" "Disabled,Enabled"
bitfld.long 0x00 1. "       CLTBEN1      ,Cluster 1 Timebase Enable" "Disabled,Enabled"
newline
bitfld.long 0x00 0. " CLTBEN0      ,Cluster 0 Timebase Enable" "Disabled,Enabled"
tree.end
tree "Domain registers"
width 12.
rgroup.long 0xFBF8++0x07
line.long 0x00 "IPREV1R,IP Revision Register"
hexmask.long.word 0x00 16.--31. 1. " IP_ID          ,Revision ID"
hexmask.long.byte 0x00 8.--15. 1. "           IP_MJ         ,Major revision"
hexmask.long.byte 0x00 0.--7. 1. "             IP_MN      ,Minor revision"
line.long 0x04 "IPREV2R,IP Revision Register"
hexmask.long.byte 0x04 16.--23. 1. " IP_INT         ,IP_INT"
hexmask.long.byte 0x04 0.--7. 1. "             IP_CFG        ,IP_CFG"
tree.end
width 0x0B
tree.end
tree "QuadSPI (Quad Serial Peripheral Interface)"
base ad:0x20C0000
width 9.
group.long 0x00++0x03
line.long 0x00 "MCR,Module Configuration Register"
hexmask.long.byte 0x00 24.--31. 1. " SCLKCFG ,Serial clock configuration"
bitfld.long 0x00 19. "                ISD3FB  ,Idle signal drive IOFB[3] flash B" "Logic L,Logic H"
bitfld.long 0x00 18. "           ISD2FB  ,Idle signal drive IOFB[2] flash B" "Logic L,Logic H"
bitfld.long 0x00 17. "        ISD3FA ,Idle signal drive IOFA[3] flash A" "Logic L,Logic H"
newline
bitfld.long 0x00 16. " ISD2FA  ,Idle signal drive IOFA[2] flash A" "Logic L,Logic H"
bitfld.long 0x00 15. "           DOZE    ,Doze enable" "Disabled,Enabled"
bitfld.long 0x00 14. "          MDIS    ,Module disable" "No,Yes"
newline
bitfld.long 0x00 11. " CLR_TXF ,Clear TX FIFO" "No effect,Clear"
bitfld.long 0x00 10. "         CLR_RXF ,Clear RX FIFO" "No effect,Clear"
bitfld.long 0x00 7. "         DDR_EN  ,DDR mode enable" "Disabled,Enabled"
bitfld.long 0x00 6. "       DQS_EN ,DQS enable." "Disabled,Enabled"
newline
bitfld.long 0x00 2.--3. " END_CFG ,Defines the endianness of the QSPI module" "64 bit BE,32 bit LE,32 bit BE,64 bit LE"
bitfld.long 0x00 1. "         SWRSTHD ,Software reset for AHB domain" "No reset,Reset"
bitfld.long 0x00 0. "          SWRSTSD ,Software reset for serial flash domain" "No reset,Reset"
if (((per.l(ad:0x20C0000+0x15C))&0x02)==0x00)
group.long 0x08++0x03
line.long 0x00 "IPCR,IP Configuration Register"
bitfld.long 0x00 24.--27. " SEQID   ,Points to a sequence in the look-up-table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16. "                PAR_EN  ,When set a transaction to two serial flash devices is triggered in parallel mode" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "          IDATSZ  ,IP data transfer size"
else
rgroup.long 0x08++0x03
line.long 0x00 "IPCR,IP Configuration Register"
bitfld.long 0x00 24.--27. " SEQID   ,Points to a sequence in the look-up-table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 16. "                PAR_EN  ,When set a transaction to two serial flash devices is triggered in parallel mode" "Disabled,Enabled"
hexmask.long.word 0x00 0.--15. 1. "          IDATSZ  ,IP data transfer size"
endif
if (((per.l(ad:0x20C0000+0x15C))&0x06)==0x00)
group.long 0x0C++0x03
line.long 0x00 "FLSHCR,Flash Configuration Register"
bitfld.long 0x00 16.--17. " TDH     ,Serial flash data in hold time" "1x,2x,4x,?..."
bitfld.long 0x00 8.--11. "                TCSH    ,Serial flash CS hold time in terms of serial flash clock cycles" "1 SCK,1 SCK,2 SCK,3 SCK,4 SCK,5 SCK,6 SCK,7 SCK,8 SCK,9 SCK,10 SCK,11 SCK,12 SCK,13 SCK,14 SCK,15 SCK"
bitfld.long 0x00 0.--3. "            TCSS    ,Serial flash CS setup time in terms of serial flash clock cycles" "0.5 SCK,0.5 SCK,2.5 SCK,3.5 SCK,4.5 SCK,5.5 SCK,6.5 SCK,7.5 SCK,8.5 SCK,9.5 SCK,10.5 SCK,11.5 SCK,12.5 SCK,13.5 SCK,14.5 SCK,15.5 SCK"
else
rgroup.long 0x0C++0x03
line.long 0x00 "FLSHCR,Flash Configuration Register"
bitfld.long 0x00 16.--17. " TDH     ,Serial flash data in hold time" "1x,2x,4x,?..."
bitfld.long 0x00 8.--11. "                TCSH    ,Serial flash CS hold time in terms of serial flash clock cycles" "1 SCK,1 SCK,2 SCK,3 SCK,4 SCK,5 SCK,6 SCK,7 SCK,8 SCK,9 SCK,10 SCK,11 SCK,12 SCK,13 SCK,14 SCK,15 SCK"
bitfld.long 0x00 0.--3. "            TCSS    ,Serial flash CS setup time in terms of serial flash clock cycles" "0.5 SCK,0.5 SCK,2.5 SCK,3.5 SCK,4.5 SCK,5.5 SCK,6.5 SCK,7.5 SCK,8.5 SCK,9.5 SCK,10.5 SCK,11.5 SCK,12.5 SCK,13.5 SCK,14.5 SCK,15.5 SCK"
endif
if (((per.l(ad:0x20C0000+0x15C))&0x04)==0x00)
group.long 0x10++0x13
line.long 0x00 "BUF0CR,Buffer 0 Configuration Register"
bitfld.long 0x00 31. " HP_EN   ,High priority enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "          ADATSZ  ,AHB data transfer size"
bitfld.long 0x00 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "BUF1CR,Buffer 1 Configuration Register"
hexmask.long.byte 0x04 8.--15. 1. " ADATSZ  ,AHB data transfer size"
bitfld.long 0x04 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "BUF2CR,Buffer 2 Configuration Register"
hexmask.long.byte 0x08 8.--15. 1. " ADATSZ  ,AHB data transfer size"
bitfld.long 0x08 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "BUF3CR,Buffer 3 Configuration Register"
bitfld.long 0x0C 31. " ALLMST  ,All master enable" "Disabled,Enabled"
hexmask.long.byte 0x0C 8.--15. 1. "          ADATSZ  ,AHB data transfer size"
bitfld.long 0x0C 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "BFGENCR,Buffer Generic Configuration Register"
bitfld.long 0x10 16. " PAR_EN  ,When set a transaction to two serial flash devices is triggered in parallel mode" "Disabled,Enabled"
bitfld.long 0x10 12.--15. "          SEQID   ,Points to a sequence in the look-up-table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.long 0x30++0x0B
line.long 0x00 "BUF0IND,Buffer 0 Top Index Register"
hexmask.long 0x00 3.--31. 1. " TPINDX0 ,Top index of buffer 0"
line.long 0x04 "BUF1IND,Buffer 1 Top Index Register"
hexmask.long 0x04 3.--31. 1. " TPINDX1 ,Top index of buffer 1"
line.long 0x08 "BUF2IND,Buffer 2 Top Index Register"
hexmask.long 0x08 3.--31. 1. " TPINDX2 ,Top index of buffer 2"
else
rgroup.long 0x10++0x13
line.long 0x00 "BUF0CR,Buffer 0 Configuration Register"
bitfld.long 0x00 31. " HP_EN   ,High priority enable" "Disabled,Enabled"
hexmask.long.byte 0x00 8.--15. 1. "          ADATSZ  ,AHB data transfer size"
bitfld.long 0x00 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "BUF1CR,Buffer 1 Configuration Register"
hexmask.long.byte 0x04 8.--15. 1. " ADATSZ  ,AHB data transfer size"
bitfld.long 0x04 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "BUF2CR,Buffer 2 Configuration Register"
hexmask.long.byte 0x08 8.--15. 1. " ADATSZ  ,AHB data transfer size"
bitfld.long 0x08 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "BUF3CR,Buffer 3 Configuration Register"
bitfld.long 0x0C 31. " ALLMST  ,All master enable" "Disabled,Enabled"
hexmask.long.byte 0x0C 8.--15. 1. "          ADATSZ  ,AHB data transfer size"
bitfld.long 0x0C 0.--3. "                MSTRID  ,Master ID" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "BFGENCR,Buffer Generic Configuration Register"
bitfld.long 0x10 16. " PAR_EN  ,When set a transaction to two serial flash devices is triggered in parallel mode" "Disabled,Enabled"
bitfld.long 0x10 12.--15. "          SEQID   ,Points to a sequence in the look-up-table" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0x30++0x0B
line.long 0x00 "BUF0IND,Buffer 0 Top Index Register"
hexmask.long 0x00 3.--31. 1. " TPINDX0 ,Top index of buffer 0"
line.long 0x04 "BUF1IND,Buffer 1 Top Index Register"
hexmask.long 0x04 3.--31. 1. " TPINDX1 ,Top index of buffer 1"
line.long 0x08 "BUF2IND,Buffer 2 Top Index Register"
hexmask.long 0x08 3.--31. 1. " TPINDX2 ,Top index of buffer 2"
endif
group.long 0x24++0x03
line.long 0x00 "SOCCR,SOC Configuration Register"
hexmask.long.byte 0x00 16.--23. 1. " DQS_FB  ,Fine delay chain DQS FB"
hexmask.long.byte 0x00 0.--7. 1. "                DQS_FA  ,Fine delay chain DQS FA"
if (((per.l(ad:0x20C0000+0x15C))&0x02)==0x00)
group.long 0x100++0x03
line.long 0x00 "SFAR,Serial Flash Address Register"
else
rgroup.long 0x100++0x03
line.long 0x00 "SFAR,Serial Flash Address Register"
endif
if (((per.l(ad:0x20C0000+0x00))&0x4000)==0x4000)
group.long 0x108++0x03
line.long 0x00 "SMPR,Sampling Register"
bitfld.long 0x00 16.--18. " DDRSMP  ,DDR sampling point" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 6. " FSDLY   ,Full speed delay selection for SDR instructions" "1 clk cycle,2 clk cycles"
bitfld.long 0x00 5. "      FSPHS   ,Full speed phase selection for SDR instructions" "Non-inverted clk,Inverted clk"
bitfld.long 0x00 2. "  HSDLY   ,Half speed delay selection for SDR instructions" "1 clk cycle,2 clk cycles"
newline
bitfld.long 0x00 1. " HSPHS   ,Half speed phase selection for SDR instructions" "Non-inverted clk,Inverted clk"
bitfld.long 0x00 0. "  HSENA   ,Half speed serial flash clock enable" "Disabled,Enabled"
else
rgroup.long 0x108++0x03
line.long 0x00 "SMPR,Sampling Register"
bitfld.long 0x00 16.--18. " DDRSMP  ,DDR sampling point" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 6. " FSDLY   ,Full speed delay selection for SDR instructions" "1 clk cycle,2 clk cycles"
bitfld.long 0x00 5. "      FSPHS   ,Full speed phase selection for SDR instructions" "Non-inverted clk,Inverted clk"
bitfld.long 0x00 2. "  HSDLY   ,Half speed delay selection for SDR instructions" "1 clk cycle,2 clk cycles"
newline
bitfld.long 0x00 1. " HSPHS   ,Half speed phase selection for SDR instructions" "Non-inverted clk,Inverted clk"
bitfld.long 0x00 0. "  HSENA   ,Half speed serial flash clock enable" "Disabled,Enabled"
endif
rgroup.long 0x10C++0x03
line.long 0x00 "RBSR,RX Buffer Status Register"
hexmask.long.word 0x00 16.--31. 1. " RDCTR   ,Read counter"
bitfld.long 0x00 8.--12. "              RDBFL   ,RX buffer fill level" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes,32 bytes,36 bytes,40 bytes,44 bytes,48 bytes,52 bytes,56 bytes,60 bytes,64 bytes,68 bytes,72 bytes,76 bytes,80 bytes,84 bytes,88 bytes,92 bytes,96 bytes,100 bytes,104 bytes,108 bytes,112 bytes,116 bytes,120 bytes,124 bytes"
if (((per.l(ad:0x20C0000+0x15C))&0x02)==0x00)
group.long 0x110++0x03
line.long 0x00 "RBCT,RX Buffer Control Register"
bitfld.long 0x00 8. " RXBRD   ,RX buffer readout" "AHB bus,IP bus"
bitfld.long 0x00 0.--4. "           WMRK    ,RX buffer watermark" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes,32 bytes,36 bytes,40 bytes,44 bytes,48 bytes,52 bytes,56 bytes,60 bytes,64 bytes,68 bytes,72 bytes,76 bytes,80 bytes,84 bytes,88 bytes,92 bytes,96 bytes,100 bytes,104 bytes,108 bytes,112 bytes,116 bytes,120 bytes,124 bytes"
else
rgroup.long 0x110++0x03
line.long 0x00 "RBCT,RX Buffer Control Register"
bitfld.long 0x00 8. " RXBRD   ,RX buffer readout" "AHB bus,IP bus"
bitfld.long 0x00 0.--4. "           WMRK    ,RX buffer watermark" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes,32 bytes,36 bytes,40 bytes,44 bytes,48 bytes,52 bytes,56 bytes,60 bytes,64 bytes,68 bytes,72 bytes,76 bytes,80 bytes,84 bytes,88 bytes,92 bytes,96 bytes,100 bytes,104 bytes,108 bytes,112 bytes,116 bytes,120 bytes,124 bytes"
endif
rgroup.long 0x150++0x03
line.long 0x00 "TBSR,TX Buffer Status Register"
hexmask.long.word 0x00 16.--31. 1. " TRCTR   ,Transmit counter"
bitfld.long 0x00 8.--13. "              TRBFL   ,TX buffer fill level" "0 bytes,4 bytes,8 bytes,12 bytes,16 bytes,20 bytes,24 bytes,28 bytes,32 bytes,36 bytes,40 bytes,44 bytes,48 bytes,52 bytes,56 bytes,60 bytes,64 bytes,68 bytes,72 bytes,76 bytes,80 bytes,84 bytes,88 bytes,92 bytes,96 bytes,100 bytes,104 bytes,108 bytes,112 bytes,116 bytes,120 bytes,124 bytes,128 bytes,132 bytes,136 bytes,140 bytes,144 bytes,148 bytes,152 bytes,156 bytes,160 bytes,164 bytes,168 bytes,172 bytes,176 bytes,180 bytes,184 bytes,188 bytes,192 bytes,196 bytes,200 bytes,204 bytes,208 bytes,212 bytes,216 bytes,220 bytes,224 bytes,228 bytes,232 bytes,236 bytes,240 bytes,244 bytes,248 bytes,252 bytes"
if (((per.l(ad:0x20C0000+0x15C))&0x8000000)==0x00)
group.long 0x144++0x03
line.long 0x00 "TBDR,TX Buffer Data Register"
else
rgroup.long 0x144++0x03
line.long 0x00 "TBDR,TX Buffer Data Register"
endif
rgroup.long 0x15C++0x03
line.long 0x00 "SR,Status Register"
bitfld.long 0x00 29.--31. " DLPSMP  ,Data learning pattern sampling point." "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 27. " TXFULL  ,TX buffer full" "Not full,Full"
bitfld.long 0x00 24. "          TXEDA   ,TX buffer enough data available" "Not available,Available"
bitfld.long 0x00 23. "     RXDMA   ,RX buffer DMA" "Not active,Active"
bitfld.long 0x00 19. "     RXFULL ,RX buffer full" "Not full,Full"
newline
bitfld.long 0x00 16. " RXWE    ,RX buffer watermark exceeded" "Not exceeded,Exceeded"
bitfld.long 0x00 14. "      AHB3FUL ,AHB 3 buffer full" "Not full,Full"
bitfld.long 0x00 13. "          AHB2FUL ,AHB 2 buffer full" "Not full,Full"
newline
bitfld.long 0x00 12. " AHB1FUL ,AHB 1 buffer full" "Not full,Full"
bitfld.long 0x00 11. "          AHB0FUL ,AHB 0 buffer full" "Not full,Full"
bitfld.long 0x00 10. "          AHB3NE  ,AHB 3 buffer not empty" "Empty,Not empty"
newline
bitfld.long 0x00 9. " AHB2NE  ,AHB 2 buffer not empty" "Empty,Not empty"
bitfld.long 0x00 8. "         AHB1NE  ,AHB 1 buffer not empty" "Empty,Not empty"
bitfld.long 0x00 7. "         AHB0NE  ,AHB 0 buffer not empty" "Empty,Not empty"
newline
bitfld.long 0x00 6. " AHBTRN  ,AHB access transaction pending" "Not pending,Pending"
bitfld.long 0x00 5. "       AHBGNT  ,AHB command priority granted" "Not granted,Granted"
bitfld.long 0x00 2. "       AHB_ACC ,AHB access" "Not initiated,Initiated"
newline
bitfld.long 0x00 1. " IP_ACC  ,IP access" "Not initiated,Initiated"
bitfld.long 0x00 0. "     BUSY    ,Module busy" "Idle,Busy"
if (((per.l(ad:0x20C0000+0x00))&0x4000)==0x00)
group.long 0x160++0x03
line.long 0x00 "FR,Flag Register"
eventfld.long 0x00 31. " DLPFF   ,Data learning pattern failure flag" "Not occurred,Occurred"
newline
eventfld.long 0x00 27. " TBFF    ,TX buffer fill flag" "Full,Not full"
eventfld.long 0x00 26. "          TBUF    ,TX buffer underrun flag" "Not empty,Empty"
eventfld.long 0x00 23. "         ILLINE  ,Illegal instruction error flag" "No error,Error"
newline
eventfld.long 0x00 17. " RBOF    ,RX buffer overflow flag" "No overflow,Overflow"
eventfld.long 0x00 16. "       RBDF    ,RX buffer drain flag" "Below/equal WRMK,Above WRMK"
eventfld.long 0x00 15. "  ABSEF   ,AHB sequence error flag" "No error,Error"
newline
eventfld.long 0x00 12. " ABOF    ,AHB buffer overflow flag" "No overflow,Overflow"
eventfld.long 0x00 11. "       IUEF    ,IP command usage error flag" "No error,Error"
eventfld.long 0x00 7. "          IPAEF   ,IP command trigger during AHB access error flag" "Not occurred,Occurred"
newline
eventfld.long 0x00 6. " IPIEF   ,IP command trigger could not be executed error flag" "No error,Error"
eventfld.long 0x00 4. "          IPGEF   ,IP command trigger during AHB grant error flag" "Not occurred,Occurred"
eventfld.long 0x00 0. "      TFF     ,IP command transaction finished flag" "Not finished,Finished"
else
rgroup.long 0x160++0x03
line.long 0x00 "FR,Flag Register"
bitfld.long 0x00 31. " DLPFF   ,Data learning pattern failure flag" "Not occurred,Occurred"
bitfld.long 0x00 27. "      TBFF    ,TX buffer fill flag" "Full,Not full"
bitfld.long 0x00 26. "          TBUF    ,TX buffer underrun flag" "Not empty,Empty"
bitfld.long 0x00 23. "      ILLINE ,Illegal instruction error flag" "No error,Error"
newline
bitfld.long 0x00 17. " RBOF    ,RX buffer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 16. "       RBDF    ,RX buffer drain flag" "Below/equal WRMK,Above WRMK"
bitfld.long 0x00 15. "  ABSEF   ,AHB sequence error flag" "No error,Error"
newline
bitfld.long 0x00 12. " ABOF    ,AHB buffer overflow flag" "No overflow,Overflow"
bitfld.long 0x00 11. "       IUEF    ,IP command usage error flag" "No error,Error"
bitfld.long 0x00 7. "          IPAEF   ,IP command trigger during AHB access error flag" "Not occurred,Occurred"
newline
bitfld.long 0x00 6. " IPIEF   ,IP command trigger could not be executed error flag" "No error,Error"
bitfld.long 0x00 4. "          IPGEF   ,IP command trigger during AHB grant error flag" "Not occurred,Occurred"
bitfld.long 0x00 0. "      TFF     ,IP command transaction finished flag" "Not finished,Finished"
endif
group.long 0x164++0x03
line.long 0x00 "RSER,Interrupt And DMA Request Select And Enable Register"
bitfld.long 0x00 31. " DLPFIE  ,Data learning pattern failure interrupt enable." "Disabled,Enabled"
newline
bitfld.long 0x00 27. " TBFIE   ,TX buffer fill interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 26. "          TBUIE   ,TX buffer underrun interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " TBFDE   ,TX buffer fill DMA enable." "Disabled,Enabled"
newline
bitfld.long 0x00 23. " ILLINIE ,Illegal instruction error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 21. "          RBDDE   ,RX buffer drain DMA enable:." "Disabled,Enabled"
newline
newline
bitfld.long 0x00 17. " RBOIE   ,RX buffer overflow interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " RBDIE   ,RX buffer drain interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 15. "          ABSEIE  ,AHB sequence error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 12. "          ABOIE   ,AHB buffer overflow interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 11. " IUEIE   ,IP command usage error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 7. "          IPAEIE  ,IP command trigger during AHB access error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 6. "          IPIEIE  ,IP command trigger during IP access error interrupt enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4. " IPGEIE  ,IP command trigger during AHB grant error interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "          TFIE    ,Transaction finished interrupt enable" "Disabled,Enabled"
if (((per.l(ad:0x20C0000+0x168))&0x01)==0x01)
rgroup.long 0x168++0x03
line.long 0x00 "SPNDST,Sequence Suspend Status Register"
hexmask.long.byte 0x00 9.--15. 1. " DATLFT  ,Data left"
bitfld.long 0x00 6.--7. "                SPDBUF  ,Suspended buffer" "0,1,2,3"
bitfld.long 0x00 0. "                 SUSPND  ,When set it signifies that a sequence is in suspended state" "Not suspended,Suspended"
else
rgroup.long 0x168++0x03
line.long 0x00 "SPNDST,Sequence Suspend Status Register"
bitfld.long 0x00 0. " SUSPND  ,When set it signifies that a sequence is in suspended state" "Not suspended,Suspended"
endif
wgroup.long 0x16C++0x03
line.long 0x00 "SPTRCLR,Sequence Pointer Clear Register"
bitfld.long 0x00 8. " IPPTRC  ,IP pointer clear" "No effect,Clear"
bitfld.long 0x00 0. "         BFPTRC  ,Buffer pointer clear" "No effect,Clear"
if (((per.l(ad:0x20C0000+0x15C))&0x06)==0x00)
group.long 0x180++0x0F
line.long 0x00 "SFA1AD,Serial Flash A1 Top Address"
hexmask.long.tbyte 0x00 10.--31. 0x04 " TPADA1  ,Top address for serial flash A1"
line.long 0x04 "SFA2AD,Serial Flash A2 Top Address"
hexmask.long.tbyte 0x04 10.--31. 0x04 " TPADA2  ,Top address for serial flash A2"
line.long 0x08 "SFB1AD,Serial Flash B1 Top Address"
hexmask.long.tbyte 0x08 10.--31. 0x04 " TPADB1  ,Top address for serial flash B1"
line.long 0x0C "SFB2AD,Serial Flash B2 Top Address"
hexmask.long.tbyte 0x0C 10.--31. 0x04 " TPADB2  ,Top address for serial flash B2"
else
rgroup.long 0x180++0x0F
line.long 0x00 "SFA1AD,Serial Flash A1 Top Address"
hexmask.long.tbyte 0x00 10.--31. 0x04 " TPADA1  ,Top address for serial flash A1"
line.long 0x04 "SFA2AD,Serial Flash A2 Top Address"
hexmask.long.tbyte 0x04 10.--31. 0x04 " TPADA2  ,Top address for serial flash A2"
line.long 0x08 "SFB1AD,Serial Flash B1 Top Address"
hexmask.long.tbyte 0x08 10.--31. 0x04 " TPADB1  ,Top address for serial flash B1"
line.long 0x0C "SFB2AD,Serial Flash B2 Top Address"
hexmask.long.tbyte 0x0C 10.--31. 0x04 " TPADB2  ,Top address for serial flash B2"
endif
newline
hgroup.long 0x200++0x03
hide.long 0x00 "RBDR0,RX Buffer Data Register 0"
in
hgroup.long 0x204++0x03
hide.long 0x00 "RBDR1,RX Buffer Data Register 1"
in
hgroup.long 0x208++0x03
hide.long 0x00 "RBDR2,RX Buffer Data Register 2"
in
hgroup.long 0x20C++0x03
hide.long 0x00 "RBDR3,RX Buffer Data Register 3"
in
hgroup.long 0x210++0x03
hide.long 0x00 "RBDR4,RX Buffer Data Register 4"
in
hgroup.long 0x214++0x03
hide.long 0x00 "RBDR5,RX Buffer Data Register 5"
in
hgroup.long 0x218++0x03
hide.long 0x00 "RBDR6,RX Buffer Data Register 6"
in
hgroup.long 0x21C++0x03
hide.long 0x00 "RBDR7,RX Buffer Data Register 7"
in
hgroup.long 0x220++0x03
hide.long 0x00 "RBDR8,RX Buffer Data Register 8"
in
hgroup.long 0x224++0x03
hide.long 0x00 "RBDR9,RX Buffer Data Register 9"
in
hgroup.long 0x228++0x03
hide.long 0x00 "RBDR10,RX Buffer Data Register 10"
in
hgroup.long 0x22C++0x03
hide.long 0x00 "RBDR11,RX Buffer Data Register 11"
in
hgroup.long 0x230++0x03
hide.long 0x00 "RBDR12,RX Buffer Data Register 12"
in
hgroup.long 0x234++0x03
hide.long 0x00 "RBDR13,RX Buffer Data Register 13"
in
hgroup.long 0x238++0x03
hide.long 0x00 "RBDR14,RX Buffer Data Register 14"
in
hgroup.long 0x23C++0x03
hide.long 0x00 "RBDR15,RX Buffer Data Register 15"
in
newline
group.long 0x300++0x07
line.long 0x00 "LUTKEY,LUT Key Register"
line.long 0x04 "LCKCR,LUT Lock Configuration Register"
bitfld.long 0x04 1. " UNLOCK  ,Unlocks the LUT" "No effect,Unlocked"
bitfld.long 0x04 0. "         LOCK    ,Locks the LUT" "No effect,Locked"
tree "Look-up Table Registers"
if (((per.l(ad:0x20C0000+0x304))&0x03)==0x02)
group.long 0x310++0x03
line.long 0x00 "LUT0,Look-up Table Register 0"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x314++0x03
line.long 0x00 "LUT1,Look-up Table Register 1"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x318++0x03
line.long 0x00 "LUT2,Look-up Table Register 2"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x31C++0x03
line.long 0x00 "LUT3,Look-up Table Register 3"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x320++0x03
line.long 0x00 "LUT4,Look-up Table Register 4"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x324++0x03
line.long 0x00 "LUT5,Look-up Table Register 5"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x328++0x03
line.long 0x00 "LUT6,Look-up Table Register 6"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x32C++0x03
line.long 0x00 "LUT7,Look-up Table Register 7"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x330++0x03
line.long 0x00 "LUT8,Look-up Table Register 8"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x334++0x03
line.long 0x00 "LUT9,Look-up Table Register 9"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x338++0x03
line.long 0x00 "LUT10,Look-up Table Register 10"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x33C++0x03
line.long 0x00 "LUT11,Look-up Table Register 11"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x340++0x03
line.long 0x00 "LUT12,Look-up Table Register 12"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x344++0x03
line.long 0x00 "LUT13,Look-up Table Register 13"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x348++0x03
line.long 0x00 "LUT14,Look-up Table Register 14"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x34C++0x03
line.long 0x00 "LUT15,Look-up Table Register 15"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x350++0x03
line.long 0x00 "LUT16,Look-up Table Register 16"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x354++0x03
line.long 0x00 "LUT17,Look-up Table Register 17"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x358++0x03
line.long 0x00 "LUT18,Look-up Table Register 18"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x35C++0x03
line.long 0x00 "LUT19,Look-up Table Register 19"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x360++0x03
line.long 0x00 "LUT20,Look-up Table Register 20"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x364++0x03
line.long 0x00 "LUT21,Look-up Table Register 21"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x368++0x03
line.long 0x00 "LUT22,Look-up Table Register 22"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x36C++0x03
line.long 0x00 "LUT23,Look-up Table Register 23"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x370++0x03
line.long 0x00 "LUT24,Look-up Table Register 24"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x374++0x03
line.long 0x00 "LUT25,Look-up Table Register 25"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x378++0x03
line.long 0x00 "LUT26,Look-up Table Register 26"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x37C++0x03
line.long 0x00 "LUT27,Look-up Table Register 27"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x380++0x03
line.long 0x00 "LUT28,Look-up Table Register 28"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x384++0x03
line.long 0x00 "LUT29,Look-up Table Register 29"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x388++0x03
line.long 0x00 "LUT30,Look-up Table Register 30"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x38C++0x03
line.long 0x00 "LUT31,Look-up Table Register 31"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x390++0x03
line.long 0x00 "LUT32,Look-up Table Register 32"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x394++0x03
line.long 0x00 "LUT33,Look-up Table Register 33"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x398++0x03
line.long 0x00 "LUT34,Look-up Table Register 34"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x39C++0x03
line.long 0x00 "LUT35,Look-up Table Register 35"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3A0++0x03
line.long 0x00 "LUT36,Look-up Table Register 36"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3A4++0x03
line.long 0x00 "LUT37,Look-up Table Register 37"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3A8++0x03
line.long 0x00 "LUT38,Look-up Table Register 38"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3AC++0x03
line.long 0x00 "LUT39,Look-up Table Register 39"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3B0++0x03
line.long 0x00 "LUT40,Look-up Table Register 40"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3B4++0x03
line.long 0x00 "LUT41,Look-up Table Register 41"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3B8++0x03
line.long 0x00 "LUT42,Look-up Table Register 42"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3BC++0x03
line.long 0x00 "LUT43,Look-up Table Register 43"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3C0++0x03
line.long 0x00 "LUT44,Look-up Table Register 44"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3C4++0x03
line.long 0x00 "LUT45,Look-up Table Register 45"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3C8++0x03
line.long 0x00 "LUT46,Look-up Table Register 46"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3CC++0x03
line.long 0x00 "LUT47,Look-up Table Register 47"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3D0++0x03
line.long 0x00 "LUT48,Look-up Table Register 48"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3D4++0x03
line.long 0x00 "LUT49,Look-up Table Register 49"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3D8++0x03
line.long 0x00 "LUT50,Look-up Table Register 50"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3DC++0x03
line.long 0x00 "LUT51,Look-up Table Register 51"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3E0++0x03
line.long 0x00 "LUT52,Look-up Table Register 52"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3E4++0x03
line.long 0x00 "LUT53,Look-up Table Register 53"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3E8++0x03
line.long 0x00 "LUT54,Look-up Table Register 54"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3EC++0x03
line.long 0x00 "LUT55,Look-up Table Register 55"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3F0++0x03
line.long 0x00 "LUT56,Look-up Table Register 56"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3F4++0x03
line.long 0x00 "LUT57,Look-up Table Register 57"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3F8++0x03
line.long 0x00 "LUT58,Look-up Table Register 58"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x3FC++0x03
line.long 0x00 "LUT59,Look-up Table Register 59"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x400++0x03
line.long 0x00 "LUT60,Look-up Table Register 60"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x404++0x03
line.long 0x00 "LUT61,Look-up Table Register 61"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x408++0x03
line.long 0x00 "LUT62,Look-up Table Register 62"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
group.long 0x40C++0x03
line.long 0x00 "LUT63,Look-up Table Register 63"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
else
rgroup.long 0x310++0x03
line.long 0x00 "LUT0,Look-up Table Register 0"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x314++0x03
line.long 0x00 "LUT1,Look-up Table Register 1"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x318++0x03
line.long 0x00 "LUT2,Look-up Table Register 2"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x31C++0x03
line.long 0x00 "LUT3,Look-up Table Register 3"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x320++0x03
line.long 0x00 "LUT4,Look-up Table Register 4"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x324++0x03
line.long 0x00 "LUT5,Look-up Table Register 5"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x328++0x03
line.long 0x00 "LUT6,Look-up Table Register 6"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x32C++0x03
line.long 0x00 "LUT7,Look-up Table Register 7"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x330++0x03
line.long 0x00 "LUT8,Look-up Table Register 8"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x334++0x03
line.long 0x00 "LUT9,Look-up Table Register 9"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x338++0x03
line.long 0x00 "LUT10,Look-up Table Register 10"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x33C++0x03
line.long 0x00 "LUT11,Look-up Table Register 11"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x340++0x03
line.long 0x00 "LUT12,Look-up Table Register 12"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x344++0x03
line.long 0x00 "LUT13,Look-up Table Register 13"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x348++0x03
line.long 0x00 "LUT14,Look-up Table Register 14"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x34C++0x03
line.long 0x00 "LUT15,Look-up Table Register 15"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x350++0x03
line.long 0x00 "LUT16,Look-up Table Register 16"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x354++0x03
line.long 0x00 "LUT17,Look-up Table Register 17"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x358++0x03
line.long 0x00 "LUT18,Look-up Table Register 18"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x35C++0x03
line.long 0x00 "LUT19,Look-up Table Register 19"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x360++0x03
line.long 0x00 "LUT20,Look-up Table Register 20"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x364++0x03
line.long 0x00 "LUT21,Look-up Table Register 21"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x368++0x03
line.long 0x00 "LUT22,Look-up Table Register 22"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x36C++0x03
line.long 0x00 "LUT23,Look-up Table Register 23"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x370++0x03
line.long 0x00 "LUT24,Look-up Table Register 24"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x374++0x03
line.long 0x00 "LUT25,Look-up Table Register 25"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x378++0x03
line.long 0x00 "LUT26,Look-up Table Register 26"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x37C++0x03
line.long 0x00 "LUT27,Look-up Table Register 27"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x380++0x03
line.long 0x00 "LUT28,Look-up Table Register 28"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x384++0x03
line.long 0x00 "LUT29,Look-up Table Register 29"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x388++0x03
line.long 0x00 "LUT30,Look-up Table Register 30"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x38C++0x03
line.long 0x00 "LUT31,Look-up Table Register 31"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x390++0x03
line.long 0x00 "LUT32,Look-up Table Register 32"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x394++0x03
line.long 0x00 "LUT33,Look-up Table Register 33"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x398++0x03
line.long 0x00 "LUT34,Look-up Table Register 34"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x39C++0x03
line.long 0x00 "LUT35,Look-up Table Register 35"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3A0++0x03
line.long 0x00 "LUT36,Look-up Table Register 36"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3A4++0x03
line.long 0x00 "LUT37,Look-up Table Register 37"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3A8++0x03
line.long 0x00 "LUT38,Look-up Table Register 38"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3AC++0x03
line.long 0x00 "LUT39,Look-up Table Register 39"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3B0++0x03
line.long 0x00 "LUT40,Look-up Table Register 40"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3B4++0x03
line.long 0x00 "LUT41,Look-up Table Register 41"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3B8++0x03
line.long 0x00 "LUT42,Look-up Table Register 42"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3BC++0x03
line.long 0x00 "LUT43,Look-up Table Register 43"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3C0++0x03
line.long 0x00 "LUT44,Look-up Table Register 44"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3C4++0x03
line.long 0x00 "LUT45,Look-up Table Register 45"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3C8++0x03
line.long 0x00 "LUT46,Look-up Table Register 46"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3CC++0x03
line.long 0x00 "LUT47,Look-up Table Register 47"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3D0++0x03
line.long 0x00 "LUT48,Look-up Table Register 48"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3D4++0x03
line.long 0x00 "LUT49,Look-up Table Register 49"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3D8++0x03
line.long 0x00 "LUT50,Look-up Table Register 50"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3DC++0x03
line.long 0x00 "LUT51,Look-up Table Register 51"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3E0++0x03
line.long 0x00 "LUT52,Look-up Table Register 52"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3E4++0x03
line.long 0x00 "LUT53,Look-up Table Register 53"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3E8++0x03
line.long 0x00 "LUT54,Look-up Table Register 54"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3EC++0x03
line.long 0x00 "LUT55,Look-up Table Register 55"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3F0++0x03
line.long 0x00 "LUT56,Look-up Table Register 56"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3F4++0x03
line.long 0x00 "LUT57,Look-up Table Register 57"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3F8++0x03
line.long 0x00 "LUT58,Look-up Table Register 58"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x3FC++0x03
line.long 0x00 "LUT59,Look-up Table Register 59"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x400++0x03
line.long 0x00 "LUT60,Look-up Table Register 60"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x404++0x03
line.long 0x00 "LUT61,Look-up Table Register 61"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x408++0x03
line.long 0x00 "LUT62,Look-up Table Register 62"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
rgroup.long 0x40C++0x03
line.long 0x00 "LUT63,Look-up Table Register 63"
bitfld.long 0x00 26.--31. " INSTR1  ,Instruction 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 24.--25. "                PAD1    ,Pad information for INSTR 1" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 16.--23. 1. "            OPRND1  ,Operand for INSTR1"
newline
bitfld.long 0x00 10.--15. " INSTR0  ,Instruction 0" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 8.--9. "                PAD0    ,Pad information for INSTR0" "1 pad,2 pads,4 pads,?..."
hexmask.long.byte 0x00 0.--7. 1. "            OPRND0  ,Operand for INSTR0"
endif
tree.end
; tree "AHB RX Data Buffer"
; %for (32)(0x00,0x04)(0,1)
; hgroup.long $1++0x03
; hide.long 0x00 "ARDB$2,AHB RX Data Buffer Register $2"
; in
; %endfor
; tree.end
width 0x0B
tree.end
tree.open "SATA 3.0 (Serial ATA 3.0)"
tree "SATA 1"
base ad:0x03200000
width 9.
rgroup.long 0x00++0x03
line.long 0x00 "CAP,HBA Capabilities Register"
bitfld.long 0x00 31. " S64A     ,Supports 64-bit addressing" "Not supported,Supported"
bitfld.long 0x00 30. "                   SNCQ  ,Supports native command queuing" "Not supported,Supported"
bitfld.long 0x00 29. "             SSNTF  ,Supports notification register" "Not supported,Supported"
newline
bitfld.long 0x00 28. " SMPS     ,Supports mechanical presence switch" "Not supported,Supported"
bitfld.long 0x00 27. "                   SSS   ,Supports staggered spin-up" "Not supported,Supported"
bitfld.long 0x00 26. "             SALP   ,Supports aggressive link power management" "Not supported,Supported"
newline
bitfld.long 0x00 25. " SAL      ,Supports activity LED" "Not supported,Supported"
bitfld.long 0x00 24. "                   SCLO  ,Supports command list override" "Not supported,Supported"
bitfld.long 0x00 20.--23. "             ISS    ,Interface speed support" ",Gen 1,Gen 2,Gen 3,?..."
newline
bitfld.long 0x00 18. " SAM      ,Supports AHCI mode only" "Not supported,Supported"
bitfld.long 0x00 17. "                   SPM   ,Supports port multiplier" "Not supported,Supported"
bitfld.long 0x00 16. "             FBSS   ,FIS-based switching supported" "Not supported,Supported"
newline
bitfld.long 0x00 15. " PMD      ,PIO multiple DRQ block" "Not supported,Supported"
bitfld.long 0x00 14. "                   SSC   ,Slumber state capable" "Not supported,Supported"
bitfld.long 0x00 13. "             PSC    ,Partial state capable" "Not supported,Supported"
newline
bitfld.long 0x00 8.--12. " NCS      ,Number of command slots" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
bitfld.long 0x00 7. "                              CCCS  ,Command completion coalescing supported" "Not supported,Supported"
bitfld.long 0x00 6. "             EMS    ,Enclosure management supported" "Not supported,Supported"
newline
bitfld.long 0x00 5. " SXS      ,Supports external SATA" "Not supported,Supported"
bitfld.long 0x00 0.--4. "                   NP    ,Number of ports" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
if (((per.l(ad:0x03200000+0x00))&0x40000)==0x00)
group.long 0x04++0x03
line.long 0x00 "GHC,Global HBA Control Register"
bitfld.long 0x00 31. " AE       ,AHCI enable" "Disabled,Enabled"
rbitfld.long 0x00 2. "                        MRSM  ,MSI revert to single message" "Not reverted,Reverted"
newline
bitfld.long 0x00 1. " IE       ,Interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                        HR    ,HBA reset" "No reset,Reset"
else
group.long 0x04++0x03
line.long 0x00 "GHC,Global HBA Control Register"
rbitfld.long 0x00 31. " AE       ,AHCI enable" "Disabled,Enabled"
rbitfld.long 0x00 2. "                        MRSM  ,MSI revert to single message" "Not reverted,Reverted"
newline
bitfld.long 0x00 1. " IE       ,Interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                        HR    ,HBA reset" "No reset,Reset"
endif
rgroup.long 0x10++0x03
line.long 0x00 "VS,AHCI Version Register"
hexmask.long.word 0x00 16.--31. 1. " MJR      ,Major version number"
hexmask.long.word 0x00 0.--15. 1. "                            MNR   ,Minor version number"
group.long 0x14++0x03
line.long 0x00 "CCC_CTL,Command Completion Coalescing Control Register"
hexmask.long.word 0x00 16.--31. 1. " TV       ,Timeout value"
hexmask.long.byte 0x00 8.--15. 1. "                            CC    ,Command completions"
newline
rbitfld.long 0x00 3.--7. " INT      ,Specifies the interrupt used by the CCC feature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                              EN    ,Command completion coalescing feature enable" "Disabled,Enabled"
rgroup.long 0x24++0x03
line.long 0x00 "CAP2,HBA Capabilities Extended Register"
bitfld.long 0x00 2. " APST     ,Automatic partial to slumber transitions support" "Not supported,Supported"
bitfld.long 0x00 1. "                   NVMP  ,NVMHCI support" "Not supported,Supported"
bitfld.long 0x00 0. "             BOH    ,BIOS/OS handoff support" "Not supported,Supported"
group.long 0xA4++0x23
line.long 0x00 "PCFG,Port Config Register"
hexmask.long.byte 0x00 16.--22. 1. " TPSS     ,Millisecond timer post scaler"
bitfld.long 0x00 12.--14. "                              TPRS  ,Millisecond timer per scaler" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--5. "                         PAD    ,Port address" ",,Addr cfg/status set,?..."
line.long 0x04 "PPCFG,Port Phy1Cfg Register"
bitfld.long 0x04 31. " ESDF     ,Enable signal det filter" "Disabled,Enabled"
bitfld.long 0x04 30. "                        ERSN  ,Enable reset speed negotiation" "Disabled,Enabled"
bitfld.long 0x04 29. "                  PSS    ,PhyControl select SerDes slumber CMU during link slumber" "No slumber,Slumber"
bitfld.long 0x04 28. "                    PSSO    ,PhyControl select SerDes OOB or internally decoded OOB signaling as inputs" "SERDES,Internal"
newline
rbitfld.long 0x04 27. " STB      ,Gen fixed clocks parameter status" "Fixed freq clock,Variable clock"
bitfld.long 0x04 26. "                PBPNA ,PhyControl BIST pattern no aligns" "Not continuously,Continuously"
bitfld.long 0x04 25. "          PBCE   ,PhyControl BIST clear error" "Not cleared,Cleared"
bitfld.long 0x04 24. "                   PBPE    ,PhyControl BIST pattern enable" "Disabled,Enabled"
newline
bitfld.long 0x04 21.--23. " PBPS     ,PhyControl BIST pattern select" "LBP,LFTP,MFTP,HFTP,PRBS,BIST,?..."
bitfld.long 0x04 20. "                            FPR   ,Force PHY ready" "Not forced,Forced"
bitfld.long 0x04 18. "                SNR    ,Speed negotiation rate" "Normal,SPD"
bitfld.long 0x04 17. "                        SNM     ,Speed negotiation method" "Fastest speed down to Gen1,Gen1 up to fastest speed"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " TTA      ,This value determines the time period the controller transmits and waits for ALIGNp during speed negotiation"
line.long 0x08 "PP2C,Port Phy2Cfg Register"
hexmask.long.byte 0x08 24.--31. 1. " CINMP    ,COMINIT negate minimum period"
hexmask.long.byte 0x08 16.--23. 1. "                              CIBGN ,COMINIT burst gap nominal"
hexmask.long.byte 0x08 8.--15. 1. "                        CIBGMX ,COMINIT burst gap maximum"
hexmask.long.byte 0x08 0.--7. 1. "                            CIBGMN  ,COMINIT burst gap minimum"
line.long 0x0C "PP3C,Port Phy3Cfg Register"
hexmask.long.byte 0x0C 24.--31. 1. " CWNMP    ,COMWAKE negate minimum period"
hexmask.long.byte 0x0C 16.--23. 1. "                              CWBGN ,COMWAKE burst gap nominal"
hexmask.long.byte 0x0C 8.--15. 1. "                        CWBGMX ,COMWAKE burst gap maximum"
hexmask.long.byte 0x0C 0.--7. 1. "                            CWBGMN  ,COMWAKE burst gap minimum"
line.long 0x10 "PP4C,Port Phy4Cfg Register"
hexmask.long.byte 0x10 24.--31. 1. " PTST     ,Partial to slumber timer value"
hexmask.long.byte 0x10 16.--23. 1. "                              SFD   ,Signal failure detection"
hexmask.long.byte 0x10 8.--15. 1. "                        BNM    ,COM burst nominal"
hexmask.long.byte 0x10 0.--7. 1. "                            BMX     ,COM burst maximum"
line.long 0x14 "PP5C,Port Phy5Cfg Register"
hexmask.long.word 0x14 20.--31. 1. " RCT      ,Rate change timer"
hexmask.long.tbyte 0x14 0.--19. 1. "                            RIT   ,Retry interval timer"
line.long 0x18 "AXICC,AXI Cache Control Register"
bitfld.long 0x18 29. " EARC     ,Enable the ARCACHE" "Disabled,Enabled"
bitfld.long 0x18 28. "                        EAWC  ,Enable the AWCACHE" "Disabled,Enabled"
bitfld.long 0x18 24.--27. "                  AWCF   ,Address write cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 20.--23. "                            AWCD    ,Address write cache data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x18 16.--19. " AWCFD    ,Address write cache final data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 12.--15. "                              ARCP  ,Address read cache PRD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 8.--11. "                        ARCH   ,Address read cache header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 4.--7. "                            ARCF    ,Address read cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x18 0.--3. " ARCA     ,Address read cache ATAPI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "PAXIC,Port AXICfg Register"
bitfld.long 0x1C 28. " ENPE     ,Enable non zero 4MB PRD entries" "Disabled,Enabled"
bitfld.long 0x1C 25. "                        AAO   ,Allow address overwrite" "Not allowed,Allowed"
bitfld.long 0x1C 24. "               ECM    ,Enable the context management" "Disabled,Enabled"
bitfld.long 0x1C 20.--23. "                      OTL     ,Outstanding transfer limit" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
bitfld.long 0x1C 16.--19. " MARIDD   ,Memory address read ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 12.--15. "                              MARID ,Memory address read ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 8.--11. "                        MAWIDD ,Memory address write ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 4.--7. "                            MAWID   ,Memory address write ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "AXIPC,AXI Protection Control Register"
bitfld.long 0x20 29. " EARP     ,Enables the ARPROT" "Disabled,Enabled"
bitfld.long 0x20 28. "                        EAWP  ,Enables the AWPROT" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "                  AWPF   ,Address write prot data" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x20 20.--22. " AWPD     ,Address write prot data" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 16.--18. "                               AWPFD ,Address write prot final data" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 12.--14. "                         ARPP   ,Address read prot PRD" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x20 8.--10. " ARPH     ,Address read prot header" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 4.--6. "                               ARPF  ,Address read prot FIS" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                         ARPD   ,Address read prot data" "0,1,2,3,4,5,6,7"
group.long 0xC8++0x03
line.long 0x00 "PTC,Port TransCfg Register"
bitfld.long 0x00 9. " ITM      ,Initialize transport memories" "Not initialized,Initialized"
bitfld.long 0x00 8. "                 ENBD  ,Enable back down" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                  RXWM   ,RXWaterMark"
group.long 0xD0++0x0B
line.long 0x00 "PLC,Port LinkCfg Register"
bitfld.long 0x00 27.--31. " PMPRA    ,Power management primitive rate acknowledge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 26. "                              POE   ,Primitive override enable" "Disabled,Enabled"
hexmask.long.word 0x00 16.--25. 1. "                  PRT    ,PHY ready timer"
hexmask.long.byte 0x00 8.--15. 1. "                          AIR     ,ALIGN insertion rate"
newline
bitfld.long 0x00 7. " EPNRT    ,Enable PHY not ready timer" "Disabled,Enabled"
bitfld.long 0x00 6. "                        S4A   ,Send 4 aligns" "Not sent,Sent"
bitfld.long 0x00 5. "                  RXSE   ,RX scramble enable" "Disabled,Enabled"
bitfld.long 0x00 4. "                      TXSE    ,TX scramble enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " TXPJ     ,TX prim junk" "Scrambled,Single"
bitfld.long 0x00 2. "                       TXC   ,TX CONT" "Disabled,Enabled"
bitfld.long 0x00 1. "                  RXBC   ,RX bad CRC" "Disabled,Enabled"
bitfld.long 0x00 0. "                      TXBC    ,TX bad CRC" "Disabled,Enabled"
line.long 0x04 "PLC1,Port LinkCfg1 Register"
bitfld.long 0x04 6. " CD       ,Data character or primitive" "Character,Primitive"
bitfld.long 0x04 0.--5. "                       POS   ,Primitive override state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "PLC2,Port LinkCfg2 Register"
group.long 0xE0++0x0B
line.long 0x00 "PLS1,Port LinkStatus1 Register"
hexmask.long.byte 0x00 24.--31. 1. " KCEC     ,Kchar error count"
hexmask.long.byte 0x00 16.--23. 1. "                              PIEC  ,PHY internal error count"
hexmask.long.byte 0x00 8.--15. 1. "                        CEC    ,Code error count"
hexmask.long.byte 0x00 0.--7. 1. "                            DEC     ,Disparity error count"
line.long 0x04 "PCMDC,Port CmdConfig Register"
bitfld.long 0x04 29. " TSVIE    ,Trustzone slave ID violation interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 28. "                        TSVI  ,Trustzone slave ID violation interrupt" "No interrupt,Interrupt"
rhexmask.long.word 0x04 12.--27. 1. "              TSVT   ,Trustzone slave ID of violating transaction"
bitfld.long 0x04 1. "                          ETLL    ,Enable transport layer loopback" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " ETLLB    ,Enable transport layer loopback in the BIST L mode" "Disabled,Enabled"
line.long 0x08 "PPCS,Port PhyControl Status Register"
rbitfld.long 0x08 30.--31. " PHYCE    ,Current 2 bit code error" "00,01,10,11"
rbitfld.long 0x08 28.--29. "                              PHYDE ,Current 2 bit disparity error" "00,01,10,11"
rbitfld.long 0x08 27. "                        PHYKC  ,Current 1 bit K character" "0,1"
rhexmask.long.tbyte 0x08 11.--26. 1. "                             PHYD    ,Current 16 bit data"
newline
bitfld.long 0x08 10. " CCAC     ,Comma alignment has changed" "Not changed,Changed"
rbitfld.long 0x08 5.--9. "                     CCA   ,Current comma alignment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 0.--4. "                        PCTRLS ,Phy control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xF0++0x03
line.long 0x00 "TCR,Timer Control Register"
hexmask.long.word 0x00 0.--12. 1. " TPS      ,Timer prescalar value"
group.long 0x100++0x13
line.long 0x00 "PXCLB,Port X Command List Base Address Register"
hexmask.long.tbyte 0x00 10.--31. 0x04 " CLB      ,Command list base address register"
line.long 0x04 "PXCLBU,Port X Command List Base Address Upper 32-bits Register"
line.long 0x08 "PXFB,Port X FIS Base Address Register"
hexmask.long.tbyte 0x08 8.--31. 0x01 " FB       ,FIS base address"
line.long 0x0C "PXFBU,Port X FIS Base Address Upper 32-bits Register"
line.long 0x10 "PXIS,Port X Interrupt Status Register"
bitfld.long 0x10 31. " CPDS     ,Cold port detect status" "Not detected,Detected"
bitfld.long 0x10 30. "                    TFES  ,Task file error status" "No error,Error"
bitfld.long 0x10 29. "                  HBFS   ,Host bus fatal error status" "No error,Error"
newline
bitfld.long 0x10 28. " HBDS     ,Host bus data error status" "No error,Error"
bitfld.long 0x10 27. "                        IFS   ,Interface fatal error status" "No error,Error"
bitfld.long 0x10 26. "                  NTFS   ,Interface non-fatal error status" "No error,Error"
newline
bitfld.long 0x10 24. " OFS      ,Overflow status" "Not overflowed,Overflowed"
bitfld.long 0x10 23. "                  IPMS  ,Incorrect port multiplier status" "Correct,Incorrect"
rbitfld.long 0x10 22. "                 PRCS   ,PhyRdy change status" "Not changed,Changed"
newline
bitfld.long 0x10 7. " DMPS     ,Device mechanical presence status" "Not changed,Changed"
rbitfld.long 0x10 6. "                     PCS   ,Port connect change status" "Not changed,Changed"
bitfld.long 0x10 5. "               DPS    ,Descriptor processed" "Not processed,Processed"
newline
rbitfld.long 0x10 4. " UFS      ,Unknown FIS interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 3. "                    SDBS  ,Set device bits interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 2. "              DSS    ,DMA setup FIS interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x10 1. " PSS      ,PIO setup FIS interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 0. "                    DHRS  ,Device to host register FIS interrupt" "No interrupt,Interrupt"
if (((per.l(ad:0x03200000))&0x20000)==0x00)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x00)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
rbitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
textfld "                         "
bitfld.long 0x00 4. " FRE   ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
elif (((per.l(ad:0x03200000))&0x20000)==0x20000)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x00)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
bitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
textfld "                         "
bitfld.long 0x00 4. " FRE   ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
elif (((per.l(ad:0x03200000))&0x20000)==0x00)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x01)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
rbitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
rbitfld.long 0x00 8.--12. "                          CCS   ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "                        FRE    ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
else
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
bitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
rbitfld.long 0x00 8.--12. "                          CCS   ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "                        FRE    ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
endif
rgroup.long 0x128++0x03
line.long 0x00 "PXSSTS,Port X SATA Status Register"
bitfld.long 0x00 8.--11. " IPM      ,Interface power management" "Device not present,Active,Partial power management,,,,Slumber power management,?..."
bitfld.long 0x00 4.--7. "        SPD   ,Current interface speed" "Device not present,Gen 1,Gen 2,Gen 3,?..."
bitfld.long 0x00 0.--3. "        DET    ,Device detection" "Not detected/Not established,Detected/Not established,,Detected/established,Offline mode,?..."
group.long 0x12C++0x07
line.long 0x00 "PXSCTL,Port X SATA Control Register"
bitfld.long 0x00 8.--11. " IPM      ,Indicates which power states the HBA is not allowed to transition to" "No restrictions,Partial state disabled,Slumber state disabled,Partial/Slumber state disabled,?..."
bitfld.long 0x00 4.--7. "  SPD   ,Indicates the highest allowable speed of the interface" "No restrictions,Generation 1 comm rate,<=Generation 2 comm rate,<=Generation 3 comm rate,?..."
bitfld.long 0x00 0.--3. "  DET    ,Device detection initialization" "Not detected/initialized,Perform interface comm init,,,Disable SATA,?..."
line.long 0x04 "PXSERR,Port X SATA Error Register"
bitfld.long 0x04 26. " DIAG[10] ,Determines that the device presence has changed is vendor specific" "Not changed,Changed"
bitfld.long 0x04 25. "                     [9]   ,Unknown FIS type" "Not received,Received"
bitfld.long 0x04 24. "              [8]    ,Transport state transition error" "No error,Error"
bitfld.long 0x04 23. "                      [7]     ,Link sequence error" "No error,Error"
newline
bitfld.long 0x04 22. " [6]      ,Handshake error" "No error,Error"
bitfld.long 0x04 21. "                        [5]   ,CRC error" "No error,Error"
bitfld.long 0x04 20. "                  [4]    ,Disparity error" "No error,Error"
bitfld.long 0x04 19. "                      [3]     ,10B to 8B decode error" "No error,Error"
newline
bitfld.long 0x04 18. " [2]      ,Comm wake" "Not waked,Waked"
bitfld.long 0x04 17. "                       [1]   ,PHY internal error" "No error,Error"
bitfld.long 0x04 16. "                  [0]    ,PhyRdy change" "Not changed,Changed"
bitfld.long 0x04 11. "                   ERR[11] ,Internal error" "No error,Error"
newline
bitfld.long 0x04 10. " [10]     ,Protocol error" "No error,Error"
bitfld.long 0x04 9. "                        [9]   ,Persistent communication or data integrity error" "No error,Error"
bitfld.long 0x04 8. "                  [8]    ,Transient data integrity error" "No error,Error"
bitfld.long 0x04 1. "                      [1]     ,Recovered communications error" "No error,Error"
newline
bitfld.long 0x04 0. " [0]      ,Recovered data integrity error" "No error,Error"
group.long 0x138++0x03
line.long 0x00 "PXCI,Port X Command Issue Register"
bitfld.long 0x00 31. " CI[31]   ,Command slot 31 command issued" "Not issued,Issued"
bitfld.long 0x00 30. "                      [30]  ,Command slot 30 command issued" "Not issued,Issued"
bitfld.long 0x00 29. "                [29]   ,Command slot 29 command issued" "Not issued,Issued"
bitfld.long 0x00 28. "                    [28]    ,Command slot 28 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 27. " [27]     ,Command slot 27 command issued" "Not issued,Issued"
bitfld.long 0x00 26. "                      [26]  ,Command slot 26 command issued" "Not issued,Issued"
bitfld.long 0x00 25. "                [25]   ,Command slot 25 command issued" "Not issued,Issued"
bitfld.long 0x00 24. "                    [24]    ,Command slot 24 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 23. " [23]     ,Command slot 23 command issued" "Not issued,Issued"
bitfld.long 0x00 22. "                      [22]  ,Command slot 22 command issued" "Not issued,Issued"
bitfld.long 0x00 21. "                [21]   ,Command slot 21 command issued" "Not issued,Issued"
bitfld.long 0x00 20. "                    [20]    ,Command slot 20 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 19. " [19]     ,Command slot 19 command issued" "Not issued,Issued"
bitfld.long 0x00 18. "                      [18]  ,Command slot 18 command issued" "Not issued,Issued"
bitfld.long 0x00 17. "                [17]   ,Command slot 17 command issued" "Not issued,Issued"
bitfld.long 0x00 16. "                    [16]    ,Command slot 16 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 15. " [15]     ,Command slot 15 command issued" "Not issued,Issued"
bitfld.long 0x00 14. "                      [14]  ,Command slot 14 command issued" "Not issued,Issued"
bitfld.long 0x00 13. "                [13]   ,Command slot 13 command issued" "Not issued,Issued"
bitfld.long 0x00 12. "                    [12]    ,Command slot 12 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 11. " [11]     ,Command slot 11 command issued" "Not issued,Issued"
bitfld.long 0x00 10. "                      [10]  ,Command slot 10 command issued" "Not issued,Issued"
bitfld.long 0x00 9. "                [9]    ,Command slot 9 command issued" "Not issued,Issued"
bitfld.long 0x00 8. "                    [8]     ,Command slot 8 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 7. " [7]      ,Command slot 7 command issued" "Not issued,Issued"
bitfld.long 0x00 6. "                      [6]   ,Command slot 6 command issued" "Not issued,Issued"
bitfld.long 0x00 5. "                [5]    ,Command slot 5 command issued" "Not issued,Issued"
bitfld.long 0x00 4. "                    [4]     ,Command slot 4 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 3. " [3]      ,Command slot 3 command issued" "Not issued,Issued"
bitfld.long 0x00 2. "                      [2]   ,Command slot 2 command issued" "Not issued,Issued"
bitfld.long 0x00 1. "                [1]    ,Command slot 1 command issued" "Not issued,Issued"
bitfld.long 0x00 0. "                    [0]     ,Command slot 0 command issued" "Not issued,Issued"
if (((per.l(ad:0x03200000+0x140))&0x04)==0x04)
group.long 0x140++0x03
line.long 0x00 "PXFBS,Port X FIS-based Switching Control Register"
rbitfld.long 0x00 16.--19. " DWE      ,Device with error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 12.--15. "                              ADO   ,Active device optimization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                        DEV    ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
rbitfld.long 0x00 2. " SDE      ,Single device error" "No error,Error"
bitfld.long 0x00 1. "                        DEC   ,Device error clear" "No effect,Clear"
bitfld.long 0x00 0. "                 EN     ,FIS-based switching enable" "Disabled,Enabled"
else
group.long 0x140++0x03
line.long 0x00 "PXFBS,Port X FIS-based Switching Control Register"
rbitfld.long 0x00 12.--15. " ADO      ,Active device optimization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                              DEV   ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
rbitfld.long 0x00 2. " SDE      ,Single device error" "No error,Error"
bitfld.long 0x00 1. "                        DEC   ,Device error clear" "No effect,Clear"
bitfld.long 0x00 0. "                 EN     ,FIS-based switching enable" "Disabled,Enabled"
endif
group.long 0x170++0x03
line.long 0x00 "PBERR,Port 0 BIST Error Register"
bitfld.long 0x00 1. " BEOS     ,BIST error one shot bit" "No error,Error"
rbitfld.long 0x00 0. "                        BERR  ,BIST error" "No error,Error"
width 0x0B
tree.end
tree "SATA 2"
base ad:0x03210000
width 9.
rgroup.long 0x00++0x03
line.long 0x00 "CAP,HBA Capabilities Register"
bitfld.long 0x00 31. " S64A     ,Supports 64-bit addressing" "Not supported,Supported"
bitfld.long 0x00 30. "                   SNCQ  ,Supports native command queuing" "Not supported,Supported"
bitfld.long 0x00 29. "             SSNTF  ,Supports notification register" "Not supported,Supported"
newline
bitfld.long 0x00 28. " SMPS     ,Supports mechanical presence switch" "Not supported,Supported"
bitfld.long 0x00 27. "                   SSS   ,Supports staggered spin-up" "Not supported,Supported"
bitfld.long 0x00 26. "             SALP   ,Supports aggressive link power management" "Not supported,Supported"
newline
bitfld.long 0x00 25. " SAL      ,Supports activity LED" "Not supported,Supported"
bitfld.long 0x00 24. "                   SCLO  ,Supports command list override" "Not supported,Supported"
bitfld.long 0x00 20.--23. "             ISS    ,Interface speed support" ",Gen 1,Gen 2,Gen 3,?..."
newline
bitfld.long 0x00 18. " SAM      ,Supports AHCI mode only" "Not supported,Supported"
bitfld.long 0x00 17. "                   SPM   ,Supports port multiplier" "Not supported,Supported"
bitfld.long 0x00 16. "             FBSS   ,FIS-based switching supported" "Not supported,Supported"
newline
bitfld.long 0x00 15. " PMD      ,PIO multiple DRQ block" "Not supported,Supported"
bitfld.long 0x00 14. "                   SSC   ,Slumber state capable" "Not supported,Supported"
bitfld.long 0x00 13. "             PSC    ,Partial state capable" "Not supported,Supported"
newline
bitfld.long 0x00 8.--12. " NCS      ,Number of command slots" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
bitfld.long 0x00 7. "                              CCCS  ,Command completion coalescing supported" "Not supported,Supported"
bitfld.long 0x00 6. "             EMS    ,Enclosure management supported" "Not supported,Supported"
newline
bitfld.long 0x00 5. " SXS      ,Supports external SATA" "Not supported,Supported"
bitfld.long 0x00 0.--4. "                   NP    ,Number of ports" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32"
if (((per.l(ad:0x03200000+0x00))&0x40000)==0x00)
group.long 0x04++0x03
line.long 0x00 "GHC,Global HBA Control Register"
bitfld.long 0x00 31. " AE       ,AHCI enable" "Disabled,Enabled"
rbitfld.long 0x00 2. "                        MRSM  ,MSI revert to single message" "Not reverted,Reverted"
newline
bitfld.long 0x00 1. " IE       ,Interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                        HR    ,HBA reset" "No reset,Reset"
else
group.long 0x04++0x03
line.long 0x00 "GHC,Global HBA Control Register"
rbitfld.long 0x00 31. " AE       ,AHCI enable" "Disabled,Enabled"
rbitfld.long 0x00 2. "                        MRSM  ,MSI revert to single message" "Not reverted,Reverted"
newline
bitfld.long 0x00 1. " IE       ,Interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 0. "                        HR    ,HBA reset" "No reset,Reset"
endif
rgroup.long 0x10++0x03
line.long 0x00 "VS,AHCI Version Register"
hexmask.long.word 0x00 16.--31. 1. " MJR      ,Major version number"
hexmask.long.word 0x00 0.--15. 1. "                            MNR   ,Minor version number"
group.long 0x14++0x03
line.long 0x00 "CCC_CTL,Command Completion Coalescing Control Register"
hexmask.long.word 0x00 16.--31. 1. " TV       ,Timeout value"
hexmask.long.byte 0x00 8.--15. 1. "                            CC    ,Command completions"
newline
rbitfld.long 0x00 3.--7. " INT      ,Specifies the interrupt used by the CCC feature" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0. "                              EN    ,Command completion coalescing feature enable" "Disabled,Enabled"
rgroup.long 0x24++0x03
line.long 0x00 "CAP2,HBA Capabilities Extended Register"
bitfld.long 0x00 2. " APST     ,Automatic partial to slumber transitions support" "Not supported,Supported"
bitfld.long 0x00 1. "                   NVMP  ,NVMHCI support" "Not supported,Supported"
bitfld.long 0x00 0. "             BOH    ,BIOS/OS handoff support" "Not supported,Supported"
group.long 0xA4++0x23
line.long 0x00 "PCFG,Port Config Register"
hexmask.long.byte 0x00 16.--22. 1. " TPSS     ,Millisecond timer post scaler"
bitfld.long 0x00 12.--14. "                              TPRS  ,Millisecond timer per scaler" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 0.--5. "                         PAD    ,Port address" ",,Addr cfg/status set,?..."
line.long 0x04 "PPCFG,Port Phy1Cfg Register"
bitfld.long 0x04 31. " ESDF     ,Enable signal det filter" "Disabled,Enabled"
bitfld.long 0x04 30. "                        ERSN  ,Enable reset speed negotiation" "Disabled,Enabled"
bitfld.long 0x04 29. "                  PSS    ,PhyControl select SerDes slumber CMU during link slumber" "No slumber,Slumber"
bitfld.long 0x04 28. "                    PSSO    ,PhyControl select SerDes OOB or internally decoded OOB signaling as inputs" "SERDES,Internal"
newline
rbitfld.long 0x04 27. " STB      ,Gen fixed clocks parameter status" "Fixed freq clock,Variable clock"
bitfld.long 0x04 26. "                PBPNA ,PhyControl BIST pattern no aligns" "Not continuously,Continuously"
bitfld.long 0x04 25. "          PBCE   ,PhyControl BIST clear error" "Not cleared,Cleared"
bitfld.long 0x04 24. "                   PBPE    ,PhyControl BIST pattern enable" "Disabled,Enabled"
newline
bitfld.long 0x04 21.--23. " PBPS     ,PhyControl BIST pattern select" "LBP,LFTP,MFTP,HFTP,PRBS,BIST,?..."
bitfld.long 0x04 20. "                            FPR   ,Force PHY ready" "Not forced,Forced"
bitfld.long 0x04 18. "                SNR    ,Speed negotiation rate" "Normal,SPD"
bitfld.long 0x04 17. "                        SNM     ,Speed negotiation method" "Fastest speed down to Gen1,Gen1 up to fastest speed"
newline
hexmask.long.tbyte 0x04 0.--16. 1. " TTA      ,This value determines the time period the controller transmits and waits for ALIGNp during speed negotiation"
line.long 0x08 "PP2C,Port Phy2Cfg Register"
hexmask.long.byte 0x08 24.--31. 1. " CINMP    ,COMINIT negate minimum period"
hexmask.long.byte 0x08 16.--23. 1. "                              CIBGN ,COMINIT burst gap nominal"
hexmask.long.byte 0x08 8.--15. 1. "                        CIBGMX ,COMINIT burst gap maximum"
hexmask.long.byte 0x08 0.--7. 1. "                            CIBGMN  ,COMINIT burst gap minimum"
line.long 0x0C "PP3C,Port Phy3Cfg Register"
hexmask.long.byte 0x0C 24.--31. 1. " CWNMP    ,COMWAKE negate minimum period"
hexmask.long.byte 0x0C 16.--23. 1. "                              CWBGN ,COMWAKE burst gap nominal"
hexmask.long.byte 0x0C 8.--15. 1. "                        CWBGMX ,COMWAKE burst gap maximum"
hexmask.long.byte 0x0C 0.--7. 1. "                            CWBGMN  ,COMWAKE burst gap minimum"
line.long 0x10 "PP4C,Port Phy4Cfg Register"
hexmask.long.byte 0x10 24.--31. 1. " PTST     ,Partial to slumber timer value"
hexmask.long.byte 0x10 16.--23. 1. "                              SFD   ,Signal failure detection"
hexmask.long.byte 0x10 8.--15. 1. "                        BNM    ,COM burst nominal"
hexmask.long.byte 0x10 0.--7. 1. "                            BMX     ,COM burst maximum"
line.long 0x14 "PP5C,Port Phy5Cfg Register"
hexmask.long.word 0x14 20.--31. 1. " RCT      ,Rate change timer"
hexmask.long.tbyte 0x14 0.--19. 1. "                            RIT   ,Retry interval timer"
line.long 0x18 "AXICC,AXI Cache Control Register"
bitfld.long 0x18 29. " EARC     ,Enable the ARCACHE" "Disabled,Enabled"
bitfld.long 0x18 28. "                        EAWC  ,Enable the AWCACHE" "Disabled,Enabled"
bitfld.long 0x18 24.--27. "                  AWCF   ,Address write cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 20.--23. "                            AWCD    ,Address write cache data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x18 16.--19. " AWCFD    ,Address write cache final data" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 12.--15. "                              ARCP  ,Address read cache PRD" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 8.--11. "                        ARCH   ,Address read cache header" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x18 4.--7. "                            ARCF    ,Address read cache FIS" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x18 0.--3. " ARCA     ,Address read cache ATAPI" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x1C "PAXIC,Port AXICfg Register"
bitfld.long 0x1C 28. " ENPE     ,Enable non zero 4MB PRD entries" "Disabled,Enabled"
bitfld.long 0x1C 25. "                        AAO   ,Allow address overwrite" "Not allowed,Allowed"
bitfld.long 0x1C 24. "               ECM    ,Enable the context management" "Disabled,Enabled"
bitfld.long 0x1C 20.--23. "                      OTL     ,Outstanding transfer limit" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16"
newline
bitfld.long 0x1C 16.--19. " MARIDD   ,Memory address read ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 12.--15. "                              MARID ,Memory address read ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 8.--11. "                        MAWIDD ,Memory address write ID for data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x1C 4.--7. "                            MAWID   ,Memory address write ID for non data transfers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x20 "AXIPC,AXI Protection Control Register"
bitfld.long 0x20 29. " EARP     ,Enables the ARPROT" "Disabled,Enabled"
bitfld.long 0x20 28. "                        EAWP  ,Enables the AWPROT" "Disabled,Enabled"
bitfld.long 0x20 24.--26. "                  AWPF   ,Address write prot data" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x20 20.--22. " AWPD     ,Address write prot data" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 16.--18. "                               AWPFD ,Address write prot final data" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 12.--14. "                         ARPP   ,Address read prot PRD" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x20 8.--10. " ARPH     ,Address read prot header" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 4.--6. "                               ARPF  ,Address read prot FIS" "0,1,2,3,4,5,6,7"
bitfld.long 0x20 0.--2. "                         ARPD   ,Address read prot data" "0,1,2,3,4,5,6,7"
group.long 0xC8++0x03
line.long 0x00 "PTC,Port TransCfg Register"
bitfld.long 0x00 9. " ITM      ,Initialize transport memories" "Not initialized,Initialized"
bitfld.long 0x00 8. "                 ENBD  ,Enable back down" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--6. 1. "                  RXWM   ,RXWaterMark"
group.long 0xD0++0x0B
line.long 0x00 "PLC,Port LinkCfg Register"
bitfld.long 0x00 27.--31. " PMPRA    ,Power management primitive rate acknowledge" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 26. "                              POE   ,Primitive override enable" "Disabled,Enabled"
hexmask.long.word 0x00 16.--25. 1. "                  PRT    ,PHY ready timer"
hexmask.long.byte 0x00 8.--15. 1. "                          AIR     ,ALIGN insertion rate"
newline
bitfld.long 0x00 7. " EPNRT    ,Enable PHY not ready timer" "Disabled,Enabled"
bitfld.long 0x00 6. "                        S4A   ,Send 4 aligns" "Not sent,Sent"
bitfld.long 0x00 5. "                  RXSE   ,RX scramble enable" "Disabled,Enabled"
bitfld.long 0x00 4. "                      TXSE    ,TX scramble enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " TXPJ     ,TX prim junk" "Scrambled,Single"
bitfld.long 0x00 2. "                       TXC   ,TX CONT" "Disabled,Enabled"
bitfld.long 0x00 1. "                  RXBC   ,RX bad CRC" "Disabled,Enabled"
bitfld.long 0x00 0. "                      TXBC    ,TX bad CRC" "Disabled,Enabled"
line.long 0x04 "PLC1,Port LinkCfg1 Register"
bitfld.long 0x04 6. " CD       ,Data character or primitive" "Character,Primitive"
bitfld.long 0x04 0.--5. "                       POS   ,Primitive override state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
line.long 0x08 "PLC2,Port LinkCfg2 Register"
group.long 0xE0++0x0B
line.long 0x00 "PLS1,Port LinkStatus1 Register"
hexmask.long.byte 0x00 24.--31. 1. " KCEC     ,Kchar error count"
hexmask.long.byte 0x00 16.--23. 1. "                              PIEC  ,PHY internal error count"
hexmask.long.byte 0x00 8.--15. 1. "                        CEC    ,Code error count"
hexmask.long.byte 0x00 0.--7. 1. "                            DEC     ,Disparity error count"
line.long 0x04 "PCMDC,Port CmdConfig Register"
bitfld.long 0x04 29. " TSVIE    ,Trustzone slave ID violation interrupt enable" "Disabled,Enabled"
bitfld.long 0x04 28. "                        TSVI  ,Trustzone slave ID violation interrupt" "No interrupt,Interrupt"
rhexmask.long.word 0x04 12.--27. 1. "              TSVT   ,Trustzone slave ID of violating transaction"
bitfld.long 0x04 1. "                          ETLL    ,Enable transport layer loopback" "Disabled,Enabled"
newline
bitfld.long 0x04 0. " ETLLB    ,Enable transport layer loopback in the BIST L mode" "Disabled,Enabled"
line.long 0x08 "PPCS,Port PhyControl Status Register"
rbitfld.long 0x08 30.--31. " PHYCE    ,Current 2 bit code error" "00,01,10,11"
rbitfld.long 0x08 28.--29. "                              PHYDE ,Current 2 bit disparity error" "00,01,10,11"
rbitfld.long 0x08 27. "                        PHYKC  ,Current 1 bit K character" "0,1"
rhexmask.long.tbyte 0x08 11.--26. 1. "                             PHYD    ,Current 16 bit data"
newline
bitfld.long 0x08 10. " CCAC     ,Comma alignment has changed" "Not changed,Changed"
rbitfld.long 0x08 5.--9. "                     CCA   ,Current comma alignment" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rbitfld.long 0x08 0.--4. "                        PCTRLS ,Phy control state" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0xF0++0x03
line.long 0x00 "TCR,Timer Control Register"
hexmask.long.word 0x00 0.--12. 1. " TPS      ,Timer prescalar value"
group.long 0x100++0x13
line.long 0x00 "PXCLB,Port X Command List Base Address Register"
hexmask.long.tbyte 0x00 10.--31. 0x04 " CLB      ,Command list base address register"
line.long 0x04 "PXCLBU,Port X Command List Base Address Upper 32-bits Register"
line.long 0x08 "PXFB,Port X FIS Base Address Register"
hexmask.long.tbyte 0x08 8.--31. 0x01 " FB       ,FIS base address"
line.long 0x0C "PXFBU,Port X FIS Base Address Upper 32-bits Register"
line.long 0x10 "PXIS,Port X Interrupt Status Register"
bitfld.long 0x10 31. " CPDS     ,Cold port detect status" "Not detected,Detected"
bitfld.long 0x10 30. "                    TFES  ,Task file error status" "No error,Error"
bitfld.long 0x10 29. "                  HBFS   ,Host bus fatal error status" "No error,Error"
newline
bitfld.long 0x10 28. " HBDS     ,Host bus data error status" "No error,Error"
bitfld.long 0x10 27. "                        IFS   ,Interface fatal error status" "No error,Error"
bitfld.long 0x10 26. "                  NTFS   ,Interface non-fatal error status" "No error,Error"
newline
bitfld.long 0x10 24. " OFS      ,Overflow status" "Not overflowed,Overflowed"
bitfld.long 0x10 23. "                  IPMS  ,Incorrect port multiplier status" "Correct,Incorrect"
rbitfld.long 0x10 22. "                 PRCS   ,PhyRdy change status" "Not changed,Changed"
newline
bitfld.long 0x10 7. " DMPS     ,Device mechanical presence status" "Not changed,Changed"
rbitfld.long 0x10 6. "                     PCS   ,Port connect change status" "Not changed,Changed"
bitfld.long 0x10 5. "               DPS    ,Descriptor processed" "Not processed,Processed"
newline
rbitfld.long 0x10 4. " UFS      ,Unknown FIS interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 3. "                    SDBS  ,Set device bits interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 2. "              DSS    ,DMA setup FIS interrupt" "No interrupt,Interrupt"
newline
bitfld.long 0x10 1. " PSS      ,PIO setup FIS interrupt" "No interrupt,Interrupt"
bitfld.long 0x10 0. "                    DHRS  ,Device to host register FIS interrupt" "No interrupt,Interrupt"
if (((per.l(ad:0x03200000))&0x20000)==0x00)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x00)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
rbitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
textfld "                         "
bitfld.long 0x00 4. " FRE   ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
elif (((per.l(ad:0x03200000))&0x20000)==0x20000)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x00)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
bitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
textfld "                         "
bitfld.long 0x00 4. " FRE   ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
elif (((per.l(ad:0x03200000))&0x20000)==0x00)&&(((per.l(ad:0x03200000+0x118))&0x01)==0x01)
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
rbitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
rbitfld.long 0x00 8.--12. "                          CCS   ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "                        FRE    ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
else
group.long 0x118++0x03
line.long 0x00 "PXCMD,Port X Command And Status Register"
bitfld.long 0x00 28.--31. " ICC      ,Interface communication control" "Idle,Active,Partial,,,,Slumber,?..."
bitfld.long 0x00 27. "                         ASP   ,Aggressive slumber/partial" "Partial,Slumber"
bitfld.long 0x00 26. "                   ALPE   ,Aggressive link power management enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " DLAE     ,Drive LED on ATAPI enable" "Disabled,Enabled"
bitfld.long 0x00 24. "                        ATAPI ,Device is ATAPI" "Not ATAPI,ATAPI"
bitfld.long 0x00 23. "                 APSTE  ,Automatic partial to slumber transitions enabled" "Disabled,Enabled"
newline
rbitfld.long 0x00 22. " FBSCP    ,FIS-based switching capable port" "Not capable,Capable"
rbitfld.long 0x00 21. "                     ESP   ,Indicates that this port's signal connector is externally accessible on a signal only connector" "Not accessible,Accessible"
rbitfld.long 0x00 20. "            CPD    ,Cold presence detection support" "Not supported,Supported"
newline
rbitfld.long 0x00 19. " MPSP     ,Mechanical presence switch attached to port support" "Not supported,Supported"
rbitfld.long 0x00 18. "                   HPCP  ,Hot plug capable port" "Not capable,Capable"
bitfld.long 0x00 17. "               PMA    ,Port multiplier attached" "Not attached,Attached"
newline
rbitfld.long 0x00 16. " CPS      ,Cold presence state" "Not detected,Detected"
rbitfld.long 0x00 15. "                    CR    ,Command list running" "Not running,Running"
rbitfld.long 0x00 14. "               FR     ,FIS receive running" "Not running,Running"
newline
rbitfld.long 0x00 13. " MPSS     ,Mechanical presence switch state" "Closed,Open"
rbitfld.long 0x00 8.--12. "                          CCS   ,Current command slot" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 4. "                        FRE    ,FIS receive enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " CLO      ,Command list override" "Not overridden,Overridden"
rbitfld.long 0x00 2. "                  POD   ,Power on device" "Powered off,Powered on"
rbitfld.long 0x00 1. "               SUD    ,Spin-up device" "0,1"
newline
bitfld.long 0x00 0. " ST       ,When set the HBA starts processing the command list" "Not started,Started"
endif
rgroup.long 0x128++0x03
line.long 0x00 "PXSSTS,Port X SATA Status Register"
bitfld.long 0x00 8.--11. " IPM      ,Interface power management" "Device not present,Active,Partial power management,,,,Slumber power management,?..."
bitfld.long 0x00 4.--7. "        SPD   ,Current interface speed" "Device not present,Gen 1,Gen 2,Gen 3,?..."
bitfld.long 0x00 0.--3. "        DET    ,Device detection" "Not detected/Not established,Detected/Not established,,Detected/established,Offline mode,?..."
group.long 0x12C++0x07
line.long 0x00 "PXSCTL,Port X SATA Control Register"
bitfld.long 0x00 8.--11. " IPM      ,Indicates which power states the HBA is not allowed to transition to" "No restrictions,Partial state disabled,Slumber state disabled,Partial/Slumber state disabled,?..."
bitfld.long 0x00 4.--7. "  SPD   ,Indicates the highest allowable speed of the interface" "No restrictions,Generation 1 comm rate,<=Generation 2 comm rate,<=Generation 3 comm rate,?..."
bitfld.long 0x00 0.--3. "  DET    ,Device detection initialization" "Not detected/initialized,Perform interface comm init,,,Disable SATA,?..."
line.long 0x04 "PXSERR,Port X SATA Error Register"
bitfld.long 0x04 26. " DIAG[10] ,Determines that the device presence has changed is vendor specific" "Not changed,Changed"
bitfld.long 0x04 25. "                     [9]   ,Unknown FIS type" "Not received,Received"
bitfld.long 0x04 24. "              [8]    ,Transport state transition error" "No error,Error"
bitfld.long 0x04 23. "                      [7]     ,Link sequence error" "No error,Error"
newline
bitfld.long 0x04 22. " [6]      ,Handshake error" "No error,Error"
bitfld.long 0x04 21. "                        [5]   ,CRC error" "No error,Error"
bitfld.long 0x04 20. "                  [4]    ,Disparity error" "No error,Error"
bitfld.long 0x04 19. "                      [3]     ,10B to 8B decode error" "No error,Error"
newline
bitfld.long 0x04 18. " [2]      ,Comm wake" "Not waked,Waked"
bitfld.long 0x04 17. "                       [1]   ,PHY internal error" "No error,Error"
bitfld.long 0x04 16. "                  [0]    ,PhyRdy change" "Not changed,Changed"
bitfld.long 0x04 11. "                   ERR[11] ,Internal error" "No error,Error"
newline
bitfld.long 0x04 10. " [10]     ,Protocol error" "No error,Error"
bitfld.long 0x04 9. "                        [9]   ,Persistent communication or data integrity error" "No error,Error"
bitfld.long 0x04 8. "                  [8]    ,Transient data integrity error" "No error,Error"
bitfld.long 0x04 1. "                      [1]     ,Recovered communications error" "No error,Error"
newline
bitfld.long 0x04 0. " [0]      ,Recovered data integrity error" "No error,Error"
group.long 0x138++0x03
line.long 0x00 "PXCI,Port X Command Issue Register"
bitfld.long 0x00 31. " CI[31]   ,Command slot 31 command issued" "Not issued,Issued"
bitfld.long 0x00 30. "                      [30]  ,Command slot 30 command issued" "Not issued,Issued"
bitfld.long 0x00 29. "                [29]   ,Command slot 29 command issued" "Not issued,Issued"
bitfld.long 0x00 28. "                    [28]    ,Command slot 28 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 27. " [27]     ,Command slot 27 command issued" "Not issued,Issued"
bitfld.long 0x00 26. "                      [26]  ,Command slot 26 command issued" "Not issued,Issued"
bitfld.long 0x00 25. "                [25]   ,Command slot 25 command issued" "Not issued,Issued"
bitfld.long 0x00 24. "                    [24]    ,Command slot 24 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 23. " [23]     ,Command slot 23 command issued" "Not issued,Issued"
bitfld.long 0x00 22. "                      [22]  ,Command slot 22 command issued" "Not issued,Issued"
bitfld.long 0x00 21. "                [21]   ,Command slot 21 command issued" "Not issued,Issued"
bitfld.long 0x00 20. "                    [20]    ,Command slot 20 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 19. " [19]     ,Command slot 19 command issued" "Not issued,Issued"
bitfld.long 0x00 18. "                      [18]  ,Command slot 18 command issued" "Not issued,Issued"
bitfld.long 0x00 17. "                [17]   ,Command slot 17 command issued" "Not issued,Issued"
bitfld.long 0x00 16. "                    [16]    ,Command slot 16 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 15. " [15]     ,Command slot 15 command issued" "Not issued,Issued"
bitfld.long 0x00 14. "                      [14]  ,Command slot 14 command issued" "Not issued,Issued"
bitfld.long 0x00 13. "                [13]   ,Command slot 13 command issued" "Not issued,Issued"
bitfld.long 0x00 12. "                    [12]    ,Command slot 12 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 11. " [11]     ,Command slot 11 command issued" "Not issued,Issued"
bitfld.long 0x00 10. "                      [10]  ,Command slot 10 command issued" "Not issued,Issued"
bitfld.long 0x00 9. "                [9]    ,Command slot 9 command issued" "Not issued,Issued"
bitfld.long 0x00 8. "                    [8]     ,Command slot 8 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 7. " [7]      ,Command slot 7 command issued" "Not issued,Issued"
bitfld.long 0x00 6. "                      [6]   ,Command slot 6 command issued" "Not issued,Issued"
bitfld.long 0x00 5. "                [5]    ,Command slot 5 command issued" "Not issued,Issued"
bitfld.long 0x00 4. "                    [4]     ,Command slot 4 command issued" "Not issued,Issued"
newline
bitfld.long 0x00 3. " [3]      ,Command slot 3 command issued" "Not issued,Issued"
bitfld.long 0x00 2. "                      [2]   ,Command slot 2 command issued" "Not issued,Issued"
bitfld.long 0x00 1. "                [1]    ,Command slot 1 command issued" "Not issued,Issued"
bitfld.long 0x00 0. "                    [0]     ,Command slot 0 command issued" "Not issued,Issued"
if (((per.l(ad:0x03200000+0x140))&0x04)==0x04)
group.long 0x140++0x03
line.long 0x00 "PXFBS,Port X FIS-based Switching Control Register"
rbitfld.long 0x00 16.--19. " DWE      ,Device with error" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rbitfld.long 0x00 12.--15. "                              ADO   ,Active device optimization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                        DEV    ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
rbitfld.long 0x00 2. " SDE      ,Single device error" "No error,Error"
bitfld.long 0x00 1. "                        DEC   ,Device error clear" "No effect,Clear"
bitfld.long 0x00 0. "                 EN     ,FIS-based switching enable" "Disabled,Enabled"
else
group.long 0x140++0x03
line.long 0x00 "PXFBS,Port X FIS-based Switching Control Register"
rbitfld.long 0x00 12.--15. " ADO      ,Active device optimization" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 8.--11. "                              DEV   ,Device to issue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
rbitfld.long 0x00 2. " SDE      ,Single device error" "No error,Error"
bitfld.long 0x00 1. "                        DEC   ,Device error clear" "No effect,Clear"
bitfld.long 0x00 0. "                 EN     ,FIS-based switching enable" "Disabled,Enabled"
endif
group.long 0x170++0x03
line.long 0x00 "PBERR,Port 0 BIST Error Register"
bitfld.long 0x00 1. " BEOS     ,BIST error one shot bit" "No error,Error"
rbitfld.long 0x00 0. "                        BERR  ,BIST error" "No error,Error"
width 0x0B
tree.end
tree.end
tree.open "SerDes (SerDes Module)"
tree "Serdes 1"
base ad:0x01EA0000
width 12.
tree "PLL Registers"
if (((per.l(ad:0x01EA0000+0x0))&0x60000000)==(0x40000000||0x20000000))
group.long 0x0++0x03
line.long 0x00 "PLL1RSTCTL,SerDes PLL 1 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
rbitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "Not done,Done"
rbitfld.long 0x00 29. "           RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
else
rgroup.long 0x0++0x03
line.long 0x00 "PLL1RSTCTL,SerDes PLL 1 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
bitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "In progress,Complete"
bitfld.long 0x00 29. "        RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
endif
group.long (0x0+0x04)++0x07
line.long 0x00 "PLL1CR0,SerDes PLL 1 Control 0 Register"
bitfld.long 0x00 31. " POFF               ,Power down an unused PLL" "PLL on,PLL off"
bitfld.long 0x00 28.--30. "           RFCLK_SEL       ,Reference clock frequency select" "100 MHz,125 MHz,156.25 MHz,150 MHz,?..."
bitfld.long 0x00 27. "         RFCLK_EN         ,Reference clock observe enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 23. " PLL_LCK            ,Indicates PLL(n) has calibrated and locked" "Not locked,Locked"
bitfld.long 0x00 16.--19. "        FRATE_SEL       ,Selects frequency of PLL VCO" "5.00 GHz,,,,,,5.15625 GHz,4.00 GHz,,3.125 GHz,3.00 GHz,?..."
bitfld.long 0x00 0.--1. "        DLYDIV_SEL       ,Selects PLL1_ex_dly_clk divider value" "Off,VCOBY2/8 = VCOFRATE_SEL/16,?..."
line.long 0x04 "PLL1CR1,SerDes PLL 1 Control 1 Register"
bitfld.long 0x04 27. " PLLBW_SEL          ,Selects higher PLL 1 bandwidth" "Nominal BW,BW setting"
group.long (0x0+0x18)++0x03
line.long 0x00 "PLL1CR5,SerDes PLL 1 Control 5 Register"
bitfld.long 0x00 31. " SEL_REFCLK_AMP_DIS ,Disables ref. clock amplifier and selects usage of ref. clock coming from left SoC or another 10G lynx PLL" "No,Yes"
bitfld.long 0x00 27. "               LEFT_REF_BUF_EN ,Enables for left directed reference clock buffer" "Disabled,Enabled"
bitfld.long 0x00 24. "           RIGHT_REF_BUF_EN ,Enables for right directed reference clock buffer" "Disabled,Enabled"
if (((per.l(ad:0x01EA0000+0x20))&0x60000000)==(0x40000000||0x20000000))
group.long 0x20++0x03
line.long 0x00 "PLL2RSTCTL,SerDes PLL 2 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
rbitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "Not done,Done"
rbitfld.long 0x00 29. "           RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
else
rgroup.long 0x20++0x03
line.long 0x00 "PLL2RSTCTL,SerDes PLL 2 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
bitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "In progress,Complete"
bitfld.long 0x00 29. "        RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
endif
group.long (0x20+0x04)++0x07
line.long 0x00 "PLL2CR0,SerDes PLL 2 Control 0 Register"
bitfld.long 0x00 31. " POFF               ,Power down an unused PLL" "PLL on,PLL off"
bitfld.long 0x00 28.--30. "           RFCLK_SEL       ,Reference clock frequency select" "100 MHz,125 MHz,156.25 MHz,150 MHz,?..."
bitfld.long 0x00 27. "         RFCLK_EN         ,Reference clock observe enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 23. " PLL_LCK            ,Indicates PLL(n) has calibrated and locked" "Not locked,Locked"
bitfld.long 0x00 16.--19. "        FRATE_SEL       ,Selects frequency of PLL VCO" "5.00 GHz,,,,,,5.15625 GHz,4.00 GHz,,3.125 GHz,3.00 GHz,?..."
bitfld.long 0x00 0.--1. "        DLYDIV_SEL       ,Selects PLL1_ex_dly_clk divider value" "Off,VCOBY2/8 = VCOFRATE_SEL/16,?..."
line.long 0x04 "PLL2CR1,SerDes PLL 2 Control 1 Register"
bitfld.long 0x04 27. " PLLBW_SEL          ,Selects higher PLL 2 bandwidth" "Nominal BW,BW setting"
group.long (0x20+0x18)++0x03
line.long 0x00 "PLL1CR5,SerDes PLL 1 Control 5 Register"
bitfld.long 0x00 31. " SEL_REFCLK_AMP_DIS ,Disables ref. clock amplifier and selects usage of ref. clock coming from left SoC or another 10G lynx PLL" "No,Yes"
bitfld.long 0x00 27. "               LEFT_REF_BUF_EN ,Enables for left directed reference clock buffer" "Disabled,Enabled"
bitfld.long 0x00 24. "           RIGHT_REF_BUF_EN ,Enables for right directed reference clock buffer" "Disabled,Enabled"
tree.end
width 9.
tree "General Registers"
group.long 0x90++0x07
line.long 0x00 "TCALCR,SerDes Transmit Calibration Control Register"
bitfld.long 0x00 27. " CALRST_B             ,Reset the transmit calibration in the right endcap cell (active_low signal)" "Reset,Application mode"
line.long 0x04 "TCALCR1,SerDes Transmit Calibration Control 1 Register"
bitfld.long 0x04 27. " DIG_OUT_REFCLK_EN    ,Enables CMOS digital buffered version of selected ref_clk to the right" "Disabled,Enabled"
bitfld.long 0x04 24. "          ANA_OUT_REFCLK_EN ,Enables CML analog buffered version of selected ref_clk to the left" "Disabled,Enabled"
group.long 0xA0++0x07
line.long 0x00 "RCALCR,Receive Calibration Control Register"
bitfld.long 0x00 27. " CALRST_B             ,Reset the receiver calibration in the left endcap cell" "Reset,Application mode"
line.long 0x04 "RCALCR1,SerDes Receive Calibration Control 1 Register"
bitfld.long 0x04 31. " ANA_IN_REFCLK_BUF_EN ,Enables CML analog buffer used to transition SoC reference clock to 10G lynx" "Disabled,Enabled"
bitfld.long 0x04 27. "          DIG_OUT_REFCLK_EN ,Enables CMOS digital buffered version of selected ref_clk to the left" "Disabled,Enabled"
bitfld.long 0x04 24. "  ANA_OUT_REFCLK_EN ,Enables CML analog buffered version of selected ref_clk to the left" "Disabled,Enabled"
newline
rbitfld.long 0x04 0.--1. " BI_REFCTL_OUT        ,Output COP DFT/burnin/JTAG reference clock controls to wrapper" "0,1,2,3"
group.long 0xB0++0x03
line.long 0x00 "GR0,General Control 0 Register"
bitfld.long 0x00 14. " XPAD_SEL             ,Describes to serdes module the value of the power supply being used by the serdes I/Os" "1.5V,1.35V"
tree.end
width 10.
tree "Lane Protocol Select Status Registers"
rgroup.long 0x100++0x03
line.long 0x00 "LNAPSSR0,Lane A Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x120++0x03
line.long 0x00 "LNBPSSR0,Lane B Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x140++0x03
line.long 0x00 "LNCPSSR0,Lane C Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x160++0x03
line.long 0x00 "LNDPSSR0,Lane D Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x180++0x03
line.long 0x00 "LNEPSSR0,Lane E Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1A0++0x03
line.long 0x00 "LNFPSSR0,Lane F Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C0++0x03
line.long 0x00 "LNGPSSR0,Lane G Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1E0++0x03
line.long 0x00 "LNHPSSR0,Lane H Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
tree.end
width 7.
tree "Protocol Configuration Registers"
group.long 0x200++0x03
line.long 0x00 "PCCR0,Protocol Configuration 0 Register"
bitfld.long 0x00 28.--30. " PEXA_CFG    ,PEXa configuration" "Disabled,x1 on lane 7,,x4[3:0] on lanes [4:7],?..."
bitfld.long 0x00 24.--26. "                       PEXB_CFG    ,PEXb configuration" "Disabled,x1 on lane 3,,x4[3:0] on lanes [0:3],?..."
group.long 0x208++0x03
line.long 0x00 "PCCR2,Protocol Configuration 2 Register"
bitfld.long 0x00 28.--30. " SATAA_CFG   ,SATAa configuration" "Disabled,?..."
bitfld.long 0x00 24.--26. "                                     SATAB_CFG   ,SATAb configuration" "Disabled,?..."
group.long 0x220++0x0F
line.long 0x00 "PCCR8,Protocol Configuration 8 Register"
bitfld.long 0x00 31. " SGMIIA_KX   ,SGMIIa 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 28.--30. "                             SGMIIA_CFG  ,SGMIIa configuration" "Disabled,x1 on lane 0 to WRIOPE MAC 1,?..."
newline
bitfld.long 0x00 27. " SGMIIB_KX   ,SGMIIc 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 24.--26. "                             SGMIIB_CFG  ,SGMIIb configuration" "Disabled,x1 on lane 1 to WRIOPE MAC 2,?..."
newline
bitfld.long 0x00 23. " SGMIIC_KX   ,SGMIId 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 20.--22. "                             SGMIIC_CFG  ,SGMIIc configuration" "Disabled,x1 on lane 2 to WRIOPE MAC 3,?..."
newline
bitfld.long 0x00 19. " SGMIID_KX   ,SGMIIe 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 16.--18. "                             SGMIID_CFG  ,SGMIId configuration" "Disabled,x1 on lane 3 to WRIOPE MAC 4,?..."
newline
bitfld.long 0x00 15. " SGMIIE_KX   ,SGMIIf 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 12.--14. "                             SGMIIE_CFG  ,SGMIIe configuration" "Disabled,x1 on lane 4 to WRIOPE MAC 5,?..."
newline
bitfld.long 0x00 11. " SGMIIF_KX   ,SGMIIf 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 8.--10. "                             SGMIIF_CFG  ,SGMIIf configuration" "Disabled,x1 on lane 5 to WRIOPE MAC 6,?..."
newline
bitfld.long 0x00 7. " SGMIIG_KX   ,SGMIIg 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 4.--6. "                             SGMIIG_CFG  ,SGMIIg configuration" "Disabled,x1 on lane 6 to WRIOPE MAC 7,?..."
newline
bitfld.long 0x00 3. " SGMIIH_KX   ,SGMIIh 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 0.--2. "                             SGMIIH_CFG  ,SGMIIh configuration" "Disabled,x1 on lane 7 to WRIOPE MAC 8,?..."
line.long 0x04 "PCCR9,Protocol Configuration 9 Register"
bitfld.long 0x04 28.--30. " QSGMIIA_CFG ,QSGMIIa configuration" "Disabled,x1 on lane 6 connected to WRIOPE MACs 5-8,x1 on lane 2 connected to WRIOPE MACs 5-8,?..."
bitfld.long 0x04 24.--26. "    QSGMIIB_CFG ,QSGMIIb configuration" "Disabled,x1 on lane 7 connected to WRIOPE MACs 1-4,?..."
newline
bitfld.long 0x04 20.--22. " QSGMIIC_CFG ,SGMIIc configuration" "Disabled,x1 on lane 4 connected to WRIOPE MACs 13-16,x1 on lane 0 connected to WRIOPE MACs 13-16,?..."
bitfld.long 0x04 16.--18. "  QSGMIID_CFG ,SGMIId configuration" "Disabled,x1 on lane 5 connected to WRIOPE MACs 9-12,,,x1 on lane 1 connected to WRIOPE MACs 9-12,?..."
line.long 0x08 "PCCRA,Protocol Configuration A Register"
bitfld.long 0x08 31. " XAUIA_LRV   ,XAUIa lane reversal" "Not reversed,Reversed"
bitfld.long 0x08 28. "                                 XAUIA_CFG   ,XAUIa configuration" "Disabled,x4 [3:0] on lanes [0:3] to WRIOPE MAC 2"
newline
bitfld.long 0x08 27. " XAUIB_LRV   ,XAUIb lane reversal" "Not reversed,Reversed"
bitfld.long 0x08 24. "                                 XAUIB_CFG   ,XAUIb configuration" "Disabled,x4 [3:0] on lanes [4:7] to WRIOPE MAC 1"
line.long 0x0C "PCCRB,Protocol Configuration B Register"
bitfld.long 0x0C 28.--30. " XFIA_CFG    ,XFIa configuration" "Disabled,x1 on Lane 0 to WRIOPE MAC 8,?..."
bitfld.long 0x0C 24.--26. "                 XFIB_CFG    ,XFIb configuration" "Disabled,x1 on Lane 1 to WRIOPE MAC 7,?..."
newline
bitfld.long 0x0C 20.--22. " XFIC_CFG    ,XFIc configuration" "Disabled,x1 on Lane 2 to WRIOPE MAC 6,?..."
bitfld.long 0x0C 16.--18. "                 XFID_CFG    ,XFId configuration" "Disabled,x1 on Lane 3 to WRIOPE MAC 5,?..."
newline
bitfld.long 0x0C 12.--14. " XFIE_CFG    ,XFIe configuration" "Disabled,x1 on Lane 4 to WRIOPE MAC 4,?..."
bitfld.long 0x0C 8.--10. "                 XFIF_CFG    ,XFIf configuration" "Disabled,x1 on Lane 5 to WRIOPE MAC 3,?..."
newline
bitfld.long 0x0C 4.--6. " XFIG_CFG    ,XFIg configuration" "Disabled,x1 on Lane 6 to WRIOPE MAC 2,?..."
bitfld.long 0x0C 0.--2. "                 XFIH_CFG    ,XFIh configuration" "Disabled,x1 on Lane 7 to WRIOPE MAC,?..."
tree.end
width 12.
tree "PCIe Equalization Configuration Registers"
group.long 0x300++0x03
line.long 0x00 "PEXEQCR,PCIe Equalization Configuration Register"
bitfld.long 0x00 6.--11. " FS  ,PCI express FS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          LF  ,PCI express LF value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x304++0x03
line.long 0x00 "PEXEQP0 CR,PCIe Equalization Preset Register 0 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x308++0x03
line.long 0x00 "PEXEQP1 CR,PCIe Equalization Preset Register 1 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x30C++0x03
line.long 0x00 "PEXEQP2 CR,PCIe Equalization Preset Register 2 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x310++0x03
line.long 0x00 "PEXEQP3 CR,PCIe Equalization Preset Register 3 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x314++0x03
line.long 0x00 "PEXEQP4 CR,PCIe Equalization Preset Register 4 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x318++0x03
line.long 0x00 "PEXEQP5 CR,PCIe Equalization Preset Register 5 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x31C++0x03
line.long 0x00 "PEXEQP6 CR,PCIe Equalization Preset Register 6 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x320++0x03
line.long 0x00 "PEXEQP7 CR,PCIe Equalization Preset Register 7 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x324++0x03
line.long 0x00 "PEXEQP8 CR,PCIe Equalization Preset Register 8 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x328++0x03
line.long 0x00 "PEXEQP9 CR,PCIe Equalization Preset Register 9 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x32C++0x03
line.long 0x00 "PEXEQP10CR,PCIe Equalization Preset Register 10"
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
tree.end
width 11.
tree "Lane A General Control Registers"
if (((per.l(ad:0x01EA0000+0x800))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x800+0x04)++0x03
line.long 0x00 "LNAGCR1,General Control 1 - Lane A Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x800+0x0C)++0x03
line.long 0x00 "LNASSCR0,Speed Switch Control 0 - Lane A Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x800+0x04)++0x03
line.long 0x00 "LNAGCR1,General Control 1 - Lane A Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x800+0x0C)++0x03
line.long 0x00 "LNASSCR0,Speed Switch Control 0 - Lane A Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x800+0x10)++0x03
line.long 0x00 "LNARECR0,Receive Equalization Control 0 - Lane A Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x800+0x14)++0x03
line.long 0x00 "LNARECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x800+0x18)++0x03
line.long 0x00 "LNATECR0,Lane A Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x1C)++0x03
line.long 0x00 "LNASSCR1,Lane A Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x20)++0x03
line.long 0x00 "LNATTLCR0,Lane A TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x3C)++0x03
line.long 0x00 "LNATCSR3,Lane A Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane A" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane B General Control Registers"
if (((per.l(ad:0x01EA0000+0x840))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x840+0x04)++0x03
line.long 0x00 "LNBGCR1,General Control 1 - Lane B Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x840+0x0C)++0x03
line.long 0x00 "LNBSSCR0,Speed Switch Control 0 - Lane B Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x840+0x04)++0x03
line.long 0x00 "LNBGCR1,General Control 1 - Lane B Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x840+0x0C)++0x03
line.long 0x00 "LNBSSCR0,Speed Switch Control 0 - Lane B Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x840+0x10)++0x03
line.long 0x00 "LNBRECR0,Receive Equalization Control 0 - Lane B Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x840+0x14)++0x03
line.long 0x00 "LNBRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x840+0x18)++0x03
line.long 0x00 "LNBTECR0,Lane B Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x1C)++0x03
line.long 0x00 "LNBSSCR1,Lane B Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x20)++0x03
line.long 0x00 "LNBTTLCR0,Lane B TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x3C)++0x03
line.long 0x00 "LNBTCSR3,Lane B Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane B" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane C General Control Registers"
if (((per.l(ad:0x01EA0000+0x880))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x880+0x04)++0x03
line.long 0x00 "LNCGCR1,General Control 1 - Lane C Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x880+0x0C)++0x03
line.long 0x00 "LNCSSCR0,Speed Switch Control 0 - Lane C Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x880+0x04)++0x03
line.long 0x00 "LNCGCR1,General Control 1 - Lane C Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x880+0x0C)++0x03
line.long 0x00 "LNCSSCR0,Speed Switch Control 0 - Lane C Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x880+0x10)++0x03
line.long 0x00 "LNCRECR0,Receive Equalization Control 0 - Lane C Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x880+0x14)++0x03
line.long 0x00 "LNCRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x880+0x18)++0x03
line.long 0x00 "LNCTECR0,Lane C Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x1C)++0x03
line.long 0x00 "LNCSSCR1,Lane C Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x20)++0x03
line.long 0x00 "LNCTTLCR0,Lane C TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x3C)++0x03
line.long 0x00 "LNCTCSR3,Lane C Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane C" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane D General Control Registers"
if (((per.l(ad:0x01EA0000+0x8C0))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x8C0+0x04)++0x03
line.long 0x00 "LNDGCR1,General Control 1 - Lane D Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x8C0+0x0C)++0x03
line.long 0x00 "LNDSSCR0,Speed Switch Control 0 - Lane D Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x8C0+0x04)++0x03
line.long 0x00 "LNDGCR1,General Control 1 - Lane D Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x8C0+0x0C)++0x03
line.long 0x00 "LNDSSCR0,Speed Switch Control 0 - Lane D Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x8C0+0x10)++0x03
line.long 0x00 "LNDRECR0,Receive Equalization Control 0 - Lane D Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x8C0+0x14)++0x03
line.long 0x00 "LNDRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x8C0+0x18)++0x03
line.long 0x00 "LNDTECR0,Lane D Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x1C)++0x03
line.long 0x00 "LNDSSCR1,Lane D Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x20)++0x03
line.long 0x00 "LNDTTLCR0,Lane D TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x3C)++0x03
line.long 0x00 "LNDTCSR3,Lane D Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane D" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane E General Control Registers"
if (((per.l(ad:0x01EA0000+0x900))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x900+0x04)++0x03
line.long 0x00 "LNEGCR1,General Control 1 - Lane E Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x900+0x0C)++0x03
line.long 0x00 "LNESSCR0,Speed Switch Control 0 - Lane E Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x900+0x04)++0x03
line.long 0x00 "LNEGCR1,General Control 1 - Lane E Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x900+0x0C)++0x03
line.long 0x00 "LNESSCR0,Speed Switch Control 0 - Lane E Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x900+0x10)++0x03
line.long 0x00 "LNERECR0,Receive Equalization Control 0 - Lane E Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x900+0x14)++0x03
line.long 0x00 "LNERECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x900+0x18)++0x03
line.long 0x00 "LNETECR0,Lane E Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x1C)++0x03
line.long 0x00 "LNESSCR1,Lane E Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x20)++0x03
line.long 0x00 "LNETTLCR0,Lane E TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x3C)++0x03
line.long 0x00 "LNETCSR3,Lane E Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane E" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane F General Control Registers"
if (((per.l(ad:0x01EA0000+0x940))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x940+0x04)++0x03
line.long 0x00 "LNFGCR1,General Control 1 - Lane F Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x940+0x0C)++0x03
line.long 0x00 "LNFSSCR0,Speed Switch Control 0 - Lane F Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x940+0x04)++0x03
line.long 0x00 "LNFGCR1,General Control 1 - Lane F Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x940+0x0C)++0x03
line.long 0x00 "LNFSSCR0,Speed Switch Control 0 - Lane F Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x940+0x10)++0x03
line.long 0x00 "LNFRECR0,Receive Equalization Control 0 - Lane F Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x940+0x14)++0x03
line.long 0x00 "LNFRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x940+0x18)++0x03
line.long 0x00 "LNFTECR0,Lane F Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x1C)++0x03
line.long 0x00 "LNFSSCR1,Lane F Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x20)++0x03
line.long 0x00 "LNFTTLCR0,Lane F TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x3C)++0x03
line.long 0x00 "LNFTCSR3,Lane F Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane F" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane G General Control Registers"
if (((per.l(ad:0x01EA0000+0x980))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x980+0x04)++0x03
line.long 0x00 "LNGGCR1,General Control 1 - Lane G Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x980+0x0C)++0x03
line.long 0x00 "LNGSSCR0,Speed Switch Control 0 - Lane G Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x980+0x04)++0x03
line.long 0x00 "LNGGCR1,General Control 1 - Lane G Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x980+0x0C)++0x03
line.long 0x00 "LNGSSCR0,Speed Switch Control 0 - Lane G Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x980+0x10)++0x03
line.long 0x00 "LNGRECR0,Receive Equalization Control 0 - Lane G Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x980+0x14)++0x03
line.long 0x00 "LNGRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x980+0x18)++0x03
line.long 0x00 "LNGTECR0,Lane G Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x1C)++0x03
line.long 0x00 "LNGSSCR1,Lane G Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x20)++0x03
line.long 0x00 "LNGTTLCR0,Lane G TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x3C)++0x03
line.long 0x00 "LNGTCSR3,Lane G Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane G" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane H General Control Registers"
if (((per.l(ad:0x01EA0000+0x9C0))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EA0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x9C0+0x04)++0x03
line.long 0x00 "LNHGCR1,General Control 1 - Lane H Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x9C0+0x0C)++0x03
line.long 0x00 "LNHSSCR0,Speed Switch Control 0 - Lane H Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EA0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EA0000+0x00))&0x80000000)==0x80000000)
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x9C0+0x04)++0x03
line.long 0x00 "LNHGCR1,General Control 1 - Lane H Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x9C0+0x0C)++0x03
line.long 0x00 "LNHSSCR0,Speed Switch Control 0 - Lane H Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x9C0+0x10)++0x03
line.long 0x00 "LNHRECR0,Receive Equalization Control 0 - Lane H Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x9C0+0x14)++0x03
line.long 0x00 "LNHRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x9C0+0x18)++0x03
line.long 0x00 "LNHTECR0,Lane H Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x1C)++0x03
line.long 0x00 "LNHSSCR1,Lane H Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x20)++0x03
line.long 0x00 "LNHTTLCR0,Lane H TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x3C)++0x03
line.long 0x00 "LNHTCSR3,Lane H Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane H" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
width 9.
tree "PEX Protocol Registers"
group.long 0x1000++0x03
line.long 0x00 "PEXACR0,PEX A Protocol Control 0 Register"
bitfld.long 0x00 27. " RD_SW ,Reduced swing operation for 8 GT/s" "Full,Reduced"
group.long 0x1040++0x03
line.long 0x00 "PEXBCR0,PEX B Protocol Control 0 Register"
bitfld.long 0x00 27. " RD_SW ,Reduced swing operation for 8 GT/s" "Full,Reduced"
tree.end
width 11.
tree "SGMII Protocol Registers"
group.long (0x1800+0x04)++0x03
line.long 0x00 "SGMIIACR1,SGMII A Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1800+0x0C)++0x03
line.long 0x00 "SGMIIACR3,SGMII A Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1810+0x04)++0x03
line.long 0x00 "SGMIIBCR1,SGMII B Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1810+0x0C)++0x03
line.long 0x00 "SGMIIBCR3,SGMII B Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1820+0x04)++0x03
line.long 0x00 "SGMIICCR1,SGMII C Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1820+0x0C)++0x03
line.long 0x00 "SGMIICCR3,SGMII C Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1830+0x04)++0x03
line.long 0x00 "SGMIIDCR1,SGMII D Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1830+0x0C)++0x03
line.long 0x00 "SGMIIDCR3,SGMII D Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1840+0x04)++0x03
line.long 0x00 "SGMIIECR1,SGMII E Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1840+0x0C)++0x03
line.long 0x00 "SGMIIECR3,SGMII E Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1850+0x04)++0x03
line.long 0x00 "SGMIIFCR1,SGMII F Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1850+0x0C)++0x03
line.long 0x00 "SGMIIFCR3,SGMII F Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1860+0x04)++0x03
line.long 0x00 "SGMIIGCR1,SGMII G Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1860+0x0C)++0x03
line.long 0x00 "SGMIIGCR3,SGMII G Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1870+0x04)++0x03
line.long 0x00 "SGMIIHCR1,SGMII H Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1870+0x0C)++0x03
line.long 0x00 "SGMIIHCR3,SGMII H Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
tree.end
width 12.
tree "QSGMII Protocol Registers"
group.long (0x1880+0x04)++0x03
line.long 0x00 "QSGMIIACR1,QSGMII A Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x1880+0x0C)++0x03
line.long 0x00 "QSGMIIACR3,QSGMII A Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x1890+0x04)++0x03
line.long 0x00 "QSGMIIBCR1,QSGMII B Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x1890+0x0C)++0x03
line.long 0x00 "QSGMIIBCR3,QSGMII B Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x18A0+0x04)++0x03
line.long 0x00 "QSGMIICCR1,QSGMII C Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x18A0+0x0C)++0x03
line.long 0x00 "QSGMIICCR3,QSGMII C Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x18B0+0x04)++0x03
line.long 0x00 "QSGMIIDCR1,QSGMII D Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x18B0+0x0C)++0x03
line.long 0x00 "QSGMIIDCR3,QSGMII D Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
tree.end
width 10.
tree "XAUI Protocol Registers"
rgroup.long 0x1904++0x07
line.long 0x00 "XAUIACR1,XAUIA Protocol Control 1"
bitfld.long 0x00 31. " ALGD      ,Lane alignment status" "Asserted,Deasserted"
bitfld.long 0x00 26.--29. "  CG_ALG ,Code group alignment indication" "Not done,Done,?..."
bitfld.long 0x00 0.--3. "    SYNC    ,Lane synchronization" "Not synchronized,Synchronized,?..."
line.long 0x04 "XAUIACR3,XAUIA Protocol Control 3"
bitfld.long 0x04 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x04 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x04 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x04 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x04 23. "  WK_ERR ,LPI wake error" "No error,Error"
tree.end
tree "XFI Protocol Registers"
group.long (0x1984+0x04)++0x03
line.long 0x00 "XFIACR1,XFI A Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x1984+0x0C)++0x03
line.long 0x00 "XFIACR3,XFI A Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x1994+0x04)++0x03
line.long 0x00 "XFIBCR1,XFI B Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x1994+0x0C)++0x03
line.long 0x00 "XFIBCR3,XFI B Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19A4+0x04)++0x03
line.long 0x00 "XFICCR1,XFI C Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19A4+0x0C)++0x03
line.long 0x00 "XFICCR3,XFI C Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19B4+0x04)++0x03
line.long 0x00 "XFIDCR1,XFI D Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19B4+0x0C)++0x03
line.long 0x00 "XFIDCR3,XFI D Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19C4+0x04)++0x03
line.long 0x00 "XFIECR1,XFI E Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19C4+0x0C)++0x03
line.long 0x00 "XFIECR3,XFI E Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19D4+0x04)++0x03
line.long 0x00 "XFIFCR1,XFI F Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19D4+0x0C)++0x03
line.long 0x00 "XFIFCR3,XFI F Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19E4+0x04)++0x03
line.long 0x00 "XFIGCR1,XFI G Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19E4+0x0C)++0x03
line.long 0x00 "XFIGCR3,XFI G Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19F4+0x04)++0x03
line.long 0x00 "XFIHCR1,XFI H Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19F4+0x0C)++0x03
line.long 0x00 "XFIHCR3,XFI H Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
tree.end
width 0x0B
tree.end
tree "Serdes 2"
base ad:0x01EB0000
width 12.
tree "PLL Registers"
if (((per.l(ad:0x01EB0000+0x0))&0x60000000)==(0x40000000||0x20000000))
group.long 0x0++0x03
line.long 0x00 "PLL1RSTCTL,SerDes PLL 1 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
rbitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "Not done,Done"
rbitfld.long 0x00 29. "           RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
else
rgroup.long 0x0++0x03
line.long 0x00 "PLL1RSTCTL,SerDes PLL 1 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
bitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "In progress,Complete"
bitfld.long 0x00 29. "        RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
endif
group.long (0x0+0x04)++0x07
line.long 0x00 "PLL1CR0,SerDes PLL 1 Control 0 Register"
bitfld.long 0x00 31. " POFF               ,Power down an unused PLL" "PLL on,PLL off"
bitfld.long 0x00 28.--30. "           RFCLK_SEL       ,Reference clock frequency select" "100 MHz,125 MHz,156.25 MHz,150 MHz,?..."
bitfld.long 0x00 27. "         RFCLK_EN         ,Reference clock observe enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 23. " PLL_LCK            ,Indicates PLL(n) has calibrated and locked" "Not locked,Locked"
bitfld.long 0x00 16.--19. "        FRATE_SEL       ,Selects frequency of PLL VCO" "5.00 GHz,,,,,,5.15625 GHz,4.00 GHz,,3.125 GHz,3.00 GHz,?..."
bitfld.long 0x00 0.--1. "        DLYDIV_SEL       ,Selects PLL1_ex_dly_clk divider value" "Off,VCOBY2/8 = VCOFRATE_SEL/16,?..."
line.long 0x04 "PLL1CR1,SerDes PLL 1 Control 1 Register"
bitfld.long 0x04 27. " PLLBW_SEL          ,Selects higher PLL 1 bandwidth" "Nominal BW,BW setting"
group.long (0x0+0x18)++0x03
line.long 0x00 "PLL1CR5,SerDes PLL 1 Control 5 Register"
bitfld.long 0x00 31. " SEL_REFCLK_AMP_DIS ,Disables ref. clock amplifier and selects usage of ref. clock coming from left SoC or another 10G lynx PLL" "No,Yes"
bitfld.long 0x00 27. "               LEFT_REF_BUF_EN ,Enables for left directed reference clock buffer" "Disabled,Enabled"
bitfld.long 0x00 24. "           RIGHT_REF_BUF_EN ,Enables for right directed reference clock buffer" "Disabled,Enabled"
if (((per.l(ad:0x01EB0000+0x20))&0x60000000)==(0x40000000||0x20000000))
group.long 0x20++0x03
line.long 0x00 "PLL2RSTCTL,SerDes PLL 2 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
rbitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "Not done,Done"
rbitfld.long 0x00 29. "           RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
else
rgroup.long 0x20++0x03
line.long 0x00 "PLL2RSTCTL,SerDes PLL 2 Reset Control Register"
bitfld.long 0x00 31. " RSTREQ             ,PLL reset request" "Not requested,Requested"
bitfld.long 0x00 30. "     RST_DONE        ,Indicates state of reset sequence" "In progress,Complete"
bitfld.long 0x00 29. "        RST_ERR          ,No PLL lock before counter time_out" "No error,Error"
newline
bitfld.long 0x00 7. " PLLRST_B           ,Resets PLLa lock detect and test circuitry" "Force PLL reset,Application mode"
bitfld.long 0x00 6. "  SDRST_B         ,Resets all lanes operating from PLL 1" "Force group reset,Application mode"
bitfld.long 0x00 5. "  SDEN             ,SerDes enable" "Disabled,Enabled"
endif
group.long (0x20+0x04)++0x07
line.long 0x00 "PLL2CR0,SerDes PLL 2 Control 0 Register"
bitfld.long 0x00 31. " POFF               ,Power down an unused PLL" "PLL on,PLL off"
bitfld.long 0x00 28.--30. "           RFCLK_SEL       ,Reference clock frequency select" "100 MHz,125 MHz,156.25 MHz,150 MHz,?..."
bitfld.long 0x00 27. "         RFCLK_EN         ,Reference clock observe enable" "Disabled,Enabled"
newline
rbitfld.long 0x00 23. " PLL_LCK            ,Indicates PLL(n) has calibrated and locked" "Not locked,Locked"
bitfld.long 0x00 16.--19. "        FRATE_SEL       ,Selects frequency of PLL VCO" "5.00 GHz,,,,,,5.15625 GHz,4.00 GHz,,3.125 GHz,3.00 GHz,?..."
bitfld.long 0x00 0.--1. "        DLYDIV_SEL       ,Selects PLL1_ex_dly_clk divider value" "Off,VCOBY2/8 = VCOFRATE_SEL/16,?..."
line.long 0x04 "PLL2CR1,SerDes PLL 2 Control 1 Register"
bitfld.long 0x04 27. " PLLBW_SEL          ,Selects higher PLL 2 bandwidth" "Nominal BW,BW setting"
group.long (0x20+0x18)++0x03
line.long 0x00 "PLL1CR5,SerDes PLL 1 Control 5 Register"
bitfld.long 0x00 31. " SEL_REFCLK_AMP_DIS ,Disables ref. clock amplifier and selects usage of ref. clock coming from left SoC or another 10G lynx PLL" "No,Yes"
bitfld.long 0x00 27. "               LEFT_REF_BUF_EN ,Enables for left directed reference clock buffer" "Disabled,Enabled"
bitfld.long 0x00 24. "           RIGHT_REF_BUF_EN ,Enables for right directed reference clock buffer" "Disabled,Enabled"
tree.end
width 9.
tree "General Registers"
group.long 0x90++0x07
line.long 0x00 "TCALCR,SerDes Transmit Calibration Control Register"
bitfld.long 0x00 27. " CALRST_B             ,Reset the transmit calibration in the right endcap cell (active_low signal)" "Reset,Application mode"
line.long 0x04 "TCALCR1,SerDes Transmit Calibration Control 1 Register"
bitfld.long 0x04 27. " DIG_OUT_REFCLK_EN    ,Enables CMOS digital buffered version of selected ref_clk to the right" "Disabled,Enabled"
bitfld.long 0x04 24. "          ANA_OUT_REFCLK_EN ,Enables CML analog buffered version of selected ref_clk to the left" "Disabled,Enabled"
group.long 0xA0++0x07
line.long 0x00 "RCALCR,Receive Calibration Control Register"
bitfld.long 0x00 27. " CALRST_B             ,Reset the receiver calibration in the left endcap cell" "Reset,Application mode"
line.long 0x04 "RCALCR1,SerDes Receive Calibration Control 1 Register"
bitfld.long 0x04 31. " ANA_IN_REFCLK_BUF_EN ,Enables CML analog buffer used to transition SoC reference clock to 10G lynx" "Disabled,Enabled"
bitfld.long 0x04 27. "          DIG_OUT_REFCLK_EN ,Enables CMOS digital buffered version of selected ref_clk to the left" "Disabled,Enabled"
bitfld.long 0x04 24. "  ANA_OUT_REFCLK_EN ,Enables CML analog buffered version of selected ref_clk to the left" "Disabled,Enabled"
newline
rbitfld.long 0x04 0.--1. " BI_REFCTL_OUT        ,Output COP DFT/burnin/JTAG reference clock controls to wrapper" "0,1,2,3"
group.long 0xB0++0x03
line.long 0x00 "GR0,General Control 0 Register"
bitfld.long 0x00 14. " XPAD_SEL             ,Describes to serdes module the value of the power supply being used by the serdes I/Os" "1.5V,1.35V"
tree.end
width 10.
tree "Lane Protocol Select Status Registers"
rgroup.long 0x100++0x03
line.long 0x00 "LNAPSSR0,Lane A Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x120++0x03
line.long 0x00 "LNBPSSR0,Lane B Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x140++0x03
line.long 0x00 "LNCPSSR0,Lane C Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x160++0x03
line.long 0x00 "LNDPSSR0,Lane D Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x180++0x03
line.long 0x00 "LNEPSSR0,Lane E Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1A0++0x03
line.long 0x00 "LNFPSSR0,Lane F Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1C0++0x03
line.long 0x00 "LNGPSSR0,Lane G Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
rgroup.long 0x1E0++0x03
line.long 0x00 "LNHPSSR0,Lane H Protocol Select Status 0 Register"
hexmask.long.byte 0x00 24.--30. 1. " TYPE ,Protocol type"
bitfld.long 0x00 16.--19. "  MAC ,MAC instance within CNTRL" "MAC1,MAC2,MAC3,MAC4,MAC5,MAC6,MAC7,MAC8,MAC9,MAC10,MAC11,MAC12,MAC13,MAC14,MAC15,MAC16"
bitfld.long 0x00 8.--10. "  PCS ,PCS instance of TYPE within PHY" "PCSa/1,PCSb/2,PCSc/3,PCSd/4,PCSe/5,PCSf/6,PCSg/7,PCSh/8"
newline
bitfld.long 0x00 0.--2. " LANE ,Lane number within PCS" "0,1,2,3,4,5,6,7"
tree.end
width 7.
tree "Protocol Configuration Registers"
group.long 0x200++0x03
line.long 0x00 "PCCR0,Protocol Configuration 0 Register"
bitfld.long 0x00 28.--30. " PEXA_CFG    ,PEXa configuration" "Disabled,x1 on Lane 0,,x4 [3:0] on lanes [3:0],x8 [7:0] on lanes [7:0],?..."
bitfld.long 0x00 24.--26. "                      PEXB_CFG    ,PEXb configuration" "Disabled,x1 on lane 4,x2 [1:0] on lanes [5:4],x4 [3:0] on lanes [7:4],?..."
group.long 0x208++0x03
line.long 0x00 "PCCR2,Protocol Configuration 2 Register"
bitfld.long 0x00 28.--30. " SATAA_CFG   ,SATAa configuration" "Disabled,x1 on lane 6,?..."
bitfld.long 0x00 24.--26. "                                 SATAB_CFG   ,SATAb configuration" "Disabled,x2 on lane 7,?..."
group.long 0x220++0x0F
line.long 0x00 "PCCR8,Protocol Configuration 8 Register"
bitfld.long 0x00 31. " SGMIIA_KX   ,SGMIIa 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 28.--30. "                             SGMIIA_CFG  ,SGMIIa configuration" "Disabled,x1 on lane 0 to WRIOPE MAC 9,?..."
newline
bitfld.long 0x00 27. " SGMIIB_KX   ,SGMIIc 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 24.--26. "                             SGMIIB_CFG  ,SGMIIb configuration" "Disabled,x1 on lane 1 to WRIOPE MAC 10,?..."
newline
bitfld.long 0x00 23. " SGMIIC_KX   ,SGMIId 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 20.--22. "                             SGMIIC_CFG  ,SGMIIc configuration" "Disabled,x1 on lane 2 to WRIOPE MAC 11,?..."
newline
bitfld.long 0x00 19. " SGMIID_KX   ,SGMIIe 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 16.--18. "                             SGMIID_CFG  ,SGMIId configuration" "Disabled,x1 on lane 3 to WRIOPE MAC 12,?..."
newline
bitfld.long 0x00 15. " SGMIIE_KX   ,SGMIIf 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 12.--14. "                             SGMIIE_CFG  ,SGMIIe configuration" "Disabled,x1 on lane 4 to WRIOPE MAC 13,?..."
newline
bitfld.long 0x00 11. " SGMIIF_KX   ,SGMIIf 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 8.--10. "                             SGMIIF_CFG  ,SGMIIf configuration" "Disabled,x1 on lane 5 to WRIOPE MAC 14,?..."
newline
bitfld.long 0x00 7. " SGMIIG_KX   ,SGMIIg 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 4.--6. "                             SGMIIG_CFG  ,SGMIIg configuration" "Disabled,x1 on lane 6 to WRIOPE MAC 15,?..."
newline
bitfld.long 0x00 3. " SGMIIH_KX   ,SGMIIh 1000base-KX configuration" "SGMII mode,1000Base-KX mode"
bitfld.long 0x00 0.--2. "                             SGMIIH_CFG  ,SGMIIh configuration" "Disabled,x1 on lane 7 to WRIOPE MAC 16,?..."
line.long 0x04 "PCCR9,Protocol Configuration 9 Register"
bitfld.long 0x04 28.--30. " QSGMIIA_CFG ,QSGMIIa configuration" "Disabled,?..."
bitfld.long 0x04 24.--26. "                                     QSGMIIB_CFG ,QSGMIIb configuration" "Disabled,?..."
newline
bitfld.long 0x04 20.--22. " QSGMIIC_CFG ,SGMIIc configuration" "Disabled,?..."
bitfld.long 0x04 16.--18. "                                     QSGMIID_CFG ,SGMIId configuration" "Disabled,?..."
line.long 0x08 "PCCRA,Protocol Configuration A Register"
bitfld.long 0x08 31. " XAUIA_LRV   ,XAUIa lane reversal" "Not reversed,Reversed"
bitfld.long 0x08 28. "                                 XAUIA_CFG   ,XAUIa configuration" "Disabled,?..."
newline
bitfld.long 0x08 27. " XAUIB_LRV   ,XAUIb lane reversal" "Not reversed,Reversed"
bitfld.long 0x08 24. "                                 XAUIB_CFG   ,XAUIb configuration" "Disabled,?..."
line.long 0x0C "PCCRB,Protocol Configuration B Register"
bitfld.long 0x0C 28.--30. " XFIA_CFG    ,XFIa configuration" "Disabled,?..."
bitfld.long 0x0C 24.--26. "                                     XFIB_CFG    ,XFIb configuration" "Disabled,?..."
newline
bitfld.long 0x0C 20.--22. " XFIC_CFG    ,XFIc configuration" "Disabled,?..."
bitfld.long 0x0C 16.--18. "                                     XFID_CFG    ,XFId configuration" "Disabled,?..."
newline
bitfld.long 0x0C 12.--14. " XFIE_CFG    ,XFIe configuration" "Disabled,?..."
bitfld.long 0x0C 8.--10. "                                     XFIF_CFG    ,XFIf configuration" "Disabled,?..."
newline
bitfld.long 0x0C 4.--6. " XFIG_CFG    ,XFIg configuration" "Disabled,?..."
bitfld.long 0x0C 0.--2. "                                     XFIH_CFG    ,XFIh configuration" "Disabled,?..."
tree.end
width 12.
tree "PCIe Equalization Configuration Registers"
group.long 0x300++0x03
line.long 0x00 "PEXEQCR,PCIe Equalization Configuration Register"
bitfld.long 0x00 6.--11. " FS  ,PCI express FS value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--5. "          LF  ,PCI express LF value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0x304++0x03
line.long 0x00 "PEXEQP0 CR,PCIe Equalization Preset Register 0 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x308++0x03
line.long 0x00 "PEXEQP1 CR,PCIe Equalization Preset Register 1 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x30C++0x03
line.long 0x00 "PEXEQP2 CR,PCIe Equalization Preset Register 2 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x310++0x03
line.long 0x00 "PEXEQP3 CR,PCIe Equalization Preset Register 3 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x314++0x03
line.long 0x00 "PEXEQP4 CR,PCIe Equalization Preset Register 4 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x318++0x03
line.long 0x00 "PEXEQP5 CR,PCIe Equalization Preset Register 5 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x31C++0x03
line.long 0x00 "PEXEQP6 CR,PCIe Equalization Preset Register 6 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x320++0x03
line.long 0x00 "PEXEQP7 CR,PCIe Equalization Preset Register 7 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x324++0x03
line.long 0x00 "PEXEQP8 CR,PCIe Equalization Preset Register 8 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x328++0x03
line.long 0x00 "PEXEQP9 CR,PCIe Equalization Preset Register 9 "
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
group.long 0x32C++0x03
line.long 0x00 "PEXEQP10CR,PCIe Equalization Preset Register 10"
bitfld.long 0x00 12.--17. " CP1 ,C(+1) preset value" "6'b00_1100,6'b00_1000,6'b00_1010,6'b00_0110,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_1001,6'b00_0110,6'b00_0000,6'b00_1010,?..."
bitfld.long 0x00 0.--5. "  CM1 ,C(-1) preset value" "6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0000,6'b00_0101,6'b00_0110,6'b00_0101,6'b00_0110,6'b00_1000,6'b00_0110,?..."
tree.end
width 11.
tree "Lane A General Control Registers"
if (((per.l(ad:0x01EB0000+0x800))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x800+0x04)++0x03
line.long 0x00 "LNAGCR1,General Control 1 - Lane A Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x800+0x0C)++0x03
line.long 0x00 "LNASSCR0,Speed Switch Control 0 - Lane A Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x800++0x03
line.long 0x00 "LNAGCR0,General Control 0 - Lane A Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane A to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane A" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane A (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane A" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane A" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane A" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x800+0x04)++0x03
line.long 0x00 "LNAGCR1,General Control 1 - Lane A Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x800+0x0C)++0x03
line.long 0x00 "LNASSCR0,Speed Switch Control 0 - Lane A Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x800+0x10)++0x03
line.long 0x00 "LNARECR0,Receive Equalization Control 0 - Lane A Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x800+0x14)++0x03
line.long 0x00 "LNARECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x800+0x18)++0x03
line.long 0x00 "LNATECR0,Lane A Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x1C)++0x03
line.long 0x00 "LNASSCR1,Lane A Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x20)++0x03
line.long 0x00 "LNATTLCR0,Lane A TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x800+0x3C)++0x03
line.long 0x00 "LNATCSR3,Lane A Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane A" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane B General Control Registers"
if (((per.l(ad:0x01EB0000+0x840))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x840+0x04)++0x03
line.long 0x00 "LNBGCR1,General Control 1 - Lane B Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x840+0x0C)++0x03
line.long 0x00 "LNBSSCR0,Speed Switch Control 0 - Lane B Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x840++0x03
line.long 0x00 "LNBGCR0,General Control 0 - Lane B Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane B to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane B" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane B (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane B" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane B" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane B" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x840+0x04)++0x03
line.long 0x00 "LNBGCR1,General Control 1 - Lane B Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x840+0x0C)++0x03
line.long 0x00 "LNBSSCR0,Speed Switch Control 0 - Lane B Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x840+0x10)++0x03
line.long 0x00 "LNBRECR0,Receive Equalization Control 0 - Lane B Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x840+0x14)++0x03
line.long 0x00 "LNBRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x840+0x18)++0x03
line.long 0x00 "LNBTECR0,Lane B Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x1C)++0x03
line.long 0x00 "LNBSSCR1,Lane B Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x20)++0x03
line.long 0x00 "LNBTTLCR0,Lane B TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x840+0x3C)++0x03
line.long 0x00 "LNBTCSR3,Lane B Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane B" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane C General Control Registers"
if (((per.l(ad:0x01EB0000+0x880))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x880+0x04)++0x03
line.long 0x00 "LNCGCR1,General Control 1 - Lane C Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x880+0x0C)++0x03
line.long 0x00 "LNCSSCR0,Speed Switch Control 0 - Lane C Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x880++0x03
line.long 0x00 "LNCGCR0,General Control 0 - Lane C Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane C to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane C" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane C (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane C" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane C" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane C" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x880+0x04)++0x03
line.long 0x00 "LNCGCR1,General Control 1 - Lane C Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x880+0x0C)++0x03
line.long 0x00 "LNCSSCR0,Speed Switch Control 0 - Lane C Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x880+0x10)++0x03
line.long 0x00 "LNCRECR0,Receive Equalization Control 0 - Lane C Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x880+0x14)++0x03
line.long 0x00 "LNCRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x880+0x18)++0x03
line.long 0x00 "LNCTECR0,Lane C Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x1C)++0x03
line.long 0x00 "LNCSSCR1,Lane C Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x20)++0x03
line.long 0x00 "LNCTTLCR0,Lane C TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x880+0x3C)++0x03
line.long 0x00 "LNCTCSR3,Lane C Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane C" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane D General Control Registers"
if (((per.l(ad:0x01EB0000+0x8C0))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x8C0+0x04)++0x03
line.long 0x00 "LNDGCR1,General Control 1 - Lane D Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x8C0+0x0C)++0x03
line.long 0x00 "LNDSSCR0,Speed Switch Control 0 - Lane D Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x8C0++0x03
line.long 0x00 "LNDGCR0,General Control 0 - Lane D Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane D to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane D" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane D (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane D" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane D" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane D" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x8C0+0x04)++0x03
line.long 0x00 "LNDGCR1,General Control 1 - Lane D Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x8C0+0x0C)++0x03
line.long 0x00 "LNDSSCR0,Speed Switch Control 0 - Lane D Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x8C0+0x10)++0x03
line.long 0x00 "LNDRECR0,Receive Equalization Control 0 - Lane D Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x8C0+0x14)++0x03
line.long 0x00 "LNDRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x8C0+0x18)++0x03
line.long 0x00 "LNDTECR0,Lane D Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x1C)++0x03
line.long 0x00 "LNDSSCR1,Lane D Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x20)++0x03
line.long 0x00 "LNDTTLCR0,Lane D TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x8C0+0x3C)++0x03
line.long 0x00 "LNDTCSR3,Lane D Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane D" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane E General Control Registers"
if (((per.l(ad:0x01EB0000+0x900))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x900+0x04)++0x03
line.long 0x00 "LNEGCR1,General Control 1 - Lane E Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x900+0x0C)++0x03
line.long 0x00 "LNESSCR0,Speed Switch Control 0 - Lane E Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x900++0x03
line.long 0x00 "LNEGCR0,General Control 0 - Lane E Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane E to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane E" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane E (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane E" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane E" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane E" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x900+0x04)++0x03
line.long 0x00 "LNEGCR1,General Control 1 - Lane E Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x900+0x0C)++0x03
line.long 0x00 "LNESSCR0,Speed Switch Control 0 - Lane E Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x900+0x10)++0x03
line.long 0x00 "LNERECR0,Receive Equalization Control 0 - Lane E Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x900+0x14)++0x03
line.long 0x00 "LNERECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x900+0x18)++0x03
line.long 0x00 "LNETECR0,Lane E Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x1C)++0x03
line.long 0x00 "LNESSCR1,Lane E Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x20)++0x03
line.long 0x00 "LNETTLCR0,Lane E TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x900+0x3C)++0x03
line.long 0x00 "LNETCSR3,Lane E Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane E" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane F General Control Registers"
if (((per.l(ad:0x01EB0000+0x940))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x940+0x04)++0x03
line.long 0x00 "LNFGCR1,General Control 1 - Lane F Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x940+0x0C)++0x03
line.long 0x00 "LNFSSCR0,Speed Switch Control 0 - Lane F Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x940++0x03
line.long 0x00 "LNFGCR0,General Control 0 - Lane F Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane F to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane F" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane F (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane F" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane F" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane F" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x940+0x04)++0x03
line.long 0x00 "LNFGCR1,General Control 1 - Lane F Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x940+0x0C)++0x03
line.long 0x00 "LNFSSCR0,Speed Switch Control 0 - Lane F Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x940+0x10)++0x03
line.long 0x00 "LNFRECR0,Receive Equalization Control 0 - Lane F Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x940+0x14)++0x03
line.long 0x00 "LNFRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x940+0x18)++0x03
line.long 0x00 "LNFTECR0,Lane F Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x1C)++0x03
line.long 0x00 "LNFSSCR1,Lane F Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x20)++0x03
line.long 0x00 "LNFTTLCR0,Lane F TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x940+0x3C)++0x03
line.long 0x00 "LNFTCSR3,Lane F Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane F" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane G General Control Registers"
if (((per.l(ad:0x01EB0000+0x980))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x980+0x04)++0x03
line.long 0x00 "LNGGCR1,General Control 1 - Lane G Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x980+0x0C)++0x03
line.long 0x00 "LNGSSCR0,Speed Switch Control 0 - Lane G Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x980++0x03
line.long 0x00 "LNGGCR0,General Control 0 - Lane G Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane G to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane G" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane G (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane G" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane G" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane G" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x980+0x04)++0x03
line.long 0x00 "LNGGCR1,General Control 1 - Lane G Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x980+0x0C)++0x03
line.long 0x00 "LNGSSCR0,Speed Switch Control 0 - Lane G Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x980+0x10)++0x03
line.long 0x00 "LNGRECR0,Receive Equalization Control 0 - Lane G Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x980+0x14)++0x03
line.long 0x00 "LNGRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x980+0x18)++0x03
line.long 0x00 "LNGTECR0,Lane G Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x1C)++0x03
line.long 0x00 "LNGSSCR1,Lane G Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x20)++0x03
line.long 0x00 "LNGTTLCR0,Lane G TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x980+0x3C)++0x03
line.long 0x00 "LNGTCSR3,Lane G Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane G" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
tree "Lane H General Control Registers"
if (((per.l(ad:0x01EB0000+0x9C0))&0xF80)==(0x00||0x100))&&(((per.l(ad:0x01EB0000+0xC0))&0x80000000)==0x00)
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
rbitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
rbitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x9C0+0x04)++0x03
line.long 0x00 "LNHGCR1,General Control 1 - Lane H Register"
rbitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x9C0+0x0C)++0x03
line.long 0x00 "LNHSSCR0,Speed Switch Control 0 - Lane H Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_0   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_0   ,Phase interpolator output clock edge control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_0     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use RX Eq offset"
newline
bitfld.long 0x00 15. " OSETOVD6_0     ,Binary decode of lane adaptive equalization offset - initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                 SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
else
if (((per.l(ad:0x01EB0000+0x20))&0x80000000)==0x80000000)||(((per.l(ad:0x01EB0000+0x00))&0x80000000)==0x80000000)
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
rbitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
rbitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,No reset"
newline
rbitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
rbitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
else
group.long 0x9C0++0x03
line.long 0x00 "LNHGCR0,General Control 0 - Lane H Register"
bitfld.long 0x00 31. " RPLL_LES       ,Directs the RX portion of lane H to use the corresponding PLL" "PLL2,PLL1"
bitfld.long 0x00 28.--29. "                           RRAT_SEL       ,Receiver speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 27. "                        TPLL_LES       ,Used to direct the TX portion of lane to use the corresponding PLL" "PLL2,PLL1"
newline
bitfld.long 0x00 24.--25. " TRAT_SEL       ,Transmitter speed selection for lane H" "FRATE_SEL,FRATE_SEL/2,FRATE_SEL/4,FRATE_SEL*2"
bitfld.long 0x00 22. "                    RRST_B         ,Resets receiver for lane H (active_low signal)" "Reset,No reset"
bitfld.long 0x00 21. "                           TRST_B         ,Resets transmitter for lane H" "Reset,Application mode"
newline
bitfld.long 0x00 20. " RX_PD          ,Lane powerdown for receiver on lane H" "Active,Powered down"
bitfld.long 0x00 19. "                   TX_PD          ,Lane powerdown for transmitter on lane H" "Active,Powered down"
bitfld.long 0x00 18. "                       IF20BIT_EN     ,20-bit interface enable" "10-bit,20-bit"
newline
bitfld.long 0x00 16. " FIRST_LANE     ,Indicates this lane is the first (lane 0) of a group of lanes" "Not first,First"
bitfld.long 0x00 7.--11. "                      PROTS          ,Lane protocol select" "PCIe,SGMII/1000Base-KX/QSGMII/OC-SGMII,SATA,,,,,,,,XFI,?..."
endif
group.long (0x9C0+0x04)++0x03
line.long 0x00 "LNHGCR1,General Control 1 - Lane H Register"
bitfld.long 0x00 31. " RDAT_INV       ,Invert rx data" "Not inverted,Inverted"
bitfld.long 0x00 30. "                   TDAT_INV       ,Invert tx data" "Not inverted,Inverted"
bitfld.long 0x00 26. "                       OPAD_CTL       ,TX output pad control signal for common mode" "Transmitter enabled,Common mode"
newline
bitfld.long 0x00 20.--22. " REIDL_TH       ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 18.--19. "                              REIDL_EX_SEL   ,Exit electrical idle filter select = {REIDL_EX_MSBREIDL_EX_SEL}" "0,1,2,3"
bitfld.long 0x00 16.--17. "                                  REIDL_ET_SEL   ,Enter idle filter select = {REIDL_ET_MSBREIDL_ET_SEL}" "0,1,2,3"
newline
bitfld.long 0x00 15. " REIDL_EX_MSB   ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 14. "                              REIDL_ET_MSB   ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 13. "                                  REQ_CTL_SNP    ,Initiate snapshot of RX equalization control gaink2 gaink3 and offset registers" "Not requested,Requested"
newline
bitfld.long 0x00 12. " REQ_CDR_SNP    ,Initiate snapshot of RX clock/data recovery registers" "Not requested,Requested"
bitfld.long 0x00 7. "                  TRSTDIR        ,Multi-lane protocol tx clock synchronization control" "0,1"
bitfld.long 0x00 6. "                                  REQ_BIN_SNP    ,Initiate snapshot of RX equalization control binning registers" "Not requested,Requested"
newline
bitfld.long 0x00 4.--5. " ISLEW_RCTL     ,Slew control for quadrature generator" "0,1,2,3"
bitfld.long 0x00 0.--1. "                              OSLEW_RCTL     ,Phase interpolator output clock edge rate control" "0,1,2,3"
group.long (0x9C0+0x0C)++0x03
line.long 0x00 "LNHSSCR0,Speed Switch Control 0 - Lane H Register"
bitfld.long 0x00 29.--31. " REIDL_TH_0     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_0 ,Exit electrical idle filter select = {REIDL_EX_MSB_0REIDL_EX_SEL_0}" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_0 ,Enter idle filter select = {REIDL_ET_MSB_0REIDL_ET_SEL_0}" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_0 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_0 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 18. "                                  RXEQ_BST_0     ,Rx equalization boost" "0,1"
newline
bitfld.long 0x00 16.--17. " BASE_WAND_0    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use lnx_(m)_rx_eq_offset[4:0]"
bitfld.long 0x00 15. "  OSETOVD6_0     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                                  TEQ_TYPE_0     ,Lane transmit equalization" "No TX equalization,2 levels,3 levels,?..."
newline
bitfld.long 0x00 12. " SGN_PREQ_0     ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 11. "                       SGN_POST1Q_0   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                           RATIO_PST1Q_0  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 0.--5. " AMP_RED_0      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
endif
group.long (0x9C0+0x10)++0x03
line.long 0x00 "LNHRECR0,Receive Equalization Control 0 - Lane H Register"
bitfld.long 0x00 28. " RXEQ_BST       ,Rx equalization boost" "0,1"
bitfld.long 0x00 24.--27. "                              GK2OVD         ,Binary decode of lane adaptive equalization gaink2 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
bitfld.long 0x00 16.--19. "                                GK3OVD         ,Binary decode of lane adaptive equalization gaink3 initialization or override value" "Max,1,2,3,4,5,6,7,8,9,10,11,12,13,14,Min"
newline
bitfld.long 0x00 15. " GK2OVD_EN      ,Controls source of rx equalization gaink2 setting" "Use rxeq,Fix gaink2"
bitfld.long 0x00 14. "                     GK3OVD_EN      ,Controls source of rx equalization gaink3 setting" "Use rxeq,Fix gaink3"
bitfld.long 0x00 13. "                         OSETOVD_EN     ,Controls source of rx equalization offset" "Adjusted,Fixed"
newline
bitfld.long 0x00 10.--11. " BASE_WAND      ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
bitfld.long 0x00 6. "          OSETOVD[6]     ,Double imposed offset" "Not doubled,Doubled"
bitfld.long 0x00 0.--5. "                        OSETOVD[5:0]   ,Binary decode of lane adaptive equalization offset - initialization or override value" "Max +,00_0001,00_0010,00_0011,00_0100,00_0101,00_0110,00_0111,00_1000,00_1001,00_1010,00_1011,00_1100,00_1101,00_1110,00_1111,01_0000,01_0001,01_0010,01_0011,01_0100,01_0101,01_0110,01_0111,01_1000,01_1001,01_1010,01_1011,01_1100,01_1101,01_1110,No offset,10_0000,10_0001,10_0010,10_0011,10_0100,10_0101,10_0110,10_0111,10_1000,10_1001,10_1010,10_1011,10_1100,10_1101,10_1110,10_1111,11_0000,11_0001,11_0010,11_0011,11_0100,11_0101,11_0110,11_0111,11_1000,11_1001,11_1010,11_1011,11_1100,11_1101,11_1110,Max -"
rgroup.long (0x9C0+0x14)++0x03
line.long 0x00 "LNHRECR1,Receive Equalization Control 1 - Lane 0 Register"
bitfld.long 0x00 2. " EQ_BSNP_DN     ,Snapshot of RX EQ bin complete" "Not done,Done"
bitfld.long 0x00 1. "                       EQ_CSNP_DN     ,Snapshot of RX EQ ctrl complete" "Not done,Done"
bitfld.long 0x00 0. "                           CDR_SNP_DN     ,Snapshot of CDR loop complete" "Not done,Done"
group.long (0x9C0+0x18)++0x03
line.long 0x00 "LNHTECR0,Lane H Transmit Equalization Control 0 Register"
bitfld.long 0x00 28.--29. " TEQ_TYPE       ,Select amount/type of transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 26. "                SGN_PREQ       ,Precursor sign" "Negative,Positive"
bitfld.long 0x00 22.--25. "                           RATIO_PREQ     ,Ratio of full swing transition bit to pre-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 21. " SGN_POST1Q     ,Post q sign" "Negative,Positive"
bitfld.long 0x00 16.--20. "                       RATIO_PST1Q    ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 8.--13. "                                 ADPT_EQ        ,Transmitter adjustments for 8G/10G" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x00 0.--5. " AMP_RED        ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x1C)++0x03
line.long 0x00 "LNHSSCR1,Lane H Speed Switch Control 1 Register"
bitfld.long 0x00 29.--31. " REIDL_TH_1     ,Receiver electrical idle detection threshold control" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 27.--28. "                              REIDL_EX_SEL_1 ,Exit electrical idle filter select = REIDL_EX_MSB_1||REIDL_EX_SEL_1" "0,1,2,3"
bitfld.long 0x00 25.--26. "                                  REIDL_ET_SEL_1 ,Enter idle filter select = REIDL_ET_MSB_1||REIDL_ET_SEL_1" "0,1,2,3"
newline
bitfld.long 0x00 24. " REIDL_EX_MSB_1 ,Exit idle filter select MSB" "0,1"
bitfld.long 0x00 23. "                              REIDL_ET_MSB_1 ,Enter idle filter select MSB" "0,1"
bitfld.long 0x00 21.--22. "                                  ISLEW_RCTL_1   ,Slew control for quadrature generator" "0,1,2,3"
newline
bitfld.long 0x00 19.--20. " OSLEW_RCTL_1   ,Phase interpolator output clock edge rate control" "0,1,2,3"
bitfld.long 0x00 18. "                              RXEQ_BST_1     ,Rx equalization boost" "0,1"
bitfld.long 0x00 16.--17. "                                  BASE_WAND_1    ,Baseline wander control select" "Off,Def. BinBLW threshold,Alternate BinBLW sign,Use OSETOVD[4:0]"
newline
bitfld.long 0x00 15. " OSETOVD6_1     ,Binary decode of lane adaptive equalization offset initialization or override value" "0,1"
bitfld.long 0x00 13.--14. "                              TEQ_TYPE_1     ,Lane transmit equalization" "No equalization,2 levels,3 levels,?..."
bitfld.long 0x00 12. "                    SGN_PREQ_1     ,Precursor sign" "Negative,Positive"
newline
bitfld.long 0x00 11. " SGN_POST1Q_1   ,Post1q sign" "Negative,Positive"
bitfld.long 0x00 6.--10. "                       RATIO_PST1Q_1  ,Ratio of full swing transition bit to first post-cursor" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--5. "                                 AMP_RED_1      ,Overall TX amplitude reduction" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x20)++0x03
line.long 0x00 "LNHTTLCR0,Lane H TTL Control 0 Register"
bitfld.long 0x00 24.--29. " FLT_SEL        ,Selects the gain kfr kph and TLL edge counting window widths" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long (0x9C0+0x3C)++0x03
line.long 0x00 "LNHTCSR3,Lane H Test Control And Status 3 Register"
bitfld.long 0x00 28.--29. " LPBK_EN        ,Loopback data from TX to RX for lane H" "Application mode,Digital loopback mode,?..."
rbitfld.long 0x00 27. "          CDR_LCK        ,When asserted CDR loop has acquired a valid rx clock" "Not valid,Valid"
tree.end
width 9.
tree "PEX Protocol Registers"
group.long 0x1000++0x03
line.long 0x00 "PEXACR0,PEX A Protocol Control 0 Register"
bitfld.long 0x00 27. " RD_SW ,Reduced swing operation for 8 GT/s" "Full,Reduced"
group.long 0x1040++0x03
line.long 0x00 "PEXBCR0,PEX B Protocol Control 0 Register"
bitfld.long 0x00 27. " RD_SW ,Reduced swing operation for 8 GT/s" "Full,Reduced"
tree.end
width 11.
tree "SGMII Protocol Registers"
group.long (0x1800+0x04)++0x03
line.long 0x00 "SGMIIACR1,SGMII A Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1800+0x0C)++0x03
line.long 0x00 "SGMIIACR3,SGMII A Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1810+0x04)++0x03
line.long 0x00 "SGMIIBCR1,SGMII B Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1810+0x0C)++0x03
line.long 0x00 "SGMIIBCR3,SGMII B Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1820+0x04)++0x03
line.long 0x00 "SGMIICCR1,SGMII C Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1820+0x0C)++0x03
line.long 0x00 "SGMIICCR3,SGMII C Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1830+0x04)++0x03
line.long 0x00 "SGMIIDCR1,SGMII D Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1830+0x0C)++0x03
line.long 0x00 "SGMIIDCR3,SGMII D Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1840+0x04)++0x03
line.long 0x00 "SGMIIECR1,SGMII E Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1840+0x0C)++0x03
line.long 0x00 "SGMIIECR3,SGMII E Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1850+0x04)++0x03
line.long 0x00 "SGMIIFCR1,SGMII F Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1850+0x0C)++0x03
line.long 0x00 "SGMIIFCR3,SGMII F Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1860+0x04)++0x03
line.long 0x00 "SGMIIGCR1,SGMII G Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1860+0x0C)++0x03
line.long 0x00 "SGMIIGCR3,SGMII G Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
group.long (0x1870+0x04)++0x03
line.long 0x00 "SGMIIHCR1,SGMII H Protocol Control 1 Register"
hexmask.long.byte 0x00 27.--31. 0x08 " MDEV_PORT ,MDIO bus port address"
bitfld.long 0x00 11. "         SGPCS_EN ,SGMII PCS enable" "Disabled,Enabled"
rgroup.long (0x1870+0x0C)++0x03
line.long 0x00 "SGMIIHCR3,SGMII H Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "  TX_ACT   ,Tx active LPI state" "Idle,Busy"
bitfld.long 0x00 27. "      RX_QU ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Idle,Busy"
bitfld.long 0x00 23. "       WK_ERR   ,Error on LPI wake" "No error,Error"
tree.end
width 12.
tree "QSGMII Protocol Registers"
group.long (0x1880+0x04)++0x03
line.long 0x00 "QSGMIIACR1,QSGMII A Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x1880+0x0C)++0x03
line.long 0x00 "QSGMIIACR3,QSGMII A Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x1890+0x04)++0x03
line.long 0x00 "QSGMIIBCR1,QSGMII B Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x1890+0x0C)++0x03
line.long 0x00 "QSGMIIBCR3,QSGMII B Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x18A0+0x04)++0x03
line.long 0x00 "QSGMIICCR1,QSGMII C Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x18A0+0x0C)++0x03
line.long 0x00 "QSGMIICCR3,QSGMII C Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
group.long (0x18B0+0x04)++0x03
line.long 0x00 "QSGMIIDCR1,QSGMII D Protocol Control 1 Register"
bitfld.long 0x00 29.--31. " MDEV_PORT ,Device port ID" "0,1,2,3,4,5,6,7"
rgroup.long (0x18B0+0x0C)++0x03
line.long 0x00 "QSGMIIDCR3,QSGMII D Protocol Control 3 Register"
bitfld.long 0x00 19. " WK_ERR0   ,Port 0 error on LPI wake" "No error,Error"
bitfld.long 0x00 18. "    WK_ERR1 ,Port 1 error on LPI wake" "No error,Error"
bitfld.long 0x00 17. "    WK_ERR2 ,Port 2 error on LPI wake" "No error,Error"
newline
bitfld.long 0x00 16. " WK_ERR3   ,Port 3 error on LPI wake" "No error,Error"
bitfld.long 0x00 15. "    TX_QU0  ,Port 0 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 14. "   TX_QU1  ,Port 1 tx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 13. " TX_QU2    ,Port 2 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 12. "   TX_QU3  ,Port 3 tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 11. "   TX_ACT0 ,Port 0 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 10. " TX_ACT1   ,Port 1 tx active LPI state" "Not active,Active"
bitfld.long 0x00 9. "  TX_ACT2 ,Port 2 tx active LPI state" "Not active,Active"
bitfld.long 0x00 8. "  TX_ACT3 ,Port 3 tx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 7. " RX_QU0    ,Port 0 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 6. "   RX_QU1  ,Port 1 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 5. "   RX_QU2  ,Port 2 rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 4. " RX_QU3    ,Port 3 rx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 3. "   RX_ACT0 ,Port 0 rx active LPI state" "Not active,Active"
bitfld.long 0x00 2. "  RX_ACT1 ,Port 1 rx active LPI state" "Not active,Active"
newline
bitfld.long 0x00 1. " RX_ACT2   ,Port 2 rx active LPI state" "Not active,Active"
bitfld.long 0x00 0. "  RX_ACT3 ,Port 3 rx active LPI state" "Not active,Active"
tree.end
width 10.
tree "XAUI Protocol Registers"
rgroup.long 0x1904++0x07
line.long 0x00 "XAUIACR1,XAUIA Protocol Control 1"
bitfld.long 0x00 31. " ALGD      ,Lane alignment status" "Asserted,Deasserted"
bitfld.long 0x00 26.--29. "  CG_ALG ,Code group alignment indication" "Not done,Done,?..."
bitfld.long 0x00 0.--3. "    SYNC    ,Lane synchronization" "Not synchronized,Synchronized,?..."
line.long 0x04 "XAUIACR3,XAUIA Protocol Control 3"
bitfld.long 0x04 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x04 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x04 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x04 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x04 23. "  WK_ERR ,LPI wake error" "No error,Error"
tree.end
tree "XFI Protocol Registers"
group.long (0x1984+0x04)++0x03
line.long 0x00 "XFIACR1,XFI A Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x1984+0x0C)++0x03
line.long 0x00 "XFIACR3,XFI A Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x1994+0x04)++0x03
line.long 0x00 "XFIBCR1,XFI B Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x1994+0x0C)++0x03
line.long 0x00 "XFIBCR3,XFI B Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19A4+0x04)++0x03
line.long 0x00 "XFICCR1,XFI C Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19A4+0x0C)++0x03
line.long 0x00 "XFICCR3,XFI C Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19B4+0x04)++0x03
line.long 0x00 "XFIDCR1,XFI D Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19B4+0x0C)++0x03
line.long 0x00 "XFIDCR3,XFI D Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19C4+0x04)++0x03
line.long 0x00 "XFIECR1,XFI E Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19C4+0x0C)++0x03
line.long 0x00 "XFIECR3,XFI E Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19D4+0x04)++0x03
line.long 0x00 "XFIFCR1,XFI F Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19D4+0x0C)++0x03
line.long 0x00 "XFIFCR3,XFI F Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19E4+0x04)++0x03
line.long 0x00 "XFIGCR1,XFI G Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19E4+0x0C)++0x03
line.long 0x00 "XFIGCR3,XFI G Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
group.long (0x19F4+0x04)++0x03
line.long 0x00 "XFIHCR1,XFI H Protocol Control 1 Register"
bitfld.long 0x00 27.--31. " MDEV_PORT ,MDIO bus port address" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
rgroup.long (0x19F4+0x0C)++0x03
line.long 0x00 "XFIHCR3,XFI H Protocol Control 3 Register"
bitfld.long 0x00 31. " TX_QU     ,Tx quiet LPI state" "Not quiet,Quiet"
bitfld.long 0x00 30. "   TX_ACT ,Tx active LPI state" "Not active,Active"
bitfld.long 0x00 27. "  RX_QU   ,Rx quiet LPI state" "Not quiet,Quiet"
newline
bitfld.long 0x00 26. " RX_ACT    ,Rx active LPI state" "Not active,Active"
bitfld.long 0x00 23. "  WK_ERR ,LPI wake error" "No error,Error"
bitfld.long 0x00 22. "    TX_ALRT ,LPI tx alert" "No alert,Alert"
tree.end
width 0x0B
tree.end
; tree "MDIO (Management Data In/Out)"
; base ad:0x00
; %include ls20xx/mdio.ph
; tree.end
tree.end
tree "SPI (Serial Peripheral Interface)"
base ad:0x02100000
width 17.
if (((per.l(ad:0x02100000+0x2C))&0x40000000)==0x40000000)
group.long 0x00++0x03
line.long 0x00 "SPI_MCR,Module Configuration Register"
rbitfld.long 0x00 31. " MSTR     ,Master/Slave mode select" "Slave,Master"
rbitfld.long 0x00 30. "       CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
rbitfld.long 0x00 28.--29. "     DCONF    ,SPI configuration" "SPI,?..."
newline
rbitfld.long 0x00 27. " FRZ      ,Enables transfers to be stopped on the next frame boundary when the device enters debug mode" "Not halted,Halted"
rbitfld.long 0x00 26. "   MTFE      ,Modified timing format enable" "Disabled,Enabled"
rbitfld.long 0x00 25. "     PCSEE    ,Peripheral chip select strobe enable" "CS 5,PCS Strobe"
newline
rbitfld.long 0x00 24. " ROOE     ,Receive FIFO overflow overwrite enable" "Ignored,Overwritten"
rbitfld.long 0x00 21. "  PCSIS[5]  ,Peripheral chip select 5 inactive state" "Low,High"
rbitfld.long 0x00 20. "         PCSIS[4] ,Peripheral chip select 4 inactive state" "Low,High"
newline
rbitfld.long 0x00 19. " PCSIS[3] ,Peripheral chip select 3 inactive state" "Low,High"
rbitfld.long 0x00 18. "         PCSIS[2]  ,Peripheral chip select 2 inactive state" "Low,High"
rbitfld.long 0x00 17. "         PCSIS[1] ,Peripheral chip select 1 inactive state" "Low,High"
newline
rbitfld.long 0x00 16. " PCSIS[0] ,Peripheral chip select 0 inactive state" "Low,High"
bitfld.long 0x00 14. "         MDIS      ,Allows clock to be stopped to non-memory mapped logic in module" "Not allowed,Allowed"
rbitfld.long 0x00 13. "  DIS_TXF  ,Disable transmit FIFO" "No,Yes"
newline
rbitfld.long 0x00 12. " DIS_RXF  ,Disable receive FIFO" "No,Yes"
rbitfld.long 0x00 11. "          CLR_TXF   ,Flushes the TX FIFO" "No effect,Clear"
rbitfld.long 0x00 10. "    CLR_RXF  ,Flushes the RX FIFO" "No effect,Clear"
newline
rbitfld.long 0x00 3. " XSPI     ,Extended SPI mode" "Normal,Extended"
rbitfld.long 0x00 2. "     FCPCS     ,Fast continuous PCS mode" "Normal/Slow,Fast"
newline
rbitfld.long 0x00 1. " PES      ,Parity error stop" "Continued,Stopped"
bitfld.long 0x00 0. "    HALT      ,Start and stop frame transfers" "Started,Stopped"
else
group.long 0x00++0x03
line.long 0x00 "SPI_MCR,Module Configuration Register"
bitfld.long 0x00 31. " MSTR     ,Master/Slave mode select" "Slave,Master"
bitfld.long 0x00 30. "       CONT_SCKE ,Continuous SCK enable" "Disabled,Enabled"
rbitfld.long 0x00 28.--29. "     DCONF    ,SPI configuration" "SPI,?..."
newline
bitfld.long 0x00 27. " FRZ      ,Enables transfers to be stopped on the next frame boundary when the device enters debug mode" "Not halted,Halted"
bitfld.long 0x00 26. "   MTFE      ,Modified timing format enable" "Disabled,Enabled"
bitfld.long 0x00 25. "     PCSEE    ,Peripheral chip select strobe enable" "CS 5,PCS Strobe"
newline
bitfld.long 0x00 24. " ROOE     ,Receive FIFO overflow overwrite enable" "Ignored,Overwritten"
bitfld.long 0x00 21. "  PCSIS[5]  ,Peripheral chip select 5 inactive state" "Low,High"
bitfld.long 0x00 20. "         PCSIS[4] ,Peripheral chip select 4 inactive state" "Low,High"
newline
bitfld.long 0x00 19. " PCSIS[3] ,Peripheral chip select 3 inactive state" "Low,High"
bitfld.long 0x00 18. "         PCSIS[2]  ,Peripheral chip select 2 inactive state" "Low,High"
bitfld.long 0x00 17. "         PCSIS[1] ,Peripheral chip select 1 inactive state" "Low,High"
newline
bitfld.long 0x00 16. " PCSIS[0] ,Peripheral chip select 0 inactive state" "Low,High"
bitfld.long 0x00 14. "         MDIS      ,Allows clock to be stopped to non-memory mapped logic in module" "Not allowed,Allowed"
bitfld.long 0x00 13. "  DIS_TXF  ,Disable transmit FIFO" "No,Yes"
newline
bitfld.long 0x00 12. " DIS_RXF  ,Disable receive FIFO" "No,Yes"
bitfld.long 0x00 11. "          CLR_TXF   ,Flushes the TX FIFO" "No effect,Clear"
bitfld.long 0x00 10. "    CLR_RXF  ,Flushes the RX FIFO" "No effect,Clear"
newline
bitfld.long 0x00 3. " XSPI     ,Extended SPI mode" "Normal,Extended"
bitfld.long 0x00 2. "     FCPCS     ,Fast continuous PCS mode" "Normal/Slow,Fast"
newline
bitfld.long 0x00 1. " PES      ,Parity error stop" "Continued,Stopped"
bitfld.long 0x00 0. "    HALT      ,Start and stop frame transfers" "Started,Stopped"
endif
if (((per.l(ad:0x02100000+0x2C))&0x40000000)==0x40000000)
rgroup.long 0x08++0x03
line.long 0x00 "SPI_TCR,Transfer Count Register"
hexmask.long.word 0x00 16.--31. 1. " SPI_TCNT ,SPI transfer counter"
else
group.long 0x08++0x03
line.long 0x00 "SPI_TCR,Transfer Count Register"
hexmask.long.word 0x00 16.--31. 1. " SPI_TCNT ,SPI transfer counter"
endif
width 17.
newline
if (((per.l(ad:0x02100000+0x00))&0x80000000)==0x80000000)
if (((per.l(ad:0x02100000+0x2C))&0x40000000)==0x40000000)
rgroup.long 0x0C++0x07
line.long 0x00 "SPI_CTAR0,Clock And Transfer Attributes Register 0"
bitfld.long 0x00 31. " DBR   ,Double baud rate" "Normal,Doubled"
bitfld.long 0x00 27.--30. "                  FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 26. "           CPOL   ,Clock polarity" "Inactive low,Inactive high"
newline
bitfld.long 0x00 25. " CPHA  ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow"
bitfld.long 0x00 24. "  LSBFE ,LSB first" "MSB,LSB"
bitfld.long 0x00 22.--23. "          PCSSCK ,PCS to SCK delay prescaler" "/1,/3,/5,/7"
newline
bitfld.long 0x00 20.--21. " PASC  ,After SCK delay prescaler" "1,3,5,7"
bitfld.long 0x00 18.--19. "                        PDT   ,Delay after transfer prescaler" "1,3,5,7"
bitfld.long 0x00 16.--17. "            PBR    ,Baud rate prescaler" "/2,/3,/5,/7"
newline
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
bitfld.long 0x00 8.--11. "                   ASC   ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "           DT     ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " BR    ,Baud rate scaler" "/2,/4,/6,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
line.long 0x04 "SPI_CTAR1,Clock And Transfer Attributes Register (in Master Mode)"
bitfld.long 0x04 31. " DBR   ,Double baud rate" "Normal,Doubled"
bitfld.long 0x04 27.--30. "                  FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x04 26. "           CPOL   ,Clock polarity" "Inactive low,Inactive high"
newline
bitfld.long 0x04 25. " CPHA  ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow"
bitfld.long 0x04 24. "  LSBFE ,LSB first" "MSB,LSB"
bitfld.long 0x04 22.--23. "          PCSSCK ,PCS to SCK delay prescaler" "/1,/3,/5,/7"
newline
bitfld.long 0x04 20.--21. " PASC  ,After SCK delay prescaler" "1,3,5,7"
bitfld.long 0x04 18.--19. "                        PDT   ,Delay after transfer prescaler" "1,3,5,7"
bitfld.long 0x04 16.--17. "            PBR    ,Baud rate prescaler" "/2,/3,/5,/7"
newline
bitfld.long 0x04 12.--15. " CSSCK ,PCS to SCK delay scaler" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
bitfld.long 0x04 8.--11. "                   ASC   ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "           DT     ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " BR    ,Baud rate scaler" "/2,/4,/6,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
else
group.long 0x0C++0x07
line.long 0x00 "SPI_CTAR0,Clock And Transfer Attributes Register 0"
bitfld.long 0x00 31. " DBR   ,Double baud rate" "Normal,Doubled"
bitfld.long 0x00 27.--30. "                  FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x00 26. "           CPOL   ,Clock polarity" "Inactive low,Inactive high"
newline
bitfld.long 0x00 25. " CPHA  ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow"
bitfld.long 0x00 24. "  LSBFE ,LSB first" "MSB,LSB"
bitfld.long 0x00 22.--23. "          PCSSCK ,PCS to SCK delay prescaler" "/1,/3,/5,/7"
newline
bitfld.long 0x00 20.--21. " PASC  ,After SCK delay prescaler" "1,3,5,7"
bitfld.long 0x00 18.--19. "                        PDT   ,Delay after transfer prescaler" "1,3,5,7"
bitfld.long 0x00 16.--17. "            PBR    ,Baud rate prescaler" "/2,/3,/5,/7"
newline
bitfld.long 0x00 12.--15. " CSSCK ,PCS to SCK delay scaler" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
bitfld.long 0x00 8.--11. "                   ASC   ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 4.--7. "           DT     ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 0.--3. " BR    ,Baud rate scaler" "/2,/4,/6,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
line.long 0x04 "SPI_CTAR1,Clock And Transfer Attributes Register (in Master Mode)"
bitfld.long 0x04 31. " DBR   ,Double baud rate" "Normal,Doubled"
bitfld.long 0x04 27.--30. "                  FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16"
bitfld.long 0x04 26. "           CPOL   ,Clock polarity" "Inactive low,Inactive high"
newline
bitfld.long 0x04 25. " CPHA  ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow"
bitfld.long 0x04 24. "  LSBFE ,LSB first" "MSB,LSB"
bitfld.long 0x04 22.--23. "          PCSSCK ,PCS to SCK delay prescaler" "/1,/3,/5,/7"
newline
bitfld.long 0x04 20.--21. " PASC  ,After SCK delay prescaler" "1,3,5,7"
bitfld.long 0x04 18.--19. "                        PDT   ,Delay after transfer prescaler" "1,3,5,7"
bitfld.long 0x04 16.--17. "            PBR    ,Baud rate prescaler" "/2,/3,/5,/7"
newline
bitfld.long 0x04 12.--15. " CSSCK ,PCS to SCK delay scaler" "/2,/4,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768,/65536"
bitfld.long 0x04 8.--11. "                   ASC   ,After SCK delay scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 4.--7. "           DT     ,Delay after transfer scaler" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x04 0.--3. " BR    ,Baud rate scaler" "/2,/4,/6,/8,/16,/32,/64,/128,/256,/512,/1024,/2048,/4096,/8192,/16384,/32768"
endif
else
if (((per.l(ad:0x02100000+0x2C))&0x40000000)==0x40000000)
rgroup.long 0x0C++0x03
line.long 0x00 "SPI_CTAR0_SLAVE,Clock And Transfer Attributes Register (in Slave Mode)"
bitfld.long 0x00 27.--31. " FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 26. "                       CPOL  ,Clock polarity" "Active low,Active high"
bitfld.long 0x00 25. "  CPHA   ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow."
newline
bitfld.long 0x00 24. " PE    ,Parity enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                 PP    ,Parity polarity" "Even,Odd"
else
group.long 0x0C++0x03
line.long 0x00 "SPI_CTAR0_SLAVE,Clock And Transfer Attributes Register (in Slave Mode)"
bitfld.long 0x00 27.--31. " FMSZ  ,Frame size" ",,,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
bitfld.long 0x00 26. "                       CPOL  ,Clock polarity" "Active low,Active high"
bitfld.long 0x00 25. "  CPHA   ,Clock phase" "Capt-lead. Chng-follow.,Chng-lead. Capt-follow."
newline
bitfld.long 0x00 24. " PE    ,Parity enable" "Disabled,Enabled"
bitfld.long 0x00 23. "                 PP    ,Parity polarity" "Even,Odd"
endif
endif
width 17.
if (((per.l(ad:0x02100000+0x00))&0x08)==0x08)
group.long 0x2C++0x03
line.long 0x00 "SPI_SR,Status Register"
eventfld.long 0x00 31. " TCF          ,Transfer complete flag" "Not complete,Complete"
rbitfld.long 0x00 30. "     TXRXS     ,TX and RX status" "Disabled,Enabled"
eventfld.long 0x00 28. "    EQQF      ,End of queue flag" "Not set,Set"
newline
eventfld.long 0x00 27. " TFUF         ,Transmit FIFO underflow flag" "No underflow,Underflow"
eventfld.long 0x00 25. "     TFFF      ,Transmit FIFO fill flag" "Full,Not full"
rbitfld.long 0x00 24. "    BSYF      ,Busy flag" "Idle,Busy"
newline
eventfld.long 0x00 23. " CMDTCF       ,Command transfer complete flag" "Not complete,Complete"
eventfld.long 0x00 21. "     SPEF      ,SPI parity error flag" "No error,Error"
eventfld.long 0x00 19. "    RFOF      ,Receive FIFO overflow flag" "No overflow,Overflow"
newline
eventfld.long 0x00 18. " TFIWF        ,Transmit FIFO invalid write flag" "No invalid data,Invalid data"
rbitfld.long 0x00 17. "  RFDF      ,Receive FIFO drain flag" "Empty,Not empty"
rbitfld.long 0x00 12.--15. "   TXCTR     ,TX FIFO counter" "0,1,2,3,4,?..."
newline
rbitfld.long 0x00 8.--11. " TXNXTPTR     ,Transmit next pointer" "0,1,2,3,4,?..."
rbitfld.long 0x00 4.--7. "                RXCTR     ,RX FIFO counter" "0,1,2,3,4,?..."
rbitfld.long 0x00 0.--3. "           POPNXTPTR ,Pop next pointer" "0,1,2,3,4,?..."
else
group.long 0x2C++0x03
line.long 0x00 "SPI_SR,Status Register"
eventfld.long 0x00 31. " TCF          ,Transfer complete flag" "Not complete,Complete"
rbitfld.long 0x00 30. "     TXRXS     ,TX and RX status" "Disabled,Enabled"
eventfld.long 0x00 28. "    EQQF      ,End of queue flag" "Not set,Set"
newline
eventfld.long 0x00 27. " TFUF         ,Transmit FIFO underflow flag" "No underflow,Underflow"
eventfld.long 0x00 25. "     TFFF      ,Transmit FIFO fill flag" "Full,Not full"
newline
eventfld.long 0x00 23. " CMDTCF       ,Command transfer complete flag" "Not complete,Complete"
eventfld.long 0x00 21. "     SPEF      ,SPI parity error flag" "No error,Error"
eventfld.long 0x00 19. "    RFOF      ,Receive FIFO overflow flag" "No overflow,Overflow"
newline
eventfld.long 0x00 18. " TFIWF        ,Transmit FIFO invalid write flag" "No invalid data,Invalid data"
rbitfld.long 0x00 17. "  RFDF      ,Receive FIFO drain flag" "Empty,Not empty"
rbitfld.long 0x00 12.--15. "   TXCTR     ,TX FIFO counter" "0,1,2,3,4,?..."
newline
rbitfld.long 0x00 8.--11. " TXNXTPTR     ,Transmit next pointer" "0,1,2,3,4,?..."
rbitfld.long 0x00 4.--7. "                RXCTR     ,RX FIFO counter" "0,1,2,3,4,?..."
rbitfld.long 0x00 0.--3. "           POPNXTPTR ,Pop next pointer" "0,1,2,3,4,?..."
endif
if (((per.l(ad:0x02100000+0x2C))&0x40000000)==0x40000000)
rgroup.long 0x30++0x03
line.long 0x00 "SPI_RSER,DMA/Interrupt Request Select And Enable Register"
bitfld.long 0x00 31. " TCF_RE       ,Transmission complete request enable" "Disabled,Enabled"
bitfld.long 0x00 30. "         CMDFFF_RE ,Command FIFO fill flag request enable" "Disabled,Enabled"
bitfld.long 0x00 28. "    EOQF_RE   ,Finished request enable" "Disabled,Enabled"
newline
bitfld.long 0x00 27. " TFUF_RE      ,Transmit FIFO underflow request enable" "Disabled,Enabled"
bitfld.long 0x00 25. "         TFFF_RE   ,Transmit FIFO fill request enable" "Disabled,Enabled"
bitfld.long 0x00 24. "    TFFF_DIRS ,Transmit FIFO fill DMA or interrupt request select" "Interrupt,DMA"
newline
bitfld.long 0x00 23. " CMDTCF_RE    ,Command transmission complete request enable" "Disabled,Enabled"
bitfld.long 0x00 21. "         SPEF_RE   ,SPI parity error request enable" "Disabled,Enabled"
bitfld.long 0x00 19. "    RFOF_RE   ,Receive FIFO overflow request enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " TFIWF_RE     ,Transmit FIFO invalid write request enable" "Disabled,Enabled"
bitfld.long 0x00 17. "         RFDF_RE   ,Receive FIFO drain request enable" "Disabled,Enabled"
bitfld.long 0x00 16. "    RDFD_DIRS ,Receive FIFO drain DMA or interrupt request select" "Interrupt,DMA"
newline
bitfld.long 0x00 15. " CMDFFF_DIRS  ,Command FIFO fill DMA or interrupt request select" "Interrupt,DMA"
else
group.long 0x30++0x03
line.long 0x00 "SPI_RSER,DMA/Interrupt Request Select And Enable Register"
bitfld.long 0x00 31. " TCF_RE       ,Transmission complete request enable" "Disabled,Enabled"
bitfld.long 0x00 30. "         CMDFFF_RE ,Command FIFO fill flag request enable" "Disabled,Enabled"
bitfld.long 0x00 28. "    EOQF_RE   ,Finished request enable" "Disabled,Enabled"
newline
bitfld.long 0x00 27. " TFUF_RE      ,Transmit FIFO underflow request enable" "Disabled,Enabled"
bitfld.long 0x00 25. "         TFFF_RE   ,Transmit FIFO fill request enable" "Disabled,Enabled"
bitfld.long 0x00 24. "    TFFF_DIRS ,Transmit FIFO fill DMA or interrupt request select" "Interrupt,DMA"
newline
bitfld.long 0x00 23. " CMDTCF_RE    ,Command transmission complete request enable" "Disabled,Enabled"
bitfld.long 0x00 21. "         SPEF_RE   ,SPI parity error request enable" "Disabled,Enabled"
bitfld.long 0x00 19. "    RFOF_RE   ,Receive FIFO overflow request enable" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " TFIWF_RE     ,Transmit FIFO invalid write request enable" "Disabled,Enabled"
bitfld.long 0x00 17. "         RFDF_RE   ,Receive FIFO drain request enable" "Disabled,Enabled"
bitfld.long 0x00 16. "    RDFD_DIRS ,Receive FIFO drain DMA or interrupt request select" "Interrupt,DMA"
newline
bitfld.long 0x00 15. " CMDFFF_DIRS  ,Command FIFO fill DMA or interrupt request select" "Interrupt,DMA"
endif
if (((per.l(ad:0x02100000+0x00))&0x80000000)==0x80000000)
if (((per.l(ad:0x02100000+0x00))&0x04)==0x04)
group.long 0x34++0x03
line.long 0x00 "SPI_PUSHR,PUSH TX FIFO Register In Master Mode"
bitfld.long 0x00 31. " CONT         ,Continuous peripheral chip select enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "         CTAS      ,Clock and transfer attributes select" "CTAR0,CTAR1,?..."
bitfld.long 0x00 27. "       EOQ       ,End of queue" "Not last,Last"
newline
bitfld.long 0x00 26. " CTCNT        ,Clear transfer counter" "Not clear,Clear"
bitfld.long 0x00 25. "        MASC      ,Mask T_asc delay in the current frame" "Not masked,Masked"
bitfld.long 0x00 24. "  MCSC      ,Mask T_csc delay in the next frame" "Not masked,Masked"
newline
bitfld.long 0x00 21. " PCS[5]       ,PCS 5 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 20. "         PCS[4]    ,PCS 4 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 19. "    PCS[3]    ,PCS 3 asserted for the transfer" "Negated,Asserted"
newline
bitfld.long 0x00 18. " PCS[2]       ,PCS 2 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 17. "         PCS[1]    ,PCS 1 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 16. "    PCS[0]    ,PCS 0 asserted for the transfer" "Negated,Asserted"
newline
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
else
group.long 0x34++0x03
line.long 0x00 "SPI_PUSHR,PUSH TX FIFO Register In Master Mode"
bitfld.long 0x00 31. " CONT         ,Continuous peripheral chip select enable" "Disabled,Enabled"
bitfld.long 0x00 28.--30. "         CTAS      ,Clock and transfer attributes select" "CTAR0,CTAR1,?..."
bitfld.long 0x00 27. "       EOQ       ,End of queue" "Not last,Last"
newline
bitfld.long 0x00 26. " CTCNT        ,Clear transfer counter" "Not clear,Clear"
bitfld.long 0x00 25. "        PE        ,Parity enable" "Disabled,Enabled"
bitfld.long 0x00 24. "    PP        ,Parity polarity" "Even,Odd"
newline
bitfld.long 0x00 21. " PCS[5]       ,PCS 5 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 20. "         PCS[4]    ,PCS 4 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 19. "    PCS[3]    ,PCS 3 asserted for the transfer" "Negated,Asserted"
newline
bitfld.long 0x00 18. " PCS[2]       ,PCS 2 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 17. "         PCS[1]    ,PCS 1 asserted for the transfer" "Negated,Asserted"
bitfld.long 0x00 16. "    PCS[0]    ,PCS 0 asserted for the transfer" "Negated,Asserted"
newline
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
endif
else
group.long 0x34++0x03
line.long 0x00 "SPI_PUSHR_SLAVE,PUSH TX FIFO Register In Slave Mode"
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
endif
newline
hgroup.long 0x38++0x03
hide.long 0x00 "SPI_POPR,POP RX FIFO Register"
in
newline
if (((per.l(ad:0x02100000+0x00))&0x80000008)==0x80000008)
hgroup.long (0x3C+0x0)++0x03
hide.long 0x00 "SPI_TXFR0,Transmit FIFO Register 0"
hgroup.long (0x3C+0x4)++0x03
hide.long 0x00 "SPI_TXFR1,Transmit FIFO Register 1"
hgroup.long (0x3C+0x8)++0x03
hide.long 0x00 "SPI_TXFR2,Transmit FIFO Register 2"
hgroup.long (0x3C+0xC)++0x03
hide.long 0x00 "SPI_TXFR3,Transmit FIFO Register 3"
elif (((per.l(ad:0x02100000+0x00))&0x80000000)==0x00)
rgroup.long (0x3C+0x0)++0x03
line.long 0x00 "SPI_TXFR0,Transmit FIFO Register 0"
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
rgroup.long (0x3C+0x4)++0x03
line.long 0x00 "SPI_TXFR1,Transmit FIFO Register 1"
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
rgroup.long (0x3C+0x8)++0x03
line.long 0x00 "SPI_TXFR2,Transmit FIFO Register 2"
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
rgroup.long (0x3C+0xC)++0x03
line.long 0x00 "SPI_TXFR3,Transmit FIFO Register 3"
hexmask.long.word 0x00 0.--15. 1. " TXDATA       ,Transmit data"
else
rgroup.long (0x3C+0x0)++0x03
line.long 0x00 "SPI_TXFR0,Transmit FIFO Register 0"
hexmask.long.word 0x00 16.--31. 1. " TXCMD_TXDATA ,Transmit command or transmit data"
hexmask.long.word 0x00 0.--15. 1. "             TXDATA    ,Transmit data"
rgroup.long (0x3C+0x4)++0x03
line.long 0x00 "SPI_TXFR1,Transmit FIFO Register 1"
hexmask.long.word 0x00 16.--31. 1. " TXCMD_TXDATA ,Transmit command or transmit data"
hexmask.long.word 0x00 0.--15. 1. "             TXDATA    ,Transmit data"
rgroup.long (0x3C+0x8)++0x03
line.long 0x00 "SPI_TXFR2,Transmit FIFO Register 2"
hexmask.long.word 0x00 16.--31. 1. " TXCMD_TXDATA ,Transmit command or transmit data"
hexmask.long.word 0x00 0.--15. 1. "             TXDATA    ,Transmit data"
rgroup.long (0x3C+0xC)++0x03
line.long 0x00 "SPI_TXFR3,Transmit FIFO Register 3"
hexmask.long.word 0x00 16.--31. 1. " TXCMD_TXDATA ,Transmit command or transmit data"
hexmask.long.word 0x00 0.--15. 1. "             TXDATA    ,Transmit data"
endif
rgroup.long 0x7C++0x03
line.long 0x00 "SPI_RXFR0,Receive FIFO Register"
rgroup.long 0x80++0x03
line.long 0x00 "SPI_RXFR1,Receive FIFO Register"
rgroup.long 0x84++0x03
line.long 0x00 "SPI_RXFR2,Receive FIFO Register"
rgroup.long 0x88++0x03
line.long 0x00 "SPI_RXFR3,Receive FIFO Register"
if (((per.l(ad:0x02100000+0x00))&0x08)==0x08)
group.long 0x11C++0x03
line.long 0x00 "SPI_CTARE0,Clock And Transfer Attributes Register Extended 0"
bitfld.long 0x00 16. " FMSZE        ,Frame size extended" "Default,Extended"
hexmask.long.word 0x00 0.--10. 1. "         DTCP      ,Data transfer count preload"
if (((per.l(ad:0x02100000+0x00))&0x80000000)==0x00)
hgroup.long 0x120++0x03
hide.long 0x00 "SPI_CTARE1,Clock And Transfer Attributes Register Extended 1"
else
group.long 0x120++0x03
line.long 0x00 "SPI_CTARE1,Clock And Transfer Attributes Register Extended 1"
bitfld.long 0x00 16. " FMSZE        ,Frame size extended" "Default,Extended"
hexmask.long.word 0x00 0.--10. 1. "         DTCP      ,Data transfer count preload"
endif
else
hgroup.long 0x11C++0x03
hide.long 0x00 "SPI_CTARE0,Clock And Transfer Attributes Register Extended 0"
hgroup.long 0x120++0x03
hide.long 0x00 "SPI_CTARE1,Clock And Transfer Attributes Register Extended 1"
endif
width 17.
rgroup.long 0x13C++0x03
line.long 0x00 "SPI_SREX,Status Register Extended"
bitfld.long 0x00 14. " TXCTR4 ,This bit is an extension of SR[TXCTR]" "0,1"
bitfld.long 0x00 11. "         RXCTR4    ,This bit is an extension of SR[RXCTR]" "0,1"
newline
bitfld.long 0x00 4.--8. " CMDCTR ,CMD FIFO counter" "0,1,2,3,4,?..."
bitfld.long 0x00 0.--3. "         CMDNXTPTR ,Command next pointer" "0,1,2,3,4,?..."
group.long 0x94++0x03
line.long 0x00 "FLSHCR4,Flash Control Register 4"
bitfld.long 0x00 3. " WMENB  ,Write mask enable bit for flash device on port B" "Disabled,Enabled"
bitfld.long 0x00 2. "  WMENA     ,Write mask enable bit for flash device on port A" "Disabled,Enabled"
bitfld.long 0x00 0. "  WMOPT1 ,DQS pin as write mask usage" "Used,Not used"
width 0x0B
tree.end
tree "TZM (TrustZone Modules)"
tree.open "TZC-400 (TrustZone Address Space Controller)"
tree "TZC 1"
base ad:0x01100000
width 23.
rgroup.long 0x00++0x03
line.long 0x00 "BUILD_CONFIG,Build Configuration Register"
bitfld.long 0x00 24.--25. " NO_OF_FILTERS        ,Defines the number of filter units in the design implementation" "One,Two,Three,Four"
bitfld.long 0x00 8.--13. "           ADDRESS_WIDTH     ,Defines the width of the ACE-lite address bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--4. "             NO_OF_REGIONS ,Defines the number of regions that the TZC-400 provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x04++0x0B
line.long 0x00 "ACTION,Action Register"
bitfld.long 0x00 0.--1. " REACTION_VALUE       ,Controls how the TZC-400 uses BRESPS[1:0] RRESPS[1:0] and TZCINT signals" "LOW/OKAY,LOW/DECERR,HIGH/OKAY,HIGH/DECERR"
line.long 0x04 "GATE_KEEPER,Gate Keeper Register"
rbitfld.long 0x04 16. " OPEN_STATUS          ,The current state of the gate keeper in each filter unit" "Closed,Open"
bitfld.long 0x04 0. "          OPEN_REQUEST      ,Requests the gate to be opened or closed" "Close request,Open request"
line.long 0x08 "SPECULATION_CTRL,Speculation Control Register"
bitfld.long 0x08 1. " WRITE_SPEC_DISABLE   ,Write access speculation disable" "No,Yes"
bitfld.long 0x08 0. "             READ_SPEC_DISABLE ,Read access speculation disable" "No,Yes"
rgroup.long 0x10++0x03
line.long 0x00 "INT_STATUS,Interrupt Status Register"
bitfld.long 0x00 16. " OVERLAP              ,Indicates a violation of the overlap region configuration rules for associated filter unit" "Not overlapped,Overlapped"
bitfld.long 0x00 8. "  OVERRUN           ,Indicates the occurrence of two or more region permission or region overlapping failures at associated filter unit" "No overrun,Overrun"
bitfld.long 0x00 0. "     STATUS        ,Indicates the status of the interrupt from each filter unit" "Not asserted,Asserted"
wgroup.long 0x14++0x03
line.long 0x00 "INT_CLEAR,Interrupt Clear Register"
bitfld.long 0x00 0. " CLEAR                ,Contains the control bit to clear interrupt" "No effect,Clear"
rgroup.long 0x20++0x0F
line.long 0x00 "FAIL_ADDRESS_LOW_0,Fail Address Low Register 0"
line.long 0x04 "FAIL_ADDRESS_HIGH_0,Fail Address High Register 0"
hexmask.long.byte 0x04 0.--7. 0x01 " ADDR_STATUS_HIGH     ,Fail address high bits"
line.long 0x08 "FAIL_CONTROL_0,Fail Control Register 0"
bitfld.long 0x08 24. " DIRECTION            ,Indicates whether the failed access was a read or write access attempt" "Read,Write"
bitfld.long 0x08 21. "           NON_SECURE        ,Indicates whether permission check fail or region overlap was secure or non-secure access attempt" "Secure,Non-secure"
bitfld.long 0x08 20. "     PRIVILEGED    ,Indicates whether permission check fail or region overlap was unprivileged or privileged access attempt" "Unprivileged,Privileged"
line.long 0x0C "FAIL_ID_0,Fail ID Register 0"
bitfld.long 0x0C 24.--27. " VNET                 ,This field returns the VN number of the first failed access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x0C 0.--10. 1. "              ID                ,This field returns the ACE-lite ID values of the first failed access"
tree "Region 0 registers"
rgroup.long 0x100++0x0F
line.long 0x00 "REGION_BASE_LOW_0,Region Base Address Low Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW0    ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_0,Region Base Address High Register 0"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH0   ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_0,Region Top Address Low Register 0"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW0     ,Controls the region top address bits"
line.long 0x0C "REGION_TOP_HIGH_0,Region Top Address High Register 0"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH0    ,Controls the region top address bits"
group.long 0x110++0x03
line.long 0x00 "REGION_ATTRIBUTES_0,Region Attributes Register"
bitfld.long 0x00 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
rbitfld.long 0x00 0. "       FILTER_EN     ,Independent region enable for each filter unit" ",Enabled"
tree.end
tree "Region 1 registers"
group.long (0x120+0x0)++0x13
line.long 0x00 "REGION_BASE_LOW_1,Region Base Address Low Register 1"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_1   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_1,Region Base Address High Register 1"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_1  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_1,Region Top Address Low Register 1"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_1    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_1,Region Top Address High Register 1"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_1   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_1,Region Attributes Register 1"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 2 registers"
group.long (0x120+0x20)++0x13
line.long 0x00 "REGION_BASE_LOW_2,Region Base Address Low Register 2"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_2   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_2,Region Base Address High Register 2"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_2  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_2,Region Top Address Low Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_2    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_2,Region Top Address High Register 2"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_2   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_2,Region Attributes Register 2"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 3 registers"
group.long (0x120+0x40)++0x13
line.long 0x00 "REGION_BASE_LOW_3,Region Base Address Low Register 3"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_3   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_3,Region Base Address High Register 3"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_3  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_3,Region Top Address Low Register 3"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_3    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_3,Region Top Address High Register 3"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_3   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_3,Region Attributes Register 3"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 4 registers"
group.long (0x120+0x60)++0x13
line.long 0x00 "REGION_BASE_LOW_4,Region Base Address Low Register 4"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_4   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_4,Region Base Address High Register 4"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_4  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_4,Region Top Address Low Register 4"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_4    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_4,Region Top Address High Register 4"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_4   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_4,Region Attributes Register 4"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 5 registers"
group.long (0x120+0x80)++0x13
line.long 0x00 "REGION_BASE_LOW_5,Region Base Address Low Register 5"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_5   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_5,Region Base Address High Register 5"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_5  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_5,Region Top Address Low Register 5"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_5    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_5,Region Top Address High Register 5"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_5   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_5,Region Attributes Register 5"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 6 registers"
group.long (0x120+0xA0)++0x13
line.long 0x00 "REGION_BASE_LOW_6,Region Base Address Low Register 6"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_6   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_6,Region Base Address High Register 6"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_6  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_6,Region Top Address Low Register 6"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_6    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_6,Region Top Address High Register 6"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_6   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_6,Region Attributes Register 6"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 7 registers"
group.long (0x120+0xC0)++0x13
line.long 0x00 "REGION_BASE_LOW_7,Region Base Address Low Register 7"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_7   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_7,Region Base Address High Register 7"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_7  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_7,Region Top Address Low Register 7"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_7    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_7,Region Top Address High Register 7"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_7   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_7,Region Attributes Register 7"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 8 registers"
group.long (0x120+0xE0)++0x13
line.long 0x00 "REGION_BASE_LOW_8,Region Base Address Low Register 8"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_8   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_8,Region Base Address High Register 8"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_8  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_8,Region Top Address Low Register 8"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_8    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_8,Region Top Address High Register 8"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_8   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_8,Region Attributes Register 8"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
newline
rgroup.long 0xFE0++0x1F
line.long 0x00 "PID0,Peripheral ID 0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0        ,Part number"
line.long 0x04 "PID1,Peripheral ID 1 Register"
bitfld.long 0x04 4.--7. " JEP106_ID_3_0        ,Identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "              PART_NUMBER_1     ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PID2,Peripheral ID 2 Register"
bitfld.long 0x08 4.--7. " REVISION             ,Revision of the TZC-400" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 3. "              JEDEC_USED        ,Indicates that TZC-400 uses a manufacturer identity code that was allocated by JEDEC according to JEP106" "Not used,Used"
bitfld.long 0x08 0.--2. "       JEP106_ID_6_4 ,Identity code" "0,1,2,3,4,5,6,7"
line.long 0x0C "PID3,Peripheral ID 3 Register"
bitfld.long 0x0C 4.--7. " REVAND               ,Revision of the silicon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "              MOD_NUMBER        ,This is set to 0x00" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "CID0,Component ID 0 Register"
hexmask.long.byte 0x10 0.--7. 1. " COMP_ID_0            ,Component ID 0 field"
line.long 0x14 "CID1,Component ID 1 Register"
hexmask.long.byte 0x14 0.--7. 1. " COMP_ID_1            ,Component ID 1 field"
line.long 0x18 "CID2,Component ID 2 Register"
hexmask.long.byte 0x18 0.--7. 1. " COMP_ID_2            ,Component ID 2 field"
line.long 0x1C "CID3,Component ID 3 Register"
hexmask.long.byte 0x1C 0.--7. 1. " COMP_ID_3            ,Component ID 3 field"
width 0x0B
tree.end
tree "TZC 2"
base ad:0x01110000
width 23.
rgroup.long 0x00++0x03
line.long 0x00 "BUILD_CONFIG,Build Configuration Register"
bitfld.long 0x00 24.--25. " NO_OF_FILTERS        ,Defines the number of filter units in the design implementation" "One,Two,Three,Four"
bitfld.long 0x00 8.--13. "           ADDRESS_WIDTH     ,Defines the width of the ACE-lite address bus" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x00 0.--4. "             NO_OF_REGIONS ,Defines the number of regions that the TZC-400 provides" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
group.long 0x04++0x0B
line.long 0x00 "ACTION,Action Register"
bitfld.long 0x00 0.--1. " REACTION_VALUE       ,Controls how the TZC-400 uses BRESPS[1:0] RRESPS[1:0] and TZCINT signals" "LOW/OKAY,LOW/DECERR,HIGH/OKAY,HIGH/DECERR"
line.long 0x04 "GATE_KEEPER,Gate Keeper Register"
rbitfld.long 0x04 16. " OPEN_STATUS          ,The current state of the gate keeper in each filter unit" "Closed,Open"
bitfld.long 0x04 0. "          OPEN_REQUEST      ,Requests the gate to be opened or closed" "Close request,Open request"
line.long 0x08 "SPECULATION_CTRL,Speculation Control Register"
bitfld.long 0x08 1. " WRITE_SPEC_DISABLE   ,Write access speculation disable" "No,Yes"
bitfld.long 0x08 0. "             READ_SPEC_DISABLE ,Read access speculation disable" "No,Yes"
rgroup.long 0x10++0x03
line.long 0x00 "INT_STATUS,Interrupt Status Register"
bitfld.long 0x00 16. " OVERLAP              ,Indicates a violation of the overlap region configuration rules for associated filter unit" "Not overlapped,Overlapped"
bitfld.long 0x00 8. "  OVERRUN           ,Indicates the occurrence of two or more region permission or region overlapping failures at associated filter unit" "No overrun,Overrun"
bitfld.long 0x00 0. "     STATUS        ,Indicates the status of the interrupt from each filter unit" "Not asserted,Asserted"
wgroup.long 0x14++0x03
line.long 0x00 "INT_CLEAR,Interrupt Clear Register"
bitfld.long 0x00 0. " CLEAR                ,Contains the control bit to clear interrupt" "No effect,Clear"
rgroup.long 0x20++0x0F
line.long 0x00 "FAIL_ADDRESS_LOW_0,Fail Address Low Register 0"
line.long 0x04 "FAIL_ADDRESS_HIGH_0,Fail Address High Register 0"
hexmask.long.byte 0x04 0.--7. 0x01 " ADDR_STATUS_HIGH     ,Fail address high bits"
line.long 0x08 "FAIL_CONTROL_0,Fail Control Register 0"
bitfld.long 0x08 24. " DIRECTION            ,Indicates whether the failed access was a read or write access attempt" "Read,Write"
bitfld.long 0x08 21. "           NON_SECURE        ,Indicates whether permission check fail or region overlap was secure or non-secure access attempt" "Secure,Non-secure"
bitfld.long 0x08 20. "     PRIVILEGED    ,Indicates whether permission check fail or region overlap was unprivileged or privileged access attempt" "Unprivileged,Privileged"
line.long 0x0C "FAIL_ID_0,Fail ID Register 0"
bitfld.long 0x0C 24.--27. " VNET                 ,This field returns the VN number of the first failed access" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.word 0x0C 0.--10. 1. "              ID                ,This field returns the ACE-lite ID values of the first failed access"
tree "Region 0 registers"
rgroup.long 0x100++0x0F
line.long 0x00 "REGION_BASE_LOW_0,Region Base Address Low Register 0"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW0    ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_0,Region Base Address High Register 0"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH0   ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_0,Region Top Address Low Register 0"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW0     ,Controls the region top address bits"
line.long 0x0C "REGION_TOP_HIGH_0,Region Top Address High Register 0"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH0    ,Controls the region top address bits"
group.long 0x110++0x03
line.long 0x00 "REGION_ATTRIBUTES_0,Region Attributes Register"
bitfld.long 0x00 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x00 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
rbitfld.long 0x00 0. "       FILTER_EN     ,Independent region enable for each filter unit" ",Enabled"
tree.end
tree "Region 1 registers"
group.long (0x120+0x0)++0x13
line.long 0x00 "REGION_BASE_LOW_1,Region Base Address Low Register 1"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_1   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_1,Region Base Address High Register 1"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_1  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_1,Region Top Address Low Register 1"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_1    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_1,Region Top Address High Register 1"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_1   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_1,Region Attributes Register 1"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 2 registers"
group.long (0x120+0x20)++0x13
line.long 0x00 "REGION_BASE_LOW_2,Region Base Address Low Register 2"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_2   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_2,Region Base Address High Register 2"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_2  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_2,Region Top Address Low Register 2"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_2    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_2,Region Top Address High Register 2"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_2   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_2,Region Attributes Register 2"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 3 registers"
group.long (0x120+0x40)++0x13
line.long 0x00 "REGION_BASE_LOW_3,Region Base Address Low Register 3"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_3   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_3,Region Base Address High Register 3"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_3  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_3,Region Top Address Low Register 3"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_3    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_3,Region Top Address High Register 3"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_3   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_3,Region Attributes Register 3"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 4 registers"
group.long (0x120+0x60)++0x13
line.long 0x00 "REGION_BASE_LOW_4,Region Base Address Low Register 4"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_4   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_4,Region Base Address High Register 4"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_4  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_4,Region Top Address Low Register 4"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_4    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_4,Region Top Address High Register 4"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_4   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_4,Region Attributes Register 4"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 5 registers"
group.long (0x120+0x80)++0x13
line.long 0x00 "REGION_BASE_LOW_5,Region Base Address Low Register 5"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_5   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_5,Region Base Address High Register 5"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_5  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_5,Region Top Address Low Register 5"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_5    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_5,Region Top Address High Register 5"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_5   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_5,Region Attributes Register 5"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 6 registers"
group.long (0x120+0xA0)++0x13
line.long 0x00 "REGION_BASE_LOW_6,Region Base Address Low Register 6"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_6   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_6,Region Base Address High Register 6"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_6  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_6,Region Top Address Low Register 6"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_6    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_6,Region Top Address High Register 6"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_6   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_6,Region Attributes Register 6"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 7 registers"
group.long (0x120+0xC0)++0x13
line.long 0x00 "REGION_BASE_LOW_7,Region Base Address Low Register 7"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_7   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_7,Region Base Address High Register 7"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_7  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_7,Region Top Address Low Register 7"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_7    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_7,Region Top Address High Register 7"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_7   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_7,Region Attributes Register 7"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
tree "Region 8 registers"
group.long (0x120+0xE0)++0x13
line.long 0x00 "REGION_BASE_LOW_8,Region Base Address Low Register 8"
hexmask.long.tbyte 0x00 12.--31. 0x10 " BASE_ADDRESS_LOW_8   ,Controls the base address bits"
line.long 0x04 "REGION_BASE_HIGH_8,Region Base Address High Register 8"
hexmask.long.byte 0x04 0.--7. 0x01 " BASE_ADDRESS_HIGH_8  ,Controls the base address bits"
line.long 0x08 "REGION_TOP_LOW_8,Region Top Address Low Register 8"
hexmask.long.tbyte 0x08 12.--31. 0x10 " TOP_ADDRESS_LOW_8    ,Controls the region top address bits"
hexmask.long.word 0x08 0.--11. 1. "          HIGH_4KB          ,Points to the highest byte of a 4KB-aligned area"
line.long 0x0C "REGION_TOP_HIGH_8,Region Top Address High Register 8"
hexmask.long.byte 0x0C 0.--7. 0x01 " TOP_ADDRESS_HIGH_8   ,Controls the region top address bits"
line.long 0x10 "REGION_ATTRIBUTES_8,Region Attributes Register 8"
bitfld.long 0x10 31. " S_WR_EN              ,Secure global write enable" "Disabled,Enabled"
bitfld.long 0x10 30. "        S_RD_EN           ,Secure global read enable" "Disabled,Enabled"
bitfld.long 0x10 0. "       FILTER_EN     ,Independent region enable for each filter unit" "Disabled,Enabled"
tree.end
newline
rgroup.long 0xFE0++0x1F
line.long 0x00 "PID0,Peripheral ID 0 Register"
hexmask.long.byte 0x00 0.--7. 1. " PART_NUMBER_0        ,Part number"
line.long 0x04 "PID1,Peripheral ID 1 Register"
bitfld.long 0x04 4.--7. " JEP106_ID_3_0        ,Identity code" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "              PART_NUMBER_1     ,Part number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PID2,Peripheral ID 2 Register"
bitfld.long 0x08 4.--7. " REVISION             ,Revision of the TZC-400" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 3. "              JEDEC_USED        ,Indicates that TZC-400 uses a manufacturer identity code that was allocated by JEDEC according to JEP106" "Not used,Used"
bitfld.long 0x08 0.--2. "       JEP106_ID_6_4 ,Identity code" "0,1,2,3,4,5,6,7"
line.long 0x0C "PID3,Peripheral ID 3 Register"
bitfld.long 0x0C 4.--7. " REVAND               ,Revision of the silicon" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 0.--3. "              MOD_NUMBER        ,This is set to 0x00" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "CID0,Component ID 0 Register"
hexmask.long.byte 0x10 0.--7. 1. " COMP_ID_0            ,Component ID 0 field"
line.long 0x14 "CID1,Component ID 1 Register"
hexmask.long.byte 0x14 0.--7. 1. " COMP_ID_1            ,Component ID 1 field"
line.long 0x18 "CID2,Component ID 2 Register"
hexmask.long.byte 0x18 0.--7. 1. " COMP_ID_2            ,Component ID 2 field"
line.long 0x1C "CID3,Component ID 3 Register"
hexmask.long.byte 0x1C 0.--7. 1. " COMP_ID_3            ,Component ID 3 field"
width 0x0B
tree.end
tree.end
tree "TZPC (TrustZone Protection Controller)"
base ad:0x02200000
width 23.
group.long 0x00++0x03
line.long 0x00 "TZPCR0SIZE,Secure RAM Region Size Register"
hexmask.long.word 0x00 0.--9. 1. " R0SIZE        ,Secure RAM region size"
group.long 0x800++0x03
line.long 0x00 "TZDECPROT0_SET/CLR,TZDECPROT Register 0 Set/Clear"
setclrfld.long 0x00 7. 0x04 7. 0x08 7. " DDRC          ,Protection status of DDR controller configuration space" "Locked,Unlocked"
setclrfld.long 0x00 3. 0x04 3. 0x08 3. "     DCFG_RESET  ,TZ protection status of DCFG" "Secure,Non-secure"
setclrfld.long 0x00 2. 0x04 2. 0x08 2. "  SPI_1   ,TZ protection status of SPI_1" "Secure,Non-secure"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  I2C_1 ,TZ protection status of I2C_1" "Secure,Non-secure"
group.long 0x80C++0x03
line.long 0x00 "TZDECPROT1_SET/CLR,TZDECPROT Register 1 Set/Clear"
setclrfld.long 0x00 5. 0x04 5. 0x08 5. " TZ_WDT_CTL    ,TrustZone watchdog control" "Not stopped,Stopped"
setclrfld.long 0x00 1. 0x04 1. 0x08 1. "  SPIDEN      ,Global secure privileged invasive debug enable" "Disabled,Enabled"
setclrfld.long 0x00 0. 0x04 0. 0x08 0. "    SPNIDEN ,Global secure privileged non-invasive debug enable" "Disabled,Enabled"
rgroup.long 0xFE0++0x0F
line.long 0x00 "TZPCPERIPHID0,TZPC Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0   ,Part number 0"
line.long 0x04 "TZPCPERIPHID1,TZPC Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0     ,Designer 0 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "           PARTNUMBER1 ,Part number 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "TZPCPERIPHID2,TZPC Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION      ,Revision" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "           DESIGNER1   ,Designer 1 value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "TZPCPERIPHID3,TZPC Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION ,Configuration"
rgroup.long 0xFF0++0x03
line.long 0x00 "TZPCPCELLID0,TZPC Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " TZPCPCELLID0  ,TZPCPCELLID0"
rgroup.long 0xFF4++0x03
line.long 0x00 "TZPCPCELLID1,TZPC Identification Register 1"
hexmask.long.byte 0x00 0.--7. 1. " TZPCPCELLID1  ,TZPCPCELLID1"
rgroup.long 0xFF8++0x03
line.long 0x00 "TZPCPCELLID2,TZPC Identification Register 2"
hexmask.long.byte 0x00 0.--7. 1. " TZPCPCELLID2  ,TZPCPCELLID2"
rgroup.long 0xFFC++0x03
line.long 0x00 "TZPCPCELLID3,TZPC Identification Register 3"
hexmask.long.byte 0x00 0.--7. 1. " TZPCPCELLID3  ,TZPCPCELLID3"
width 0x0B
tree.end
tree.end
tree "TMU (Thermal Monitoring Unit)"
base ad:0x01F80000
width 13.
group.long 0x00++0x03
line.long 0x00 "TMR,TMU Mode Register"
bitfld.long 0x00 31. " ME         ,Monitor mode enable" "Disabled,Enabled"
newline
bitfld.long 0x00 26.--27. " ALPF       ,Average low pass filter setting" "1.0,0.5,0.25,0.125"
newline
bitfld.long 0x00 15. " MSITE[6]   ,Monitoring site select: 6 DDR controller 1" "Disabled,Enabled"
bitfld.long 0x00 14. "              [5]    ,Monitoring site select: 5 DDR controller 2" "Disabled,Enabled"
bitfld.long 0x00 13. "      [4]     ,Monitoring site select: 4 DDR controller 3" "Disabled,Enabled"
newline
bitfld.long 0x00 12. " [3]        ,Monitoring site select: 3 core cluster" "Disabled,Enabled"
bitfld.long 0x00 11. "              [2]    ,Monitoring site select: 2 core cluster" "Disabled,Enabled"
bitfld.long 0x00 10. "      [1]     ,Monitoring site select: 1 core cluster" "Disabled,Enabled"
newline
bitfld.long 0x00 9. " [0]        ,Monitoring site select: 0 core cluster" "Disabled,Enabled"
rgroup.long 0x04++0x03
line.long 0x00 "TSR,TMU Status Register"
bitfld.long 0x00 30. " MIE        ,Monitoring interval exceeded" "Not exceeded,Exceeded"
bitfld.long 0x00 29. "          ORL    ,Out-of-range low temperature measurement detected" "Not detected,Detected"
newline
bitfld.long 0x00 28. " ORH        ,Out-of-range high temperature measurement detected" "Not detected,Detected"
if (((per.l(ad:0x01F80000+0x00))&0x80000000)==0x00)
group.long 0x08++0x03
line.long 0x00 "TMTMIR,TMU Monitor Temperature Measurement Interval Register"
bitfld.long 0x00 0.--3. " TMI        ,Temperature monitoring interval in seconds" "0.02s/0.015s/0.01s,0.04s/0.03s/0.02s,0.08s/0.05s/0.04s,0.17s/0.10s/0.08s,0.34s/0.20s/0.17s,0.67s/0.40s/0.34s,1.34s/0.80s/0.67s,2.7s/1.6s/1.34s,5.4s/3.2s/2.7s,10.7s/6.4s/5.4s,21.5s/12.9s/10.7s,42.9s/25.8s/21.5s,85.9s/51.5s/42.9s,171.8s/103.0s/85.9s,343.6s/206.1s/171.8s,Disabled"
else
rgroup.long 0x08++0x03
line.long 0x00 "TMTMIR,TMU Monitor Temperature Measurement Interval Register"
bitfld.long 0x00 0.--3. " TMI        ,Temperature monitoring interval in seconds" "0.02s/0.015s/0.01s,0.04s/0.03s/0.02s,0.08s/0.05s/0.04s,0.17s/0.10s/0.08s,0.34s/0.20s/0.17s,0.67s/0.40s/0.34s,1.34s/0.80s/0.67s,2.7s/1.6s/1.34s,5.4s/3.2s/2.7s,10.7s/6.4s/5.4s,21.5s/12.9s/10.7s,42.9s/25.8s/21.5s,85.9s/51.5s/42.9s,171.8s/103.0s/85.9s,343.6s/206.1s/171.8s,Disabled"
endif
group.long 0x20++0x0F
line.long 0x00 "TIER,TMU Interrupt Enable Register"
bitfld.long 0x00 31. " ITTEIE     ,Immediate temperature threshold exceeded interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 30. "              ATTEIE ,Average temperature threshold exceeded interrupt enable" "Disabled,Enabled"
bitfld.long 0x00 29. "      ATCTEIE ,Average temperature critical threshold exceeded interrupt enable" "Disabled,Enabled"
line.long 0x04 "TIDR,TMU Interrupt Detect Register"
eventfld.long 0x04 31. " ITTE       ,Immediate temperature threshold exceeded interrupt status" "No interrupt,Interrupt"
eventfld.long 0x04 30. "          ATTE   ,Average temperature threshold exceeded interrupt status" "No interrupt,Interrupt"
eventfld.long 0x04 29. "  ATCTE   ,Average temperature critical threshold exceeded interrupt status" "No interrupt,Interrupt"
line.long 0x08 "TISCR,TMU Interrupt Site Capture Register"
bitfld.long 0x08 31. " ISITE[15]  ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
bitfld.long 0x08 30. "            [14]   ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
bitfld.long 0x08 29. "    [13]    ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
newline
bitfld.long 0x08 28. " [12]       ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
bitfld.long 0x08 27. "            [11]   ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
newline
bitfld.long 0x08 26. " [10]       ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
bitfld.long 0x08 25. "            [9]    ,Temperature sensor site associated with the setting of TIDR[ITTE]" "Not masked,Masked"
newline
bitfld.long 0x08 15. " ASITE[15]  ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
bitfld.long 0x08 14. "            [14]   ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
bitfld.long 0x08 13. "    [13]    ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
newline
bitfld.long 0x08 12. " [12]       ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
bitfld.long 0x08 11. "            [11]   ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
newline
bitfld.long 0x08 10. " [10]       ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
bitfld.long 0x08 9. "            [9]    ,Temperature sensor site associated with the setting of TIDR[ATTE]" "Not masked,Masked"
line.long 0x0C "TICSCR,TMU Interrupt Critical Site Capture Register"
bitfld.long 0x0C 15. " CASITE[15] ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
bitfld.long 0x0C 14. "            [14]   ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
bitfld.long 0x0C 13. "    [13]    ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
newline
bitfld.long 0x0C 12. " [12]       ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
bitfld.long 0x0C 11. "            [11]   ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
newline
bitfld.long 0x0C 10. " [10]       ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
bitfld.long 0x0C 9. "            [9]    ,Temperature sensor site associated with the setting of TIDR[ATCTE]" "Not masked,Masked"
if (((per.l(ad:0x01F80000+0x40))&0x80000000)==0x80000000)
rgroup.long 0x40++0x03
line.long 0x00 "TMHTCR,TMU Monitor High Temperature Capture Register"
bitfld.long 0x00 31. " V          ,Valid reading" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Highest temperature recorded in degrees celsius"
else
rgroup.long 0x40++0x03
line.long 0x00 "TMHTCR,TMU Monitor High Temperature Capture Register"
bitfld.long 0x00 31. " V          ,Valid reading" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x40))&0x80000000)==0x80000000)
rgroup.long 0x44++0x03
line.long 0x00 "TMLTCR,TMU Monitor Low Temperature Capture Register"
bitfld.long 0x00 31. " V          ,Valid reading" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Lowest temperature recorded in degrees celsius"
else
rgroup.long 0x44++0x03
line.long 0x00 "TMLTCR,TMU Monitor Low Temperature Capture Register"
bitfld.long 0x00 31. " V          ,Valid reading" "Not valid,Valid"
endif
group.long 0x50++0x0B
line.long 0x00 "TMHTITR,TMU Monitor High Temperature Immediate Threshold Register"
bitfld.long 0x00 31. " EN         ,Enable threshold" "Disabled,Enabled"
hexmask.long.byte 0x00 0.--7. 1. "              TEMP   ,High temperature immediate threshold value"
line.long 0x04 "TMHTATR,TMU Monitor High Temperature Average Threshold Register"
bitfld.long 0x04 31. " EN         ,Enable threshold" "Disabled,Enabled"
hexmask.long.byte 0x04 0.--7. 1. "              TEMP   ,High temperature average threshold value"
line.long 0x08 "TMHTACTR,TMU Monitor High Temperature Average Critical Threshold Register"
bitfld.long 0x08 31. " EN         ,Enable threshold" "Disabled,Enabled"
hexmask.long.byte 0x08 0.--7. 1. "              TEMP   ,High temperature average critical threshold value"
group.long 0x80++0x07
line.long 0x00 "TTCFGR,TMU Temperature Configuration Register"
line.long 0x04 "TSCFGR,TMU Sensor Configuration Register"
if (((per.l(ad:0x01F80000+0x100))&0x80000000)==0x80000000)
rgroup.long 0x100++0x03
line.long 0x00 "TRITSR0,TMU Report Immediate Temperature Site Register 0"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 0 when V = 1"
else
rgroup.long 0x100++0x03
line.long 0x00 "TRITSR0,TMU Report Immediate Temperature Site Register 0"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x100+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x100+0x04)++0x03
line.long 0x00 "TRATSR0,TMU Report Average Temperature Site Register 0"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 0 when V = 1"
else
rgroup.long (0x100+0x04)++0x03
line.long 0x00 "TRATSR0,TMU Report Average Temperature Site Register 0"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x110))&0x80000000)==0x80000000)
rgroup.long 0x110++0x03
line.long 0x00 "TRITSR1,TMU Report Immediate Temperature Site Register 1"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 1 when V = 1"
else
rgroup.long 0x110++0x03
line.long 0x00 "TRITSR1,TMU Report Immediate Temperature Site Register 1"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x110+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x110+0x04)++0x03
line.long 0x00 "TRATSR1,TMU Report Average Temperature Site Register 1"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 1 when V = 1"
else
rgroup.long (0x110+0x04)++0x03
line.long 0x00 "TRATSR1,TMU Report Average Temperature Site Register 1"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x120))&0x80000000)==0x80000000)
rgroup.long 0x120++0x03
line.long 0x00 "TRITSR2,TMU Report Immediate Temperature Site Register 2"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 2 when V = 1"
else
rgroup.long 0x120++0x03
line.long 0x00 "TRITSR2,TMU Report Immediate Temperature Site Register 2"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x120+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x120+0x04)++0x03
line.long 0x00 "TRATSR2,TMU Report Average Temperature Site Register 2"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 2 when V = 1"
else
rgroup.long (0x120+0x04)++0x03
line.long 0x00 "TRATSR2,TMU Report Average Temperature Site Register 2"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x130))&0x80000000)==0x80000000)
rgroup.long 0x130++0x03
line.long 0x00 "TRITSR3,TMU Report Immediate Temperature Site Register 3"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 3 when V = 1"
else
rgroup.long 0x130++0x03
line.long 0x00 "TRITSR3,TMU Report Immediate Temperature Site Register 3"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x130+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x130+0x04)++0x03
line.long 0x00 "TRATSR3,TMU Report Average Temperature Site Register 3"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 3 when V = 1"
else
rgroup.long (0x130+0x04)++0x03
line.long 0x00 "TRATSR3,TMU Report Average Temperature Site Register 3"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x140))&0x80000000)==0x80000000)
rgroup.long 0x140++0x03
line.long 0x00 "TRITSR4,TMU Report Immediate Temperature Site Register 4"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 4 when V = 1"
else
rgroup.long 0x140++0x03
line.long 0x00 "TRITSR4,TMU Report Immediate Temperature Site Register 4"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x140+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x140+0x04)++0x03
line.long 0x00 "TRATSR4,TMU Report Average Temperature Site Register 4"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 4 when V = 1"
else
rgroup.long (0x140+0x04)++0x03
line.long 0x00 "TRATSR4,TMU Report Average Temperature Site Register 4"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x150))&0x80000000)==0x80000000)
rgroup.long 0x150++0x03
line.long 0x00 "TRITSR5,TMU Report Immediate Temperature Site Register 5"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 5 when V = 1"
else
rgroup.long 0x150++0x03
line.long 0x00 "TRITSR5,TMU Report Immediate Temperature Site Register 5"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x150+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x150+0x04)++0x03
line.long 0x00 "TRATSR5,TMU Report Average Temperature Site Register 5"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 5 when V = 1"
else
rgroup.long (0x150+0x04)++0x03
line.long 0x00 "TRATSR5,TMU Report Average Temperature Site Register 5"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+0x160))&0x80000000)==0x80000000)
rgroup.long 0x160++0x03
line.long 0x00 "TRITSR6,TMU Report Immediate Temperature Site Register 6"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Last temperature reading at site 6 when V = 1"
else
rgroup.long 0x160++0x03
line.long 0x00 "TRITSR6,TMU Report Immediate Temperature Site Register 6"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
if (((per.l(ad:0x01F80000+(0x160+0x04)))&0x80000000)==0x80000000)
rgroup.long (0x160+0x04)++0x03
line.long 0x00 "TRATSR6,TMU Report Average Temperature Site Register 6"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Average temperature reading at site 6 when V = 1"
else
rgroup.long (0x160+0x04)++0x03
line.long 0x00 "TRATSR6,TMU Report Average Temperature Site Register 6"
bitfld.long 0x00 31. " V          ,Valid measured temperature" "Not valid,Valid"
endif
sif (cpuis("LS2084*")||cpuis("LS2044*"))
group.long (0xF10+0x0)++0x03
line.long 0x00 "TTR0CR,TMU Temperature Range 0 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTS    ,Temperature calibration points" "1 point,2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 0"
group.long (0xF10+0x4)++0x03
line.long 0x00 "TTR1CR,TMU Temperature Range 1 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTS    ,Temperature calibration points" "1 point,2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 1"
group.long (0xF10+0x8)++0x03
line.long 0x00 "TTR2CR,TMU Temperature Range 2 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTS    ,Temperature calibration points" "1 point,2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 2"
group.long (0xF10+0xC)++0x03
line.long 0x00 "TTR3CR,TMU Temperature Range 3 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTS    ,Temperature calibration points" "1 point,2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 3"
elif (cpuis("LS2088A*"))
group.long (0xF10+0x0)++0x03
line.long 0x00 "TTR0CR,TMU Temperature Range 0 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTR    ,Temperature calibration points" ",2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 0"
group.long (0xF10+0x4)++0x03
line.long 0x00 "TTR1CR,TMU Temperature Range 1 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTR    ,Temperature calibration points" ",2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 1"
group.long (0xF10+0x8)++0x03
line.long 0x00 "TTR2CR,TMU Temperature Range 2 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTR    ,Temperature calibration points" ",2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 2"
group.long (0xF10+0xC)++0x03
line.long 0x00 "TTR3CR,TMU Temperature Range 3 Control Register"
bitfld.long 0x00 16.--19. " CAL_PTR    ,Temperature calibration points" ",2 points,3 points,4 points,5 points,6 points,7 points,8 points,9 points,10 points,11 points,12 points,13 points,14 points,15 points,16 points"
hexmask.long.byte 0x00 0.--7. 1. "             TEMP   ,Starting temperature in celsius for range 3"
endif
width 0x0B
tree.end
tree.open "USB (Universal Serial Bus Interface 3.0)"
tree "USB 1"
base ad:0x03100000
width 12.
rgroup.long 0x00++0x1B
line.long 0x00 "CAPLENGTH,Capability Register Length And HC Interface Version Number"
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION                  ,HC interface version number"
hexmask.long.byte 0x00 0.--7. 1. "              CAPLENGTH              ,Capability register length"
line.long 0x04 "HCSPARAMS1,Structural Parameters 1"
hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS                    ,Number of ports"
hexmask.long.word 0x04 8.--18. 1. "                MAXINTRS               ,Number of interrupters"
hexmask.long.byte 0x04 0.--7. 1. "               MAXSLOTS                    ,Number of device slots"
line.long 0x08 "HCSPARAMS2,Structural Parameters 2"
bitfld.long 0x08 27.--31. " MAXSCBUFLO                  ,Max scratchpad bufs lo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 26. "                SPR                    ,Scratchpad restore" "0,1"
bitfld.long 0x08 21.--25. "                  MAXSCBUFHI                  ,Max scratchpad bufs hi" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x08 4.--7. " ERSTMAX                     ,Event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                IST                    ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "HCSPARAMS3,Structural Parameters 3"
hexmask.long.word 0x0C 16.--31. 1. " U2_DEVICE_EXIT_LAT          ,U2 device exit latency"
hexmask.long.byte 0x0C 0.--7. 1. "              U1_DEVICE_EXIT_LAT     ,U1 device exit latency"
line.long 0x10 "HCCPARAMS1,Capability Parameters"
hexmask.long.word 0x10 16.--31. 0x01 " XECP                        ,XHCI extended capabilities pointer"
bitfld.long 0x10 12.--15. "              MAXPSASIZE             ,Maximum primary stream array size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 11. "                 CFC                         ,Contiguous frame ID capability" "0,1"
newline
bitfld.long 0x10 10. " SEC                         ,Stopped EDLTA capability" "0,1"
bitfld.long 0x10 9. "                 SPC                    ,Stopped - short packet capability" "0,1"
bitfld.long 0x10 8. "                  PAE                         ,Parse all event data" "0,1"
newline
bitfld.long 0x10 7. " NSS                         ,No secondary SID support" "0,1"
bitfld.long 0x10 6. "                 LTC                    ,Latency tolerance messaging capability" "0,1"
bitfld.long 0x10 5. "                  LHRC                        ,Light HC reset capability" "0,1"
newline
bitfld.long 0x10 4. " PIND                        ,Port indicators" "0,1"
bitfld.long 0x10 3. "                 PPC                    ,Port power control" "0,1"
bitfld.long 0x10 2. "                  CSZ                         ,Context size" "0,1"
newline
bitfld.long 0x10 1. " BNC                         ,BW negotiation capability" "0,1"
bitfld.long 0x10 0. "                 AC64                   ,64-bit addressing capability" "0,1"
line.long 0x14 "DBOFF,Doorbell Offset"
hexmask.long 0x14 2.--31. 0x04 " DOORBELL_ARRAY_OFFSET       ,Doorbell array offset"
line.long 0x18 "RTSOFF,Runtime Register Space Offset"
hexmask.long 0x18 5.--31. 0x20 " RUNTIME_REG_SPACE_OFFSET    ,Runtime register space offset"
rgroup.long 0x1C++0x03
line.long 0x00 "HCCPARAMS2,Capability Parameters 2"
bitfld.long 0x00 5. " CIC                         ,Configuration information capability" "0,1"
bitfld.long 0x00 4. "                 LEC                    ,Large ESIT payload capability" "0,1"
bitfld.long 0x00 3. "                  CTC                         ,Compliance transition capability" "0,1"
newline
bitfld.long 0x00 2. " FSC                         ,Force save context capability" "0,1"
bitfld.long 0x00 1. "                 CMC                    ,Configure endpoint command max exit latency too large capability" "0,1"
bitfld.long 0x00 0. "                  U3C                         ,U3 entry capability" "0,1"
group.long 0xC100++0x07
line.long 0x00 "GSBUSCFG0,Global SoC Bus Configuration Register 0"
bitfld.long 0x00 28.--31. " DATRDREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                DESRDREQINFO           ,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                 DATWRREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " DESWRREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. "                INCR256BRSTENA         ,NCR256 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           INCR128BRSTENA              ,NCR128 burst type enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " INCR64BRSTENA               ,NCR64 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          INCR32BRSTENA          ,NCR32 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           INCR16BRSTENA               ,NCR16 burst type enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " INCR8BRSTENA                ,NCR8 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          INCR4BRSTENA           ,NCR4 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           INCRBRSTENA                 ,Undefined length INCR burst type enable" "INCRX,INCR"
line.long 0x04 "GSBUSCFG1,Global SoC Bus Configuration Register 1"
bitfld.long 0x04 12. " EN1KPAGE                    ,1k page boundary enable" "Disabled,Enabled"
bitfld.long 0x04 8.--11. "          PIPETRANSLIMIT         ,AXI pipelined transfers burst request limit" "1 request,2 requests,3 requests,4 requests,5 requests,6 requests,7 requests,8 requests,9 requests,10 requests,11 requests,12 requests,13 requests,14 requests,15 requests,16 requests"
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03100000+0xC108))&0x20000000)==0x20000000)
group.long 0xC108++0x03
line.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
bitfld.long 0x00 29. " USBTXPKTCNTSEL              ,USB transmit packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBTXPKTCNT            ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. "                 USBMAXTXBURSTSIZE           ,USB maximum TX burst size"
else
group.long 0xC108++0x03
line.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
bitfld.long 0x00 29. " USBTXPKTCNTSEL              ,USB transmit packet count enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x03100000+0xC10C))&0x20000000)==0x20000000)
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBRXPKTCNT            ,USB receive packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 19.--23. "                 USBMAXRXBURSTSIZE           ,USB maximum receive burst size" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
else
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
endif
else
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
elif (((per.l(ad:0x03100000+0xC110))&0x3000)==0x2000)
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBRXPKTCNT            ,USB receive packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 19.--23. "                 USBMAXRXBURSTSIZE           ,USB maximum receive burst size" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
else
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
else
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE                  ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
else
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
endif
else
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
bitfld.long 0x00 12.--13. "            PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
bitfld.long 0x00 12.--13. "            PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
else
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
bitfld.long 0x00 12.--13. "                  PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
bitfld.long 0x00 12.--13. "                  PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
endif
endif
group.long 0xC118++0x03
line.long 0x00 "GSTS,Global Status Register"
rbitfld.long 0x00 7. " HOST_IP                     ,Host interrupt pending" "Not pending,Pending"
rbitfld.long 0x00 6. "       DEVICE_IP              ,Device interrupt pending" "Not pending,Pending"
bitfld.long 0x00 5. "        CSRTIMEOUT                  ,Software write or read to a core register timeout" "No timeout,Timeout"
newline
bitfld.long 0x00 4. " BUSERRADDRVLD               ,Bus error address valid" "Invalid,Valid"
rbitfld.long 0x00 0.--1. "           CURMOD                 ,Current mode of operation" "Device,Host,?..."
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03100000+0xC11C))&0x100)==0x100)
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "                P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 16. "          PARKMODE_DISABLE_HS    ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "                L1SUSPTHRLDENFORHOST        ,L1 suspend threshold for host enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. " L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                HELDEN                 ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "                HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
newline
bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "           LOA_FILTER_EN          ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
else
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "                P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 16. "          PARKMODE_DISABLE_HS    ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "                L1SUSPTHRLDENFORHOST        ,L1 suspend threshold for host enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
endif
elif (((per.l(ad:0x03100000+0xC110))&0x3000)==0x2000)
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "               DEV_TRB_OUT_SPR_IND    ,OUT TRB short packet indication enable" "Disabled,Enabled"
bitfld.long 0x00 26. "           DEV_FORCE_20_CLK_FOR_30_CLK ,Force 2.0 clk as 3.0 clk enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 24. "          DEV_L1_EXIT_BY_HW      ,Remote wakeup for L1 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. " L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                HELDEN                 ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "                HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
newline
bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "           LOA_FILTER_EN          ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "                DEV_TRB_OUT_SPR_IND         ,OUT TRB short packet indication enable" "Disabled,Enabled"
newline
bitfld.long 0x00 26. " DEV_FORCE_20_CLK_FOR_30_CLK ,Force 2.0 clk as 3.0 clk enable" "Disabled,Enabled"
bitfld.long 0x00 25. "          P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 24. "           DEV_L1_EXIT_BY_HW           ,Remote wakeup for L1 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "          L1SUSPTHRLDFORHOST     ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                 HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "               DEV_TRB_OUT_SPR_IND    ,OUT TRB short packet indication enable" "Disabled,Enabled"
bitfld.long 0x00 25. "           P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " DEV_L1_EXIT_BY_HW           ,Remote wakeup for L1 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "          IP_GAP_ADD_ON          ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                  DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
newline
bitfld.long 0x00 19. " NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "          NAK_PER_ENH_HS         ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
group.long 0xC128++0x03
line.long 0x00 "GUID,Global User ID Register"
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
group.long 0xC12C++0x03
line.long 0x00 "GUCTL,Global User Control Register"
hexmask.long.word 0x00 22.--31. 1. " REFCLKPER                   ,Period of ref_clk in ns"
bitfld.long 0x00 21. "              NOEXTRDL               ,No extra delay between SOF and the first packet" "Waits 2 us,Doesn't wait"
bitfld.long 0x00 17. "       SPRSCTRLTRANSEN             ,Sparse control transaction enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " RESBWHSEPS                  ,Indicates whether reserve 80% or 85% of bandwidth for HS periodic EPs" "80%,85%"
bitfld.long 0x00 15. "               CMDEVADDR              ,Compliance mode for device address" "Equal to Slot ID,Increment address"
bitfld.long 0x00 14. "  USBHSTINAUTORETRYEN         ,Host IN auto retry" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " ENOVERLAPCHK                ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled"
bitfld.long 0x00 12. "          EXTCAPSUPTEN           ,External extended capability support enable" "Disabled,Enabled"
bitfld.long 0x00 11. "           INSRTEXTRFSBODL             ,Insert extra delay between FS bulk OUT transactions" "Not inserted,Inserted"
newline
bitfld.long 0x00 9.--10. " DTCT                        ,Device timeout coarse tuning" "DTFT,500 us,1.5 ms,6.5 ms"
hexmask.long.word 0x00 0.--8. 1. "            DTFT                   ,Device timeout fine tuning"
elif (((per.l(ad:0x03100000+0xC110))&0x3000)==0x2000)
group.long 0xC12C++0x03
line.long 0x00 "GUCTL,Global User Control Register"
hexmask.long.word 0x00 22.--31. 1. " REFCLKPER                   ,Period of ref_clk in ns"
bitfld.long 0x00 17. "              SPRSCTRLTRANSEN        ,Sparse control transaction enable" "Disabled,Enabled"
bitfld.long 0x00 14. "           USBHSTINAUTORETRYEN         ,Host IN auto retry" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " ENOVERLAPCHK                ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled"
bitfld.long 0x00 12. "          EXTCAPSUPTEN           ,External extended capability support enable" "Disabled,Enabled"
bitfld.long 0x00 11. "           INSRTEXTRFSBODL             ,Insert extra delay between FS bulk OUT transactions" "Not inserted,Inserted"
else
hgroup.long 0xC12C++0x03
hide.long 0x00 "GUCTL,Global User Control Register"
endif
width 15.
if (((per.l(ad:0x03100000+0xC118))&0x10)==0x10)
rgroup.long 0xC130++0x07
line.long 0x00 "GBUSERRADDRLO,Global SoC Bus Error Address Register Low"
line.long 0x04 "GBUSERRADDRHI,Global SoC Bus Error Address Register High"
else
hgroup.long 0xC130++0x03
hide.long 0x00 "GBUSERRADDRLO,Global SoC Bus Error Address Register Low"
hgroup.long 0xC134++0x03
hide.long 0x00 "GBUSERRADDRHI,Global SoC Bus Error Address Register High"
endif
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03100000+0xC700))&0x07)==0x01)
hgroup.long 0xC138++0x03
hide.long 0x00 "GPRTBIMAPLO,SuperSpeed Port To Bus Instance Mapping"
else
group.long 0xC138++0x03
line.long 0x00 "GPRTBIMAPLO,SuperSpeed Port To Bus Instance Mapping"
bitfld.long 0x00 0.--3. " BINUM1                              ,SS USB instance number for port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC13C++0x03
line.long 0x00 "GPRTBIMAPHI,High-Speed Port To Bus Instance Mapping"
bitfld.long 0x00 0.--3. " BINUM9                              ,SS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xC140++0x07
line.long 0x00 "GHWPARAMS0,Global Hardware Parameters Register 0"
hexmask.long.byte 0x00 24.--31. 1. " DWC_USB3_AWIDTH                     ,DWC_USB3_AWIDTH"
hexmask.long.byte 0x00 16.--23. 1. "            DWC_USB3_SDWIDTH                 ,DWC_USB3_SDWIDTH"
hexmask.long.byte 0x00 8.--15. 1. "            DWC_USB3_MDWIDTH           ,DWC_USB3_MDWIDTH"
newline
bitfld.long 0x00 6.--7. " DWC_USB3_SBUS_TYPE                  ,DWC_USB3_SBUS_TYPE" "AHB,?..."
bitfld.long 0x00 3.--5. "           DWC_USB3_MBUS_TYPE               ,DWC_USB3_MBUS_TYPE" ",AXI,?..."
bitfld.long 0x00 0.--2. "           DWC_USB3_MODE              ,DWC_USB3_MODE" ",,DRD,?..."
line.long 0x04 "GHWPARAMS1,Global Hardware Parameters Register 1"
bitfld.long 0x04 31. " DWC_USB3_EN_DBC                     ,Enables xhci debug capability" "Disabled,Enabled"
bitfld.long 0x04 30. "      DWC_USB3_RM_OPT_FEATURES         ,Optional features removal enable" "Disabled,Enabled"
bitfld.long 0x04 28. "      DWC_USB3_RAM_BUS_CLKS_SYNC ,Specifies whether the RAM clock and the bus clock are synchronous to each other" "Asynchronous,Synchronous"
newline
bitfld.long 0x04 27. " DWC_USB3_MAC_RAM_CLKS_SYNC          ,Specifies whether the MAC clock and the RAM clock are synchronous to each other" "Asynchronous,Synchronous"
bitfld.long 0x04 26. "  DWC_USB3_MAC_PHY_CLKS_SYNC       ,Specifies whether the MAC clock and the PHY clock are synchronous to each other" "Asynchronous,Synchronous"
bitfld.long 0x04 24.--25. "  DWC_USB3_EN_PWROPT         ,Specifies the power optimization mode" "No power optimization,Clock gating only,?..."
newline
bitfld.long 0x04 23. " DWC_USB3_SPRAM_TYP                  ,Selects the FIFO synchronous static RAM type" "2-Port-RAM,SPRAM"
bitfld.long 0x04 21.--22. "    DWC_USB3_NUM_RAMS                ,Selects the number of RAMs" "0,1,2,3"
bitfld.long 0x04 15.--20. "             DWC_USB3_DEVICE_NUM_INT    ,Selects the number of event buffers in device mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
newline
bitfld.long 0x04 12.--14. " DWC_USB3_ASPACEWIDTH                ,Selects the address space port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 9.--11. "             DWC_USB3_REQINFOWIDTH            ,Selects the request/response info port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 6.--8. "             DWC_USB3_DATAINFOWIDTH     ,Selects the data info port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
newline
bitfld.long 0x04 3.--5. " DWC_USB3_BURSTWIDTH                 ,Selects the burst port width of the master and slave bus interfaces - 1" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 0.--2. "             DWC_USB3_IDWIDTH1                ,DWC_USB3_IDWIDTH-1" "0,1,2,3,4,5,6,7"
rgroup.long 0xC148++0x13
line.long 0x00 "GHWPARAMS2,Global Hardware Parameters Register 2"
line.long 0x04 "GHWPARAMS3,Global Hardware Parameters Register 3"
hexmask.long.word 0x04 23.--30. 1. " DWC_USB3_CACHE_TOTAL_XFER_RESOURCES ,Selects the maximum number of transfer resources in the core"
bitfld.long 0x04 18.--22. "          DWC_USB3_NUM_IN_EPS              ,Specifies the maximum number of device mode IN endpoints active at any time" ",,,,4,?..."
bitfld.long 0x04 12.--17. "             DWC_USB3_NUM_EPS           ,Specifies the number of device mode single directional endpoints" ",,,,,,,,8,?..."
newline
bitfld.long 0x04 10. " DWC_USB3_VENDOR_CTL_INTERFACE       ,Enables the UTMI+ PHY vendor control interface" "0,1"
bitfld.long 0x04 6.--7. "             DWC_USB3_HSPHY_DWIDTH            ,Specifies the data width of the UTMI+ PHY interface" ",,8/16-bits,?..."
bitfld.long 0x04 2.--3. "     DWC_USB3_HSPHY_INTERFACE   ,Specifies the high-speed PHY interface" "0,1,2,3"
newline
bitfld.long 0x04 0.--1. " DWC_USB3_SSPHY_INTERFACE            ,DWC_USB3_SSPHY_INTERFACE" "0,1,2,3"
line.long 0x08 "GHWPARAMS4,Global Hardware Parameters Register 4"
bitfld.long 0x08 28.--31. " DWC_USB3_BMU_LSP_DEPTH              ,Specifies the depth of the BMU-LSP status buffer" ",,,,4,?..."
bitfld.long 0x08 24.--27. "             DWC_USB3_BMU_PTL_DEPTH           ,Specifies the depth of the BMU-PTL source/sink buffers-1" ",,,,,,,,8,?..."
bitfld.long 0x08 23. "             DWC_USB3_EN_ISOC_SUPT      ,Enables isochronous endpoint capability" "0,1"
newline
bitfld.long 0x08 17.--20. " DWC_USB3_NUM_SS_USB_INSTANCES       ,Specifies the number of SuperSpeed USB bus instances" ",1,?..."
bitfld.long 0x08 0.--5. "             DWC_USB3_CACHE_TRBS_PER_TRANSFER ,Selects the number of transfer request blocks" ",,,,4,?..."
line.long 0x0C "GHWPARAMS5,Global Hardware Parameters Register 5"
bitfld.long 0x0C 22.--27. " DWC_USB3_DFQ_FIFO_DEPTH             ,Specifies the size of the BMU descriptor fetch request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "            DWC_USB3_DWQ_FIFO_DEPTH          ,Specifies the size of the BMU descriptor write queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 10.--15. "            DWC_USB3_TXQ_FIFO_DEPTH    ,Specifies the size of the BMU tx request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x0C 4.--9. " DWC_USB3_RXQ_FIFO_DEPTH             ,Specifies the size of the BMU rx request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--3. "            DWC_USB3_BMU_BUSGM_DEPTH         ,Specifies the depth of the BMU-BUSGM source/sink buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "GHWPARAMS6,Global Hardware Parameters Register 6"
hexmask.long.word 0x10 16.--31. 1. " DWC_USB3_RAM0_DEPTH                 ,Specifies the depth of RAM0"
bitfld.long 0x10 15. "          BUSFLTRSSUPPORT                  ,Specifies whether to add a filter for VBUS and ID related control inputs from the PHY" "Not added,Added"
bitfld.long 0x10 12. "     ADPSUPPORT                 ,Enables internal ADP capability of the USB 3.0 core" "Disabled,Enabled"
newline
bitfld.long 0x10 11. " HNPSUPPORT                          ,HNP support enable" "Disabled,Enabled"
bitfld.long 0x10 7. "      DWC_USB3_EN_FPGA                 ,Hardware validation/driver development with an FPGA platform" "No,Yes"
bitfld.long 0x10 6. "           DWC_USB3_EN_DBG_PORTS      ,Used for FPGA hardware validation of the core" "Not Used,Used"
newline
bitfld.long 0x10 0.--5. " DWC_USB3_PSQ_FIFO_DEPTH             ,Specifies the size of the BMU protocol status queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC15C++0x03
line.long 0x00 "GHWPARAMS7,Global Hardware Parameters Register 7"
hexmask.long.word 0x00 16.--31. 1. " DWC_USB3_RAM2_DEPTH                 ,Specifies the depth of RAM2"
hexmask.long.word 0x00 0.--15. 1. "          DWC_USB3_RAM1_DEPTH              ,Specifies the depth of RAM1"
width 16.
newline
group.long 0xC180++0x07
line.long 0x00 "GPRTBIMAP_HSLO,Global High-Speed Port To Bus Instance Mapping Low Register"
bitfld.long 0x00 0.--3. " BINUM1 ,HS USB instance number for port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "GPRTBIMAP_HSHI,Global High-Speed Port To Bus Instance Mapping High Register"
bitfld.long 0x04 0.--3. " BINUM9 ,HS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 15.
newline
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03100000+0xC14C))&0x0C)==0x08)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
elif (((per.l(ad:0x03100000+0xC14C))&0x0C)==0x0C)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
else
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
endif
elif (((per.l(ad:0x03100000+0xC110))&0x3000)==0x2000)
if (((per.l(ad:0x03100000+0xC14C))&0x0C)==0x08)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " SUSPHY                ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
bitfld.long 0x00 3. "    PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
elif (((per.l(ad:0x03100000+0xC14C))&0x0C)==0x0C)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " SUSPHY                ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
bitfld.long 0x00 3. "    PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
else
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
rbitfld.long 0x00 4. " ULPI_UTMI_SEL         ,ULPI or UTMI+ select" "UTMI+,ULPI"
bitfld.long 0x00 3. "            PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
endif
endif
if (((per.l(ad:0x03100000+0xC700))&0x07)==0x04)
group.long 0xC2C0++0x03
line.long 0x00 "GUSB3PIPECTL0,Global USB 3.0 PIPE Control Register 0"
bitfld.long 0x00 31. " PHYSOFTRST            ,USB3 PHY soft reset" "No reset,Reset"
bitfld.long 0x00 29. "         U2SSINACTP3OK        ,P3 OK for U2/ssinactive" "P2,P3"
bitfld.long 0x00 28. "                   DISRXDETP3        ,Receiver detection in P3 state" "Stays in P3,Goes to P2 then back P3"
newline
bitfld.long 0x00 25. " U1U2EXITFAIL_TO_RECOV ,Selects transition from U1/U2 to recovery or SS inactive when U1/U2 LFPS handshake fails" "No effect,Failed"
rbitfld.long 0x00 15.--16. "        DATWIDTH             ,PIPE data width" "32 bits,16 bits,8 bits,?..."
bitfld.long 0x00 6. "              TXSWING           ,TXSWING field" "0,1"
newline
bitfld.long 0x00 3.--5. " TXMARGIN              ,TXMARGIN field" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 1.--2. "                TXDEEMPHASIS         ,Value driven to the PHY is controlled by LTSSM during USB3 compliance mode" "0,1,2,3"
bitfld.long 0x00 0. "                    ELASTICBUFFERMODE ,Elastic buffer mode" "0,1"
else
hgroup.long 0xC2C0++0x03
hide.long 0x00 "GUSB3PIPECTL0,Global USB 3.0 PIPE Control Register 0"
endif
group.long 0xC300++0x03
line.long 0x00 "GTXFIFOSIZ0,Global Transmit FIFO Size Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_0          ,Transmit FIFO_0 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_0            ,TXFDEP_0"
group.long 0xC310++0x03
line.long 0x00 "GTXFIFOSIZ1,Global Transmit FIFO Size Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_1          ,Transmit FIFO_1 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_1            ,TXFDEP_1"
group.long 0xC320++0x03
line.long 0x00 "GTXFIFOSIZ2,Global Transmit FIFO Size Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_2          ,Transmit FIFO_2 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_2            ,TXFDEP_2"
group.long 0xC330++0x03
line.long 0x00 "GTXFIFOSIZ3,Global Transmit FIFO Size Register 3"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_3          ,Transmit FIFO_3 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_3            ,TXFDEP_3"
group.long 0xC380++0x03
line.long 0x00 "GRXFIFOSIZ0,Global Receive FIFO Size Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_0          ,Receive FIFO_0 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_0            ,RXFDEP_0"
group.long 0xC390++0x03
line.long 0x00 "GRXFIFOSIZ1,Global Receive FIFO Size Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_1          ,Receive FIFO_1 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_1            ,RXFDEP_1"
group.long 0xC3A0++0x03
line.long 0x00 "GRXFIFOSIZ2,Global Receive FIFO Size Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_2          ,Receive FIFO_2 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_2            ,RXFDEP_2"
newline
rgroup.long 0xC400++0x03
line.long 0x00 "GEVNTADRLO,Global Event Buffer Address Register Low"
group.long 0xC404++0x07
line.long 0x00 "GEVNTADR0HI,Global Event Buffer Address Register High"
line.long 0x04 "GEVNTSIZN,Global Event Buffer Size Register"
bitfld.long 0x04 31. " EVNTINTMASK           ,Event interrupt mask" "Not masked,Masked"
hexmask.long.word 0x04 0.--15. 1. "       EVNTSIZ              ,Event buffer size in bytes"
group.long 0xC40C++0x03
line.long 0x00 "GEVNTCOUNT0,Global Event Buffer Count Register 0"
hexmask.long.word 0x00 0.--15. 1. " EVNTCOUNT             ,Event count"
rgroup.long 0xC600++0x03
line.long 0x00 "GHWPARAMS8,Global Hardware Parameters Register 8"
group.long 0xC610++0x03
line.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register"
bitfld.long 0x00 3. " DEVICE_TXFIFO[3]      ,Device TXFIFO 3 priority" "Low,High"
bitfld.long 0x00 2. "             [2]                  ,Device TXFIFO 2 priority" "Low,High"
bitfld.long 0x00 1. "                 [1]               ,Device TXFIFO 1 priority" "Low,High"
newline
bitfld.long 0x00 0. " [0]                   ,Device TXFIFO 0 priority" "Low,High"
group.long 0xC618++0x07
line.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register"
bitfld.long 0x00 2. " HOST_TXFIFO[2]        ,Host TXFIFO 2 priority" "Low,High"
bitfld.long 0x00 1. "             [1]                  ,Host TXFIFO 1 priority" "Low,High"
bitfld.long 0x00 0. "                 [0]               ,Host TXFIFO 0 priority" "Low,High"
line.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register"
bitfld.long 0x04 2. " HOST_RXFIFO[2]        ,Host RXFIFO 2 priority" "Low,High"
bitfld.long 0x04 1. "             [1]                  ,Host RXFIFO 1 priority" "Low,High"
bitfld.long 0x04 0. "                 [0]               ,Host RXFIFO 0 priority" "Low,High"
if (((per.l(ad:0x03100000+0xC110))&0x3000)==0x1000)
group.long 0xC624++0x03
line.long 0x00 "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register"
bitfld.long 0x00 8.--12. " HOSTRXFIFOHILOW       ,Host RXFIFO DMA high-low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "               HOTXFIFOHILOPRI      ,Host TXFIFO DMA high-low priority ratio reset value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
hgroup.long 0xC624++0x03
hide.long 0x00 "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register"
endif
group.long 0xC630++0x03
line.long 0x00 "GFLADJ,Global Frame Length Adjustment Register"
hexmask.long.word 0x00 8.--21. 1. " GFLADJ_REFCLK_FLADJ   ,Indicates the frame length adjustment to be applied when SOF/ITP counter is running on the ref_clk"
bitfld.long 0x00 7. "             GFLADJ_30MHZ_REG_SEL ,Selects whether to use the input signal fladj_30mhz_reg or the GFLADJ.GFLADJ_30MHZ to adjust the frame length for the SOF/ITP" "FLADJ_30MHZ_REG,GFLADJ.GFLADJ_30MHZ"
bitfld.long 0x00 0.--5. "  GFLADJ_30MHZ      ,Indicates the value that is used for frame length adjustment instead of considering from the sideband input signal fladj_30mhz_reg" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC700++0x0B
line.long 0x00 "DCFG,Device Configuration Register"
bitfld.long 0x00 23. " IGNORESTREAMPP        ,Receive or ignore PP bit" "Received,Ignored"
bitfld.long 0x00 22. "         LPMCAP               ,LPM capability enable" "Disabled,Enabled"
bitfld.long 0x00 17.--21. "             NUMP              ,Number of receive buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 12.--16. " INTRNUM               ,Interrupt number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 3.--9. 0x08 "               DEVADDR              ,Device address"
bitfld.long 0x00 0.--2. "                 DEVSPD            ,Device speed" "High-speed,Full-speed,,,SuperSpeed,?..."
line.long 0x04 "DCTL,Device Control Register"
bitfld.long 0x04 31. " RUN_STOP              ,Run/Stop" "Stopped,Started"
eventfld.long 0x04 30. "          CSFTRST              ,Core soft reset" "No reset,Reset"
bitfld.long 0x04 24.--28. "             HIRD_THRES        ,HIRD threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x04 23. " APPL1RES[3]           ,LPM NYET response threshold bit 3" "0,1"
bitfld.long 0x04 22. "                [2]                  ,LPM NYET response threshold bit 2" "0,1"
bitfld.long 0x04 21. "                    [1]               ,LPM NYET response threshold bit 1" "0,1"
newline
bitfld.long 0x04 20. " [0]                   ,LPM NYET response threshold bit 0" "0,1"
bitfld.long 0x04 17. "                CRS                  ,Controller restore state" "No effect,Restore"
bitfld.long 0x04 16. "            CSS               ,Controller save state" "No effect,Restore"
newline
bitfld.long 0x04 12. " INITU2ENA             ,Initiate U2 enable" "Disabled,Enabled"
bitfld.long 0x04 11. "         ACCEPTU2ENA          ,Accept U2 enable" "Disabled,Enabled"
bitfld.long 0x04 10. "             INITU1ENA         ,Initiate U1 enable" "Disabled,Enabled"
newline
bitfld.long 0x04 9. " ACCEPTU1ENA           ,Accept U1 enable" "Disabled,Enabled"
bitfld.long 0x04 5.--8. "         ULSTCHNGREQ          ,USB/Link state change request" "No action,,,,SS.Disabled,Rx.Detect,SS.Inactive,,Recovery,?..."
bitfld.long 0x04 1.--4. "          TSTCTL            ,Test control mode" "Disabled,Test_J,Test_K,Test_SE0_NAK,Test_Packet,Test_Force_Enable,?..."
line.long 0x08 "DEVTEN,Device Event Enable Register"
bitfld.long 0x08 12. " VNDRDEVTSTRCVEDEN     ,Vendor device test LMP received event enable" "Disabled,Enabled"
bitfld.long 0x08 9. "         ERRTICERREN          ,Erratic error event enable" "Disabled,Enabled"
bitfld.long 0x08 7. "             SOFEN             ,Start of frame enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " U3L2L1SUSPEN          ,U3/L2-L1 suspend event enable" "Disabled,Enabled"
bitfld.long 0x08 4. "         WKUPEVTEN            ,Resume/Remote wakeup detected event enable" "Disabled,Enabled"
bitfld.long 0x08 3. "             ULSTCNGEN         ,USB/Link state change event enable" "Disabled,Enabled"
newline
bitfld.long 0x08 2. " CONNECTDONEEN         ,Connection done enable" "Disabled,Enabled"
bitfld.long 0x08 1. "         USBRSTEN             ,USB reset enable" "Disabled,Enabled"
bitfld.long 0x08 0. "             DISCONNEVTEN      ,Disconnect detected event enable" "Disabled,Enabled"
if (((per.l(ad:0x03100000+0xC70C))&0x07)==0x04)
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03100000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "U0,U1,U2,U3,SS_DIS,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset"
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
else
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "U0,U1,U2,U3,SS_DIS,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset"
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
endif
else
if (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03100000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,Early Suspend,?..."
bitfld.long 0x00 17. "        RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
elif (((per.l(ad:0x03100000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03100000+0xC110))&0x02)==0x00)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,,,,,,,,,Reset,Resume,?..."
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
elif (((per.l(ad:0x03100000+0xC144))&0x300000)!=0x200000)&&(((per.l(ad:0x03100000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,Early Suspend,?..."
bitfld.long 0x00 17. "        RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
else
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,,,,,,,,,Reset,Resume,?..."
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
endif
endif
hgroup.long 0xC710++0x03
hide.long 0x00 "DGCMDPAR,Device Generic Command Parameter Register"
group.long 0xC714++0x03
line.long 0x00 "DGCMD,Device Generic Command Register"
rbitfld.long 0x00 15. " CMDSTATUS[3]          ,Command status 3" "Success,Error"
rbitfld.long 0x00 14. "          [2]                  ,Command status 2" "Success,Error"
rbitfld.long 0x00 13. "              [1]               ,Command status 1" "Success,Error"
newline
rbitfld.long 0x00 12. " [0]                   ,Command status 0" "Success,Error"
bitfld.long 0x00 10. "          CMDACT               ,Command active" "Not active,Active"
bitfld.long 0x00 8. "           CMDIOC            ,Command interrupt on complete" "Masked,Not masked"
newline
hexmask.long.byte 0x00 0.--7. 1. " CMDTYP                ,Command type"
group.long 0xC720++0x03
line.long 0x00 "DALEPENA,Device Active USB Endpoint Enable Register"
bitfld.long 0x00 7. " USBACTEP[7]           ,USB EP3-IN" "Not active,Active"
bitfld.long 0x00 6. "       [6]                  ,USB EP3-OUT" "Not active,Active"
bitfld.long 0x00 5. "           [5]               ,USB EP2-IN" "Not active,Active"
newline
bitfld.long 0x00 4. " [4]                   ,USB EP2-OUT" "Not active,Active"
bitfld.long 0x00 3. "       [3]                  ,USB EP1-IN" "Not active,Active"
bitfld.long 0x00 2. "           [2]               ,USB EP1-OUT" "Not active,Active"
newline
bitfld.long 0x00 1. " [1]                   ,USB EP0-IN" "Not active,Active"
bitfld.long 0x00 0. "       [0]                  ,USB EP0-OUT" "Not active,Active"
group.long (0xC800+0x0)++0x0F
line.long 0x00 "DEPCMDPAR20,Device Physical Endpoint-0 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR10,Device Physical Endpoint-0 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR00,Device Physical Endpoint-0 Command Parameter 0 Register"
line.long 0x0C "DEPCMD0,Device Physical Endpoint-0 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x10)++0x0F
line.long 0x00 "DEPCMDPAR21,Device Physical Endpoint-1 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR11,Device Physical Endpoint-1 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR01,Device Physical Endpoint-1 Command Parameter 0 Register"
line.long 0x0C "DEPCMD1,Device Physical Endpoint-1 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x20)++0x0F
line.long 0x00 "DEPCMDPAR22,Device Physical Endpoint-2 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR12,Device Physical Endpoint-2 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR02,Device Physical Endpoint-2 Command Parameter 0 Register"
line.long 0x0C "DEPCMD2,Device Physical Endpoint-2 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x30)++0x0F
line.long 0x00 "DEPCMDPAR23,Device Physical Endpoint-3 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR13,Device Physical Endpoint-3 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR03,Device Physical Endpoint-3 Command Parameter 0 Register"
line.long 0x0C "DEPCMD3,Device Physical Endpoint-3 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x40)++0x0F
line.long 0x00 "DEPCMDPAR24,Device Physical Endpoint-4 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR14,Device Physical Endpoint-4 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR04,Device Physical Endpoint-4 Command Parameter 0 Register"
line.long 0x0C "DEPCMD4,Device Physical Endpoint-4 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x50)++0x0F
line.long 0x00 "DEPCMDPAR25,Device Physical Endpoint-5 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR15,Device Physical Endpoint-5 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR05,Device Physical Endpoint-5 Command Parameter 0 Register"
line.long 0x0C "DEPCMD5,Device Physical Endpoint-5 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x60)++0x0F
line.long 0x00 "DEPCMDPAR26,Device Physical Endpoint-6 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR16,Device Physical Endpoint-6 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR06,Device Physical Endpoint-6 Command Parameter 0 Register"
line.long 0x0C "DEPCMD6,Device Physical Endpoint-6 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x70)++0x0F
line.long 0x00 "DEPCMDPAR27,Device Physical Endpoint-7 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR17,Device Physical Endpoint-7 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR07,Device Physical Endpoint-7 Command Parameter 0 Register"
line.long 0x0C "DEPCMD7,Device Physical Endpoint-7 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
newline
group.long 0xCC20++0x0F
line.long 0x00 "ADPCFG,ADP Configuration Register"
bitfld.long 0x00 30.--31. " PRBPER                ,Probe period/scaledown probe period" "0.775 s/12.5 ms,1.55 s/18.75 ms,2.275 s/25 ms,-/31.25 ms"
bitfld.long 0x00 28.--29. "  PRBDELTA             ,Sets the resolution for RTIM value" "1 cycle,2 cycles,3 cycles,4 cycles"
bitfld.long 0x00 26.--27. "             PRBDSCHG          ,Probe discharge/scaledown probe discharge" "4 ms/62.5 us,8 ms/125 us,16 ms/250 us,32 ms/500 us"
line.long 0x04 "ADPCTL,ADP Control Register"
bitfld.long 0x04 28. " ENAPRB                ,Enable probe" "Disabled,Enabled"
bitfld.long 0x04 27. "         ENASNS               ,Enable sense" "Disabled,Enabled"
bitfld.long 0x04 26. "             ADPEN             ,ADP enable" "Disabled,Enabled"
newline
bitfld.long 0x04 25. " ADPRES                ,ADP reset" "No reset,Reset"
rbitfld.long 0x04 24. "         WB                   ,Write busy" "Completed,In progress"
line.long 0x08 "ADPEVT,ADP Event Register"
bitfld.long 0x08 28. " ADPPRBEVNT            ,ADP probe event" "Not occurred,Occurred"
bitfld.long 0x08 27. "     ADPSNSEVNT           ,ADP sense event" "Not occurred,Occurred"
bitfld.long 0x08 26. "         ADPTMOUTEVNT      ,ADP timeout event" "Not occurred,Occurred"
newline
bitfld.long 0x08 25. " ADPRSTCMPLTEVNT       ,ADP reset complete event" "Not occurred,Occurred"
rhexmask.long.word 0x08 0.--15. 1. "     RTIM                 ,Captures the latest time it took for VBUS to ramp from VADP_SINK to VADP_PRB"
line.long 0x0C "ADPEVTEN,ADP Event Enable Register"
bitfld.long 0x0C 28. " ADPPRBEVNTEN          ,ADP probe event enable" "Disabled,Enabled"
bitfld.long 0x0C 27. "         ADPSNSEVNTEN         ,ADP sense event enable" "Disabled,Enabled"
bitfld.long 0x0C 26. "             ADPTMOUTEVNTEN    ,ADP timeout event enable" "Disabled,Enabled"
newline
bitfld.long 0x0C 25. " ADPRSTCMPLTEVNTEN     ,ADP reset complete event enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "USB 2"
base ad:0x03110000
width 12.
rgroup.long 0x00++0x1B
line.long 0x00 "CAPLENGTH,Capability Register Length And HC Interface Version Number"
hexmask.long.word 0x00 16.--31. 1. " HCIVERSION                  ,HC interface version number"
hexmask.long.byte 0x00 0.--7. 1. "              CAPLENGTH              ,Capability register length"
line.long 0x04 "HCSPARAMS1,Structural Parameters 1"
hexmask.long.byte 0x04 24.--31. 1. " MAXPORTS                    ,Number of ports"
hexmask.long.word 0x04 8.--18. 1. "                MAXINTRS               ,Number of interrupters"
hexmask.long.byte 0x04 0.--7. 1. "               MAXSLOTS                    ,Number of device slots"
line.long 0x08 "HCSPARAMS2,Structural Parameters 2"
bitfld.long 0x08 27.--31. " MAXSCBUFLO                  ,Max scratchpad bufs lo" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x08 26. "                SPR                    ,Scratchpad restore" "0,1"
bitfld.long 0x08 21.--25. "                  MAXSCBUFHI                  ,Max scratchpad bufs hi" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x08 4.--7. " ERSTMAX                     ,Event ring segment table max" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "                IST                    ,Isochronous scheduling threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "HCSPARAMS3,Structural Parameters 3"
hexmask.long.word 0x0C 16.--31. 1. " U2_DEVICE_EXIT_LAT          ,U2 device exit latency"
hexmask.long.byte 0x0C 0.--7. 1. "              U1_DEVICE_EXIT_LAT     ,U1 device exit latency"
line.long 0x10 "HCCPARAMS1,Capability Parameters"
hexmask.long.word 0x10 16.--31. 0x01 " XECP                        ,XHCI extended capabilities pointer"
bitfld.long 0x10 12.--15. "              MAXPSASIZE             ,Maximum primary stream array size" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x10 11. "                 CFC                         ,Contiguous frame ID capability" "0,1"
newline
bitfld.long 0x10 10. " SEC                         ,Stopped EDLTA capability" "0,1"
bitfld.long 0x10 9. "                 SPC                    ,Stopped - short packet capability" "0,1"
bitfld.long 0x10 8. "                  PAE                         ,Parse all event data" "0,1"
newline
bitfld.long 0x10 7. " NSS                         ,No secondary SID support" "0,1"
bitfld.long 0x10 6. "                 LTC                    ,Latency tolerance messaging capability" "0,1"
bitfld.long 0x10 5. "                  LHRC                        ,Light HC reset capability" "0,1"
newline
bitfld.long 0x10 4. " PIND                        ,Port indicators" "0,1"
bitfld.long 0x10 3. "                 PPC                    ,Port power control" "0,1"
bitfld.long 0x10 2. "                  CSZ                         ,Context size" "0,1"
newline
bitfld.long 0x10 1. " BNC                         ,BW negotiation capability" "0,1"
bitfld.long 0x10 0. "                 AC64                   ,64-bit addressing capability" "0,1"
line.long 0x14 "DBOFF,Doorbell Offset"
hexmask.long 0x14 2.--31. 0x04 " DOORBELL_ARRAY_OFFSET       ,Doorbell array offset"
line.long 0x18 "RTSOFF,Runtime Register Space Offset"
hexmask.long 0x18 5.--31. 0x20 " RUNTIME_REG_SPACE_OFFSET    ,Runtime register space offset"
rgroup.long 0x1C++0x03
line.long 0x00 "HCCPARAMS2,Capability Parameters 2"
bitfld.long 0x00 5. " CIC                         ,Configuration information capability" "0,1"
bitfld.long 0x00 4. "                 LEC                    ,Large ESIT payload capability" "0,1"
bitfld.long 0x00 3. "                  CTC                         ,Compliance transition capability" "0,1"
newline
bitfld.long 0x00 2. " FSC                         ,Force save context capability" "0,1"
bitfld.long 0x00 1. "                 CMC                    ,Configure endpoint command max exit latency too large capability" "0,1"
bitfld.long 0x00 0. "                  U3C                         ,U3 entry capability" "0,1"
group.long 0xC100++0x07
line.long 0x00 "GSBUSCFG0,Global SoC Bus Configuration Register 0"
bitfld.long 0x00 28.--31. " DATRDREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for data read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 24.--27. "                DESRDREQINFO           ,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor read" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 20.--23. "                 DATWRREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for data write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 16.--19. " DESWRREQINFO                ,AHB-prot/AXI-cache/OCP-ReqInfo for descriptor write" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 7. "                INCR256BRSTENA         ,NCR256 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 6. "           INCR128BRSTENA              ,NCR128 burst type enable" "Disabled,Enabled"
newline
bitfld.long 0x00 5. " INCR64BRSTENA               ,NCR64 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 4. "          INCR32BRSTENA          ,NCR32 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           INCR16BRSTENA               ,NCR16 burst type enable" "Disabled,Enabled"
newline
bitfld.long 0x00 2. " INCR8BRSTENA                ,NCR8 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 1. "          INCR4BRSTENA           ,NCR4 burst type enable" "Disabled,Enabled"
bitfld.long 0x00 0. "           INCRBRSTENA                 ,Undefined length INCR burst type enable" "INCRX,INCR"
line.long 0x04 "GSBUSCFG1,Global SoC Bus Configuration Register 1"
bitfld.long 0x04 12. " EN1KPAGE                    ,1k page boundary enable" "Disabled,Enabled"
bitfld.long 0x04 8.--11. "          PIPETRANSLIMIT         ,AXI pipelined transfers burst request limit" "1 request,2 requests,3 requests,4 requests,5 requests,6 requests,7 requests,8 requests,9 requests,10 requests,11 requests,12 requests,13 requests,14 requests,15 requests,16 requests"
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03110000+0xC108))&0x20000000)==0x20000000)
group.long 0xC108++0x03
line.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
bitfld.long 0x00 29. " USBTXPKTCNTSEL              ,USB transmit packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBTXPKTCNT            ,USB transmit packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
hexmask.long.byte 0x00 16.--23. 1. "                 USBMAXTXBURSTSIZE           ,USB maximum TX burst size"
else
group.long 0xC108++0x03
line.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
bitfld.long 0x00 29. " USBTXPKTCNTSEL              ,USB transmit packet count enable" "Disabled,Enabled"
endif
if (((per.l(ad:0x03110000+0xC10C))&0x20000000)==0x20000000)
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBRXPKTCNT            ,USB receive packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 19.--23. "                 USBMAXRXBURSTSIZE           ,USB maximum receive burst size" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
else
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
endif
else
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
elif (((per.l(ad:0x03110000+0xC110))&0x3000)==0x2000)
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
group.long 0xC10C++0x03
line.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
bitfld.long 0x00 29. " USBRXPKTCNTSEL              ,USB receive packet count enable" "Disabled,Enabled"
bitfld.long 0x00 24.--27. "          USBRXPKTCNT            ,USB receive packet count" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 19.--23. "                 USBMAXRXBURSTSIZE           ,USB maximum receive burst size" ",1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,?..."
else
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
else
hgroup.long 0xC108++0x03
hide.long 0x00 "GTXTHRCFG,Global Tx Threshold Control Register"
hgroup.long 0xC10C++0x03
hide.long 0x00 "GRXTHRCFG,Global Rx Threshold Control Register"
endif
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " PWRDNSCALE                  ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
else
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 14.--15. "       FRMSCLDWN                   ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
newline
bitfld.long 0x00 12.--13. " PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
bitfld.long 0x00 11. "            CORESOFTRESET          ,Core soft reset" "No reset,Reset"
rbitfld.long 0x00 10. "           SOFITPSYNC                  ,SOFITPSYNC" "SS not in Rx.Det SS.Dis and U3,Non-SS not in a susp state"
newline
bitfld.long 0x00 6.--7. " RAMCLKSEL                   ,RAM clock select" "Bus clock,?..."
bitfld.long 0x00 3. "         DISSCRAMBLE            ,Disable scrambling" "No,Yes"
bitfld.long 0x00 2. "                U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
newline
bitfld.long 0x00 0. " DSBLCLKGTNG                 ,Disable clock gating" "No,Yes"
endif
endif
else
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "125 us,62.5 us,31.25 us,15.625 us"
bitfld.long 0x00 12.--13. "          PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
bitfld.long 0x00 12.--13. "            PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "1000 us,500 us,250 us,125 us"
bitfld.long 0x00 12.--13. "            PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
else
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
bitfld.long 0x00 12.--13. "                  PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
else
group.long 0xC110++0x03
line.long 0x00 "GCTL,Global Core Control Register"
hexmask.long.word 0x00 19.--31. 1. " DWC_USB3_GCTL_INIT          ,Power down scale"
bitfld.long 0x00 18. "              MASTERFILTBYPASS       ,Master filter bypass" "Not bypassed,Bypassed"
bitfld.long 0x00 17. "       BYPSSETADDR                 ,Bypass set address in device mode" "Not bypassed,Bypassed"
newline
bitfld.long 0x00 16. " U2RSTECN                    ,If super speed connection fails during POLL or LMP the device connects at non-SS mode 3 more times when bit is set" "0,3 more times"
bitfld.long 0x00 14.--15. "      FRMSCLDWN              ,Scales down device view of SOF/USOF/ITP duration and maxpacketsize (for xhci debug capability enabled" "0,1,2,3"
bitfld.long 0x00 12.--13. "                  PRTCAPDIR                   ,Port capability direction" ",Host,Device,?..."
newline
bitfld.long 0x00 11. " CORESOFTRESET               ,Core soft reset" "No reset,Reset"
bitfld.long 0x00 6.--7. "          RAMCLKSEL              ,RAM clock select" "Bus clock,Pipe clock,Pipe/2 clock,?..."
bitfld.long 0x00 3. "       DISSCRAMBLE                 ,Disable scrambling" "No,Yes"
newline
bitfld.long 0x00 2. " U2EXIT_LFPS                 ,Sets LFPS filter for dealing with LFPS glitches" "248ns LFPS valid,Waits for 8us"
bitfld.long 0x00 0. "  DSBLCLKGTNG            ,Disable clock gating" "No,Yes"
endif
endif
endif
group.long 0xC118++0x03
line.long 0x00 "GSTS,Global Status Register"
rbitfld.long 0x00 7. " HOST_IP                     ,Host interrupt pending" "Not pending,Pending"
rbitfld.long 0x00 6. "       DEVICE_IP              ,Device interrupt pending" "Not pending,Pending"
bitfld.long 0x00 5. "        CSRTIMEOUT                  ,Software write or read to a core register timeout" "No timeout,Timeout"
newline
bitfld.long 0x00 4. " BUSERRADDRVLD               ,Bus error address valid" "Invalid,Valid"
rbitfld.long 0x00 0.--1. "           CURMOD                 ,Current mode of operation" "Device,Host,?..."
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03110000+0xC11C))&0x100)==0x100)
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "                P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 16. "          PARKMODE_DISABLE_HS    ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "                L1SUSPTHRLDENFORHOST        ,L1 suspend threshold for host enable" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. " L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                HELDEN                 ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "                HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
newline
bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "           LOA_FILTER_EN          ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
else
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "                P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 16. "          PARKMODE_DISABLE_HS    ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "                L1SUSPTHRLDENFORHOST        ,L1 suspend threshold for host enable" "Disabled,Enabled"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 25. "               P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " PARKMODE_DISABLE_HS         ,Parkomode disable" "No,Yes"
bitfld.long 0x00 8. "               L1SUSPTHRLDENFORHOST   ,L1 suspend threshold for host enable" "Disabled,Enabled"
bitfld.long 0x00 3. "           HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
endif
elif (((per.l(ad:0x03110000+0xC110))&0x3000)==0x2000)
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "               DEV_TRB_OUT_SPR_IND    ,OUT TRB short packet indication enable" "Disabled,Enabled"
bitfld.long 0x00 26. "           DEV_FORCE_20_CLK_FOR_30_CLK ,Force 2.0 clk as 3.0 clk enable" "Disabled,Enabled"
newline
bitfld.long 0x00 25. " P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 24. "          DEV_L1_EXIT_BY_HW      ,Remote wakeup for L1 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "           IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
newline
bitfld.long 0x00 20. " DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "               NAK_PER_ENH_FS         ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "           NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 4.--7. " L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                HELDEN                 ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "                HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
newline
bitfld.long 0x00 1. " OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "           LOA_FILTER_EN          ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 29. " FILTER_SE0_FSLS_EOP         ,SE0 filter enable for FS/LS" "Disabled,Enabled"
bitfld.long 0x00 28. "          TX_IPGAP_LINECHECK_DIS ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "                DEV_TRB_OUT_SPR_IND         ,OUT TRB short packet indication enable" "Disabled,Enabled"
newline
bitfld.long 0x00 26. " DEV_FORCE_20_CLK_FOR_30_CLK ,Force 2.0 clk as 3.0 clk enable" "Disabled,Enabled"
bitfld.long 0x00 25. "          P3_IN_U2               ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
bitfld.long 0x00 24. "           DEV_L1_EXIT_BY_HW           ,Remote wakeup for L1 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 21.--23. " IP_GAP_ADD_ON               ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                 DEV_LSP_TAIL_LOCK_DIS  ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
bitfld.long 0x00 19. "                NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
newline
bitfld.long 0x00 18. " NAK_PER_ENH_HS              ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "          L1SUSPTHRLDFORHOST     ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 3. "                 HELDEN                      ,Host ELD enable" "No,Yes"
newline
bitfld.long 0x00 2. " HPARCHKDISABLE              ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "          OVRLD_L1_SUSP_COM      ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
bitfld.long 0x00 0. "            LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
elif (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
group.long 0xC11C++0x03
line.long 0x00 "GUCTL1,Global User Control Register 1"
bitfld.long 0x00 28. " TX_IPGAP_LINECHECK_DIS      ,Linecheck disable" "No,Yes"
bitfld.long 0x00 27. "               DEV_TRB_OUT_SPR_IND    ,OUT TRB short packet indication enable" "Disabled,Enabled"
bitfld.long 0x00 25. "           P3_IN_U2                    ,P3 power state when the SuperSpeed link is in U2 enable" "Disabled,Enabled"
newline
bitfld.long 0x00 24. " DEV_L1_EXIT_BY_HW           ,Remote wakeup for L1 enable" "Disabled,Enabled"
bitfld.long 0x00 21.--23. "          IP_GAP_ADD_ON          ,Adds on to the default inter packet gap setting in the USB 2.0 MAC" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 20. "                  DEV_LSP_TAIL_LOCK_DIS       ,Bug fix for STAR 9000716195 that affects the CSP mode for OUT endpoints in device mode disable" "No,Yes"
newline
bitfld.long 0x00 19. " NAK_PER_ENH_FS              ,Enables performance enhancement for FS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 18. "          NAK_PER_ENH_HS         ,Enables performance enhancement for HS async endpoints in the presence of NAKs" "Disabled,Enabled"
bitfld.long 0x00 4.--7. "           L1SUSPTHRLDFORHOST          ,L1 suspend threshold value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
newline
bitfld.long 0x00 3. " HELDEN                      ,Host ELD enable" "No,Yes"
bitfld.long 0x00 2. "               HPARCHKDISABLE         ,Host parameter check disable" "Enabled,Disabled"
bitfld.long 0x00 1. "           OVRLD_L1_SUSP_COM           ,Overloads utmi_l1_suspend_com_n with the utmi_sleep_n signal" "Not set,Set"
newline
bitfld.long 0x00 0. " LOA_FILTER_EN               ,Enables checking USB 2.0 port babble at least three consecutive times before port is disabled" "Disabled,Enabled"
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
else
hgroup.long 0xC11C++0x03
hide.long 0x00 "GUCTL1,Global User Control Register 1"
endif
group.long 0xC128++0x03
line.long 0x00 "GUID,Global User ID Register"
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
group.long 0xC12C++0x03
line.long 0x00 "GUCTL,Global User Control Register"
hexmask.long.word 0x00 22.--31. 1. " REFCLKPER                   ,Period of ref_clk in ns"
bitfld.long 0x00 21. "              NOEXTRDL               ,No extra delay between SOF and the first packet" "Waits 2 us,Doesn't wait"
bitfld.long 0x00 17. "       SPRSCTRLTRANSEN             ,Sparse control transaction enable" "Disabled,Enabled"
newline
bitfld.long 0x00 16. " RESBWHSEPS                  ,Indicates whether reserve 80% or 85% of bandwidth for HS periodic EPs" "80%,85%"
bitfld.long 0x00 15. "               CMDEVADDR              ,Compliance mode for device address" "Equal to Slot ID,Increment address"
bitfld.long 0x00 14. "  USBHSTINAUTORETRYEN         ,Host IN auto retry" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " ENOVERLAPCHK                ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled"
bitfld.long 0x00 12. "          EXTCAPSUPTEN           ,External extended capability support enable" "Disabled,Enabled"
bitfld.long 0x00 11. "           INSRTEXTRFSBODL             ,Insert extra delay between FS bulk OUT transactions" "Not inserted,Inserted"
newline
bitfld.long 0x00 9.--10. " DTCT                        ,Device timeout coarse tuning" "DTFT,500 us,1.5 ms,6.5 ms"
hexmask.long.word 0x00 0.--8. 1. "            DTFT                   ,Device timeout fine tuning"
elif (((per.l(ad:0x03110000+0xC110))&0x3000)==0x2000)
group.long 0xC12C++0x03
line.long 0x00 "GUCTL,Global User Control Register"
hexmask.long.word 0x00 22.--31. 1. " REFCLKPER                   ,Period of ref_clk in ns"
bitfld.long 0x00 17. "              SPRSCTRLTRANSEN        ,Sparse control transaction enable" "Disabled,Enabled"
bitfld.long 0x00 14. "           USBHSTINAUTORETRYEN         ,Host IN auto retry" "Disabled,Enabled"
newline
bitfld.long 0x00 13. " ENOVERLAPCHK                ,Enable check for LFPS overlap during remote ux exit" "Disabled,Enabled"
bitfld.long 0x00 12. "          EXTCAPSUPTEN           ,External extended capability support enable" "Disabled,Enabled"
bitfld.long 0x00 11. "           INSRTEXTRFSBODL             ,Insert extra delay between FS bulk OUT transactions" "Not inserted,Inserted"
else
hgroup.long 0xC12C++0x03
hide.long 0x00 "GUCTL,Global User Control Register"
endif
width 15.
if (((per.l(ad:0x03110000+0xC118))&0x10)==0x10)
rgroup.long 0xC130++0x07
line.long 0x00 "GBUSERRADDRLO,Global SoC Bus Error Address Register Low"
line.long 0x04 "GBUSERRADDRHI,Global SoC Bus Error Address Register High"
else
hgroup.long 0xC130++0x03
hide.long 0x00 "GBUSERRADDRLO,Global SoC Bus Error Address Register Low"
hgroup.long 0xC134++0x03
hide.long 0x00 "GBUSERRADDRHI,Global SoC Bus Error Address Register High"
endif
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x00)||(((per.l(ad:0x03110000+0xC700))&0x07)==0x01)
hgroup.long 0xC138++0x03
hide.long 0x00 "GPRTBIMAPLO,SuperSpeed Port To Bus Instance Mapping"
else
group.long 0xC138++0x03
line.long 0x00 "GPRTBIMAPLO,SuperSpeed Port To Bus Instance Mapping"
bitfld.long 0x00 0.--3. " BINUM1                              ,SS USB instance number for port" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
endif
group.long 0xC13C++0x03
line.long 0x00 "GPRTBIMAPHI,High-Speed Port To Bus Instance Mapping"
bitfld.long 0x00 0.--3. " BINUM9                              ,SS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
rgroup.long 0xC140++0x07
line.long 0x00 "GHWPARAMS0,Global Hardware Parameters Register 0"
hexmask.long.byte 0x00 24.--31. 1. " DWC_USB3_AWIDTH                     ,DWC_USB3_AWIDTH"
hexmask.long.byte 0x00 16.--23. 1. "            DWC_USB3_SDWIDTH                 ,DWC_USB3_SDWIDTH"
hexmask.long.byte 0x00 8.--15. 1. "            DWC_USB3_MDWIDTH           ,DWC_USB3_MDWIDTH"
newline
bitfld.long 0x00 6.--7. " DWC_USB3_SBUS_TYPE                  ,DWC_USB3_SBUS_TYPE" "AHB,?..."
bitfld.long 0x00 3.--5. "           DWC_USB3_MBUS_TYPE               ,DWC_USB3_MBUS_TYPE" ",AXI,?..."
bitfld.long 0x00 0.--2. "           DWC_USB3_MODE              ,DWC_USB3_MODE" ",,DRD,?..."
line.long 0x04 "GHWPARAMS1,Global Hardware Parameters Register 1"
bitfld.long 0x04 31. " DWC_USB3_EN_DBC                     ,Enables xhci debug capability" "Disabled,Enabled"
bitfld.long 0x04 30. "      DWC_USB3_RM_OPT_FEATURES         ,Optional features removal enable" "Disabled,Enabled"
bitfld.long 0x04 28. "      DWC_USB3_RAM_BUS_CLKS_SYNC ,Specifies whether the RAM clock and the bus clock are synchronous to each other" "Asynchronous,Synchronous"
newline
bitfld.long 0x04 27. " DWC_USB3_MAC_RAM_CLKS_SYNC          ,Specifies whether the MAC clock and the RAM clock are synchronous to each other" "Asynchronous,Synchronous"
bitfld.long 0x04 26. "  DWC_USB3_MAC_PHY_CLKS_SYNC       ,Specifies whether the MAC clock and the PHY clock are synchronous to each other" "Asynchronous,Synchronous"
bitfld.long 0x04 24.--25. "  DWC_USB3_EN_PWROPT         ,Specifies the power optimization mode" "No power optimization,Clock gating only,?..."
newline
bitfld.long 0x04 23. " DWC_USB3_SPRAM_TYP                  ,Selects the FIFO synchronous static RAM type" "2-Port-RAM,SPRAM"
bitfld.long 0x04 21.--22. "    DWC_USB3_NUM_RAMS                ,Selects the number of RAMs" "0,1,2,3"
bitfld.long 0x04 15.--20. "             DWC_USB3_DEVICE_NUM_INT    ,Selects the number of event buffers in device mode" "1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,?..."
newline
bitfld.long 0x04 12.--14. " DWC_USB3_ASPACEWIDTH                ,Selects the address space port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 9.--11. "             DWC_USB3_REQINFOWIDTH            ,Selects the request/response info port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 6.--8. "             DWC_USB3_DATAINFOWIDTH     ,Selects the data info port width of the master and slave bus interfaces" "1,2,3,4,5,6,7,8"
newline
bitfld.long 0x04 3.--5. " DWC_USB3_BURSTWIDTH                 ,Selects the burst port width of the master and slave bus interfaces - 1" "1,2,3,4,5,6,7,8"
bitfld.long 0x04 0.--2. "             DWC_USB3_IDWIDTH1                ,DWC_USB3_IDWIDTH-1" "0,1,2,3,4,5,6,7"
rgroup.long 0xC148++0x13
line.long 0x00 "GHWPARAMS2,Global Hardware Parameters Register 2"
line.long 0x04 "GHWPARAMS3,Global Hardware Parameters Register 3"
hexmask.long.word 0x04 23.--30. 1. " DWC_USB3_CACHE_TOTAL_XFER_RESOURCES ,Selects the maximum number of transfer resources in the core"
bitfld.long 0x04 18.--22. "          DWC_USB3_NUM_IN_EPS              ,Specifies the maximum number of device mode IN endpoints active at any time" ",,,,4,?..."
bitfld.long 0x04 12.--17. "             DWC_USB3_NUM_EPS           ,Specifies the number of device mode single directional endpoints" ",,,,,,,,8,?..."
newline
bitfld.long 0x04 10. " DWC_USB3_VENDOR_CTL_INTERFACE       ,Enables the UTMI+ PHY vendor control interface" "0,1"
bitfld.long 0x04 6.--7. "             DWC_USB3_HSPHY_DWIDTH            ,Specifies the data width of the UTMI+ PHY interface" ",,8/16-bits,?..."
bitfld.long 0x04 2.--3. "     DWC_USB3_HSPHY_INTERFACE   ,Specifies the high-speed PHY interface" "0,1,2,3"
newline
bitfld.long 0x04 0.--1. " DWC_USB3_SSPHY_INTERFACE            ,DWC_USB3_SSPHY_INTERFACE" "0,1,2,3"
line.long 0x08 "GHWPARAMS4,Global Hardware Parameters Register 4"
bitfld.long 0x08 28.--31. " DWC_USB3_BMU_LSP_DEPTH              ,Specifies the depth of the BMU-LSP status buffer" ",,,,4,?..."
bitfld.long 0x08 24.--27. "             DWC_USB3_BMU_PTL_DEPTH           ,Specifies the depth of the BMU-PTL source/sink buffers-1" ",,,,,,,,8,?..."
bitfld.long 0x08 23. "             DWC_USB3_EN_ISOC_SUPT      ,Enables isochronous endpoint capability" "0,1"
newline
bitfld.long 0x08 17.--20. " DWC_USB3_NUM_SS_USB_INSTANCES       ,Specifies the number of SuperSpeed USB bus instances" ",1,?..."
bitfld.long 0x08 0.--5. "             DWC_USB3_CACHE_TRBS_PER_TRANSFER ,Selects the number of transfer request blocks" ",,,,4,?..."
line.long 0x0C "GHWPARAMS5,Global Hardware Parameters Register 5"
bitfld.long 0x0C 22.--27. " DWC_USB3_DFQ_FIFO_DEPTH             ,Specifies the size of the BMU descriptor fetch request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 16.--21. "            DWC_USB3_DWQ_FIFO_DEPTH          ,Specifies the size of the BMU descriptor write queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 10.--15. "            DWC_USB3_TXQ_FIFO_DEPTH    ,Specifies the size of the BMU tx request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
newline
bitfld.long 0x0C 4.--9. " DWC_USB3_RXQ_FIFO_DEPTH             ,Specifies the size of the BMU rx request queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
bitfld.long 0x0C 0.--3. "            DWC_USB3_BMU_BUSGM_DEPTH         ,Specifies the depth of the BMU-BUSGM source/sink buffer" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x10 "GHWPARAMS6,Global Hardware Parameters Register 6"
hexmask.long.word 0x10 16.--31. 1. " DWC_USB3_RAM0_DEPTH                 ,Specifies the depth of RAM0"
bitfld.long 0x10 15. "          BUSFLTRSSUPPORT                  ,Specifies whether to add a filter for VBUS and ID related control inputs from the PHY" "Not added,Added"
bitfld.long 0x10 12. "     ADPSUPPORT                 ,Enables internal ADP capability of the USB 3.0 core" "Disabled,Enabled"
newline
bitfld.long 0x10 11. " HNPSUPPORT                          ,HNP support enable" "Disabled,Enabled"
bitfld.long 0x10 7. "      DWC_USB3_EN_FPGA                 ,Hardware validation/driver development with an FPGA platform" "No,Yes"
bitfld.long 0x10 6. "           DWC_USB3_EN_DBG_PORTS      ,Used for FPGA hardware validation of the core" "Not Used,Used"
newline
bitfld.long 0x10 0.--5. " DWC_USB3_PSQ_FIFO_DEPTH             ,Specifies the size of the BMU protocol status queue" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC15C++0x03
line.long 0x00 "GHWPARAMS7,Global Hardware Parameters Register 7"
hexmask.long.word 0x00 16.--31. 1. " DWC_USB3_RAM2_DEPTH                 ,Specifies the depth of RAM2"
hexmask.long.word 0x00 0.--15. 1. "          DWC_USB3_RAM1_DEPTH              ,Specifies the depth of RAM1"
width 16.
newline
group.long 0xC180++0x07
line.long 0x00 "GPRTBIMAP_HSLO,Global High-Speed Port To Bus Instance Mapping Low Register"
bitfld.long 0x00 0.--3. " BINUM1 ,HS USB instance number for port 1" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x04 "GPRTBIMAP_HSHI,Global High-Speed Port To Bus Instance Mapping High Register"
bitfld.long 0x04 0.--3. " BINUM9 ,HS USB instance number for port 9" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
width 15.
newline
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
if (((per.l(ad:0x03110000+0xC14C))&0x0C)==0x08)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
elif (((per.l(ad:0x03110000+0xC14C))&0x0C)==0x0C)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
else
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 22.--24. "                  LSTRD             ,LS turnaround time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
newline
bitfld.long 0x00 19.--21. " LSIPD                 ,LS inter-packet time" "2 bit times,2.5 bit times,3 bit times,3.5 bit times,4 bit times,4.5 bit times,5 bit times,5.5 bit times"
bitfld.long 0x00 8. "    ENBLSLPM             ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
bitfld.long 0x00 6. "             SUSPHY            ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
newline
bitfld.long 0x00 3. " PHYIF                 ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
endif
elif (((per.l(ad:0x03110000+0xC110))&0x3000)==0x2000)
if (((per.l(ad:0x03110000+0xC14C))&0x0C)==0x08)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " SUSPHY                ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
bitfld.long 0x00 3. "    PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
elif (((per.l(ad:0x03110000+0xC14C))&0x0C)==0x0C)
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
bitfld.long 0x00 6. " SUSPHY                ,Suspend USB 2.0 HS/FS/LS PHY" "Not suspended,Suspended"
bitfld.long 0x00 3. "    PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
else
group.long 0xC200++0x03
line.long 0x00 "GUSB2PHYCFGN,Global USB2 PHY Configuration Register"
bitfld.long 0x00 31. " UTMI_PHYSOFTRST       ,UTMI PHY soft reset" "No reset,Reset"
rbitfld.long 0x00 30. "         U2_FREECLK_EXISTS    ,Specifies whether USB 2.0 PHY provides free-running PHY clock" "No,Yes"
bitfld.long 0x00 8. "                  ENBLSLPM          ,Enables utmi_sleep_n and utmi_l1_suspend_n" "Disabled,Enabled"
newline
rbitfld.long 0x00 4. " ULPI_UTMI_SEL         ,ULPI or UTMI+ select" "UTMI+,ULPI"
bitfld.long 0x00 3. "            PHYIF                ,Uses this bit to configure the core to support a UTMI+ PHY with an 8- or 16-bit interface" "8-bits,16-bits"
endif
endif
if (((per.l(ad:0x03110000+0xC700))&0x07)==0x04)
group.long 0xC2C0++0x03
line.long 0x00 "GUSB3PIPECTL0,Global USB 3.0 PIPE Control Register 0"
bitfld.long 0x00 31. " PHYSOFTRST            ,USB3 PHY soft reset" "No reset,Reset"
bitfld.long 0x00 29. "         U2SSINACTP3OK        ,P3 OK for U2/ssinactive" "P2,P3"
bitfld.long 0x00 28. "                   DISRXDETP3        ,Receiver detection in P3 state" "Stays in P3,Goes to P2 then back P3"
newline
bitfld.long 0x00 25. " U1U2EXITFAIL_TO_RECOV ,Selects transition from U1/U2 to recovery or SS inactive when U1/U2 LFPS handshake fails" "No effect,Failed"
rbitfld.long 0x00 15.--16. "        DATWIDTH             ,PIPE data width" "32 bits,16 bits,8 bits,?..."
bitfld.long 0x00 6. "              TXSWING           ,TXSWING field" "0,1"
newline
bitfld.long 0x00 3.--5. " TXMARGIN              ,TXMARGIN field" "0,1,2,3,4,5,6,7"
bitfld.long 0x00 1.--2. "                TXDEEMPHASIS         ,Value driven to the PHY is controlled by LTSSM during USB3 compliance mode" "0,1,2,3"
bitfld.long 0x00 0. "                    ELASTICBUFFERMODE ,Elastic buffer mode" "0,1"
else
hgroup.long 0xC2C0++0x03
hide.long 0x00 "GUSB3PIPECTL0,Global USB 3.0 PIPE Control Register 0"
endif
group.long 0xC300++0x03
line.long 0x00 "GTXFIFOSIZ0,Global Transmit FIFO Size Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_0          ,Transmit FIFO_0 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_0            ,TXFDEP_0"
group.long 0xC310++0x03
line.long 0x00 "GTXFIFOSIZ1,Global Transmit FIFO Size Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_1          ,Transmit FIFO_1 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_1            ,TXFDEP_1"
group.long 0xC320++0x03
line.long 0x00 "GTXFIFOSIZ2,Global Transmit FIFO Size Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_2          ,Transmit FIFO_2 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_2            ,TXFDEP_2"
group.long 0xC330++0x03
line.long 0x00 "GTXFIFOSIZ3,Global Transmit FIFO Size Register 3"
hexmask.long.word 0x00 16.--31. 0x01 " TXFSTADDR_3          ,Transmit FIFO_3 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             TXFDEP_3            ,TXFDEP_3"
group.long 0xC380++0x03
line.long 0x00 "GRXFIFOSIZ0,Global Receive FIFO Size Register 0"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_0          ,Receive FIFO_0 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_0            ,RXFDEP_0"
group.long 0xC390++0x03
line.long 0x00 "GRXFIFOSIZ1,Global Receive FIFO Size Register 1"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_1          ,Receive FIFO_1 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_1            ,RXFDEP_1"
group.long 0xC3A0++0x03
line.long 0x00 "GRXFIFOSIZ2,Global Receive FIFO Size Register 2"
hexmask.long.word 0x00 16.--31. 0x01 " RXFSTADDR_2          ,Receive FIFO_2 RAM start address"
hexmask.long.word 0x00 0.--15. 1. "             RXFDEP_2            ,RXFDEP_2"
newline
rgroup.long 0xC400++0x03
line.long 0x00 "GEVNTADRLO,Global Event Buffer Address Register Low"
group.long 0xC404++0x07
line.long 0x00 "GEVNTADR0HI,Global Event Buffer Address Register High"
line.long 0x04 "GEVNTSIZN,Global Event Buffer Size Register"
bitfld.long 0x04 31. " EVNTINTMASK           ,Event interrupt mask" "Not masked,Masked"
hexmask.long.word 0x04 0.--15. 1. "       EVNTSIZ              ,Event buffer size in bytes"
group.long 0xC40C++0x03
line.long 0x00 "GEVNTCOUNT0,Global Event Buffer Count Register 0"
hexmask.long.word 0x00 0.--15. 1. " EVNTCOUNT             ,Event count"
rgroup.long 0xC600++0x03
line.long 0x00 "GHWPARAMS8,Global Hardware Parameters Register 8"
group.long 0xC610++0x03
line.long 0x00 "GTXFIFOPRIDEV,Global Device TX FIFO DMA Priority Register"
bitfld.long 0x00 3. " DEVICE_TXFIFO[3]      ,Device TXFIFO 3 priority" "Low,High"
bitfld.long 0x00 2. "             [2]                  ,Device TXFIFO 2 priority" "Low,High"
bitfld.long 0x00 1. "                 [1]               ,Device TXFIFO 1 priority" "Low,High"
newline
bitfld.long 0x00 0. " [0]                   ,Device TXFIFO 0 priority" "Low,High"
group.long 0xC618++0x07
line.long 0x00 "GTXFIFOPRIHST,Global Host TX FIFO DMA Priority Register"
bitfld.long 0x00 2. " HOST_TXFIFO[2]        ,Host TXFIFO 2 priority" "Low,High"
bitfld.long 0x00 1. "             [1]                  ,Host TXFIFO 1 priority" "Low,High"
bitfld.long 0x00 0. "                 [0]               ,Host TXFIFO 0 priority" "Low,High"
line.long 0x04 "GRXFIFOPRIHST,Global Host RX FIFO DMA Priority Register"
bitfld.long 0x04 2. " HOST_RXFIFO[2]        ,Host RXFIFO 2 priority" "Low,High"
bitfld.long 0x04 1. "             [1]                  ,Host RXFIFO 1 priority" "Low,High"
bitfld.long 0x04 0. "                 [0]               ,Host RXFIFO 0 priority" "Low,High"
if (((per.l(ad:0x03110000+0xC110))&0x3000)==0x1000)
group.long 0xC624++0x03
line.long 0x00 "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register"
bitfld.long 0x00 8.--12. " HOSTRXFIFOHILOW       ,Host RXFIFO DMA high-low" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
bitfld.long 0x00 0.--4. "               HOTXFIFOHILOPRI      ,Host TXFIFO DMA high-low priority ratio reset value" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
else
hgroup.long 0xC624++0x03
hide.long 0x00 "GDMAHLRATIO,Global Host FIFO DMA High-Low Priority Ratio Register"
endif
group.long 0xC630++0x03
line.long 0x00 "GFLADJ,Global Frame Length Adjustment Register"
hexmask.long.word 0x00 8.--21. 1. " GFLADJ_REFCLK_FLADJ   ,Indicates the frame length adjustment to be applied when SOF/ITP counter is running on the ref_clk"
bitfld.long 0x00 7. "             GFLADJ_30MHZ_REG_SEL ,Selects whether to use the input signal fladj_30mhz_reg or the GFLADJ.GFLADJ_30MHZ to adjust the frame length for the SOF/ITP" "FLADJ_30MHZ_REG,GFLADJ.GFLADJ_30MHZ"
bitfld.long 0x00 0.--5. "  GFLADJ_30MHZ      ,Indicates the value that is used for frame length adjustment instead of considering from the sideband input signal fladj_30mhz_reg" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,38,39,40,41,42,43,44,45,46,47,48,49,50,51,52,53,54,55,56,57,58,59,60,61,62,63"
group.long 0xC700++0x0B
line.long 0x00 "DCFG,Device Configuration Register"
bitfld.long 0x00 23. " IGNORESTREAMPP        ,Receive or ignore PP bit" "Received,Ignored"
bitfld.long 0x00 22. "         LPMCAP               ,LPM capability enable" "Disabled,Enabled"
bitfld.long 0x00 17.--21. "             NUMP              ,Number of receive buffers" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x00 12.--16. " INTRNUM               ,Interrupt number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
hexmask.long.word 0x00 3.--9. 0x08 "               DEVADDR              ,Device address"
bitfld.long 0x00 0.--2. "                 DEVSPD            ,Device speed" "High-speed,Full-speed,,,SuperSpeed,?..."
line.long 0x04 "DCTL,Device Control Register"
bitfld.long 0x04 31. " RUN_STOP              ,Run/Stop" "Stopped,Started"
eventfld.long 0x04 30. "          CSFTRST              ,Core soft reset" "No reset,Reset"
bitfld.long 0x04 24.--28. "             HIRD_THRES        ,HIRD threshold" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31"
newline
bitfld.long 0x04 23. " APPL1RES[3]           ,LPM NYET response threshold bit 3" "0,1"
bitfld.long 0x04 22. "                [2]                  ,LPM NYET response threshold bit 2" "0,1"
bitfld.long 0x04 21. "                    [1]               ,LPM NYET response threshold bit 1" "0,1"
newline
bitfld.long 0x04 20. " [0]                   ,LPM NYET response threshold bit 0" "0,1"
bitfld.long 0x04 17. "                CRS                  ,Controller restore state" "No effect,Restore"
bitfld.long 0x04 16. "            CSS               ,Controller save state" "No effect,Restore"
newline
bitfld.long 0x04 12. " INITU2ENA             ,Initiate U2 enable" "Disabled,Enabled"
bitfld.long 0x04 11. "         ACCEPTU2ENA          ,Accept U2 enable" "Disabled,Enabled"
bitfld.long 0x04 10. "             INITU1ENA         ,Initiate U1 enable" "Disabled,Enabled"
newline
bitfld.long 0x04 9. " ACCEPTU1ENA           ,Accept U1 enable" "Disabled,Enabled"
bitfld.long 0x04 5.--8. "         ULSTCHNGREQ          ,USB/Link state change request" "No action,,,,SS.Disabled,Rx.Detect,SS.Inactive,,Recovery,?..."
bitfld.long 0x04 1.--4. "          TSTCTL            ,Test control mode" "Disabled,Test_J,Test_K,Test_SE0_NAK,Test_Packet,Test_Force_Enable,?..."
line.long 0x08 "DEVTEN,Device Event Enable Register"
bitfld.long 0x08 12. " VNDRDEVTSTRCVEDEN     ,Vendor device test LMP received event enable" "Disabled,Enabled"
bitfld.long 0x08 9. "         ERRTICERREN          ,Erratic error event enable" "Disabled,Enabled"
bitfld.long 0x08 7. "             SOFEN             ,Start of frame enable" "Disabled,Enabled"
newline
bitfld.long 0x08 6. " U3L2L1SUSPEN          ,U3/L2-L1 suspend event enable" "Disabled,Enabled"
bitfld.long 0x08 4. "         WKUPEVTEN            ,Resume/Remote wakeup detected event enable" "Disabled,Enabled"
bitfld.long 0x08 3. "             ULSTCNGEN         ,USB/Link state change event enable" "Disabled,Enabled"
newline
bitfld.long 0x08 2. " CONNECTDONEEN         ,Connection done enable" "Disabled,Enabled"
bitfld.long 0x08 1. "         USBRSTEN             ,USB reset enable" "Disabled,Enabled"
bitfld.long 0x08 0. "             DISCONNEVTEN      ,Disconnect detected event enable" "Disabled,Enabled"
if (((per.l(ad:0x03110000+0xC70C))&0x07)==0x04)
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03110000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "U0,U1,U2,U3,SS_DIS,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset"
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
else
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "U0,U1,U2,U3,SS_DIS,RX_DET,SS_INACT,POLL,RECOV,HRESET,CMPLY,LPBK,,,,Resume/Reset"
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
endif
else
if (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03110000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,Early Suspend,?..."
bitfld.long 0x00 17. "        RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
elif (((per.l(ad:0x03110000+0xC144))&0x300000)==0x200000)&&(((per.l(ad:0x03110000+0xC110))&0x02)==0x00)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,,,,,,,,,Reset,Resume,?..."
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
elif (((per.l(ad:0x03110000+0xC144))&0x300000)!=0x200000)&&(((per.l(ad:0x03110000+0xC110))&0x02)==0x02)
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,Early Suspend,?..."
bitfld.long 0x00 17. "        RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
else
rgroup.long 0xC70C++0x03
line.long 0x00 "DSTS,Device Status Register"
bitfld.long 0x00 25. " RSS                   ,Restore state status" "Completed,Not completed"
bitfld.long 0x00 24. "    SSS                  ,Save state status" "Completed,Not completed"
bitfld.long 0x00 23. "        COREIDLE          ,Core idle" "Busy,Idle"
newline
bitfld.long 0x00 22. " DEVCTRLHLT            ,Device controller halted" "Not halted,Halted"
bitfld.long 0x00 18.--21. "       USBLNKST             ,USB/Link state in SS mode" "On state,,Sleep,Suspend,Disconnected,,,,,,,,,Reset,Resume,?..."
bitfld.long 0x00 17. "         RXFIFOEMPTY       ,RxFIFO empty" "Not empty,Empty"
newline
hexmask.long.tbyte 0x00 3.--16. 1. " SOFFN                 ,Frame/Microframe number of the received SOF"
bitfld.long 0x00 0.--2. "           CONNECTSPD           ,Connected speed" "High-speed,Full-speed,Low-speed,Full-speed,SuperSpeed,?..."
endif
endif
hgroup.long 0xC710++0x03
hide.long 0x00 "DGCMDPAR,Device Generic Command Parameter Register"
group.long 0xC714++0x03
line.long 0x00 "DGCMD,Device Generic Command Register"
rbitfld.long 0x00 15. " CMDSTATUS[3]          ,Command status 3" "Success,Error"
rbitfld.long 0x00 14. "          [2]                  ,Command status 2" "Success,Error"
rbitfld.long 0x00 13. "              [1]               ,Command status 1" "Success,Error"
newline
rbitfld.long 0x00 12. " [0]                   ,Command status 0" "Success,Error"
bitfld.long 0x00 10. "          CMDACT               ,Command active" "Not active,Active"
bitfld.long 0x00 8. "           CMDIOC            ,Command interrupt on complete" "Masked,Not masked"
newline
hexmask.long.byte 0x00 0.--7. 1. " CMDTYP                ,Command type"
group.long 0xC720++0x03
line.long 0x00 "DALEPENA,Device Active USB Endpoint Enable Register"
bitfld.long 0x00 7. " USBACTEP[7]           ,USB EP3-IN" "Not active,Active"
bitfld.long 0x00 6. "       [6]                  ,USB EP3-OUT" "Not active,Active"
bitfld.long 0x00 5. "           [5]               ,USB EP2-IN" "Not active,Active"
newline
bitfld.long 0x00 4. " [4]                   ,USB EP2-OUT" "Not active,Active"
bitfld.long 0x00 3. "       [3]                  ,USB EP1-IN" "Not active,Active"
bitfld.long 0x00 2. "           [2]               ,USB EP1-OUT" "Not active,Active"
newline
bitfld.long 0x00 1. " [1]                   ,USB EP0-IN" "Not active,Active"
bitfld.long 0x00 0. "       [0]                  ,USB EP0-OUT" "Not active,Active"
group.long (0xC800+0x0)++0x0F
line.long 0x00 "DEPCMDPAR20,Device Physical Endpoint-0 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR10,Device Physical Endpoint-0 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR00,Device Physical Endpoint-0 Command Parameter 0 Register"
line.long 0x0C "DEPCMD0,Device Physical Endpoint-0 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x10)++0x0F
line.long 0x00 "DEPCMDPAR21,Device Physical Endpoint-1 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR11,Device Physical Endpoint-1 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR01,Device Physical Endpoint-1 Command Parameter 0 Register"
line.long 0x0C "DEPCMD1,Device Physical Endpoint-1 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x20)++0x0F
line.long 0x00 "DEPCMDPAR22,Device Physical Endpoint-2 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR12,Device Physical Endpoint-2 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR02,Device Physical Endpoint-2 Command Parameter 0 Register"
line.long 0x0C "DEPCMD2,Device Physical Endpoint-2 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x30)++0x0F
line.long 0x00 "DEPCMDPAR23,Device Physical Endpoint-3 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR13,Device Physical Endpoint-3 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR03,Device Physical Endpoint-3 Command Parameter 0 Register"
line.long 0x0C "DEPCMD3,Device Physical Endpoint-3 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x40)++0x0F
line.long 0x00 "DEPCMDPAR24,Device Physical Endpoint-4 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR14,Device Physical Endpoint-4 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR04,Device Physical Endpoint-4 Command Parameter 0 Register"
line.long 0x0C "DEPCMD4,Device Physical Endpoint-4 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x50)++0x0F
line.long 0x00 "DEPCMDPAR25,Device Physical Endpoint-5 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR15,Device Physical Endpoint-5 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR05,Device Physical Endpoint-5 Command Parameter 0 Register"
line.long 0x0C "DEPCMD5,Device Physical Endpoint-5 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x60)++0x0F
line.long 0x00 "DEPCMDPAR26,Device Physical Endpoint-6 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR16,Device Physical Endpoint-6 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR06,Device Physical Endpoint-6 Command Parameter 0 Register"
line.long 0x0C "DEPCMD6,Device Physical Endpoint-6 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
group.long (0xC800+0x70)++0x0F
line.long 0x00 "DEPCMDPAR27,Device Physical Endpoint-7 Command Parameter 2 Register"
line.long 0x04 "DEPCMDPAR17,Device Physical Endpoint-7 Command Parameter 1 Register"
line.long 0x08 "DEPCMDPAR07,Device Physical Endpoint-7 Command Parameter 0 Register"
line.long 0x0C "DEPCMD7,Device Physical Endpoint-7 Command Register"
hexmask.long.word 0x0C 16.--31. 1. " COMMANDPARAM          ,Command parameters"
bitfld.long 0x0C 12.--15. "             CMDSTATUS            ,Command completion status" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x0C 11. "                   HIPRI_FORCERM     ,HighPriority/ForceRM" "0,1"
newline
bitfld.long 0x0C 10. " CMDACT                ,Enables device endpoint controller to execute generic command" "No effect,Execute"
bitfld.long 0x0C 8. "        CMDIOC               ,Command interrupt on complete" "Masked,Not masked"
bitfld.long 0x0C 0.--3. "           CMDTYPE           ,Command type" ",Set EP conf.,Set EP transfer res. conf.,Get EP state,Set stall,Clear stall,Start transfer,Update transfer,End transfer,Start new conf.,?..."
newline
group.long 0xCC20++0x0F
line.long 0x00 "ADPCFG,ADP Configuration Register"
bitfld.long 0x00 30.--31. " PRBPER                ,Probe period/scaledown probe period" "0.775 s/12.5 ms,1.55 s/18.75 ms,2.275 s/25 ms,-/31.25 ms"
bitfld.long 0x00 28.--29. "  PRBDELTA             ,Sets the resolution for RTIM value" "1 cycle,2 cycles,3 cycles,4 cycles"
bitfld.long 0x00 26.--27. "             PRBDSCHG          ,Probe discharge/scaledown probe discharge" "4 ms/62.5 us,8 ms/125 us,16 ms/250 us,32 ms/500 us"
line.long 0x04 "ADPCTL,ADP Control Register"
bitfld.long 0x04 28. " ENAPRB                ,Enable probe" "Disabled,Enabled"
bitfld.long 0x04 27. "         ENASNS               ,Enable sense" "Disabled,Enabled"
bitfld.long 0x04 26. "             ADPEN             ,ADP enable" "Disabled,Enabled"
newline
bitfld.long 0x04 25. " ADPRES                ,ADP reset" "No reset,Reset"
rbitfld.long 0x04 24. "         WB                   ,Write busy" "Completed,In progress"
line.long 0x08 "ADPEVT,ADP Event Register"
bitfld.long 0x08 28. " ADPPRBEVNT            ,ADP probe event" "Not occurred,Occurred"
bitfld.long 0x08 27. "     ADPSNSEVNT           ,ADP sense event" "Not occurred,Occurred"
bitfld.long 0x08 26. "         ADPTMOUTEVNT      ,ADP timeout event" "Not occurred,Occurred"
newline
bitfld.long 0x08 25. " ADPRSTCMPLTEVNT       ,ADP reset complete event" "Not occurred,Occurred"
rhexmask.long.word 0x08 0.--15. 1. "     RTIM                 ,Captures the latest time it took for VBUS to ramp from VADP_SINK to VADP_PRB"
line.long 0x0C "ADPEVTEN,ADP Event Enable Register"
bitfld.long 0x0C 28. " ADPPRBEVNTEN          ,ADP probe event enable" "Disabled,Enabled"
bitfld.long 0x0C 27. "         ADPSNSEVNTEN         ,ADP sense event enable" "Disabled,Enabled"
bitfld.long 0x0C 26. "             ADPTMOUTEVNTEN    ,ADP timeout event enable" "Disabled,Enabled"
newline
bitfld.long 0x0C 25. " ADPRSTCMPLTEVNTEN     ,ADP reset complete event enable" "Disabled,Enabled"
width 0x0B
tree.end
tree "USB PHY SS 1"
base ad:0x704600000
width 21.
rgroup.word 0x00++0x03
line.word 0x00 "IP_IDCODE_LO,SuperSpeed ID Code Low Register"
line.word 0x02 "SUP_IDCODE_HI,SuperSpeed ID Code High Register"
group.word 0x50++0x01
line.word 0x00 "MPLL_LOOP_CTL,MPLL Loop Control Register"
bitfld.word 0x00 4.--7. " PROP_CNTRL ,Pump proportional current control setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x1FFC++0x01
line.word 0x00 "LANE0_RX_OVRD_IN_HI,Lane0 Receiver Override High Register"
bitfld.word 0x00 11. " RX_EQ_OVRD ,Override value for rx_eq" "0,1"
bitfld.word 0x00 8.--10. "   RX_EQ ,Override value for rx_eq" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 7. "  RX_EQ_EN_OVRD ,Override enable for rx_eq_en" "Disabled,Enabled"
bitfld.word 0x00 6. "  RX_EQ_EN ,Override value for rx_eq_en" "0,1"
width 0x0B
tree.end
tree "USB PHY SS 2"
base ad:0x704610000
width 21.
rgroup.word 0x00++0x03
line.word 0x00 "IP_IDCODE_LO,SuperSpeed ID Code Low Register"
line.word 0x02 "SUP_IDCODE_HI,SuperSpeed ID Code High Register"
group.word 0x50++0x01
line.word 0x00 "MPLL_LOOP_CTL,MPLL Loop Control Register"
bitfld.word 0x00 4.--7. " PROP_CNTRL ,Pump proportional current control setting" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
group.word 0x1FFC++0x01
line.word 0x00 "LANE0_RX_OVRD_IN_HI,Lane0 Receiver Override High Register"
bitfld.word 0x00 11. " RX_EQ_OVRD ,Override value for rx_eq" "0,1"
bitfld.word 0x00 8.--10. "   RX_EQ ,Override value for rx_eq" "0,1,2,3,4,5,6,7"
bitfld.word 0x00 7. "  RX_EQ_EN_OVRD ,Override enable for rx_eq_en" "Disabled,Enabled"
bitfld.word 0x00 6. "  RX_EQ_EN ,Override value for rx_eq_en" "0,1"
width 0x0B
tree.end
tree.end
tree.open "WDOG (Watchdog Timer Unit)"
tree "TrustZone WDOG"
base ad:0x023C0000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 1"
base ad:0x0C000000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 2"
base ad:0x0C010000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 3"
base ad:0x0C100000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 4"
base ad:0x0C110000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
sif !cpuis("LS2048A*")&&!cpuis("LS2044A*")
tree "WDOG 5"
base ad:0x0C200000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 6"
base ad:0x0C210000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 7"
base ad:0x0C300000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
tree "WDOG 8"
base ad:0x0C310000
width 11.
group.long 0x00++0x03
line.long 0x00 "LOAD,Watchdog Load Register"
rgroup.long 0x04++0x03
line.long 0x00 "VALUE,Watchdog Value Register"
group.long 0x08++0x03
line.long 0x00 "CONTROL,Watchdog Control Register"
bitfld.long 0x00 1. " RESEN                          ,Enable watchdog reset output" "Disabled,Enabled"
bitfld.long 0x00 0. "      INTEN                          ,Enable the interrupt event" "Disabled,Enabled"
wgroup.long 0x0C++0x03
line.long 0x00 "INTCLR,Watchdog Clear Interrupt Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No effect,Clear"
rgroup.long 0x10++0x07
line.long 0x00 "RIS,Watchdog Raw Interrupt Status Register"
bitfld.long 0x00 0. " RAW_WATCHDOG_INTERRUPT         ,Raw interrupt status from the counter" "No interrupt,Interrupt"
line.long 0x04 "MIS,Watchdog Interrupt Status Register"
bitfld.long 0x04 0. " WATCHDOG_INTERRUPT             ,Enabled interrupt status from the counter" "No interrupt,Interrupt"
group.long 0xC00++0x03
line.long 0x00 "LOCK,Watchdog Lock Register"
hexmask.long 0x00 1.--31. 1. " ENABLE_REGISTER_WRITES         ,Enable write access to all other registers by writing 0x1ACCE551"
bitfld.long 0x00 0. "      REGISTER_WRITE_ENABLE_STATUS   ,Registers write enable" "Enabled,Disabled"
group.long 0xF00++0x03
line.long 0x00 "ITCR,Watchdog Integration Test Control Register"
bitfld.long 0x00 0. " INTEGRATION_TEST_MODE_ENABLE   ,Watchdog integration test mode enable" "Disabled,Enabled"
wgroup.long 0xF04++0x03
line.long 0x00 "ITOP,Watchdog Integration Test Output Set Register"
bitfld.long 0x00 1. " INTEGRATION_TEST_WDOGINT_VALUE ,Value output on WDOGINT when in integration test mode" "0,1"
bitfld.long 0x00 0. "             INTEGRATION_TEST_WDOGRES_VALUE ,Value output on WDOGRES when in integration test mode" "0,1"
rgroup.long 0xFE0++0x1F
line.long 0x00 "PERIPHID0,Peripheral Identification Register 0"
hexmask.long.byte 0x00 0.--7. 1. " PARTNUMBER0                    ,PARTNUMBER 0 field"
line.long 0x04 "PERIPHID1,Peripheral Identification Register 1"
bitfld.long 0x04 4.--7. " DESIGNER0                      ,DESIGNER 0 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x04 0.--3. "            PARTNUMBER1                    ,PARTNUMBER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x08 "PERIPHID2,Peripheral Identification Register 2"
bitfld.long 0x08 4.--7. " REVISION                       ,Peripheral revision number" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x08 0.--3. "            DESIGNER1                      ,DESIGNER 1 field" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
line.long 0x0C "PERIPHID3,Peripheral Identification Register 3"
hexmask.long.byte 0x0C 0.--7. 1. " CONFIGURATION                  ,CONFIGURATION field"
line.long 0x10 "PCELLID0,PrimeCell Identification Register 0"
hexmask.long.byte 0x10 0.--7. 1. " WDOGPCELLID0                   ,Watchdog primecell identification 0"
line.long 0x14 "PCELLID1,PrimeCell Identification Register 1"
hexmask.long.byte 0x14 0.--7. 1. " WDOGPCELLID1                   ,Watchdog primecell identification 1"
line.long 0x18 "PCELLID2,PrimeCell Identification Register 2"
hexmask.long.byte 0x18 0.--7. 1. " WDOGPCELLID2                   ,Watchdog primecell identification 2"
line.long 0x1C "PCELLID3,PrimeCell Identification Register 3"
hexmask.long.byte 0x1C 0.--7. 1. " WDOGPCELLID3                   ,Watchdog primecell identification 3"
width 0x0B
tree.end
endif
tree.end
tree "EPU (Event Processing Unit)"
base ad:0x700060000
width 10.
group.long 0x50++0x03
line.long 0x00 "EPEVTCR0,Event Processor EVT Pin Control Register 0"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x54++0x03
line.long 0x00 "EPEVTCR1,Event Processor EVT Pin Control Register 1"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x58++0x03
line.long 0x00 "EPEVTCR2,Event Processor EVT Pin Control Register 2"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x5C++0x03
line.long 0x00 "EPEVTCR3,Event Processor EVT Pin Control Register 3"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x60++0x03
line.long 0x00 "EPEVTCR4,Event Processor EVT Pin Control Register 4"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x64++0x03
line.long 0x00 "EPEVTCR5,Event Processor EVT Pin Control Register 5"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x68++0x03
line.long 0x00 "EPEVTCR6,Event Processor EVT Pin Control Register 6"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x6C++0x03
line.long 0x00 "EPEVTCR7,Event Processor EVT Pin Control Register 7"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x70++0x03
line.long 0x00 "EPEVTCR8,Event Processor EVT Pin Control Register 8"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0x74++0x03
line.long 0x00 "EPEVTCR9,Event Processor EVT Pin Control Register 9"
bitfld.long 0x00 28.--31. " EVT_SEL ,Event select" "0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15"
bitfld.long 0x00 0. "  DIR ,Direction" "Input,Output"
group.long 0xFD0++0x03
line.long 0x00 "EPRSRV08,Event Processor Debug Reservation Register 8"
group.long 0xFD4++0x03
line.long 0x00 "EPRSRV07,Event Processor Debug Reservation Register 7"
group.long 0xFD8++0x03
line.long 0x00 "EPRSRV06,Event Processor Debug Reservation Register 6"
group.long 0xFDC++0x03
line.long 0x00 "EPRSRV05,Event Processor Debug Reservation Register 5"
group.long 0xFE0++0x03
line.long 0x00 "EPRSRV04,Event Processor Debug Reservation Register 4"
group.long 0xFE4++0x03
line.long 0x00 "EPRSRV03,Event Processor Debug Reservation Register 3"
group.long 0xFE8++0x03
line.long 0x00 "EPRSRV02,Event Processor Debug Reservation Register 2"
group.long 0xFEC++0x03
line.long 0x00 "EPRSRV01,Event Processor Debug Reservation Register 1"
width 0x0B
tree.end
newline